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authorSascha Hauer <sha@octopus.labnet.pengutronix.de>2007-09-27 12:09:43 +0200
committerSascha Hauer <sha@octopus.labnet.pengutronix.de>2007-09-27 12:09:43 +0200
commit109449f49f23ad024cef0b690e8a8353f66270a3 (patch)
tree703f16caee86d61dcb996d4ab21ce9c6d66f38f5 /include/configs/ipe337.h
parentd7034dbb8c1ad11fafebd77a4fa4625739746706 (diff)
downloadbarebox-109449f49f23ad024cef0b690e8a8353f66270a3.tar.gz
barebox-109449f49f23ad024cef0b690e8a8353f66270a3.tar.xz
update ipe337 timing values and fix memory size
Diffstat (limited to 'include/configs/ipe337.h')
-rw-r--r--include/configs/ipe337.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/ipe337.h b/include/configs/ipe337.h
index 4efc62b1ee..47e4c2c2e5 100644
--- a/include/configs/ipe337.h
+++ b/include/configs/ipe337.h
@@ -20,19 +20,19 @@
#define CONFIG_PLL_BYPASS 0
/* CONFIG_VCO_MULT controls what the multiplier of the PLL is. */
/* Values can range from 1-64 */
-#define CONFIG_VCO_MULT 22
+#define CONFIG_VCO_MULT 24
/* CONFIG_CCLK_DIV controls what the core clock divider is */
/* Values can be 1, 2, 4, or 8 ONLY */
#define CONFIG_CCLK_DIV 1
/* CONFIG_SCLK_DIV controls what the peripheral clock divider is */
/* Values can range from 1-15 */
-#define CONFIG_SCLK_DIV 7
+#define CONFIG_SCLK_DIV 9
#define AMGCTLVAL 0x1F
#define AMBCTL0VAL 0x14407BB0
#define AMBCTL1VAL 0xFFC2FFC2
-#define CONFIG_MEM_MT48LC64M4A2FB_7E 1
+#define CONFIG_MEM_MT48LC16M16A2TG_75 1
#define CONFIG_MEM_ADD_WDTH 9 /* 8, 9, 10, 11 */
-#define CONFIG_MEM_SIZE 128 /* 128, 64, 32, 16 */
+#define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */