Merge branch 'for-sha-mx35-3-stack-updates' of ssh://git.pengutronix.de/git/mkl/barebox into next

2 files changed, 147 insertions, 4 deletions

diff --git a/include/i2c/mc13892.h b/include/i2c/mc13892.h
index 2f44f6c853..112d05ba69 100644
--- a/include/i2c/mc13892.h
+++ b/include/i2c/mc13892.h
@@ -1,7 +1,93 @@
+/*
+ * Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de>
+ *
+ * This file is released under the GPLv2
+ *
+ * Derived from:
+ * - arch-mxc/pmic_external.h --  contains interface of the PMIC protocol driver
+ *   Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ */
+
 #ifndef __ASM_ARCH_MC13892_H
 #define __ASM_ARCH_MC13892_H
 
-extern struct i2c_client *mc13892_get_client(void);
+enum mc13892_reg {
+	MC13892_REG_INT_STATUS0		= 0x00,
+	MC13892_REG_INT_MASK0		= 0x01,
+	MC13892_REG_INT_SENSE0		= 0x02,
+	MC13892_REG_INT_STATUS1		= 0x03,
+	MC13892_REG_INT_MASK1		= 0x04,
+	MC13892_REG_INT_SENSE1		= 0x05,
+	MC13892_REG_PU_MODE_S		= 0x06,
+	MC13892_REG_IDENTIFICATION	= 0x07,
+	MC13892_REG_UNUSED0		= 0x08,
+	MC13892_REG_ACC0		= 0x09,
+	MC13892_REG_ACC1		= 0x0a,
+	MC13892_REG_UNUSED1		= 0x0b,
+	MC13892_REG_UNUSED2		= 0x0c,
+	MC13892_REG_POWER_CTL0		= 0x0d,
+	MC13892_REG_POWER_CTL1		= 0x0e,
+	MC13892_REG_POWER_CTL2		= 0x0f,
+	MC13892_REG_REGEN_ASSIGN	= 0x10,
+	MC13892_REG_UNUSED3		= 0x11,
+	MC13892_REG_MEM_A		= 0x12,
+	MC13892_REG_MEM_B		= 0x13,
+	MC13892_REG_RTC_TIME		= 0x14,
+	MC13892_REG_RTC_ALARM		= 0x15,
+	MC13892_REG_RTC_DAY		= 0x16,
+	MC13892_REG_RTC_DAY_ALARM	= 0x17,
+	MC13892_REG_SW_0		= 0x18,
+	MC13892_REG_SW_1		= 0x19,
+	MC13892_REG_SW_2		= 0x1a,
+	MC13892_REG_SW_3		= 0x1b,
+	MC13892_REG_SW_4		= 0x1c,
+	MC13892_REG_SW_5		= 0x1d,
+	MC13892_REG_SETTING_0		= 0x1e,
+	MC13892_REG_SETTING_1		= 0x1f,
+	MC13892_REG_MODE_0		= 0x20,
+	MC13892_REG_MODE_1		= 0x21,
+	MC13892_REG_POWER_MISC		= 0x22,
+	MC13892_REG_UNUSED4		= 0x23,
+	MC13892_REG_UNUSED5		= 0x24,
+	MC13892_REG_UNUSED6		= 0x25,
+	MC13892_REG_UNUSED7		= 0x26,
+	MC13892_REG_UNUSED8		= 0x27,
+	MC13892_REG_UNUSED9		= 0x28,
+	MC13892_REG_UNUSED10		= 0x29,
+	MC13892_REG_UNUSED11		= 0x2a,
+	MC13892_REG_ADC0		= 0x2b,
+	MC13892_REG_ADC1		= 0x2c,
+	MC13892_REG_ADC2		= 0x2d,
+	MC13892_REG_ADC3		= 0x2e,
+	MC13892_REG_ADC4		= 0x2f,
+	MC13892_REG_CHARGE		= 0x30,
+	MC13892_REG_USB0		= 0x31,
+	MC13892_REG_USB1		= 0x32,
+	MC13892_REG_LED_CTL0		= 0x33,
+	MC13892_REG_LED_CTL1		= 0x34,
+	MC13892_REG_LED_CTL2		= 0x35,
+	MC13892_REG_LED_CTL3		= 0x36,
+	MC13892_REG_UNUSED12		= 0x37,
+	MC13892_REG_UNUSED13		= 0x38,
+	MC13892_REG_TRIM0		= 0x39,
+	MC13892_REG_TRIM1		= 0x3a,
+	MC13892_REG_TEST0		= 0x3b,
+	MC13892_REG_TEST1		= 0x3c,
+	MC13892_REG_TEST2		= 0x3d,
+	MC13892_REG_TEST3		= 0x3e,
+	MC13892_REG_TEST4		= 0x3f,
+};
 
-#endif /* __ASM_ARCH_MC13892_H */
+struct mc13892 {
+	struct cdev		cdev;
+	struct i2c_client	*client;
+};
+
+extern struct mc13892 *mc13892_get(void);
 
+extern int mc13892_reg_read(struct mc13892 *mc13892, enum mc13892_reg reg, u32 *val);
+extern int mc13892_reg_write(struct mc13892 *mc13892, enum mc13892_reg reg, u32 val);
+extern int mc13892_set_bits(struct mc13892 *mc13892, enum mc13892_reg reg, u32 mask, u32 val);
+
+#endif /* __ASM_ARCH_MC13892_H */
diff --git a/include/i2c/mc9sdz60.h b/include/i2c/mc9sdz60.h
index 04cfca04ab..4cc233e058 100644
--- a/include/i2c/mc9sdz60.h
+++ b/include/i2c/mc9sdz60.h
@@ -1,7 +1,64 @@
+/*
+ * Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de>
+ *
+ * This file is released under the GPLv2
+ *
+ * Derived from:
+ * - mcu_max8660-bus.h --  contains interface of the mc9sdz60 and max8660
+ *   Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ */
+
 #ifndef __ASM_ARCH_MC9SDZ60_H
 #define __ASM_ARCH_MC9SDZ60_H
 
-extern struct i2c_client *mc9sdz60_get_client(void);
+enum mc9sdz60_reg {
+	MC9SDZ60_REG_VERSION		= 0x00,
+	MC9SDZ60_REG_SECS		= 0x01,
+	MC9SDZ60_REG_MINS		= 0x02,
+	MC9SDZ60_REG_HRS		= 0x03,
+	MC9SDZ60_REG_DAY		= 0x04,
+	MC9SDZ60_REG_DATE		= 0x05,
+	MC9SDZ60_REG_MONTH		= 0x06,
+	MC9SDZ60_REG_YEAR		= 0x07,
+	MC9SDZ60_REG_ALARM_SECS		= 0x08,
+	MC9SDZ60_REG_ALARM_MINS		= 0x09,
+	MC9SDZ60_REG_ALARM_HRS		= 0x0a,
+	MC9SDZ60_REG_TS_CONTROL		= 0x0b,
+	MC9SDZ60_REG_X_LOW		= 0x0c,
+	MC9SDZ60_REG_Y_LOW		= 0x0d,
+	MC9SDZ60_REG_XY_HIGH		= 0x0e,
+	MC9SDZ60_REG_X_LEFT_LOW		= 0x0f,
+	MC9SDZ60_REG_X_LEFT_HIGH	= 0x10,
+	MC9SDZ60_REG_X_RIGHT		= 0x11,
+	MC9SDZ60_REG_Y_TOP_LOW		= 0x12,
+	MC9SDZ60_REG_Y_TOP_HIGH		= 0x13,
+	MC9SDZ60_REG_Y_BOTTOM		= 0x14,
+	MC9SDZ60_REG_RESET_1		= 0x15,
+	MC9SDZ60_REG_RESET_2		= 0x16,
+	MC9SDZ60_REG_POWER_CTL		= 0x17,
+	MC9SDZ60_REG_DELAY_CONFIG	= 0x18,
+	MC9SDZ60_REG_GPIO_1		= 0x19,
+	MC9SDZ60_REG_GPIO_2		= 0x1a,
+	MC9SDZ60_REG_KPD_1		= 0x1b,
+	MC9SDZ60_REG_KPD_2		= 0x1c,
+	MC9SDZ60_REG_KPD_CONTROL	= 0x1d,
+	MC9SDZ60_REG_INT_ENABLE_1	= 0x1e,
+	MC9SDZ60_REG_INT_ENABLE_2	= 0x1f,
+	MC9SDZ60_REG_INT_FLAG_1		= 0x20,
+	MC9SDZ60_REG_INT_FLAG_2		= 0x21,
+	MC9SDZ60_REG_DES_FLAG		= 0x22,
+};
 
-#endif /* __ASM_ARCH_MC9SDZ60_H */
+struct mc9sdz60 {
+	struct cdev		cdev;
+	struct i2c_client	*client;
+};
+
+extern struct mc9sdz60 *mc9sdz60_get(void);
 
+extern int mc9sdz60_reg_read(struct mc9sdz60 *priv, enum mc9sdz60_reg reg, u8 *val);
+extern int mc9sdz60_reg_write(struct mc9sdz60 *priv, enum mc9sdz60_reg reg, u8 val);
+extern int mc9sdz60_set_bits(struct mc9sdz60 *priv, enum mc9sdz60_reg reg, u8 mask, u8 val);
+
+#endif /* __ASM_ARCH_MC9SDZ60_H */