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| author | Wadim Egorov <w.egorov@phytec.de> | 2015-02-12 10:30:54 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-03-02 07:54:13 +0100 |
| commit | c918022532fdb0ea47f6ecc87d3af5f85aae8fb5 (patch) | |
| tree | dd4ebc4fd26bfc973866031258513e1630b5381a /include/reset_source.h | |
| parent | e7e39180ad01e279d5f3ab2f78ce319dc8ab51fc (diff) | |
| download | barebox-c918022532fdb0ea47f6ecc87d3af5f85aae8fb5.tar.gz barebox-c918022532fdb0ea47f6ecc87d3af5f85aae8fb5.tar.xz | |
reset_source: Add external reset
Some SoCs have special device pins for external reset signals.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include/reset_source.h')
| -rw-r--r-- | include/reset_source.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/reset_source.h b/include/reset_source.h index 6620228722..367f93b2ad 100644 --- a/include/reset_source.h +++ b/include/reset_source.h @@ -21,6 +21,7 @@ enum reset_src_type { RESET_WKE, /* wake-up (some SoCs can handle this) */ RESET_JTAG, /* JTAG reset */ RESET_THERM, /* SoC shut down because of overtemperature */ + RESET_EXT, /* External reset through device pin */ }; #ifdef CONFIG_RESET_SOURCE |