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| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2015-05-06 12:31:57 -0700 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-05-07 09:49:38 +0200 |
| commit | 18a5a9b969cf9af5d3668bd6e5918554369439d3 (patch) | |
| tree | aa7c86ccd37c29bde71324f14ce74eb0565caf01 /include/serial/imx-uart.h | |
| parent | 089a70dc9c5edb424a6392259129016435acf162 (diff) | |
| download | barebox-18a5a9b969cf9af5d3668bd6e5918554369439d3.tar.gz barebox-18a5a9b969cf9af5d3668bd6e5918554369439d3.tar.xz | |
i.MX: serial: Add constants for UART clock divisor
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include/serial/imx-uart.h')
| -rw-r--r-- | include/serial/imx-uart.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/serial/imx-uart.h b/include/serial/imx-uart.h index e40843d43d..0a0178882a 100644 --- a/include/serial/imx-uart.h +++ b/include/serial/imx-uart.h @@ -77,6 +77,13 @@ #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ #define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ #define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ +#define UFCR_RFDIV6 (0b000<<7) /* Reference freq divider mask */ +#define UFCR_RFDIV5 (0b001<<7) /* Reference freq divider mask */ +#define UFCR_RFDIV4 (0b010<<7) /* Reference freq divider mask */ +#define UFCR_RFDIV3 (0b011<<7) /* Reference freq divider mask */ +#define UFCR_RFDIV2 (0b100<<7) /* Reference freq divider mask */ +#define UFCR_RFDIV1 (0b101<<7) /* Reference freq divider mask */ +#define UFCR_RFDIV7 (0b110<<7) /* Reference freq divider mask */ #define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ #define USR1_PARITYERR (1<<15) /* Parity error interrupt flag */ #define USR1_RTSS (1<<14) /* RTS pin status */ |