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author | Sascha Hauer <s.hauer@pengutronix.de> | 2024-03-26 11:07:42 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2024-04-04 08:14:05 +0200 |
commit | 241960e1be836b33df68a9be7d21703ab5983553 (patch) | |
tree | 87b89fe492d6388f423f86e39ec393b38df9abf0 /include | |
parent | b920c76bc307edccff7e4eee41f015d4133b0158 (diff) | |
download | barebox-241960e1be836b33df68a9be7d21703ab5983553.tar.gz barebox-241960e1be836b33df68a9be7d21703ab5983553.tar.xz |
pci: add of_pci_bridge_init()
So far we assume a 1:1 mapping between the CPU and bus address space.
This is not always the case and different mappings are described in the
ranges device tree property. Parse the property and call
pci_add_resource_offset() accordingly. The code is based on the
corresponding Kernel code.
Link: https://lore.barebox.org/20240326100746.471532-13-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/pci.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index 11a60f66a9..f6511e0095 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -414,4 +414,14 @@ void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region, void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, struct pci_bus_region *region); +/* drivers/pci/of.c */ +#ifdef CONFIG_OFDEVICE +int of_pci_bridge_init(struct device *dev, struct pci_controller *bridge); +#else +static inline int of_pci_bridge_init(struct device *dev, struct pci_controller *bridge) +{ + return 0; +} +#endif + #endif /* LINUX_PCI_H */ |