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authorDenis Orlov <denorl2009@gmail.com>2024-03-12 00:36:07 +0300
committerSascha Hauer <s.hauer@pengutronix.de>2024-03-13 07:38:46 +0100
commitb191f021c5c42b002d61f2bc53470e3ccc8ff8dd (patch)
treeefb922f6bdd247117fe347fa059dd1f4a430975c /include
parentf6589670eb73eb5719d94e7beae27849535d8987 (diff)
downloadbarebox-b191f021c5c42b002d61f2bc53470e3ccc8ff8dd.tar.gz
barebox-b191f021c5c42b002d61f2bc53470e3ccc8ff8dd.tar.xz
ddr_spd: add DDR3 Load Reduced module specific data
This will be used by the DDR3 SPD data printing routine and is needed for completeness, to cover all of the DDR3-related cases from the original decode-dimms tool. Signed-off-by: Denis Orlov <denorl2009@gmail.com> Link: https://lore.barebox.org/20240311213915.584429-2-denorl2009@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/ddr_spd.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/include/ddr_spd.h b/include/ddr_spd.h
index a96d01df85..415fc88f63 100644
--- a/include/ddr_spd.h
+++ b/include/ddr_spd.h
@@ -264,6 +264,40 @@ struct ddr3_spd_eeprom {
/* 69-76 RC1,3,5...15 (MS Nibble) / RC0,2,4...14 (LS Nibble) */
unsigned char rcw[8];
} registered;
+ struct {
+ /* 60 (Load Reduced) Module Nominal Height */
+ unsigned char mod_height;
+ /* 61 (Load Reduced) Module Maximum Thickness */
+ unsigned char mod_thickness;
+ /* 62 (Load Reduced) Reference Raw Card Used */
+ unsigned char ref_raw_card;
+ /* 63 Module Attributes */
+ unsigned char modu_attr;
+ /* 64 Memory Buffer Revision ID */
+ unsigned char buf_rev_id;
+ /* 65 Memory Buffer Manufacturer ID Code, Least Significant Byte */
+ unsigned char buf_id_lo;
+ /* 66 Memory Buffer Manufacturer ID Code, Most Significant Byte */
+ unsigned char buf_id_hi;
+ /* 67-89 FxRCy and MR1,2 Registers */
+ unsigned char fxrcy_mr1_2[23];
+ /* 90 Minimum Module Delay Time for 1.5 V */
+ unsigned char min_delay_1_5;
+ /* 91 Maximum Module Delay Time for 1.5 V */
+ unsigned char max_delay_1_5;
+ /* 92 Minimum Module Delay Time for 1.35 V */
+ unsigned char min_delay_1_35;
+ /* 93 Maximum Module Delay Time for 1.35 V */
+ unsigned char max_delay_1_35;
+ /* 94 Minimum Module Delay Time for 1.25 V */
+ unsigned char min_delay_1_25;
+ /* 95 Maximum Module Delay Time for 1.25 V */
+ unsigned char max_delay_1_25;
+ /* 96-101 Reserved */
+ unsigned char reserved[6];
+ /* 102-116 Memory Buffer Personality Bytes */
+ unsigned char mem_buf_personality[15];
+ } loadreduced;
unsigned char uc[57]; /* 60-116 Module-Specific Section */
} mod_section;