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author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-10-17 08:10:23 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-10-17 08:10:23 +0200 |
commit | ee6d4a74eb6efa643e7b834b32e04d01c6b29b7f (patch) | |
tree | 2ca84274dfe2e54729bca7dc4bbfe42611a1ee7f /include | |
parent | c59d7ab7317014cc14a98c47e91c2b582d5d08a7 (diff) | |
parent | 099b135ac30013dfc4b3310a5177cf2f7a17f3c3 (diff) | |
download | barebox-ee6d4a74eb6efa643e7b834b32e04d01c6b29b7f.tar.gz barebox-ee6d4a74eb6efa643e7b834b32e04d01c6b29b7f.tar.xz |
Merge branch 'for-next/misc'
Diffstat (limited to 'include')
-rw-r--r-- | include/jtag.h | 2 | ||||
-rw-r--r-- | include/state.h | 41 | ||||
-rw-r--r-- | include/superio.h | 64 |
3 files changed, 101 insertions, 6 deletions
diff --git a/include/jtag.h b/include/jtag.h index 26c95fb307..4cc4eaca91 100644 --- a/include/jtag.h +++ b/include/jtag.h @@ -28,7 +28,7 @@ * (repeat for each chip in the chain) * - ioctl JTAG_GET_ID identifies the chip * - ioctl JTAG_SET_IR_LENGTH sets the instruction register length - * Before accessing the data registers, instruction registers' lenghtes + * Before accessing the data registers, instruction registers' lengths * MUST be programmed for all chips. * After this initialization, you can execute JTAG_IR_WR, JTAG_DR_RD, JTAG_DR_WR * commands in any sequence. diff --git a/include/state.h b/include/state.h index 4e995a19ef..d98b781c20 100644 --- a/include/state.h +++ b/include/state.h @@ -5,17 +5,13 @@ struct state; -int state_backend_dtb_file(struct state *state, const char *of_path, - const char *path); -int state_backend_raw_file(struct state *state, const char *of_path, - const char *path, off_t offset, size_t size); +#if IS_ENABLED(CONFIG_STATE) struct state *state_new_from_node(struct device_node *node, bool readonly); void state_release(struct state *state); struct state *state_by_name(const char *name); struct state *state_by_node(const struct device_node *node); -int state_get_name(const struct state *state, char const **name); int state_load_no_auth(struct state *state); int state_load(struct state *state); @@ -24,4 +20,39 @@ void state_info(void); int state_read_mac(struct state *state, const char *name, u8 *buf); +#else /* #if IS_ENABLED(CONFIG_STATE) */ + +static inline struct state *state_new_from_node(struct device_node *node, + bool readonly) +{ + return ERR_PTR(-ENOSYS); +} + +static inline struct state *state_by_name(const char *name) +{ + return NULL; +} + +static inline struct state *state_by_node(const struct device_node *node) +{ + return NULL; +}; + +static inline int state_load(struct state *state) +{ + return -ENOSYS; +} + +static inline int state_save(struct state *state) +{ + return -ENOSYS; +} + +static inline int state_read_mac(struct state *state, const char *name, u8 *buf) +{ + return -ENOSYS; +} + +#endif /* #if IS_ENABLED(CONFIG_STATE) / #else */ + #endif /* __STATE_H */ diff --git a/include/superio.h b/include/superio.h new file mode 100644 index 0000000000..12bff58b6b --- /dev/null +++ b/include/superio.h @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Ahmad Fatoum, Pengutronix + */ + +#ifndef _SUPERIO_H_ +#define _SUPERIO_H_ + +#include <asm/io.h> +#include <linux/bitops.h> +#include <driver.h> +#include <linux/types.h> + +#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ +#define SIO_REG_DEVREV 0x22 /* Device revision */ +#define SIO_REG_MANID 0x23 /* Vendor ID (2 bytes) */ + +static inline u8 superio_inb(u16 base, u8 reg) +{ + outb(reg, base); + return inb(base + 1); +} + +static inline u16 superio_inw(u16 base, u8 reg) +{ + u16 val; + val = superio_inb(base, reg) << 8; + val |= superio_inb(base, reg + 1); + return val; +} + +static inline void superio_outb(u16 base, u8 reg, u8 val) +{ + outb(reg, base); + outb(val, base + 1); +} + +static inline void superio_set_bit(u16 base, u8 reg, unsigned bit) +{ + unsigned long val = superio_inb(base, reg); + __set_bit(bit, &val); + superio_outb(base, reg, val); +} + +static inline void superio_clear_bit(u16 base, u8 reg, unsigned bit) +{ + unsigned long val = superio_inb(base, reg); + __clear_bit(bit, &val); + superio_outb(base, reg, val); +} + +struct superio_chip { + struct device_d *dev; + u16 vid; + u16 devid; + u16 sioaddr; + void (*enter)(u16 sioaddr); + void (*exit)(u16 sioaddr); +}; + +void superio_chip_add(struct superio_chip *chip); +struct device_d *superio_func_add(struct superio_chip *chip, const char *name); + +#endif |