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authorSascha Hauer <s.hauer@pengutronix.de>2009-01-30 11:56:56 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2009-01-30 12:07:23 +0100
commit4d19a68f35fe668372fe0c4e7bac09cc2f168ccb (patch)
treeba949590deea947a6d5785d443b6126ee058bbc4 /include
parent4aae146beeea02c48e6169080aedaa8c6ce5e6b7 (diff)
downloadbarebox-4d19a68f35fe668372fe0c4e7bac09cc2f168ccb.tar.gz
barebox-4d19a68f35fe668372fe0c4e7bac09cc2f168ccb.tar.xz
[MX27] use common PLL defines
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/asm-arm/arch-imx/imx27-regs.h12
1 files changed, 0 insertions, 12 deletions
diff --git a/include/asm-arm/arch-imx/imx27-regs.h b/include/asm-arm/arch-imx/imx27-regs.h
index 6722751594..3af42ae259 100644
--- a/include/asm-arm/arch-imx/imx27-regs.h
+++ b/include/asm-arm/arch-imx/imx27-regs.h
@@ -97,18 +97,6 @@
#define PCCR1 __REG(IMX_PLL_BASE + 0x24) /* Peripheral Clock Control Register 1 */
#define CCSR __REG(IMX_PLL_BASE + 0x28) /* Clock Control Status Register */
-/*
- * This can be used for MPCTL0 and SPCTL0.
- *
- * mfi + mfn / (mfd + 1)
- * fpll = 2 * fref * ---------------------
- * pd + 1
- */
-#define PLL_PCTL_PD(pd) ((pd) << 26)
-#define PLL_PCTL_MFD(mfd) ((mfd) << 16)
-#define PLL_PCTL_MFI(mfi) ((mfi) << 10)
-#define PLL_PCTL_MFN(mfn) ((mfn) << 0)
-
#define CSCR_MPEN (1 << 0)
#define CSCR_SPEN (1 << 1)
#define CSCR_FPM_EN (1 << 2)