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authorSascha Hauer <s.hauer@pengutronix.de>2010-10-07 14:13:10 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2010-10-07 14:13:10 +0200
commit6c4b1b6da0716cc7025e85578e89101a2c065bf5 (patch)
tree519bd2412ecac461080427965cf3abc0ed77a2cd /include
parentf7403928a9ee57ac717e38610dcbb04bb7798734 (diff)
downloadbarebox-6c4b1b6da0716cc7025e85578e89101a2c065bf5.tar.gz
barebox-6c4b1b6da0716cc7025e85578e89101a2c065bf5.tar.xz
Revert "image: rename IH_CPU to IH_ARCH to be more concistant"
This reverts commit aba80a2d2d0f1b25185246925577ce2108247dde. Conflicts: include/image.h Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/image.h56
1 files changed, 28 insertions, 28 deletions
diff --git a/include/image.h b/include/image.h
index c69178c65e..436403acd3 100644
--- a/include/image.h
+++ b/include/image.h
@@ -61,45 +61,45 @@
/*
* CPU Architecture Codes (supported by Linux)
*/
-#define IH_ARCH_INVALID 0 /* Invalid CPU */
-#define IH_ARCH_ALPHA 1 /* Alpha */
-#define IH_ARCH_ARM 2 /* ARM */
-#define IH_ARCH_I386 3 /* Intel x86 */
-#define IH_ARCH_IA64 4 /* IA64 */
-#define IH_ARCH_MIPS 5 /* MIPS */
-#define IH_ARCH_MIPS64 6 /* MIPS 64 Bit */
-#define IH_ARCH_PPC 7 /* PowerPC */
-#define IH_ARCH_S390 8 /* IBM S390 */
-#define IH_ARCH_SH 9 /* SuperH */
-#define IH_ARCH_SPARC 10 /* Sparc */
-#define IH_ARCH_SPARC64 11 /* Sparc 64 Bit */
-#define IH_ARCH_M68K 12 /* M68K */
-#define IH_ARCH_NIOS 13 /* Nios-32 */
-#define IH_ARCH_MICROBLAZE 14 /* MicroBlaze */
-#define IH_ARCH_NIOS2 15 /* Nios-II */
-#define IH_ARCH_BLACKFIN 16 /* Blackfin */
-#define IH_ARCH_AVR32 17 /* AVR32 */
+#define IH_CPU_INVALID 0 /* Invalid CPU */
+#define IH_CPU_ALPHA 1 /* Alpha */
+#define IH_CPU_ARM 2 /* ARM */
+#define IH_CPU_I386 3 /* Intel x86 */
+#define IH_CPU_IA64 4 /* IA64 */
+#define IH_CPU_MIPS 5 /* MIPS */
+#define IH_CPU_MIPS64 6 /* MIPS 64 Bit */
+#define IH_CPU_PPC 7 /* PowerPC */
+#define IH_CPU_S390 8 /* IBM S390 */
+#define IH_CPU_SH 9 /* SuperH */
+#define IH_CPU_SPARC 10 /* Sparc */
+#define IH_CPU_SPARC64 11 /* Sparc 64 Bit */
+#define IH_CPU_M68K 12 /* M68K */
+#define IH_CPU_NIOS 13 /* Nios-32 */
+#define IH_CPU_MICROBLAZE 14 /* MicroBlaze */
+#define IH_CPU_NIOS2 15 /* Nios-II */
+#define IH_CPU_BLACKFIN 16 /* Blackfin */
+#define IH_CPU_AVR32 17 /* AVR32 */
#if defined(__PPC__)
-#define IH_ARCH IH_ARCH_PPC
+#define IH_CPU IH_CPU_PPC
#elif defined(__ARM__)
-#define IH_ARCH IH_ARCH_ARM
+#define IH_CPU IH_CPU_ARM
#elif defined(__I386__) || defined(__x86_64__)
-#define IH_ARCH IH_ARCH_I386
+#define IH_CPU IH_CPU_I386
#elif defined(__mips__)
-#define IH_ARCH IH_ARCH_MIPS
+#define IH_CPU IH_CPU_MIPS
#elif defined(__nios__)
-#define IH_ARCH IH_ARCH_NIOS
+#define IH_CPU IH_CPU_NIOS
#elif defined(__m68k__)
-#define IH_ARCH IH_ARCH_M68K
+#define IH_CPU IH_CPU_M68K
#elif defined(__microblaze__)
-#define IH_ARCH IH_ARCH_MICROBLAZE
+#define IH_CPU IH_CPU_MICROBLAZE
#elif defined(__nios2__)
-#define IH_ARCH IH_ARCH_NIOS2
+#define IH_CPU IH_CPU_NIOS2
#elif defined(__blackfin__)
-#define IH_ARCH IH_ARCH_BLACKFIN
+#define IH_CPU IH_CPU_BLACKFIN
#elif defined(__avr32__)
-#define IH_ARCH IH_ARCH_AVR32
+#define IH_CPU IH_CPU_AVR32
#endif
/*