diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2009-01-30 12:15:36 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-01-30 12:20:10 +0100 |
| commit | b3f3ca075d9825f8a4cfe84146ff593a08e95a4b (patch) | |
| tree | dfc6b8dd59a96529fc0bbeecf786740456bd6c98 /include | |
| parent | 9995a8caf5cbc793c09c3d18feae77362caee3fd (diff) | |
| download | barebox-b3f3ca075d9825f8a4cfe84146ff593a08e95a4b.tar.gz barebox-b3f3ca075d9825f8a4cfe84146ff593a08e95a4b.tar.xz | |
[MX31] Clock Controller module: redefine registers as offsets
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/arch-imx/imx31-regs.h | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/include/asm-arm/arch-imx/imx31-regs.h b/include/asm-arm/arch-imx/imx31-regs.h index 1cda4dc3cc..fb75abeead 100644 --- a/include/asm-arm/arch-imx/imx31-regs.h +++ b/include/asm-arm/arch-imx/imx31-regs.h @@ -35,6 +35,7 @@ #define IMX_WDT_BASE 0x53FDC000 #define IMX_RTC_BASE 0x53FD8000 #define IMX_TIM1_BASE 0x53F90000 +#define IMX_IIM_BASE 0x5001C000 #define IMX_SDRAM_CS0 0x80000000 #define IMX_SDRAM_CS1 0x90000000 @@ -128,17 +129,17 @@ #define WCR_WDE 0x04 /* - * ???????????? + * Clock Controller Module (CCM) */ -#define CCM_BASE 0x53f80000 -#define CCM_CCMR (CCM_BASE + 0x00) -#define CCM_PDR0 (CCM_BASE + 0x04) -#define CCM_PDR1 (CCM_BASE + 0x08) -#define CCM_RCSR (CCM_BASE + 0x0c) -#define CCM_MPCTL (CCM_BASE + 0x10) -#define CCM_UPCTL (CCM_BASE + 0x10) -#define CCM_SPCTL (CCM_BASE + 0x18) -#define CCM_COSR (CCM_BASE + 0x1C) +#define IMX_CCM_BASE 0x53f80000 +#define CCM_CCMR 0x00 +#define CCM_PDR0 0x04 +#define CCM_PDR1 0x08 +#define CCM_RCSR 0x0c +#define CCM_MPCTL 0x10 +#define CCM_UPCTL 0x10 +#define CCM_SPCTL 0x18 +#define CCM_COSR 0x1C /* * ????????????? |