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| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2016-04-25 22:37:01 -0700 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-04-28 07:44:10 +0200 |
| commit | 015ec0a52858e4b1b3c1ecdef4a02cf258fa26d7 (patch) | |
| tree | 9819e9b1885e19b6783e8873434a71126202658a /include | |
| parent | bd55401e972d630338d3326373f8aef9d204faaf (diff) | |
| download | barebox-015ec0a52858e4b1b3c1ecdef4a02cf258fa26d7.tar.gz barebox-015ec0a52858e4b1b3c1ecdef4a02cf258fa26d7.tar.xz | |
PCI: imx6: Add proper i.MX6+ reset sequence
I.MX6+ version of the silicon exposed PCIe core's reset signal as a bit
in one of the control registers. As a result using old, pre-i.MX6+,
reset sequence on i.MX6+ leads to Barebox hanging during startup. Using
exposed reset bit instead solves the problem.
This commit is based on portions of commit
c34068d48273e24d392d9a49a38be807954420ed
in http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
| -rw-r--r-- | include/mfd/imx6q-iomuxc-gpr.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/mfd/imx6q-iomuxc-gpr.h b/include/mfd/imx6q-iomuxc-gpr.h index a7ef1c8915..b2c9da6579 100644 --- a/include/mfd/imx6q-iomuxc-gpr.h +++ b/include/mfd/imx6q-iomuxc-gpr.h @@ -95,6 +95,7 @@ #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_IOMUX BIT(0) #define IMX6Q_GPR1_PCIE_REQ_MASK (0x3 << 30) +#define IMX6Q_GPR1_PCIE_SW_RST BIT(29) #define IMX6Q_GPR1_PCIE_EXIT_L1 BIT(28) #define IMX6Q_GPR1_PCIE_RDY_L23 BIT(27) #define IMX6Q_GPR1_PCIE_ENTER_L1 BIT(26) |