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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-02-04 19:09:15 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-02-04 19:09:15 +0100 |
commit | 1b95290433eca0f8190da377547df0743099ec84 (patch) | |
tree | 5fff5891227bdedea01fefb14f8a87e6148d18b2 /include | |
parent | 37052f6c9b66c0516c2af00b0b7bc615db6b6320 (diff) | |
parent | 39f8919efb3c985398365bcc087ff8d0894396b7 (diff) | |
download | barebox-1b95290433eca0f8190da377547df0743099ec84.tar.gz barebox-1b95290433eca0f8190da377547df0743099ec84.tar.xz |
Merge branch 'for-next/pxa'
Diffstat (limited to 'include')
-rw-r--r-- | include/net/smc91111.h | 4 | ||||
-rw-r--r-- | include/platform_data/mtd-nand-mrvl.h | 79 |
2 files changed, 83 insertions, 0 deletions
diff --git a/include/net/smc91111.h b/include/net/smc91111.h index 0b2d49bb19..ba9da0b8dd 100644 --- a/include/net/smc91111.h +++ b/include/net/smc91111.h @@ -9,6 +9,10 @@ struct smc91c111_pdata { int qemu_fixup; + int addr_shift; + int bus_width; + int config_setup; + int control_setup; }; #endif /* __SMC91111_H__ */ diff --git a/include/platform_data/mtd-nand-mrvl.h b/include/platform_data/mtd-nand-mrvl.h new file mode 100644 index 0000000000..c8ef6a1eea --- /dev/null +++ b/include/platform_data/mtd-nand-mrvl.h @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2014 Robert Jarzmik + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Taken from linux kernel mostly. + */ +#ifndef __MRVL_NAND_H +#define __MRVL_NAND_H + +struct mrvl_nand_timing { + uint16_t id; /* NAND id code (READID) */ + unsigned int tCH; /* Enable signal hold time */ + unsigned int tCS; /* Enable signal setup time */ + unsigned int tWH; /* ND_nWE high duration */ + unsigned int tWP; /* ND_nWE pulse time */ + unsigned int tRH; /* ND_nRE high duration */ + unsigned int tRP; /* ND_nRE pulse width */ + unsigned int tR; /* ND_nWE high to ND_nRE low for read */ + unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */ + unsigned int tAR; /* ND_ALE low to ND_nRE low delay */ +}; + +struct mrvl_nand_flash { + char *name; + uint32_t chip_id; + unsigned int page_per_block; /* Pages per block (PG_PER_BLK) */ + unsigned int page_size; /* Page size in bytes (PAGE_SZ) */ + unsigned int flash_width; /* Flash memory width (DWIDTH_M) */ + unsigned int dfc_width; /* Flash controller width (DWIDTH_C) */ + unsigned int num_blocks; /* Number of physical blocks in Flash */ + + struct mrvl_nand_timing *timing; /* NAND Flash timing */ +}; + +/* + * Current pxa3xx_nand controller has two chip select which + * both be workable. + * + * Notice should be taken that: + * When you want to use this feature, you should not enable the + * keep configuration feature, for two chip select could be + * attached with different nand chip. The different page size + * and timing requirement make the keep configuration impossible. + */ + +/* The max num of chip select current support */ +#define NUM_CHIP_SELECT (2) +struct mrvl_nand_platform_data { + /* the data flash bus is shared between the Static Memory + * Controller and the Data Flash Controller, the arbiter + * controls the ownership of the bus + */ + int dwidth_c; + int dwidth_m; + + /* allow platform code to keep OBM/bootloader defined NFC config */ + int keep_config; + + /* indicate how many chip selects will be used */ + int num_cs; + + /* use an flash-based bad block table */ + bool flash_bbt; + + /* requested ECC strength and ECC step size */ + int ecc_strength, ecc_step_size; + + const struct mtd_partition *parts[NUM_CHIP_SELECT]; + unsigned int nr_parts[NUM_CHIP_SELECT]; + + const struct mrvl_nand_flash *flash; + size_t num_flash; +}; + +extern void mrvl_set_nand_info(struct mrvl_nand_platform_data *info); +#endif /* __MRVL_NAND_H */ |