summaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorAlexander Kurz <akurz@blala.de>2016-07-27 16:42:04 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-08-03 07:30:41 +0200
commit28a0baffb9e70ed6abf5f1123278f7dfed2ed481 (patch)
tree11874c9b5201a4c5fcd34e4ae71483a333c159d1 /include
parent0c619050256735ebe48f1376e320b26b716d64a3 (diff)
downloadbarebox-28a0baffb9e70ed6abf5f1123278f7dfed2ed481.tar.gz
barebox-28a0baffb9e70ed6abf5f1123278f7dfed2ed481.tar.xz
ARM i.MX31: add SPI support
The i.MX31 SPI interface was refered by freescale as spi_ver_0_4 in one of their older vendor extended linux releases. spi_ver_0_4 differs only in minor aspects to spi_ver_0_7 (i.MX35) which is already supported by barebox. Regarding barebox, the differences boil down to the location and length of the CHIP SELECT and BIT COUNT/BURST LENGTH elements of CONREG. The spi_ver_0_4 variant is limited to single word bursts with a maximum of 32 bits_per_word. Add support for the i.MX31 SPI interface to the barebox spi_ver_0_7 implementation. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/spi/imx-spi.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/spi/imx-spi.h b/include/spi/imx-spi.h
index 221c66502f..a592573e62 100644
--- a/include/spi/imx-spi.h
+++ b/include/spi/imx-spi.h
@@ -40,6 +40,12 @@
#define CSPI_0_0_RESET_START (1 << 0)
+#define CSPI_0_4_CTRL 0x08
+#define CSPI_0_4_CTRL_BL_SHIFT 8
+#define CSPI_0_4_CTRL_BL_MASK 0x1f
+#define CSPI_0_4_CTRL_DRCTL_SHIFT 20
+#define CSPI_0_4_CTRL_CS_SHIFT 24
+
#define CSPI_0_7_RXDATA 0x00
#define CSPI_0_7_TXDATA 0x04
#define CSPI_0_7_CTRL 0x08
@@ -50,6 +56,7 @@
#define CSPI_0_7_CTRL_PHA (1 << 5)
#define CSPI_0_7_CTRL_SSCTL (1 << 6)
#define CSPI_0_7_CTRL_SSPOL (1 << 7)
+#define CSPI_0_7_CTRL_DRCTL_SHIFT 8
#define CSPI_0_7_CTRL_CS_SHIFT 12
#define CSPI_0_7_CTRL_DR_SHIFT 16
#define CSPI_0_7_CTRL_BL_SHIFT 20