ddr: imx8m: clean up entry points

The DDRC address in the memory map and the TF-A parameter store address
is the same for all i.MX8M* SoCs. The only difference (for now) is in the
power up sequence. Add a enum for the DDRC type, so we can take different
code paths in imx8m_ddr_init() depending on the SoC.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 7 insertions, 0 deletions

diff --git a/include/soc/imx8m/ddr.h b/include/soc/imx8m/ddr.h
index 5b2747ed1f..1408ffcfb5 100644
--- a/include/soc/imx8m/ddr.h
+++ b/include/soc/imx8m/ddr.h
@@ -363,8 +363,15 @@ struct dram_timing_info {
 
 extern struct dram_timing_info dram_timing;
 
+enum ddrc_type {
+	DDRC_TYPE_MM,
+	DDRC_TYPE_MQ,
+	DDRC_TYPE_MP,
+};
+
 int imx8mm_ddr_init(struct dram_timing_info *timing_info);
 int imx8mq_ddr_init(struct dram_timing_info *timing_info);
+int imx8mp_ddr_init(struct dram_timing_info *timing_info);
 int ddr_cfg_phy(struct dram_timing_info *timing_info);
 void load_lpddr4_phy_pie(void);
 void ddrphy_trained_csr_save(struct dram_cfg_param *param, unsigned int num);