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authorLucas Stach <l.stach@pengutronix.de>2020-11-05 15:10:15 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-11-09 11:23:12 +0100
commitcca126664350433891bf63c33db26ef9f0014ea1 (patch)
tree097d863da201f55a8df7e3f7ba52a8fab77ac3d8 /include
parent61682b59363fca0fbf51d37ece46ec6d47ea35d4 (diff)
downloadbarebox-cca126664350433891bf63c33db26ef9f0014ea1.tar.gz
barebox-cca126664350433891bf63c33db26ef9f0014ea1.tar.xz
ddr: imx8m: add workaround for DDRPHY rank to rank issue
This is a port of upstream U-Boot commit b335966958a9. Sadly there is no more information to be found about the issue. The currently available errata documents don't mention this issue at all and the U-Boot commit doesn't tell much either, however this commit has been pointed out by NXP engineers as a solution to reports of board instabilities. | drivers: ddr: imx Workaround for i.MX8M DDRPHY rank to rank issue | | Add logic to automatically update umctl2's setting based | on phy training CDD value for rank to rank space issue | | Acked-by: Ye Li <ye.li@nxp.com> | Signed-off-by: Oliver Chen <Oliver.Chen@nxp.com> | Signed-off-by: Jacky Bai <ping.bai@nxp.com> | Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Sascha Hauer <s.hauer@pengutronix.de> (on i.MX8MP) Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/soc/imx8m/ddr.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/soc/imx8m/ddr.h b/include/soc/imx8m/ddr.h
index 1408ffcfb5..a5a6109092 100644
--- a/include/soc/imx8m/ddr.h
+++ b/include/soc/imx8m/ddr.h
@@ -382,6 +382,10 @@ int wait_ddrphy_training_complete(void);
void ddrphy_init_set_dfi_clk(unsigned int drate);
void ddrphy_init_read_msg_block(enum fw_type type);
+void update_umctl2_rank_space_setting(unsigned int pstat_num,
+ enum ddrc_type type);
+void get_trained_CDD(unsigned int fsp);
+
#define reg32_write(a, v) writel(v, a)
#define reg32_read(a) readl(a)