Merge branch 'for-next/stm32'

4 files changed, 147 insertions, 4 deletions

diff --git a/include/asm-generic/bitsperlong.h b/include/asm-generic/bitsperlong.h
index 836a1d4c83..20c055c6bd 100644
--- a/include/asm-generic/bitsperlong.h
+++ b/include/asm-generic/bitsperlong.h
@@ -9,4 +9,8 @@
 #define BITS_PER_LONG 32
 #endif /* CONFIG_64BIT */
 
+#ifndef BITS_PER_LONG_LONG
+#define BITS_PER_LONG_LONG 64
+#endif
+
 #endif /* __ASM_GENERIC_BITS_PER_LONG */
diff --git a/include/linux/clk.h b/include/linux/clk.h
index ffc1ac8489..9bee204652 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -13,6 +13,7 @@
 #include <linux/err.h>
 #include <linux/spinlock.h>
 #include <linux/stringify.h>
+#include <xfuncs.h>
 
 struct device_d;
 
@@ -449,6 +450,10 @@ struct clk *clk_register_fixed_rate(const char *name,
 				    const char *parent_name, unsigned long flags,
 				    unsigned long fixed_rate);
 
+struct clk_hw *clk_hw_register_fixed_rate(struct device_d *dev, const char *name,
+				    const char *parent_name, unsigned long flags,
+				    unsigned long rate);
+
 static inline struct clk *clk_fixed(const char *name, int rate)
 {
 	return clk_register_fixed_rate(name, NULL, 0, rate);
@@ -519,6 +524,17 @@ struct clk *clk_register_divider_table(struct device_d *dev, const char *name,
 		u8 clk_divider_flags, const struct clk_div_table *table,
 		spinlock_t *lock);
 
+struct clk_hw *clk_hw_register_divider_table(struct device_d *dev, const char *name,
+		const char *parent_name, unsigned long flags,
+		void __iomem *reg, u8 shift, u8 width,
+		u8 clk_divider_flags, const struct clk_div_table *table,
+		spinlock_t *lock);
+
+struct clk_hw *clk_hw_register_divider(struct device_d *dev, const char *name,
+		const char *parent_name, unsigned long flags,
+		void __iomem *reg, u8 shift, u8 width,
+		u8 clk_divider_flags, spinlock_t *lock);
+
 struct clk_fixed_factor {
 	struct clk_hw hw;
 	int mult;
@@ -540,6 +556,10 @@ struct clk *clk_register_fixed_factor(struct device_d *dev, const char *name,
 		const char *parent_name, unsigned long flags,
 		unsigned int mult, unsigned int div);
 
+struct clk_hw *clk_hw_register_fixed_factor(struct device_d *dev,
+		const char *name, const char *parent_name, unsigned long flags,
+		unsigned int mult, unsigned int div);
+
 /**
  * struct clk_fractional_divider - adjustable fractional divider clock
  *
@@ -600,6 +620,7 @@ struct clk_mux {
 	int shift;
 	int width;
 	unsigned flags;
+	u32 *table;
 	spinlock_t *lock;
 };
 
@@ -622,6 +643,35 @@ struct clk *clk_register_mux(struct device_d *dev, const char *name,
 		void __iomem *reg, u8 shift, u8 width,
 		u8 clk_mux_flags, spinlock_t *lock);
 
+struct clk_hw *__clk_hw_register_mux(struct device_d *dev,
+		const char *name, u8 num_parents,
+		const char * const *parent_names,
+		unsigned long flags, void __iomem *reg, u8 shift, u32 mask,
+		u8 clk_mux_flags, u32 *table, spinlock_t *lock);
+
+#define clk_hw_register_mux(dev, name, parent_names,                  \
+		num_parents, flags, reg, shift, mask,                 \
+		clk_mux_flags, lock)                                  \
+	__clk_hw_register_mux((dev), (name), (num_parents),           \
+				     (parent_names),                  \
+				     (flags), (reg), (shift), (mask), \
+				     (clk_mux_flags), NULL, (lock))
+
+#define clk_hw_register_mux_table(dev, name, parent_names, num_parents,	  \
+				  flags, reg, shift, mask, clk_mux_flags, \
+				  table, lock)				  \
+	__clk_hw_register_mux((dev), (name), (num_parents),	          \
+			      (parent_names), (flags), (reg),             \
+			      (shift), (mask), (clk_mux_flags), (table),  \
+			      (lock))
+
+int clk_mux_val_to_index(struct clk_hw *hw, u32 *table, unsigned int flags,
+			 unsigned int val);
+unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index);
+
+long clk_mux_round_rate(struct clk_hw *hw, unsigned long rate,
+			unsigned long *prate);
+
 struct clk_gate {
 	struct clk_hw hw;
 	void __iomem *reg;
@@ -652,6 +702,16 @@ struct clk *clk_register_gate(struct device_d *dev, const char *name,
 		void __iomem *reg, u8 bit_idx,
 		u8 clk_gate_flags, spinlock_t *lock);
 
+static inline struct clk_hw *clk_hw_register_gate(struct device_d *dev,
+		const char *name, const char *parent_name,
+		unsigned long flags, void __iomem *reg, u8 bit_idx,
+		u8 clk_gate_flags, spinlock_t *lock)
+{
+	return clk_to_clk_hw(clk_register_gate(dev, xstrdup(name), xstrdup(parent_name),
+					       flags, reg, bit_idx,
+					       clk_gate_flags, lock));
+}
+
 int clk_is_enabled(struct clk *clk);
 int clk_hw_is_enabled(struct clk_hw *hw);
 
@@ -664,6 +724,11 @@ int clk_parent_set_rate(struct clk_hw *hw, unsigned long rate,
 int bclk_register(struct clk *clk);
 struct clk *clk_register(struct device_d *dev, struct clk_hw *hw);
 
+static inline int clk_hw_register(struct device_d *dev, struct clk_hw *hw)
+{
+	return PTR_ERR_OR_ZERO(clk_register(dev, hw));
+}
+
 struct clk *clk_lookup(const char *name);
 
 void clk_dump(int verbose);
@@ -676,11 +741,29 @@ struct clk *clk_register_composite(const char *name,
 			struct clk *gate_clk,
 			unsigned long flags);
 
+struct clk_hw *clk_hw_register_composite(struct device_d *dev,
+		const char *name, const char * const *parent_names,
+		int num_parents,
+		struct clk_hw *mux_hw, const struct clk_ops *mux_ops,
+		struct clk_hw *rate_hw, const struct clk_ops *rate_ops,
+		struct clk_hw *gate_hw, const struct clk_ops *gate_ops,
+		unsigned long flags);
+
 static inline const char *clk_hw_get_name(struct clk_hw *hw)
 {
 	return hw->clk.name;
 }
 
+static inline unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
+{
+	return hw->clk.num_parents;
+}
+
+static inline unsigned long clk_hw_get_flags(const struct clk_hw *hw)
+{
+	return hw->clk.flags;
+}
+
 int clk_name_set_parent(const char *clkname, const char *clkparentname);
 int clk_name_set_rate(const char *clkname, unsigned long rate);
 
@@ -721,10 +804,10 @@ int of_clk_add_provider(struct device_node *np,
 						   void *data),
 			void *data);
 
-static inline unsigned int clk_hw_get_num_parents(const struct clk_hw *hw)
-{
-	return hw->clk.num_parents;
-}
+int of_clk_add_hw_provider(struct device_node *np,
+			struct clk_hw *(*clk_hw_src_get)(struct of_phandle_args *clkspec,
+							 void *data),
+			void *data);
 
 #else
 
@@ -773,6 +856,14 @@ static inline int of_clk_add_provider(struct device_node *np,
 {
 	return 0;
 }
+
+static inline int of_clk_add_hw_provider(struct device_node *np,
+			struct clk_hw *(*clk_hw_src_get)(struct of_phandle_args *clkspec,
+							 void *data),
+			void *data)
+{
+	return 0;
+}
 #endif
 
 #define CLK_OF_DECLARE_DRIVER(name, compat, fn) CLK_OF_DECLARE(name, compat, fn)
diff --git a/include/linux/reset/reset-simple.h b/include/linux/reset/reset-simple.h
new file mode 100644
index 0000000000..cb38a4b597
--- /dev/null
+++ b/include/linux/reset/reset-simple.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Simple Reset Controller ops
+ *
+ * Based on Allwinner SoCs Reset Controller driver
+ *
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard <maxime.ripard@free-electrons.com>
+ */
+
+#ifndef __RESET_SIMPLE_H__
+#define __RESET_SIMPLE_H__
+
+#include <io.h>
+#include <linux/reset-controller.h>
+
+/**
+ * struct reset_simple_data - driver data for simple reset controllers
+ * @membase: memory mapped I/O register range
+ * @rcdev: reset controller device base structure
+ * @active_low: if true, bits are cleared to assert the reset. Otherwise, bits
+ *              are set to assert the reset. Note that this says nothing about
+ *              the voltage level of the actual reset line.
+ * @status_active_low: if true, bits read back as cleared while the reset is
+ *                     asserted. Otherwise, bits read back as set while the
+ *                     reset is asserted.
+ * @reset_us: Minimum delay in microseconds needed that needs to be
+ *            waited for between an assert and a deassert to reset the
+ *            device. If multiple consumers with different delay
+ *            requirements are connected to this controller, it must
+ *            be the largest minimum delay. 0 means that such a delay is
+ *            unknown and the reset operation is unsupported.
+ */
+struct reset_simple_data {
+	void __iomem			*membase;
+	struct reset_controller_dev	rcdev;
+	bool				active_low;
+	bool				status_active_low;
+	unsigned int			reset_us;
+};
+
+extern const struct reset_control_ops reset_simple_ops;
+
+#endif /* __RESET_SIMPLE_H__ */
diff --git a/include/linux/string.h b/include/linux/string.h
index 3da174116a..ae5e5bca8d 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -5,6 +5,7 @@
 
 #include <linux/types.h>	/* for size_t */
 #include <linux/stddef.h>	/* for NULL */
+#include <linux/overflow.h>	/* for array_size */
 
 #ifdef __cplusplus
 extern "C" {
@@ -133,6 +134,8 @@ static inline const char *kbasename(const char *path)
 
 void *memdup(const void *, size_t);
 
+#define memdup_array(arr, count) memdup(arr, array_size(count, sizeof(*arr)));
+
 static inline void *kmemdup(const void *src, size_t len, gfp_t gfp)
 {
 	return memdup(src, len);