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authorLadislav Michl <ladis@linux-mips.org>2018-10-28 22:27:02 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2018-12-17 10:41:29 +0100
commit7a62820664944b42b0cdea6bf06d5df2910ca7aa (patch)
tree46f5a74a9db5a21def2eed1751081d6e8abc5f1e /include
parent95ce69795506293eae28d6e64055d2c7ae27f164 (diff)
downloadbarebox-7a62820664944b42b0cdea6bf06d5df2910ca7aa.tar.gz
barebox-7a62820664944b42b0cdea6bf06d5df2910ca7aa.tar.xz
mtd: nand: Kill cellinfo
The only information used from cellinfo field is whenever flash is SLC or MLC, therefore eliminate it completely. This patch is based on Linux commit 7db906b79f69. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r--include/linux/mtd/nand.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index e1c7837a8b..c3eb16f906 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -203,6 +203,7 @@ typedef enum {
/* Cell info constants */
#define NAND_CI_CHIPNR_MSK 0x03
#define NAND_CI_CELLTYPE_MSK 0x0C
+#define NAND_CI_CELLTYPE_SHIFT 2
/* Keep gcc happy */
struct nand_chip;
@@ -439,7 +440,6 @@ struct nand_buffers {
* bad block marker position; i.e., BBM == 11110111b is
* not bad when badblockbits == 7
* @bits_per_cell: [INTERN] number of bits per cell. i.e., 1 means SLC.
- * @cellinfo: [INTERN] MLC/multichip data from chip ident
* @numchips: [INTERN] number of physical chips
* @chipsize: [INTERN] the size of one chip for multichip arrays
* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
@@ -515,7 +515,6 @@ struct nand_chip {
unsigned int pagebuf_bitflips;
int subpagesize;
uint8_t bits_per_cell;
- uint8_t cellinfo;
int badblockpos;
int badblockbits;