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author | Andrey Panov <rockford@yandex.ru> | 2015-03-04 23:11:32 +0300 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-03-05 09:11:34 +0100 |
commit | 7baf7df9fd46fa3a3439a50f49de2ccdc48e2239 (patch) | |
tree | 455c6a9189ec5137b985d12c7b03da7c56e52b89 /include | |
parent | 22a0c31c926500af71643b474aab85e0dead5a9f (diff) | |
download | barebox-7baf7df9fd46fa3a3439a50f49de2ccdc48e2239.tar.gz barebox-7baf7df9fd46fa3a3439a50f49de2ccdc48e2239.tar.xz |
CLK: clk-mux: Respect CLK_MUX_HIWORD_MASK flag
It is required for Rockchip SoCs where clock settings registers have
write-enable mask in high word.
Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/clk.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/clk.h b/include/linux/clk.h index de2d4a5d8a..89cb44ec2c 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -248,6 +248,8 @@ struct clk_divider { int table_size; }; +#define CLK_MUX_HIWORD_MASK (1 << 2) + extern struct clk_ops clk_divider_ops; struct clk *clk_divider(const char *name, const char *parent, |