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author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-03-07 14:23:37 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-03-07 14:23:37 +0100 |
commit | 8f397a4b163f6ee149837f0ab0dfd4081a720010 (patch) | |
tree | dd8f34d7eb3dace62842e575b7b3a306f9b204b8 /include | |
parent | ce9cbae133c84c147bc6823f07c0b55bf4012837 (diff) | |
parent | 9fd32f5a4e8d25fb8985fec86bc03f3743820f0e (diff) | |
download | barebox-8f397a4b163f6ee149837f0ab0dfd4081a720010.tar.gz barebox-8f397a4b163f6ee149837f0ab0dfd4081a720010.tar.xz |
Merge branch 'for-next/rpi'
Diffstat (limited to 'include')
-rw-r--r-- | include/debug_ll/ns16550.h | 56 | ||||
-rw-r--r-- | include/debug_ll/pl011.h | 25 |
2 files changed, 81 insertions, 0 deletions
diff --git a/include/debug_ll/ns16550.h b/include/debug_ll/ns16550.h new file mode 100644 index 0000000000..7e4dbeb453 --- /dev/null +++ b/include/debug_ll/ns16550.h @@ -0,0 +1,56 @@ +#ifndef __DEBUG_LL_NS16550_H +#define __DEBUG_LL_NS16550_H + +/* + * Early debugging functions for the NS16550 + * This file needs register access functions declared as: + * + * uint8_t debug_ll_read_reg(int reg); + * void debug_ll_write_reg(int reg, uint8_t val); + */ +#define NS16550_THR 0x0 +#define NS16550_RBR 0x0 +#define NS16550_DLL 0x0 +#define NS16550_IER 0x1 +#define NS16550_DLM 0x1 +#define NS16550_FCR 0x2 +#define NS16550_LCR 0x3 +#define NS16550_MCR 0x4 +#define NS16550_LSR 0x5 + +#define NS16550_LCR_VAL 0x3 /* 8 data, 1 stop, no parity */ +#define NS16550_MCR_VAL 0x3 /* RTS/DTR */ +#define NS16550_FCR_VAL 0x7 /* Clear & enable FIFOs */ + +#define NS16550_LSR_DR 0x01 /* UART received data present */ +#define NS16550_LSR_THRE 0x20 /* Xmit holding register empty */ + +#define NS16550_LCR_BKSE 0x80 /* Bank select enable */ + +static inline void PUTC_LL(char ch) +{ + while (!(debug_ll_read_reg(NS16550_LSR) & NS16550_LSR_THRE)) + ; + + debug_ll_write_reg(NS16550_THR, ch); +} + +static inline uint16_t debug_ll_ns16550_calc_divisor(unsigned long clk) +{ + return clk / (115200 * 16); +} + +static inline void debug_ll_ns16550_init(uint16_t divisor) +{ + debug_ll_write_reg(NS16550_LCR, 0x0); /* select ier reg */ + debug_ll_write_reg(0x00, NS16550_IER); + + debug_ll_write_reg(NS16550_LCR, NS16550_LCR_BKSE); + debug_ll_write_reg(NS16550_DLL, divisor & 0xff); + debug_ll_write_reg(NS16550_DLM, (divisor >> 8) & 0xff); + debug_ll_write_reg(NS16550_LCR, NS16550_LCR_VAL); + debug_ll_write_reg(NS16550_MCR, NS16550_MCR_VAL); + debug_ll_write_reg(NS16550_FCR, NS16550_FCR_VAL); +} + +#endif diff --git a/include/debug_ll/pl011.h b/include/debug_ll/pl011.h new file mode 100644 index 0000000000..db015a373b --- /dev/null +++ b/include/debug_ll/pl011.h @@ -0,0 +1,25 @@ +#ifndef __INCLUDE_ARM_ASM_DEBUG_LL_PL011_H__ +#define __INCLUDE_ARM_ASM_DEBUG_LL_PL011_H__ + +#ifndef DEBUG_LL_UART_ADDR +#error DEBUG_LL_UART_ADDR is undefined! +#endif + +#include <io.h> +#include <linux/amba/serial.h> + +static inline void PUTC_LL(char c) +{ + /* Wait until there is space in the FIFO */ + while (readl(DEBUG_LL_UART_ADDR + UART01x_FR) & UART01x_FR_TXFF) + ; + + /* Send the character */ + writel(c, DEBUG_LL_UART_ADDR + UART01x_DR); + + /* Wait to make sure it hits the line, in case we die too soon. */ + while (readl(DEBUG_LL_UART_ADDR + UART01x_FR) & UART01x_FR_TXFF) + ; +} + +#endif /* __INCLUDE_ARM_ASM_DEBUG_LL_PL011_H__ */ |