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author | Clement Leger <cleger@kalray.eu> | 2019-09-23 13:36:34 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-12-09 10:32:17 +0100 |
commit | df5a46f13c18d933c2bef094343a6021941586ee (patch) | |
tree | 46ffd3ebfe31319c173d4db5c66e9e5b10cfa5eb /include | |
parent | 41c70383948246d0436d3494eb8b952916f2e6c7 (diff) | |
download | barebox-df5a46f13c18d933c2bef094343a6021941586ee.tar.gz barebox-df5a46f13c18d933c2bef094343a6021941586ee.tar.xz |
mtd: spi-nor: fix wrong value for CR_QUAD_EN_SPAN
Durign a previous patch, 0x2 was mistakenly converted to BIT(2) whereas
it should be BIT(1).
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/mtd/spi-nor.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 105f381ada..1c6f442866 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -116,7 +116,7 @@ #define FSR_READY BIT(7) /* Configuration Register bits. */ -#define CR_QUAD_EN_SPAN BIT(2) /* Spansion Quad I/O */ +#define CR_QUAD_EN_SPAN BIT(1) /* Spansion Quad I/O */ /* Supported SPI protocols */ #define SNOR_PROTO_INST_MASK GENMASK(23, 16) |