summaryrefslogtreecommitdiffstats
path: root/net/eth.c
diff options
context:
space:
mode:
authorJon Loeliger <jdl@freescale.com>2005-07-25 14:05:07 -0500
committerJon Loeliger <jdl@freescale.com>2005-07-25 14:05:07 -0500
commitd9b94f28a442b0013caef99de084d7b72e2d4607 (patch)
tree1b293a551e021a4a696717231ec03206d9f172de /net/eth.c
parent288693abe1f7c23e69479fd85c2c0d8d7fdbf8f2 (diff)
downloadbarebox-d9b94f28a442b0013caef99de084d7b72e2d4607.tar.gz
barebox-d9b94f28a442b0013caef99de084d7b72e2d4607.tar.xz
* Patch by Jon Loeliger, 2005-05-05
Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
Diffstat (limited to 'net/eth.c')
-rw-r--r--net/eth.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/net/eth.c b/net/eth.c
index 29c24c8827..e7e11f9d6c 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -52,7 +52,7 @@ extern int rtl8139_initialize(bd_t*);
extern int rtl8169_initialize(bd_t*);
extern int scc_initialize(bd_t*);
extern int skge_initialize(bd_t*);
-extern int tsec_initialize(bd_t*, int);
+extern int tsec_initialize(bd_t*, int, char *);
static struct eth_device *eth_devices, *eth_current;
@@ -155,13 +155,20 @@ int eth_initialize(bd_t *bis)
skge_initialize(bis);
#endif
#if defined(CONFIG_MPC85XX_TSEC1)
- tsec_initialize(bis, 0);
+ tsec_initialize(bis, 0, CONFIG_MPC85XX_TSEC1_NAME);
#endif
#if defined(CONFIG_MPC85XX_TSEC2)
- tsec_initialize(bis, 1);
+ tsec_initialize(bis, 1, CONFIG_MPC85XX_TSEC2_NAME);
#endif
#if defined(CONFIG_MPC85XX_FEC)
- tsec_initialize(bis, 2);
+ tsec_initialize(bis, 2, CONFIG_MPC85XX_FEC_NAME);
+#else
+# if defined(CONFIG_MPC85XX_TSEC3)
+ tsec_initialize(bis, 2, CONFIG_MPC85XX_TSEC3_NAME);
+# endif
+# if defined(CONFIG_MPC85XX_TSEC4)
+ tsec_initialize(bis, 3, CONFIG_MPC85XX_TSEC4_NAME);
+# endif
#endif
#if defined(CONFIG_AU1X00)
au1x00_enet_initialize(bis);