diff options
| -rw-r--r-- | arch/arm/mach-imx/Makefile | 7 | ||||
| -rw-r--r-- | board/phycore_imx31/phycore_imx31.c | 71 | ||||
| -rw-r--r-- | include/asm-arm/arch-imx/imx31-regs.h | 18 |
3 files changed, 78 insertions, 18 deletions
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 405c757ce1..4d0951a44e 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -1,7 +1,6 @@ obj-y += clocksource.o -obj-$(CONFIG_ARCH_IMX1) += speed-imx1.o -obj-$(CONFIG_ARCH_IMX27) += speed-imx27.o -obj-$(CONFIG_ARCH_IMX31) += speed-imx31.o +obj-$(CONFIG_ARCH_IMX1) += speed-imx1.o gpio.o +obj-$(CONFIG_ARCH_IMX27) += speed-imx27.o gpio.o +obj-$(CONFIG_ARCH_IMX31) += speed-imx31.o gpio-imx31.o obj-y += speed.o -obj-y += gpio.o diff --git a/board/phycore_imx31/phycore_imx31.c b/board/phycore_imx31/phycore_imx31.c index ff1958fab8..e8171cc6e2 100644 --- a/board/phycore_imx31/phycore_imx31.c +++ b/board/phycore_imx31/phycore_imx31.c @@ -28,6 +28,55 @@ #include <asm/arch/gpio.h> #include <asm/io.h> +/* + * ?MiB NOR type flash, connected to CS line 0, + * data width is <friesel> + */ +static struct device_d cfi_dev = { + .name = "cfi_flash", + .id = "nor0", + + .map_base = 0x10000000, /* FIXME */ + .size = 16 * 1024 * 1024, /* FIXME */ +}; + +/* + * ?kiB static RAM type memory, connected to CS4, + * data width is <friesel> + */ +static struct device_d sram_dev = { + .name = "sram", + .id = "sram0", + + .map_base = 0x10000000, /* FIXME */ + .size = 16 * 1024 * 1024, /* FIXME */ +}; + +/* + * ?MiB NAND type flash + */ +static struct device_d nand_dev = { + .name = "cfi_flash_nand", + .id = "nand0", + + .map_base = 0x10000000, /* FIXME */ + .size = 16 * 1024 * 1024, /* FIXME */ +}; + +/* + * SMSC 91xx network controller + * connected to CS line 1 and interrupt line <blub>, + * data width is <friesel> + */ +static struct device_d network_dev = { + .name = "smsc9xxx", + .id = "eth0", +#if 0 + .map_base = 0x10000000, /* FIXME */ + .size = 16 * 1024 * 1024, /* FIXME */ +#endif +}; + static struct device_d sdram_dev = { .name = "ram", .id = "ram0", @@ -52,16 +101,18 @@ static int imx31_devices_init(void) __REG(CSCR_L(4)) = 0x22252521; __REG(CSCR_A(4)) = 0x22220a00; - /* setup pins for UART1 */ - imx_gpio_mode(MUX_RXD1_UART1_RXD_MUX); - imx_gpio_mode(MUX_TXD1_UART1_TXD_MUX); - imx_gpio_mode(MUX_RTS1_UART1_RTS_B); - imx_gpio_mode(MUX_RTS1_UART1_CTS_B); - /* setup pins for I2C2 (for EEPROM, RTC) */ imx_gpio_mode(MUX_CSPI2_MOSI_I2C2_SCL); imx_gpio_mode(MUX_CSPI2_MISO_I2C2_SCL); +#if 0 + register_device(&cfi_dev); + register_device(&sram_dev); + register_device(&cfi_dev); + register_device(&network_dev); +#endif + register_device(&sdram_dev); + return 0; } @@ -71,15 +122,17 @@ static struct device_d imx31_serial_device = { .name = "imx_serial", .id = "cs0", .map_base = IMX_UART1_BASE, - .size = 4096, + .size = 16 * 1024, .type = DEVICE_TYPE_CONSOLE, }; static int imx31_console_init(void) { /* init gpios for serial port */ - imx_gpio_mode(PC11_PF_UART1_TXD); - imx_gpio_mode(PC12_PF_UART1_RXD); + imx_gpio_mode(MUX_RXD1_UART1_RXD_MUX); + imx_gpio_mode(MUX_TXD1_UART1_TXD_MUX); + imx_gpio_mode(MUX_RTS1_UART1_RTS_B); + imx_gpio_mode(MUX_RTS1_UART1_CTS_B); register_device(&imx31_serial_device); return 0; diff --git a/include/asm-arm/arch-imx/imx31-regs.h b/include/asm-arm/arch-imx/imx31-regs.h index a9de7faf08..edfc26fc2e 100644 --- a/include/asm-arm/arch-imx/imx31-regs.h +++ b/include/asm-arm/arch-imx/imx31-regs.h @@ -30,19 +30,24 @@ # error "Please do not include directly. Use imx-regs.h instead." #endif +#define IMX_UART1_BASE 0x43F90000 +#define IMX_UART2_BASE 0x43F94000 +#define IMX_WDT_BASE 0x53FDC000 +#define IMX_RTC_BASE 0x53FD8000 +#define IMX_TIM1_BASE 0x53F90000 + +#if 0 #define IMX_IO_BASE 0x00200000 /* * Register BASEs, based on OFFSETs */ #define IMX_AIPI1_BASE (0x00000 + IMX_IO_BASE) -#define IMX_WDT_BASE (0x01000 + IMX_IO_BASE) -#define IMX_TIM1_BASE (0x02000 + IMX_IO_BASE) +#define (0x01000 + IMX_IO_BASE) + (0x02000 + IMX_IO_BASE) #define IMX_TIM2_BASE (0x03000 + IMX_IO_BASE) -#define IMX_RTC_BASE (0x04000 + IMX_IO_BASE) + (0x04000 + IMX_IO_BASE) #define IMX_LCDC_BASE (0x05000 + IMX_IO_BASE) -#define IMX_UART1_BASE (0x06000 + IMX_IO_BASE) -#define IMX_UART2_BASE (0x07000 + IMX_IO_BASE) #define IMX_PWM_BASE (0x08000 + IMX_IO_BASE) #define IMX_DMAC_BASE (0x09000 + IMX_IO_BASE) #define IMX_AIPI2_BASE (0x10000 + IMX_IO_BASE) @@ -64,6 +69,7 @@ #define IMX_MMA_BASE (0x22000 + IMX_IO_BASE) #define IMX_AITC_BASE (0x23000 + IMX_IO_BASE) #define IMX_CSI_BASE (0x24000 + IMX_IO_BASE) +#endif /* * Watchdog Registers @@ -75,6 +81,7 @@ /* important definition of some bits of WCR */ #define WCR_WDE 0x04 +#if 0 /* * SYSCTRL Registers */ @@ -443,6 +450,7 @@ #define TPRER_PRES (0xff) /* Prescale */ #define TSTAT_CAPT (1<<1) /* Capture event */ #define TSTAT_COMP (1) /* Compare event */ +#endif /* * ???????????? |