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-rw-r--r--arch/arm/configs/freescale_mx35_3stack_defconfig67
-rw-r--r--board/freescale-mx35-3-stack/3stack.c113
-rw-r--r--board/freescale-mx35-3-stack/env/bin/_update5
-rw-r--r--board/freescale-mx35-3-stack/env/bin/boot50
-rw-r--r--board/freescale-mx35-3-stack/env/bin/init15
-rw-r--r--board/freescale-mx35-3-stack/env/bin/update_kernel2
-rw-r--r--board/freescale-mx35-3-stack/env/bin/update_rootfs (renamed from board/freescale-mx35-3-stack/env/bin/update_root)8
-rw-r--r--board/freescale-mx35-3-stack/env/config41
-rw-r--r--board/freescale-mx35-3-stack/lowlevel_init.S340
-rw-r--r--drivers/i2c/mc13892.c91
-rw-r--r--drivers/i2c/mc9sdz60.c84
-rw-r--r--include/i2c/mc13892.h90
-rw-r--r--include/i2c/mc9sdz60.h61
13 files changed, 623 insertions, 344 deletions
diff --git a/arch/arm/configs/freescale_mx35_3stack_defconfig b/arch/arm/configs/freescale_mx35_3stack_defconfig
index 1319a695e6..17a2fdc6d9 100644
--- a/arch/arm/configs/freescale_mx35_3stack_defconfig
+++ b/arch/arm/configs/freescale_mx35_3stack_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# barebox version: 2.0.0-rc10
-# Fri Dec 18 11:47:45 2009
+# barebox version: 2009.12.0-pre
+# Tue Dec 22 17:43:43 2009
#
# CONFIG_BOARD_LINKER_SCRIPT is not set
CONFIG_GENERIC_LINKER_SCRIPT=y
@@ -43,17 +43,17 @@ CONFIG_MACH_FREESCALE_MX35_3STACK=y
# CONFIG_MACH_PCM043 is not set
#
-# Board specific settings
+# Board specific settings
#
#
-# i.MX specific settings
+# i.MX specific settings
#
# CONFIG_IMX_CLKO is not set
-# CONFIG_AEABI is not set
+CONFIG_AEABI=y
#
-# Arm specific settings
+# Arm specific settings
#
CONFIG_CMD_ARM_CPUINFO=y
CONFIG_CMDLINE_TAG=y
@@ -68,12 +68,12 @@ CONFIG_ENV_HANDLING=y
CONFIG_GENERIC_GPIO=y
#
-# General Settings
+# General Settings
#
CONFIG_LOCALVERSION_AUTO=y
#
-# memory layout
+# memory layout
#
CONFIG_HAVE_CONFIGURABLE_TEXT_BASE=y
CONFIG_TEXT_BASE=0x87F00000
@@ -81,7 +81,7 @@ CONFIG_HAVE_CONFIGURABLE_MEMORY_LAYOUT=y
CONFIG_MEMORY_LAYOUT_DEFAULT=y
# CONFIG_MEMORY_LAYOUT_FIXED is not set
CONFIG_STACK_SIZE=0x8000
-CONFIG_MALLOC_SIZE=0x400000
+CONFIG_MALLOC_SIZE=0x1000000
# CONFIG_BROKEN is not set
# CONFIG_EXPERIMENTAL is not set
CONFIG_MACH_HAS_LOWLEVEL_INIT=y
@@ -105,10 +105,10 @@ CONFIG_CONSOLE_ACTIVATE_FIRST=y
# CONFIG_OF_FLAT_TREE is not set
CONFIG_PARTITION=y
CONFIG_DEFAULT_ENVIRONMENT=y
-CONFIG_DEFAULT_ENVIRONMENT_PATH="board/pcm043/env/"
+CONFIG_DEFAULT_ENVIRONMENT_PATH="board/freescale-mx35-3-stack/env/"
#
-# Debugging
+# Debugging
#
# CONFIG_DEBUG_INFO is not set
# CONFIG_ENABLE_FLASH_NOISE is not set
@@ -116,11 +116,11 @@ CONFIG_DEFAULT_ENVIRONMENT_PATH="board/pcm043/env/"
# CONFIG_ENABLE_DEVICE_NOISE is not set
#
-# Commands
+# Commands
#
#
-# scripting
+# scripting
#
CONFIG_CMD_EDIT=y
CONFIG_CMD_SLEEP=y
@@ -133,7 +133,7 @@ CONFIG_CMD_TRUE=y
CONFIG_CMD_FALSE=y
#
-# file commands
+# file commands
#
CONFIG_CMD_LS=y
CONFIG_CMD_RM=y
@@ -147,13 +147,13 @@ CONFIG_CMD_MOUNT=y
CONFIG_CMD_UMOUNT=y
#
-# console
+# console
#
CONFIG_CMD_CLEAR=y
CONFIG_CMD_ECHO=y
#
-# memory
+# memory
#
# CONFIG_CMD_LOADB is not set
CONFIG_CMD_MEMINFO=y
@@ -161,12 +161,12 @@ CONFIG_CMD_CRC=y
# CONFIG_CMD_MTEST is not set
#
-# flash
+# flash
#
CONFIG_CMD_FLASH=y
#
-# booting
+# booting
#
CONFIG_CMD_BOOTM=y
# CONFIG_CMD_BOOTM_ZLIB is not set
@@ -182,7 +182,8 @@ CONFIG_CMD_TEST=y
CONFIG_CMD_VERSION=y
CONFIG_CMD_HELP=y
CONFIG_CMD_DEVINFO=y
-CONFIG_CMD_GPIO=y
+CONFIG_CMD_BMP=y
+# CONFIG_CMD_GPIO is not set
CONFIG_NET=y
CONFIG_NET_DHCP=y
# CONFIG_NET_RARP is not set
@@ -191,11 +192,11 @@ CONFIG_NET_PING=y
CONFIG_NET_TFTP=y
#
-# Drivers
+# Drivers
#
#
-# serial drivers
+# serial drivers
#
# CONFIG_DRIVER_SERIAL_ARM_DCC is not set
CONFIG_DRIVER_SERIAL_IMX=y
@@ -203,39 +204,43 @@ CONFIG_DRIVER_SERIAL_IMX=y
CONFIG_MIIPHY=y
#
-# Network drivers
+# Network drivers
#
CONFIG_DRIVER_NET_SMC911X=y
CONFIG_DRIVER_NET_SMC911X_ADDRESS_SHIFT=0
# CONFIG_DRIVER_NET_SMC91111 is not set
-# CONFIG_DRIVER_NET_FEC_IMX is not set
+CONFIG_DRIVER_NET_FEC_IMX=y
#
-# SPI drivers
+# SPI drivers
#
-CONFIG_SPI=y
-# CONFIG_DRIVER_SPI_IMX is not set
-# CONFIG_DRIVER_SPI_MC13783 is not set
+# CONFIG_SPI is not set
CONFIG_I2C=y
CONFIG_DRIVER_I2C_IMX=y
CONFIG_DRIVER_I2C_MC13892=y
CONFIG_DRIVER_I2C_MC9SDZ60=y
#
-# flash drivers
+# flash drivers
#
CONFIG_HAS_CFI=y
CONFIG_DRIVER_CFI=y
# CONFIG_DRIVER_CFI_NEW is not set
CONFIG_DRIVER_CFI_OLD=y
CONFIG_CFI_BUFFER_WRITE=y
-# CONFIG_NAND is not set
+CONFIG_NAND=y
+CONFIG_NAND_IMX=y
+CONFIG_NAND_IMX_BOOT=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND_IDS=y
# CONFIG_USB is not set
# CONFIG_USB_GADGET is not set
-# CONFIG_VIDEO is not set
+CONFIG_VIDEO=y
+CONFIG_DRIVER_VIDEO_IMX_IPU=y
#
-# Filesystem support
+# Filesystem support
#
# CONFIG_FS_CRAMFS is not set
CONFIG_FS_RAMFS=y
diff --git a/board/freescale-mx35-3-stack/3stack.c b/board/freescale-mx35-3-stack/3stack.c
index e54196617f..e6fa0f0472 100644
--- a/board/freescale-mx35-3-stack/3stack.c
+++ b/board/freescale-mx35-3-stack/3stack.c
@@ -60,8 +60,8 @@ static struct device_d cfi_dev = {
};
static struct fec_platform_data fec_info = {
- .xcv_type = MII100,
- .phy_addr = 0x1F,
+ .xcv_type = MII100,
+ .phy_addr = 0x1F,
};
static struct device_d fec_dev = {
@@ -71,8 +71,8 @@ static struct device_d fec_dev = {
};
static struct memory_platform_data sdram_pdata = {
- .name = "ram0",
- .flags = DEVFS_RDWR,
+ .name = "ram0",
+ .flags = DEVFS_RDWR,
};
static struct device_d sdram_dev = {
@@ -157,7 +157,7 @@ static int f3s_devices_init(void)
reg = readl(IMX_CCM_BASE + CCM_RCSR);
/* some fuses provide us vital information about connected hardware */
if (reg & 0x20000000)
- nand_info.width = 2; /* bit */
+ nand_info.width = 2; /* 16 bit */
else
nand_info.width = 1; /* 8 bit */
@@ -167,17 +167,17 @@ static int f3s_devices_init(void)
register_device(&nand_dev);
register_device(&cfi_dev);
- switch ( (reg >> 25) & 0x3) {
+ switch ((reg >> 25) & 0x3) {
case 0x01: /* NAND is the source */
devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
dev_add_bb_dev("self_raw", "self0");
- devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
+ devfs_add_partition("nand0", 0x40000, 0x80000, PARTITION_FIXED, "env_raw");
dev_add_bb_dev("env_raw", "env0");
break;
case 0x00: /* NOR is the source */
devfs_add_partition("nor0", 0x00000, 0x40000, PARTITION_FIXED, "self0");
- devfs_add_partition("nor0", 0x40000, 0x20000, PARTITION_FIXED, "env0");
+ devfs_add_partition("nor0", 0x40000, 0x80000, PARTITION_FIXED, "env0");
protect_file("/dev/env0", 1);
break;
}
@@ -332,7 +332,7 @@ static int f3s_core_init(void)
/* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */
#define MAX_PARAM1 0x00302154
- writel(MAX_PARAM1, IMX_MAX_BASE + 0x0); /* for S0 */
+ writel(MAX_PARAM1, IMX_MAX_BASE + 0x000); /* for S0 */
writel(MAX_PARAM1, IMX_MAX_BASE + 0x100); /* for S1 */
writel(MAX_PARAM1, IMX_MAX_BASE + 0x200); /* for S2 */
writel(MAX_PARAM1, IMX_MAX_BASE + 0x300); /* for S3 */
@@ -358,74 +358,84 @@ static int f3s_core_init(void)
core_initcall(f3s_core_init);
-static int f3s_get_rev(struct i2c_client *client)
+static int f3s_get_rev(struct mc13892 *mc13892)
{
- u8 reg[3];
- int rev;
+ u32 rev;
+ int err;
- i2c_read_reg(client, 0x7, reg, sizeof(reg));
+ err = mc13892_reg_read(mc13892, MC13892_REG_IDENTIFICATION, &rev);
+ if (err)
+ return err;
- rev = reg[0] << 16 | reg [1] << 8 | reg[2];
- dev_info(&client->dev, "revision: 0x%x\n", rev);
+ dev_info(&mc13892->client->dev, "revision: 0x%x\n", rev);
+ if (rev == 0x00ffffff)
+ return -ENODEV;
- /* just return '0' or '1' */
- return !!((rev >> 6) & 0x7);
+ return ((rev >> 6) & 0x7) ? 20 : 10;
}
-static void f3s_pmic_init_v2(struct i2c_client *client)
+static int f3s_pmic_init_v2(struct mc13892 *mc13892)
{
- u8 reg[3];
+ int err = 0;
- i2c_read_reg(client, 0x1e, reg, sizeof(reg));
- reg[2] |= 0x03;
- i2c_write_reg(client, 0x1e, reg, sizeof(reg));
+ err |= mc13892_set_bits(mc13892, MC13892_REG_SETTING_0, 0x03, 0x03);
+ err |= mc13892_set_bits(mc13892, MC13892_REG_MODE_0, 0x01, 0x01);
+ if (err)
+ dev_err(&mc13892->client->dev,
+ "Init sequence failed, the system might not be working!\n");
- i2c_read_reg(client, 0x20, reg, sizeof(reg));
- reg[2] |= 0x01;
- i2c_write_reg(client, 0x20, reg, sizeof(reg));
+ return err;
}
-static void f3s_pmic_init_all(struct i2c_client *client)
+static int f3s_pmic_init_all(struct mc9sdz60 *mc9sdz60)
{
- u8 reg[1];
+ int err = 0;
- i2c_read_reg(client, 0x20, reg, sizeof(reg));
- reg[0] |= 0x04;
- i2c_write_reg(client, 0x20, reg, sizeof(reg));
+ err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_INT_FLAG_1, 0x04, 0x04);
+ err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_GPIO_2, 0x80, 0x00);
mdelay(200);
+ err |= mc9sdz60_set_bits(mc9sdz60, MC9SDZ60_REG_GPIO_2, 0x80, 0x80);
- i2c_read_reg(client, 0x1a, reg, sizeof(reg));
- reg[0] &= 0x7f;
- i2c_write_reg(client, 0x1a, reg, sizeof(reg));
-
- mdelay(200);
+ if (err)
+ dev_err(&mc9sdz60->client->dev,
+ "Init sequence failed, the system might not be working!\n");
- reg[0] |= 0x80;
- i2c_write_reg(client, 0x1a, reg, sizeof(reg));
+ return err;
}
static int f3s_pmic_init(void)
{
- struct i2c_client *client;
+ struct mc13892 *mc13892;
+ struct mc9sdz60 *mc9sdz60;
int rev;
- client = mc13892_get_client();
- if (!client)
- return -ENODEV;
+ mc13892 = mc13892_get();
+ if (!mc13892) {
+ printf("FAILED to get mc13892 handle!\n");
+ return 0;
+ }
- rev = f3s_get_rev(client);
- if (rev) {
- printf("i.MX35 CPU board version 2.0\n");
- f3s_pmic_init_v2(client);
- } else {
- printf("i.MX35 CPU board version 1.0\n");
+ rev = f3s_get_rev(mc13892);
+ switch (rev) {
+ case 10:
+ break;
+ case 20:
+ f3s_pmic_init_v2(mc13892);
+ break;
+ default:
+ printf("FAILED to identify board revision!\n");
+ return 0;
}
+ printf("i.MX35 PDK CPU board version %d.%d\n", rev / 10, rev % 10);
- client = mc9sdz60_get_client();
- if (!client)
- return -ENODEV;
- f3s_pmic_init_all(client);
+ mc9sdz60 = mc9sdz60_get();
+ if (!mc9sdz60) {
+ printf("FAILED to get mc9sdz60 handle!\n");
+ return 0;
+ }
+
+ f3s_pmic_init_all(mc9sdz60);
return 0;
}
@@ -442,4 +452,3 @@ void __bare_init nand_boot(void)
imx_nand_load_image((void *)TEXT_BASE, 256 * 1024);
}
#endif
-
diff --git a/board/freescale-mx35-3-stack/env/bin/_update b/board/freescale-mx35-3-stack/env/bin/_update
index fb7cbe8619..4f0839f89b 100644
--- a/board/freescale-mx35-3-stack/env/bin/_update
+++ b/board/freescale-mx35-3-stack/env/bin/_update
@@ -20,7 +20,7 @@ fi
ping $eth0.serverip
if [ $? -ne 0 ] ; then
- echo "update aborted"
+ echo "Server did not reply! Update aborted."
exit 1
fi
@@ -28,9 +28,12 @@ unprotect $part
echo
echo "erasing partition $part"
+echo
erase $part
echo
echo "flashing $image to $part"
echo
tftp $image $part
+
+protect $part
diff --git a/board/freescale-mx35-3-stack/env/bin/boot b/board/freescale-mx35-3-stack/env/bin/boot
index dfb59aa692..fb2fe614d4 100644
--- a/board/freescale-mx35-3-stack/env/bin/boot
+++ b/board/freescale-mx35-3-stack/env/bin/boot
@@ -3,43 +3,53 @@
. /env/config
if [ x$1 = xnand ]; then
- root=nand
- kernel=nand
+ rootfs_loc=nand
+ kernel_loc=nand
+elif [ x$1 = xnor ]; then
+ rootfs_loc=nor
+ kernel_loc=nor
+elif [ x$1 = xnet ]; then
+ rootfs_loc=net
+ kernel_loc=net
fi
-if [ x$1 = xnet ]; then
- root=net
- kernel=net
-fi
-
-if [ x$1 = xnor ]; then
- root=nor
- kernel=nor
-fi
if [ x$ip = xdhcp ]; then
bootargs="$bootargs ip=dhcp"
-else
+elif [ x$ip != xno ]; then
bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::"
fi
-if [ x$root = xnand ]; then
- bootargs="$bootargs root=$rootpart_nand rootfstype=jffs2"
-elif [ x$root = xnor ]; then
- bootargs="$bootargs root=$rootpart_nor rootfstype=jffs2"
+
+if [ $rootfs_loc != net ]; then
+ if [ x$rootfs_loc = xnand ]; then
+ rootfs_mtdblock=$rootfs_mtdblock_nand
+ else
+ rootfs_mtdblock=$rootfs_mtdblock_nor
+ fi
+
+
+ if [ $rootfs_type = ubifs ]; then
+ bootargs="$bootargs root=ubi0:root ubi.mtd=$rootfs_mtdblock"
+ else
+ bootargs="$bootargs root=/dev/mtdblock$rootfs_mtdblock"
+ fi
+
+ bootargs="$bootargs rootfstype=$rootfs_type"
else
bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp"
fi
-bootargs="$bootargs mtdparts=physmap-flash.0:$nor_parts;imx_nand:$nand_parts"
-if [ $kernel = net ]; then
+bootargs="$bootargs mtdparts=\"physmap-flash.0:$nor_parts;mxc_nand:$nand_parts\""
+
+if [ $kernel_loc = net ]; then
if [ x$ip = xdhcp ]; then
dhcp
fi
- tftp $uimage uImage || exit 1
+ tftp $kernel uImage || exit 1
bootm uImage
-elif [ $kernel = nor ]; then
+elif [ $kernel_loc = nor ]; then
bootm /dev/nor0.kernel
else
bootm /dev/nand0.kernel.bb
diff --git a/board/freescale-mx35-3-stack/env/bin/init b/board/freescale-mx35-3-stack/env/bin/init
index cdf0f6b8eb..c982f22a86 100644
--- a/board/freescale-mx35-3-stack/env/bin/init
+++ b/board/freescale-mx35-3-stack/env/bin/init
@@ -16,12 +16,13 @@ if [ -e /dev/nand0 ]; then
source /env/bin/hush_hack
fi
-#if [ -z $eth0.ethaddr ]; then
-# while [ -z $eth0.ethaddr ]; do
-# readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
-# done
-# echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
-#fi
+if [ -z $eth0.ethaddr ]; then
+ while [ -z $eth0.ethaddr ]; do
+ readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
+ done
+ echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
+ saveenv
+fi
echo
echo -n "Hit any key to stop autoboot: "
@@ -29,7 +30,7 @@ timeout -a $autoboot_timeout
if [ $? != 0 ]; then
echo
echo "type update_kernel nand|nor [<imagename>] to update kernel into flash"
- echo "type update_root nand|nor [<imagename>] to update rootfs into flash"
+ echo "type update_rootfs nand|nor [<imagename>] to update rootfs into flash"
echo
exit
fi
diff --git a/board/freescale-mx35-3-stack/env/bin/update_kernel b/board/freescale-mx35-3-stack/env/bin/update_kernel
index 05c822d860..63ad11aaed 100644
--- a/board/freescale-mx35-3-stack/env/bin/update_kernel
+++ b/board/freescale-mx35-3-stack/env/bin/update_kernel
@@ -1,8 +1,8 @@
#!/bin/sh
. /env/config
+image=$kernel
-image=$uimage
if [ x$1 = xnand ]; then
part=/dev/nand0.kernel.bb
elif [ x$1 = xnor ]; then
diff --git a/board/freescale-mx35-3-stack/env/bin/update_root b/board/freescale-mx35-3-stack/env/bin/update_rootfs
index eaf36ebcea..53dd2ca575 100644
--- a/board/freescale-mx35-3-stack/env/bin/update_root
+++ b/board/freescale-mx35-3-stack/env/bin/update_rootfs
@@ -2,7 +2,12 @@
. /env/config
-image=$uimage
+if [ $rootfs_type = ubifs ]; then
+ image=${rootfs}.ubi
+else
+ image=${rootfs}.$rootfs_type
+fi
+
if [ x$1 = xnand ]; then
part=/dev/nand0.root.bb
elif [ x$1 = xnor ]; then
@@ -13,4 +18,3 @@ else
fi
. /env/bin/_update $2
-
diff --git a/board/freescale-mx35-3-stack/env/config b/board/freescale-mx35-3-stack/env/config
index 9fcb3dc7b9..51195f7404 100644
--- a/board/freescale-mx35-3-stack/env/config
+++ b/board/freescale-mx35-3-stack/env/config
@@ -1,28 +1,35 @@
#!/bin/sh
+# use 'dhcp' to do dhcp in barebox and in kernel
+# use 'no' if you don't want to pass the ip from barebox to the kernel
+#ip=dhcp
+
+# or set your networking parameters here
+#eth0.ipaddr=a.b.c.d
+#eth0.netmask=a.b.c.d
+#eth0.gateway=a.b.c.d
+#eth0.serverip=a.b.c.d
+
# can be either 'net', 'nor' or 'nand''
-kernel=net
-root=net
+kernel_loc=nand
+rootfs_loc=nand
-uimage=uImage-pcm038
-jffs2=root-pcm038.jffs2
+# can be either 'jffs2', or 'ubifs'
+rootfs_type=ubifs
+
+kernel=uImage-mx35-3-stack
+rootfs=root-mx35-3-stack
+envimage=u-boot-v2-environment-mx35-3-stack
autoboot_timeout=3
-nfsroot="/ptx/work/octopus/rsc/svn/oselas/bsp/phytec/phyCORE-i.MX27/OSELAS.BSP-Phytec-phyCORE-i.MX27-trunk/root"
+nfsroot="/path/to/nfs/root"
bootargs="console=ttymxc0,115200"
-nor_parts="256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)"
-rootpart_nor="/dev/mtdblock3"
-
-nand_parts="256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)"
-rootpart_nand="/dev/mtdblock7"
+bootargs="$bootargs video=mx3fb:CTP-CLAA070LC0ACW"
-# use 'dhcp' to do dhcp in barebox and in kernel
-ip=dhcp
+nor_parts="256k(barebox)ro,512k(bareboxenv),2M(kernel),-(root)"
+rootfs_mtdblock_nor=3
-# or set your networking parameters here
-#eth0.ipaddr=a.b.c.d
-#eth0.netmask=a.b.c.d
-#eth0.gateway=a.b.c.d
-#eth0.serverip=a.b.c.d
+nand_parts="256k(barebox)ro,512k(bareboxenv),2M(kernel),-(root)"
+rootfs_mtdblock_nand=7
diff --git a/board/freescale-mx35-3-stack/lowlevel_init.S b/board/freescale-mx35-3-stack/lowlevel_init.S
index 4e0a10293d..1680579b51 100644
--- a/board/freescale-mx35-3-stack/lowlevel_init.S
+++ b/board/freescale-mx35-3-stack/lowlevel_init.S
@@ -27,9 +27,9 @@
#include <asm/cache-l2x0.h>
#include "board-mx35_3stack.h"
-#define CSD0_BASE_ADDR 0x80000000
-#define ESDCTL_BASE_ADDR 0xB8001000
-#define CSD1_BASE_ADDR 0x90000000
+#define CSD0_BASE_ADDR 0x80000000
+#define ESDCTL_BASE_ADDR 0xB8001000
+#define CSD1_BASE_ADDR 0x90000000
#define writel(val, reg) \
ldr r0, =reg; \
@@ -42,84 +42,84 @@
strb r1, [r0];
/* Assuming 24MHz input clock */
-#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
-#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
-#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1))
+#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5))
+#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1))
+#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1))
.section ".text_bare_init","ax"
-ARM_PPMRR: .word 0x40000015
-L2CACHE_PARAM: .word 0x00030024
-CCM_CCMR_W: .word 0x003F4208
-CCM_PDR0_W: .word 0x00001000
-MPCTL_PARAM_399_W: .word MPCTL_PARAM_399
-MPCTL_PARAM_532_W: .word MPCTL_PARAM_532
-PPCTL_PARAM_W: .word PPCTL_PARAM_300
-CCM_BASE_ADDR_W: .word IMX_CCM_BASE
+ARM_PPMRR: .word 0x40000015
+L2CACHE_PARAM: .word 0x00030024
+CCM_CCMR_W: .word 0x003F4208
+CCM_PDR0_W: .word 0x00001000
+MPCTL_PARAM_399_W: .word MPCTL_PARAM_399
+MPCTL_PARAM_532_W: .word MPCTL_PARAM_532
+PPCTL_PARAM_W: .word PPCTL_PARAM_300
+CCM_BASE_ADDR_W: .word IMX_CCM_BASE
.globl board_init_lowlevel
board_init_lowlevel:
- mov r10, lr
+ mov r10, lr
- mrc 15, 0, r1, c1, c0, 0
+ mrc 15, 0, r1, c1, c0, 0
- mrc 15, 0, r0, c1, c0, 1
- orr r0, r0, #7
- mcr 15, 0, r0, c1, c0, 1
+ mrc 15, 0, r0, c1, c0, 1
+ orr r0, r0, #7
+ mcr 15, 0, r0, c1, c0, 1
- orr r1, r1, #(1<<11) /* Flow prediction (Z) */
- orr r1, r1, #(1<<22) /* unaligned accesses */
- orr r1, r1, #(1<<21) /* Low Int Latency */
+ orr r1, r1, #(1 << 11) /* Flow prediction (Z) */
+ orr r1, r1, #(1 << 22) /* unaligned accesses */
+ orr r1, r1, #(1 << 21) /* Low Int Latency */
- mcr 15, 0, r1, c1, c0, 0
+ mcr 15, 0, r1, c1, c0, 0
- mov r0, #0
- mcr 15, 0, r0, c15, c2, 4
+ mov r0, #0
+ mcr 15, 0, r0, c15, c2, 4
/*
- * Branch predicition is now enabled. Flush the BTAC to ensure a valid
- * starting point. Don't flush BTAC while it is disabled to avoid
+ * Branch predicition is now enabled. Flush the BTAC to ensure a valid
+ * starting point. Don't flush BTAC while it is disabled to avoid
* ARM1136 erratum 408023.
*/
- mov r0, #0
- mcr p15, 0, r0, c7, c5, 6 /* flush entire BTAC */
+ mov r0, #0
+ mcr p15, 0, r0, c7, c5, 6 /* flush entire BTAC */
- mov r0, #0
- mcr 15, 0, r0, c7, c7, 0 /* invalidate I cache and D cache */
- mcr 15, 0, r0, c8, c7, 0 /* invalidate TLBs */
- mcr 15, 0, r0, c7, c10, 4 /* Drain the write buffer */
+ mov r0, #0
+ mcr 15, 0, r0, c7, c7, 0 /* invalidate I cache and D cache */
+ mcr 15, 0, r0, c8, c7, 0 /* invalidate TLBs */
+ mcr 15, 0, r0, c7, c10, 4 /* Drain the write buffer */
/* Also setup the Peripheral Port Remap register inside the core */
- ldr r0, ARM_PPMRR /* start from AIPS 2GB region */
- mcr p15, 0, r0, c15, c2, 4
+ ldr r0, ARM_PPMRR /* start from AIPS 2GB region */
+ mcr p15, 0, r0, c15, c2, 4
/*
* End of ARM1136 init
*/
- ldr r0, CCM_BASE_ADDR_W
+ ldr r0, CCM_BASE_ADDR_W
- ldr r2, CCM_CCMR_W
- str r2, [r0, #CCM_CCMR]
+ ldr r2, CCM_CCMR_W
+ str r2, [r0, #CCM_CCMR]
- ldr r3, MPCTL_PARAM_532_W /* consumer path*/
+ ldr r3, MPCTL_PARAM_532_W /* consumer path*/
- /* Set MPLL , arm clock and ahb clock*/
- str r3, [r0, #CCM_MPCTL]
+ /* Set MPLL, arm clock and ahb clock */
+ str r3, [r0, #CCM_MPCTL]
- ldr r1, PPCTL_PARAM_W
- str r1, [r0, #CCM_PPCTL]
+ ldr r1, PPCTL_PARAM_W
+ str r1, [r0, #CCM_PPCTL]
- ldr r1, CCM_PDR0_W
- str r1, [r0, #CCM_PDR0]
+ ldr r1, CCM_PDR0_W
+ str r1, [r0, #CCM_PDR0]
- ldr r1, [r0, #CCM_CGR0]
- orr r1, r1, #0x00300000
- str r1, [r0, #CCM_CGR0]
+ ldr r1, [r0, #CCM_CGR0]
+ orr r1, r1, #0x00300000
+ str r1, [r0, #CCM_CGR0]
- ldr r1, [r0, #CCM_CGR1]
- orr r1, r1, #0x00000C00
- orr r1, r1, #0x00000003
- str r1, [r0, #CCM_CGR1]
+ ldr r1, [r0, #CCM_CGR1]
+ orr r1, r1, #0x00000C00
+ orr r1, r1, #0x00000003
+ str r1, [r0, #CCM_CGR1]
/* Skip SDRAM initialization if we run from RAM */
cmp pc, #0x80000000
@@ -130,33 +130,33 @@ board_init_lowlevel:
mov pc, r10
1:
- ldr r0, =ESDCTL_BASE_ADDR
- mov r3, #0x2000
- str r3, [r0, #0x0]
- str r3, [r0, #0x8]
+ ldr r0, =ESDCTL_BASE_ADDR
+ mov r3, #0x2000
+ str r3, [r0, #0x0]
+ str r3, [r0, #0x8]
- /* ip(r12) has used to save lr register in upper calling*/
- mov fp, lr
+ /* ip(r12) has used to save lr register in upper calling */
+ mov fp, lr
- mov r5, #0x00
- mov r2, #0x00
- mov r1, #CSD0_BASE_ADDR
- bl setup_sdram_bank
- cmp r3, #0x0
- orreq r5, r5, #1
- eorne r2, r2, #0x1
- blne setup_sdram_bank
+ mov r5, #0x00
+ mov r2, #0x00
+ mov r1, #CSD0_BASE_ADDR
+ bl setup_sdram_bank
+ cmp r3, #0x0
+ orreq r5, r5, #1
+ eorne r2, r2, #0x1
+ blne setup_sdram_bank
- mov lr, fp
+ mov lr, fp
- ldr r3, =ESDCTL_DELAY_LINE5
- str r3, [r0, #0x30]
+ ldr r3, =ESDCTL_DELAY_LINE5
+ str r3, [r0, #0x30]
#ifdef CONFIG_NAND_IMX_BOOT
- ldr sp, =TEXT_BASE - 4 /* Setup a temporary stack in SDRAM */
+ ldr sp, =TEXT_BASE - 4 /* Setup a temporary stack in SDRAM */
- ldr r0, =IMX_NFC_BASE /* start of NFC SRAM */
- ldr r2, =IMX_NFC_BASE + 0x800 /* end of NFC SRAM */
+ ldr r0, =IMX_NFC_BASE /* start of NFC SRAM */
+ ldr r2, =IMX_NFC_BASE + 0x800 /* end of NFC SRAM */
/* skip NAND boot if not running from NFC space */
cmp pc, r0
@@ -165,119 +165,119 @@ board_init_lowlevel:
bhs ret
/* Move ourselves out of NFC SRAM */
- ldr r1, =TEXT_BASE
+ ldr r1, =TEXT_BASE
copy_loop:
- ldmia r0!, {r3-r9} /* copy from source address [r0] */
- stmia r1!, {r3-r9} /* copy to target address [r1] */
- cmp r0, r2 /* until source end addreee [r2] */
+ ldmia r0!, {r3-r9} /* copy from source address [r0] */
+ stmia r1!, {r3-r9} /* copy to target address [r1] */
+ cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
- ldr pc, =1f /* Jump to SDRAM */
+ ldr pc, =1f /* Jump to SDRAM */
1:
- bl nand_boot /* Load barebox from NAND Flash */
+ bl nand_boot /* Load barebox from NAND Flash */
/* rebase the return address */
ldr r1, =IMX_NFC_BASE - TEXT_BASE
- sub r10, r10, r1 /* adjust return address from NFC SRAM */
+ sub r10, r10, r1 /* adjust return address from NFC SRAM */
ret:
#endif /* CONFIG_NAND_IMX_BOOT */
- mov pc, r10
+ mov pc, r10
/*
* r0: ESDCTL control base, r1: sdram slot base
- * r2: DDR type(0:DDR2, 1:MDDR) r3, r4:working base
+ * r2: DDR type (0: DDR2, 1: MDDR) r3, r4: working base
*/
setup_sdram_bank:
- mov r3, #0xE /*0xA + 0x4*/
- tst r2, #0x1
- orreq r3, r3, #0x300 /*DDR2*/
- str r3, [r0, #0x10]
- bic r3, r3, #0x00A
- str r3, [r0, #0x10]
- beq 2f
-
- mov r3, #0x20000
-1: subs r3, r3, #1
- bne 1b
-
-2: tst r2, #0x1
- ldreq r3, =ESDCTL_DDR2_CONFIG
- ldrne r3, =ESDCTL_MDDR_CONFIG
- cmp r1, #CSD1_BASE_ADDR
- strlo r3, [r0, #0x4]
- strhs r3, [r0, #0xC]
-
- ldr r3, =ESDCTL_0x92220000
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
- mov r3, #0xDA
- ldr r4, =ESDCTL_PRECHARGE
- strb r3, [r1, r4]
-
- tst r2, #0x1
- bne skip_set_mode
-
- cmp r1, #CSD1_BASE_ADDR
- ldr r3, =ESDCTL_0xB2220000
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
- mov r3, #0xDA
- ldr r4, =ESDCTL_DDR2_EMR2
- strb r3, [r1, r4]
- ldr r4, =ESDCTL_DDR2_EMR3
- strb r3, [r1, r4]
- ldr r4, =ESDCTL_DDR2_EN_DLL
- strb r3, [r1, r4]
- ldr r4, =ESDCTL_DDR2_RESET_DLL
- strb r3, [r1, r4]
-
- ldr r3, =ESDCTL_0x92220000
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
- mov r3, #0xDA
- ldr r4, =ESDCTL_PRECHARGE
- strb r3, [r1, r4]
+ mov r3, #0xE /* 0xA + 0x4 */
+ tst r2, #0x1
+ orreq r3, r3, #0x300 /* DDR2 */
+ str r3, [r0, #0x10]
+ bic r3, r3, #0x00A
+ str r3, [r0, #0x10]
+ beq 2f
+
+ mov r3, #0x20000
+1: subs r3, r3, #1
+ bne 1b
+
+2: tst r2, #0x1
+ ldreq r3, =ESDCTL_DDR2_CONFIG
+ ldrne r3, =ESDCTL_MDDR_CONFIG
+ cmp r1, #CSD1_BASE_ADDR
+ strlo r3, [r0, #0x4]
+ strhs r3, [r0, #0xC]
+
+ ldr r3, =ESDCTL_0x92220000
+ strlo r3, [r0, #0x0]
+ strhs r3, [r0, #0x8]
+ mov r3, #0xDA
+ ldr r4, =ESDCTL_PRECHARGE
+ strb r3, [r1, r4]
+
+ tst r2, #0x1
+ bne skip_set_mode
+
+ cmp r1, #CSD1_BASE_ADDR
+ ldr r3, =ESDCTL_0xB2220000
+ strlo r3, [r0, #0x0]
+ strhs r3, [r0, #0x8]
+ mov r3, #0xDA
+ ldr r4, =ESDCTL_DDR2_EMR2
+ strb r3, [r1, r4]
+ ldr r4, =ESDCTL_DDR2_EMR3
+ strb r3, [r1, r4]
+ ldr r4, =ESDCTL_DDR2_EN_DLL
+ strb r3, [r1, r4]
+ ldr r4, =ESDCTL_DDR2_RESET_DLL
+ strb r3, [r1, r4]
+
+ ldr r3, =ESDCTL_0x92220000
+ strlo r3, [r0, #0x0]
+ strhs r3, [r0, #0x8]
+ mov r3, #0xDA
+ ldr r4, =ESDCTL_PRECHARGE
+ strb r3, [r1, r4]
skip_set_mode:
- cmp r1, #CSD1_BASE_ADDR
- ldr r3, =ESDCTL_0xA2220000
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
- mov r3, #0xDA
- strb r3, [r1]
- strb r3, [r1]
-
- ldr r3, =ESDCTL_0xB2220000
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
- tst r2, #0x1
- ldreq r4, =ESDCTL_DDR2_MR
- ldrne r4, =ESDCTL_MDDR_MR
- mov r3, #0xDA
- strb r3, [r1, r4]
- ldreq r4, =ESDCTL_DDR2_OCD_DEFAULT
- streqb r3, [r1, r4]
- ldreq r4, =ESDCTL_DDR2_EN_DLL
- ldrne r4, =ESDCTL_MDDR_EMR
- strb r3, [r1, r4]
-
- cmp r1, #CSD1_BASE_ADDR
- ldr r3, =ESDCTL_0x82228080
- strlo r3, [r0, #0x0]
- strhs r3, [r0, #0x8]
-
- tst r2, #0x1
- moveq r4, #0x20000
- movne r4, #0x200
-1: subs r4, r4, #1
- bne 1b
-
- str r3, [r1, #0x100]
- ldr r4, [r1, #0x100]
- cmp r3, r4
- movne r3, #1
- moveq r3, #0
-
- mov pc, lr
+ cmp r1, #CSD1_BASE_ADDR
+ ldr r3, =ESDCTL_0xA2220000
+ strlo r3, [r0, #0x0]
+ strhs r3, [r0, #0x8]
+ mov r3, #0xDA
+ strb r3, [r1]
+ strb r3, [r1]
+
+ ldr r3, =ESDCTL_0xB2220000
+ strlo r3, [r0, #0x0]
+ strhs r3, [r0, #0x8]
+ tst r2, #0x1
+ ldreq r4, =ESDCTL_DDR2_MR
+ ldrne r4, =ESDCTL_MDDR_MR
+ mov r3, #0xDA
+ strb r3, [r1, r4]
+ ldreq r4, =ESDCTL_DDR2_OCD_DEFAULT
+ streqb r3, [r1, r4]
+ ldreq r4, =ESDCTL_DDR2_EN_DLL
+ ldrne r4, =ESDCTL_MDDR_EMR
+ strb r3, [r1, r4]
+
+ cmp r1, #CSD1_BASE_ADDR
+ ldr r3, =ESDCTL_0x82228080
+ strlo r3, [r0, #0x0]
+ strhs r3, [r0, #0x8]
+
+ tst r2, #0x1
+ moveq r4, #0x20000
+ movne r4, #0x200
+1: subs r4, r4, #1
+ bne 1b
+
+ str r3, [r1, #0x100]
+ ldr r4, [r1, #0x100]
+ cmp r3, r4
+ movne r3, #1
+ moveq r3, #0
+
+ mov pc, lr
diff --git a/drivers/i2c/mc13892.c b/drivers/i2c/mc13892.c
index 54661d4f5e..67d4232a23 100644
--- a/drivers/i2c/mc13892.c
+++ b/drivers/i2c/mc13892.c
@@ -26,47 +26,99 @@
#include <errno.h>
#include <i2c/i2c.h>
-
-#include <asm/byteorder.h>
+#include <i2c/mc13892.h>
#define DRIVERNAME "mc13892"
-struct mc_priv {
- struct cdev cdev;
- struct i2c_client *client;
-};
-
-#define to_mc_priv(a) container_of(a, struct mc_priv, cdev)
+#define to_mc13892(a) container_of(a, struct mc13892, cdev)
-static struct mc_priv *mc_dev;
+static struct mc13892 *mc_dev;
-struct i2c_client *mc13892_get_client(void)
+struct mc13892 *mc13892_get(void)
{
if (!mc_dev)
return NULL;
- return mc_dev->client;
+ return mc_dev;
+}
+EXPORT_SYMBOL(mc13892_get);
+
+int mc13892_reg_read(struct mc13892 *mc13892, enum mc13892_reg reg, u32 *val)
+{
+ u8 buf[3];
+ int ret;
+
+ ret = i2c_read_reg(mc13892->client, reg, buf, 3);
+ *val = buf[0] << 16 | buf[1] << 8 | buf[2] << 0;
+
+ return ret == 3 ? 0 : ret;
}
+EXPORT_SYMBOL(mc13892_reg_read)
-static u32 mc_read_reg(struct mc_priv *mc, int reg)
+int mc13892_reg_write(struct mc13892 *mc13892, enum mc13892_reg reg, u32 val)
{
- u32 buf;
+ u8 buf[] = {
+ val >> 16,
+ val >> 8,
+ val >> 0,
+ };
+ int ret;
+
+ ret = i2c_write_reg(mc13892->client, reg, buf, 3);
+
+ return ret == 3 ? 0 : ret;
+}
+EXPORT_SYMBOL(mc13892_reg_write)
+
+int mc13892_set_bits(struct mc13892 *mc13892, enum mc13892_reg reg, u32 mask, u32 val)
+{
+ u32 tmp;
+ int err;
+
+ err = mc13892_reg_read(mc13892, reg, &tmp);
+ tmp = (tmp & ~mask) | val;
- i2c_read_reg(mc->client, reg, (u8 *)&buf, sizeof(buf));
+ if (!err)
+ err = mc13892_reg_write(mc13892, reg, tmp);
- return buf;
+ return err;
}
+EXPORT_SYMBOL(mc13892_set_bits);
static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset, ulong flags)
{
- struct mc_priv *priv = to_mc_priv(cdev);
- int i = count >> 2;
+ struct mc13892 *priv = to_mc13892(cdev);
u32 *buf = _buf;
+ size_t i = count >> 2;
+ int err;
+
+ offset >>= 2;
+
+ while (i) {
+ err = mc13892_reg_read(priv, offset, buf);
+ if (err)
+ return (ssize_t)err;
+ buf++;
+ i--;
+ offset++;
+ }
+
+ return count;
+}
+
+static ssize_t mc_write(struct cdev *cdev, const void *_buf, size_t count, ulong offset, ulong flags)
+{
+ struct mc13892 *mc13892 = to_mc13892(cdev);
+ const u32 *buf = _buf;
+ size_t i = count >> 2;
+ int err;
offset >>= 2;
while (i) {
- *buf = mc_read_reg(priv, offset);
+ err = mc13892_reg_write(mc13892, offset, *buf);
+ if (err)
+ return (ssize_t)err;
buf++;
i--;
offset++;
@@ -78,6 +130,7 @@ static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset
static struct file_operations mc_fops = {
.lseek = dev_lseek_default,
.read = mc_read,
+ .write = mc_write,
};
static int mc_probe(struct device_d *dev)
@@ -85,7 +138,7 @@ static int mc_probe(struct device_d *dev)
if (mc_dev)
return -EBUSY;
- mc_dev = xzalloc(sizeof(struct mc_priv));
+ mc_dev = xzalloc(sizeof(struct mc13892));
mc_dev->cdev.name = DRIVERNAME;
mc_dev->client = to_i2c_client(dev);
mc_dev->cdev.size = 256;
diff --git a/drivers/i2c/mc9sdz60.c b/drivers/i2c/mc9sdz60.c
index 4b1068d17e..3580af8852 100644
--- a/drivers/i2c/mc9sdz60.c
+++ b/drivers/i2c/mc9sdz60.c
@@ -26,45 +26,88 @@
#include <errno.h>
#include <i2c/i2c.h>
-
-#include <asm/byteorder.h>
+#include <i2c/mc9sdz60.h>
#define DRIVERNAME "mc9sdz60"
-struct mc_priv {
- struct cdev cdev;
- struct i2c_client *client;
-};
-
-#define to_mc_priv(a) container_of(a, struct mc_priv, cdev)
+#define to_mc9sdz60(a) container_of(a, struct mc9sdz60, cdev)
-static struct mc_priv *mc_dev;
+static struct mc9sdz60 *mc_dev;
-struct i2c_client *mc9sdz60_get_client(void)
+struct mc9sdz60 *mc9sdz60_get(void)
{
if (!mc_dev)
return NULL;
- return mc_dev->client;
+ return mc_dev;
}
+EXPORT_SYMBOL(mc9sdz60_get);
-static u32 mc_read_reg(struct mc_priv *mc, int reg)
+int mc9sdz60_reg_read(struct mc9sdz60 *mc9sdz60, enum mc9sdz60_reg reg, u8 *val)
{
- u8 buf;
+ int ret;
- i2c_read_reg(mc->client, reg, &buf, sizeof(buf));
+ ret = i2c_read_reg(mc9sdz60->client, reg, val, 1);
- return buf;
+ return ret == 1 ? 0 : ret;
}
+EXPORT_SYMBOL(mc9sdz60_reg_read)
+
+int mc9sdz60_reg_write(struct mc9sdz60 *mc9sdz60, enum mc9sdz60_reg reg, u8 val)
+{
+ int ret;
+
+ ret = i2c_write_reg(mc9sdz60->client, reg, &val, 1);
+
+ return ret == 1 ? 0 : ret;
+}
+EXPORT_SYMBOL(mc9sdz60_reg_write)
+
+int mc9sdz60_set_bits(struct mc9sdz60 *mc9sdz60, enum mc9sdz60_reg reg, u8 mask, u8 val)
+{
+ u8 tmp;
+ int err;
+
+ err = mc9sdz60_reg_read(mc9sdz60, reg, &tmp);
+ tmp = (tmp & ~mask) | val;
+
+ if (!err)
+ err = mc9sdz60_reg_write(mc9sdz60, reg, tmp);
+
+ return err;
+}
+EXPORT_SYMBOL(mc9sdz60_set_bits);
static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset, ulong flags)
{
- struct mc_priv *priv = to_mc_priv(cdev);
- int i = count;
+ struct mc9sdz60 *mc9sdz60 = to_mc9sdz60(cdev);
u8 *buf = _buf;
+ size_t i = count;
+ int err;
+
+ while (i) {
+ err = mc9sdz60_reg_read(mc9sdz60, offset, buf);
+ if (err)
+ return (ssize_t)err;
+ buf++;
+ i--;
+ offset++;
+ }
+
+ return count;
+}
+
+static ssize_t mc_write(struct cdev *cdev, const void *_buf, size_t count, ulong offset, ulong flags)
+{
+ struct mc9sdz60 *mc9sdz60 = to_mc9sdz60(cdev);
+ const u8 *buf = _buf;
+ size_t i = count;
+ int err;
while (i) {
- *buf = mc_read_reg(priv, offset);
+ err = mc9sdz60_reg_write(mc9sdz60, offset, *buf);
+ if (err)
+ return (ssize_t)err;
buf++;
i--;
offset++;
@@ -76,6 +119,7 @@ static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset
static struct file_operations mc_fops = {
.lseek = dev_lseek_default,
.read = mc_read,
+ .write = mc_write,
};
static int mc_probe(struct device_d *dev)
@@ -83,10 +127,10 @@ static int mc_probe(struct device_d *dev)
if (mc_dev)
return -EBUSY;
- mc_dev = xzalloc(sizeof(struct mc_priv));
+ mc_dev = xzalloc(sizeof(struct mc9sdz60));
mc_dev->cdev.name = DRIVERNAME;
mc_dev->client = to_i2c_client(dev);
- mc_dev->cdev.size = 256;
+ mc_dev->cdev.size = 64; /* 35 known registers */
mc_dev->cdev.dev = dev;
mc_dev->cdev.ops = &mc_fops;
diff --git a/include/i2c/mc13892.h b/include/i2c/mc13892.h
index 2f44f6c853..112d05ba69 100644
--- a/include/i2c/mc13892.h
+++ b/include/i2c/mc13892.h
@@ -1,7 +1,93 @@
+/*
+ * Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de>
+ *
+ * This file is released under the GPLv2
+ *
+ * Derived from:
+ * - arch-mxc/pmic_external.h -- contains interface of the PMIC protocol driver
+ * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ */
+
#ifndef __ASM_ARCH_MC13892_H
#define __ASM_ARCH_MC13892_H
-extern struct i2c_client *mc13892_get_client(void);
+enum mc13892_reg {
+ MC13892_REG_INT_STATUS0 = 0x00,
+ MC13892_REG_INT_MASK0 = 0x01,
+ MC13892_REG_INT_SENSE0 = 0x02,
+ MC13892_REG_INT_STATUS1 = 0x03,
+ MC13892_REG_INT_MASK1 = 0x04,
+ MC13892_REG_INT_SENSE1 = 0x05,
+ MC13892_REG_PU_MODE_S = 0x06,
+ MC13892_REG_IDENTIFICATION = 0x07,
+ MC13892_REG_UNUSED0 = 0x08,
+ MC13892_REG_ACC0 = 0x09,
+ MC13892_REG_ACC1 = 0x0a,
+ MC13892_REG_UNUSED1 = 0x0b,
+ MC13892_REG_UNUSED2 = 0x0c,
+ MC13892_REG_POWER_CTL0 = 0x0d,
+ MC13892_REG_POWER_CTL1 = 0x0e,
+ MC13892_REG_POWER_CTL2 = 0x0f,
+ MC13892_REG_REGEN_ASSIGN = 0x10,
+ MC13892_REG_UNUSED3 = 0x11,
+ MC13892_REG_MEM_A = 0x12,
+ MC13892_REG_MEM_B = 0x13,
+ MC13892_REG_RTC_TIME = 0x14,
+ MC13892_REG_RTC_ALARM = 0x15,
+ MC13892_REG_RTC_DAY = 0x16,
+ MC13892_REG_RTC_DAY_ALARM = 0x17,
+ MC13892_REG_SW_0 = 0x18,
+ MC13892_REG_SW_1 = 0x19,
+ MC13892_REG_SW_2 = 0x1a,
+ MC13892_REG_SW_3 = 0x1b,
+ MC13892_REG_SW_4 = 0x1c,
+ MC13892_REG_SW_5 = 0x1d,
+ MC13892_REG_SETTING_0 = 0x1e,
+ MC13892_REG_SETTING_1 = 0x1f,
+ MC13892_REG_MODE_0 = 0x20,
+ MC13892_REG_MODE_1 = 0x21,
+ MC13892_REG_POWER_MISC = 0x22,
+ MC13892_REG_UNUSED4 = 0x23,
+ MC13892_REG_UNUSED5 = 0x24,
+ MC13892_REG_UNUSED6 = 0x25,
+ MC13892_REG_UNUSED7 = 0x26,
+ MC13892_REG_UNUSED8 = 0x27,
+ MC13892_REG_UNUSED9 = 0x28,
+ MC13892_REG_UNUSED10 = 0x29,
+ MC13892_REG_UNUSED11 = 0x2a,
+ MC13892_REG_ADC0 = 0x2b,
+ MC13892_REG_ADC1 = 0x2c,
+ MC13892_REG_ADC2 = 0x2d,
+ MC13892_REG_ADC3 = 0x2e,
+ MC13892_REG_ADC4 = 0x2f,
+ MC13892_REG_CHARGE = 0x30,
+ MC13892_REG_USB0 = 0x31,
+ MC13892_REG_USB1 = 0x32,
+ MC13892_REG_LED_CTL0 = 0x33,
+ MC13892_REG_LED_CTL1 = 0x34,
+ MC13892_REG_LED_CTL2 = 0x35,
+ MC13892_REG_LED_CTL3 = 0x36,
+ MC13892_REG_UNUSED12 = 0x37,
+ MC13892_REG_UNUSED13 = 0x38,
+ MC13892_REG_TRIM0 = 0x39,
+ MC13892_REG_TRIM1 = 0x3a,
+ MC13892_REG_TEST0 = 0x3b,
+ MC13892_REG_TEST1 = 0x3c,
+ MC13892_REG_TEST2 = 0x3d,
+ MC13892_REG_TEST3 = 0x3e,
+ MC13892_REG_TEST4 = 0x3f,
+};
-#endif /* __ASM_ARCH_MC13892_H */
+struct mc13892 {
+ struct cdev cdev;
+ struct i2c_client *client;
+};
+
+extern struct mc13892 *mc13892_get(void);
+extern int mc13892_reg_read(struct mc13892 *mc13892, enum mc13892_reg reg, u32 *val);
+extern int mc13892_reg_write(struct mc13892 *mc13892, enum mc13892_reg reg, u32 val);
+extern int mc13892_set_bits(struct mc13892 *mc13892, enum mc13892_reg reg, u32 mask, u32 val);
+
+#endif /* __ASM_ARCH_MC13892_H */
diff --git a/include/i2c/mc9sdz60.h b/include/i2c/mc9sdz60.h
index 04cfca04ab..4cc233e058 100644
--- a/include/i2c/mc9sdz60.h
+++ b/include/i2c/mc9sdz60.h
@@ -1,7 +1,64 @@
+/*
+ * Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de>
+ *
+ * This file is released under the GPLv2
+ *
+ * Derived from:
+ * - mcu_max8660-bus.h -- contains interface of the mc9sdz60 and max8660
+ * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ */
+
#ifndef __ASM_ARCH_MC9SDZ60_H
#define __ASM_ARCH_MC9SDZ60_H
-extern struct i2c_client *mc9sdz60_get_client(void);
+enum mc9sdz60_reg {
+ MC9SDZ60_REG_VERSION = 0x00,
+ MC9SDZ60_REG_SECS = 0x01,
+ MC9SDZ60_REG_MINS = 0x02,
+ MC9SDZ60_REG_HRS = 0x03,
+ MC9SDZ60_REG_DAY = 0x04,
+ MC9SDZ60_REG_DATE = 0x05,
+ MC9SDZ60_REG_MONTH = 0x06,
+ MC9SDZ60_REG_YEAR = 0x07,
+ MC9SDZ60_REG_ALARM_SECS = 0x08,
+ MC9SDZ60_REG_ALARM_MINS = 0x09,
+ MC9SDZ60_REG_ALARM_HRS = 0x0a,
+ MC9SDZ60_REG_TS_CONTROL = 0x0b,
+ MC9SDZ60_REG_X_LOW = 0x0c,
+ MC9SDZ60_REG_Y_LOW = 0x0d,
+ MC9SDZ60_REG_XY_HIGH = 0x0e,
+ MC9SDZ60_REG_X_LEFT_LOW = 0x0f,
+ MC9SDZ60_REG_X_LEFT_HIGH = 0x10,
+ MC9SDZ60_REG_X_RIGHT = 0x11,
+ MC9SDZ60_REG_Y_TOP_LOW = 0x12,
+ MC9SDZ60_REG_Y_TOP_HIGH = 0x13,
+ MC9SDZ60_REG_Y_BOTTOM = 0x14,
+ MC9SDZ60_REG_RESET_1 = 0x15,
+ MC9SDZ60_REG_RESET_2 = 0x16,
+ MC9SDZ60_REG_POWER_CTL = 0x17,
+ MC9SDZ60_REG_DELAY_CONFIG = 0x18,
+ MC9SDZ60_REG_GPIO_1 = 0x19,
+ MC9SDZ60_REG_GPIO_2 = 0x1a,
+ MC9SDZ60_REG_KPD_1 = 0x1b,
+ MC9SDZ60_REG_KPD_2 = 0x1c,
+ MC9SDZ60_REG_KPD_CONTROL = 0x1d,
+ MC9SDZ60_REG_INT_ENABLE_1 = 0x1e,
+ MC9SDZ60_REG_INT_ENABLE_2 = 0x1f,
+ MC9SDZ60_REG_INT_FLAG_1 = 0x20,
+ MC9SDZ60_REG_INT_FLAG_2 = 0x21,
+ MC9SDZ60_REG_DES_FLAG = 0x22,
+};
-#endif /* __ASM_ARCH_MC9SDZ60_H */
+struct mc9sdz60 {
+ struct cdev cdev;
+ struct i2c_client *client;
+};
+
+extern struct mc9sdz60 *mc9sdz60_get(void);
+extern int mc9sdz60_reg_read(struct mc9sdz60 *priv, enum mc9sdz60_reg reg, u8 *val);
+extern int mc9sdz60_reg_write(struct mc9sdz60 *priv, enum mc9sdz60_reg reg, u8 val);
+extern int mc9sdz60_set_bits(struct mc9sdz60 *priv, enum mc9sdz60_reg reg, u8 mask, u8 val);
+
+#endif /* __ASM_ARCH_MC9SDZ60_H */
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-30 18:30:28 +0000