diff options
369 files changed, 8614 insertions, 1017 deletions
diff --git a/.gitignore b/.gitignore index 5d9157d85d..03c5e20189 100644 --- a/.gitignore +++ b/.gitignore @@ -61,7 +61,6 @@ barebox_default_env* # # Generated include files # -include/asm include/asm-*/asm-offsets.h include/config include/linux/compile.h diff --git a/Documentation/boards/bcm2835.rst b/Documentation/boards/bcm2835.rst new file mode 100644 index 0000000000..13cebb01c4 --- /dev/null +++ b/Documentation/boards/bcm2835.rst @@ -0,0 +1,17 @@ +Broadcom BCM2835 +================ + +Raspberry Pi +------------ + + 1. Prepare a card with a FAT filesystem. Download a tiny NOOBS LITE + zip archive and unpack it into FAT partition. + See http://www.raspberrypi.org/help/noobs-setup/ for details. + + 2. Compile ``barebox.bin`` image (use ``rpi_defconfig``). + Copy it to the SD/microSD card and name it ``recovery.img``. + + 3. Connect to board's UART (115200 8N1); + Use PIN6 (GND), PIN8 (UART_TX), PIN10 (UART_RX) pins. + + 4. Turn board's power on. diff --git a/Documentation/boards/mxs.rst b/Documentation/boards/mxs.rst new file mode 100644 index 0000000000..6c8bdb56fa --- /dev/null +++ b/Documentation/boards/mxs.rst @@ -0,0 +1,119 @@ +Freescale i.MXs +=============== + +Freescale i.MXs or MXS are a SoC family which consists of the i.MX23 +and the i.MX28. These are quite different from the regular i.MX SoCs +and thus are represented by its own architecture in both the Kernel +and barebox. + +Bootlets +-------- + +Traditionally These SoCs need the Freescale bootlets source and the +elf2sb2 binary to build a bootable image out of the barebox binary. +Since the bootlets are board specific and the source code is only +hardly customisable each vendor usually has his own slightly different +version of the bootlets. Booting with the Freescale bootlets is not +described here, refer to the bootlet sourcecode or your vendors +documentation instead. + +U-Boot and barebox have a port of the bootlets integrated into their +source. The barebox bootlet code is derived from the U-Boot bootlet +code written by Marek Vasut. + +Currently only the Karo TX28 is supported by the barebox bootlets, +but we recommend that this approach should be followed for new boards +and existing boards should be ported over. + +Booting Freescale i.MXs +----------------------- + +The Freescale MXS SoCs have a multi staged boot process which needs +different images composed out of different binaries. The ROM executes +a so called bootstream which contains multiple executables. The first +one is executed in SRAM and the purpose of this binary is to setup +the internal PMIC and the SDRAM. The second image is usually the +bootloader itself. In case of barebox the bootstream is composed +out of the self extracting barebox image (pblx) and the prepare +stage for setting up the SDRAM. + +The bootstream image itself is useful for USB boot, but for booting from +SD cards or NAND a BCB header has to be prepended to the image. In case +of SD boot the image has the .mxssd file extension in barebox. + +Since the bootstream images are encrypted they are not suitable for +2nd stage execution. For this purpose the 2nd stage images are generated. + +Booting from USB +---------------- + +barebox has the mxs-usb-loader tool (derived from the sbloader tool from +the rockbox project). If the board is connected to the PC and started in +USB Boot mode it should show up in lsusb:: + + Bus 001 Device 098: ID 15a2:004f Freescale Semiconductor, Inc. i.MX28 SystemOnChip in RecoveryMode + +The bootstream images can be directly booted with:: + + ./scripts/mxs-usb-loader 0 images/barebox-karo-tx28-bootstream.img + +You might require appropriate udev rules or sudo to gain the rights to +access the USB device. + +Booting from SD cards +--------------------- + +The SD images are suitable for booting from SD cards. SD cards need a special +partitioning which can be created with the following fdisk sequence (using +/dev/sdg as example):: + + fdisk /dev/sdg + + Welcome to fdisk (util-linux 2.25.1). + Changes will remain in memory only, until you decide to write them. + Be careful before using the write command. + + + Command (m for help): o + Created a new DOS disklabel with disk identifier 0xd7e5d328. + + Command (m for help): n + Partition type + p primary (0 primary, 0 extended, 4 free) + e extended (container for logical partitions) + Select (default p): p + Partition number (1-4, default 1): 1 + First sector (2048-7829503, default 2048): + Last sector, +sectors or +size{K,M,G,T,P} (2048-7829503, default 7829503): +1M + + Created a new partition 1 of type 'Linux' and of size 1 MiB. + + Command (m for help): t + Selected partition 1 + Hex code (type L to list all codes): 53 + Changed type of partition 'Linux' to 'OnTrack DM6 Aux3'. + + Command (m for help): + + Command (m for help): w + +After writing the new partition table the image can be written directly to +the partition:: + + cat images/barebox-karo-tx28-sd.img > /dev/sdg1 + +** NOTE ** + +The MXS SoCs require a special partition of type 0x53 (OnTrack DM6 Aux) +which contains the BCB header. For some unknown reason the BCB header is +inside a partition, but contains the sector number of the raw device from +which the rest of the image is read from. With standard settings booting +from SD card only works if the partition containing the bootloader starts +at sector 2048 (the standard for fdisk). See the -p parameter to the +mxsboot tool which changes this sector number in the image. + +Booting second stage +-------------------- + +The second stage images can be started with the barebox bootm command or +just jumped into using the 'go' command. diff --git a/Documentation/boards/mxs/KaRo-TX28.rst b/Documentation/boards/mxs/KaRo-TX28.rst index 0fbd4dfd7d..0c5dc71ef3 100644 --- a/Documentation/boards/mxs/KaRo-TX28.rst +++ b/Documentation/boards/mxs/KaRo-TX28.rst @@ -34,20 +34,9 @@ Build the binary image:: **NOTE:** replace the armv5compiler with your ARM v5 cross compiler. -**NOTE:** to use the result, you also need the following resources from Freescale: +This produces the following images: - * the 'bootlets' archive - * the 'elftosb2' encryption tool - * in the case you want to start barebox from an attached SD card - the 'sdimage' tool from Freescale's 'uuc' archive. + * barebox-karo-tx28-bootstream.img - Use with the bcb command + * barebox-karo-tx28-sd.img - Use for SD cards + * barebox-karo-tx28-2nd.img - Use for 2nd stage booting (with bootm) -Memory layout when barebox is running -------------------------------------- - - * 0x40000000 start of SDRAM - * 0x40000100 start of kernel's boot parameters - - * below malloc area: stack area - * below barebox: malloc area - - * 0x47000000 start of barebox diff --git a/Documentation/user/networking.rst b/Documentation/user/networking.rst index 6802138af9..6eeb93dd88 100644 --- a/Documentation/user/networking.rst +++ b/Documentation/user/networking.rst @@ -61,15 +61,15 @@ Network console barebox has a UDP-based network console. If enabled in the config, you will see something like this during startup:: - registered netconsole as cs1 + registered netconsole as netconsole By default the network console is disabled during runtime to prevent security risks. It can be enabled using: .. code-block:: sh - cs1.ip=192.168.23.2 - cs1.active=ioe + netconsole.ip=192.168.23.2 + netconsole.active=ioe This will send UDP packets to 192.168.23.2 on port 6666. On 192.168.23.2 the scripts/netconsole script can be used to control barebox: diff --git a/Kbuild b/Kbuild new file mode 100644 index 0000000000..329609604f --- /dev/null +++ b/Kbuild @@ -0,0 +1,43 @@ +##### +# 1) Generate asm-offsets.h +# + +offsets-file := include/generated/asm-offsets.h + +always += $(offsets-file) +targets += $(offsets-file) +targets += arch/$(SRCARCH)/lib/asm-offsets.s + + +# Default sed regexp - multiline due to syntax constraints +define sed-y + "/^->/{s:->#\(.*\):/* \1 */:; \ + s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \ + s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \ + s:->::; p;}" +endef + +quiet_cmd_offsets = GEN $@ +define cmd_offsets + (set -e; \ + echo "#ifndef __ASM_OFFSETS_H__"; \ + echo "#define __ASM_OFFSETS_H__"; \ + echo "/*"; \ + echo " * DO NOT MODIFY."; \ + echo " *"; \ + echo " * This file was generated by Kbuild"; \ + echo " *"; \ + echo " */"; \ + echo ""; \ + sed -ne $(sed-y) $<; \ + echo ""; \ + echo "#endif" ) > $@ +endef + +# We use internal kbuild rules to avoid the "is up to date" message from make +arch/$(SRCARCH)/lib/asm-offsets.s: arch/$(SRCARCH)/lib/asm-offsets.c FORCE + $(Q)mkdir -p $(dir $@) + $(call if_changed_dep,cc_s_c) + +$(obj)/$(offsets-file): arch/$(SRCARCH)/lib/asm-offsets.s Kbuild + $(call cmd,offsets) @@ -1,5 +1,5 @@ -VERSION = 2014 -PATCHLEVEL = 12 +VERSION = 2015 +PATCHLEVEL = 01 SUBLEVEL = 0 EXTRAVERSION = NAME = None @@ -112,9 +112,10 @@ ifneq ($(KBUILD_OUTPUT),) # Invoke a second make in the output directory, passing relevant variables # check that the output directory actually exists saved-output := $(KBUILD_OUTPUT) -KBUILD_OUTPUT := $(shell cd $(KBUILD_OUTPUT) && /bin/pwd) +KBUILD_OUTPUT := $(shell mkdir -p $(KBUILD_OUTPUT) && cd $(KBUILD_OUTPUT) \ + && /bin/pwd) $(if $(KBUILD_OUTPUT),, \ - $(error output directory "$(saved-output)" does not exist)) + $(error failed to create output directory "$(saved-output)")) PHONY += $(MAKECMDGOALS) @@ -291,10 +292,9 @@ export MODVERDIR := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/).tmp_ve # Use LINUXINCLUDE when you must reference the include/ directory. # Needed to be compatible with the O= option LINUXINCLUDE := -Iinclude -I$(srctree)/dts/include \ - $(if $(KBUILD_SRC),-Iinclude2 -I$(srctree)/include) \ + $(if $(KBUILD_SRC), -I$(srctree)/include) \ -I$(srctree)/arch/$(ARCH)/include \ -I$(objtree)/arch/$(ARCH)/include \ - -include include/generated/autoconf.h \ -include $(srctree)/include/linux/kconfig.h CPPFLAGS := -D__KERNEL__ -D__BAREBOX__ $(LINUXINCLUDE) -fno-builtin -ffreestanding @@ -790,7 +790,6 @@ PHONY += prepare-all # prepare3 is used to check if we are building in a separate output directory, # and if so do: # 1) Check that make has not been executed in the kernel src $(srctree) -# 2) Create the include2 directory, used for the second asm symlink prepare3: include/config/kernel.release ifneq ($(KBUILD_SRC),) @echo ' Using $(srctree) as source for kernel' @@ -799,17 +798,13 @@ ifneq ($(KBUILD_SRC),) echo " in the '$(srctree)' directory.";\ false; \ fi; - $(Q)if [ ! -d include2 ]; then mkdir -p include2; fi; - $(Q)if [ -e $(srctree)/include/asm-$(SRCARCH)/barebox.h ]; then \ - ln -fsn $(srctree)/include/asm-$(SRCARCH) include2/asm; \ - fi endif # prepare2 creates a makefile if using a separate output directory prepare2: prepare3 outputmakefile prepare1: prepare2 include/generated/version.h include/generated/utsrelease.h \ - include/asm include/config.h include/config/auto.conf + include/config.h include/config/auto.conf ifneq ($(KBUILD_MODULES),) $(Q)mkdir -p $(MODVERDIR) @@ -829,39 +824,6 @@ prepare prepare-all: prepare0 export CPPFLAGS_barebox.lds += -C -U$(ARCH) -# FIXME: The asm symlink changes when $(ARCH) changes. That's -# hard to detect, but I suppose "make mrproper" is a good idea -# before switching between archs anyway. - -define check-symlink - set -e; \ - if [ -L include/asm ]; then \ - asmlink=`readlink include/asm | cut -d '-' -f 2`; \ - if [ "$$asmlink" != "$(SRCARCH)" ]; then \ - echo "ERROR: the symlink $@ points to asm-$$asmlink but asm-$(SRCARCH) was expected"; \ - echo " set ARCH or save .config and run 'make mrproper' to fix it"; \ - exit 1; \ - fi; \ - fi -endef - -# We create the target directory of the symlink if it does -# not exist so the test in chack-symlink works and we have a -# directory for generated filesas used by some architectures. -define create-symlink - if [ ! -L include/asm ]; then \ - $(kecho) ' SYMLINK $@ -> include/asm-$(SRCARCH)'; \ - if [ ! -d include/asm-$(SRCARCH) ]; then \ - mkdir -p include/asm-$(SRCARCH); \ - fi; \ - ln -fsn asm-$(SRCARCH) $@; \ - fi -endef - -include/asm: - $(Q)$(check-symlink) - $(Q)$(create-symlink) - define symlink-config-h if [ -f $(srctree)/$(BOARD)/config.h ]; then \ $(kecho) ' SYMLINK $@ -> $(BOARD)/config.h'; \ @@ -998,10 +960,9 @@ CLEAN_FILES += barebox System.map include/generated/barebox_default_env.h \ barebox.efi barebox.canon-a1100.bin # Directories & files removed with 'make mrproper' -MRPROPER_DIRS += include/config include2 usr/include -MRPROPER_FILES += .config .config.old include/asm .version .old_version \ - include/generated/autoconf.h include/generated/version.h \ - include/generated/utsrelease.h include/config.h \ +MRPROPER_DIRS += include/config usr/include include/generated +MRPROPER_FILES += .config .config.old .version .old_version \ + include/config.h \ Module.symvers tags TAGS cscope* # clean - Delete most, but leave enough to build external modules @@ -4,7 +4,6 @@ TODO [ ] ask jbe about: ./commands/Makefile:40:obj-$(CONFIG_SIMPLE_PARSER) += setenv.o [ ] bark on partition not ending on flash sector boundaries -[ ] distclean doesn't work without a config [ ] Every driver should have a remove function. (It must have. Currently there is no provision to given to remove my interrupt handlers and to reset all hardware in use, before the target @@ -108,3 +107,4 @@ DONE countdown -m msg -t timeout -x [ctrl-c|anykey|string] If done, remove the corresponding stuff from common/main.c [X] Board support should go to arch/*/boards/* +[X] distclean doesn't work without a config diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4aa6afec1e..09bbe05bad 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -53,6 +53,7 @@ config ARCH_BCM2835 select COMMON_CLK select CLOCKSOURCE_BCM2835 select ARM_AMBA + select HAS_DEBUG_LL config ARCH_CLPS711X bool "Cirrus Logic EP711x/EP721x/EP731x" @@ -188,9 +189,9 @@ config ARCH_S3C64xx config ARCH_VERSATILE bool "ARM Versatile boards (ARM926EJ-S)" - select CPU_ARM926T select GPIOLIB select HAVE_CLK + select HAS_DEBUG_LL config ARCH_VEXPRESS bool "ARM Vexpres boards" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index cf81c9c083..193f731e90 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -105,11 +105,9 @@ TEXT_BASE = $(CONFIG_TEXT_BASE) CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -ifndef CONFIG_MODULES # Add cleanup flags CPPFLAGS += -fdata-sections -ffunction-sections LDFLAGS_barebox += -static --gc-sections -endif ifdef CONFIG_RELOCATABLE LDFLAGS_barebox += -pie diff --git a/arch/arm/boards/a9m2410/config.h b/arch/arm/boards/a9m2410/config.h index 1274ce7018..1da99eacee 100644 --- a/arch/arm/boards/a9m2410/config.h +++ b/arch/arm/boards/a9m2410/config.h @@ -58,7 +58,7 @@ * 32MiB SDRAM in bank6 * - MT = 11 (= sync dram type) * - Trcd = 00 (= CL2) - * - SCAN = 01 (= 9 bit collumns) + * - SCAN = 01 (= 9 bit columns) */ #define BOARD_SPECIFIC_BANKCON6 ((0x3 << 15) + (0x0 << 2) + 0x1) /* diff --git a/arch/arm/boards/a9m2410/lowlevel_init.S b/arch/arm/boards/a9m2410/lowlevel_init.S index 57d63e8de3..b772b1f7f0 100644 --- a/arch/arm/boards/a9m2410/lowlevel_init.S +++ b/arch/arm/boards/a9m2410/lowlevel_init.S @@ -3,7 +3,7 @@ */ #include <config.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/s3c-iomap.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/boards/a9m2440/lowlevel_init.S b/arch/arm/boards/a9m2440/lowlevel_init.S index 916ab725e5..2c51e05806 100644 --- a/arch/arm/boards/a9m2440/lowlevel_init.S +++ b/arch/arm/boards/a9m2440/lowlevel_init.S @@ -3,7 +3,7 @@ */ #include <config.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/s3c-iomap.h> #include <mach/s3c24xx-gpio.h> #include <asm/barebox-arm-head.h> @@ -84,7 +84,7 @@ SDRAMDATA: /* * - MT = 11 (= sync dram type) * - Trcd = 01 (= CL3) - * - SCAN = 00 (= 8 bit collumns) + * - SCAN = 00 (= 8 bit columns) */ .word ((0x3 << 15) + (0x1 << 2) + (0x0)) .word ((0x3 << 15) + (0x1 << 2) + (0x0)) @@ -117,7 +117,7 @@ SDRAMDATA: /* * - MT = 11 (= sync dram type) * - Trcd = 00 (= CL2) - * - SCAN = 01 (= 9 bit collumns) + * - SCAN = 01 (= 9 bit columns) */ .word ((0x3 << 15) + (0x0 << 2) + (0x1)) .word ((0x3 << 15) + (0x0 << 2) + (0x1)) @@ -150,7 +150,7 @@ SDRAMDATA: /* * - MT = 11 (= sync dram type) * - Trcd = 00 (= CL2) - * - SCAN = 01 (= 9 bit collumns) + * - SCAN = 01 (= 9 bit columns) */ .word ((0x3 << 15) + (0x0 << 2) + (0x1)) .word ((0x3 << 15) + (0x0 << 2) + (0x1)) @@ -183,7 +183,7 @@ SDRAMDATA: /* * - MT = 11 (= sync dram type) * - Trcd = 00 (= CL2) - * - SCAN = 01 (= 9 bit collumns) + * - SCAN = 01 (= 9 bit columns) */ .word ((0x3 << 15) + (0x0 << 2) + (0x1)) .word ((0x3 << 15) + (0x0 << 2) + (0x1)) diff --git a/arch/arm/boards/afi-gf/board.c b/arch/arm/boards/afi-gf/board.c index dfcb579f24..14e2603910 100644 --- a/arch/arm/boards/afi-gf/board.c +++ b/arch/arm/boards/afi-gf/board.c @@ -16,7 +16,7 @@ #include <common.h> #include <string.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <envfs.h> #include <bootsource.h> #include <asm/armlinux.h> diff --git a/arch/arm/boards/afi-gf/lowlevel.c b/arch/arm/boards/afi-gf/lowlevel.c index fdc340c057..4aaecb9e88 100644 --- a/arch/arm/boards/afi-gf/lowlevel.c +++ b/arch/arm/boards/afi-gf/lowlevel.c @@ -1,5 +1,5 @@ #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <asm/armlinux.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/boards/animeo_ip/init.c b/arch/arm/boards/animeo_ip/init.c index ca64d6df83..0fda01363c 100644 --- a/arch/arm/boards/animeo_ip/init.c +++ b/arch/arm/boards/animeo_ip/init.c @@ -17,7 +17,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/clk.h> #include <mach/board.h> @@ -93,6 +93,7 @@ static struct atmel_nand_data nand_pdata = { .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, + .ecc_mode = NAND_ECC_SOFT, .bus_width_16 = 0, .on_flash_bbt = 1, }; diff --git a/arch/arm/boards/archosg9/board.c b/arch/arm/boards/archosg9/board.c index 114c34ec24..0a3c0b9d98 100644 --- a/arch/arm/boards/archosg9/board.c +++ b/arch/arm/boards/archosg9/board.c @@ -18,7 +18,7 @@ #include <mach/omap4-silicon.h> #include <mach/omap4-devices.h> #include <mach/omap4_rom_usb.h> -#include <sizes.h> +#include <linux/sizes.h> #include <i2c/i2c.h> #include <gpio.h> #include <gpio_keys.h> diff --git a/arch/arm/boards/archosg9/lowlevel.c b/arch/arm/boards/archosg9/lowlevel.c index 6813e0d18a..c76d04b905 100644 --- a/arch/arm/boards/archosg9/lowlevel.c +++ b/arch/arm/boards/archosg9/lowlevel.c @@ -13,7 +13,7 @@ #include <common.h> #include <io.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <mach/omap4-mux.h> #include <mach/omap4-silicon.h> diff --git a/arch/arm/boards/at91rm9200ek/init.c b/arch/arm/boards/at91rm9200ek/init.c index c444669ff8..43c8b1b055 100644 --- a/arch/arm/boards/at91rm9200ek/init.c +++ b/arch/arm/boards/at91rm9200ek/init.c @@ -25,7 +25,7 @@ #include <gpio.h> #include <fcntl.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/hardware.h> #include <mach/at91_pmc.h> #include <mach/board.h> diff --git a/arch/arm/boards/at91sam9260ek/init.c b/arch/arm/boards/at91sam9260ek/init.c index bc0c411d3a..422feb2098 100644 --- a/arch/arm/boards/at91sam9260ek/init.c +++ b/arch/arm/boards/at91sam9260ek/init.c @@ -19,7 +19,7 @@ #include <generated/mach-types.h> #include <nand.h> #include <linux/mtd/nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/board.h> #include <mach/at91sam9_smc.h> #include <gpio.h> diff --git a/arch/arm/boards/at91sam9261ek/init.c b/arch/arm/boards/at91sam9261ek/init.c index 7b8ce98d5d..a0b0219191 100644 --- a/arch/arm/boards/at91sam9261ek/init.c +++ b/arch/arm/boards/at91sam9261ek/init.c @@ -26,7 +26,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <mach/at91_pmc.h> #include <mach/board.h> diff --git a/arch/arm/boards/at91sam9263ek/init.c b/arch/arm/boards/at91sam9263ek/init.c index c8a9d5c005..3bb2ddafa3 100644 --- a/arch/arm/boards/at91sam9263ek/init.c +++ b/arch/arm/boards/at91sam9263ek/init.c @@ -28,7 +28,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <mach/at91_pmc.h> #include <mach/board.h> diff --git a/arch/arm/boards/at91sam9m10g45ek/init.c b/arch/arm/boards/at91sam9m10g45ek/init.c index cdd7806848..e00908bc39 100644 --- a/arch/arm/boards/at91sam9m10g45ek/init.c +++ b/arch/arm/boards/at91sam9m10g45ek/init.c @@ -30,7 +30,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <mach/at91_pmc.h> #include <mach/board.h> diff --git a/arch/arm/boards/at91sam9m10ihd/init.c b/arch/arm/boards/at91sam9m10ihd/init.c index a432e5c411..dcd93c10b3 100644 --- a/arch/arm/boards/at91sam9m10ihd/init.c +++ b/arch/arm/boards/at91sam9m10ihd/init.c @@ -17,7 +17,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <mach/board.h> #include <gpio.h> diff --git a/arch/arm/boards/at91sam9n12ek/init.c b/arch/arm/boards/at91sam9n12ek/init.c index 818a598907..26d08ae659 100644 --- a/arch/arm/boards/at91sam9n12ek/init.c +++ b/arch/arm/boards/at91sam9n12ek/init.c @@ -27,7 +27,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <mach/board.h> #include <mach/at91sam9_smc.h> diff --git a/arch/arm/boards/at91sam9x5ek/init.c b/arch/arm/boards/at91sam9x5ek/init.c index 183ddc7052..e0c11a11e1 100644 --- a/arch/arm/boards/at91sam9x5ek/init.c +++ b/arch/arm/boards/at91sam9x5ek/init.c @@ -27,7 +27,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <mach/board.h> #include <mach/at91sam9_smc.h> diff --git a/arch/arm/boards/avnet-zedboard/board.c b/arch/arm/boards/avnet-zedboard/board.c index ef9a8a878c..722bda302e 100644 --- a/arch/arm/boards/avnet-zedboard/board.c +++ b/arch/arm/boards/avnet-zedboard/board.c @@ -19,7 +19,7 @@ #include <init.h> #include <mach/devices.h> #include <mach/zynq7000-regs.h> -#include <sizes.h> +#include <linux/sizes.h> static int zedboard_mem_init(void) { diff --git a/arch/arm/boards/beagle/board.c b/arch/arm/boards/beagle/board.c index 4054960581..775621069c 100644 --- a/arch/arm/boards/beagle/board.c +++ b/arch/arm/boards/beagle/board.c @@ -19,7 +19,7 @@ #include <console.h> #include <init.h> #include <driver.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <ns16550.h> #include <asm/armlinux.h> diff --git a/arch/arm/boards/beagle/lowlevel.c b/arch/arm/boards/beagle/lowlevel.c index 62c98a9cec..d6e6b9f91c 100644 --- a/arch/arm/boards/beagle/lowlevel.c +++ b/arch/arm/boards/beagle/lowlevel.c @@ -1,6 +1,6 @@ #include <init.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/control.h> diff --git a/arch/arm/boards/beaglebone/board.c b/arch/arm/boards/beaglebone/board.c index 3042189f6d..4e0e3745bb 100644 --- a/arch/arm/boards/beaglebone/board.c +++ b/arch/arm/boards/beaglebone/board.c @@ -27,7 +27,7 @@ #include <envfs.h> #include <environment.h> #include <globalvar.h> -#include <sizes.h> +#include <linux/sizes.h> #include <net.h> #include <envfs.h> #include <bootsource.h> @@ -92,6 +92,9 @@ static int beaglebone_devices_init(void) armlinux_set_architecture(MACH_TYPE_BEAGLEBONE); + if (IS_ENABLED(CONFIG_SHELL_NONE)) + return am33xx_of_register_bootdevice(); + return 0; } coredevice_initcall(beaglebone_devices_init); diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c index a742bbf7af..05b3e5f157 100644 --- a/arch/arm/boards/beaglebone/lowlevel.c +++ b/arch/arm/boards/beaglebone/lowlevel.c @@ -1,5 +1,5 @@ #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <linux/string.h> #include <debug_ll.h> diff --git a/arch/arm/boards/boundarydevices-nitrogen6x/lowlevel.c b/arch/arm/boards/boundarydevices-nitrogen6x/lowlevel.c index a32e29c3e4..7d859330f9 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6x/lowlevel.c +++ b/arch/arm/boards/boundarydevices-nitrogen6x/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/canon-a1100/lowlevel.c b/arch/arm/boards/canon-a1100/lowlevel.c index bbae825661..5f4297ea4c 100644 --- a/arch/arm/boards/canon-a1100/lowlevel.c +++ b/arch/arm/boards/canon-a1100/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c b/arch/arm/boards/ccxmx51/ccxmx51.c index 0960d1ecf7..40cf76dc5a 100644 --- a/arch/arm/boards/ccxmx51/ccxmx51.c +++ b/arch/arm/boards/ccxmx51/ccxmx51.c @@ -26,7 +26,7 @@ #include <partition.h> #include <fs.h> #include <fcntl.h> -#include <sizes.h> +#include <linux/sizes.h> #include <nand.h> #include <notifier.h> #include <spi/spi.h> diff --git a/arch/arm/boards/chumby_falconwing/falconwing.c b/arch/arm/boards/chumby_falconwing/falconwing.c index 2e5fca5f50..5e569bcc9a 100644 --- a/arch/arm/boards/chumby_falconwing/falconwing.c +++ b/arch/arm/boards/chumby_falconwing/falconwing.c @@ -19,7 +19,7 @@ #include <envfs.h> #include <errno.h> #include <mci.h> -#include <sizes.h> +#include <linux/sizes.h> #include <usb/ehci.h> #include <asm/armlinux.h> #include <io.h> diff --git a/arch/arm/boards/chumby_falconwing/lowlevel.c b/arch/arm/boards/chumby_falconwing/lowlevel.c index d26562c02b..bfc76cc7d4 100644 --- a/arch/arm/boards/chumby_falconwing/lowlevel.c +++ b/arch/arm/boards/chumby_falconwing/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx23-regs.h> diff --git a/arch/arm/boards/clep7212/clep7212.c b/arch/arm/boards/clep7212/clep7212.c index e521643912..de125ea9ee 100644 --- a/arch/arm/boards/clep7212/clep7212.c +++ b/arch/arm/boards/clep7212/clep7212.c @@ -12,7 +12,7 @@ #include <init.h> #include <partition.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/armlinux.h> #include <asm/mmu.h> #include <generated/mach-types.h> diff --git a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c index e6ebe82076..1412eff4a7 100644 --- a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c +++ b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c @@ -25,7 +25,7 @@ #include <mci.h> #include <io.h> #include <net.h> -#include <sizes.h> +#include <linux/sizes.h> #include <i2c/i2c.h> #include <i2c/i2c-gpio.h> diff --git a/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c b/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c index aa3b09b2ee..3c7248ef65 100644 --- a/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c +++ b/arch/arm/boards/crystalfontz-cfa10036/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx28-regs.h> diff --git a/arch/arm/boards/datamodul-edm-qmx6/Makefile b/arch/arm/boards/datamodul-edm-qmx6/Makefile index bb6d9d848d..01c7a259e9 100644 --- a/arch/arm/boards/datamodul-edm-qmx6/Makefile +++ b/arch/arm/boards/datamodul-edm-qmx6/Makefile @@ -1,2 +1,2 @@ -obj-y += board.o lowlevel.o -pbl-y += lowlevel.o +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/datamodul-edm-qmx6/board.c b/arch/arm/boards/datamodul-edm-qmx6/board.c index 25f45dfcc0..81356e61c0 100644 --- a/arch/arm/boards/datamodul-edm-qmx6/board.c +++ b/arch/arm/boards/datamodul-edm-qmx6/board.c @@ -23,7 +23,7 @@ #include <partition.h> #include <common.h> #include <envfs.h> -#include <sizes.h> +#include <linux/sizes.h> #include <init.h> #include <gpio.h> #include <fec.h> diff --git a/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c b/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c index 914c275b88..28b4aa280d 100644 --- a/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c +++ b/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c @@ -13,7 +13,7 @@ * */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <debug_ll.h> #include <asm/sections.h> diff --git a/arch/arm/boards/dfi-fs700-m60/board.c b/arch/arm/boards/dfi-fs700-m60/board.c index e0dc5b242e..bef4612d9e 100644 --- a/arch/arm/boards/dfi-fs700-m60/board.c +++ b/arch/arm/boards/dfi-fs700-m60/board.c @@ -23,7 +23,7 @@ #include <bootsource.h> #include <globalvar.h> #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <envfs.h> #include <init.h> #include <gpio.h> diff --git a/arch/arm/boards/dfi-fs700-m60/lowlevel.c b/arch/arm/boards/dfi-fs700-m60/lowlevel.c index 81b3530468..b9b498e463 100644 --- a/arch/arm/boards/dfi-fs700-m60/lowlevel.c +++ b/arch/arm/boards/dfi-fs700-m60/lowlevel.c @@ -13,7 +13,7 @@ * */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <asm/sections.h> #include <asm/mmu.h> diff --git a/arch/arm/boards/ebv-socrates/board.c b/arch/arm/boards/ebv-socrates/board.c index b2f62dc2f3..5d2d619914 100644 --- a/arch/arm/boards/ebv-socrates/board.c +++ b/arch/arm/boards/ebv-socrates/board.c @@ -5,7 +5,7 @@ #include <asm/armlinux.h> #include <linux/micrel_phy.h> #include <linux/phy.h> -#include <sizes.h> +#include <linux/sizes.h> #include <fcntl.h> #include <fs.h> #include <mach/socfpga-regs.h> diff --git a/arch/arm/boards/ebv-socrates/lowlevel.c b/arch/arm/boards/ebv-socrates/lowlevel.c index 7fc81678ef..66cb226b21 100644 --- a/arch/arm/boards/ebv-socrates/lowlevel.c +++ b/arch/arm/boards/ebv-socrates/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/efika-mx-smartbook/board.c b/arch/arm/boards/efika-mx-smartbook/board.c index 99efd666f9..4a38afd27b 100644 --- a/arch/arm/boards/efika-mx-smartbook/board.c +++ b/arch/arm/boards/efika-mx-smartbook/board.c @@ -246,6 +246,8 @@ static int efikamx_late_init(void) for (i = 0; i < ARRAY_SIZE(leds); i++) led_gpio_register(&leds[i]); + led_set_trigger(LED_TRIGGER_HEARTBEAT, &leds[0].led); + writew(0x0, MX51_WDOG_BASE_ADDR + 0x8); imx51_bbu_internal_mmc_register_handler("mmc", "/dev/mmc1", diff --git a/arch/arm/boards/embedsky-e9/board.c b/arch/arm/boards/embedsky-e9/board.c index 55b4320219..1e7e06788a 100644 --- a/arch/arm/boards/embedsky-e9/board.c +++ b/arch/arm/boards/embedsky-e9/board.c @@ -31,7 +31,7 @@ #include <asm/io.h> #include <asm/mmu.h> #include <mach/generic.h> -#include <sizes.h> +#include <linux/sizes.h> #include <net.h> #include <mach/imx6.h> #include <mach/devices-imx6.h> diff --git a/arch/arm/boards/embedsky-e9/lowlevel.c b/arch/arm/boards/embedsky-e9/lowlevel.c index fee1011700..fb1ba5f64a 100644 --- a/arch/arm/boards/embedsky-e9/lowlevel.c +++ b/arch/arm/boards/embedsky-e9/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/embest-riotboard/board.c b/arch/arm/boards/embest-riotboard/board.c index 3f5b4dec51..a885a08a70 100644 --- a/arch/arm/boards/embest-riotboard/board.c +++ b/arch/arm/boards/embest-riotboard/board.c @@ -26,7 +26,7 @@ #include <mach/imx6.h> #include <mach/bbu.h> #include <mfd/imx6q-iomuxc-gpr.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/phy.h> static int ar8035_phy_fixup(struct phy_device *dev) diff --git a/arch/arm/boards/embest-riotboard/lowlevel.c b/arch/arm/boards/embest-riotboard/lowlevel.c index c4ef28786e..fe21b9aadc 100644 --- a/arch/arm/boards/embest-riotboard/lowlevel.c +++ b/arch/arm/boards/embest-riotboard/lowlevel.c @@ -1,6 +1,6 @@ #include <debug_ll.h> #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/freescale-mx21-ads/imx21ads.c b/arch/arm/boards/freescale-mx21-ads/imx21ads.c index bd7e46e161..5f0e7bda63 100644 --- a/arch/arm/boards/freescale-mx21-ads/imx21ads.c +++ b/arch/arm/boards/freescale-mx21-ads/imx21ads.c @@ -30,7 +30,7 @@ #include <mach/weim.h> #include <partition.h> #include <fs.h> -#include <sizes.h> +#include <linux/sizes.h> #include <fcntl.h> #include <generated/mach-types.h> #include <mach/imx-nand.h> diff --git a/arch/arm/boards/freescale-mx21-ads/lowlevel_init.S b/arch/arm/boards/freescale-mx21-ads/lowlevel_init.S index 87b2f942ff..16739b5577 100644 --- a/arch/arm/boards/freescale-mx21-ads/lowlevel_init.S +++ b/arch/arm/boards/freescale-mx21-ads/lowlevel_init.S @@ -14,7 +14,7 @@ */ #include <config.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm-generic/memory_layout.h> #include <mach/imx21-regs.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/boards/freescale-mx23-evk/lowlevel.c b/arch/arm/boards/freescale-mx23-evk/lowlevel.c index 2a26a7763e..b260f3a7fa 100644 --- a/arch/arm/boards/freescale-mx23-evk/lowlevel.c +++ b/arch/arm/boards/freescale-mx23-evk/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx23-regs.h> diff --git a/arch/arm/boards/freescale-mx28-evk/lowlevel.c b/arch/arm/boards/freescale-mx28-evk/lowlevel.c index aa3b09b2ee..3c7248ef65 100644 --- a/arch/arm/boards/freescale-mx28-evk/lowlevel.c +++ b/arch/arm/boards/freescale-mx28-evk/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx28-regs.h> diff --git a/arch/arm/boards/freescale-mx35-3ds/3stack.c b/arch/arm/boards/freescale-mx35-3ds/3stack.c index 8f821adb73..cca0fe49eb 100644 --- a/arch/arm/boards/freescale-mx35-3ds/3stack.c +++ b/arch/arm/boards/freescale-mx35-3ds/3stack.c @@ -30,7 +30,7 @@ #include <init.h> #include <nand.h> #include <net.h> -#include <sizes.h> +#include <linux/sizes.h> #include <partition.h> #include <gpio.h> diff --git a/arch/arm/boards/freescale-mx53-qsb/board.c b/arch/arm/boards/freescale-mx53-qsb/board.c index 1128e686bc..f65b55658f 100644 --- a/arch/arm/boards/freescale-mx53-qsb/board.c +++ b/arch/arm/boards/freescale-mx53-qsb/board.c @@ -17,7 +17,7 @@ #include <environment.h> #include <partition.h> #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <init.h> #include <fs.h> diff --git a/arch/arm/boards/freescale-mx53-smd/board.c b/arch/arm/boards/freescale-mx53-smd/board.c index c81f43c158..196d20a45d 100644 --- a/arch/arm/boards/freescale-mx53-smd/board.c +++ b/arch/arm/boards/freescale-mx53-smd/board.c @@ -23,7 +23,7 @@ #include <nand.h> #include <net.h> #include <partition.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <generated/mach-types.h> diff --git a/arch/arm/boards/freescale-mx53-vmx53/board.c b/arch/arm/boards/freescale-mx53-vmx53/board.c index b91bfdf5ed..1859aaca26 100644 --- a/arch/arm/boards/freescale-mx53-vmx53/board.c +++ b/arch/arm/boards/freescale-mx53-vmx53/board.c @@ -18,7 +18,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <generated/mach-types.h> #include <mach/imx5.h> diff --git a/arch/arm/boards/freescale-mx6-arm2/board.c b/arch/arm/boards/freescale-mx6-arm2/board.c index 7a78400f2e..3d5576c065 100644 --- a/arch/arm/boards/freescale-mx6-arm2/board.c +++ b/arch/arm/boards/freescale-mx6-arm2/board.c @@ -25,7 +25,7 @@ #include <asm/io.h> #include <asm/mmu.h> #include <mach/generic.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/imx6.h> #include <mach/devices-imx6.h> #include <mach/iomux-mx6.h> diff --git a/arch/arm/boards/freescale-mx6-arm2/lowlevel.c b/arch/arm/boards/freescale-mx6-arm2/lowlevel.c index 5676711a13..f833893335 100644 --- a/arch/arm/boards/freescale-mx6-arm2/lowlevel.c +++ b/arch/arm/boards/freescale-mx6-arm2/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/generic.h> diff --git a/arch/arm/boards/freescale-mx6-sabrelite/board.c b/arch/arm/boards/freescale-mx6-sabrelite/board.c index 1f26548058..edf081140c 100644 --- a/arch/arm/boards/freescale-mx6-sabrelite/board.c +++ b/arch/arm/boards/freescale-mx6-sabrelite/board.c @@ -28,7 +28,7 @@ #include <asm/io.h> #include <asm/mmu.h> #include <mach/generic.h> -#include <sizes.h> +#include <linux/sizes.h> #include <net.h> #include <linux/micrel_phy.h> #include <mach/imx6.h> diff --git a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c index 1b4796571a..abfb77a157 100644 --- a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c +++ b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/freescale-mx6-sabresd/board.c b/arch/arm/boards/freescale-mx6-sabresd/board.c index 53aada7bba..734adde070 100644 --- a/arch/arm/boards/freescale-mx6-sabresd/board.c +++ b/arch/arm/boards/freescale-mx6-sabresd/board.c @@ -28,7 +28,7 @@ #include <asm/io.h> #include <asm/mmu.h> #include <mach/generic.h> -#include <sizes.h> +#include <linux/sizes.h> #include <net.h> #include <mach/imx6.h> #include <mach/devices-imx6.h> diff --git a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c index bf1845912e..73eed1d068 100644 --- a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c +++ b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/board.c b/arch/arm/boards/freescale-mx6sx-sabresdb/board.c index c21b43dc56..353b460a16 100644 --- a/arch/arm/boards/freescale-mx6sx-sabresdb/board.c +++ b/arch/arm/boards/freescale-mx6sx-sabresdb/board.c @@ -16,7 +16,7 @@ #include <environment.h> #include <partition.h> #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <init.h> #include <io.h> diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c b/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c index 33f3700288..4c5a74ea63 100644 --- a/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c +++ b/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c @@ -14,7 +14,7 @@ #include <debug_ll.h> #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/friendlyarm-mini2440/config.h b/arch/arm/boards/friendlyarm-mini2440/config.h index 347930224e..489697f6d5 100644 --- a/arch/arm/boards/friendlyarm-mini2440/config.h +++ b/arch/arm/boards/friendlyarm-mini2440/config.h @@ -96,7 +96,7 @@ /* * - MT = 11 (= sync dram type) * - Trcd = 00 (= CL2) - * - SCAN = 01 (= 9 bit collumns) + * - SCAN = 01 (= 9 bit columns) */ #define BOARD_SPECIFIC_BANKCON6 ((0x3 << 15) + (0x0 << 2) + (0x1)) #define BOARD_SPECIFIC_BANKCON7 0 /* disabled */ diff --git a/arch/arm/boards/friendlyarm-mini2440/lowlevel_init.S b/arch/arm/boards/friendlyarm-mini2440/lowlevel_init.S index 858351b13d..43bf49c12c 100644 --- a/arch/arm/boards/friendlyarm-mini2440/lowlevel_init.S +++ b/arch/arm/boards/friendlyarm-mini2440/lowlevel_init.S @@ -3,7 +3,7 @@ */ #include <config.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/s3c-iomap.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/boards/friendlyarm-mini6410/lowlevel.c b/arch/arm/boards/friendlyarm-mini6410/lowlevel.c index a21a3f8301..665c31b324 100644 --- a/arch/arm/boards/friendlyarm-mini6410/lowlevel.c +++ b/arch/arm/boards/friendlyarm-mini6410/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/s3c-iomap.h> diff --git a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c index 7e70851043..3ab8d66060 100644 --- a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c +++ b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c @@ -19,7 +19,7 @@ #include <common.h> #include <init.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <asm/sections.h> diff --git a/arch/arm/boards/friendlyarm-tiny210/tiny210.c b/arch/arm/boards/friendlyarm-tiny210/tiny210.c index a33af99aab..d84b3128ad 100644 --- a/arch/arm/boards/friendlyarm-tiny210/tiny210.c +++ b/arch/arm/boards/friendlyarm-tiny210/tiny210.c @@ -27,7 +27,7 @@ #include <common.h> #include <driver.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <generated/mach-types.h> #include <dm9000.h> #include <gpio.h> diff --git a/arch/arm/boards/friendlyarm-tiny6410/lowlevel.c b/arch/arm/boards/friendlyarm-tiny6410/lowlevel.c index a21a3f8301..665c31b324 100644 --- a/arch/arm/boards/friendlyarm-tiny6410/lowlevel.c +++ b/arch/arm/boards/friendlyarm-tiny6410/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/s3c-iomap.h> diff --git a/arch/arm/boards/gateworks-ventana/lowlevel.c b/arch/arm/boards/gateworks-ventana/lowlevel.c index 10b2c4c780..746beb87e5 100644 --- a/arch/arm/boards/gateworks-ventana/lowlevel.c +++ b/arch/arm/boards/gateworks-ventana/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/gk802/board.c b/arch/arm/boards/gk802/board.c index 9dd22533fc..0d1b07b0e0 100644 --- a/arch/arm/boards/gk802/board.c +++ b/arch/arm/boards/gk802/board.c @@ -24,7 +24,7 @@ #include <mach/imx6-regs.h> #include <mach/imx6.h> #include <mfd/imx6q-iomuxc-gpr.h> -#include <sizes.h> +#include <linux/sizes.h> #include <of.h> #define GK802_GPIO_RECOVERY_BTN IMX_GPIO_NR(3, 16) /* recovery button */ diff --git a/arch/arm/boards/gk802/lowlevel.c b/arch/arm/boards/gk802/lowlevel.c index de744a2052..b571969884 100644 --- a/arch/arm/boards/gk802/lowlevel.c +++ b/arch/arm/boards/gk802/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/globalscale-guruplug/lowlevel.c b/arch/arm/boards/globalscale-guruplug/lowlevel.c index 508746a06f..91bc1cf565 100644 --- a/arch/arm/boards/globalscale-guruplug/lowlevel.c +++ b/arch/arm/boards/globalscale-guruplug/lowlevel.c @@ -15,7 +15,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/globalscale-mirabox/lowlevel.c b/arch/arm/boards/globalscale-mirabox/lowlevel.c index 92203b768a..4f55d1acb9 100644 --- a/arch/arm/boards/globalscale-mirabox/lowlevel.c +++ b/arch/arm/boards/globalscale-mirabox/lowlevel.c @@ -15,7 +15,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/guf-santaro/board.c b/arch/arm/boards/guf-santaro/board.c index 8fbfe269b0..b9a52ee258 100644 --- a/arch/arm/boards/guf-santaro/board.c +++ b/arch/arm/boards/guf-santaro/board.c @@ -20,7 +20,7 @@ #include <asm/io.h> #include <asm/mmu.h> #include <mach/generic.h> -#include <sizes.h> +#include <linux/sizes.h> #include <bootsource.h> #include <bbu.h> #include <mach/bbu.h> diff --git a/arch/arm/boards/guf-santaro/lowlevel.c b/arch/arm/boards/guf-santaro/lowlevel.c index 02de84c7b9..7753cea4e2 100644 --- a/arch/arm/boards/guf-santaro/lowlevel.c +++ b/arch/arm/boards/guf-santaro/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/guf-vincell/board.c b/arch/arm/boards/guf-vincell/board.c index bacab0bd1f..0c46ade9fc 100644 --- a/arch/arm/boards/guf-vincell/board.c +++ b/arch/arm/boards/guf-vincell/board.c @@ -23,7 +23,7 @@ #include <nand.h> #include <net.h> #include <partition.h> -#include <sizes.h> +#include <linux/sizes.h> #include <bbu.h> #include <gpio.h> #include <io.h> diff --git a/arch/arm/boards/highbank/init.c b/arch/arm/boards/highbank/init.c index 7b4f9637df..a0d4b30b48 100644 --- a/arch/arm/boards/highbank/init.c +++ b/arch/arm/boards/highbank/init.c @@ -14,7 +14,7 @@ #include <mach/sysregs.h> #include <environment.h> #include <partition.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <of.h> diff --git a/arch/arm/boards/highbank/lowlevel.c b/arch/arm/boards/highbank/lowlevel.c index c0405ed3a4..83f4c7ad15 100644 --- a/arch/arm/boards/highbank/lowlevel.c +++ b/arch/arm/boards/highbank/lowlevel.c @@ -5,7 +5,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <asm/system_info.h> diff --git a/arch/arm/boards/imx233-olinuxino/Makefile b/arch/arm/boards/imx233-olinuxino/Makefile index 644f7e5802..987b34394a 100644 --- a/arch/arm/boards/imx233-olinuxino/Makefile +++ b/arch/arm/boards/imx233-olinuxino/Makefile @@ -1,2 +1,3 @@ obj-y = imx23-olinuxino.o lwl-y += lowlevel.o +bbenv-y += defaultenv-imx233-olinuxino diff --git a/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/boot/sd b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/boot/sd new file mode 100644 index 0000000000..3ddfb9de20 --- /dev/null +++ b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/boot/sd @@ -0,0 +1,6 @@ +#!/bin/sh + +global.bootm.image=/mnt/sd-boot/linuximage +global.bootm.oftree=/mnt/sd-boot/imx23-olinuxino.dtb +#global.bootm.initrd=<path to initrd> +global.linux.bootargs.dyn.root="root=/dev/mmcblk0p3 rootfstype=ext4 rw rootwait" diff --git a/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/init/automount-sd b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/init/automount-sd new file mode 100644 index 0000000000..eb34c9b8ca --- /dev/null +++ b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/init/automount-sd @@ -0,0 +1,4 @@ +#!/bin/sh + +mkdir -p /mnt/sd-boot +automount -d /mnt/sd-boot 'detect mci0 && [ -e /dev/disk0.1 ] && mount /dev/disk0.1 /mnt/sd-boot' diff --git a/arch/arm/boards/imx233-olinuxino/env/network/eth0-discover b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/network/eth0-discover index 76494fe6ea..76494fe6ea 100644 --- a/arch/arm/boards/imx233-olinuxino/env/network/eth0-discover +++ b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/network/eth0-discover diff --git a/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/nv/boot.default b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/nv/boot.default new file mode 100644 index 0000000000..e1476cfc20 --- /dev/null +++ b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/nv/boot.default @@ -0,0 +1 @@ +sd diff --git a/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/nv/hostname b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/nv/hostname new file mode 100644 index 0000000000..e5646edbc0 --- /dev/null +++ b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/nv/hostname @@ -0,0 +1 @@ +olinuxino diff --git a/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/nv/linux.bootargs.base b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/nv/linux.bootargs.base new file mode 100644 index 0000000000..5b56cafbec --- /dev/null +++ b/arch/arm/boards/imx233-olinuxino/defaultenv-imx233-olinuxino/nv/linux.bootargs.base @@ -0,0 +1 @@ +console=ttyAMA0,115200 diff --git a/arch/arm/boards/imx233-olinuxino/env/bin/boot b/arch/arm/boards/imx233-olinuxino/env/bin/boot deleted file mode 100644 index 60dd93f297..0000000000 --- a/arch/arm/boards/imx233-olinuxino/env/bin/boot +++ /dev/null @@ -1,32 +0,0 @@ -#!/bin/sh - -. /env/config - -if [ x$1 = xdisk ]; then - rootfs_loc=disk - kernel_loc=disk -elif [ x$1 = xnet ]; then - rootfs_loc=net - kernel_loc=net -fi - -if [ x$ip = xdhcp ]; then - bootargs="$bootargs ip=dhcp" -elif [ x$ip = xnone ]; then - bootargs="$bootargs ip=none" -else - bootargs="$bootargs ip=$eth0.ipaddr::$eth0.gateway:$eth0.netmask:::" -fi - -if [ x$rootfs_loc = xdisk ]; then - bootargs="$bootargs noinitrd rootfstype=$rootfs_type root=/dev/$rootfs_part" -elif [ x$rootfs_loc = xnet ]; then - bootargs="$bootargs root=/dev/nfs nfsroot=$nfsroot,v3,tcp noinitrd" -elif [ x$rootfs_loc = xinitrd ]; then - bootargs="$bootargs root=/dev/ram0 rdinit=/sbin/init" -fi - - -bootm -o $oftree_loc/imx23-olinuxino.dtb /dev/$kernel_part - -echo "Booting failed. Correct setup of 'kernel_part'?" diff --git a/arch/arm/boards/imx233-olinuxino/env/bin/init b/arch/arm/boards/imx233-olinuxino/env/bin/init deleted file mode 100644 index 3ed68f76c5..0000000000 --- a/arch/arm/boards/imx233-olinuxino/env/bin/init +++ /dev/null @@ -1,15 +0,0 @@ -#!/bin/sh - -PATH=/env/bin -export PATH - -. /env/config - -echo -echo -n "Hit any key to stop autoboot: " -timeout -a $autoboot_timeout -if [ $? != 0 ]; then - exit -fi - -boot diff --git a/arch/arm/boards/imx233-olinuxino/env/config b/arch/arm/boards/imx233-olinuxino/env/config deleted file mode 100644 index c84014ff58..0000000000 --- a/arch/arm/boards/imx233-olinuxino/env/config +++ /dev/null @@ -1,40 +0,0 @@ -#!/bin/sh - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=none - -# or set your networking parameters here (if a USB network adapter is attached) -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d - -# can be either 'net' or 'disk' -kernel_loc=disk - -# can be either 'net', or 'disk' or 'initrd' -rootfs_loc=disk - -# can be any regular filesystem like ext2, ext3, reiserfs in case of 'rootfs_loc=disk' -rootfs_type=ext3 - -# Where is the rootfs in case of 'rootfs_loc=disk' -rootfs_part=mmcblk0p4 - -# Where is the rootfs in case of 'rootfs_loc=net' -nfsroot=FIXME - -# Where to get the kernel image in case of 'kernel_loc=disk' -kernel_part=disk0.2 - -# Where to get the device tree image in case of 'kernel_loc=disk' -oftree_loc=env/oftree - -# base kernel parameter -bootargs="console=ttyAMA0,115200 rw rootwait" - -autoboot_timeout=2 - -# set a fancy prompt (if support is compiled in) -PS1="\e[1;32mbarebox@\e[1;31m\h:\w\e[0m " diff --git a/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c b/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c index fa95d72339..b87a6764f3 100644 --- a/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c +++ b/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c @@ -20,6 +20,7 @@ #include <common.h> #include <init.h> #include <gpio.h> +#include <led.h> #include <environment.h> #include <envfs.h> #include <errno.h> @@ -39,60 +40,6 @@ static struct mxs_mci_platform_data mci_pdata = { .f_min = 400000, }; -static const uint32_t pad_setup[] = { - /* debug port */ - PWM1_DUART_TX | STRENGTH(S4MA), /* PWM0/DUART_TXD - U_DEBUG PIN 2 */ - PWM0_DUART_RX | STRENGTH(S4MA), /* PWM0/DUART_RXD - U_DEBUG PIN 1 */ - - /* auart */ - I2C_SDA_AUART1_RX | STRENGTH(S4MA), - I2C_CLK_AUART1_TX | STRENGTH(S4MA), - - /* lcd */ - LCD_D17 | STRENGTH(S12MA), /*PIN18/LCD_D17 - GPIO PIN 3 */ - LCD_D16 | STRENGTH(S12MA), - LCD_D15 | STRENGTH(S12MA), - LCD_D14 | STRENGTH(S12MA), - LCD_D13 | STRENGTH(S12MA), - LCD_D12 | STRENGTH(S12MA), - LCD_D11 | STRENGTH(S12MA), - LCD_D10 | STRENGTH(S12MA), - LCD_D9 | STRENGTH(S12MA), - LCD_D8 | STRENGTH(S12MA), - LCD_D7 | STRENGTH(S12MA), - LCD_D6 | STRENGTH(S12MA), - LCD_D5 | STRENGTH(S12MA), - LCD_D4 | STRENGTH(S12MA), - LCD_D3 | STRENGTH(S12MA), - LCD_D2 | STRENGTH(S12MA), /* PIN3/LCD_D02 - GPIO PIN 31*/ - LCD_D1 | STRENGTH(S12MA), /* PIN2/LCD_D01 - GPIO PIN 33*/ - LCD_D0 | STRENGTH(S12MA), /* PIN1/LCD_D00 - GPIO PIN 35*/ - LCD_CS, /* PIN26/LCD_CS - GPIO PIN 20*/ - LCD_RS, /* PIN25/LCD_RS - GPIO PIN 18*/ - LCD_WR, /* PIN24/LCD_WR - GPIO PIN 16*/ - LCD_RESET, /* PIN23/LCD_DISP - GPIO PIN 14*/ - LCD_ENABE | STRENGTH(S12MA), /* PIN22/LCD_EN/I2C_SCL - GPIO PIN 12*/ - LCD_VSYNC | STRENGTH(S12MA), /* PIN21/LCD_HSYNC/I2C_SDA- GPIO PIN 10*/ - LCD_HSYNC | STRENGTH(S12MA), /* PIN20/LCD_VSYNC - GPIO PIN 8*/ - LCD_DOTCLOCK | STRENGTH(S12MA), /* PIN19/LCD_DOTCLK - GPIO PIN 6*/ - - - /* SD card interface */ - SSP1_DATA0 | PULLUP(1), - SSP1_DATA1 | PULLUP(1), - SSP1_DATA2 | PULLUP(1), - SSP1_DATA3 | PULLUP(1), - SSP1_SCK, - SSP1_CMD | PULLUP(1), - SSP1_DETECT | PULLUP(1), - - /* led */ - SSP1_DETECT_GPIO | GPIO_OUT | GPIO_VALUE(1), - - /* gpio - USB hub LAN9512-JZX*/ - GPMI_ALE_GPIO | GPIO_OUT | GPIO_VALUE(1), -}; - static int imx23_olinuxino_mem_init(void) { arm_add_mem_device("ram0", IMX_MEMORY_BASE, 64 * 1024 * 1024); @@ -103,21 +50,25 @@ mem_initcall(imx23_olinuxino_mem_init); static void olinuxino_init_usb(void) { - imx23_usb_phy_enable(); add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, IMX_USB_BASE, NULL); } +static struct gpio_led led1 = { + .gpio = 65, + .led = { + .name = "led1", + } +}; + static int imx23_olinuxino_devices_init(void) { - int i; - - /* initizalize gpios */ - for (i = 0; i < ARRAY_SIZE(pad_setup); i++) - imx_gpio_mode(pad_setup[i]); - armlinux_set_architecture(MACH_TYPE_IMX233_OLINUXINO); + defaultenv_append_directory(defaultenv_imx233_olinuxino); + + led_gpio_register(&led1); + led_set_trigger(LED_TRIGGER_HEARTBEAT, &led1.led); add_generic_device("mxs_mci", DEVICE_ID_DYNAMIC, NULL, IMX_SSP1_BASE, 0x8000, IORESOURCE_MEM, &mci_pdata); diff --git a/arch/arm/boards/imx233-olinuxino/lowlevel.c b/arch/arm/boards/imx233-olinuxino/lowlevel.c index d26562c02b..6e4b830485 100644 --- a/arch/arm/boards/imx233-olinuxino/lowlevel.c +++ b/arch/arm/boards/imx233-olinuxino/lowlevel.c @@ -1,11 +1,177 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx23-regs.h> +#include <mach/init.h> +#include <io.h> +#include <debug_ll.h> +#include <mach/iomux.h> -void __naked barebox_arm_reset_vector(void) +ENTRY_FUNCTION(start_barebox_olinuxino_imx23, r0, r1, r2) { - arm_cpu_lowlevel_init(); barebox_arm_entry(IMX_MEMORY_BASE, SZ_64M, NULL); } + +static const uint32_t pad_setup[] = { + /* debug port */ + PWM1_DUART_TX | STRENGTH(S4MA), /* PWM0/DUART_TXD - U_DEBUG PIN 2 */ + PWM0_DUART_RX | STRENGTH(S4MA), /* PWM0/DUART_RXD - U_DEBUG PIN 1 */ + + /* SDRAM */ + EMI_D0 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D1 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D2 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D3 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D4 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D5 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D6 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D7 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D8 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D9 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D10 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D11 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D12 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D13 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D14 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_D15 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_DQM0 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_DQM1 | VE_2_5V | STRENGTH(S12MA) | PULLUP(1), + EMI_DQS0 | VE_2_5V | STRENGTH(S12MA), + EMI_DQS1 | VE_2_5V | STRENGTH(S12MA), + + EMI_CLK | VE_2_5V | STRENGTH(S12MA), + EMI_CLKN | VE_2_5V | STRENGTH(S12MA), + EMI_A0 | VE_2_5V | STRENGTH(S12MA), + EMI_A1 | VE_2_5V | STRENGTH(S12MA), + EMI_A2 | VE_2_5V | STRENGTH(S12MA), + EMI_A3 | VE_2_5V | STRENGTH(S12MA), + EMI_A4 | VE_2_5V | STRENGTH(S12MA), + EMI_A5 | VE_2_5V | STRENGTH(S12MA), + EMI_A6 | VE_2_5V | STRENGTH(S12MA), + EMI_A7 | VE_2_5V | STRENGTH(S12MA), + EMI_A8 | VE_2_5V | STRENGTH(S12MA), + EMI_A9 | VE_2_5V | STRENGTH(S12MA), + EMI_A10 | VE_2_5V | STRENGTH(S12MA), + EMI_A11 | VE_2_5V | STRENGTH(S12MA), + EMI_A12 | VE_2_5V | STRENGTH(S12MA), + EMI_BA0 | VE_2_5V | STRENGTH(S12MA), + EMI_BA1 | VE_2_5V | STRENGTH(S12MA), + + EMI_CASN | VE_2_5V | STRENGTH(S12MA), + EMI_CE0N | VE_2_5V | STRENGTH(S12MA), + EMI_CE1N | VE_2_5V | STRENGTH(S12MA), + EMI_CKE | VE_2_5V | STRENGTH(S12MA), + EMI_RASN | VE_2_5V | STRENGTH(S12MA), + EMI_WEN | VE_2_5V | STRENGTH(S12MA), + + /* auart */ + I2C_SDA_AUART1_RX | STRENGTH(S4MA), + I2C_CLK_AUART1_TX | STRENGTH(S4MA), + + /* LCD */ + LCD_D17 | STRENGTH(S12MA), /*PIN18/LCD_D17 - GPIO PIN 3 */ + LCD_D16 | STRENGTH(S12MA), + LCD_D15 | STRENGTH(S12MA), + LCD_D14 | STRENGTH(S12MA), + LCD_D13 | STRENGTH(S12MA), + LCD_D12 | STRENGTH(S12MA), + LCD_D11 | STRENGTH(S12MA), + LCD_D10 | STRENGTH(S12MA), + LCD_D9 | STRENGTH(S12MA), + LCD_D8 | STRENGTH(S12MA), + LCD_D7 | STRENGTH(S12MA), + LCD_D6 | STRENGTH(S12MA), + LCD_D5 | STRENGTH(S12MA), + LCD_D4 | STRENGTH(S12MA), + LCD_D3 | STRENGTH(S12MA), + LCD_D2 | STRENGTH(S12MA), /* PIN3/LCD_D02 - GPIO PIN 31*/ + LCD_D1 | STRENGTH(S12MA), /* PIN2/LCD_D01 - GPIO PIN 33*/ + LCD_D0 | STRENGTH(S12MA), /* PIN1/LCD_D00 - GPIO PIN 35*/ + LCD_CS, /* PIN26/LCD_CS - GPIO PIN 20*/ + LCD_RS, /* PIN25/LCD_RS - GPIO PIN 18*/ + LCD_WR, /* PIN24/LCD_WR - GPIO PIN 16*/ + LCD_RESET, /* PIN23/LCD_DISP - GPIO PIN 14*/ + LCD_ENABE | STRENGTH(S12MA), /* PIN22/LCD_EN/I2C_SCL - GPIO PIN 12*/ + LCD_VSYNC | STRENGTH(S12MA), /* PIN21/LCD_HSYNC/I2C_SDA- GPIO PIN 10*/ + LCD_HSYNC | STRENGTH(S12MA), /* PIN20/LCD_VSYNC - GPIO PIN 8*/ + LCD_DOTCLOCK | STRENGTH(S12MA), /* PIN19/LCD_DOTCLK - GPIO PIN 6*/ + + /* SD card interface */ + SSP1_DATA0 | PULLUP(1), + SSP1_DATA1 | PULLUP(1), + SSP1_DATA2 | PULLUP(1), + SSP1_DATA3 | PULLUP(1), + SSP1_SCK, + SSP1_CMD | PULLUP(1), + SSP1_DETECT | PULLUP(1), + + /* LED */ + SSP1_DETECT_GPIO | GPIO_OUT | GPIO_VALUE(1), + + /* GPIO - USB hub LAN9512-JZX*/ + GPMI_ALE_GPIO | GPIO_OUT | GPIO_VALUE(1), +}; + + +/* Fine-tune the DRAM configuration. */ +void imx23_olinuxino_adjust_memory_params(uint32_t *dram_vals) +{ + /* Enable Auto Precharge. */ + dram_vals[3] |= 1 << 8; + /* Enable Fast Writes. */ + dram_vals[5] |= 1 << 8; + /* tEMRS = 3*tCK */ + dram_vals[10] &= ~(0x3 << 8); + dram_vals[10] |= (0x3 << 8); + /* CASLAT = 3*tCK */ + dram_vals[11] &= ~(0x3 << 0); + dram_vals[11] |= (0x3 << 0); + /* tCKE = 1*tCK */ + dram_vals[12] &= ~(0x7 << 0); + dram_vals[12] |= (0x1 << 0); + /* CASLAT_LIN_GATE = 3*tCK , CASLAT_LIN = 3*tCK, tWTR=2*tCK */ + dram_vals[13] &= ~((0xf << 16) | (0xf << 24) | (0xf << 0)); + dram_vals[13] |= (0x6 << 16) | (0x6 << 24) | (0x2 << 0); + /* tDAL = 6*tCK */ + dram_vals[15] &= ~(0xf << 16); + dram_vals[15] |= (0x6 << 16); + /* tREF = 1040*tCK */ + dram_vals[26] &= ~0xffff; + dram_vals[26] |= 0x0410; + /* tRAS_MAX = 9334*tCK */ + dram_vals[32] &= ~0xffff; + dram_vals[32] |= 0x2475; +} + +static noinline void imx23_olinuxino_init(void) +{ + int i; + + /* initizalize gpios */ + for (i = 0; i < ARRAY_SIZE(pad_setup); i++) + imx_gpio_mode(pad_setup[i]); + + pr_debug("initializing power...\n"); + + mx23_power_init(); + + pr_debug("initializing SDRAM...\n"); + + imx23_olinuxino_adjust_memory_params(mx23_dram_vals); + mx23_mem_init(); + + pr_debug("DONE\n"); +} + +ENTRY_FUNCTION(prep_start_barebox_olinuxino_imx23, r0, r1, r2) +{ + void (*back)(unsigned long) = (void *)get_lr(); + + relocate_to_current_adr(); + setup_c(); + + imx23_olinuxino_init(); + + back(0); +} diff --git a/arch/arm/boards/karo-tx25/board.c b/arch/arm/boards/karo-tx25/board.c index 59c81b2faa..ebebd58d80 100644 --- a/arch/arm/boards/karo-tx25/board.c +++ b/arch/arm/boards/karo-tx25/board.c @@ -22,7 +22,7 @@ #include <common.h> #include <init.h> #include <driver.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <environment.h> #include <mach/imx25-regs.h> diff --git a/arch/arm/boards/karo-tx25/lowlevel.c b/arch/arm/boards/karo-tx25/lowlevel.c index 861c27b8a6..b7ff2d44c6 100644 --- a/arch/arm/boards/karo-tx25/lowlevel.c +++ b/arch/arm/boards/karo-tx25/lowlevel.c @@ -21,7 +21,7 @@ #include <mach/imx25-regs.h> #include <mach/esdctl.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/imx-nand.h> #include <mach/esdctl.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/karo-tx28/env/config b/arch/arm/boards/karo-tx28/env/config deleted file mode 100644 index a6b10255a2..0000000000 --- a/arch/arm/boards/karo-tx28/env/config +++ /dev/null @@ -1,41 +0,0 @@ -# -# - -baseboard=tx28stk5 - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.ethaddr=de:ad:be:ef:00:00 -#eth0.netmask=a.b.c.d -#eth0.serverip=a.b.c.d -#eth0.gateway=a.b.c.d - -# can be either 'nfs' or 'tftp' -kernel_loc=tftp -# can be either 'net' or 'initrd' -rootfs_loc=net - -# can be either 'jffs2' or 'ubifs' -rootfs_type=ubifs -rootfsimage=root-${global.hostname}.$rootfs_type - -kernelimage=zImage-${global.hostname} -#kernelimage=uImage-${global.hostname} -#kernelimage=Image-${global.hostname} -#kernelimage=Image-${global.hostname}.lzo - -if [ -n $user ]; then - kernelimage="$user"-"$kernelimage" - nfsroot="$eth0.serverip:/home/$user/nfsroot/${global.hostname}" - rootfsimage="$user"-"$rootfsimage" -else - nfsroot="$eth0.serverip:/path/to/nfs/root" -fi - -autoboot_timeout=3 - -bootargs="console=ttyAM0,115200 tx28_base=$baseboard" diff --git a/arch/arm/boards/karo-tx28/lowlevel.c b/arch/arm/boards/karo-tx28/lowlevel.c index aa3b09b2ee..c5fdda1902 100644 --- a/arch/arm/boards/karo-tx28/lowlevel.c +++ b/arch/arm/boards/karo-tx28/lowlevel.c @@ -1,11 +1,65 @@ +#define pr_fmt(fmt) "KARO TX28: " fmt +#define DEBUG + #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx28-regs.h> +#include <mach/init.h> +#include <io.h> +#include <debug_ll.h> +#include <mach/iomux.h> +#include <stmp-device.h> -void __naked barebox_arm_reset_vector(void) +ENTRY_FUNCTION(start_barebox_karo_tx28, r0, r1, r2) { - arm_cpu_lowlevel_init(); barebox_arm_entry(IMX_MEMORY_BASE, SZ_128M, NULL); } + +static const uint32_t iomux_pads[] = { + /* EMI */ + EMI_DATA0, EMI_DATA1, EMI_DATA2, EMI_DATA3, EMI_DATA4, EMI_DATA5, + EMI_DATA6, EMI_DATA7, EMI_DATA8, EMI_DATA9, EMI_DATA10, EMI_DATA11, + EMI_DATA12, EMI_DATA13, EMI_DATA14, EMI_DATA15, EMI_ODT0, EMI_DQM0, + EMI_ODT1, EMI_DQM1, EMI_DDR_OPEN_FB, EMI_CLK, EMI_DSQ0, EMI_DSQ1, + EMI_DDR_OPEN, EMI_A0, EMI_A1, EMI_A2, EMI_A3, EMI_A4, EMI_A5, + EMI_A6, EMI_A7, EMI_A8, EMI_A9, EMI_A10, EMI_A11, EMI_A12, EMI_A13, + EMI_A14, EMI_BA0, EMI_BA1, EMI_BA2, EMI_CASN, EMI_RASN, EMI_WEN, + EMI_CE0N, EMI_CE1N, EMI_CKE, + + /* Debug UART */ + AUART0_RTS_DUART_TX | VE_3_3V | STRENGTH(S8MA), + AUART0_CTS_DUART_RX | VE_3_3V | STRENGTH(S8MA), +}; + +static noinline void karo_tx28_init(void) +{ + int i; + + /* initialize muxing */ + for (i = 0; i < ARRAY_SIZE(iomux_pads); i++) + imx_gpio_mode(iomux_pads[i]); + + pr_debug("initializing power...\n"); + + mx28_power_init_battery_input(); + + pr_debug("initializing SDRAM...\n"); + + mx28_mem_init(); + + pr_debug("DONE\n"); +} + +ENTRY_FUNCTION(prep_start_barebox_karo_tx28, r0, r1, r2) +{ + void (*back)(unsigned long) = (void *)get_lr(); + + relocate_to_current_adr(); + setup_c(); + + karo_tx28_init(); + + back(0); +} diff --git a/arch/arm/boards/karo-tx28/tx28-stk5.c b/arch/arm/boards/karo-tx28/tx28-stk5.c index 2aaceb442e..c4c51099b4 100644 --- a/arch/arm/boards/karo-tx28/tx28-stk5.c +++ b/arch/arm/boards/karo-tx28/tx28-stk5.c @@ -19,7 +19,7 @@ #include <errno.h> #include <mci.h> #include <fec.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <net.h> #include <asm/sections.h> diff --git a/arch/arm/boards/karo-tx53/board.c b/arch/arm/boards/karo-tx53/board.c index e5c27aac93..b8164ca86e 100644 --- a/arch/arm/boards/karo-tx53/board.c +++ b/arch/arm/boards/karo-tx53/board.c @@ -22,7 +22,7 @@ #include <nand.h> #include <net.h> #include <partition.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <generated/mach-types.h> diff --git a/arch/arm/boards/karo-tx6x/lowlevel.c b/arch/arm/boards/karo-tx6x/lowlevel.c index 00008d403c..cd4be5e9e7 100644 --- a/arch/arm/boards/karo-tx6x/lowlevel.c +++ b/arch/arm/boards/karo-tx6x/lowlevel.c @@ -18,7 +18,7 @@ #include <asm/barebox-arm.h> #include <image-metadata.h> #include <mach/generic.h> -#include <sizes.h> +#include <linux/sizes.h> static inline void setup_uart(void) { diff --git a/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c b/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c index 046057f56a..59eaa29a50 100644 --- a/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c +++ b/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c @@ -15,7 +15,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/mioa701/lowlevel.c b/arch/arm/boards/mioa701/lowlevel.c index aa4a82e598..bfb8bad1cc 100644 --- a/arch/arm/boards/mioa701/lowlevel.c +++ b/arch/arm/boards/mioa701/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/module-mb7707/lowlevel.c b/arch/arm/boards/module-mb7707/lowlevel.c index 5f5e1d7af1..0258be6e4b 100644 --- a/arch/arm/boards/module-mb7707/lowlevel.c +++ b/arch/arm/boards/module-mb7707/lowlevel.c @@ -21,7 +21,7 @@ #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #define MB7707_SRAM_BASE 0x40000000 #define MB7707_SRAM_SIZE SZ_128M diff --git a/arch/arm/boards/netx/platform.S b/arch/arm/boards/netx/platform.S index 6c66228197..95ae46cc6d 100644 --- a/arch/arm/boards/netx/platform.S +++ b/arch/arm/boards/netx/platform.S @@ -16,7 +16,7 @@ * GNU General Public License for more details. * */ -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> .globl barebox_arm_reset_vector diff --git a/arch/arm/boards/nhk8815/lowlevel.c b/arch/arm/boards/nhk8815/lowlevel.c index ce06f45c91..33a785fee0 100644 --- a/arch/arm/boards/nhk8815/lowlevel.c +++ b/arch/arm/boards/nhk8815/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/nvidia-beaver/entry.c b/arch/arm/boards/nvidia-beaver/entry.c index 576fcb7a5b..9b7e253b4f 100644 --- a/arch/arm/boards/nvidia-beaver/entry.c +++ b/arch/arm/boards/nvidia-beaver/entry.c @@ -15,7 +15,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/nvidia-jetson-tk1/entry.c b/arch/arm/boards/nvidia-jetson-tk1/entry.c index 76c95a8776..8f112a3a91 100644 --- a/arch/arm/boards/nvidia-jetson-tk1/entry.c +++ b/arch/arm/boards/nvidia-jetson-tk1/entry.c @@ -15,7 +15,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/omap343xdsp/lowlevel.c b/arch/arm/boards/omap343xdsp/lowlevel.c index 18ddff3625..318bb9aeb1 100644 --- a/arch/arm/boards/omap343xdsp/lowlevel.c +++ b/arch/arm/boards/omap343xdsp/lowlevel.c @@ -1,7 +1,7 @@ #include <common.h> #include <init.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/generic.h> diff --git a/arch/arm/boards/omap3evm/board.c b/arch/arm/boards/omap3evm/board.c index 2813d3d653..0fe69b61a7 100644 --- a/arch/arm/boards/omap3evm/board.c +++ b/arch/arm/boards/omap3evm/board.c @@ -43,7 +43,7 @@ #include <init.h> #include <driver.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <ns16550.h> #include <asm/armlinux.h> #include <mach/omap3-silicon.h> diff --git a/arch/arm/boards/omap3evm/lowlevel.c b/arch/arm/boards/omap3evm/lowlevel.c index 5c3e8902a0..d8a1b9f61d 100644 --- a/arch/arm/boards/omap3evm/lowlevel.c +++ b/arch/arm/boards/omap3evm/lowlevel.c @@ -1,6 +1,6 @@ #include <io.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/generic.h> diff --git a/arch/arm/boards/panda/board.c b/arch/arm/boards/panda/board.c index c63602b4c2..f7a3a0fa28 100644 --- a/arch/arm/boards/panda/board.c +++ b/arch/arm/boards/panda/board.c @@ -15,7 +15,7 @@ #include <mach/control.h> #include <usb/ehci.h> #include <linux/err.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/mmu.h> #include <envfs.h> #include <i2c/i2c.h> diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c index 2679ae4690..005485ba45 100644 --- a/arch/arm/boards/panda/lowlevel.c +++ b/arch/arm/boards/panda/lowlevel.c @@ -19,7 +19,7 @@ #include <common.h> #include <init.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <mach/omap4-mux.h> #include <mach/omap4-silicon.h> diff --git a/arch/arm/boards/phytec-phycard-imx27/pca100.c b/arch/arm/boards/phytec-phycard-imx27/pca100.c index 9475bfafca..0481113c65 100644 --- a/arch/arm/boards/phytec-phycard-imx27/pca100.c +++ b/arch/arm/boards/phytec-phycard-imx27/pca100.c @@ -21,7 +21,7 @@ #include <mach/imx27-regs.h> #include <fec.h> #include <gpio.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/armlinux.h> #include <asm/sections.h> #include <generated/mach-types.h> diff --git a/arch/arm/boards/phytec-phycard-imx6/lowlevel.c b/arch/arm/boards/phytec-phycard-imx6/lowlevel.c index b31638cbb9..dc106490e7 100644 --- a/arch/arm/boards/phytec-phycard-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-phycard-imx6/lowlevel.c @@ -14,7 +14,7 @@ */ #include <debug_ll.h> #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/phytec-phycard-omap3/lowlevel.c b/arch/arm/boards/phytec-phycard-omap3/lowlevel.c index 57f6389664..27b56b1e0c 100644 --- a/arch/arm/boards/phytec-phycard-omap3/lowlevel.c +++ b/arch/arm/boards/phytec-phycard-omap3/lowlevel.c @@ -1,7 +1,7 @@ #include <common.h> #include <io.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/omap3-mux.h> diff --git a/arch/arm/boards/phytec-phycard-omap3/pca-a-l1.c b/arch/arm/boards/phytec-phycard-omap3/pca-a-l1.c index 68a17bf0c3..1c2e7f7429 100644 --- a/arch/arm/boards/phytec-phycard-omap3/pca-a-l1.c +++ b/arch/arm/boards/phytec-phycard-omap3/pca-a-l1.c @@ -46,7 +46,7 @@ #include <nand.h> #include <ns16550.h> #include <partition.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/armlinux.h> #include <asm/io.h> #include <generated/mach-types.h> diff --git a/arch/arm/boards/phytec-phycard-omap4/lowlevel.c b/arch/arm/boards/phytec-phycard-omap4/lowlevel.c index 841ac4b206..170ca6896b 100644 --- a/arch/arm/boards/phytec-phycard-omap4/lowlevel.c +++ b/arch/arm/boards/phytec-phycard-omap4/lowlevel.c @@ -19,7 +19,7 @@ #include <common.h> #include <init.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <mach/omap4-mux.h> #include <mach/omap4-silicon.h> diff --git a/arch/arm/boards/phytec-phycard-omap4/pca-a-xl2.c b/arch/arm/boards/phytec-phycard-omap4/pca-a-xl2.c index 64297224c0..78890ba5a9 100644 --- a/arch/arm/boards/phytec-phycard-omap4/pca-a-xl2.c +++ b/arch/arm/boards/phytec-phycard-omap4/pca-a-xl2.c @@ -29,7 +29,7 @@ #include <mach/syslib.h> #include <mach/control.h> #include <linux/err.h> -#include <sizes.h> +#include <linux/sizes.h> #include <partition.h> #include <nand.h> #include <asm/mmu.h> diff --git a/arch/arm/boards/phytec-phycore-am335x/board.c b/arch/arm/boards/phytec-phycore-am335x/board.c index a72cebda3f..61a11cfaa3 100644 --- a/arch/arm/boards/phytec-phycore-am335x/board.c +++ b/arch/arm/boards/phytec-phycore-am335x/board.c @@ -22,7 +22,7 @@ #include <nand.h> #include <init.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <envfs.h> #include <asm/armlinux.h> #include <generated/mach-types.h> diff --git a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/bootsource b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/bootsource index 76d1f9b3c2..3f2ff4bcc8 100644 --- a/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/bootsource +++ b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/init/bootsource @@ -6,10 +6,10 @@ fi if [ $bootsource = mmc ]; then global.boot.default="mmc nand spi net" -elif [ $boosource = nand ]; then +elif [ $bootsource = nand ]; then global.boot.default="nand spi mmc net" -elif [ $boosource = spi ]; then +elif [ $bootsource = spi ]; then global.boot.default="spi nand mmc net" -elif [ $boosource = net ]; then +elif [ $bootsource = net ]; then global.boot.default="net nand spi mmc" fi diff --git a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c index 5ab8b5b446..843929e945 100644 --- a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <init.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/boards/phytec-phycore-imx27/pcm038.c b/arch/arm/boards/phytec-phycore-imx27/pcm038.c index a4305f6e45..01f6a55ad0 100644 --- a/arch/arm/boards/phytec-phycore-imx27/pcm038.c +++ b/arch/arm/boards/phytec-phycore-imx27/pcm038.c @@ -20,7 +20,7 @@ #include <init.h> #include <io.h> #include <notifier.h> -#include <sizes.h> +#include <linux/sizes.h> #include <envfs.h> #include <mach/devices-imx27.h> #include <mach/imx-pll.h> diff --git a/arch/arm/boards/phytec-phycore-imx27/pcm970.c b/arch/arm/boards/phytec-phycore-imx27/pcm970.c index b0c177ebbf..73df2ad2a8 100644 --- a/arch/arm/boards/phytec-phycore-imx27/pcm970.c +++ b/arch/arm/boards/phytec-phycore-imx27/pcm970.c @@ -16,7 +16,7 @@ #include <init.h> #include <io.h> #include <platform_ide.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/imx27-regs.h> #include <mach/iomux-mx27.h> diff --git a/arch/arm/boards/phytec-phycore-imx35/pcm043.c b/arch/arm/boards/phytec-phycore-imx35/pcm043.c index d1dd28fc65..e31c79d15f 100644 --- a/arch/arm/boards/phytec-phycore-imx35/pcm043.c +++ b/arch/arm/boards/phytec-phycore-imx35/pcm043.c @@ -26,7 +26,7 @@ #include <environment.h> #include <fs.h> #include <gpio.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/imx35-regs.h> #include <asm/armlinux.h> #include <io.h> diff --git a/arch/arm/boards/phytec-phycore-omap4460/board.c b/arch/arm/boards/phytec-phycore-omap4460/board.c index baf88a380c..6495a6f6ab 100644 --- a/arch/arm/boards/phytec-phycore-omap4460/board.c +++ b/arch/arm/boards/phytec-phycore-omap4460/board.c @@ -32,7 +32,7 @@ #include <mach/syslib.h> #include <mach/control.h> #include <linux/err.h> -#include <sizes.h> +#include <linux/sizes.h> #include <partition.h> #include <nand.h> #include <asm/mmu.h> diff --git a/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c b/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c index 8ea62c7f56..c0825949a8 100644 --- a/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-omap4460/lowlevel.c @@ -19,7 +19,7 @@ #include <common.h> #include <init.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <mach/omap4-mux.h> #include <mach/omap4-silicon.h> diff --git a/arch/arm/boards/phytec-phycore-pxa270/board.c b/arch/arm/boards/phytec-phycore-pxa270/board.c index 509569e81e..833c4c81e4 100644 --- a/arch/arm/boards/phytec-phycore-pxa270/board.c +++ b/arch/arm/boards/phytec-phycore-pxa270/board.c @@ -24,7 +24,7 @@ #include <fs.h> #include <init.h> #include <partition.h> -#include <sizes.h> +#include <linux/sizes.h> #include <plat/gpio.h> #include <mach/mfp-pxa27x.h> diff --git a/arch/arm/boards/phytec-phycore-pxa270/lowlevel_init.S b/arch/arm/boards/phytec-phycore-pxa270/lowlevel_init.S index c7dacce30c..39af00b54b 100644 --- a/arch/arm/boards/phytec-phycore-pxa270/lowlevel_init.S +++ b/arch/arm/boards/phytec-phycore-pxa270/lowlevel_init.S @@ -24,7 +24,7 @@ */ #include <config.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/pxa-regs.h> #include <mach/regs-ost.h> #include <mach/regs-intc.h> diff --git a/arch/arm/boards/phytec-phyflex-am335x/board.c b/arch/arm/boards/phytec-phyflex-am335x/board.c index f265e52f3a..e635532d29 100644 --- a/arch/arm/boards/phytec-phyflex-am335x/board.c +++ b/arch/arm/boards/phytec-phyflex-am335x/board.c @@ -22,7 +22,7 @@ #include <nand.h> #include <init.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <envfs.h> #include <asm/armlinux.h> #include <generated/mach-types.h> diff --git a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/init/bootsource b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/init/bootsource index 76d1f9b3c2..3f2ff4bcc8 100644 --- a/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/init/bootsource +++ b/arch/arm/boards/phytec-phyflex-am335x/defaultenv-phyflex-am335x/init/bootsource @@ -6,10 +6,10 @@ fi if [ $bootsource = mmc ]; then global.boot.default="mmc nand spi net" -elif [ $boosource = nand ]; then +elif [ $bootsource = nand ]; then global.boot.default="nand spi mmc net" -elif [ $boosource = spi ]; then +elif [ $bootsource = spi ]; then global.boot.default="spi nand mmc net" -elif [ $boosource = net ]; then +elif [ $bootsource = net ]; then global.boot.default="net nand spi mmc" fi diff --git a/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c b/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c index 4d34968a0b..a240401555 100644 --- a/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c +++ b/arch/arm/boards/phytec-phyflex-am335x/lowlevel.c @@ -18,7 +18,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <init.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c b/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c index ce168b2cca..dbd264aed2 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c @@ -14,7 +14,7 @@ */ #include <debug_ll.h> #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <image-metadata.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/boards/plathome-openblocks-a6/lowlevel.c b/arch/arm/boards/plathome-openblocks-a6/lowlevel.c index b37a3d6002..71bf7aa2ee 100644 --- a/arch/arm/boards/plathome-openblocks-a6/lowlevel.c +++ b/arch/arm/boards/plathome-openblocks-a6/lowlevel.c @@ -12,7 +12,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c b/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c index 721d2de978..9030a5d0c8 100644 --- a/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c +++ b/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c @@ -15,7 +15,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/pm9261/init.c b/arch/arm/boards/pm9261/init.c index 09d7f80ea8..63f4f19b3f 100644 --- a/arch/arm/boards/pm9261/init.c +++ b/arch/arm/boards/pm9261/init.c @@ -50,6 +50,7 @@ static struct atmel_nand_data nand_pdata = { .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PA16, .enable_pin = AT91_PIN_PC14, + .ecc_mode = NAND_ECC_SOFT, #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) .bus_width_16 = 1, #else diff --git a/arch/arm/boards/pm9263/init.c b/arch/arm/boards/pm9263/init.c index 3dca9e4fda..2b6b0891f5 100644 --- a/arch/arm/boards/pm9263/init.c +++ b/arch/arm/boards/pm9263/init.c @@ -50,6 +50,7 @@ static struct atmel_nand_data nand_pdata = { .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PB30, .enable_pin = AT91_PIN_PD15, + .ecc_mode = NAND_ECC_SOFT, #if defined(CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16) .bus_width_16 = 1, #else diff --git a/arch/arm/boards/pm9g45/init.c b/arch/arm/boards/pm9g45/init.c index 1e43be5a7f..524fe5395a 100644 --- a/arch/arm/boards/pm9g45/init.c +++ b/arch/arm/boards/pm9g45/init.c @@ -49,6 +49,7 @@ static struct atmel_nand_data nand_pdata = { .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PD3, .enable_pin = AT91_PIN_PC14, + .ecc_mode = NAND_ECC_SOFT, .bus_width_16 = 0, .on_flash_bbt = 1, }; diff --git a/arch/arm/boards/qil-a926x/init.c b/arch/arm/boards/qil-a926x/init.c index 99a960470b..872743775f 100644 --- a/arch/arm/boards/qil-a926x/init.c +++ b/arch/arm/boards/qil-a926x/init.c @@ -17,7 +17,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/clk.h> #include <mach/board.h> @@ -43,6 +43,7 @@ static struct atmel_nand_data nand_pdata = { .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, + .ecc_mode = NAND_ECC_SOFT, .on_flash_bbt = 1, }; diff --git a/arch/arm/boards/radxa-rock/lowlevel.c b/arch/arm/boards/radxa-rock/lowlevel.c index 65014e6bb5..1c07bc3377 100644 --- a/arch/arm/boards/radxa-rock/lowlevel.c +++ b/arch/arm/boards/radxa-rock/lowlevel.c @@ -12,7 +12,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/raspberry-pi/lowlevel.c b/arch/arm/boards/raspberry-pi/lowlevel.c index 022b11d29f..485171a116 100644 --- a/arch/arm/boards/raspberry-pi/lowlevel.c +++ b/arch/arm/boards/raspberry-pi/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/platform.h> diff --git a/arch/arm/boards/sama5d3_xplained/init.c b/arch/arm/boards/sama5d3_xplained/init.c index 7dfebe8e89..373ab814d1 100644 --- a/arch/arm/boards/sama5d3_xplained/init.c +++ b/arch/arm/boards/sama5d3_xplained/init.c @@ -24,7 +24,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <mach/board.h> #include <mach/at91sam9_smc.h> diff --git a/arch/arm/boards/sama5d3xek/init.c b/arch/arm/boards/sama5d3xek/init.c index 49d2b371f5..57dc7b0667 100644 --- a/arch/arm/boards/sama5d3xek/init.c +++ b/arch/arm/boards/sama5d3xek/init.c @@ -26,7 +26,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <mach/board.h> #include <mach/at91sam9_smc.h> diff --git a/arch/arm/boards/sama5d4_xplained/sama5d4_xplained.c b/arch/arm/boards/sama5d4_xplained/sama5d4_xplained.c index 01262201d9..fe6876a9eb 100644 --- a/arch/arm/boards/sama5d4_xplained/sama5d4_xplained.c +++ b/arch/arm/boards/sama5d4_xplained/sama5d4_xplained.c @@ -18,7 +18,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <mach/board.h> #include <mach/at91sam9_smc.h> diff --git a/arch/arm/boards/sama5d4ek/sama5d4ek.c b/arch/arm/boards/sama5d4ek/sama5d4ek.c index 91cffa3b48..bbc53c6758 100644 --- a/arch/arm/boards/sama5d4ek/sama5d4ek.c +++ b/arch/arm/boards/sama5d4ek/sama5d4ek.c @@ -18,7 +18,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <mach/board.h> #include <mach/at91sam9_smc.h> diff --git a/arch/arm/boards/solidrun-cubox/lowlevel.c b/arch/arm/boards/solidrun-cubox/lowlevel.c index a28c2b18c5..08e31e8350 100644 --- a/arch/arm/boards/solidrun-cubox/lowlevel.c +++ b/arch/arm/boards/solidrun-cubox/lowlevel.c @@ -16,7 +16,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/solidrun-microsom/board.c b/arch/arm/boards/solidrun-microsom/board.c index 4b0ea32040..783ec53c1d 100644 --- a/arch/arm/boards/solidrun-microsom/board.c +++ b/arch/arm/boards/solidrun-microsom/board.c @@ -25,7 +25,7 @@ #include <mach/imx6-regs.h> #include <mach/imx6.h> #include <mfd/imx6q-iomuxc-gpr.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/phy.h> static int ar8035_phy_fixup(struct phy_device *dev) diff --git a/arch/arm/boards/solidrun-microsom/lowlevel.c b/arch/arm/boards/solidrun-microsom/lowlevel.c index eb52838963..30f4a3f591 100644 --- a/arch/arm/boards/solidrun-microsom/lowlevel.c +++ b/arch/arm/boards/solidrun-microsom/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/telit-evk-pro3/init.c b/arch/arm/boards/telit-evk-pro3/init.c index e094ea7c25..ea63b1a094 100644 --- a/arch/arm/boards/telit-evk-pro3/init.c +++ b/arch/arm/boards/telit-evk-pro3/init.c @@ -18,6 +18,7 @@ #include <gpio.h> #include <init.h> #include <linux/clk.h> +#include <linux/mtd/nand.h> #include <mach/at91_rstc.h> #include <mach/at91sam9_smc.h> #include <mach/board.h> @@ -33,6 +34,7 @@ static struct atmel_nand_data nand_pdata = { .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, + .ecc_mode = NAND_ECC_SOFT, .on_flash_bbt = 1, }; diff --git a/arch/arm/boards/terasic-sockit/board.c b/arch/arm/boards/terasic-sockit/board.c index fdff76ff84..53cd36834f 100644 --- a/arch/arm/boards/terasic-sockit/board.c +++ b/arch/arm/boards/terasic-sockit/board.c @@ -5,7 +5,7 @@ #include <asm/armlinux.h> #include <linux/micrel_phy.h> #include <linux/phy.h> -#include <sizes.h> +#include <linux/sizes.h> #include <fcntl.h> #include <fs.h> #include <mach/socfpga-regs.h> diff --git a/arch/arm/boards/terasic-sockit/lowlevel.c b/arch/arm/boards/terasic-sockit/lowlevel.c index 0683435a7b..78d5d41b04 100644 --- a/arch/arm/boards/terasic-sockit/lowlevel.c +++ b/arch/arm/boards/terasic-sockit/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/tny-a926x/init.c b/arch/arm/boards/tny-a926x/init.c index ac86457872..3ebd8aae02 100644 --- a/arch/arm/boards/tny-a926x/init.c +++ b/arch/arm/boards/tny-a926x/init.c @@ -26,7 +26,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/clk.h> #include <mach/board.h> @@ -55,6 +55,7 @@ static struct atmel_nand_data nand_pdata = { .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, + .ecc_mode = NAND_ECC_SOFT, .on_flash_bbt = 1, }; diff --git a/arch/arm/boards/toradex-colibri-t20/entry.c b/arch/arm/boards/toradex-colibri-t20/entry.c index 695862cfd3..a25958fb41 100644 --- a/arch/arm/boards/toradex-colibri-t20/entry.c +++ b/arch/arm/boards/toradex-colibri-t20/entry.c @@ -15,7 +15,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/toshiba-ac100/board.c b/arch/arm/boards/toshiba-ac100/board.c index 51232ef427..0cb955c15c 100644 --- a/arch/arm/boards/toshiba-ac100/board.c +++ b/arch/arm/boards/toshiba-ac100/board.c @@ -19,7 +19,7 @@ #include <driver.h> #include <init.h> #include <asm/armlinux.h> -#include <sizes.h> +#include <linux/sizes.h> #include <usb/ehci.h> #include <mach/iomap.h> diff --git a/arch/arm/boards/toshiba-ac100/entry.c b/arch/arm/boards/toshiba-ac100/entry.c index 45fa56aa75..fb695c32d6 100644 --- a/arch/arm/boards/toshiba-ac100/entry.c +++ b/arch/arm/boards/toshiba-ac100/entry.c @@ -15,7 +15,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/tqma6x/board.c b/arch/arm/boards/tqma6x/board.c index 2118fb2721..97cce60c70 100644 --- a/arch/arm/boards/tqma6x/board.c +++ b/arch/arm/boards/tqma6x/board.c @@ -23,7 +23,7 @@ #include <partition.h> #include <common.h> #include <envfs.h> -#include <sizes.h> +#include <linux/sizes.h> #include <init.h> #include <gpio.h> #include <fec.h> diff --git a/arch/arm/boards/tqma6x/lowlevel.c b/arch/arm/boards/tqma6x/lowlevel.c index d2eea16c23..23f3407c05 100644 --- a/arch/arm/boards/tqma6x/lowlevel.c +++ b/arch/arm/boards/tqma6x/lowlevel.c @@ -14,7 +14,7 @@ */ #include <debug_ll.h> #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/udoo/board.c b/arch/arm/boards/udoo/board.c index d2f558e7f4..f3668fef0b 100644 --- a/arch/arm/boards/udoo/board.c +++ b/arch/arm/boards/udoo/board.c @@ -29,7 +29,7 @@ #include <asm/io.h> #include <asm/mmu.h> #include <mach/generic.h> -#include <sizes.h> +#include <linux/sizes.h> #include <net.h> #include <linux/micrel_phy.h> #include <mach/imx6.h> diff --git a/arch/arm/boards/udoo/lowlevel.c b/arch/arm/boards/udoo/lowlevel.c index 3d9fc68cab..785ab16678 100644 --- a/arch/arm/boards/udoo/lowlevel.c +++ b/arch/arm/boards/udoo/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/usb-a926x/init.c b/arch/arm/boards/usb-a926x/init.c index 4a28af07e1..958c3c3662 100644 --- a/arch/arm/boards/usb-a926x/init.c +++ b/arch/arm/boards/usb-a926x/init.c @@ -26,7 +26,7 @@ #include <io.h> #include <mach/hardware.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #include <linux/clk.h> #include <mach/board.h> @@ -59,6 +59,7 @@ static struct atmel_nand_data nand_pdata = { .det_pin = -EINVAL, .rdy_pin = AT91_PIN_PC13, .enable_pin = AT91_PIN_PC14, + .ecc_mode = NAND_ECC_SOFT, .on_flash_bbt = 1, }; diff --git a/arch/arm/boards/usi-topkick/lowlevel.c b/arch/arm/boards/usi-topkick/lowlevel.c index df661564da..ed94ee6736 100644 --- a/arch/arm/boards/usi-topkick/lowlevel.c +++ b/arch/arm/boards/usi-topkick/lowlevel.c @@ -15,7 +15,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/lowlevel.h> diff --git a/arch/arm/boards/variscite-mx6/board.c b/arch/arm/boards/variscite-mx6/board.c index de74abc838..3585debb51 100644 --- a/arch/arm/boards/variscite-mx6/board.c +++ b/arch/arm/boards/variscite-mx6/board.c @@ -34,7 +34,7 @@ #include <asm/io.h> #include <asm/mmu.h> #include <mach/generic.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/imx6.h> #include <mach/devices-imx6.h> #include <mach/iomux-mx6.h> diff --git a/arch/arm/boards/variscite-mx6/lowlevel.c b/arch/arm/boards/variscite-mx6/lowlevel.c index 74f3a779e8..22e7eae32b 100644 --- a/arch/arm/boards/variscite-mx6/lowlevel.c +++ b/arch/arm/boards/variscite-mx6/lowlevel.c @@ -16,7 +16,7 @@ */ #include <debug_ll.h> #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/versatile/env/boot.d/001-nor b/arch/arm/boards/versatile/env/boot.d/001-nor new file mode 120000 index 0000000000..3db66aef68 --- /dev/null +++ b/arch/arm/boards/versatile/env/boot.d/001-nor @@ -0,0 +1 @@ +../boot/nor
\ No newline at end of file diff --git a/arch/arm/boards/versatile/env/boot.d/101-nor-update b/arch/arm/boards/versatile/env/boot.d/101-nor-update new file mode 120000 index 0000000000..e4f1952a39 --- /dev/null +++ b/arch/arm/boards/versatile/env/boot.d/101-nor-update @@ -0,0 +1 @@ +../boot/nor-update
\ No newline at end of file diff --git a/arch/arm/boards/versatile/env/boot/nor b/arch/arm/boards/versatile/env/boot/nor new file mode 100644 index 0000000000..3f31605c4f --- /dev/null +++ b/arch/arm/boards/versatile/env/boot/nor @@ -0,0 +1,15 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "nor" + exit +fi + +global.bootm.image="/dev/nor0.kernel" +global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=5 rootfstype=ubifs" + +dtb=/dev/nor0.dtb +filetype -s t ${dtb} +if [ "$t" = dtb ]; then + global.bootm.oftree="${dtb}" +fi diff --git a/arch/arm/boards/versatile/env/boot/nor-update b/arch/arm/boards/versatile/env/boot/nor-update new file mode 100644 index 0000000000..728889d20f --- /dev/null +++ b/arch/arm/boards/versatile/env/boot/nor-update @@ -0,0 +1,14 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "nor update" + exit +fi + +global.bootm.image="/dev/nor0.update" + +dtb=/dev/nor0.dtb +filetype -s t ${dtb} +if [ "$t" = dtb ]; then + global.bootm.oftree="${dtb}" +fi diff --git a/arch/arm/boards/versatile/env/config b/arch/arm/boards/versatile/env/config deleted file mode 100644 index 667dce3747..0000000000 --- a/arch/arm/boards/versatile/env/config +++ /dev/null @@ -1,38 +0,0 @@ -#!/bin/sh - -# use 'dhcp' to do dhcp in barebox and in kernel -# use 'none' if you want to skip kernel ip autoconfiguration -ip=dhcp - -# or set your networking parameters here -#eth0.ipaddr=a.b.c.d -#eth0.netmask=a.b.c.d -#eth0.gateway=a.b.c.d -#eth0.serverip=a.b.c.d - -# can be either 'nfs', 'tftp' or 'nor' -kernel_loc=tftp -# can be either 'net', 'nor' or 'initrd' -rootfs_loc=initrd - -# can be either 'jffs2' or 'ubifs' -rootfs_type=ubifs -rootfsimage=root.$rootfs_type - -#kernelimage=zImage -kernelimage=uImage -#kernelimage=Image -#kernelimage=Image.lzo - -nfsroot="$eth0.serverip:/opt/work/busybox/arm9/rootfs_arm" - -nor_parts="256k(barebox)ro,64k(bareboxenv),1536k(kernel),-(root)" -rootfs_mtdblock_nor=3 - -autoboot_timeout=3 - -bootargs="console=ttyAMA0,115200n8 CONSOLE=/dev/ttyAMA0" - -# set a fancy prompt (if support is compiled in) -PS1="\e[1;31m[barebox@\h]:\w\e[0m\n# " - diff --git a/arch/arm/boards/versatile/env/init/automount b/arch/arm/boards/versatile/env/init/automount new file mode 100644 index 0000000000..53f9196a15 --- /dev/null +++ b/arch/arm/boards/versatile/env/init/automount @@ -0,0 +1,11 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + init-menu-add-entry "$0" "Automountpoints" + exit +fi + +# automount tftp server based on $eth0.serverip + +mkdir -p /mnt/tftp +automount /mnt/tftp 'ifup eth0 && mount -t tftp $eth0.serverip /mnt/tftp' diff --git a/arch/arm/boards/versatile/env/init/mtdparts-nor b/arch/arm/boards/versatile/env/init/mtdparts-nor new file mode 100644 index 0000000000..9079d482da --- /dev/null +++ b/arch/arm/boards/versatile/env/init/mtdparts-nor @@ -0,0 +1,11 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + init-menu-add-entry "$0" "NOR partitions" + exit +fi + +mtdparts="512k(nor0.barebox)ro,512k(nor0.bareboxenv),4864k(nor0.kernel),256k(nor0.dtb),3M(nor0.update),-(nor0.root)" +kernelname="physmap-flash.0" + +mtdparts-add -d nor0 -k ${kernelname} -p ${mtdparts} diff --git a/arch/arm/boards/versatile/env/init/ps1 b/arch/arm/boards/versatile/env/init/ps1 new file mode 100644 index 0000000000..a1d075499f --- /dev/null +++ b/arch/arm/boards/versatile/env/init/ps1 @@ -0,0 +1,7 @@ +#!/bin/sh + +if [ ${global.allow_color} = "true" ]; then + export PS1="\e[1;32mbarebox@\e[1;36m\h:\w\e[0m\n# " +else + export PS1="barebox@\h:\w\n# " +fi diff --git a/arch/arm/boards/versatile/env/nv/boot.default b/arch/arm/boards/versatile/env/nv/boot.default new file mode 100644 index 0000000000..c47e1b2bca --- /dev/null +++ b/arch/arm/boards/versatile/env/nv/boot.default @@ -0,0 +1 @@ +/env/boot.d diff --git a/arch/arm/boards/versatile/env/nv/linux.bootargs.base b/arch/arm/boards/versatile/env/nv/linux.bootargs.base new file mode 100644 index 0000000000..826debe7c2 --- /dev/null +++ b/arch/arm/boards/versatile/env/nv/linux.bootargs.base @@ -0,0 +1 @@ +console=ttyAMA0,115200n8 CONSOLE=/dev/ttyAMA0 diff --git a/arch/arm/boards/versatile/lowlevel.c b/arch/arm/boards/versatile/lowlevel.c index ce06f45c91..33a785fee0 100644 --- a/arch/arm/boards/versatile/lowlevel.c +++ b/arch/arm/boards/versatile/lowlevel.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/boards/versatile/versatilepb.c b/arch/arm/boards/versatile/versatilepb.c index fdd0820fd4..3166cd4fed 100644 --- a/arch/arm/boards/versatile/versatilepb.c +++ b/arch/arm/boards/versatile/versatilepb.c @@ -22,17 +22,30 @@ #include <common.h> #include <init.h> #include <asm/armlinux.h> +#include <asm/system_info.h> #include <generated/mach-types.h> #include <mach/init.h> #include <mach/platform.h> #include <environment.h> #include <partition.h> -#include <sizes.h> +#include <linux/sizes.h> #include <net/smc91111.h> static int vpb_console_init(void) { - barebox_set_hostname("versatilepb"); + char *hostname = "versatilepb-unknown"; + char *model = "ARM Versatile PB"; + + if (cpu_is_arm926()) { + hostname = "versatilepb-arm926"; + model = "ARM Versatile PB (arm926)"; + } else if (cpu_is_arm1176()) { + hostname = "versatilepb-arm1176"; + model = "ARM Versatile PB (arm1176)"; + } + + barebox_set_hostname(hostname); + barebox_set_model(model); versatile_register_uart(0); return 0; @@ -46,8 +59,8 @@ static struct smc91c111_pdata net_pdata = { static int vpb_devices_init(void) { add_cfi_flash_device(DEVICE_ID_DYNAMIC, VERSATILE_FLASH_BASE, VERSATILE_FLASH_SIZE, 0); - devfs_add_partition("nor0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self"); - devfs_add_partition("nor0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0"); + devfs_add_partition("nor0", 0x00000, SZ_512K, DEVFS_PARTITION_FIXED, "self"); + devfs_add_partition("nor0", SZ_512K, SZ_512K, DEVFS_PARTITION_FIXED, "env0"); add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL, VERSATILE_ETH_BASE, 64 * 1024, IORESOURCE_MEM, &net_pdata); diff --git a/arch/arm/boards/vexpress/init.c b/arch/arm/boards/vexpress/init.c index 6cda494872..5b2035bd36 100644 --- a/arch/arm/boards/vexpress/init.c +++ b/arch/arm/boards/vexpress/init.c @@ -12,7 +12,7 @@ #include <mach/devices.h> #include <environment.h> #include <partition.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <globalvar.h> #include <linux/amba/sp804.h> diff --git a/arch/arm/boards/vexpress/lowlevel.c b/arch/arm/boards/vexpress/lowlevel.c index 2ef94c59d6..204d29d8f0 100644 --- a/arch/arm/boards/vexpress/lowlevel.c +++ b/arch/arm/boards/vexpress/lowlevel.c @@ -5,7 +5,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <asm/system_info.h> diff --git a/arch/arm/boards/virt2real/lowlevel.c b/arch/arm/boards/virt2real/lowlevel.c index 731e2cae64..8ec3d04fef 100644 --- a/arch/arm/boards/virt2real/lowlevel.c +++ b/arch/arm/boards/virt2real/lowlevel.c @@ -21,7 +21,7 @@ #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #define VIRT2REAL_SRAM_BASE 0x82000000 #define VIRT2REAL_SRAM_SIZE SZ_16M diff --git a/arch/arm/configs/imx233-olinuxino_defconfig b/arch/arm/configs/imx233-olinuxino_defconfig index 75b5911d6b..5aed6a9ca2 100644 --- a/arch/arm/configs/imx233-olinuxino_defconfig +++ b/arch/arm/configs/imx233-olinuxino_defconfig @@ -1,52 +1,89 @@ CONFIG_ARCH_MXS=y CONFIG_MACH_IMX233_OLINUXINO=y +CONFIG_MXS_OCOTP=y CONFIG_AEABI=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_BROKEN=y -CONFIG_EXPERIMENTAL=y -CONFIG_MODULES=y -CONFIG_LONGHELP=y +CONFIG_ARM_UNWIND=y +CONFIG_MMU=y +CONFIG_TEXT_BASE=0x0 +CONFIG_MALLOC_SIZE=0x1000000 +CONFIG_MALLOC_TLSF=y +CONFIG_KALLSYMS=y +CONFIG_RELOCATABLE=y +CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y +CONFIG_BLSPEC=y +CONFIG_DEFAULT_COMPRESSION_LZO=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/imx233-olinuxino/env" -CONFIG_BAREBOXENV_TARGET=y +CONFIG_RESET_SOURCE=y CONFIG_DEBUG_INFO=y -CONFIG_ENABLE_FLASH_NOISE=y -CONFIG_ENABLE_PARTITION_NOISE=y -CONFIG_ENABLE_DEVICE_NOISE=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_MTEST=y -CONFIG_CMD_MTEST_ALTERNATIVE=y +CONFIG_CMD_DMESG=y +CONFIG_LONGHELP=y +CONFIG_CMD_IOMEM=y +CONFIG_CMD_IMD=y +CONFIG_CMD_MEMINFO=y CONFIG_CMD_BOOTM_SHOW_TYPE=y CONFIG_CMD_BOOTM_VERBOSE=y CONFIG_CMD_BOOTM_INITRD=y CONFIG_CMD_BOOTM_OFTREE=y CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y -CONFIG_CMD_UIMAGE=y -CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_BOOTU is not set +CONFIG_CMD_GO=y CONFIG_CMD_RESET=y -CONFIG_CMD_OFTREE=y -CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y -CONFIG_NET=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_DEFAULTENV=y +CONFIG_CMD_LOADENV=y +CONFIG_CMD_PRINTENV=y +CONFIG_CMD_MAGICVAR=y +CONFIG_CMD_MAGICVAR_HELP=y +CONFIG_CMD_SAVEENV=y +CONFIG_CMD_CMP=y +CONFIG_CMD_FILETYPE=y +CONFIG_CMD_LN=y +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_SHA224SUM=y +CONFIG_CMD_SHA256SUM=y +CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_LET=y +CONFIG_CMD_MSLEEP=y +CONFIG_CMD_READF=y +CONFIG_CMD_SLEEP=y CONFIG_CMD_DHCP=y -CONFIG_NET_NFS=y +CONFIG_CMD_HOST=y CONFIG_CMD_PING=y -CONFIG_NET_TFTP=y -CONFIG_NET_TFTP_PUSH=y +CONFIG_CMD_TFTP=y +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_EDIT=y +CONFIG_CMD_MENU=y +CONFIG_CMD_MENU_MANAGEMENT=y +CONFIG_CMD_MENUTREE=y +CONFIG_CMD_SPLASH=y +CONFIG_CMD_READLINE=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_CRC=y +CONFIG_CMD_CRC_CMP=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DETECT=y +CONFIG_CMD_FLASH=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_2048=y +CONFIG_CMD_OF_NODE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OF_DISPLAY_TIMINGS=y +CONFIG_CMD_OFTREE=y +CONFIG_CMD_TIME=y +CONFIG_NET=y +CONFIG_NET_NFS=y CONFIG_NET_NETCONSOLE=y -CONFIG_NET_RESOLV=y +CONFIG_DRIVER_SERIAL_AUART=y CONFIG_NET_USB=y CONFIG_NET_USB_SMSC95XX=y -CONFIG_DISK_INTF_PLATFORM_IDE=y +# CONFIG_SPI is not set CONFIG_USB_HOST=y CONFIG_USB_EHCI=y CONFIG_USB_STORAGE=y @@ -56,8 +93,15 @@ CONFIG_MCI=y CONFIG_MCI_STARTUP=y CONFIG_MCI_MXS=y CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_LED_TRIGGERS=y CONFIG_KEYBOARD_GPIO=y CONFIG_MXS_APBH_DMA=y +CONFIG_FS_EXT4=y CONFIG_FS_TFTP=y CONFIG_FS_NFS=y CONFIG_FS_FAT=y +CONFIG_FS_FAT_WRITE=y +CONFIG_FS_FAT_LFN=y +CONFIG_ZLIB=y +CONFIG_LZO_DECOMPRESS=y diff --git a/arch/arm/configs/rpi_defconfig b/arch/arm/configs/rpi_defconfig index 05c013601d..c6b2c50c7b 100644 --- a/arch/arm/configs/rpi_defconfig +++ b/arch/arm/configs/rpi_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_LN=y CONFIG_CMD_FILETYPE=y CONFIG_CMD_ECHO_E=y CONFIG_CMD_LOADB=y +CONFIG_CMD_LOADY=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_IOMEM=y CONFIG_CMD_MM=y diff --git a/arch/arm/configs/tx28stk5_defconfig b/arch/arm/configs/tx28stk5_defconfig index fe80d98bbb..d5714f2ec4 100644 --- a/arch/arm/configs/tx28stk5_defconfig +++ b/arch/arm/configs/tx28stk5_defconfig @@ -4,58 +4,92 @@ CONFIG_AEABI=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y CONFIG_ARM_UNWIND=y CONFIG_MMU=y -CONFIG_MALLOC_SIZE=0x01000000 -CONFIG_BROKEN=y +CONFIG_TEXT_BASE=0x0 +CONFIG_MALLOC_SIZE=0x0 CONFIG_MALLOC_TLSF=y CONFIG_KALLSYMS=y -CONFIG_LONGHELP=y -CONFIG_GLOB=y +CONFIG_RELOCATABLE=y CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/karo-tx28/env" +CONFIG_BLSPEC=y +CONFIG_IMD=y +CONFIG_DEFAULT_COMPRESSION_LZO=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y +CONFIG_RESET_SOURCE=y CONFIG_DEBUG_INFO=y -CONFIG_CMD_EDIT=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_LOADENV=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_TIME=y -CONFIG_CMD_ECHO_E=y +CONFIG_DEBUG_LL=y +CONFIG_PBL_CONSOLE=y +CONFIG_CMD_DMESG=y +CONFIG_LONGHELP=y CONFIG_CMD_IOMEM=y -CONFIG_CMD_MTEST=y -CONFIG_CMD_MTEST_ALTERNATIVE=y +CONFIG_CMD_MEMINFO=y CONFIG_CMD_BOOTM_SHOW_TYPE=y CONFIG_CMD_BOOTM_VERBOSE=y CONFIG_CMD_BOOTM_INITRD=y CONFIG_CMD_BOOTM_OFTREE=y CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y -CONFIG_CMD_UIMAGE=y -CONFIG_CMD_RESET=y CONFIG_CMD_GO=y -CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_RESET=y +CONFIG_CMD_UIMAGE=y CONFIG_CMD_PARTITION=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_DEFAULTENV=y +CONFIG_CMD_LOADENV=y +CONFIG_CMD_PRINTENV=y CONFIG_CMD_MAGICVAR=y CONFIG_CMD_MAGICVAR_HELP=y -CONFIG_CMD_SPLASH=y -CONFIG_CMD_GPIO=y +CONFIG_CMD_SAVEENV=y +CONFIG_CMD_CMP=y +CONFIG_CMD_FILETYPE=y +CONFIG_CMD_LN=y +CONFIG_CMD_MD5SUM=y +CONFIG_CMD_SHA1SUM=y +CONFIG_CMD_SHA224SUM=y +CONFIG_CMD_SHA256SUM=y CONFIG_CMD_UNCOMPRESS=y -CONFIG_NET=y +CONFIG_CMD_LET=y +CONFIG_CMD_MSLEEP=y +CONFIG_CMD_READF=y +CONFIG_CMD_SLEEP=y CONFIG_CMD_DHCP=y +CONFIG_CMD_HOST=y +CONFIG_CMD_MIITOOL=y +CONFIG_CMD_PING=y CONFIG_CMD_TFTP=y -CONFIG_FS_TFTP=y -CONFIG_NET_RESOLV=y +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_EDIT=y +CONFIG_CMD_MENUTREE=y +CONFIG_CMD_SPLASH=y +CONFIG_CMD_READLINE=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_CRC=y +CONFIG_CMD_CRC_CMP=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DETECT=y +CONFIG_CMD_FLASH=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_2048=y +CONFIG_CMD_OF_NODE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OF_DISPLAY_TIMINGS=y +CONFIG_CMD_OFTREE=y +CONFIG_CMD_TIME=y +CONFIG_NET=y +CONFIG_DRIVER_SERIAL_AUART=y CONFIG_DRIVER_NET_FEC_IMX=y # CONFIG_SPI is not set +CONFIG_MTD=y CONFIG_VIDEO=y CONFIG_DRIVER_VIDEO_STM=y CONFIG_MCI=y CONFIG_MCI_STARTUP=y CONFIG_MCI_MXS=y +CONFIG_MXS_APBH_DMA=y +CONFIG_FS_EXT4=y +CONFIG_FS_TFTP=y +CONFIG_FS_NFS=y CONFIG_FS_FAT=y CONFIG_FS_FAT_WRITE=y CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/configs/versatilepb_arm1176_defconfig b/arch/arm/configs/versatilepb_arm1176_defconfig new file mode 100644 index 0000000000..ca0ab3603f --- /dev/null +++ b/arch/arm/configs/versatilepb_arm1176_defconfig @@ -0,0 +1,99 @@ +CONFIG_BUILTIN_DTB=y +CONFIG_BUILTIN_DTB_NAME="versatile-pb" +CONFIG_ARCH_VERSATILE=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x80000 +CONFIG_MACH_VERSATILEPB_ARM1176=y +CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_PBL_IMAGE=y +CONFIG_PBL_RELOCATABLE=y +CONFIG_MALLOC_SIZE=0xa00000 +CONFIG_PROMPT="versatilepb> " +CONFIG_HUSH_FANCY_PROMPT=y +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +CONFIG_MENU=y +CONFIG_CONSOLE_ACTIVATE_ALL=y +CONFIG_DEFAULT_COMPRESSION_GZIP=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/versatile/env" +CONFIG_CMD_DMESG=y +CONFIG_LONGHELP=y +CONFIG_CMD_IOMEM=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_VERBOSE=y +CONFIG_CMD_BOOTM_INITRD=y +CONFIG_CMD_BOOTM_OFTREE=y +CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y +CONFIG_CMD_GO=y +CONFIG_CMD_LOADB=y +CONFIG_CMD_RESET=y +CONFIG_CMD_PARTITION=y +CONFIG_CMD_UBIFORMAT=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_LOADENV=y +CONFIG_CMD_PRINTENV=y +CONFIG_CMD_MAGICVAR=y +CONFIG_CMD_MAGICVAR_HELP=y +CONFIG_CMD_SAVEENV=y +CONFIG_CMD_FILETYPE=y +CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_TFTP=y +CONFIG_CMD_ECHO_E=y +CONFIG_CMD_EDIT=y +CONFIG_CMD_LOGIN=y +CONFIG_CMD_MENU=y +CONFIG_CMD_MENU_MANAGEMENT=y +CONFIG_CMD_PASSWD=y +CONFIG_CMD_SPLASH=y +CONFIG_CMD_READLINE=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_CRC=y +CONFIG_CMD_CRC_CMP=y +CONFIG_CMD_FLASH=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_OF_NODE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OFTREE=y +CONFIG_NET=y +CONFIG_NET_NFS=y +CONFIG_NET_NETCONSOLE=y +CONFIG_NET_RESOLV=y +CONFIG_OFDEVICE=y +CONFIG_OF_BAREBOX_DRIVERS=y +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_USB=y +CONFIG_SERIAL_USB_FTDI=y +CONFIG_DRIVER_NET_SMC91111=y +CONFIG_I2C=y +CONFIG_I2C_VERSATILE=y +CONFIG_MTD=y +CONFIG_DRIVER_CFI=y +# CONFIG_DRIVER_CFI_AMD is not set +# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set +# CONFIG_DRIVER_CFI_BANK_WIDTH_2 is not set +CONFIG_MTD_UBI=y +CONFIG_USB_HOST=y +CONFIG_USB_EHCI=y +CONFIG_USB_STORAGE=y +CONFIG_VIDEO=y +CONFIG_DRIVER_VIDEO_ARMCLCD=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_SELF_REGISTER=y +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +CONFIG_FONT_ACORN_8x8=y +CONFIG_GPIO_PL061=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_FS_CRAMFS=y +CONFIG_FS_EXT4=y +CONFIG_FS_TFTP=y +CONFIG_FS_NFS=y +CONFIG_PNG=y +CONFIG_SHA1=y +CONFIG_SHA256=y diff --git a/arch/arm/configs/versatilepb_defconfig b/arch/arm/configs/versatilepb_defconfig index 9f7e0e56ea..54a6fec919 100644 --- a/arch/arm/configs/versatilepb_defconfig +++ b/arch/arm/configs/versatilepb_defconfig @@ -1,28 +1,41 @@ CONFIG_BUILTIN_DTB=y CONFIG_BUILTIN_DTB_NAME="versatile-pb" CONFIG_ARCH_VERSATILE=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x80000 CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_PBL_IMAGE=y +CONFIG_PBL_RELOCATABLE=y CONFIG_PROMPT="versatilepb> " -CONFIG_GLOB=y CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y +CONFIG_CONSOLE_ACTIVATE_ALL=y CONFIG_PARTITION=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC=y +CONFIG_DEFAULT_COMPRESSION_GZIP=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/versatile/env" +CONFIG_CMD_DMESG=y CONFIG_LONGHELP=y CONFIG_CMD_IOMEM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_VERBOSE=y +CONFIG_CMD_BOOTM_INITRD=y +CONFIG_CMD_BOOTM_OFTREE=y +CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y CONFIG_CMD_GO=y CONFIG_CMD_LOADB=y CONFIG_CMD_RESET=y CONFIG_CMD_PARTITION=y +CONFIG_CMD_UBIFORMAT=y CONFIG_CMD_EXPORT=y CONFIG_CMD_LOADENV=y CONFIG_CMD_PRINTENV=y +CONFIG_CMD_MAGICVAR=y +CONFIG_CMD_MAGICVAR_HELP=y CONFIG_CMD_SAVEENV=y +CONFIG_CMD_FILETYPE=y CONFIG_CMD_UNCOMPRESS=y CONFIG_CMD_SLEEP=y CONFIG_CMD_DHCP=y @@ -30,12 +43,16 @@ CONFIG_CMD_PING=y CONFIG_CMD_TFTP=y CONFIG_CMD_ECHO_E=y CONFIG_CMD_EDIT=y +CONFIG_CMD_LOGIN=y CONFIG_CMD_MENU=y CONFIG_CMD_MENU_MANAGEMENT=y -CONFIG_CMD_LOGIN=y CONFIG_CMD_PASSWD=y +CONFIG_CMD_SPLASH=y CONFIG_CMD_READLINE=y CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_CRC=y +CONFIG_CMD_CRC_CMP=y +CONFIG_CMD_FLASH=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_OF_NODE=y @@ -51,10 +68,18 @@ CONFIG_SERIAL_AMBA_PL011=y CONFIG_DRIVER_NET_SMC91111=y CONFIG_I2C=y CONFIG_I2C_VERSATILE=y +CONFIG_MTD=y +CONFIG_DRIVER_CFI=y +# CONFIG_DRIVER_CFI_AMD is not set +# CONFIG_DRIVER_CFI_BANK_WIDTH_1 is not set +# CONFIG_DRIVER_CFI_BANK_WIDTH_2 is not set +CONFIG_MTD_UBI=y CONFIG_GPIO_PL061=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_DS1307=y CONFIG_FS_CRAMFS=y +CONFIG_FS_EXT4=y CONFIG_FS_TFTP=y +CONFIG_FS_NFS=y CONFIG_SHA1=y CONFIG_SHA256=y diff --git a/arch/arm/cpu/common.c b/arch/arm/cpu/common.c index d5f892910f..46ce942187 100644 --- a/arch/arm/cpu/common.c +++ b/arch/arm/cpu/common.c @@ -17,7 +17,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/system_info.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/cpu/lowlevel.S b/arch/arm/cpu/lowlevel.S index c615d5b581..b76222d8f3 100644 --- a/arch/arm/cpu/lowlevel.S +++ b/arch/arm/cpu/lowlevel.S @@ -4,23 +4,41 @@ .section ".text_bare_init_","ax" ENTRY(arm_cpu_lowlevel_init) - mov r2, lr - /* set the cpu to SVC32 mode */ + /* set the cpu to SVC32 mode, mask irq and fiq */ mrs r12, cpsr bic r12, r12, #0x1f orr r12, r12, #0xd3 msr cpsr, r12 -#if __LINUX_ARM_ARCH__ >= 7 - isb -#elif __LINUX_ARM_ARCH__ == 6 +#if __LINUX_ARM_ARCH__ >= 6 + /* + * ICIALLU: Invalidate all instruction caches to PoU, + * includes flushing of branch predictors. + * Even if the i-cache is off it might contain stale entries + * that are better discarded before enabling the cache. + * Architectually this is even possible after a cold reset. + */ + mcr p15, 0, r12, c7, c5, 0 + /* DSB, ensure completion of the invalidation */ + mcr p15, 0, r12, c7, c10, 4 + /* + * ISB, ensure instruction fetch path is in sync. + * Note that the ARM Architecture Reference Manual, ARMv7-A and ARMv7-R + * edition (ARM DDI 0406C.c) doesn't define this instruction in the + * ARMv6 part (D12.7.10). It only has: "Support of additional + * operations is IMPLEMENTATION DEFINED". + * But an earlier version of the ARMARM (ARM DDI 0100I) does define it + * as "Flush prefetch buffer (PrefetchFlush)". + */ mcr p15, 0, r12, c7, c5, 4 #endif - /* disable MMU stuff and caches */ - mrc p15, 0, r12, c1, c0, 0 - bic r12, r12 , #(CR_M | CR_C | CR_B) + /* disable MMU stuff and data/unified caches */ + mrc p15, 0, r12, c1, c0, 0 /* SCTLR */ + bic r12, r12, #(CR_M | CR_C | CR_B) bic r12, r12, #(CR_S | CR_R | CR_V) + + /* enable instruction cache */ orr r12, r12, #CR_I #if __LINUX_ARM_ARCH__ >= 6 @@ -34,7 +52,7 @@ ENTRY(arm_cpu_lowlevel_init) orr r12, r12, #CR_B #endif - mcr p15, 0, r12, c1, c0, 0 + mcr p15, 0, r12, c1, c0, 0 /* SCTLR */ - mov pc, r2 + mov pc, lr ENDPROC(arm_cpu_lowlevel_init) diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c index b8b30df84e..2e4d316924 100644 --- a/arch/arm/cpu/mmu-early.c +++ b/arch/arm/cpu/mmu-early.c @@ -1,7 +1,7 @@ #include <common.h> #include <asm/mmu.h> #include <errno.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/memory.h> #include <asm/system.h> #include <asm/cache.h> diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index e4afcc8411..09fe8d592a 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -23,7 +23,7 @@ #include <init.h> #include <asm/mmu.h> #include <errno.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/memory.h> #include <asm/barebox-arm.h> #include <asm/system.h> diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c index 741060ab6c..f2490fd9ef 100644 --- a/arch/arm/cpu/start-pbl.c +++ b/arch/arm/cpu/start-pbl.c @@ -20,7 +20,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <pbl.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index e2a6b8e90f..418870fb69 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -20,7 +20,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <of.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c index 03c73d56a3..b0b7c6d097 100644 --- a/arch/arm/cpu/uncompress.c +++ b/arch/arm/cpu/uncompress.c @@ -21,7 +21,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <pbl.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/dts/am335x-bone-common.dts b/arch/arm/dts/am335x-bone-common.dts index bbc55617c8..5d3d2ed5aa 100644 --- a/arch/arm/dts/am335x-bone-common.dts +++ b/arch/arm/dts/am335x-bone-common.dts @@ -1,5 +1,12 @@ /dts-v1/; +/* + * DTS for the beaglebone white/black MLO + * + * Only contains the common parts of both boards which is + * all we need for the MLO + */ + #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" @@ -7,3 +14,12 @@ model = "TI AM335x BeagleBone"; compatible = "ti,am335x-bone", "ti,am33xx"; }; + +&mmc2 { + vmmc-supply = <&vmmcsd_fixed>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_pins>; + bus-width = <8>; + status = "disabled"; /* only present on beaglebone black, enabled during runtime */ + ti,vcc-aux-disable-is-sleep; +}; diff --git a/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts b/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts index 4117439c87..d8fceff6cb 100644 --- a/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts +++ b/arch/arm/dts/am335x-phytec-phycore-som-mlo.dts @@ -15,7 +15,7 @@ compatible = "phytec,phycore-am335x-som", "ti,am33xx"; }; -/* Keep all boosources disabled, we enable and register them +/* Keep all bootsources disabled, we enable and register them * later while booting. */ diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi b/arch/arm/dts/am335x-phytec-phycore-som.dtsi index 246b5aa62d..c34ae38271 100644 --- a/arch/arm/dts/am335x-phytec-phycore-som.dtsi +++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi @@ -161,7 +161,7 @@ partition@4 { label = "kernel"; - reg = <0xe0000 0x400000>; + reg = <0xe0000 0x0>; }; }; }; diff --git a/arch/arm/dts/am335x-phytec-phyflex.dts b/arch/arm/dts/am335x-phytec-phyflex.dts index 6679cf56db..6c49567107 100644 --- a/arch/arm/dts/am335x-phytec-phyflex.dts +++ b/arch/arm/dts/am335x-phytec-phyflex.dts @@ -187,7 +187,7 @@ partition@4 { label = "kernel"; - reg = <0xe0000 0x400000>; + reg = <0xe0000 0x0>; }; }; }; diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h index 66f6fe5ef6..9ad07cb77a 100644 --- a/arch/arm/include/asm/barebox-arm.h +++ b/arch/arm/include/asm/barebox-arm.h @@ -25,8 +25,10 @@ #ifndef _BAREBOX_ARM_H_ #define _BAREBOX_ARM_H_ -#include <sizes.h> +#include <linux/sizes.h> #include <asm-generic/memory_layout.h> +#include <linux/kernel.h> +#include <linux/types.h> /* cpu/.../cpu.c */ int cleanup_before_linux(void); diff --git a/arch/arm/include/asm/common.h b/arch/arm/include/asm/common.h index 133bb8e1f6..9ff3b19c7b 100644 --- a/arch/arm/include/asm/common.h +++ b/arch/arm/include/asm/common.h @@ -16,6 +16,32 @@ static inline unsigned long get_pc(void) return pc; } +static inline unsigned long get_lr(void) +{ + unsigned long lr; + + __asm__ __volatile__( + "mov %0, lr\n" + : "=r" (lr) + : + : "memory"); + + return lr; +} + +static inline unsigned long get_sp(void) +{ + unsigned long sp; + + __asm__ __volatile__( + "mov %0, sp\n" + : "=r" (sp) + : + : "memory"); + + return sp; +} + static inline void arm_setup_stack(unsigned long top) { __asm__ __volatile__("mov sp, %0" : : "r"(top)); diff --git a/arch/arm/include/asm/debug_ll_pl011.h b/arch/arm/include/asm/debug_ll_pl011.h new file mode 100644 index 0000000000..db015a373b --- /dev/null +++ b/arch/arm/include/asm/debug_ll_pl011.h @@ -0,0 +1,25 @@ +#ifndef __INCLUDE_ARM_ASM_DEBUG_LL_PL011_H__ +#define __INCLUDE_ARM_ASM_DEBUG_LL_PL011_H__ + +#ifndef DEBUG_LL_UART_ADDR +#error DEBUG_LL_UART_ADDR is undefined! +#endif + +#include <io.h> +#include <linux/amba/serial.h> + +static inline void PUTC_LL(char c) +{ + /* Wait until there is space in the FIFO */ + while (readl(DEBUG_LL_UART_ADDR + UART01x_FR) & UART01x_FR_TXFF) + ; + + /* Send the character */ + writel(c, DEBUG_LL_UART_ADDR + UART01x_DR); + + /* Wait to make sure it hits the line, in case we die too soon. */ + while (readl(DEBUG_LL_UART_ADDR + UART01x_FR) & UART01x_FR_TXFF) + ; +} + +#endif /* __INCLUDE_ARM_ASM_DEBUG_LL_PL011_H__ */ diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index ccf1f59013..850a99c6d9 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -12,4 +12,61 @@ extern void memcpy_fromio(void *, const volatile void __iomem *, size_t); extern void memcpy_toio(volatile void __iomem *, const void *, size_t); extern void memset_io(volatile void __iomem *, int, size_t); +/* + * Clear and set bits in one shot. These macros can be used to clear and + * set multiple bits in a register using a single call. These macros can + * also be used to set a multiple-bit bit pattern using a mask, by + * specifying the mask in the 'clear' parameter and the new bit pattern + * in the 'set' parameter. + */ + +#define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a) +#define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a)) + +#define out_le64(a,v) out_arch(q,le64,a,v) +#define out_le32(a,v) out_arch(l,le32,a,v) +#define out_le16(a,v) out_arch(w,le16,a,v) + +#define in_le64(a) in_arch(q,le64,a) +#define in_le32(a) in_arch(l,le32,a) +#define in_le16(a) in_arch(w,le16,a) + +#define out_be32(a,v) out_arch(l,be32,a,v) +#define out_be16(a,v) out_arch(w,be16,a,v) + +#define in_be32(a) in_arch(l,be32,a) +#define in_be16(a) in_arch(w,be16,a) + +#define out_8(a,v) __raw_writeb(v,a) +#define in_8(a) __raw_readb(a) + +#define clrbits(type, addr, clear) \ + out_##type((addr), in_##type(addr) & ~(clear)) + +#define setbits(type, addr, set) \ + out_##type((addr), in_##type(addr) | (set)) + +#define clrsetbits(type, addr, clear, set) \ + out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) + +#define clrbits_be32(addr, clear) clrbits(be32, addr, clear) +#define setbits_be32(addr, set) setbits(be32, addr, set) +#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) + +#define clrbits_le32(addr, clear) clrbits(le32, addr, clear) +#define setbits_le32(addr, set) setbits(le32, addr, set) +#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) + +#define clrbits_be16(addr, clear) clrbits(be16, addr, clear) +#define setbits_be16(addr, set) setbits(be16, addr, set) +#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) + +#define clrbits_le16(addr, clear) clrbits(le16, addr, clear) +#define setbits_le16(addr, set) setbits(le16, addr, set) +#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) + +#define clrbits_8(addr, clear) clrbits(8, addr, clear) +#define setbits_8(addr, set) setbits(8, addr, set) +#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) + #endif /* __ASM_ARM_IO_H */ diff --git a/arch/arm/include/asm/system_info.h b/arch/arm/include/asm/system_info.h index 61828602ef..0761848a1a 100644 --- a/arch/arm/include/asm/system_info.h +++ b/arch/arm/include/asm/system_info.h @@ -23,7 +23,7 @@ #define CPU_IS_ARM926 0x41069260 #define CPU_IS_ARM926_MASK 0xff0ffff0 -#define CPU_IS_ARM1176 0x410fb767 +#define CPU_IS_ARM1176 0x410fb760 #define CPU_IS_ARM1176_MASK 0xff0ffff0 #define CPU_IS_CORTEX_A8 0x410fc080 diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c new file mode 100644 index 0000000000..7bf6d129cf --- /dev/null +++ b/arch/arm/lib/asm-offsets.c @@ -0,0 +1,16 @@ +/* + * Generate definitions needed by assembly language modules. + * This code generates raw asm output which is post-processed to extract + * and format the required data. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/kbuild.h> + +int main(void) +{ + return 0; +} diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index baf0946a47..8327c3f560 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -12,7 +12,7 @@ #include <malloc.h> #include <fcntl.h> #include <errno.h> -#include <sizes.h> +#include <linux/sizes.h> #include <libbb.h> #include <magicvar.h> #include <binfmt.h> diff --git a/arch/arm/lib/bootz.c b/arch/arm/lib/bootz.c index 377f18a3ac..5167c9d20d 100644 --- a/arch/arm/lib/bootz.c +++ b/arch/arm/lib/bootz.c @@ -5,7 +5,7 @@ #include <fcntl.h> #include <errno.h> #include <malloc.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/byteorder.h> #include <asm/armlinux.h> #include <asm/system.h> diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S index 9afee2964a..73baff0ca5 100644 --- a/arch/arm/lib/pbl.lds.S +++ b/arch/arm/lib/pbl.lds.S @@ -15,7 +15,7 @@ * GNU General Public License for more details. * */ -#include <sizes.h> +#include <linux/sizes.h> #include <asm-generic/barebox.lds.h> #include <asm-generic/memory_layout.h> diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index ce0e4160b1..7b68cdac29 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c @@ -20,7 +20,7 @@ #include <mach/io.h> #include <mach/at91rm9200_mc.h> #include <i2c/i2c-gpio.h> -#include <sizes.h> +#include <linux/sizes.h> #include "generic.h" diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index ed6f9c4b96..67c4ea8601 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c @@ -11,7 +11,7 @@ */ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <asm/armlinux.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-at91/at91sam9260_lowlevel_init.c b/arch/arm/mach-at91/at91sam9260_lowlevel_init.c index f745b8de4f..7f84185ef9 100644 --- a/arch/arm/mach-at91/at91sam9260_lowlevel_init.c +++ b/arch/arm/mach-at91/at91sam9260_lowlevel_init.c @@ -21,7 +21,7 @@ #include <mach/at91_lowlevel_init.h> #include <mach/io.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> void __bare_init at91sam9260_lowlevel_init(void) { diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index ce539e97cb..620ed652dc 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c @@ -11,7 +11,7 @@ */ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <asm/armlinux.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-at91/at91sam9261_lowlevel_init.c b/arch/arm/mach-at91/at91sam9261_lowlevel_init.c index b9b4dfbb0e..0ad7f0a0c5 100644 --- a/arch/arm/mach-at91/at91sam9261_lowlevel_init.c +++ b/arch/arm/mach-at91/at91sam9261_lowlevel_init.c @@ -21,7 +21,7 @@ #include <mach/at91_lowlevel_init.h> #include <mach/io.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> void __bare_init at91sam9261_lowlevel_init(void) { diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index 1c9366a28f..a3683e53bf 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c @@ -11,7 +11,7 @@ */ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <asm/armlinux.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-at91/at91sam9263_lowlevel_init.c b/arch/arm/mach-at91/at91sam9263_lowlevel_init.c index 00d78f2375..0be84551f8 100644 --- a/arch/arm/mach-at91/at91sam9263_lowlevel_init.c +++ b/arch/arm/mach-at91/at91sam9263_lowlevel_init.c @@ -21,7 +21,7 @@ #include <mach/at91_lowlevel_init.h> #include <mach/io.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> void __bare_init at91sam9263_lowlevel_init(void) { diff --git a/arch/arm/mach-at91/at91sam926x_lowlevel_init.c b/arch/arm/mach-at91/at91sam926x_lowlevel_init.c index 6452bdd794..5dd8bc4e60 100644 --- a/arch/arm/mach-at91/at91sam926x_lowlevel_init.c +++ b/arch/arm/mach-at91/at91sam926x_lowlevel_init.c @@ -23,7 +23,7 @@ #include <mach/gpio.h> #include <mach/io.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include "gpio.h" diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index 789e1ec77e..cc7ad2f39a 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c @@ -89,9 +89,9 @@ static int at91_pit_probe(struct device_d *dev) return ret; } - pit_base = dev_request_mem_region(dev, 0); - if (IS_ERR(pit_base)) - return PTR_ERR(pit_base); + pit_base = dev_request_mem_region_err_null(dev, 0); + if (!pit_base) + return -ENOENT; pit_rate = clk_get_rate(clk) / 16; diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 5af8761532..bad7f9c5ba 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c @@ -11,7 +11,7 @@ */ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <asm/armlinux.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-at91/at91sam9g45_lowlevel_init.c b/arch/arm/mach-at91/at91sam9g45_lowlevel_init.c index b58f101ee2..2cdb7a6a5f 100644 --- a/arch/arm/mach-at91/at91sam9g45_lowlevel_init.c +++ b/arch/arm/mach-at91/at91sam9g45_lowlevel_init.c @@ -14,7 +14,7 @@ #include <mach/io.h> #include <mach/at91sam9_ddrsdr.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> void __naked __bare_init barebox_arm_reset_vector(void) { diff --git a/arch/arm/mach-at91/at91sam9n12_devices.c b/arch/arm/mach-at91/at91sam9n12_devices.c index 2d9ea4caed..bac023f555 100644 --- a/arch/arm/mach-at91/at91sam9n12_devices.c +++ b/arch/arm/mach-at91/at91sam9n12_devices.c @@ -11,7 +11,7 @@ */ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <asm/armlinux.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-at91/at91sam9n12_lowlevel_init.c b/arch/arm/mach-at91/at91sam9n12_lowlevel_init.c index 72a092899f..2b5cb158b0 100644 --- a/arch/arm/mach-at91/at91sam9n12_lowlevel_init.c +++ b/arch/arm/mach-at91/at91sam9n12_lowlevel_init.c @@ -14,7 +14,7 @@ #include <mach/io.h> #include <mach/at91sam9_ddrsdr.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> void __naked __bare_init barebox_arm_reset_vector(void) { diff --git a/arch/arm/mach-at91/at91sam9x5_devices.c b/arch/arm/mach-at91/at91sam9x5_devices.c index 2d05e94058..34537d8cf9 100644 --- a/arch/arm/mach-at91/at91sam9x5_devices.c +++ b/arch/arm/mach-at91/at91sam9x5_devices.c @@ -10,7 +10,7 @@ * */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <asm/armlinux.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-at91/at91sam9x5_lowlevel_init.c b/arch/arm/mach-at91/at91sam9x5_lowlevel_init.c index 7781036e3d..48e69f947d 100644 --- a/arch/arm/mach-at91/at91sam9x5_lowlevel_init.c +++ b/arch/arm/mach-at91/at91sam9x5_lowlevel_init.c @@ -14,7 +14,7 @@ #include <mach/io.h> #include <mach/at91sam9_ddrsdr.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> void __naked __bare_init barebox_arm_reset_vector(void) { diff --git a/arch/arm/mach-at91/bootstrap.c b/arch/arm/mach-at91/bootstrap.c index 4149304c92..2d18dd6b32 100644 --- a/arch/arm/mach-at91/bootstrap.c +++ b/arch/arm/mach-at91/bootstrap.c @@ -7,7 +7,7 @@ #include <common.h> #include <bootstrap.h> #include <mach/bootstrap.h> -#include <sizes.h> +#include <linux/sizes.h> #include <malloc.h> #include <init.h> #include <menu.h> diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index e2307ed8e6..491b220cad 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h @@ -19,7 +19,7 @@ #define __ASM_ARCH_BOARD_H #include <mach/hardware.h> -#include <sizes.h> +#include <linux/sizes.h> #include <net.h> #include <i2c/i2c.h> #include <spi/spi.h> diff --git a/arch/arm/mach-at91/sama5d3_devices.c b/arch/arm/mach-at91/sama5d3_devices.c index 1938c053f9..3fdfca8c68 100644 --- a/arch/arm/mach-at91/sama5d3_devices.c +++ b/arch/arm/mach-at91/sama5d3_devices.c @@ -11,7 +11,7 @@ */ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <asm/armlinux.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-at91/sama5d3_lowlevel_init.c b/arch/arm/mach-at91/sama5d3_lowlevel_init.c index d3fcbc2625..01d28514d1 100644 --- a/arch/arm/mach-at91/sama5d3_lowlevel_init.c +++ b/arch/arm/mach-at91/sama5d3_lowlevel_init.c @@ -7,7 +7,7 @@ #define __LOWLEVEL_INIT__ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <init.h> #include <asm/system.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/mach-at91/sama5d4_devices.c b/arch/arm/mach-at91/sama5d4_devices.c index 3806971688..e1b0a64d9f 100644 --- a/arch/arm/mach-at91/sama5d4_devices.c +++ b/arch/arm/mach-at91/sama5d4_devices.c @@ -12,7 +12,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <gpio.h> #include <asm/armlinux.h> #include <mach/hardware.h> diff --git a/arch/arm/mach-bcm2835/core.c b/arch/arm/mach-bcm2835/core.c index 04bc89751d..7f3d7e7629 100644 --- a/arch/arm/mach-bcm2835/core.c +++ b/arch/arm/mach-bcm2835/core.c @@ -25,7 +25,7 @@ #include <io.h> #include <asm/armlinux.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/platform.h> #include <mach/wd.h> diff --git a/arch/arm/mach-bcm2835/include/mach/debug_ll.h b/arch/arm/mach-bcm2835/include/mach/debug_ll.h new file mode 100644 index 0000000000..be93cd95ad --- /dev/null +++ b/arch/arm/mach-bcm2835/include/mach/debug_ll.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2014 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MACH_BCM2835_DEBUG_LL_H__ +#define __MACH_BCM2835_DEBUG_LL_H__ + +#include <mach/platform.h> + +#define DEBUG_LL_UART_ADDR BCM2835_UART0_BASE + +#include <asm/debug_ll_pl011.h> + +#endif /* __MACH_BCM2835_DEBUG_LL_H__ */ diff --git a/arch/arm/mach-clps711x/clock.c b/arch/arm/mach-clps711x/clock.c index 548b333b11..f3b4d85e55 100644 --- a/arch/arm/mach-clps711x/clock.c +++ b/arch/arm/mach-clps711x/clock.c @@ -9,7 +9,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/io.h> #include <linux/clk.h> #include <linux/clkdev.h> diff --git a/arch/arm/mach-clps711x/devices.c b/arch/arm/mach-clps711x/devices.c index e27476d90e..b6647dec26 100644 --- a/arch/arm/mach-clps711x/devices.c +++ b/arch/arm/mach-clps711x/devices.c @@ -9,7 +9,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/io.h> #include <asm/memory.h> diff --git a/arch/arm/mach-clps711x/lowlevel.c b/arch/arm/mach-clps711x/lowlevel.c index ff23b05cce..35b8b35e87 100644 --- a/arch/arm/mach-clps711x/lowlevel.c +++ b/arch/arm/mach-clps711x/lowlevel.c @@ -9,7 +9,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/io.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/mach-ep93xx/lowlevel_init.S b/arch/arm/mach-ep93xx/lowlevel_init.S index 56057a8bbd..707924606b 100644 --- a/arch/arm/mach-ep93xx/lowlevel_init.S +++ b/arch/arm/mach-ep93xx/lowlevel_init.S @@ -20,7 +20,7 @@ * */ -#include <sizes.h> +#include <linux/sizes.h> #include <mach/ep93xx-regs.h> #include <asm/barebox-arm-head.h> diff --git a/arch/arm/mach-highbank/devices.c b/arch/arm/mach-highbank/devices.c index 6d75864306..8f9b8e0f45 100644 --- a/arch/arm/mach-highbank/devices.c +++ b/arch/arm/mach-highbank/devices.c @@ -5,7 +5,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/amba/bus.h> diff --git a/arch/arm/mach-highbank/include/mach/debug_ll.h b/arch/arm/mach-highbank/include/mach/debug_ll.h index 4cdbb3ce51..1820eb1d13 100644 --- a/arch/arm/mach-highbank/include/mach/debug_ll.h +++ b/arch/arm/mach-highbank/include/mach/debug_ll.h @@ -7,20 +7,8 @@ #ifndef __MACH_DEBUG_LL_H__ #define __MACH_DEBUG_LL_H__ -#include <linux/amba/serial.h> -#include <io.h> +#define DEBUG_LL_UART_ADDR 0xfff36000 -#define UART_BASE 0xfff36000 +#include <asm/debug_ll_pl011.h> -static inline void PUTC_LL(char c) -{ - /* Wait until there is space in the FIFO */ - while (readl(UART_BASE + UART01x_FR) & UART01x_FR_TXFF); - - /* Send the character */ - writel(c, UART_BASE + UART01x_DR); - - /* Wait to make sure it hits the line, in case we die too soon. */ - while (readl(UART_BASE + UART01x_FR) & UART01x_FR_TXFF); -} #endif diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index a931de921e..9ac36e1453 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -102,13 +102,11 @@ endchoice config ARCH_IMX_EXTERNAL_BOOT_NAND bool - depends on MTD depends on ARCH_IMX25 || ARCH_IMX27 || ARCH_IMX31 || ARCH_IMX35 prompt "Support Starting barebox from NAND in external bootmode" config BAREBOX_UPDATE_IMX_EXTERNAL_NAND bool - depends on MTD depends on ARCH_IMX_EXTERNAL_BOOT_NAND depends on BAREBOX_UPDATE depends on MTD @@ -117,7 +115,6 @@ config BAREBOX_UPDATE_IMX_EXTERNAL_NAND config BAREBOX_UPDATE_IMX6_NAND bool - depends on MTD depends on ARCH_IMX6 depends on BAREBOX_UPDATE depends on MTD diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c index 433cfac1d5..c6479a0e54 100644 --- a/arch/arm/mach-imx/esdctl.c +++ b/arch/arm/mach-imx/esdctl.c @@ -19,7 +19,7 @@ #include <common.h> #include <io.h> #include <errno.h> -#include <sizes.h> +#include <linux/sizes.h> #include <init.h> #include <of.h> #include <linux/err.h> diff --git a/arch/arm/mach-imx/imx-bbu-external-nand.c b/arch/arm/mach-imx/imx-bbu-external-nand.c index 401b3248a8..0f1a028f98 100644 --- a/arch/arm/mach-imx/imx-bbu-external-nand.c +++ b/arch/arm/mach-imx/imx-bbu-external-nand.c @@ -24,7 +24,7 @@ #include <errno.h> #include <fs.h> #include <fcntl.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/mtd-abi.h> #include <linux/stat.h> #include <ioctl.h> diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c index 56369a0f94..ac90c53bb7 100644 --- a/arch/arm/mach-imx/imx-bbu-internal.c +++ b/arch/arm/mach-imx/imx-bbu-internal.c @@ -25,7 +25,7 @@ #include <errno.h> #include <fs.h> #include <fcntl.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/mtd-abi.h> #include <linux/stat.h> #include <ioctl.h> diff --git a/arch/arm/mach-imx/imx25.c b/arch/arm/mach-imx/imx25.c index 1f87787772..e87d934024 100644 --- a/arch/arm/mach-imx/imx25.c +++ b/arch/arm/mach-imx/imx25.c @@ -18,7 +18,7 @@ #include <io.h> #include <mach/weim.h> #include <mach/generic.h> -#include <sizes.h> +#include <linux/sizes.h> void imx25_setup_weimcs(size_t cs, unsigned upper, unsigned lower, unsigned additional) diff --git a/arch/arm/mach-imx/imx27.c b/arch/arm/mach-imx/imx27.c index d3eaa87ef6..b99a4eae3f 100644 --- a/arch/arm/mach-imx/imx27.c +++ b/arch/arm/mach-imx/imx27.c @@ -15,7 +15,7 @@ #include <mach/imx27-regs.h> #include <mach/weim.h> #include <mach/iomux-v1.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/revision.h> #include <mach/generic.h> #include <init.h> diff --git a/arch/arm/mach-imx/imx31.c b/arch/arm/mach-imx/imx31.c index 3013f0208f..137c77a923 100644 --- a/arch/arm/mach-imx/imx31.c +++ b/arch/arm/mach-imx/imx31.c @@ -13,7 +13,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <mach/imx31-regs.h> #include <mach/weim.h> diff --git a/arch/arm/mach-imx/imx35.c b/arch/arm/mach-imx/imx35.c index 40f5770c8f..69d45eba66 100644 --- a/arch/arm/mach-imx/imx35.c +++ b/arch/arm/mach-imx/imx35.c @@ -12,7 +12,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <init.h> #include <io.h> #include <mach/weim.h> diff --git a/arch/arm/mach-imx/imx5.c b/arch/arm/mach-imx/imx5.c index 9ec78b2afd..96288f99e0 100644 --- a/arch/arm/mach-imx/imx5.c +++ b/arch/arm/mach-imx/imx5.c @@ -1,6 +1,6 @@ #include <common.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/imx5.h> #include <mach/clock-imx51_53.h> diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c index cef302b350..70e8971965 100644 --- a/arch/arm/mach-imx/imx51.c +++ b/arch/arm/mach-imx/imx51.c @@ -13,7 +13,7 @@ #include <init.h> #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <environment.h> #include <io.h> #include <mach/imx5.h> diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c index 62e65e01d4..872d293640 100644 --- a/arch/arm/mach-imx/imx53.c +++ b/arch/arm/mach-imx/imx53.c @@ -15,7 +15,7 @@ #include <common.h> #include <io.h> #include <notifier.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/imx5.h> #include <mach/imx53-regs.h> #include <mach/revision.h> diff --git a/arch/arm/mach-imx/imx6-bbu-nand.c b/arch/arm/mach-imx/imx6-bbu-nand.c index 2d0705956c..1b46e514e9 100644 --- a/arch/arm/mach-imx/imx6-bbu-nand.c +++ b/arch/arm/mach-imx/imx6-bbu-nand.c @@ -25,7 +25,7 @@ #include <errno.h> #include <fcntl.h> #include <ioctl.h> -#include <sizes.h> +#include <linux/sizes.h> #include <bbu.h> #include <fs.h> #include <mach/bbu.h> diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c index c5cae6e238..73630e7092 100644 --- a/arch/arm/mach-imx/imx6.c +++ b/arch/arm/mach-imx/imx6.c @@ -14,7 +14,7 @@ #include <init.h> #include <common.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mfd/imx6q-iomuxc-gpr.h> #include <mach/imx6.h> #include <mach/generic.h> diff --git a/arch/arm/mach-imx/include/mach/devices-imx51.h b/arch/arm/mach-imx/include/mach/devices-imx51.h index 68953293b4..cccd8f4610 100644 --- a/arch/arm/mach-imx/include/mach/devices-imx51.h +++ b/arch/arm/mach-imx/include/mach/devices-imx51.h @@ -1,5 +1,5 @@ -#include <sizes.h> +#include <linux/sizes.h> #include <mach/devices.h> #include <mach/imx51-regs.h> diff --git a/arch/arm/mach-imx/include/mach/imx31-regs.h b/arch/arm/mach-imx/include/mach/imx31-regs.h index 599f8008b5..e491328694 100644 --- a/arch/arm/mach-imx/include/mach/imx31-regs.h +++ b/arch/arm/mach-imx/include/mach/imx31-regs.h @@ -19,7 +19,7 @@ #ifndef __ASM_ARCH_MX31_REGS_H #define __ASM_ARCH_MX31_REGS_H -#include <sizes.h> +#include <linux/sizes.h> #define MX31_IRAM_BASE_ADDR 0x1fffc000 #define MX31_IRAM_SIZE 0x00004000 diff --git a/arch/arm/mach-imx/include/mach/imx35-regs.h b/arch/arm/mach-imx/include/mach/imx35-regs.h index b30037cf83..52e209b4de 100644 --- a/arch/arm/mach-imx/include/mach/imx35-regs.h +++ b/arch/arm/mach-imx/include/mach/imx35-regs.h @@ -19,7 +19,7 @@ #ifndef __ASM_ARCH_MX35_REGS_H #define __ASM_ARCH_MX35_REGS_H -#include <sizes.h> +#include <linux/sizes.h> #define MX35_IRAM_BASE_ADDR 0x10000000 /* internal ram */ #define MX35_IRAM_SIZE SZ_128K diff --git a/arch/arm/mach-mvebu/lowlevel.c b/arch/arm/mach-mvebu/lowlevel.c index 7c4facfa1c..8d0ac8453e 100644 --- a/arch/arm/mach-mvebu/lowlevel.c +++ b/arch/arm/mach-mvebu/lowlevel.c @@ -17,7 +17,7 @@ #include <common.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <mach/common.h> diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index 214f9404df..4022710007 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -45,6 +45,8 @@ config MACH_CHUMBY config MACH_IMX233_OLINUXINO bool "Olimex.ltd imx223-olinuxino" + select HAVE_DEFAULT_ENVIRONMENT_NEW + select HAVE_PBL_MULTI_IMAGES help Say Y here if you are using the imx233-olinuxino @@ -59,6 +61,8 @@ choice config MACH_TX28 bool "KARO tx28" + select HAVE_DEFAULT_ENVIRONMENT_NEW + select HAVE_PBL_MULTI_IMAGES help Say Y here if you are using the KARO TX28 CPU module. @@ -134,4 +138,11 @@ endif endmenu +config ARCH_MXS_USBLOADER + bool "compile mxs-usb-loader" + help + mxs-usb-loader is a tool to upload and start mxs bootstream images to an + i.MX SoC in ROM boot mode. It requires libusb, so make sure you have the libusb + devel package installed on your machine. + endif diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index bd6892ed22..e3843368c2 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile @@ -1,5 +1,7 @@ obj-y += imx.o iomux-imx.o power.o +pbl-y += iomux-imx.o obj-$(CONFIG_ARCH_IMX23) += clocksource-imx23.o usb-imx23.o soc-imx23.o obj-$(CONFIG_ARCH_IMX28) += clocksource-imx28.o usb-imx28.o soc-imx28.o obj-$(CONFIG_MXS_OCOTP) += ocotp.o obj-$(CONFIG_MXS_CMD_BCB) += bcb.o +pbl-y += power-init.o mem-init.o lradc-init.o diff --git a/arch/arm/mach-mxs/bcb.c b/arch/arm/mach-mxs/bcb.c index c945726f53..fce607f634 100644 --- a/arch/arm/mach-mxs/bcb.c +++ b/arch/arm/mach-mxs/bcb.c @@ -15,7 +15,7 @@ #include <environment.h> #include <malloc.h> #include <nand.h> -#include <sizes.h> +#include <linux/sizes.h> #include <errno.h> #include <io.h> diff --git a/arch/arm/mach-mxs/clocksource-imx23.c b/arch/arm/mach-mxs/clocksource-imx23.c index d9b7c1a570..8279ee2f2d 100644 --- a/arch/arm/mach-mxs/clocksource-imx23.c +++ b/arch/arm/mach-mxs/clocksource-imx23.c @@ -17,7 +17,7 @@ #include <init.h> #include <clock.h> #include <notifier.h> -#include <mach/imx-regs.h> +#include <mach/imx23-regs.h> #include <mach/clock.h> #include <io.h> diff --git a/arch/arm/mach-mxs/clocksource-imx28.c b/arch/arm/mach-mxs/clocksource-imx28.c index d26aa93c36..4f38af68b4 100644 --- a/arch/arm/mach-mxs/clocksource-imx28.c +++ b/arch/arm/mach-mxs/clocksource-imx28.c @@ -16,7 +16,7 @@ #include <init.h> #include <clock.h> #include <notifier.h> -#include <mach/imx-regs.h> +#include <mach/imx28-regs.h> #include <mach/clock.h> #include <io.h> diff --git a/arch/arm/mach-mxs/include/mach/devices.h b/arch/arm/mach-mxs/include/mach/devices.h index 012bfc4349..5680d61c9e 100644 --- a/arch/arm/mach-mxs/include/mach/devices.h +++ b/arch/arm/mach-mxs/include/mach/devices.h @@ -2,7 +2,7 @@ #define __MACH_MXS_DEVICES_H #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <xfuncs.h> #include <driver.h> #include <mach/imx-regs.h> diff --git a/arch/arm/mach-mxs/include/mach/imx23-regs.h b/arch/arm/mach-mxs/include/mach/imx23-regs.h index 7fb664b334..3fd2f3d15b 100644 --- a/arch/arm/mach-mxs/include/mach/imx23-regs.h +++ b/arch/arm/mach-mxs/include/mach/imx23-regs.h @@ -24,9 +24,11 @@ #define IMX_DBGUART_BASE 0x80070000 #define IMX_TIM1_BASE 0x80068000 #define IMX_IOMUXC_BASE 0x80018000 +#define IMX_EMI_BASE 0x80020000 #define IMX_OCOTP_BASE 0x8002c000 #define IMX_WDT_BASE 0x8005c000 #define IMX_CCM_BASE 0x80040000 +#define IMX_LRADC_BASE 0x80050000 #define IMX_I2C1_BASE 0x80058000 #define IMX_SSP1_BASE 0x80010000 #define IMX_FB_BASE 0x80030000 @@ -35,5 +37,6 @@ #define IMX_USBPHY_BASE 0x8007c000 #define IMX_DIGCTL_BASE 0x8001c000 #define IMX_USB_BASE 0x80080000 +#define IMX_SDRAMC_BASE 0x800e0000 #endif /* __ASM_ARCH_MX23_REGS_H */ diff --git a/arch/arm/mach-mxs/include/mach/imx28-regs.h b/arch/arm/mach-mxs/include/mach/imx28-regs.h index 088282963d..de0d882414 100644 --- a/arch/arm/mach-mxs/include/mach/imx28-regs.h +++ b/arch/arm/mach-mxs/include/mach/imx28-regs.h @@ -25,10 +25,12 @@ #define IMX_SSP3_BASE 0x80016000 #define IMX_IOMUXC_BASE 0x80018000 #define IMX_DIGCTL_BASE 0x8001c000 +#define IMX_EMI_BASE 0x80020000 #define IMX_OCOTP_BASE 0x8002c000 #define IMX_FB_BASE 0x80030000 #define IMX_CCM_BASE 0x80040000 #define IMX_POWER_BASE 0x80044000 +#define IMX_LRADC_BASE 0x80050000 #define IMX_WDT_BASE 0x80056000 #define IMX_I2C0_BASE 0x80058000 #define IMX_I2C1_BASE 0x8005a000 @@ -43,6 +45,7 @@ #define IMX_USBPHY1_BASE 0x8007e000 #define IMX_USB0_BASE 0x80080000 #define IMX_USB1_BASE 0x80090000 +#define IMX_SDRAMC_BASE 0x800e0000 #define IMX_FEC0_BASE 0x800F0000 #define IMX_FEC1_BASE 0x800F4000 diff --git a/arch/arm/mach-mxs/include/mach/init.h b/arch/arm/mach-mxs/include/mach/init.h new file mode 100644 index 0000000000..1f9d8d48c0 --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/init.h @@ -0,0 +1,33 @@ +/* + * Freescale i.MX28 SPL functions + * + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __M28_INIT_H__ +#define __M28_INIT_H__ + +void mxs_early_delay(int delay); + +void mx23_power_init(void); +void mx23_power_init_battery_input(void); +void mx28_power_init(void); +void mx28_power_init_battery_input(void); +void mxs_power_wait_pswitch(void); + +extern uint32_t mx28_dram_vals[]; +extern uint32_t mx23_dram_vals[]; + +void mx23_mem_init(void); +void mx28_mem_init(void); +void mxs_mem_setup_cpu_and_hbus(void); +void mxs_mem_setup_vdda(void); +void mxs_mem_init_clock(unsigned char divider); + +void mxs_lradc_init(void); +void mxs_lradc_enable_batt_measurement(void); + +#endif /* __M28_INIT_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/iomux.h b/arch/arm/mach-mxs/include/mach/iomux.h index 4361be5782..0091dbae11 100644 --- a/arch/arm/mach-mxs/include/mach/iomux.h +++ b/arch/arm/mach-mxs/include/mach/iomux.h @@ -97,7 +97,7 @@ * .. PORTF(1, 15). So the PORTF macro is more ugly than necessary. */ # define PORTF(bank,bit) (BANK((bank) / 2) | BANKPIN((((bank) & 1) << 4) | (bit)) | ERROR((bit) & ~15) | ERROR((bank) & ~7)) -# define VE_2_5V VOLTAGE(1) +# define VE_2_5V VOLTAGE(0) # include <mach/iomux-imx23.h> #endif diff --git a/arch/arm/mach-mxs/include/mach/regs-clkctrl-mx23.h b/arch/arm/mach-mxs/include/mach/regs-clkctrl-mx23.h new file mode 100644 index 0000000000..289b159b74 --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/regs-clkctrl-mx23.h @@ -0,0 +1,208 @@ +/* + * Freescale i.MX23 CLKCTRL Register Definitions + * + * Copyright (C) 2012 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * Based on code from LTIB: + * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MX23_REGS_CLKCTRL_H__ +#define __MX23_REGS_CLKCTRL_H__ + +#include <mach/regs-common.h> + +#ifndef __ASSEMBLY__ +struct mxs_clkctrl_regs { + mxs_reg_32(hw_clkctrl_pll0ctrl0) /* 0x00 */ + uint32_t hw_clkctrl_pll0ctrl1; /* 0x10 */ + uint32_t reserved_pll0ctrl1[3]; /* 0x14-0x1c */ + mxs_reg_32(hw_clkctrl_cpu) /* 0x20 */ + mxs_reg_32(hw_clkctrl_hbus) /* 0x30 */ + mxs_reg_32(hw_clkctrl_xbus) /* 0x40 */ + mxs_reg_32(hw_clkctrl_xtal) /* 0x50 */ + mxs_reg_32(hw_clkctrl_pix) /* 0x60 */ + mxs_reg_32(hw_clkctrl_ssp0) /* 0x70 */ + mxs_reg_32(hw_clkctrl_gpmi) /* 0x80 */ + mxs_reg_32(hw_clkctrl_spdif) /* 0x90 */ + mxs_reg_32(hw_clkctrl_emi) /* 0xa0 */ + + uint32_t reserved1[4]; + + mxs_reg_32(hw_clkctrl_saif0) /* 0xc0 */ + mxs_reg_32(hw_clkctrl_tv) /* 0xd0 */ + mxs_reg_32(hw_clkctrl_etm) /* 0xe0 */ + mxs_reg_8(hw_clkctrl_frac0) /* 0xf0 */ + mxs_reg_8(hw_clkctrl_frac1) /* 0x100 */ + mxs_reg_32(hw_clkctrl_clkseq) /* 0x110 */ + mxs_reg_32(hw_clkctrl_reset) /* 0x120 */ + mxs_reg_32(hw_clkctrl_status) /* 0x130 */ + mxs_reg_32(hw_clkctrl_version) /* 0x140 */ +}; +#endif + +#define CLKCTRL_PLL0CTRL0_LFR_SEL_MASK (0x3 << 28) +#define CLKCTRL_PLL0CTRL0_LFR_SEL_OFFSET 28 +#define CLKCTRL_PLL0CTRL0_LFR_SEL_DEFAULT (0x0 << 28) +#define CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_2 (0x1 << 28) +#define CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_05 (0x2 << 28) +#define CLKCTRL_PLL0CTRL0_LFR_SEL_UNDEFINED (0x3 << 28) +#define CLKCTRL_PLL0CTRL0_CP_SEL_MASK (0x3 << 24) +#define CLKCTRL_PLL0CTRL0_CP_SEL_OFFSET 24 +#define CLKCTRL_PLL0CTRL0_CP_SEL_DEFAULT (0x0 << 24) +#define CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_2 (0x1 << 24) +#define CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_05 (0x2 << 24) +#define CLKCTRL_PLL0CTRL0_CP_SEL_UNDEFINED (0x3 << 24) +#define CLKCTRL_PLL0CTRL0_DIV_SEL_MASK (0x3 << 20) +#define CLKCTRL_PLL0CTRL0_DIV_SEL_OFFSET 20 +#define CLKCTRL_PLL0CTRL0_DIV_SEL_DEFAULT (0x0 << 20) +#define CLKCTRL_PLL0CTRL0_DIV_SEL_LOWER (0x1 << 20) +#define CLKCTRL_PLL0CTRL0_DIV_SEL_LOWEST (0x2 << 20) +#define CLKCTRL_PLL0CTRL0_DIV_SEL_UNDEFINED (0x3 << 20) +#define CLKCTRL_PLL0CTRL0_EN_USB_CLKS (1 << 18) +#define CLKCTRL_PLL0CTRL0_POWER (1 << 16) + +#define CLKCTRL_PLL0CTRL1_LOCK (1 << 31) +#define CLKCTRL_PLL0CTRL1_FORCE_LOCK (1 << 30) +#define CLKCTRL_PLL0CTRL1_LOCK_COUNT_MASK 0xffff +#define CLKCTRL_PLL0CTRL1_LOCK_COUNT_OFFSET 0 + +#define CLKCTRL_CPU_BUSY_REF_XTAL (1 << 29) +#define CLKCTRL_CPU_BUSY_REF_CPU (1 << 28) +#define CLKCTRL_CPU_DIV_XTAL_FRAC_EN (1 << 26) +#define CLKCTRL_CPU_DIV_XTAL_MASK (0x3ff << 16) +#define CLKCTRL_CPU_DIV_XTAL_OFFSET 16 +#define CLKCTRL_CPU_INTERRUPT_WAIT (1 << 12) +#define CLKCTRL_CPU_DIV_CPU_FRAC_EN (1 << 10) +#define CLKCTRL_CPU_DIV_CPU_MASK 0x3f +#define CLKCTRL_CPU_DIV_CPU_OFFSET 0 + +#define CLKCTRL_HBUS_BUSY (1 << 29) +#define CLKCTRL_HBUS_DCP_AS_ENABLE (1 << 28) +#define CLKCTRL_HBUS_PXP_AS_ENABLE (1 << 27) +#define CLKCTRL_HBUS_APBHDMA_AS_ENABLE (1 << 26) +#define CLKCTRL_HBUS_APBXDMA_AS_ENABLE (1 << 25) +#define CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE (1 << 24) +#define CLKCTRL_HBUS_TRAFFIC_AS_ENABLE (1 << 23) +#define CLKCTRL_HBUS_CPU_DATA_AS_ENABLE (1 << 22) +#define CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE (1 << 21) +#define CLKCTRL_HBUS_AUTO_SLOW_MODE (1 << 20) +#define CLKCTRL_HBUS_SLOW_DIV_MASK (0x7 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_OFFSET 16 +#define CLKCTRL_HBUS_SLOW_DIV_BY1 (0x0 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_BY2 (0x1 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_BY4 (0x2 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_BY8 (0x3 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_BY16 (0x4 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_BY32 (0x5 << 16) +#define CLKCTRL_HBUS_DIV_FRAC_EN (1 << 5) +#define CLKCTRL_HBUS_DIV_MASK 0x1f +#define CLKCTRL_HBUS_DIV_OFFSET 0 + +#define CLKCTRL_XBUS_BUSY (1 << 31) +#define CLKCTRL_XBUS_DIV_FRAC_EN (1 << 10) +#define CLKCTRL_XBUS_DIV_MASK 0x3ff +#define CLKCTRL_XBUS_DIV_OFFSET 0 + +#define CLKCTRL_XTAL_UART_CLK_GATE (1 << 31) +#define CLKCTRL_XTAL_FILT_CLK24M_GATE (1 << 30) +#define CLKCTRL_XTAL_PWM_CLK24M_GATE (1 << 29) +#define CLKCTRL_XTAL_DRI_CLK24M_GATE (1 << 28) +#define CLKCTRL_XTAL_DIGCTRL_CLK1M_GATE (1 << 27) +#define CLKCTRL_XTAL_TIMROT_CLK32K_GATE (1 << 26) +#define CLKCTRL_XTAL_DIV_UART_MASK 0x3 +#define CLKCTRL_XTAL_DIV_UART_OFFSET 0 + +#define CLKCTRL_PIX_CLKGATE (1 << 31) +#define CLKCTRL_PIX_BUSY (1 << 29) +#define CLKCTRL_PIX_DIV_FRAC_EN (1 << 12) +#define CLKCTRL_PIX_DIV_MASK 0xfff +#define CLKCTRL_PIX_DIV_OFFSET 0 + +#define CLKCTRL_SSP_CLKGATE (1 << 31) +#define CLKCTRL_SSP_BUSY (1 << 29) +#define CLKCTRL_SSP_DIV_FRAC_EN (1 << 9) +#define CLKCTRL_SSP_DIV_MASK 0x1ff +#define CLKCTRL_SSP_DIV_OFFSET 0 + +#define CLKCTRL_GPMI_CLKGATE (1 << 31) +#define CLKCTRL_GPMI_BUSY (1 << 29) +#define CLKCTRL_GPMI_DIV_FRAC_EN (1 << 10) +#define CLKCTRL_GPMI_DIV_MASK 0x3ff +#define CLKCTRL_GPMI_DIV_OFFSET 0 + +#define CLKCTRL_SPDIF_CLKGATE (1 << 31) + +#define CLKCTRL_EMI_CLKGATE (1 << 31) +#define CLKCTRL_EMI_SYNC_MODE_EN (1 << 30) +#define CLKCTRL_EMI_BUSY_REF_XTAL (1 << 29) +#define CLKCTRL_EMI_BUSY_REF_EMI (1 << 28) +#define CLKCTRL_EMI_BUSY_REF_CPU (1 << 27) +#define CLKCTRL_EMI_BUSY_SYNC_MODE (1 << 26) +#define CLKCTRL_EMI_BUSY_DCC_RESYNC (1 << 17) +#define CLKCTRL_EMI_DCC_RESYNC_ENABLE (1 << 16) +#define CLKCTRL_EMI_DIV_XTAL_MASK (0xf << 8) +#define CLKCTRL_EMI_DIV_XTAL_OFFSET 8 +#define CLKCTRL_EMI_DIV_EMI_MASK 0x3f +#define CLKCTRL_EMI_DIV_EMI_OFFSET 0 + +#define CLKCTRL_IR_CLKGATE (1 << 31) +#define CLKCTRL_IR_AUTO_DIV (1 << 29) +#define CLKCTRL_IR_IR_BUSY (1 << 28) +#define CLKCTRL_IR_IROV_BUSY (1 << 27) +#define CLKCTRL_IR_IROV_DIV_MASK (0x1ff << 16) +#define CLKCTRL_IR_IROV_DIV_OFFSET 16 +#define CLKCTRL_IR_IR_DIV_MASK 0x3ff +#define CLKCTRL_IR_IR_DIV_OFFSET 0 + +#define CLKCTRL_SAIF0_CLKGATE (1 << 31) +#define CLKCTRL_SAIF0_BUSY (1 << 29) +#define CLKCTRL_SAIF0_DIV_FRAC_EN (1 << 16) +#define CLKCTRL_SAIF0_DIV_MASK 0xffff +#define CLKCTRL_SAIF0_DIV_OFFSET 0 + +#define CLKCTRL_TV_CLK_TV108M_GATE (1 << 31) +#define CLKCTRL_TV_CLK_TV_GATE (1 << 30) + +#define CLKCTRL_ETM_CLKGATE (1 << 31) +#define CLKCTRL_ETM_BUSY (1 << 29) +#define CLKCTRL_ETM_DIV_FRAC_EN (1 << 6) +#define CLKCTRL_ETM_DIV_MASK 0x3f +#define CLKCTRL_ETM_DIV_OFFSET 0 + +#define CLKCTRL_FRAC_CLKGATE (1 << 7) +#define CLKCTRL_FRAC_STABLE (1 << 6) +#define CLKCTRL_FRAC_FRAC_MASK 0x3f +#define CLKCTRL_FRAC_FRAC_OFFSET 0 +#define CLKCTRL_FRAC0_CPU 0 +#define CLKCTRL_FRAC0_EMI 1 +#define CLKCTRL_FRAC0_PIX 2 +#define CLKCTRL_FRAC0_IO0 3 +#define CLKCTRL_FRAC1_VID 3 + +#define CLKCTRL_CLKSEQ_BYPASS_ETM (1 << 8) +#define CLKCTRL_CLKSEQ_BYPASS_CPU (1 << 7) +#define CLKCTRL_CLKSEQ_BYPASS_EMI (1 << 6) +#define CLKCTRL_CLKSEQ_BYPASS_SSP0 (1 << 5) +#define CLKCTRL_CLKSEQ_BYPASS_GPMI (1 << 4) +#define CLKCTRL_CLKSEQ_BYPASS_IR (1 << 3) +#define CLKCTRL_CLKSEQ_BYPASS_PIX (1 << 1) +#define CLKCTRL_CLKSEQ_BYPASS_SAIF (1 << 0) + +#define CLKCTRL_RESET_CHIP (1 << 1) +#define CLKCTRL_RESET_DIG (1 << 0) + +#define CLKCTRL_STATUS_CPU_LIMIT_MASK (0x3 << 30) +#define CLKCTRL_STATUS_CPU_LIMIT_OFFSET 30 + +#define CLKCTRL_VERSION_MAJOR_MASK (0xff << 24) +#define CLKCTRL_VERSION_MAJOR_OFFSET 24 +#define CLKCTRL_VERSION_MINOR_MASK (0xff << 16) +#define CLKCTRL_VERSION_MINOR_OFFSET 16 +#define CLKCTRL_VERSION_STEP_MASK 0xffff +#define CLKCTRL_VERSION_STEP_OFFSET 0 + +#endif /* __MX23_REGS_CLKCTRL_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/regs-clkctrl-mx28.h b/arch/arm/mach-mxs/include/mach/regs-clkctrl-mx28.h new file mode 100644 index 0000000000..aebb489d4b --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/regs-clkctrl-mx28.h @@ -0,0 +1,283 @@ +/* + * Freescale i.MX28 CLKCTRL Register Definitions + * + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * Based on code from LTIB: + * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MX28_REGS_CLKCTRL_H__ +#define __MX28_REGS_CLKCTRL_H__ + +#include <mach/regs-common.h> + +#ifndef __ASSEMBLY__ +struct mxs_clkctrl_regs { + mxs_reg_32(hw_clkctrl_pll0ctrl0) /* 0x00 */ + uint32_t hw_clkctrl_pll0ctrl1; /* 0x10 */ + uint32_t reserved_pll0ctrl1[3]; /* 0x14-0x1c */ + mxs_reg_32(hw_clkctrl_pll1ctrl0) /* 0x20 */ + uint32_t hw_clkctrl_pll1ctrl1; /* 0x30 */ + uint32_t reserved_pll1ctrl1[3]; /* 0x34-0x3c */ + mxs_reg_32(hw_clkctrl_pll2ctrl0) /* 0x40 */ + mxs_reg_32(hw_clkctrl_cpu) /* 0x50 */ + mxs_reg_32(hw_clkctrl_hbus) /* 0x60 */ + mxs_reg_32(hw_clkctrl_xbus) /* 0x70 */ + mxs_reg_32(hw_clkctrl_xtal) /* 0x80 */ + mxs_reg_32(hw_clkctrl_ssp0) /* 0x90 */ + mxs_reg_32(hw_clkctrl_ssp1) /* 0xa0 */ + mxs_reg_32(hw_clkctrl_ssp2) /* 0xb0 */ + mxs_reg_32(hw_clkctrl_ssp3) /* 0xc0 */ + mxs_reg_32(hw_clkctrl_gpmi) /* 0xd0 */ + mxs_reg_32(hw_clkctrl_spdif) /* 0xe0 */ + mxs_reg_32(hw_clkctrl_emi) /* 0xf0 */ + mxs_reg_32(hw_clkctrl_saif0) /* 0x100 */ + mxs_reg_32(hw_clkctrl_saif1) /* 0x110 */ + mxs_reg_32(hw_clkctrl_lcdif) /* 0x120 */ + mxs_reg_32(hw_clkctrl_etm) /* 0x130 */ + mxs_reg_32(hw_clkctrl_enet) /* 0x140 */ + mxs_reg_32(hw_clkctrl_hsadc) /* 0x150 */ + mxs_reg_32(hw_clkctrl_flexcan) /* 0x160 */ + + uint32_t reserved[16]; + + mxs_reg_8(hw_clkctrl_frac0) /* 0x1b0 */ + mxs_reg_8(hw_clkctrl_frac1) /* 0x1c0 */ + mxs_reg_32(hw_clkctrl_clkseq) /* 0x1d0 */ + mxs_reg_32(hw_clkctrl_reset) /* 0x1e0 */ + mxs_reg_32(hw_clkctrl_status) /* 0x1f0 */ + mxs_reg_32(hw_clkctrl_version) /* 0x200 */ +}; +#endif + +#define CLKCTRL_PLL0CTRL0_LFR_SEL_MASK (0x3 << 28) +#define CLKCTRL_PLL0CTRL0_LFR_SEL_OFFSET 28 +#define CLKCTRL_PLL0CTRL0_LFR_SEL_DEFAULT (0x0 << 28) +#define CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_2 (0x1 << 28) +#define CLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_05 (0x2 << 28) +#define CLKCTRL_PLL0CTRL0_LFR_SEL_UNDEFINED (0x3 << 28) +#define CLKCTRL_PLL0CTRL0_CP_SEL_MASK (0x3 << 24) +#define CLKCTRL_PLL0CTRL0_CP_SEL_OFFSET 24 +#define CLKCTRL_PLL0CTRL0_CP_SEL_DEFAULT (0x0 << 24) +#define CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_2 (0x1 << 24) +#define CLKCTRL_PLL0CTRL0_CP_SEL_TIMES_05 (0x2 << 24) +#define CLKCTRL_PLL0CTRL0_CP_SEL_UNDEFINED (0x3 << 24) +#define CLKCTRL_PLL0CTRL0_DIV_SEL_MASK (0x3 << 20) +#define CLKCTRL_PLL0CTRL0_DIV_SEL_OFFSET 20 +#define CLKCTRL_PLL0CTRL0_DIV_SEL_DEFAULT (0x0 << 20) +#define CLKCTRL_PLL0CTRL0_DIV_SEL_LOWER (0x1 << 20) +#define CLKCTRL_PLL0CTRL0_DIV_SEL_LOWEST (0x2 << 20) +#define CLKCTRL_PLL0CTRL0_DIV_SEL_UNDEFINED (0x3 << 20) +#define CLKCTRL_PLL0CTRL0_EN_USB_CLKS (1 << 18) +#define CLKCTRL_PLL0CTRL0_POWER (1 << 17) + +#define CLKCTRL_PLL0CTRL1_LOCK (1 << 31) +#define CLKCTRL_PLL0CTRL1_FORCE_LOCK (1 << 30) +#define CLKCTRL_PLL0CTRL1_LOCK_COUNT_MASK 0xffff +#define CLKCTRL_PLL0CTRL1_LOCK_COUNT_OFFSET 0 + +#define CLKCTRL_PLL1CTRL0_CLKGATEEMI (1 << 31) +#define CLKCTRL_PLL1CTRL0_LFR_SEL_MASK (0x3 << 28) +#define CLKCTRL_PLL1CTRL0_LFR_SEL_OFFSET 28 +#define CLKCTRL_PLL1CTRL0_LFR_SEL_DEFAULT (0x0 << 28) +#define CLKCTRL_PLL1CTRL0_LFR_SEL_TIMES_2 (0x1 << 28) +#define CLKCTRL_PLL1CTRL0_LFR_SEL_TIMES_05 (0x2 << 28) +#define CLKCTRL_PLL1CTRL0_LFR_SEL_UNDEFINED (0x3 << 28) +#define CLKCTRL_PLL1CTRL0_CP_SEL_MASK (0x3 << 24) +#define CLKCTRL_PLL1CTRL0_CP_SEL_OFFSET 24 +#define CLKCTRL_PLL1CTRL0_CP_SEL_DEFAULT (0x0 << 24) +#define CLKCTRL_PLL1CTRL0_CP_SEL_TIMES_2 (0x1 << 24) +#define CLKCTRL_PLL1CTRL0_CP_SEL_TIMES_05 (0x2 << 24) +#define CLKCTRL_PLL1CTRL0_CP_SEL_UNDEFINED (0x3 << 24) +#define CLKCTRL_PLL1CTRL0_DIV_SEL_MASK (0x3 << 20) +#define CLKCTRL_PLL1CTRL0_DIV_SEL_OFFSET 20 +#define CLKCTRL_PLL1CTRL0_DIV_SEL_DEFAULT (0x0 << 20) +#define CLKCTRL_PLL1CTRL0_DIV_SEL_LOWER (0x1 << 20) +#define CLKCTRL_PLL1CTRL0_DIV_SEL_LOWEST (0x2 << 20) +#define CLKCTRL_PLL1CTRL0_DIV_SEL_UNDEFINED (0x3 << 20) +#define CLKCTRL_PLL1CTRL0_EN_USB_CLKS (1 << 18) +#define CLKCTRL_PLL1CTRL0_POWER (1 << 17) + +#define CLKCTRL_PLL1CTRL1_LOCK (1 << 31) +#define CLKCTRL_PLL1CTRL1_FORCE_LOCK (1 << 30) +#define CLKCTRL_PLL1CTRL1_LOCK_COUNT_MASK 0xffff +#define CLKCTRL_PLL1CTRL1_LOCK_COUNT_OFFSET 0 + +#define CLKCTRL_PLL2CTRL0_CLKGATE (1 << 31) +#define CLKCTRL_PLL2CTRL0_LFR_SEL_MASK (0x3 << 28) +#define CLKCTRL_PLL2CTRL0_LFR_SEL_OFFSET 28 +#define CLKCTRL_PLL2CTRL0_HOLD_RING_OFF_B (1 << 26) +#define CLKCTRL_PLL2CTRL0_CP_SEL_MASK (0x3 << 24) +#define CLKCTRL_PLL2CTRL0_CP_SEL_OFFSET 24 +#define CLKCTRL_PLL2CTRL0_POWER (1 << 23) + +#define CLKCTRL_CPU_BUSY_REF_XTAL (1 << 29) +#define CLKCTRL_CPU_BUSY_REF_CPU (1 << 28) +#define CLKCTRL_CPU_DIV_XTAL_FRAC_EN (1 << 26) +#define CLKCTRL_CPU_DIV_XTAL_MASK (0x3ff << 16) +#define CLKCTRL_CPU_DIV_XTAL_OFFSET 16 +#define CLKCTRL_CPU_INTERRUPT_WAIT (1 << 12) +#define CLKCTRL_CPU_DIV_CPU_FRAC_EN (1 << 10) +#define CLKCTRL_CPU_DIV_CPU_MASK 0x3f +#define CLKCTRL_CPU_DIV_CPU_OFFSET 0 + +#define CLKCTRL_HBUS_ASM_BUSY (1 << 31) +#define CLKCTRL_HBUS_DCP_AS_ENABLE (1 << 30) +#define CLKCTRL_HBUS_PXP_AS_ENABLE (1 << 29) +#define CLKCTRL_HBUS_ASM_EMIPORT_AS_ENABLE (1 << 27) +#define CLKCTRL_HBUS_APBHDMA_AS_ENABLE (1 << 26) +#define CLKCTRL_HBUS_APBXDMA_AS_ENABLE (1 << 25) +#define CLKCTRL_HBUS_TRAFFIC_JAM_AS_ENABLE (1 << 24) +#define CLKCTRL_HBUS_TRAFFIC_AS_ENABLE (1 << 23) +#define CLKCTRL_HBUS_CPU_DATA_AS_ENABLE (1 << 22) +#define CLKCTRL_HBUS_CPU_INSTR_AS_ENABLE (1 << 21) +#define CLKCTRL_HBUS_ASM_ENABLE (1 << 20) +#define CLKCTRL_HBUS_AUTO_CLEAR_DIV_ENABLE (1 << 19) +#define CLKCTRL_HBUS_SLOW_DIV_MASK (0x7 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_OFFSET 16 +#define CLKCTRL_HBUS_SLOW_DIV_BY1 (0x0 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_BY2 (0x1 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_BY4 (0x2 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_BY8 (0x3 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_BY16 (0x4 << 16) +#define CLKCTRL_HBUS_SLOW_DIV_BY32 (0x5 << 16) +#define CLKCTRL_HBUS_DIV_FRAC_EN (1 << 5) +#define CLKCTRL_HBUS_DIV_MASK 0x1f +#define CLKCTRL_HBUS_DIV_OFFSET 0 + +#define CLKCTRL_XBUS_BUSY (1 << 31) +#define CLKCTRL_XBUS_AUTO_CLEAR_DIV_ENABLE (1 << 11) +#define CLKCTRL_XBUS_DIV_FRAC_EN (1 << 10) +#define CLKCTRL_XBUS_DIV_MASK 0x3ff +#define CLKCTRL_XBUS_DIV_OFFSET 0 + +#define CLKCTRL_XTAL_UART_CLK_GATE (1 << 31) +#define CLKCTRL_XTAL_PWM_CLK24M_GATE (1 << 29) +#define CLKCTRL_XTAL_TIMROT_CLK32K_GATE (1 << 26) +#define CLKCTRL_XTAL_DIV_UART_MASK 0x3 +#define CLKCTRL_XTAL_DIV_UART_OFFSET 0 + +#define CLKCTRL_SSP_CLKGATE (1 << 31) +#define CLKCTRL_SSP_BUSY (1 << 29) +#define CLKCTRL_SSP_DIV_FRAC_EN (1 << 9) +#define CLKCTRL_SSP_DIV_MASK 0x1ff +#define CLKCTRL_SSP_DIV_OFFSET 0 + +#define CLKCTRL_GPMI_CLKGATE (1 << 31) +#define CLKCTRL_GPMI_BUSY (1 << 29) +#define CLKCTRL_GPMI_DIV_FRAC_EN (1 << 10) +#define CLKCTRL_GPMI_DIV_MASK 0x3ff +#define CLKCTRL_GPMI_DIV_OFFSET 0 + +#define CLKCTRL_SPDIF_CLKGATE (1 << 31) + +#define CLKCTRL_EMI_CLKGATE (1 << 31) +#define CLKCTRL_EMI_SYNC_MODE_EN (1 << 30) +#define CLKCTRL_EMI_BUSY_REF_XTAL (1 << 29) +#define CLKCTRL_EMI_BUSY_REF_EMI (1 << 28) +#define CLKCTRL_EMI_BUSY_REF_CPU (1 << 27) +#define CLKCTRL_EMI_BUSY_SYNC_MODE (1 << 26) +#define CLKCTRL_EMI_BUSY_DCC_RESYNC (1 << 17) +#define CLKCTRL_EMI_DCC_RESYNC_ENABLE (1 << 16) +#define CLKCTRL_EMI_DIV_XTAL_MASK (0xf << 8) +#define CLKCTRL_EMI_DIV_XTAL_OFFSET 8 +#define CLKCTRL_EMI_DIV_EMI_MASK 0x3f +#define CLKCTRL_EMI_DIV_EMI_OFFSET 0 + +#define CLKCTRL_SAIF0_CLKGATE (1 << 31) +#define CLKCTRL_SAIF0_BUSY (1 << 29) +#define CLKCTRL_SAIF0_DIV_FRAC_EN (1 << 16) +#define CLKCTRL_SAIF0_DIV_MASK 0xffff +#define CLKCTRL_SAIF0_DIV_OFFSET 0 + +#define CLKCTRL_SAIF1_CLKGATE (1 << 31) +#define CLKCTRL_SAIF1_BUSY (1 << 29) +#define CLKCTRL_SAIF1_DIV_FRAC_EN (1 << 16) +#define CLKCTRL_SAIF1_DIV_MASK 0xffff +#define CLKCTRL_SAIF1_DIV_OFFSET 0 + +#define CLKCTRL_DIS_LCDIF_CLKGATE (1 << 31) +#define CLKCTRL_DIS_LCDIF_BUSY (1 << 29) +#define CLKCTRL_DIS_LCDIF_DIV_FRAC_EN (1 << 13) +#define CLKCTRL_DIS_LCDIF_DIV_MASK 0x1fff +#define CLKCTRL_DIS_LCDIF_DIV_OFFSET 0 + +#define CLKCTRL_ETM_CLKGATE (1 << 31) +#define CLKCTRL_ETM_BUSY (1 << 29) +#define CLKCTRL_ETM_DIV_FRAC_EN (1 << 7) +#define CLKCTRL_ETM_DIV_MASK 0x7f +#define CLKCTRL_ETM_DIV_OFFSET 0 + +#define CLKCTRL_ENET_SLEEP (1 << 31) +#define CLKCTRL_ENET_DISABLE (1 << 30) +#define CLKCTRL_ENET_STATUS (1 << 29) +#define CLKCTRL_ENET_BUSY_TIME (1 << 27) +#define CLKCTRL_ENET_DIV_TIME_MASK (0x3f << 21) +#define CLKCTRL_ENET_DIV_TIME_OFFSET 21 +#define CLKCTRL_ENET_TIME_SEL_MASK (0x3 << 19) +#define CLKCTRL_ENET_TIME_SEL_OFFSET 19 +#define CLKCTRL_ENET_TIME_SEL_XTAL (0x0 << 19) +#define CLKCTRL_ENET_TIME_SEL_PLL (0x1 << 19) +#define CLKCTRL_ENET_TIME_SEL_RMII_CLK (0x2 << 19) +#define CLKCTRL_ENET_TIME_SEL_UNDEFINED (0x3 << 19) +#define CLKCTRL_ENET_CLK_OUT_EN (1 << 18) +#define CLKCTRL_ENET_RESET_BY_SW_CHIP (1 << 17) +#define CLKCTRL_ENET_RESET_BY_SW (1 << 16) + +#define CLKCTRL_HSADC_RESETB (1 << 30) +#define CLKCTRL_HSADC_FREQDIV_MASK (0x3 << 28) +#define CLKCTRL_HSADC_FREQDIV_OFFSET 28 + +#define CLKCTRL_FLEXCAN_STOP_CAN0 (1 << 30) +#define CLKCTRL_FLEXCAN_CAN0_STATUS (1 << 29) +#define CLKCTRL_FLEXCAN_STOP_CAN1 (1 << 28) +#define CLKCTRL_FLEXCAN_CAN1_STATUS (1 << 27) + +#define CLKCTRL_FRAC_CLKGATE (1 << 7) +#define CLKCTRL_FRAC_STABLE (1 << 6) +#define CLKCTRL_FRAC_FRAC_MASK 0x3f +#define CLKCTRL_FRAC_FRAC_OFFSET 0 +#define CLKCTRL_FRAC0_CPU 0 +#define CLKCTRL_FRAC0_EMI 1 +#define CLKCTRL_FRAC0_IO1 2 +#define CLKCTRL_FRAC0_IO0 3 +#define CLKCTRL_FRAC1_PIX 0 +#define CLKCTRL_FRAC1_HSADC 1 +#define CLKCTRL_FRAC1_GPMI 2 + +#define CLKCTRL_CLKSEQ_BYPASS_CPU (1 << 18) +#define CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF (1 << 14) +#define CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF_BYPASS (0x1 << 14) +#define CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF_PFD (0x0 << 14) +#define CLKCTRL_CLKSEQ_BYPASS_ETM (1 << 8) +#define CLKCTRL_CLKSEQ_BYPASS_EMI (1 << 7) +#define CLKCTRL_CLKSEQ_BYPASS_SSP3 (1 << 6) +#define CLKCTRL_CLKSEQ_BYPASS_SSP2 (1 << 5) +#define CLKCTRL_CLKSEQ_BYPASS_SSP1 (1 << 4) +#define CLKCTRL_CLKSEQ_BYPASS_SSP0 (1 << 3) +#define CLKCTRL_CLKSEQ_BYPASS_GPMI (1 << 2) +#define CLKCTRL_CLKSEQ_BYPASS_SAIF1 (1 << 1) +#define CLKCTRL_CLKSEQ_BYPASS_SAIF0 (1 << 0) + +#define CLKCTRL_RESET_WDOG_POR_DISABLE (1 << 5) +#define CLKCTRL_RESET_EXTERNAL_RESET_ENABLE (1 << 4) +#define CLKCTRL_RESET_THERMAL_RESET_ENABLE (1 << 3) +#define CLKCTRL_RESET_THERMAL_RESET_DEFAULT (1 << 2) +#define CLKCTRL_RESET_CHIP (1 << 1) +#define CLKCTRL_RESET_DIG (1 << 0) + +#define CLKCTRL_STATUS_CPU_LIMIT_MASK (0x3 << 30) +#define CLKCTRL_STATUS_CPU_LIMIT_OFFSET 30 + +#define CLKCTRL_VERSION_MAJOR_MASK (0xff << 24) +#define CLKCTRL_VERSION_MAJOR_OFFSET 24 +#define CLKCTRL_VERSION_MINOR_MASK (0xff << 16) +#define CLKCTRL_VERSION_MINOR_OFFSET 16 +#define CLKCTRL_VERSION_STEP_MASK 0xffff +#define CLKCTRL_VERSION_STEP_OFFSET 0 + +#endif /* __MX28_REGS_CLKCTRL_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/regs-common.h b/arch/arm/mach-mxs/include/mach/regs-common.h new file mode 100644 index 0000000000..e54a220fa3 --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/regs-common.h @@ -0,0 +1,69 @@ +/* + * Freescale i.MXS Register Accessors + * + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MXS_REGS_COMMON_H__ +#define __MXS_REGS_COMMON_H__ + +/* + * The i.MXS has interesting feature when it comes to register access. There + * are four kinds of access to one particular register. Those are: + * + * 1) Common read/write access. To use this mode, just write to the address of + * the register. + * 2) Set bits only access. To set bits, write which bits you want to set to the + * address of the register + 0x4. + * 3) Clear bits only access. To clear bits, write which bits you want to clear + * to the address of the register + 0x8. + * 4) Toggle bits only access. To toggle bits, write which bits you want to + * toggle to the address of the register + 0xc. + * + * IMPORTANT NOTE: Not all registers support accesses 2-4! Also, not all bits + * can be set/cleared by pure write as in access type 1, some need to be + * explicitly set/cleared by using access type 2-3. + * + * The following macros and structures allow the user to either access the + * register in all aforementioned modes (by accessing reg_name, reg_name_set, + * reg_name_clr, reg_name_tog) or pass the register structure further into + * various functions with correct type information (by accessing reg_name_reg). + * + */ + +#define __mxs_reg_8(name) \ + uint8_t name[4]; \ + uint8_t name##_set[4]; \ + uint8_t name##_clr[4]; \ + uint8_t name##_tog[4]; \ + +#define __mxs_reg_32(name) \ + uint32_t name; \ + uint32_t name##_set; \ + uint32_t name##_clr; \ + uint32_t name##_tog; + +struct mxs_register_8 { + __mxs_reg_8(reg) +}; + +struct mxs_register_32 { + __mxs_reg_32(reg) +}; + +#define mxs_reg_8(name) \ + union { \ + struct { __mxs_reg_8(name) }; \ + struct mxs_register_8 name##_reg; \ + }; + +#define mxs_reg_32(name) \ + union { \ + struct { __mxs_reg_32(name) }; \ + struct mxs_register_32 name##_reg; \ + }; + +#endif /* __MXS_REGS_COMMON_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/regs-lradc.h b/arch/arm/mach-mxs/include/mach/regs-lradc.h new file mode 100644 index 0000000000..7f624be4c5 --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/regs-lradc.h @@ -0,0 +1,387 @@ +/* + * Freescale i.MX28 LRADC Register Definitions + * + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * Based on code from LTIB: + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MX28_REGS_LRADC_H__ +#define __MX28_REGS_LRADC_H__ + +#include <mach/regs-common.h> + +#ifndef __ASSEMBLY__ +struct mxs_lradc_regs { + mxs_reg_32(hw_lradc_ctrl0); + mxs_reg_32(hw_lradc_ctrl1); + mxs_reg_32(hw_lradc_ctrl2); + mxs_reg_32(hw_lradc_ctrl3); + mxs_reg_32(hw_lradc_status); + mxs_reg_32(hw_lradc_ch0); + mxs_reg_32(hw_lradc_ch1); + mxs_reg_32(hw_lradc_ch2); + mxs_reg_32(hw_lradc_ch3); + mxs_reg_32(hw_lradc_ch4); + mxs_reg_32(hw_lradc_ch5); + mxs_reg_32(hw_lradc_ch6); + mxs_reg_32(hw_lradc_ch7); + mxs_reg_32(hw_lradc_delay0); + mxs_reg_32(hw_lradc_delay1); + mxs_reg_32(hw_lradc_delay2); + mxs_reg_32(hw_lradc_delay3); + mxs_reg_32(hw_lradc_debug0); + mxs_reg_32(hw_lradc_debug1); + mxs_reg_32(hw_lradc_conversion); + mxs_reg_32(hw_lradc_ctrl4); + mxs_reg_32(hw_lradc_treshold0); + mxs_reg_32(hw_lradc_treshold1); + mxs_reg_32(hw_lradc_version); +}; +#endif + +#define LRADC_CTRL0_SFTRST (1 << 31) +#define LRADC_CTRL0_CLKGATE (1 << 30) +#define LRADC_CTRL0_ONCHIP_GROUNDREF (1 << 26) +#define LRADC_CTRL0_BUTTON1_DETECT_ENABLE (1 << 25) +#define LRADC_CTRL0_BUTTON0_DETECT_ENABLE (1 << 24) +#define LRADC_CTRL0_TOUCH_DETECT_ENABLE (1 << 23) +#define LRADC_CTRL0_TOUCH_SCREEN_TYPE (1 << 22) +#define LRADC_CTRL0_YNLRSW (1 << 21) +#define LRADC_CTRL0_YPLLSW_MASK (0x3 << 19) +#define LRADC_CTRL0_YPLLSW_OFFSET 19 +#define LRADC_CTRL0_XNURSW_MASK (0x3 << 17) +#define LRADC_CTRL0_XNURSW_OFFSET 17 +#define LRADC_CTRL0_XPULSW (1 << 16) +#define LRADC_CTRL0_SCHEDULE_MASK 0xff +#define LRADC_CTRL0_SCHEDULE_OFFSET 0 + +#define LRADC_CTRL1_BUTTON1_DETECT_IRQ_EN (1 << 28) +#define LRADC_CTRL1_BUTTON0_DETECT_IRQ_EN (1 << 27) +#define LRADC_CTRL1_THRESHOLD1_DETECT_IRQ_EN (1 << 26) +#define LRADC_CTRL1_THRESHOLD0_DETECT_IRQ_EN (1 << 25) +#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN (1 << 24) +#define LRADC_CTRL1_LRADC7_IRQ_EN (1 << 23) +#define LRADC_CTRL1_LRADC6_IRQ_EN (1 << 22) +#define LRADC_CTRL1_LRADC5_IRQ_EN (1 << 21) +#define LRADC_CTRL1_LRADC4_IRQ_EN (1 << 20) +#define LRADC_CTRL1_LRADC3_IRQ_EN (1 << 19) +#define LRADC_CTRL1_LRADC2_IRQ_EN (1 << 18) +#define LRADC_CTRL1_LRADC1_IRQ_EN (1 << 17) +#define LRADC_CTRL1_LRADC0_IRQ_EN (1 << 16) +#define LRADC_CTRL1_BUTTON1_DETECT_IRQ (1 << 12) +#define LRADC_CTRL1_BUTTON0_DETECT_IRQ (1 << 11) +#define LRADC_CTRL1_THRESHOLD1_DETECT_IRQ (1 << 10) +#define LRADC_CTRL1_THRESHOLD0_DETECT_IRQ (1 << 9) +#define LRADC_CTRL1_TOUCH_DETECT_IRQ (1 << 8) +#define LRADC_CTRL1_LRADC7_IRQ (1 << 7) +#define LRADC_CTRL1_LRADC6_IRQ (1 << 6) +#define LRADC_CTRL1_LRADC5_IRQ (1 << 5) +#define LRADC_CTRL1_LRADC4_IRQ (1 << 4) +#define LRADC_CTRL1_LRADC3_IRQ (1 << 3) +#define LRADC_CTRL1_LRADC2_IRQ (1 << 2) +#define LRADC_CTRL1_LRADC1_IRQ (1 << 1) +#define LRADC_CTRL1_LRADC0_IRQ (1 << 0) + +#define LRADC_CTRL2_DIVIDE_BY_TWO_MASK (0xff << 24) +#define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24 +#define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15) +#define LRADC_CTRL2_VTHSENSE_MASK (0x3 << 13) +#define LRADC_CTRL2_VTHSENSE_OFFSET 13 +#define LRADC_CTRL2_DISABLE_MUXAMP_BYPASS (1 << 12) +#define LRADC_CTRL2_TEMP_SENSOR_IENABLE1 (1 << 9) +#define LRADC_CTRL2_TEMP_SENSOR_IENABLE0 (1 << 8) +#define LRADC_CTRL2_TEMP_ISRC1_MASK (0xf << 4) +#define LRADC_CTRL2_TEMP_ISRC1_OFFSET 4 +#define LRADC_CTRL2_TEMP_ISRC1_300 (0xf << 4) +#define LRADC_CTRL2_TEMP_ISRC1_280 (0xe << 4) +#define LRADC_CTRL2_TEMP_ISRC1_260 (0xd << 4) +#define LRADC_CTRL2_TEMP_ISRC1_240 (0xc << 4) +#define LRADC_CTRL2_TEMP_ISRC1_220 (0xb << 4) +#define LRADC_CTRL2_TEMP_ISRC1_200 (0xa << 4) +#define LRADC_CTRL2_TEMP_ISRC1_180 (0x9 << 4) +#define LRADC_CTRL2_TEMP_ISRC1_160 (0x8 << 4) +#define LRADC_CTRL2_TEMP_ISRC1_140 (0x7 << 4) +#define LRADC_CTRL2_TEMP_ISRC1_120 (0x6 << 4) +#define LRADC_CTRL2_TEMP_ISRC1_100 (0x5 << 4) +#define LRADC_CTRL2_TEMP_ISRC1_80 (0x4 << 4) +#define LRADC_CTRL2_TEMP_ISRC1_60 (0x3 << 4) +#define LRADC_CTRL2_TEMP_ISRC1_40 (0x2 << 4) +#define LRADC_CTRL2_TEMP_ISRC1_20 (0x1 << 4) +#define LRADC_CTRL2_TEMP_ISRC1_ZERO (0x0 << 4) +#define LRADC_CTRL2_TEMP_ISRC0_MASK (0xf << 0) +#define LRADC_CTRL2_TEMP_ISRC0_OFFSET 0 +#define LRADC_CTRL2_TEMP_ISRC0_300 (0xf << 0) +#define LRADC_CTRL2_TEMP_ISRC0_280 (0xe << 0) +#define LRADC_CTRL2_TEMP_ISRC0_260 (0xd << 0) +#define LRADC_CTRL2_TEMP_ISRC0_240 (0xc << 0) +#define LRADC_CTRL2_TEMP_ISRC0_220 (0xb << 0) +#define LRADC_CTRL2_TEMP_ISRC0_200 (0xa << 0) +#define LRADC_CTRL2_TEMP_ISRC0_180 (0x9 << 0) +#define LRADC_CTRL2_TEMP_ISRC0_160 (0x8 << 0) +#define LRADC_CTRL2_TEMP_ISRC0_140 (0x7 << 0) +#define LRADC_CTRL2_TEMP_ISRC0_120 (0x6 << 0) +#define LRADC_CTRL2_TEMP_ISRC0_100 (0x5 << 0) +#define LRADC_CTRL2_TEMP_ISRC0_80 (0x4 << 0) +#define LRADC_CTRL2_TEMP_ISRC0_60 (0x3 << 0) +#define LRADC_CTRL2_TEMP_ISRC0_40 (0x2 << 0) +#define LRADC_CTRL2_TEMP_ISRC0_20 (0x1 << 0) +#define LRADC_CTRL2_TEMP_ISRC0_ZERO (0x0 << 0) + +#define LRADC_CTRL3_DISCARD_MASK (0x3 << 24) +#define LRADC_CTRL3_DISCARD_OFFSET 24 +#define LRADC_CTRL3_DISCARD_1_SAMPLE (0x1 << 24) +#define LRADC_CTRL3_DISCARD_2_SAMPLES (0x2 << 24) +#define LRADC_CTRL3_DISCARD_3_SAMPLES (0x3 << 24) +#define LRADC_CTRL3_FORCE_ANALOG_PWUP (1 << 23) +#define LRADC_CTRL3_FORCE_ANALOG_PWDN (1 << 22) +#define LRADC_CTRL3_CYCLE_TIME_MASK (0x3 << 8) +#define LRADC_CTRL3_CYCLE_TIME_OFFSET 8 +#define LRADC_CTRL3_CYCLE_TIME_6MHZ (0x0 << 8) +#define LRADC_CTRL3_CYCLE_TIME_4MHZ (0x1 << 8) +#define LRADC_CTRL3_CYCLE_TIME_3MHZ (0x2 << 8) +#define LRADC_CTRL3_CYCLE_TIME_2MHZ (0x3 << 8) +#define LRADC_CTRL3_HIGH_TIME_MASK (0x3 << 4) +#define LRADC_CTRL3_HIGH_TIME_OFFSET 4 +#define LRADC_CTRL3_HIGH_TIME_42NS (0x0 << 4) +#define LRADC_CTRL3_HIGH_TIME_83NS (0x1 << 4) +#define LRADC_CTRL3_HIGH_TIME_125NS (0x2 << 4) +#define LRADC_CTRL3_HIGH_TIME_250NS (0x3 << 4) +#define LRADC_CTRL3_DELAY_CLOCK (1 << 1) +#define LRADC_CTRL3_INVERT_CLOCK (1 << 0) + +#define LRADC_STATUS_BUTTON1_PRESENT (1 << 28) +#define LRADC_STATUS_BUTTON0_PRESENT (1 << 27) +#define LRADC_STATUS_TEMP1_PRESENT (1 << 26) +#define LRADC_STATUS_TEMP0_PRESENT (1 << 25) +#define LRADC_STATUS_TOUCH_PANEL_PRESENT (1 << 24) +#define LRADC_STATUS_CHANNEL7_PRESENT (1 << 23) +#define LRADC_STATUS_CHANNEL6_PRESENT (1 << 22) +#define LRADC_STATUS_CHANNEL5_PRESENT (1 << 21) +#define LRADC_STATUS_CHANNEL4_PRESENT (1 << 20) +#define LRADC_STATUS_CHANNEL3_PRESENT (1 << 19) +#define LRADC_STATUS_CHANNEL2_PRESENT (1 << 18) +#define LRADC_STATUS_CHANNEL1_PRESENT (1 << 17) +#define LRADC_STATUS_CHANNEL0_PRESENT (1 << 16) +#define LRADC_STATUS_BUTTON1_DETECT_RAW (1 << 2) +#define LRADC_STATUS_BUTTON0_DETECT_RAW (1 << 1) +#define LRADC_STATUS_TOUCH_DETECT_RAW (1 << 0) + +#define LRADC_CH_TOGGLE (1 << 31) +#define LRADC_CH7_TESTMODE_TOGGLE (1 << 30) +#define LRADC_CH_ACCUMULATE (1 << 29) +#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24) +#define LRADC_CH_NUM_SAMPLES_OFFSET 24 +#define LRADC_CH_VALUE_MASK 0x3ffff +#define LRADC_CH_VALUE_OFFSET 0 + +#define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xff << 24) +#define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24 +#define LRADC_DELAY_KICK (1 << 20) +#define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16) +#define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16 +#define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11) +#define LRADC_DELAY_LOOP_COUNT_OFFSET 11 +#define LRADC_DELAY_DELAY_MASK 0x7ff +#define LRADC_DELAY_DELAY_OFFSET 0 + +#define LRADC_DEBUG0_READONLY_MASK (0xffff << 16) +#define LRADC_DEBUG0_READONLY_OFFSET 16 +#define LRADC_DEBUG0_STATE_MASK (0xfff << 0) +#define LRADC_DEBUG0_STATE_OFFSET 0 + +#define LRADC_DEBUG1_REQUEST_MASK (0xff << 16) +#define LRADC_DEBUG1_REQUEST_OFFSET 16 +#define LRADC_DEBUG1_TESTMODE_COUNT_MASK (0x1f << 8) +#define LRADC_DEBUG1_TESTMODE_COUNT_OFFSET 8 +#define LRADC_DEBUG1_TESTMODE6 (1 << 2) +#define LRADC_DEBUG1_TESTMODE5 (1 << 1) +#define LRADC_DEBUG1_TESTMODE (1 << 0) + +#define LRADC_CONVERSION_AUTOMATIC (1 << 20) +#define LRADC_CONVERSION_SCALE_FACTOR_MASK (0x3 << 16) +#define LRADC_CONVERSION_SCALE_FACTOR_OFFSET 16 +#define LRADC_CONVERSION_SCALE_FACTOR_NIMH (0x0 << 16) +#define LRADC_CONVERSION_SCALE_FACTOR_DUAL_NIMH (0x1 << 16) +#define LRADC_CONVERSION_SCALE_FACTOR_LI_ION (0x2 << 16) +#define LRADC_CONVERSION_SCALE_FACTOR_ALT_LI_ION (0x3 << 16) +#define LRADC_CONVERSION_SCALED_BATT_VOLTAGE_MASK 0x3ff +#define LRADC_CONVERSION_SCALED_BATT_VOLTAGE_OFFSET 0 + +#define LRADC_CTRL4_LRADC7SELECT_MASK (0xf << 28) +#define LRADC_CTRL4_LRADC7SELECT_OFFSET 28 +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL0 (0x0 << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL1 (0x1 << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL2 (0x2 << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL3 (0x3 << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL4 (0x4 << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL5 (0x5 << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL6 (0x6 << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL7 (0x7 << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL8 (0x8 << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL9 (0x9 << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL10 (0xa << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL11 (0xb << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL12 (0xc << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL13 (0xd << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL14 (0xe << 28) +#define LRADC_CTRL4_LRADC7SELECT_CHANNEL15 (0xf << 28) +#define LRADC_CTRL4_LRADC6SELECT_MASK (0xf << 24) +#define LRADC_CTRL4_LRADC6SELECT_OFFSET 24 +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL0 (0x0 << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL1 (0x1 << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL2 (0x2 << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL3 (0x3 << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL4 (0x4 << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL5 (0x5 << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL6 (0x6 << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL7 (0x7 << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL8 (0x8 << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL9 (0x9 << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL10 (0xa << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL11 (0xb << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL12 (0xc << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL13 (0xd << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL14 (0xe << 24) +#define LRADC_CTRL4_LRADC6SELECT_CHANNEL15 (0xf << 24) +#define LRADC_CTRL4_LRADC5SELECT_MASK (0xf << 20) +#define LRADC_CTRL4_LRADC5SELECT_OFFSET 20 +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL0 (0x0 << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL1 (0x1 << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL2 (0x2 << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL3 (0x3 << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL4 (0x4 << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL5 (0x5 << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL6 (0x6 << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL7 (0x7 << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL8 (0x8 << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL9 (0x9 << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL10 (0xa << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL11 (0xb << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL12 (0xc << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL13 (0xd << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL14 (0xe << 20) +#define LRADC_CTRL4_LRADC5SELECT_CHANNEL15 (0xf << 20) +#define LRADC_CTRL4_LRADC4SELECT_MASK (0xf << 16) +#define LRADC_CTRL4_LRADC4SELECT_OFFSET 16 +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL0 (0x0 << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL1 (0x1 << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL2 (0x2 << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL3 (0x3 << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL4 (0x4 << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL5 (0x5 << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL6 (0x6 << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL7 (0x7 << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL8 (0x8 << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL9 (0x9 << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL10 (0xa << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL11 (0xb << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL12 (0xc << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL13 (0xd << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL14 (0xe << 16) +#define LRADC_CTRL4_LRADC4SELECT_CHANNEL15 (0xf << 16) +#define LRADC_CTRL4_LRADC3SELECT_MASK (0xf << 12) +#define LRADC_CTRL4_LRADC3SELECT_OFFSET 12 +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL0 (0x0 << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL1 (0x1 << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL2 (0x2 << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL3 (0x3 << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL4 (0x4 << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL5 (0x5 << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL6 (0x6 << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL7 (0x7 << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL8 (0x8 << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL9 (0x9 << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL10 (0xa << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL11 (0xb << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL12 (0xc << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL13 (0xd << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL14 (0xe << 12) +#define LRADC_CTRL4_LRADC3SELECT_CHANNEL15 (0xf << 12) +#define LRADC_CTRL4_LRADC2SELECT_MASK (0xf << 8) +#define LRADC_CTRL4_LRADC2SELECT_OFFSET 8 +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL0 (0x0 << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL1 (0x1 << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL2 (0x2 << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL3 (0x3 << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL4 (0x4 << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL5 (0x5 << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL6 (0x6 << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL7 (0x7 << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL8 (0x8 << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL9 (0x9 << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL10 (0xa << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL11 (0xb << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL12 (0xc << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL13 (0xd << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL14 (0xe << 8) +#define LRADC_CTRL4_LRADC2SELECT_CHANNEL15 (0xf << 8) +#define LRADC_CTRL4_LRADC1SELECT_MASK (0xf << 4) +#define LRADC_CTRL4_LRADC1SELECT_OFFSET 4 +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL0 (0x0 << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL1 (0x1 << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL2 (0x2 << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL3 (0x3 << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL4 (0x4 << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL5 (0x5 << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL6 (0x6 << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL7 (0x7 << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL8 (0x8 << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL9 (0x9 << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL10 (0xa << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL11 (0xb << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL12 (0xc << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL13 (0xd << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL14 (0xe << 4) +#define LRADC_CTRL4_LRADC1SELECT_CHANNEL15 (0xf << 4) +#define LRADC_CTRL4_LRADC0SELECT_MASK 0xf +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL0 (0x0 << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL1 (0x1 << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL2 (0x2 << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL3 (0x3 << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL4 (0x4 << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL5 (0x5 << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL6 (0x6 << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL7 (0x7 << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL8 (0x8 << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL9 (0x9 << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL10 (0xa << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL11 (0xb << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL12 (0xc << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL13 (0xd << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL14 (0xe << 0) +#define LRADC_CTRL4_LRADC0SELECT_CHANNEL15 (0xf << 0) + +#define LRADC_THRESHOLD_ENABLE (1 << 24) +#define LRADC_THRESHOLD_BATTCHRG_DISABLE (1 << 23) +#define LRADC_THRESHOLD_CHANNEL_SEL_MASK (0x7 << 20) +#define LRADC_THRESHOLD_CHANNEL_SEL_OFFSET 20 +#define LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL0 (0x0 << 20) +#define LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL1 (0x1 << 20) +#define LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL2 (0x2 << 20) +#define LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL3 (0x3 << 20) +#define LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL4 (0x4 << 20) +#define LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL5 (0x5 << 20) +#define LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL6 (0x6 << 20) +#define LRADC_THRESHOLD_CHANNEL_SEL_CHANNEL7 (0x7 << 20) +#define LRADC_THRESHOLD_SETTING_MASK (0x3 << 18) +#define LRADC_THRESHOLD_SETTING_OFFSET 18 +#define LRADC_THRESHOLD_SETTING_NO_COMPARE (0x0 << 18) +#define LRADC_THRESHOLD_SETTING_DETECT_LOW (0x1 << 18) +#define LRADC_THRESHOLD_SETTING_DETECT_HIGH (0x2 << 18) +#define LRADC_THRESHOLD_SETTING_RESERVED (0x3 << 18) +#define LRADC_THRESHOLD_VALUE_MASK 0x3ffff +#define LRADC_THRESHOLD_VALUE_OFFSET 0 + +#define LRADC_VERSION_MAJOR_MASK (0xff << 24) +#define LRADC_VERSION_MAJOR_OFFSET 24 +#define LRADC_VERSION_MINOR_MASK (0xff << 16) +#define LRADC_VERSION_MINOR_OFFSET 16 +#define LRADC_VERSION_STEP_MASK 0xffff +#define LRADC_VERSION_STEP_OFFSET 0 + +#endif /* __MX28_REGS_LRADC_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/regs-power-mx28.h b/arch/arm/mach-mxs/include/mach/regs-power-mx28.h new file mode 100644 index 0000000000..7b7349662b --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/regs-power-mx28.h @@ -0,0 +1,408 @@ +/* + * Freescale i.MX28 Power Controller Register Definitions + * + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MX28_REGS_POWER_H__ +#define __MX28_REGS_POWER_H__ + +#include <mach/regs-common.h> + +#ifndef __ASSEMBLY__ +struct mxs_power_regs { + mxs_reg_32(hw_power_ctrl) + mxs_reg_32(hw_power_5vctrl) + mxs_reg_32(hw_power_minpwr) + mxs_reg_32(hw_power_charge) + uint32_t hw_power_vdddctrl; + uint32_t reserved_vddd[3]; + uint32_t hw_power_vddactrl; + uint32_t reserved_vdda[3]; + uint32_t hw_power_vddioctrl; + uint32_t reserved_vddio[3]; + uint32_t hw_power_vddmemctrl; + uint32_t reserved_vddmem[3]; + uint32_t hw_power_dcdc4p2; + uint32_t reserved_dcdc4p2[3]; + uint32_t hw_power_misc; + uint32_t reserved_misc[3]; + uint32_t hw_power_dclimits; + uint32_t reserved_dclimits[3]; + mxs_reg_32(hw_power_loopctrl) + uint32_t hw_power_sts; + uint32_t reserved_sts[3]; + mxs_reg_32(hw_power_speed) + uint32_t hw_power_battmonitor; + uint32_t reserved_battmonitor[3]; + + uint32_t reserved[4]; + + mxs_reg_32(hw_power_reset) +}; +#endif + +#define MX23_POWER_CTRL_CLKGATE (1 << 30) +#define POWER_CTRL_PSWITCH_MID_TRAN (1 << 27) +#define POWER_CTRL_DCDC4P2_BO_IRQ (1 << 24) +#define POWER_CTRL_ENIRQ_DCDC4P2_BO (1 << 23) +#define POWER_CTRL_VDD5V_DROOP_IRQ (1 << 22) +#define POWER_CTRL_ENIRQ_VDD5V_DROOP (1 << 21) +#define POWER_CTRL_PSWITCH_IRQ (1 << 20) +#define POWER_CTRL_PSWITCH_IRQ_SRC (1 << 19) +#define POWER_CTRL_POLARITY_PSWITCH (1 << 18) +#define POWER_CTRL_ENIRQ_PSWITCH (1 << 17) +#define POWER_CTRL_POLARITY_DC_OK (1 << 16) +#define POWER_CTRL_DC_OK_IRQ (1 << 15) +#define POWER_CTRL_ENIRQ_DC_OK (1 << 14) +#define POWER_CTRL_BATT_BO_IRQ (1 << 13) +#define POWER_CTRL_ENIRQ_BATT_BO (1 << 12) +#define POWER_CTRL_VDDIO_BO_IRQ (1 << 11) +#define POWER_CTRL_ENIRQ_VDDIO_BO (1 << 10) +#define POWER_CTRL_VDDA_BO_IRQ (1 << 9) +#define POWER_CTRL_ENIRQ_VDDA_BO (1 << 8) +#define POWER_CTRL_VDDD_BO_IRQ (1 << 7) +#define POWER_CTRL_ENIRQ_VDDD_BO (1 << 6) +#define POWER_CTRL_POLARITY_VBUSVALID (1 << 5) +#define POWER_CTRL_VBUS_VALID_IRQ (1 << 4) +#define POWER_CTRL_ENIRQ_VBUS_VALID (1 << 3) +#define POWER_CTRL_POLARITY_VDD5V_GT_VDDIO (1 << 2) +#define POWER_CTRL_VDD5V_GT_VDDIO_IRQ (1 << 1) +#define POWER_CTRL_ENIRQ_VDD5V_GT_VDDIO (1 << 0) + +#define MX28_POWER_5VCTRL_VBUSDROOP_TRSH_MASK (0x3 << 30) +#define MX28_POWER_5VCTRL_VBUSDROOP_TRSH_OFFSET 30 +#define MX28_POWER_5VCTRL_VBUSDROOP_TRSH_4V3 (0x0 << 30) +#define MX28_POWER_5VCTRL_VBUSDROOP_TRSH_4V4 (0x1 << 30) +#define MX28_POWER_5VCTRL_VBUSDROOP_TRSH_4V5 (0x2 << 30) +#define MX28_POWER_5VCTRL_VBUSDROOP_TRSH_4V7 (0x3 << 30) + +#define MX23_POWER_5VCTRL_VBUSDROOP_TRSH_MASK (0x3 << 28) +#define MX23_POWER_5VCTRL_VBUSDROOP_TRSH_OFFSET 28 +#define MX23_POWER_5VCTRL_VBUSDROOP_TRSH_4V3 (0x0 << 28) +#define MX23_POWER_5VCTRL_VBUSDROOP_TRSH_4V4 (0x1 << 28) +#define MX23_POWER_5VCTRL_VBUSDROOP_TRSH_4V5 (0x2 << 28) +#define MX23_POWER_5VCTRL_VBUSDROOP_TRSH_4V7 (0x3 << 28) + +#define POWER_5VCTRL_HEADROOM_ADJ_MASK (0x7 << 24) +#define POWER_5VCTRL_HEADROOM_ADJ_OFFSET 24 +#define MX28_POWER_5VCTRL_PWD_CHARGE_4P2_MASK (0x3 << 20) +#define MX23_POWER_5VCTRL_PWD_CHARGE_4P2_MASK (0x1 << 20) +#define POWER_5VCTRL_PWD_CHARGE_4P2_OFFSET 20 +#define POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK (0x3f << 12) +#define POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET 12 +#define POWER_5VCTRL_VBUSVALID_TRSH_MASK (0x7 << 8) +#define POWER_5VCTRL_VBUSVALID_TRSH_OFFSET 8 +#define POWER_5VCTRL_VBUSVALID_TRSH_2V9 (0x0 << 8) +#define POWER_5VCTRL_VBUSVALID_TRSH_4V0 (0x1 << 8) +#define POWER_5VCTRL_VBUSVALID_TRSH_4V1 (0x2 << 8) +#define POWER_5VCTRL_VBUSVALID_TRSH_4V2 (0x3 << 8) +#define POWER_5VCTRL_VBUSVALID_TRSH_4V3 (0x4 << 8) +#define POWER_5VCTRL_VBUSVALID_TRSH_4V4 (0x5 << 8) +#define POWER_5VCTRL_VBUSVALID_TRSH_4V5 (0x6 << 8) +#define POWER_5VCTRL_VBUSVALID_TRSH_4V6 (0x7 << 8) +#define POWER_5VCTRL_PWDN_5VBRNOUT (1 << 7) +#define POWER_5VCTRL_ENABLE_LINREG_ILIMIT (1 << 6) +#define POWER_5VCTRL_DCDC_XFER (1 << 5) +#define POWER_5VCTRL_VBUSVALID_5VDETECT (1 << 4) +#define POWER_5VCTRL_VBUSVALID_TO_B (1 << 3) +#define POWER_5VCTRL_ILIMIT_EQ_ZERO (1 << 2) +#define POWER_5VCTRL_PWRUP_VBUS_CMPS (1 << 1) +#define POWER_5VCTRL_ENABLE_DCDC (1 << 0) + +#define POWER_MINPWR_LOWPWR_4P2 (1 << 14) +#define MX23_POWER_MINPWR_VDAC_DUMP_CTRL (1 << 13) +#define POWER_MINPWR_PWD_BO (1 << 12) +#define POWER_MINPWR_USE_VDDXTAL_VBG (1 << 11) +#define POWER_MINPWR_PWD_ANA_CMPS (1 << 10) +#define POWER_MINPWR_ENABLE_OSC (1 << 9) +#define POWER_MINPWR_SELECT_OSC (1 << 8) +#define POWER_MINPWR_VBG_OFF (1 << 7) +#define POWER_MINPWR_DOUBLE_FETS (1 << 6) +#define POWER_MINPWR_HALFFETS (1 << 5) +#define POWER_MINPWR_LESSANA_I (1 << 4) +#define POWER_MINPWR_PWD_XTAL24 (1 << 3) +#define POWER_MINPWR_DC_STOPCLK (1 << 2) +#define POWER_MINPWR_EN_DC_PFM (1 << 1) +#define POWER_MINPWR_DC_HALFCLK (1 << 0) + +#define POWER_CHARGE_ADJ_VOLT_MASK (0x7 << 24) +#define POWER_CHARGE_ADJ_VOLT_OFFSET 24 +#define POWER_CHARGE_ADJ_VOLT_M025P (0x1 << 24) +#define POWER_CHARGE_ADJ_VOLT_P050P (0x2 << 24) +#define POWER_CHARGE_ADJ_VOLT_M075P (0x3 << 24) +#define POWER_CHARGE_ADJ_VOLT_P025P (0x4 << 24) +#define POWER_CHARGE_ADJ_VOLT_M050P (0x5 << 24) +#define POWER_CHARGE_ADJ_VOLT_P075P (0x6 << 24) +#define POWER_CHARGE_ADJ_VOLT_M100P (0x7 << 24) +#define POWER_CHARGE_ENABLE_LOAD (1 << 22) +#define MX23_POWER_CHARGE_ENABLE_CHARGER_RESISTORS (1 << 21) +#define POWER_CHARGE_ENABLE_FAULT_DETECT (1 << 20) +#define POWER_CHARGE_CHRG_STS_OFF (1 << 19) +#define MX28_POWER_CHARGE_LIION_4P1 (1 << 18) +#define MX23_POWER_CHARGE_USE_EXTERN_R (1 << 17) +#define POWER_CHARGE_PWD_BATTCHRG (1 << 16) +#define MX28_POWER_CHARGE_ENABLE_CHARGER_USB1 (1 << 13) +#define MX28_POWER_CHARGE_ENABLE_CHARGER_USB0 (1 << 12) +#define POWER_CHARGE_STOP_ILIMIT_MASK (0xf << 8) +#define POWER_CHARGE_STOP_ILIMIT_OFFSET 8 +#define POWER_CHARGE_STOP_ILIMIT_10MA (0x1 << 8) +#define POWER_CHARGE_STOP_ILIMIT_20MA (0x2 << 8) +#define POWER_CHARGE_STOP_ILIMIT_50MA (0x4 << 8) +#define POWER_CHARGE_STOP_ILIMIT_100MA (0x8 << 8) +#define POWER_CHARGE_BATTCHRG_I_MASK 0x3f +#define POWER_CHARGE_BATTCHRG_I_OFFSET 0 +#define POWER_CHARGE_BATTCHRG_I_10MA 0x01 +#define POWER_CHARGE_BATTCHRG_I_20MA 0x02 +#define POWER_CHARGE_BATTCHRG_I_50MA 0x04 +#define POWER_CHARGE_BATTCHRG_I_100MA 0x08 +#define POWER_CHARGE_BATTCHRG_I_200MA 0x10 +#define POWER_CHARGE_BATTCHRG_I_400MA 0x20 + +#define POWER_VDDDCTRL_ADJTN_MASK (0xf << 28) +#define POWER_VDDDCTRL_ADJTN_OFFSET 28 +#define POWER_VDDDCTRL_PWDN_BRNOUT (1 << 23) +#define POWER_VDDDCTRL_DISABLE_STEPPING (1 << 22) +#define POWER_VDDDCTRL_ENABLE_LINREG (1 << 21) +#define POWER_VDDDCTRL_DISABLE_FET (1 << 20) +#define POWER_VDDDCTRL_LINREG_OFFSET_MASK (0x3 << 16) +#define POWER_VDDDCTRL_LINREG_OFFSET_OFFSET 16 +#define POWER_VDDDCTRL_LINREG_OFFSET_0STEPS (0x0 << 16) +#define POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_ABOVE (0x1 << 16) +#define POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW (0x2 << 16) +#define POWER_VDDDCTRL_LINREG_OFFSET_2STEPS_BELOW (0x3 << 16) +#define POWER_VDDDCTRL_BO_OFFSET_MASK (0x7 << 8) +#define POWER_VDDDCTRL_BO_OFFSET_OFFSET 8 +#define POWER_VDDDCTRL_TRG_MASK 0x1f +#define POWER_VDDDCTRL_TRG_OFFSET 0 + +#define POWER_VDDACTRL_PWDN_BRNOUT (1 << 19) +#define POWER_VDDACTRL_DISABLE_STEPPING (1 << 18) +#define POWER_VDDACTRL_ENABLE_LINREG (1 << 17) +#define POWER_VDDACTRL_DISABLE_FET (1 << 16) +#define POWER_VDDACTRL_LINREG_OFFSET_MASK (0x3 << 12) +#define POWER_VDDACTRL_LINREG_OFFSET_OFFSET 12 +#define POWER_VDDACTRL_LINREG_OFFSET_0STEPS (0x0 << 12) +#define POWER_VDDACTRL_LINREG_OFFSET_1STEPS_ABOVE (0x1 << 12) +#define POWER_VDDACTRL_LINREG_OFFSET_1STEPS_BELOW (0x2 << 12) +#define POWER_VDDACTRL_LINREG_OFFSET_2STEPS_BELOW (0x3 << 12) +#define POWER_VDDACTRL_BO_OFFSET_MASK (0x7 << 8) +#define POWER_VDDACTRL_BO_OFFSET_OFFSET 8 +#define POWER_VDDACTRL_TRG_MASK 0x1f +#define POWER_VDDACTRL_TRG_OFFSET 0 + +#define POWER_VDDIOCTRL_ADJTN_MASK (0xf << 20) +#define POWER_VDDIOCTRL_ADJTN_OFFSET 20 +#define POWER_VDDIOCTRL_PWDN_BRNOUT (1 << 18) +#define POWER_VDDIOCTRL_DISABLE_STEPPING (1 << 17) +#define POWER_VDDIOCTRL_DISABLE_FET (1 << 16) +#define POWER_VDDIOCTRL_LINREG_OFFSET_MASK (0x3 << 12) +#define POWER_VDDIOCTRL_LINREG_OFFSET_OFFSET 12 +#define POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS (0x0 << 12) +#define POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_ABOVE (0x1 << 12) +#define POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW (0x2 << 12) +#define POWER_VDDIOCTRL_LINREG_OFFSET_2STEPS_BELOW (0x3 << 12) +#define POWER_VDDIOCTRL_BO_OFFSET_MASK (0x7 << 8) +#define POWER_VDDIOCTRL_BO_OFFSET_OFFSET 8 +#define POWER_VDDIOCTRL_TRG_MASK 0x1f +#define POWER_VDDIOCTRL_TRG_OFFSET 0 + +#define POWER_VDDMEMCTRL_PULLDOWN_ACTIVE (1 << 10) +#define POWER_VDDMEMCTRL_ENABLE_ILIMIT (1 << 9) +#define POWER_VDDMEMCTRL_ENABLE_LINREG (1 << 8) +#define MX28_POWER_VDDMEMCTRL_BO_OFFSET_MASK (0x7 << 5) +#define MX28_POWER_VDDMEMCTRL_BO_OFFSET_OFFSET 5 +#define POWER_VDDMEMCTRL_TRG_MASK 0x1f +#define POWER_VDDMEMCTRL_TRG_OFFSET 0 + +#define POWER_DCDC4P2_DROPOUT_CTRL_MASK (0xf << 28) +#define POWER_DCDC4P2_DROPOUT_CTRL_OFFSET 28 +#define POWER_DCDC4P2_DROPOUT_CTRL_200MV (0x3 << 30) +#define POWER_DCDC4P2_DROPOUT_CTRL_100MV (0x2 << 30) +#define POWER_DCDC4P2_DROPOUT_CTRL_50MV (0x1 << 30) +#define POWER_DCDC4P2_DROPOUT_CTRL_25MV (0x0 << 30) +#define POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2 (0x0 << 28) +#define POWER_DCDC4P2_DROPOUT_CTRL_SRC_4P2_LT_BATT (0x1 << 28) +#define POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL (0x2 << 28) +#define POWER_DCDC4P2_ISTEAL_THRESH_MASK (0x3 << 24) +#define POWER_DCDC4P2_ISTEAL_THRESH_OFFSET 24 +#define POWER_DCDC4P2_ENABLE_4P2 (1 << 23) +#define POWER_DCDC4P2_ENABLE_DCDC (1 << 22) +#define POWER_DCDC4P2_HYST_DIR (1 << 21) +#define POWER_DCDC4P2_HYST_THRESH (1 << 20) +#define POWER_DCDC4P2_TRG_MASK (0x7 << 16) +#define POWER_DCDC4P2_TRG_OFFSET 16 +#define POWER_DCDC4P2_TRG_4V2 (0x0 << 16) +#define POWER_DCDC4P2_TRG_4V1 (0x1 << 16) +#define POWER_DCDC4P2_TRG_4V0 (0x2 << 16) +#define POWER_DCDC4P2_TRG_3V9 (0x3 << 16) +#define POWER_DCDC4P2_TRG_BATT (0x4 << 16) +#define POWER_DCDC4P2_BO_MASK (0x1f << 8) +#define POWER_DCDC4P2_BO_OFFSET 8 +#define POWER_DCDC4P2_CMPTRIP_MASK 0x1f +#define POWER_DCDC4P2_CMPTRIP_OFFSET 0 + +#define POWER_MISC_FREQSEL_MASK (0x7 << 4) +#define POWER_MISC_FREQSEL_OFFSET 4 +#define POWER_MISC_FREQSEL_20MHZ (0x1 << 4) +#define POWER_MISC_FREQSEL_24MHZ (0x2 << 4) +#define POWER_MISC_FREQSEL_19MHZ (0x3 << 4) +#define POWER_MISC_FREQSEL_14MHZ (0x4 << 4) +#define POWER_MISC_FREQSEL_18MHZ (0x5 << 4) +#define POWER_MISC_FREQSEL_21MHZ (0x6 << 4) +#define POWER_MISC_FREQSEL_17MHZ (0x7 << 4) +#define POWER_MISC_DISABLE_FET_BO_LOGIC (1 << 3) +#define POWER_MISC_DELAY_TIMING (1 << 2) +#define POWER_MISC_TEST (1 << 1) +#define POWER_MISC_SEL_PLLCLK (1 << 0) + +#define POWER_DCLIMITS_POSLIMIT_BUCK_MASK (0x7f << 8) +#define POWER_DCLIMITS_POSLIMIT_BUCK_OFFSET 8 +#define POWER_DCLIMITS_NEGLIMIT_MASK 0x7f +#define POWER_DCLIMITS_NEGLIMIT_OFFSET 0 + +#define POWER_LOOPCTRL_TOGGLE_DIF (1 << 20) +#define POWER_LOOPCTRL_HYST_SIGN (1 << 19) +#define POWER_LOOPCTRL_EN_CM_HYST (1 << 18) +#define POWER_LOOPCTRL_EN_DF_HYST (1 << 17) +#define POWER_LOOPCTRL_CM_HYST_THRESH (1 << 16) +#define POWER_LOOPCTRL_DF_HYST_THRESH (1 << 15) +#define POWER_LOOPCTRL_RCSCALE_THRESH (1 << 14) +#define POWER_LOOPCTRL_EN_RCSCALE_MASK (0x3 << 12) +#define POWER_LOOPCTRL_EN_RCSCALE_OFFSET 12 +#define POWER_LOOPCTRL_EN_RCSCALE_DIS (0x0 << 12) +#define POWER_LOOPCTRL_EN_RCSCALE_2X (0x1 << 12) +#define POWER_LOOPCTRL_EN_RCSCALE_4X (0x2 << 12) +#define POWER_LOOPCTRL_EN_RCSCALE_8X (0x3 << 12) +#define POWER_LOOPCTRL_DC_FF_MASK (0x7 << 8) +#define POWER_LOOPCTRL_DC_FF_OFFSET 8 +#define POWER_LOOPCTRL_DC_R_MASK (0xf << 4) +#define POWER_LOOPCTRL_DC_R_OFFSET 4 +#define POWER_LOOPCTRL_DC_C_MASK 0x3 +#define POWER_LOOPCTRL_DC_C_OFFSET 0 +#define POWER_LOOPCTRL_DC_C_MAX 0x0 +#define POWER_LOOPCTRL_DC_C_2X 0x1 +#define POWER_LOOPCTRL_DC_C_4X 0x2 +#define POWER_LOOPCTRL_DC_C_MIN 0x3 + +#define POWER_STS_PWRUP_SOURCE_MASK (0x3f << 24) +#define POWER_STS_PWRUP_SOURCE_OFFSET 24 +#define POWER_STS_PWRUP_SOURCE_5V (0x20 << 24) +#define POWER_STS_PWRUP_SOURCE_RTC (0x10 << 24) +#define POWER_STS_PWRUP_SOURCE_PSWITCH_HIGH (0x02 << 24) +#define POWER_STS_PWRUP_SOURCE_PSWITCH_MID (0x01 << 24) +#define POWER_STS_PSWITCH_MASK (0x3 << 20) +#define POWER_STS_PSWITCH_OFFSET 20 +#define MX28_POWER_STS_THERMAL_WARNING (1 << 19) +#define MX28_POWER_STS_VDDMEM_BO (1 << 18) +#define POWER_STS_AVALID0_STATUS (1 << 17) +#define POWER_STS_BVALID0_STATUS (1 << 16) +#define POWER_STS_VBUSVALID0_STATUS (1 << 15) +#define POWER_STS_SESSEND0_STATUS (1 << 14) +#define POWER_STS_BATT_BO (1 << 13) +#define POWER_STS_VDD5V_FAULT (1 << 12) +#define POWER_STS_CHRGSTS (1 << 11) +#define POWER_STS_DCDC_4P2_BO (1 << 10) +#define POWER_STS_DC_OK (1 << 9) +#define POWER_STS_VDDIO_BO (1 << 8) +#define POWER_STS_VDDA_BO (1 << 7) +#define POWER_STS_VDDD_BO (1 << 6) +#define POWER_STS_VDD5V_GT_VDDIO (1 << 5) +#define POWER_STS_VDD5V_DROOP (1 << 4) +#define POWER_STS_AVALID0 (1 << 3) +#define POWER_STS_BVALID0 (1 << 2) +#define POWER_STS_VBUSVALID0 (1 << 1) +#define POWER_STS_SESSEND0 (1 << 0) + +#define MX23_POWER_SPEED_STATUS_MASK (0xff << 16) +#define MX23_POWER_SPEED_STATUS_OFFSET 16 +#define MX28_POWER_SPEED_STATUS_MASK (0xffff << 8) +#define MX28_POWER_SPEED_STATUS_OFFSET 8 +#define MX28_POWER_SPEED_STATUS_SEL_MASK (0x3 << 6) +#define MX28_POWER_SPEED_STATUS_SEL_OFFSET 6 +#define MX28_POWER_SPEED_STATUS_SEL_DCDC_STAT (0x0 << 6) +#define MX28_POWER_SPEED_STATUS_SEL_CORE_STAT (0x1 << 6) +#define MX28_POWER_SPEED_STATUS_SEL_ARM_STAT (0x2 << 6) +#define POWER_SPEED_CTRL_MASK 0x3 +#define POWER_SPEED_CTRL_OFFSET 0 +#define POWER_SPEED_CTRL_SS_OFF 0x0 +#define POWER_SPEED_CTRL_SS_ON 0x1 +#define POWER_SPEED_CTRL_SS_ENABLE 0x3 + +#define POWER_BATTMONITOR_BATT_VAL_MASK (0x3ff << 16) +#define POWER_BATTMONITOR_BATT_VAL_OFFSET 16 +#define MX28_POWER_BATTMONITOR_PWDN_BATTBRNOUT_5VDETECT_EN (1 << 11) +#define POWER_BATTMONITOR_EN_BATADJ (1 << 10) +#define POWER_BATTMONITOR_PWDN_BATTBRNOUT (1 << 9) +#define POWER_BATTMONITOR_BRWNOUT_PWD (1 << 8) +#define POWER_BATTMONITOR_BRWNOUT_LVL_MASK 0x1f +#define POWER_BATTMONITOR_BRWNOUT_LVL_OFFSET 0 + +#define POWER_RESET_UNLOCK_MASK (0xffff << 16) +#define POWER_RESET_UNLOCK_OFFSET 16 +#define POWER_RESET_UNLOCK_KEY (0x3e77 << 16) +#define MX28_POWER_RESET_FASTFALL_PSWITCH_OFF (1 << 2) +#define POWER_RESET_PWD_OFF (1 << 1) +#define POWER_RESET_PWD (1 << 0) + +#define POWER_DEBUG_VBUSVALIDPIOLOCK (1 << 3) +#define POWER_DEBUG_AVALIDPIOLOCK (1 << 2) +#define POWER_DEBUG_BVALIDPIOLOCK (1 << 1) +#define POWER_DEBUG_SESSENDPIOLOCK (1 << 0) + +#define MX28_POWER_THERMAL_TEST (1 << 8) +#define MX28_POWER_THERMAL_PWD (1 << 7) +#define MX28_POWER_THERMAL_LOW_POWER (1 << 6) +#define MX28_POWER_THERMAL_OFFSET_ADJ_MASK (0x3 << 4) +#define MX28_POWER_THERMAL_OFFSET_ADJ_OFFSET 4 +#define MX28_POWER_THERMAL_OFFSET_ADJ_ENABLE (1 << 3) +#define MX28_POWER_THERMAL_TEMP_THRESHOLD_MASK 0x7 +#define MX28_POWER_THERMAL_TEMP_THRESHOLD_OFFSET 0 + +#define MX28_POWER_USB1CTRL_AVALID1 (1 << 3) +#define MX28_POWER_USB1CTRL_BVALID1 (1 << 2) +#define MX28_POWER_USB1CTRL_VBUSVALID1 (1 << 1) +#define MX28_POWER_USB1CTRL_SESSEND1 (1 << 0) + +#define POWER_SPECIAL_TEST_MASK 0xffffffff +#define POWER_SPECIAL_TEST_OFFSET 0 + +#define POWER_VERSION_MAJOR_MASK (0xff << 24) +#define POWER_VERSION_MAJOR_OFFSET 24 +#define POWER_VERSION_MINOR_MASK (0xff << 16) +#define POWER_VERSION_MINOR_OFFSET 16 +#define POWER_VERSION_STEP_MASK 0xffff +#define POWER_VERSION_STEP_OFFSET 0 + +#define MX28_POWER_ANACLKCTRL_CLKGATE_0 (1 << 31) +#define MX28_POWER_ANACLKCTRL_OUTDIV_MASK (0x7 << 28) +#define MX28_POWER_ANACLKCTRL_OUTDIV_OFFSET 28 +#define MX28_POWER_ANACLKCTRL_INVERT_OUTCLK (1 << 27) +#define MX28_POWER_ANACLKCTRL_CLKGATE_I (1 << 26) +#define MX28_POWER_ANACLKCTRL_DITHER_OFF (1 << 10) +#define MX28_POWER_ANACLKCTRL_SLOW_DITHER (1 << 9) +#define MX28_POWER_ANACLKCTRL_INVERT_INCLK (1 << 8) +#define MX28_POWER_ANACLKCTRL_INCLK_SHIFT_MASK (0x3 << 4) +#define MX28_POWER_ANACLKCTRL_INCLK_SHIFT_OFFSET 4 +#define MX28_POWER_ANACLKCTRL_INDIV_MASK 0x7 +#define MX28_POWER_ANACLKCTRL_INDIV_OFFSET 0 + +#define MX28_POWER_REFCTRL_FASTSETTLING (1 << 26) +#define MX28_POWER_REFCTRL_RAISE_REF (1 << 25) +#define MX28_POWER_REFCTRL_XTAL_BGR_BIAS (1 << 24) +#define MX28_POWER_REFCTRL_VBG_ADJ_MASK (0x7 << 20) +#define MX28_POWER_REFCTRL_VBG_ADJ_OFFSET 20 +#define MX28_POWER_REFCTRL_LOW_PWR (1 << 19) +#define MX28_POWER_REFCTRL_BIAS_CTRL_MASK (0x3 << 16) +#define MX28_POWER_REFCTRL_BIAS_CTRL_OFFSET 16 +#define MX28_POWER_REFCTRL_VDDXTAL_TO_VDDD (1 << 14) +#define MX28_POWER_REFCTRL_ADJ_ANA (1 << 13) +#define MX28_POWER_REFCTRL_ADJ_VAG (1 << 12) +#define MX28_POWER_REFCTRL_ANA_REFVAL_MASK (0xf << 8) +#define MX28_POWER_REFCTRL_ANA_REFVAL_OFFSET 8 +#define MX28_POWER_REFCTRL_VAG_VAL_MASK (0xf << 4) +#define MX28_POWER_REFCTRL_VAG_VAL_OFFSET 4 + +#endif /* __MX28_REGS_POWER_H__ */ diff --git a/arch/arm/mach-mxs/include/mach/regs-rtc.h b/arch/arm/mach-mxs/include/mach/regs-rtc.h new file mode 100644 index 0000000000..bd8fdad4f7 --- /dev/null +++ b/arch/arm/mach-mxs/include/mach/regs-rtc.h @@ -0,0 +1,134 @@ +/* + * Freescale i.MX28 RTC Register Definitions + * + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MX28_REGS_RTC_H__ +#define __MX28_REGS_RTC_H__ + +#include <mach/regs-common.h> + +#ifndef __ASSEMBLY__ +struct mxs_rtc_regs { + mxs_reg_32(hw_rtc_ctrl) + mxs_reg_32(hw_rtc_stat) + mxs_reg_32(hw_rtc_milliseconds) + mxs_reg_32(hw_rtc_seconds) + mxs_reg_32(hw_rtc_rtc_alarm) + mxs_reg_32(hw_rtc_watchdog) + mxs_reg_32(hw_rtc_persistent0) + mxs_reg_32(hw_rtc_persistent1) + mxs_reg_32(hw_rtc_persistent2) + mxs_reg_32(hw_rtc_persistent3) + mxs_reg_32(hw_rtc_persistent4) + mxs_reg_32(hw_rtc_persistent5) + mxs_reg_32(hw_rtc_debug) + mxs_reg_32(hw_rtc_version) +}; +#endif + +#define RTC_CTRL_SFTRST (1 << 31) +#define RTC_CTRL_CLKGATE (1 << 30) +#define RTC_CTRL_SUPPRESS_COPY2ANALOG (1 << 6) +#define RTC_CTRL_FORCE_UPDATE (1 << 5) +#define RTC_CTRL_WATCHDOGEN (1 << 4) +#define RTC_CTRL_ONEMSEC_IRQ (1 << 3) +#define RTC_CTRL_ALARM_IRQ (1 << 2) +#define RTC_CTRL_ONEMSEC_IRQ_EN (1 << 1) +#define RTC_CTRL_ALARM_IRQ_EN (1 << 0) + +#define RTC_STAT_RTC_PRESENT (1 << 31) +#define RTC_STAT_ALARM_PRESENT (1 << 30) +#define RTC_STAT_WATCHDOG_PRESENT (1 << 29) +#define RTC_STAT_XTAL32000_PRESENT (1 << 28) +#define RTC_STAT_XTAL32768_PRESENT (1 << 27) +#define RTC_STAT_STALE_REGS_MASK (0xff << 16) +#define RTC_STAT_STALE_REGS_OFFSET 16 +#define RTC_STAT_NEW_REGS_MASK (0xff << 8) +#define RTC_STAT_NEW_REGS_OFFSET 8 + +#define RTC_MILLISECONDS_COUNT_MASK 0xffffffff +#define RTC_MILLISECONDS_COUNT_OFFSET 0 + +#define RTC_SECONDS_COUNT_MASK 0xffffffff +#define RTC_SECONDS_COUNT_OFFSET 0 + +#define RTC_ALARM_VALUE_MASK 0xffffffff +#define RTC_ALARM_VALUE_OFFSET 0 + +#define RTC_WATCHDOG_COUNT_MASK 0xffffffff +#define RTC_WATCHDOG_COUNT_OFFSET 0 + +#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_MASK (0xf << 28) +#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_OFFSET 28 +#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V83 (0x0 << 28) +#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V78 (0x1 << 28) +#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V73 (0x2 << 28) +#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V68 (0x3 << 28) +#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V62 (0x4 << 28) +#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V57 (0x5 << 28) +#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V52 (0x6 << 28) +#define RTC_PERSISTENT0_ADJ_POSLIMITBUCK_2V48 (0x7 << 28) +#define RTC_PERSISTENT0_EXTERNAL_RESET (1 << 21) +#define RTC_PERSISTENT0_THERMAL_RESET (1 << 20) +#define RTC_PERSISTENT0_ENABLE_LRADC_PWRUP (1 << 18) +#define RTC_PERSISTENT0_AUTO_RESTART (1 << 17) +#define RTC_PERSISTENT0_DISABLE_PSWITCH (1 << 16) +#define RTC_PERSISTENT0_LOWERBIAS_MASK (0xf << 14) +#define RTC_PERSISTENT0_LOWERBIAS_OFFSET 14 +#define RTC_PERSISTENT0_LOWERBIAS_NOMINAL (0x0 << 14) +#define RTC_PERSISTENT0_LOWERBIAS_M25P (0x1 << 14) +#define RTC_PERSISTENT0_LOWERBIAS_M50P (0x3 << 14) +#define RTC_PERSISTENT0_DISABLE_XTALOK (1 << 13) +#define RTC_PERSISTENT0_MSEC_RES_MASK (0x1f << 8) +#define RTC_PERSISTENT0_MSEC_RES_OFFSET 8 +#define RTC_PERSISTENT0_MSEC_RES_1MS (0x01 << 8) +#define RTC_PERSISTENT0_MSEC_RES_2MS (0x02 << 8) +#define RTC_PERSISTENT0_MSEC_RES_4MS (0x04 << 8) +#define RTC_PERSISTENT0_MSEC_RES_8MS (0x08 << 8) +#define RTC_PERSISTENT0_MSEC_RES_16MS (0x10 << 8) +#define RTC_PERSISTENT0_ALARM_WAKE (1 << 7) +#define RTC_PERSISTENT0_XTAL32_FREQ (1 << 6) +#define RTC_PERSISTENT0_XTAL32KHZ_PWRUP (1 << 5) +#define RTC_PERSISTENT0_XTAL24KHZ_PWRUP (1 << 4) +#define RTC_PERSISTENT0_LCK_SECS (1 << 3) +#define RTC_PERSISTENT0_ALARM_EN (1 << 2) +#define RTC_PERSISTENT0_ALARM_WAKE_EN (1 << 1) +#define RTC_PERSISTENT0_CLOCKSOURCE (1 << 0) + +#define RTC_PERSISTENT1_GENERAL_MASK 0xffffffff +#define RTC_PERSISTENT1_GENERAL_OFFSET 0 +#define RTC_PERSISTENT1_GENERAL_OTG_ALT_ROLE 0x0080 +#define RTC_PERSISTENT1_GENERAL_OTG_HNP 0x0100 +#define RTC_PERSISTENT1_GENERAL_USB_LPM 0x0200 +#define RTC_PERSISTENT1_GENERAL_SKIP_CHECKDISK 0x0400 +#define RTC_PERSISTENT1_GENERAL_USB_BOOT_PLAYER 0x0800 +#define RTC_PERSISTENT1_GENERAL_ENUM_500MA_2X 0x1000 + +#define RTC_PERSISTENT2_GENERAL_MASK 0xffffffff +#define RTC_PERSISTENT2_GENERAL_OFFSET 0 + +#define RTC_PERSISTENT3_GENERAL_MASK 0xffffffff +#define RTC_PERSISTENT3_GENERAL_OFFSET 0 + +#define RTC_PERSISTENT4_GENERAL_MASK 0xffffffff +#define RTC_PERSISTENT4_GENERAL_OFFSET 0 + +#define RTC_PERSISTENT5_GENERAL_MASK 0xffffffff +#define RTC_PERSISTENT5_GENERAL_OFFSET 0 + +#define RTC_DEBUG_WATCHDOG_RESET_MASK (1 << 1) +#define RTC_DEBUG_WATCHDOG_RESET (1 << 0) + +#define RTC_VERSION_MAJOR_MASK (0xff << 24) +#define RTC_VERSION_MAJOR_OFFSET 24 +#define RTC_VERSION_MINOR_MASK (0xff << 16) +#define RTC_VERSION_MINOR_OFFSET 16 +#define RTC_VERSION_STEP_MASK 0xffff +#define RTC_VERSION_STEP_OFFSET 0 + +#endif /* __MX28_REGS_RTC_H__ */ diff --git a/arch/arm/mach-mxs/lradc-init.c b/arch/arm/mach-mxs/lradc-init.c new file mode 100644 index 0000000000..682a47530d --- /dev/null +++ b/arch/arm/mach-mxs/lradc-init.c @@ -0,0 +1,70 @@ +/* + * Freescale i.MX28 Battery measurement init + * + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <config.h> +#include <asm/io.h> +#include <mach/imx-regs.h> +#include <mach/regs-lradc.h> +#include <mach/init.h> + +void mxs_lradc_init(void) +{ + struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)IMX_LRADC_BASE; + + writel(LRADC_CTRL0_SFTRST, ®s->hw_lradc_ctrl0_clr); + writel(LRADC_CTRL0_CLKGATE, ®s->hw_lradc_ctrl0_clr); + writel(LRADC_CTRL0_ONCHIP_GROUNDREF, ®s->hw_lradc_ctrl0_clr); + + clrsetbits_le32(®s->hw_lradc_ctrl3, + LRADC_CTRL3_CYCLE_TIME_MASK, + LRADC_CTRL3_CYCLE_TIME_6MHZ); + + clrsetbits_le32(®s->hw_lradc_ctrl4, + LRADC_CTRL4_LRADC7SELECT_MASK | + LRADC_CTRL4_LRADC6SELECT_MASK, + LRADC_CTRL4_LRADC7SELECT_CHANNEL7 | + LRADC_CTRL4_LRADC6SELECT_CHANNEL10); +} + +void mxs_lradc_enable_batt_measurement(void) +{ + struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)IMX_LRADC_BASE; + + /* Check if the channel is present at all. */ + if (!(readl(®s->hw_lradc_status) & LRADC_STATUS_CHANNEL7_PRESENT)) + return; + + writel(LRADC_CTRL1_LRADC7_IRQ_EN, ®s->hw_lradc_ctrl1_clr); + writel(LRADC_CTRL1_LRADC7_IRQ, ®s->hw_lradc_ctrl1_clr); + + clrsetbits_le32(®s->hw_lradc_conversion, + LRADC_CONVERSION_SCALE_FACTOR_MASK, + LRADC_CONVERSION_SCALE_FACTOR_LI_ION); + writel(LRADC_CONVERSION_AUTOMATIC, ®s->hw_lradc_conversion_set); + + /* Configure the channel. */ + writel((1 << 7) << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET, + ®s->hw_lradc_ctrl2_clr); + writel(0xffffffff, ®s->hw_lradc_ch7_clr); + clrbits_le32(®s->hw_lradc_ch7, LRADC_CH_NUM_SAMPLES_MASK); + writel(LRADC_CH_ACCUMULATE, ®s->hw_lradc_ch7_clr); + + /* Schedule the channel. */ + writel(1 << 7, ®s->hw_lradc_ctrl0_set); + + /* Start the channel sampling. */ + writel(((1 << 7) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) | + ((1 << 3) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) | + 100, ®s->hw_lradc_delay3); + + writel(0xffffffff, ®s->hw_lradc_ch7_clr); + + writel(LRADC_DELAY_KICK, ®s->hw_lradc_delay3_set); +} diff --git a/arch/arm/mach-mxs/mem-init.c b/arch/arm/mach-mxs/mem-init.c new file mode 100644 index 0000000000..9773f94903 --- /dev/null +++ b/arch/arm/mach-mxs/mem-init.c @@ -0,0 +1,371 @@ +/* + * Freescale i.MX28 RAM init + * + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * Copyright 2013 Stefan Roese <sr@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <config.h> +#include <io.h> +#include <mach/imx-regs.h> +#include <linux/compiler.h> + +#include <mach/init.h> +#include <mach/regs-power-mx28.h> +#if defined CONFIG_ARCH_IMX23 +# include <mach/regs-clkctrl-mx23.h> +#endif +#if defined CONFIG_ARCH_IMX28 +# include <mach/regs-clkctrl-mx28.h> +#endif + +/* 1 second delay should be plenty of time for block reset. */ +#define RESET_MAX_TIMEOUT 1000000 + +#define MXS_BLOCK_SFTRST (1 << 31) +#define MXS_BLOCK_CLKGATE (1 << 30) + +int mxs_early_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned + int timeout) +{ + while (--timeout) { + if ((readl(®->reg) & mask) == mask) + break; + mxs_early_delay(1); + } + + return !timeout; +} + +int mxs_early_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned + int timeout) +{ + while (--timeout) { + if ((readl(®->reg) & mask) == 0) + break; + mxs_early_delay(1); + } + + return !timeout; +} + +int mxs_early_reset_block(struct mxs_register_32 *reg) +{ + /* Clear SFTRST */ + writel(MXS_BLOCK_SFTRST, ®->reg_clr); + + if (mxs_early_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT)) + return 1; + + /* Clear CLKGATE */ + writel(MXS_BLOCK_CLKGATE, ®->reg_clr); + + /* Set SFTRST */ + writel(MXS_BLOCK_SFTRST, ®->reg_set); + + /* Wait for CLKGATE being set */ + if (mxs_early_wait_mask_set(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT)) + return 1; + + /* Clear SFTRST */ + writel(MXS_BLOCK_SFTRST, ®->reg_clr); + + if (mxs_early_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT)) + return 1; + + /* Clear CLKGATE */ + writel(MXS_BLOCK_CLKGATE, ®->reg_clr); + + if (mxs_early_wait_mask_clr(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT)) + return 1; + + return 0; +} + +uint32_t mx28_dram_vals[] = { +/* + * i.MX28 DDR2 at 200MHz + */ + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000100, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00010101, 0x01010101, + 0x000f0f01, 0x0f02020a, 0x00000000, 0x00010101, + 0x00000100, 0x00000100, 0x00000000, 0x00000002, + 0x01010000, 0x07080403, 0x06005003, 0x0a0000c8, + 0x02009c40, 0x0002030c, 0x0036a609, 0x031a0612, + 0x02030202, 0x00c8001c, 0x00000000, 0x00000000, + 0x00012100, 0xffff0303, 0x00012100, 0xffff0303, + 0x00012100, 0xffff0303, 0x00012100, 0xffff0303, + 0x00000003, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000612, 0x01000F02, + 0x06120612, 0x00000200, 0x00020007, 0xf4004a27, + 0xf4004a27, 0xf4004a27, 0xf4004a27, 0x07000300, + 0x07000300, 0x07400300, 0x07400300, 0x00000005, + 0x00000000, 0x00000000, 0x01000000, 0x01020408, + 0x08040201, 0x000f1133, 0x00000000, 0x00001f04, + 0x00001f04, 0x00001f04, 0x00001f04, 0x00001f04, + 0x00001f04, 0x00001f04, 0x00001f04, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00010000, 0x00030404, + 0x00000003, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x01010000, + 0x01000000, 0x03030000, 0x00010303, 0x01020202, + 0x00000000, 0x02040303, 0x21002103, 0x00061200, + 0x06120612, 0x04420442, 0x04420442, 0x00040004, + 0x00040004, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xffffffff +}; + +/* + * i.MX23 DDR at 133MHz + */ +uint32_t mx23_dram_vals[] = { + 0x01010001, 0x00010100, 0x01000101, 0x00000001, + 0x00000101, 0x00000000, 0x00010000, 0x01000001, + 0x00000000, 0x00000001, 0x07000200, 0x00070202, + 0x02020000, 0x04040a01, 0x00000201, 0x02040000, + 0x02000000, 0x19000f08, 0x0d0d0000, 0x02021313, + 0x02061521, 0x0000000a, 0x00080008, 0x00200020, + 0x00200020, 0x00200020, 0x000003f7, 0x00000000, + 0x00000000, 0x00000020, 0x00000020, 0x00c80000, + 0x000a23cd, 0x000000c8, 0x00006665, 0x00000000, + 0x00000101, 0x00040001, 0x00000000, 0x00000000, + 0x00010000 +}; + +static void mx28_initialize_dram_values(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++) + writel(mx28_dram_vals[i], IMX_SDRAMC_BASE + (4 * i)); +} + +static void mx23_initialize_dram_values(void) +{ + int i; + + /* + * HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as + * per FSL bootlets code. + * + * mx23 Reference Manual marks HW_DRAM_CTL27 and HW_DRAM_CTL28 as + * "reserved". + * HW_DRAM_CTL8 is setup as the last element. + * So skip the initialization of these HW_DRAM_CTL registers. + */ + for (i = 0; i < ARRAY_SIZE(mx23_dram_vals); i++) { + if (i == 8 || i == 27 || i == 28 || i == 35) + continue; + writel(mx23_dram_vals[i], IMX_SDRAMC_BASE + (4 * i)); + } + + /* + * Enable tRAS lockout in HW_DRAM_CTL08 ; it must be the last + * element to be set + */ + writel((1 << 24), IMX_SDRAMC_BASE + (4 * 8)); +} + +void mxs_mem_init_clock(unsigned char divider) +{ + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)IMX_CCM_BASE; + + /* Gate EMI clock */ + writeb(CLKCTRL_FRAC_CLKGATE, + &clkctrl_regs->hw_clkctrl_frac0_set[CLKCTRL_FRAC0_EMI]); + + /* Set fractional divider for ref_emi */ + writeb(CLKCTRL_FRAC_CLKGATE | (divider & CLKCTRL_FRAC_FRAC_MASK), + &clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]); + + /* Ungate EMI clock */ + writeb(CLKCTRL_FRAC_CLKGATE, + &clkctrl_regs->hw_clkctrl_frac0_clr[CLKCTRL_FRAC0_EMI]); + + mxs_early_delay(11000); + + /* Set EMI clock divider for EMI clock to 411 / 2 = 205MHz */ + writel((2 << CLKCTRL_EMI_DIV_EMI_OFFSET) | + (1 << CLKCTRL_EMI_DIV_XTAL_OFFSET), + &clkctrl_regs->hw_clkctrl_emi); + + /* Unbypass EMI */ + writel(CLKCTRL_CLKSEQ_BYPASS_EMI, + &clkctrl_regs->hw_clkctrl_clkseq_clr); + + mxs_early_delay(10000); +} + +void mxs_mem_setup_cpu_and_hbus(void) +{ + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)IMX_CCM_BASE; + + /* Set fractional divider for ref_cpu to 480 * 18 / 19 = 454MHz + * and ungate CPU clock */ + writeb(19 & CLKCTRL_FRAC_FRAC_MASK, + (uint8_t *)&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU]); + + /* Set CPU bypass */ + writel(CLKCTRL_CLKSEQ_BYPASS_CPU, + &clkctrl_regs->hw_clkctrl_clkseq_set); + + /* HBUS = 151MHz */ + writel(CLKCTRL_HBUS_DIV_MASK, &clkctrl_regs->hw_clkctrl_hbus_set); + writel(((~3) << CLKCTRL_HBUS_DIV_OFFSET) & CLKCTRL_HBUS_DIV_MASK, + &clkctrl_regs->hw_clkctrl_hbus_clr); + + mxs_early_delay(10000); + + /* CPU clock divider = 1 */ + clrsetbits_le32(&clkctrl_regs->hw_clkctrl_cpu, + CLKCTRL_CPU_DIV_CPU_MASK, 1); + + /* Disable CPU bypass */ + writel(CLKCTRL_CLKSEQ_BYPASS_CPU, + &clkctrl_regs->hw_clkctrl_clkseq_clr); + + mxs_early_delay(15000); +} + +void mxs_mem_setup_vdda(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + writel((0xc << POWER_VDDACTRL_TRG_OFFSET) | + (0x7 << POWER_VDDACTRL_BO_OFFSET_OFFSET) | + POWER_VDDACTRL_LINREG_OFFSET_1STEPS_BELOW, + &power_regs->hw_power_vddactrl); +} + +static void mx23_mem_setup_vddmem(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + /* We must wait before and after disabling the current limiter! */ + mxs_early_delay(10000); + + clrbits_le32(&power_regs->hw_power_vddmemctrl, + POWER_VDDMEMCTRL_ENABLE_ILIMIT); + + mxs_early_delay(10000); +} + +void mx23_mem_init(void) +{ + mxs_early_delay(11000); + + /* Fractional divider for ref_emi is 33 ; 480 * 18 / 33 = 266MHz */ + mxs_mem_init_clock(33); + + mxs_mem_setup_vdda(); + + /* + * Reset/ungate the EMI block. This is essential, otherwise the system + * suffers from memory instability. This thing is mx23 specific and is + * no longer present on mx28. + */ + mxs_early_reset_block((struct mxs_register_32 *)IMX_EMI_BASE); + + mx23_mem_setup_vddmem(); + + /* + * Configure the DRAM registers + */ + + /* Clear START and SREFRESH bit from DRAM_CTL8 */ + clrbits_le32(IMX_SDRAMC_BASE + 0x20, (1 << 16) | (1 << 8)); + + mx23_initialize_dram_values(); + + /* Set START bit in DRAM_CTL8 */ + setbits_le32(IMX_SDRAMC_BASE + 0x20, 1 << 16); + + clrbits_le32(IMX_SDRAMC_BASE + 0x40, 1 << 17); + + /* Wait for EMI_STAT bit DRAM_HALTED */ + for (;;) { + if (!(readl(IMX_EMI_BASE + 0x10) & (1 << 1))) + break; + mxs_early_delay(1000); + } + + /* Adjust EMI port priority. */ + clrsetbits_le32(0x80020000, 0x1f << 16, 0x2); + mxs_early_delay(20000); + + setbits_le32(IMX_SDRAMC_BASE + 0x40, 1 << 19); + setbits_le32(IMX_SDRAMC_BASE + 0x40, 1 << 11); + + mxs_early_delay(10000); + + mxs_mem_setup_cpu_and_hbus(); +} + +#define PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2 (0x3 << 16) + +void mx28_mem_init(void) +{ + mxs_early_delay(11000); + + /* Fractional divider for ref_emi is 21 ; 480 * 18 / 21 = 411MHz */ + mxs_mem_init_clock(21); + + mxs_mem_setup_vdda(); + + /* Set DDR2 mode */ + writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2, + IMX_IOMUXC_BASE + 0x1b80); + + /* + * Configure the DRAM registers + */ + + /* Clear START bit from DRAM_CTL16 */ + clrbits_le32(IMX_SDRAMC_BASE + 0x40, 1); + + mx28_initialize_dram_values(); + + /* Clear SREFRESH bit from DRAM_CTL17 */ + clrbits_le32(IMX_SDRAMC_BASE + 0x44, 1); + + /* Set START bit in DRAM_CTL16 */ + setbits_le32(IMX_SDRAMC_BASE + 0x40, 1); + + /* Wait for bit 20 (DRAM init complete) in DRAM_CTL58 */ + while (!(readl(IMX_SDRAMC_BASE + 0xe8) & (1 << 20))) + ; + + mxs_early_delay(10000); + + mxs_mem_setup_cpu_and_hbus(); +} diff --git a/arch/arm/mach-mxs/mxs23img.cfg b/arch/arm/mach-mxs/mxs23img.cfg new file mode 100644 index 0000000000..34e88483f0 --- /dev/null +++ b/arch/arm/mach-mxs/mxs23img.cfg @@ -0,0 +1,6 @@ +SECTION 0x0 BOOTABLE + TAG LAST + LOAD 0x1000 @PREP@ + CALL 0x1000 0x0 + LOAD 0x40002000 @BOOTLOADER@ + CALL 0x40002000 0x0 diff --git a/arch/arm/mach-mxs/mxs28img.cfg b/arch/arm/mach-mxs/mxs28img.cfg new file mode 100644 index 0000000000..0ff2c35dd5 --- /dev/null +++ b/arch/arm/mach-mxs/mxs28img.cfg @@ -0,0 +1,8 @@ +SECTION 0x0 BOOTABLE + TAG LAST + LOAD 0x1000 @PREP@ + LOAD IVT 0x8000 0x1000 + CALL HAB 0x8000 0x0 + LOAD 0x40002000 @BOOTLOADER@ + LOAD IVT 0x8000 0x40002000 + CALL HAB 0x8000 0x0 diff --git a/arch/arm/mach-mxs/ocotp.c b/arch/arm/mach-mxs/ocotp.c index c7c24e0980..abdd445b5d 100644 --- a/arch/arm/mach-mxs/ocotp.c +++ b/arch/arm/mach-mxs/ocotp.c @@ -27,7 +27,6 @@ #include <mach/generic.h> #include <mach/ocotp.h> -#include <mach/imx-regs.h> #include <mach/power.h> #define DRIVERNAME "ocotp" diff --git a/arch/arm/mach-mxs/power-init.c b/arch/arm/mach-mxs/power-init.c new file mode 100644 index 0000000000..977c6e4e27 --- /dev/null +++ b/arch/arm/mach-mxs/power-init.c @@ -0,0 +1,1272 @@ +/* + * Freescale i.MX28 Boot PMIC init + * + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <config.h> +#include <io.h> +#include <mach/imx-regs.h> + +#include <mach/generic.h> +#include <mach/init.h> +#ifdef CONFIG_ARCH_IMX23 +#include <mach/regs-clkctrl-mx23.h> +#endif +#ifdef CONFIG_ARCH_IMX28 +#include <mach/regs-clkctrl-mx28.h> +#endif +#include <mach/regs-power-mx28.h> +#include <mach/regs-rtc.h> +#include <mach/regs-lradc.h> + +/* + * This delay function is intended to be used only in early stage of boot, where + * clock are not set up yet. The timer used here is reset on every boot and + * takes a few seconds to roll. The boot doesn't take that long, so to keep the + * code simple, it doesn't take rolling into consideration. + */ +void mxs_early_delay(int delay) +{ + void __iomem *digctl_regs = IOMEM(IMX_DIGCTL_BASE); + uint32_t st = readl(digctl_regs + 0xc0); + + st += delay; + + while (st > readl(digctl_regs + 0xc0)); +} + +static inline void charger_4p2_disable(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + if (cpu_is_mx28()) + writel(MX28_POWER_5VCTRL_PWD_CHARGE_4P2_MASK, + &power_regs->hw_power_5vctrl_set); + else + writel(MX23_POWER_5VCTRL_PWD_CHARGE_4P2_MASK, + &power_regs->hw_power_5vctrl_set); +} + +static inline void charger_4p2_enable(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + if (cpu_is_mx28()) + writel(MX28_POWER_5VCTRL_PWD_CHARGE_4P2_MASK, + &power_regs->hw_power_5vctrl_clr); + else + writel(MX23_POWER_5VCTRL_PWD_CHARGE_4P2_MASK, + &power_regs->hw_power_5vctrl_clr); +} + +/** + * mxs_power_clock2xtal() - Switch CPU core clock source to 24MHz XTAL + * + * This function switches the CPU core clock from PLL to 24MHz XTAL + * oscilator. This is necessary if the PLL is being reconfigured to + * prevent crash of the CPU core. + */ +static void mxs_power_clock2xtal(void) +{ + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)IMX_CCM_BASE; + + /* Set XTAL as CPU reference clock */ + writel(CLKCTRL_CLKSEQ_BYPASS_CPU, + &clkctrl_regs->hw_clkctrl_clkseq_set); +} + +/** + * mxs_power_clock2pll() - Switch CPU core clock source to PLL + * + * This function switches the CPU core clock from 24MHz XTAL oscilator + * to PLL. This can only be called once the PLL has re-locked and once + * the PLL is stable after reconfiguration. + */ +static void mxs_power_clock2pll(void) +{ + struct mxs_clkctrl_regs *clkctrl_regs = + (struct mxs_clkctrl_regs *)IMX_CCM_BASE; + + setbits_le32(&clkctrl_regs->hw_clkctrl_pll0ctrl0, + CLKCTRL_PLL0CTRL0_POWER); + mxs_early_delay(100); + setbits_le32(&clkctrl_regs->hw_clkctrl_clkseq, + CLKCTRL_CLKSEQ_BYPASS_CPU); +} + +/** + * mxs_power_set_auto_restart() - Set the auto-restart bit + * + * This function ungates the RTC block and sets the AUTO_RESTART + * bit to work around a design bug on MX28EVK Rev. A . + */ + +static void mxs_power_set_auto_restart(void) +{ + struct mxs_rtc_regs *rtc_regs = + (struct mxs_rtc_regs *)IMX_WDT_BASE; + + writel(RTC_CTRL_SFTRST, &rtc_regs->hw_rtc_ctrl_clr); + while (readl(&rtc_regs->hw_rtc_ctrl) & RTC_CTRL_SFTRST) + ; + + writel(RTC_CTRL_CLKGATE, &rtc_regs->hw_rtc_ctrl_clr); + while (readl(&rtc_regs->hw_rtc_ctrl) & RTC_CTRL_CLKGATE) + ; + + /* Do nothing if flag already set */ + if (readl(&rtc_regs->hw_rtc_persistent0) & RTC_PERSISTENT0_AUTO_RESTART) + return; + + while (readl(&rtc_regs->hw_rtc_stat) & RTC_STAT_NEW_REGS_MASK) + ; + + setbits_le32(&rtc_regs->hw_rtc_persistent0, + RTC_PERSISTENT0_AUTO_RESTART); + writel(RTC_CTRL_FORCE_UPDATE, &rtc_regs->hw_rtc_ctrl_set); + writel(RTC_CTRL_FORCE_UPDATE, &rtc_regs->hw_rtc_ctrl_clr); + while (readl(&rtc_regs->hw_rtc_stat) & RTC_STAT_NEW_REGS_MASK) + ; + while (readl(&rtc_regs->hw_rtc_stat) & RTC_STAT_STALE_REGS_MASK) + ; +} + +/** + * mxs_power_set_linreg() - Set linear regulators 25mV below DC-DC converter + * + * This function configures the VDDIO, VDDA and VDDD linear regulators output + * to be 25mV below the VDDIO, VDDA and VDDD output from the DC-DC switching + * converter. This is the recommended setting for the case where we use both + * linear regulators and DC-DC converter to power the VDDIO rail. + */ +static void mxs_power_set_linreg(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + /* Set linear regulator 25mV below switching converter */ + clrsetbits_le32(&power_regs->hw_power_vdddctrl, + POWER_VDDDCTRL_LINREG_OFFSET_MASK, + POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW); + + clrsetbits_le32(&power_regs->hw_power_vddactrl, + POWER_VDDACTRL_LINREG_OFFSET_MASK, + POWER_VDDACTRL_LINREG_OFFSET_1STEPS_BELOW); + + clrsetbits_le32(&power_regs->hw_power_vddioctrl, + POWER_VDDIOCTRL_LINREG_OFFSET_MASK, + POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW); +} + +/** + * mxs_get_batt_volt() - Measure battery input voltage + * + * This function retrieves the battery input voltage and returns it. + */ +static int mxs_get_batt_volt(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + uint32_t volt = readl(&power_regs->hw_power_battmonitor); + + volt &= POWER_BATTMONITOR_BATT_VAL_MASK; + volt >>= POWER_BATTMONITOR_BATT_VAL_OFFSET; + volt *= 8; + + return volt; +} + +/** + * mxs_is_batt_ready() - Test if the battery provides enough voltage to boot + * + * This function checks if the battery input voltage is higher than 3.6V and + * therefore allows the system to successfully boot using this power source. + */ +static int mxs_is_batt_ready(void) +{ + return (mxs_get_batt_volt() >= 3600); +} + +/** + * mxs_is_batt_good() - Test if battery is operational at all + * + * This function starts recharging the battery and tests if the input current + * provided by the 5V input recharging the battery is also sufficient to power + * the DC-DC converter. + */ +static int mxs_is_batt_good(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + uint32_t volt = mxs_get_batt_volt(); + + if ((volt >= 2400) && (volt <= 4300)) + return 1; + + clrsetbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK, + 0x3 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET); + charger_4p2_enable(); + + clrsetbits_le32(&power_regs->hw_power_charge, + POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK, + POWER_CHARGE_STOP_ILIMIT_10MA | 0x3); + + writel(POWER_CHARGE_PWD_BATTCHRG, &power_regs->hw_power_charge_clr); + charger_4p2_enable(); + + mxs_early_delay(500000); + + volt = mxs_get_batt_volt(); + + if (volt >= 3500) + return 0; + + if (volt >= 2400) + return 1; + + writel(POWER_CHARGE_STOP_ILIMIT_MASK | POWER_CHARGE_BATTCHRG_I_MASK, + &power_regs->hw_power_charge_clr); + writel(POWER_CHARGE_PWD_BATTCHRG, &power_regs->hw_power_charge_set); + + return 0; +} + +/** + * mxs_power_setup_5v_detect() - Start the 5V input detection comparator + * + * This function enables the 5V detection comparator and sets the 5V valid + * threshold to 4.4V . We use 4.4V threshold here to make sure that even + * under high load, the voltage drop on the 5V input won't be so critical + * to cause undervolt on the 4P2 linear regulator supplying the DC-DC + * converter and thus making the system crash. + */ +static void mxs_power_setup_5v_detect(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + /* Start 5V detection */ + clrsetbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_VBUSVALID_TRSH_MASK, + POWER_5VCTRL_VBUSVALID_TRSH_4V4 | + POWER_5VCTRL_PWRUP_VBUS_CMPS); +} + +/** + * mxs_src_power_init() - Preconfigure the power block + * + * This function configures reasonable values for the DC-DC control loop + * and battery monitor. + */ +static void mxs_src_power_init(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + /* Improve efficieny and reduce transient ripple */ + writel(POWER_LOOPCTRL_TOGGLE_DIF | POWER_LOOPCTRL_EN_CM_HYST | + POWER_LOOPCTRL_EN_DF_HYST, &power_regs->hw_power_loopctrl_set); + + clrsetbits_le32(&power_regs->hw_power_dclimits, + POWER_DCLIMITS_POSLIMIT_BUCK_MASK, + 0x30 << POWER_DCLIMITS_POSLIMIT_BUCK_OFFSET); + + setbits_le32(&power_regs->hw_power_battmonitor, + POWER_BATTMONITOR_EN_BATADJ); + + /* Increase the RCSCALE level for quick DCDC response to dynamic load */ + clrsetbits_le32(&power_regs->hw_power_loopctrl, + POWER_LOOPCTRL_EN_RCSCALE_MASK, + POWER_LOOPCTRL_RCSCALE_THRESH | + POWER_LOOPCTRL_EN_RCSCALE_8X); + + clrsetbits_le32(&power_regs->hw_power_minpwr, + POWER_MINPWR_HALFFETS, POWER_MINPWR_DOUBLE_FETS); + + /* 5V to battery handoff ... FIXME */ + setbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER); + mxs_early_delay(30); + clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER); +} + +/** + * mxs_power_init_4p2_params() - Configure the parameters of the 4P2 regulator + * + * This function configures the necessary parameters for the 4P2 linear + * regulator to supply the DC-DC converter from 5V input. + */ +static void mxs_power_init_4p2_params(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + /* Setup 4P2 parameters */ + clrsetbits_le32(&power_regs->hw_power_dcdc4p2, + POWER_DCDC4P2_CMPTRIP_MASK | POWER_DCDC4P2_TRG_MASK, + POWER_DCDC4P2_TRG_4V2 | (31 << POWER_DCDC4P2_CMPTRIP_OFFSET)); + + clrsetbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_HEADROOM_ADJ_MASK, + 0x4 << POWER_5VCTRL_HEADROOM_ADJ_OFFSET); + + clrsetbits_le32(&power_regs->hw_power_dcdc4p2, + POWER_DCDC4P2_DROPOUT_CTRL_MASK, + POWER_DCDC4P2_DROPOUT_CTRL_100MV | + POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL); + + clrsetbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK, + 0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET); +} + +/** + * mxs_enable_4p2_dcdc_input() - Enable or disable the DCDC input from 4P2 + * @xfer: Select if the input shall be enabled or disabled + * + * This function enables or disables the 4P2 input into the DC-DC converter. + */ +static void mxs_enable_4p2_dcdc_input(int xfer) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + uint32_t tmp, vbus_thresh, vbus_5vdetect, pwd_bo; + uint32_t prev_5v_brnout, prev_5v_droop; + + prev_5v_brnout = readl(&power_regs->hw_power_5vctrl) & + POWER_5VCTRL_PWDN_5VBRNOUT; + prev_5v_droop = readl(&power_regs->hw_power_ctrl) & + POWER_CTRL_ENIRQ_VDD5V_DROOP; + + clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_PWDN_5VBRNOUT); + writel(POWER_RESET_UNLOCK_KEY | POWER_RESET_PWD_OFF, + &power_regs->hw_power_reset); + + clrbits_le32(&power_regs->hw_power_ctrl, POWER_CTRL_ENIRQ_VDD5V_DROOP); + + if (xfer && (readl(&power_regs->hw_power_5vctrl) & + POWER_5VCTRL_ENABLE_DCDC)) { + return; + } + + /* + * Recording orignal values that will be modified temporarlily + * to handle a chip bug. See chip errata for CQ ENGR00115837 + */ + tmp = readl(&power_regs->hw_power_5vctrl); + vbus_thresh = tmp & POWER_5VCTRL_VBUSVALID_TRSH_MASK; + vbus_5vdetect = tmp & POWER_5VCTRL_VBUSVALID_5VDETECT; + + pwd_bo = readl(&power_regs->hw_power_minpwr) & POWER_MINPWR_PWD_BO; + + /* + * Disable mechanisms that get erroneously tripped by when setting + * the DCDC4P2 EN_DCDC + */ + clrbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_VBUSVALID_5VDETECT | + POWER_5VCTRL_VBUSVALID_TRSH_MASK); + + writel(POWER_MINPWR_PWD_BO, &power_regs->hw_power_minpwr_set); + + if (xfer) { + setbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_DCDC_XFER); + mxs_early_delay(20); + clrbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_DCDC_XFER); + + setbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_ENABLE_DCDC); + } else { + setbits_le32(&power_regs->hw_power_dcdc4p2, + POWER_DCDC4P2_ENABLE_DCDC); + } + + mxs_early_delay(25); + + clrsetbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_VBUSVALID_TRSH_MASK, vbus_thresh); + + if (vbus_5vdetect) + writel(vbus_5vdetect, &power_regs->hw_power_5vctrl_set); + + if (!pwd_bo) + clrbits_le32(&power_regs->hw_power_minpwr, POWER_MINPWR_PWD_BO); + + while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) + writel(POWER_CTRL_VBUS_VALID_IRQ, + &power_regs->hw_power_ctrl_clr); + + if (prev_5v_brnout) { + writel(POWER_5VCTRL_PWDN_5VBRNOUT, + &power_regs->hw_power_5vctrl_set); + writel(POWER_RESET_UNLOCK_KEY, + &power_regs->hw_power_reset); + } else { + writel(POWER_5VCTRL_PWDN_5VBRNOUT, + &power_regs->hw_power_5vctrl_clr); + writel(POWER_RESET_UNLOCK_KEY | POWER_RESET_PWD_OFF, + &power_regs->hw_power_reset); + } + + while (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VDD5V_DROOP_IRQ) + writel(POWER_CTRL_VDD5V_DROOP_IRQ, + &power_regs->hw_power_ctrl_clr); + + if (prev_5v_droop) + clrbits_le32(&power_regs->hw_power_ctrl, + POWER_CTRL_ENIRQ_VDD5V_DROOP); + else + setbits_le32(&power_regs->hw_power_ctrl, + POWER_CTRL_ENIRQ_VDD5V_DROOP); +} + +/** + * mxs_power_init_4p2_regulator() - Start the 4P2 regulator + * + * This function enables the 4P2 regulator and switches the DC-DC converter + * to use the 4P2 input. + */ +static void mxs_power_init_4p2_regulator(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + uint32_t tmp, tmp2; + + setbits_le32(&power_regs->hw_power_dcdc4p2, POWER_DCDC4P2_ENABLE_4P2); + + writel(POWER_CHARGE_ENABLE_LOAD, &power_regs->hw_power_charge_set); + + writel(POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK, + &power_regs->hw_power_5vctrl_clr); + clrbits_le32(&power_regs->hw_power_dcdc4p2, POWER_DCDC4P2_TRG_MASK); + + /* Power up the 4p2 rail and logic/control */ + charger_4p2_enable(); + + /* + * Start charging up the 4p2 capacitor. We ramp of this charge + * gradually to avoid large inrush current from the 5V cable which can + * cause transients/problems + */ + mxs_enable_4p2_dcdc_input(0); + + if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) { + /* + * If we arrived here, we were unable to recover from mx23 chip + * errata 5837. 4P2 is disabled and sufficient battery power is + * not present. Exiting to not enable DCDC power during 5V + * connected state. + */ + clrbits_le32(&power_regs->hw_power_dcdc4p2, + POWER_DCDC4P2_ENABLE_DCDC); + charger_4p2_disable(); + hang(); + } + + /* + * Here we set the 4p2 brownout level to something very close to 4.2V. + * We then check the brownout status. If the brownout status is false, + * the voltage is already close to the target voltage of 4.2V so we + * can go ahead and set the 4P2 current limit to our max target limit. + * If the brownout status is true, we need to ramp us the current limit + * so that we don't cause large inrush current issues. We step up the + * current limit until the brownout status is false or until we've + * reached our maximum defined 4p2 current limit. + */ + clrsetbits_le32(&power_regs->hw_power_dcdc4p2, + POWER_DCDC4P2_BO_MASK, + 22 << POWER_DCDC4P2_BO_OFFSET); /* 4.15V */ + + if (!(readl(&power_regs->hw_power_sts) & POWER_STS_DCDC_4P2_BO)) { + setbits_le32(&power_regs->hw_power_5vctrl, + 0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET); + } else { + tmp = (readl(&power_regs->hw_power_5vctrl) & + POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK) >> + POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET; + while (tmp < 0x3f) { + if (!(readl(&power_regs->hw_power_sts) & + POWER_STS_DCDC_4P2_BO)) { + tmp = readl(&power_regs->hw_power_5vctrl); + tmp |= POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK; + mxs_early_delay(100); + writel(tmp, &power_regs->hw_power_5vctrl); + break; + } else { + tmp++; + tmp2 = readl(&power_regs->hw_power_5vctrl); + tmp2 &= ~POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK; + tmp2 |= tmp << + POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET; + writel(tmp2, &power_regs->hw_power_5vctrl); + mxs_early_delay(100); + } + } + } + + clrbits_le32(&power_regs->hw_power_dcdc4p2, POWER_DCDC4P2_BO_MASK); + writel(POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr); +} + +/** + * mxs_power_init_dcdc_4p2_source() - Switch DC-DC converter to 4P2 source + * + * This function configures the DC-DC converter to be supplied from the 4P2 + * linear regulator. + */ +static void mxs_power_init_dcdc_4p2_source(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + if (!(readl(&power_regs->hw_power_dcdc4p2) & + POWER_DCDC4P2_ENABLE_DCDC)) { + hang(); + } + + mxs_enable_4p2_dcdc_input(1); + + if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) { + clrbits_le32(&power_regs->hw_power_dcdc4p2, + POWER_DCDC4P2_ENABLE_DCDC); + writel(POWER_5VCTRL_ENABLE_DCDC, + &power_regs->hw_power_5vctrl_clr); + charger_4p2_disable(); + } +} + +/** + * mxs_power_enable_4p2() - Power up the 4P2 regulator + * + * This function drives the process of powering up the 4P2 linear regulator + * and switching the DC-DC converter input over to the 4P2 linear regulator. + */ +static void mxs_power_enable_4p2(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + uint32_t vdddctrl, vddactrl, vddioctrl; + uint32_t tmp; + + vdddctrl = readl(&power_regs->hw_power_vdddctrl); + vddactrl = readl(&power_regs->hw_power_vddactrl); + vddioctrl = readl(&power_regs->hw_power_vddioctrl); + + setbits_le32(&power_regs->hw_power_vdddctrl, + POWER_VDDDCTRL_DISABLE_FET | POWER_VDDDCTRL_ENABLE_LINREG | + POWER_VDDDCTRL_PWDN_BRNOUT); + + setbits_le32(&power_regs->hw_power_vddactrl, + POWER_VDDACTRL_DISABLE_FET | POWER_VDDACTRL_ENABLE_LINREG | + POWER_VDDACTRL_PWDN_BRNOUT); + + setbits_le32(&power_regs->hw_power_vddioctrl, + POWER_VDDIOCTRL_DISABLE_FET | POWER_VDDIOCTRL_PWDN_BRNOUT); + + mxs_power_init_4p2_params(); + mxs_power_init_4p2_regulator(); + + /* Shutdown battery (none present) */ + if (!mxs_is_batt_ready()) { + clrbits_le32(&power_regs->hw_power_dcdc4p2, + POWER_DCDC4P2_BO_MASK); + writel(POWER_CTRL_DCDC4P2_BO_IRQ, + &power_regs->hw_power_ctrl_clr); + writel(POWER_CTRL_ENIRQ_DCDC4P2_BO, + &power_regs->hw_power_ctrl_clr); + } + + mxs_power_init_dcdc_4p2_source(); + + writel(vdddctrl, &power_regs->hw_power_vdddctrl); + mxs_early_delay(20); + writel(vddactrl, &power_regs->hw_power_vddactrl); + mxs_early_delay(20); + writel(vddioctrl, &power_regs->hw_power_vddioctrl); + + /* + * Check if FET is enabled on either powerout and if so, + * disable load. + */ + tmp = 0; + tmp |= !(readl(&power_regs->hw_power_vdddctrl) & + POWER_VDDDCTRL_DISABLE_FET); + tmp |= !(readl(&power_regs->hw_power_vddactrl) & + POWER_VDDACTRL_DISABLE_FET); + tmp |= !(readl(&power_regs->hw_power_vddioctrl) & + POWER_VDDIOCTRL_DISABLE_FET); + if (tmp) + writel(POWER_CHARGE_ENABLE_LOAD, + &power_regs->hw_power_charge_clr); +} + +/** + * mxs_boot_valid_5v() - Boot from 5V supply + * + * This function configures the power block to boot from valid 5V input. + * This is called only if the 5V is reliable and can properly supply the + * CPU. This function proceeds to configure the 4P2 converter to be supplied + * from the 5V input. + */ +static void mxs_boot_valid_5v(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + /* + * Use VBUSVALID level instead of VDD5V_GT_VDDIO level to trigger a 5V + * disconnect event. FIXME + */ + writel(POWER_5VCTRL_VBUSVALID_5VDETECT, + &power_regs->hw_power_5vctrl_set); + + /* Configure polarity to check for 5V disconnection. */ + writel(POWER_CTRL_POLARITY_VBUSVALID | + POWER_CTRL_POLARITY_VDD5V_GT_VDDIO, + &power_regs->hw_power_ctrl_clr); + + writel(POWER_CTRL_VBUS_VALID_IRQ | POWER_CTRL_VDD5V_GT_VDDIO_IRQ, + &power_regs->hw_power_ctrl_clr); + + mxs_power_enable_4p2(); +} + +/** + * mxs_powerdown() - Shut down the system + * + * This function powers down the CPU completely. + */ +static void mxs_powerdown(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + writel(POWER_RESET_UNLOCK_KEY, &power_regs->hw_power_reset); + writel(POWER_RESET_UNLOCK_KEY | POWER_RESET_PWD_OFF, + &power_regs->hw_power_reset); +} + +/** + * mxs_enable_battery_input() - Configure the power block to boot from battery input + * + * This function configures the power block to boot from the battery voltage + * supply. + */ +static void mxs_enable_battery_input(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_PWDN_5VBRNOUT); + clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_ENABLE_DCDC); + + clrbits_le32(&power_regs->hw_power_dcdc4p2, + POWER_DCDC4P2_ENABLE_DCDC | POWER_DCDC4P2_ENABLE_4P2); + writel(POWER_CHARGE_ENABLE_LOAD, &power_regs->hw_power_charge_clr); + + /* 5V to battery handoff. */ + setbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER); + mxs_early_delay(30); + clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER); + + writel(POWER_CTRL_ENIRQ_DCDC4P2_BO, &power_regs->hw_power_ctrl_clr); + + clrsetbits_le32(&power_regs->hw_power_minpwr, + POWER_MINPWR_HALFFETS, POWER_MINPWR_DOUBLE_FETS); + + mxs_power_set_linreg(); + + clrbits_le32(&power_regs->hw_power_vdddctrl, + POWER_VDDDCTRL_DISABLE_FET | POWER_VDDDCTRL_ENABLE_LINREG); + + clrbits_le32(&power_regs->hw_power_vddactrl, + POWER_VDDACTRL_DISABLE_FET | POWER_VDDACTRL_ENABLE_LINREG); + + clrbits_le32(&power_regs->hw_power_vddioctrl, + POWER_VDDIOCTRL_DISABLE_FET); + + charger_4p2_disable(); + + setbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_ENABLE_DCDC); + + clrsetbits_le32(&power_regs->hw_power_5vctrl, + POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK, + 0x8 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET); + + mxs_power_enable_4p2(); +} + +/** + * mxs_handle_5v_conflict() - Test if the 5V input is reliable + * + * This function tests if the 5V input can reliably supply the system. If it + * can, then proceed to configuring the system to boot from 5V source, otherwise + * try booting from battery supply. If we can not boot from battery supply + * either, shut down the system. + */ +static void mxs_handle_5v_conflict(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + uint32_t tmp; + + setbits_le32(&power_regs->hw_power_vddioctrl, + POWER_VDDIOCTRL_BO_OFFSET_MASK); + + for (;;) { + tmp = readl(&power_regs->hw_power_sts); + + if (tmp & POWER_STS_VDDIO_BO) { + /* + * VDDIO has a brownout, then the VDD5V_GT_VDDIO becomes + * unreliable + */ + mxs_powerdown(); + break; + } + + if (tmp & POWER_STS_VDD5V_GT_VDDIO) { + mxs_boot_valid_5v(); + break; + } else { + mxs_powerdown(); + break; + } + + if (tmp & POWER_STS_PSWITCH_MASK) { + mxs_enable_battery_input(); + break; + } + } +} + +/** + * mxs_5v_boot() - Configure the power block to boot from 5V input + * + * This function handles configuration of the power block when supplied by + * a 5V input. + */ +static void mxs_5v_boot(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + /* + * NOTE: In original IMX-Bootlets, this also checks for VBUSVALID, + * but their implementation always returns 1 so we omit it here. + */ + if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { + mxs_boot_valid_5v(); + return; + } + + mxs_early_delay(1000); + if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { + mxs_boot_valid_5v(); + return; + } + + mxs_handle_5v_conflict(); +} + +/** + * mxs_init_batt_bo() - Configure battery brownout threshold + * + * This function configures the battery input brownout threshold. The value + * at which the battery brownout happens is configured to 3.0V in the code. + */ +static void mxs_init_batt_bo(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + /* Brownout at 3V */ + clrsetbits_le32(&power_regs->hw_power_battmonitor, + POWER_BATTMONITOR_BRWNOUT_LVL_MASK, + 15 << POWER_BATTMONITOR_BRWNOUT_LVL_OFFSET); + + writel(POWER_CTRL_BATT_BO_IRQ, &power_regs->hw_power_ctrl_clr); + writel(POWER_CTRL_ENIRQ_BATT_BO, &power_regs->hw_power_ctrl_clr); +} + +/** + * mxs_switch_vddd_to_dcdc_source() - Switch VDDD rail to DC-DC converter + * + * This function turns off the VDDD linear regulator and therefore makes + * the VDDD rail be supplied only by the DC-DC converter. + */ +static void mxs_switch_vddd_to_dcdc_source(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + clrsetbits_le32(&power_regs->hw_power_vdddctrl, + POWER_VDDDCTRL_LINREG_OFFSET_MASK, + POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW); + + clrbits_le32(&power_regs->hw_power_vdddctrl, + POWER_VDDDCTRL_DISABLE_FET | POWER_VDDDCTRL_ENABLE_LINREG | + POWER_VDDDCTRL_DISABLE_STEPPING); +} + +/** + * mxs_power_configure_power_source() - Configure power block source + * + * This function is the core of the power configuration logic. The function + * selects the power block input source and configures the whole power block + * accordingly. After the configuration is complete and the system is stable + * again, the function switches the CPU clock source back to PLL. Finally, + * the function switches the voltage rails to DC-DC converter. + */ +static void mxs_power_configure_power_source(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + struct mxs_lradc_regs *lradc_regs = + (struct mxs_lradc_regs *)IMX_LRADC_BASE; + + if (!(readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO)) { + /* 5V not detected, booting from battery. */ + mxs_enable_battery_input(); + return; + } + + if (mxs_is_batt_ready()) { + /* 5V source detected, good battery detected. */ + mxs_enable_battery_input(); + return; + } + + if (!mxs_is_batt_good()) { + /* 5V source detected, bad battery detected. */ + writel(LRADC_CONVERSION_AUTOMATIC, + &lradc_regs->hw_lradc_conversion_clr); + clrbits_le32(&power_regs->hw_power_battmonitor, + POWER_BATTMONITOR_BATT_VAL_MASK); + } + mxs_5v_boot(); +} + +/** + * mxs_enable_output_rail_protection() - Enable power rail protection + * + * This function enables overload protection on the power rails. This is + * triggered if the power rails' voltage drops rapidly due to overload and + * in such case, the supply to the powerrail is cut-off, protecting the + * CPU from damage. Note that under such condition, the system will likely + * crash or misbehave. + */ +static void mxs_enable_output_rail_protection(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ | + POWER_CTRL_VDDIO_BO_IRQ, &power_regs->hw_power_ctrl_clr); + + setbits_le32(&power_regs->hw_power_vdddctrl, + POWER_VDDDCTRL_PWDN_BRNOUT); + + setbits_le32(&power_regs->hw_power_vddactrl, + POWER_VDDACTRL_PWDN_BRNOUT); + + setbits_le32(&power_regs->hw_power_vddioctrl, + POWER_VDDIOCTRL_PWDN_BRNOUT); +} + +/** + * mxs_get_vddio_power_source_off() - Get VDDIO rail power source + * + * This function tests if the VDDIO rail is supplied by linear regulator + * or by the DC-DC converter. Returns 1 if powered by linear regulator, + * returns 0 if powered by the DC-DC converter. + */ +static int mxs_get_vddio_power_source_off(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + uint32_t tmp; + + if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { + tmp = readl(&power_regs->hw_power_vddioctrl); + if (tmp & POWER_VDDIOCTRL_DISABLE_FET) { + if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) == + POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) { + return 1; + } + } + + if (!(readl(&power_regs->hw_power_5vctrl) & + POWER_5VCTRL_ENABLE_DCDC)) { + if ((tmp & POWER_VDDIOCTRL_LINREG_OFFSET_MASK) == + POWER_VDDIOCTRL_LINREG_OFFSET_0STEPS) { + return 1; + } + } + } + + return 0; + +} + +/** + * mxs_get_vddd_power_source_off() - Get VDDD rail power source + * + * This function tests if the VDDD rail is supplied by linear regulator + * or by the DC-DC converter. Returns 1 if powered by linear regulator, + * returns 0 if powered by the DC-DC converter. + */ +static int mxs_get_vddd_power_source_off(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + uint32_t tmp; + + tmp = readl(&power_regs->hw_power_vdddctrl); + if (tmp & POWER_VDDDCTRL_DISABLE_FET) { + if ((tmp & POWER_VDDDCTRL_LINREG_OFFSET_MASK) == + POWER_VDDDCTRL_LINREG_OFFSET_0STEPS) { + return 1; + } + } + + if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) { + if (!(readl(&power_regs->hw_power_5vctrl) & + POWER_5VCTRL_ENABLE_DCDC)) { + return 1; + } + } + + if (!(tmp & POWER_VDDDCTRL_ENABLE_LINREG)) { + if ((tmp & POWER_VDDDCTRL_LINREG_OFFSET_MASK) == + POWER_VDDDCTRL_LINREG_OFFSET_1STEPS_BELOW) { + return 1; + } + } + + return 0; +} + +struct mxs_vddx_cfg { + uint32_t *reg; + uint8_t step_mV; + uint16_t lowest_mV; + int (*powered_by_linreg)(void); + uint32_t trg_mask; + uint32_t bo_irq; + uint32_t bo_enirq; + uint32_t bo_offset_mask; + uint32_t bo_offset_offset; +}; + +static const struct mxs_vddx_cfg mx23_vddio_cfg = { + .reg = &(((struct mxs_power_regs *)IMX_POWER_BASE)-> + hw_power_vddioctrl), + .step_mV = 25, + .lowest_mV = 2800, + .powered_by_linreg = mxs_get_vddio_power_source_off, + .trg_mask = POWER_VDDIOCTRL_TRG_MASK, + .bo_irq = POWER_CTRL_VDDIO_BO_IRQ, + .bo_enirq = POWER_CTRL_ENIRQ_VDDIO_BO, + .bo_offset_mask = POWER_VDDIOCTRL_BO_OFFSET_MASK, + .bo_offset_offset = POWER_VDDIOCTRL_BO_OFFSET_OFFSET, +}; + +static const struct mxs_vddx_cfg mx28_vddio_cfg = { + .reg = &(((struct mxs_power_regs *)IMX_POWER_BASE)-> + hw_power_vddioctrl), + .step_mV = 50, + .lowest_mV = 2800, + .powered_by_linreg = mxs_get_vddio_power_source_off, + .trg_mask = POWER_VDDIOCTRL_TRG_MASK, + .bo_irq = POWER_CTRL_VDDIO_BO_IRQ, + .bo_enirq = POWER_CTRL_ENIRQ_VDDIO_BO, + .bo_offset_mask = POWER_VDDIOCTRL_BO_OFFSET_MASK, + .bo_offset_offset = POWER_VDDIOCTRL_BO_OFFSET_OFFSET, +}; + +static const struct mxs_vddx_cfg mxs_vddd_cfg = { + .reg = &(((struct mxs_power_regs *)IMX_POWER_BASE)-> + hw_power_vdddctrl), + .step_mV = 25, + .lowest_mV = 800, + .powered_by_linreg = mxs_get_vddd_power_source_off, + .trg_mask = POWER_VDDDCTRL_TRG_MASK, + .bo_irq = POWER_CTRL_VDDD_BO_IRQ, + .bo_enirq = POWER_CTRL_ENIRQ_VDDD_BO, + .bo_offset_mask = POWER_VDDDCTRL_BO_OFFSET_MASK, + .bo_offset_offset = POWER_VDDDCTRL_BO_OFFSET_OFFSET, +}; + +static const struct mxs_vddx_cfg mxs_vddmem_cfg = { + .reg = &(((struct mxs_power_regs *)IMX_POWER_BASE)-> + hw_power_vddmemctrl), + .step_mV = 50, + .lowest_mV = 1700, + .powered_by_linreg = NULL, + .trg_mask = POWER_VDDMEMCTRL_TRG_MASK, + .bo_irq = 0, + .bo_enirq = 0, + .bo_offset_mask = 0, + .bo_offset_offset = 0, +}; + +/** + * mxs_power_set_vddx() - Configure voltage on DC-DC converter rail + * @cfg: Configuration data of the DC-DC converter rail + * @new_target: New target voltage of the DC-DC converter rail + * @new_brownout: New brownout trigger voltage + * + * This function configures the output voltage on the DC-DC converter rail. + * The rail is selected by the @cfg argument. The new voltage target is + * selected by the @new_target and the voltage is specified in mV. The + * new brownout value is selected by the @new_brownout argument and the + * value is also in mV. + */ +static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg, + uint32_t new_target, uint32_t new_brownout) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + uint32_t cur_target, diff, bo_int = 0; + uint32_t powered_by_linreg = 0; + int adjust_up, tmp; + + new_brownout = DIV_ROUND_CLOSEST(new_target - new_brownout, cfg->step_mV); + + cur_target = readl(cfg->reg); + cur_target &= cfg->trg_mask; + cur_target *= cfg->step_mV; + cur_target += cfg->lowest_mV; + + adjust_up = new_target > cur_target; + if (cfg->powered_by_linreg) + powered_by_linreg = cfg->powered_by_linreg(); + + if (adjust_up && cfg->bo_irq) { + if (powered_by_linreg) { + bo_int = readl(cfg->reg); + clrbits_le32(cfg->reg, cfg->bo_enirq); + } + setbits_le32(cfg->reg, cfg->bo_offset_mask); + } + + do { + if (abs(new_target - cur_target) > 100) { + if (adjust_up) + diff = cur_target + 100; + else + diff = cur_target - 100; + } else { + diff = new_target; + } + + diff -= cfg->lowest_mV; + diff /= cfg->step_mV; + + clrsetbits_le32(cfg->reg, cfg->trg_mask, diff); + + if (powered_by_linreg || + (readl(&power_regs->hw_power_sts) & + POWER_STS_VDD5V_GT_VDDIO)) + mxs_early_delay(500); + else { + for (;;) { + tmp = readl(&power_regs->hw_power_sts); + if (tmp & POWER_STS_DC_OK) + break; + } + } + + cur_target = readl(cfg->reg); + cur_target &= cfg->trg_mask; + cur_target *= cfg->step_mV; + cur_target += cfg->lowest_mV; + } while (new_target > cur_target); + + if (cfg->bo_irq) { + if (adjust_up && powered_by_linreg) { + writel(cfg->bo_irq, &power_regs->hw_power_ctrl_clr); + if (bo_int & cfg->bo_enirq) + setbits_le32(cfg->reg, cfg->bo_enirq); + } + + clrsetbits_le32(cfg->reg, cfg->bo_offset_mask, + new_brownout << cfg->bo_offset_offset); + } +} + +/** + * mxs_setup_batt_detect() - Start the battery voltage measurement logic + * + * This function starts and configures the LRADC block. This allows the + * power initialization code to measure battery voltage and based on this + * knowledge, decide whether to boot at all, boot from battery or boot + * from 5V input. + */ +static void mxs_setup_batt_detect(void) +{ + mxs_lradc_init(); + mxs_lradc_enable_batt_measurement(); + mxs_early_delay(10); +} + +/** + * mx23_ungate_power() - Ungate the POWER block + * + * This function ungates clock to the power block. In case the power block + * was still gated at this point, it will not be possible to configure the + * block and therefore the power initialization would fail. This function + * is only needed on i.MX233, on i.MX28 the power block is always ungated. + */ +static void mx23_ungate_power(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + writel(MX23_POWER_CTRL_CLKGATE, &power_regs->hw_power_ctrl_clr); +} + +/** + * mx23_power_init() - The power block init main function + * + * This function calls all the power block initialization functions in + * proper sequence to start the power block. + */ +static void __mx23_power_init(int has_battery) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + mx23_ungate_power(); + + mxs_power_clock2xtal(); + mxs_power_set_auto_restart(); + mxs_power_set_linreg(); + mxs_power_setup_5v_detect(); + + mxs_setup_batt_detect(); + + mxs_src_power_init(); + + if (has_battery) + mxs_power_configure_power_source(); + else + mxs_enable_battery_input(); + + mxs_power_clock2pll(); + + mxs_init_batt_bo(); + + mxs_switch_vddd_to_dcdc_source(); + + /* Fire up the VDDMEM LinReg now that we're all set. */ + writel(POWER_VDDMEMCTRL_ENABLE_LINREG | POWER_VDDMEMCTRL_ENABLE_ILIMIT, + &power_regs->hw_power_vddmemctrl); + + mxs_enable_output_rail_protection(); + + mxs_power_set_vddx(&mx23_vddio_cfg, 3300, 3150); + mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1000); + mxs_power_set_vddx(&mxs_vddmem_cfg, 2500, 1700); + + writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ | + POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ | + POWER_CTRL_VBUS_VALID_IRQ | POWER_CTRL_BATT_BO_IRQ | + POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr); + + writel(POWER_5VCTRL_PWDN_5VBRNOUT, &power_regs->hw_power_5vctrl_set); + + mxs_early_delay(1000); +} + +void mx23_power_init(void) +{ + __mx23_power_init(1); +} + +void mx23_power_init_battery_input(void) +{ + __mx23_power_init(0); +} + +/** + * mx28_power_init() - The power block init main function + * + * This function calls all the power block initialization functions in + * proper sequence to start the power block. + */ +static void __mx28_power_init(int has_battery) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + mxs_power_clock2xtal(); + mxs_power_set_auto_restart(); + mxs_power_set_linreg(); + mxs_power_setup_5v_detect(); + + mxs_setup_batt_detect(); + + mxs_src_power_init(); + + if (has_battery) + mxs_power_configure_power_source(); + else + mxs_enable_battery_input(); + + mxs_power_clock2pll(); + + mxs_init_batt_bo(); + + mxs_switch_vddd_to_dcdc_source(); + + mxs_enable_output_rail_protection(); + + mxs_power_set_vddx(&mx28_vddio_cfg, 3300, 3150); + mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1000); + + writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ | + POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ | + POWER_CTRL_VBUS_VALID_IRQ | POWER_CTRL_BATT_BO_IRQ | + POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr); + + writel(POWER_5VCTRL_PWDN_5VBRNOUT, &power_regs->hw_power_5vctrl_set); + + mxs_early_delay(1000); +} + +void mx28_power_init(void) +{ + __mx28_power_init(1); +} + +void mx28_power_init_battery_input(void) +{ + __mx28_power_init(0); +} + +/** + * mxs_power_wait_pswitch() - Wait for power switch to be pressed + * + * This function waits until the power-switch was pressed to start booting + * the board. + */ +void mxs_power_wait_pswitch(void) +{ + struct mxs_power_regs *power_regs = + (struct mxs_power_regs *)IMX_POWER_BASE; + + while (!(readl(&power_regs->hw_power_sts) & POWER_STS_PSWITCH_MASK)) + ; +} diff --git a/arch/arm/mach-mxs/soc-imx23.c b/arch/arm/mach-mxs/soc-imx23.c index 825ea20a55..b21986536f 100644 --- a/arch/arm/mach-mxs/soc-imx23.c +++ b/arch/arm/mach-mxs/soc-imx23.c @@ -16,7 +16,7 @@ #include <common.h> #include <init.h> -#include <mach/imx-regs.h> +#include <mach/imx23-regs.h> #include <io.h> #define HW_CLKCTRL_RESET 0x120 diff --git a/arch/arm/mach-mxs/soc-imx28.c b/arch/arm/mach-mxs/soc-imx28.c index 01bc20a6f0..c7252f537e 100644 --- a/arch/arm/mach-mxs/soc-imx28.c +++ b/arch/arm/mach-mxs/soc-imx28.c @@ -16,7 +16,7 @@ #include <common.h> #include <init.h> -#include <mach/imx-regs.h> +#include <mach/imx28-regs.h> #include <io.h> #define HW_CLKCTRL_RESET 0x1e0 diff --git a/arch/arm/mach-mxs/usb-imx23.c b/arch/arm/mach-mxs/usb-imx23.c index 8bed11deb8..e626396f9d 100644 --- a/arch/arm/mach-mxs/usb-imx23.c +++ b/arch/arm/mach-mxs/usb-imx23.c @@ -15,7 +15,7 @@ */ #include <common.h> #include <io.h> -#include <mach/imx-regs.h> +#include <mach/imx23-regs.h> #include <mach/power.h> #define USBPHY_PWD (IMX_USBPHY_BASE + 0x0) diff --git a/arch/arm/mach-mxs/usb-imx28.c b/arch/arm/mach-mxs/usb-imx28.c index 1c982a0266..a87d4f6cbc 100644 --- a/arch/arm/mach-mxs/usb-imx28.c +++ b/arch/arm/mach-mxs/usb-imx28.c @@ -17,7 +17,7 @@ #include <common.h> #include <io.h> #include <errno.h> -#include <mach/imx-regs.h> +#include <mach/imx28-regs.h> #define POWER_CTRL (IMX_POWER_BASE + 0x0) #define POWER_CTRL_CLKGATE 0x40000000 diff --git a/arch/arm/mach-omap/am33xx_scrm.c b/arch/arm/mach-omap/am33xx_scrm.c index 67529f8226..bb0babeceb 100644 --- a/arch/arm/mach-omap/am33xx_scrm.c +++ b/arch/arm/mach-omap/am33xx_scrm.c @@ -15,7 +15,7 @@ #include <common.h> #include <io.h> #include <errno.h> -#include <sizes.h> +#include <linux/sizes.h> #include <init.h> #include <of.h> #include <asm/barebox-arm.h> diff --git a/arch/arm/mach-omap/include/mach/am33xx-devices.h b/arch/arm/mach-omap/include/mach/am33xx-devices.h index d2411a4fec..4790071c98 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-devices.h +++ b/arch/arm/mach-omap/include/mach/am33xx-devices.h @@ -2,7 +2,7 @@ #define __MACH_OMAP3_DEVICES_H #include <driver.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/am33xx-silicon.h> #include <mach/devices.h> #include <mach/omap_hsmmc.h> diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h index a44973e979..4e63b437ea 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h +++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h @@ -17,7 +17,7 @@ #ifndef __ASM_ARCH_AM33XX_H #define __ASM_ARCH_AM33XX_H -#include <sizes.h> +#include <linux/sizes.h> /** AM335x Internal Bus Base addresses */ #define AM33XX_L4_WKUP_BASE 0x44C00000 diff --git a/arch/arm/mach-omap/include/mach/omap3-devices.h b/arch/arm/mach-omap/include/mach/omap3-devices.h index 0809e95b11..8c62c99005 100644 --- a/arch/arm/mach-omap/include/mach/omap3-devices.h +++ b/arch/arm/mach-omap/include/mach/omap3-devices.h @@ -2,7 +2,7 @@ #define __MACH_OMAP3_DEVICES_H #include <driver.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/omap3-silicon.h> #include <mach/devices.h> #include <mach/mcspi.h> diff --git a/arch/arm/mach-omap/include/mach/omap3-generic.h b/arch/arm/mach-omap/include/mach/omap3-generic.h index 92bf7cabbd..7db0838a5f 100644 --- a/arch/arm/mach-omap/include/mach/omap3-generic.h +++ b/arch/arm/mach-omap/include/mach/omap3-generic.h @@ -1,7 +1,7 @@ #ifndef __MACH_OMAP3_GENERIC_H #define __MACH_OMAP3_GENERIC_H -#include <sizes.h> +#include <linux/sizes.h> #include <linux/string.h> #include <mach/generic.h> #include <mach/omap3-silicon.h> diff --git a/arch/arm/mach-omap/include/mach/omap4-devices.h b/arch/arm/mach-omap/include/mach/omap4-devices.h index 76c9789729..7ac940b2d7 100644 --- a/arch/arm/mach-omap/include/mach/omap4-devices.h +++ b/arch/arm/mach-omap/include/mach/omap4-devices.h @@ -2,7 +2,7 @@ #define __MACH_OMAP4_DEVICES_H #include <driver.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/devices.h> #include <mach/omap4-silicon.h> #include <mach/mcspi.h> diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c index 8d9d84c85c..7c8c350114 100644 --- a/arch/arm/mach-omap/xload.c +++ b/arch/arm/mach-omap/xload.c @@ -8,7 +8,7 @@ #include <libfile.h> #include <fs.h> #include <fcntl.h> -#include <sizes.h> +#include <linux/sizes.h> #include <malloc.h> #include <filetype.h> #include <xymodem.h> diff --git a/arch/arm/mach-samsung/lowlevel-s3c24x0.S b/arch/arm/mach-samsung/lowlevel-s3c24x0.S index 52079ffc7b..626ad04187 100644 --- a/arch/arm/mach-samsung/lowlevel-s3c24x0.S +++ b/arch/arm/mach-samsung/lowlevel-s3c24x0.S @@ -15,7 +15,7 @@ */ #include <config.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/s3c-iomap.h> .section ".text_bare_init.s3c24x0_disable_wd","ax" diff --git a/arch/arm/mach-samsung/mem-s3c24x0.c b/arch/arm/mach-samsung/mem-s3c24x0.c index db61c63b64..bf65150cab 100644 --- a/arch/arm/mach-samsung/mem-s3c24x0.c +++ b/arch/arm/mach-samsung/mem-s3c24x0.c @@ -23,7 +23,7 @@ #include <init.h> #include <clock.h> #include <io.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/s3c-iomap.h> #include <mach/s3c-generic.h> #include <mach/s3c-busctl.h> diff --git a/arch/arm/mach-socfpga/xload.c b/arch/arm/mach-socfpga/xload.c index 6586ada349..3380092168 100644 --- a/arch/arm/mach-socfpga/xload.c +++ b/arch/arm/mach-socfpga/xload.c @@ -6,7 +6,7 @@ #include <malloc.h> #include <init.h> #include <envfs.h> -#include <sizes.h> +#include <linux/sizes.h> #include <fs.h> #include <io.h> diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h index cdaab6ab8b..bbe6ae6be6 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/include/mach/iomap.h @@ -21,7 +21,7 @@ #ifndef __MACH_TEGRA_IOMAP_H #define __MACH_TEGRA_IOMAP_H -#include <sizes.h> +#include <linux/sizes.h> #define TEGRA_IRAM_BASE 0x40000000 #define TEGRA_IRAM_SIZE SZ_256K diff --git a/arch/arm/mach-tegra/include/mach/lowlevel.h b/arch/arm/mach-tegra/include/mach/lowlevel.h index 3e7e41b990..f1fea86cf6 100644 --- a/arch/arm/mach-tegra/include/mach/lowlevel.h +++ b/arch/arm/mach-tegra/include/mach/lowlevel.h @@ -25,7 +25,7 @@ #define __TEGRA_LOWLEVEL_H #include <linux/compiler.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <mach/iomap.h> diff --git a/arch/arm/mach-tegra/tegra_maincomplex_init.c b/arch/arm/mach-tegra/tegra_maincomplex_init.c index 4a362ddba3..6c6bdf6c15 100644 --- a/arch/arm/mach-tegra/tegra_maincomplex_init.c +++ b/arch/arm/mach-tegra/tegra_maincomplex_init.c @@ -15,7 +15,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <asm/errata.h> diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig index 9a1bf953b0..755fdc168a 100644 --- a/arch/arm/mach-versatile/Kconfig +++ b/arch/arm/mach-versatile/Kconfig @@ -1,13 +1,26 @@ if ARCH_VERSATILE -choice - prompt "ARM Board type" +config ARCH_TEXT_BASE + default 0x02000000 config MACH_VERSATILEPB - bool "ARM Versatile/PB (ARM926EJ-S)" + bool + default y select ARM_AMBA select CLKDEV_LOOKUP + select HAVE_DEFAULT_ENVIRONMENT_NEW + +choice + prompt "ARM Board type" + +config MACH_VERSATILEPB_926T + bool "ARM Versatile/PB (ARM926EJ-S)" + select CPU_ARM926T + +config MACH_VERSATILEPB_ARM1176 + bool "ARM Versatile/PB (ARM1176)" + select CPU_ARM1176 endchoice diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 84a85a4ec9..253e408db9 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -26,7 +26,7 @@ #include <init.h> #include <clock.h> #include <debug_ll.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/clkdev.h> #include <linux/clk.h> diff --git a/arch/arm/mach-versatile/include/mach/debug_ll.h b/arch/arm/mach-versatile/include/mach/debug_ll.h index f91812b12d..e6ee877a54 100644 --- a/arch/arm/mach-versatile/include/mach/debug_ll.h +++ b/arch/arm/mach-versatile/include/mach/debug_ll.h @@ -16,19 +16,8 @@ #ifndef __MACH_DEBUG_LL_H__ #define __MACH_DEBUG_LL_H__ -#include <linux/amba/serial.h> -#include <io.h> +#define DEBUG_LL_UART_ADDR 0x101F1000 -static inline void PUTC_LL(char c) -{ - /* Wait until there is space in the FIFO */ - while (readl(0x101F1000 + UART01x_FR) & UART01x_FR_TXFF); - - /* Send the character */ - writel(c, 0x101F1000 + UART01x_DR); - - /* Wait to make sure it hits the line, in case we die too soon. */ - while (readl(0x101F1000 + UART01x_FR) & UART01x_FR_TXFF); -} +#include <asm/debug_ll_pl011.h> #endif diff --git a/arch/arm/mach-vexpress/include/mach/debug_ll.h b/arch/arm/mach-vexpress/include/mach/debug_ll.h index 15d6e85239..89b06923ad 100644 --- a/arch/arm/mach-vexpress/include/mach/debug_ll.h +++ b/arch/arm/mach-vexpress/include/mach/debug_ll.h @@ -14,20 +14,11 @@ #define DEBUG_LL_PHYS_BASE_RS1 0x1c000000 #ifdef MP -#define UART_BASE DEBUG_LL_PHYS_BASE +#define DEBUG_LL_UART_ADDR DEBUG_LL_PHYS_BASE #else -#define UART_BASE DEBUG_LL_PHYS_BASE_RS1 +#define DEBUG_LL_UART_ADDR DEBUG_LL_PHYS_BASE_RS1 #endif -static inline void PUTC_LL(char c) -{ - /* Wait until there is space in the FIFO */ - while (readl(UART_BASE + UART01x_FR) & UART01x_FR_TXFF); +#include <asm/debug_ll_pl011.h> - /* Send the character */ - writel(c, UART_BASE + UART01x_DR); - - /* Wait to make sure it hits the line, in case we die too soon. */ - while (readl(UART_BASE + UART01x_FR) & UART01x_FR_TXFF); -} #endif diff --git a/arch/blackfin/lib/asm-offsets.c b/arch/blackfin/lib/asm-offsets.c new file mode 100644 index 0000000000..9003c736ff --- /dev/null +++ b/arch/blackfin/lib/asm-offsets.c @@ -0,0 +1,12 @@ +/* + * generate definitions needed by assembly language modules + * + * Licensed under the GPL-2 or later + */ + +#include <linux/kbuild.h> + +int main(void) +{ + return 0; +} diff --git a/arch/efi/efi/efi-device.c b/arch/efi/efi/efi-device.c index 1c9553d906..788bb71533 100644 --- a/arch/efi/efi/efi-device.c +++ b/arch/efi/efi/efi-device.c @@ -23,7 +23,7 @@ #include <malloc.h> #include <memory.h> #include <string.h> -#include <sizes.h> +#include <linux/sizes.h> #include <wchar.h> #include <init.h> #include <efi.h> diff --git a/arch/efi/efi/efi-image.c b/arch/efi/efi/efi-image.c index d9edd91e4d..f7bda8dfcb 100644 --- a/arch/efi/efi/efi-image.c +++ b/arch/efi/efi/efi-image.c @@ -18,7 +18,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <memory.h> #include <command.h> #include <magicvar.h> diff --git a/arch/efi/efi/efi.c b/arch/efi/efi/efi.c index 7de8ec82e8..d351775a28 100644 --- a/arch/efi/efi/efi.c +++ b/arch/efi/efi/efi.c @@ -18,7 +18,7 @@ */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <memory.h> #include <clock.h> #include <command.h> @@ -248,7 +248,7 @@ console_initcall(efi_console_init); void reset_cpu(unsigned long addr) { - BS->exit(efi_parent_image, EFI_SUCCESS, 0, NULL); + RT->reset_system(EFI_RESET_WARM, EFI_SUCCESS, 0, NULL); while(1); } @@ -341,3 +341,19 @@ efi_status_t efi_main(efi_handle_t image, efi_system_table_t *sys_table) return EFI_SUCCESS; } + +static int do_efiexit(int argc, char *argv[]) +{ + return BS->exit(efi_parent_image, EFI_SUCCESS, 0, NULL); +} + +BAREBOX_CMD_HELP_START(efiexit) +BAREBOX_CMD_HELP_TEXT("Leave barebox and return to the calling EFI process\n") +BAREBOX_CMD_HELP_END + +BAREBOX_CMD_START(efiexit) + .cmd = do_efiexit, + BAREBOX_CMD_DESC("Usage: efiexit") + BAREBOX_CMD_GROUP(CMD_GRP_MISC) + BAREBOX_CMD_HELP(cmd_efiexit_help) +BAREBOX_CMD_END diff --git a/arch/efi/lib/asm-offsets.c b/arch/efi/lib/asm-offsets.c new file mode 100644 index 0000000000..22f382b71e --- /dev/null +++ b/arch/efi/lib/asm-offsets.c @@ -0,0 +1,12 @@ +/* + * Generate definitions needed by assembly language modules. + * This code generates raw asm output which is post-processed to extract + * and format the required data. + */ + +#include <linux/kbuild.h> + +int main(void) +{ + return 0; +} diff --git a/arch/mips/Makefile b/arch/mips/Makefile index f3f4f67d86..6ef2bf75c3 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -148,46 +148,3 @@ dts := arch/mips/dts $(Q)$(MAKE) $(build)=$(dts) $(dts)/$@ KBUILD_IMAGE ?= $(KBUILD_BINARY) - -##### -# Generate asm-offsets.h -# - -offsets-file := include/generated/asm-offsets.h - -always += $(offsets-file) -targets += $(offsets-file) -targets += arch/$(SRCARCH)/lib/asm-offsets.s - -# Default sed regexp - multiline due to syntax constraints -define sed-y - "/^->/{s:->#\(.*\):/* \1 */:; \ - s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \ - s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \ - s:->::; p;}" -endef - -quiet_cmd_offsets = GEN $@ -define cmd_offsets - (set -e; \ - echo "#ifndef __ASM_OFFSETS_H__"; \ - echo "#define __ASM_OFFSETS_H__"; \ - echo "/*"; \ - echo " * DO NOT MODIFY."; \ - echo " *"; \ - echo " * This file was generated by Kbuild"; \ - echo " *"; \ - echo " */"; \ - echo ""; \ - sed -ne $(sed-y) $<; \ - echo ""; \ - echo "#endif" ) > $@ -endef - -# We use internal kbuild rules to avoid the "is up to date" message from make -arch/$(SRCARCH)/lib/asm-offsets.s: arch/$(SRCARCH)/lib/asm-offsets.c FORCE - $(Q)mkdir -p $(dir $@) - $(call if_changed_dep,cc_s_c) - -$(obj)/$(offsets-file): arch/$(SRCARCH)/lib/asm-offsets.s Makefile - $(call cmd,offsets) diff --git a/arch/mips/boards/netgear-wg102/ram.c b/arch/mips/boards/netgear-wg102/ram.c index e26dc7cbd3..4cde573982 100644 --- a/arch/mips/boards/netgear-wg102/ram.c +++ b/arch/mips/boards/netgear-wg102/ram.c @@ -1,6 +1,6 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/memory.h> static int mem_init(void) diff --git a/arch/mips/boards/qemu-malta/init.c b/arch/mips/boards/qemu-malta/init.c index 9d90f28651..24bfdc03ee 100644 --- a/arch/mips/boards/qemu-malta/init.c +++ b/arch/mips/boards/qemu-malta/init.c @@ -18,7 +18,7 @@ #include <common.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> static int malta_core_init(void) { diff --git a/arch/mips/boot/main_entry-pbl.c b/arch/mips/boot/main_entry-pbl.c index 3a244a0c50..e408d29445 100644 --- a/arch/mips/boot/main_entry-pbl.c +++ b/arch/mips/boot/main_entry-pbl.c @@ -19,7 +19,7 @@ #include <common.h> #include <pbl.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <string.h> #include <asm/sections.h> #include <asm-generic/memory_layout.h> diff --git a/arch/nios2/lib/asm-offsets.c b/arch/nios2/lib/asm-offsets.c new file mode 100644 index 0000000000..21e4771e54 --- /dev/null +++ b/arch/nios2/lib/asm-offsets.c @@ -0,0 +1,22 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + * + */ + +#include <linux/kbuild.h> + +int main(void) +{ + return 0; +} diff --git a/arch/openrisc/lib/asm-offsets.c b/arch/openrisc/lib/asm-offsets.c new file mode 100644 index 0000000000..8cee8e00c6 --- /dev/null +++ b/arch/openrisc/lib/asm-offsets.c @@ -0,0 +1,18 @@ +/* + * OpenRISC asm-offsets.c + * + * This program is used to generate definitions needed by + * assembly language modules. + * + * We use the technique used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + */ + +#include <linux/kbuild.h> + +int main(void) +{ + return 0; +} diff --git a/arch/ppc/boards/pcm030/pcm030.c b/arch/ppc/boards/pcm030/pcm030.c index 0762bd4f26..a7fa21d173 100644 --- a/arch/ppc/boards/pcm030/pcm030.c +++ b/arch/ppc/boards/pcm030/pcm030.c @@ -30,7 +30,7 @@ #include <types.h> #include <partition.h> #include <memory.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/stat.h> #include <fs.h> diff --git a/arch/ppc/lib/asm-offsets.c b/arch/ppc/lib/asm-offsets.c new file mode 100644 index 0000000000..bef280edd7 --- /dev/null +++ b/arch/ppc/lib/asm-offsets.c @@ -0,0 +1,21 @@ +/* + * This program is used to generate definitions needed by + * assembly language modules. + * + * We use the technique used in the OSF Mach kernel code: + * generate asm statements containing #defines, + * compile this file to assembler, and then extract the + * #defines from the assembly-language output. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include <linux/kbuild.h> + +int main(void) +{ + return 0; +} diff --git a/arch/sandbox/lib/asm-offsets.c b/arch/sandbox/lib/asm-offsets.c new file mode 100644 index 0000000000..22f382b71e --- /dev/null +++ b/arch/sandbox/lib/asm-offsets.c @@ -0,0 +1,12 @@ +/* + * Generate definitions needed by assembly language modules. + * This code generates raw asm output which is post-processed to extract + * and format the required data. + */ + +#include <linux/kbuild.h> + +int main(void) +{ + return 0; +} diff --git a/arch/x86/lib/asm-offsets.c b/arch/x86/lib/asm-offsets.c new file mode 100644 index 0000000000..b1be3e5390 --- /dev/null +++ b/arch/x86/lib/asm-offsets.c @@ -0,0 +1,11 @@ +/* + * Generate definitions needed by assembly language modules. + * This code generates raw asm output which is post-processed to extract + * and format the required data. + */ + +#include <linux/kbuild.h> + +void common(void) +{ +} diff --git a/commands/loadxy.c b/commands/loadxy.c index df14043d69..1e65cb6221 100644 --- a/commands/loadxy.c +++ b/commands/loadxy.c @@ -43,10 +43,10 @@ static int console_change_speed(struct console_device *cdev, int baudrate) { int current_baudrate; + const char *bstr; - current_baudrate = - (int)simple_strtoul(dev_get_param(&cdev->class_dev, - "baudrate"), NULL, 10); + bstr = dev_get_param(&cdev->class_dev, "baudrate"); + current_baudrate = bstr ? (int)simple_strtoul(bstr, NULL, 10) : 0; if (baudrate && baudrate != current_baudrate) { printf("## Switch baudrate from %d to %d bps and press ENTER ...\n", current_baudrate, baudrate); diff --git a/common/blspec.c b/common/blspec.c index f46a11d44c..b9342d566c 100644 --- a/common/blspec.c +++ b/common/blspec.c @@ -278,6 +278,7 @@ static bool entry_is_of_compatible(struct blspec_entry *entry) fdt = read_file(filename, &size); if (!fdt) { + pr_err("Cannot read: %s\n", filename); ret = false; goto out; } diff --git a/common/clock.c b/common/clock.c index 2ee81da8e7..35c9e6cbb8 100644 --- a/common/clock.c +++ b/common/clock.c @@ -22,6 +22,7 @@ */ #include <common.h> +#include <init.h> #include <asm-generic/div64.h> #include <clock.h> #include <poller.h> @@ -35,6 +36,16 @@ static uint64_t time_ns; */ uint64_t time_beginning; +static int dummy_csrc_warn(void) +{ + if (!current_clock) { + pr_warn("Warning: Using dummy clocksource\n"); + } + + return 0; +} +late_initcall(dummy_csrc_warn); + /** * get_time_ns - get current timestamp in nanoseconds */ @@ -44,8 +55,13 @@ uint64_t get_time_ns(void) uint64_t cycle_now, cycle_delta; uint64_t ns_offset; - if (!cs) - return 0; + if (!cs) { + static uint64_t dummy_counter; + + dummy_counter += CONFIG_CLOCKSOURCE_DUMMY_RATE; + + return dummy_counter; + } /* read clocksource: */ cycle_now = cs->read() & cs->mask; diff --git a/common/console.c b/common/console.c index e5f4267cbd..c092621aa1 100644 --- a/common/console.c +++ b/common/console.c @@ -64,6 +64,7 @@ static int console_std_set(struct device_d *dev, struct param_d *param, struct console_device *cdev = to_console_dev(dev); char active[4]; unsigned int flag = 0, i = 0; + int ret; if (val) { if (strchr(val, 'i') && cdev->getc) { @@ -90,6 +91,12 @@ static int console_std_set(struct device_d *dev, struct param_d *param, cdev->setbrg(cdev, cdev->baudrate); } + if (cdev->set_active) { + ret = cdev->set_active(cdev, flag); + if (ret) + return ret; + } + active[i] = 0; cdev->f_active = flag; diff --git a/common/efi-devicepath.c b/common/efi-devicepath.c index 2b1d916768..a53c6d2e8b 100644 --- a/common/efi-devicepath.c +++ b/common/efi-devicepath.c @@ -1368,3 +1368,18 @@ char *device_path_to_str(struct efi_device_path *dev_path) return str.str; } + +u8 device_path_to_type(struct efi_device_path *dev_path) +{ + struct efi_device_path *dev_path_next; + + dev_path = unpack_device_path(dev_path); + dev_path_next = next_device_path_node(dev_path); + + while (!is_device_path_end(dev_path_next)) { + dev_path = dev_path_next; + dev_path_next = next_device_path_node(dev_path); + } + + return device_path_type(dev_path); +} diff --git a/common/memtest.c b/common/memtest.c index 541d008221..25a97d845c 100644 --- a/common/memtest.c +++ b/common/memtest.c @@ -24,7 +24,7 @@ #include <common.h> #include <memory.h> #include <types.h> -#include <sizes.h> +#include <linux/sizes.h> #include <errno.h> #include <memtest.h> diff --git a/common/startup.c b/common/startup.c index 2b92efcb95..e59b06d533 100644 --- a/common/startup.c +++ b/common/startup.c @@ -51,6 +51,12 @@ static int mount_root(void) mount("none", "ramfs", "/", NULL); mkdir("/dev", 0); mount("none", "devfs", "/dev", NULL); + + if (IS_ENABLED(CONFIG_FS_EFIVARFS)) { + mkdir("/efivars", 0); + mount("none", "efivarfs", "/efivars", NULL); + } + return 0; } fs_initcall(mount_root); diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 645e9b5b7e..346ab98134 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -32,7 +32,7 @@ #include <disks.h> #include <asm/mmu.h> #include <ata_drive.h> -#include <sizes.h> +#include <linux/sizes.h> #include <clock.h> #include "ahci.h" diff --git a/drivers/base/driver.c b/drivers/base/driver.c index e0125a1b92..81b35031a1 100644 --- a/drivers/base/driver.c +++ b/drivers/base/driver.c @@ -318,6 +318,22 @@ void __iomem *dev_request_mem_region_by_name(struct device_d *dev, const char *n } EXPORT_SYMBOL(dev_request_mem_region_by_name); +void __iomem *dev_request_mem_region_err_null(struct device_d *dev, int num) +{ + struct resource *res; + + res = dev_get_resource(dev, IORESOURCE_MEM, num); + if (IS_ERR(res)) + return NULL; + + res = request_iomem_region(dev_name(dev), res->start, res->end); + if (IS_ERR(res)) + return NULL; + + return (void __force __iomem *)res->start; +} +EXPORT_SYMBOL(dev_request_mem_region_err_null); + void __iomem *dev_request_mem_region(struct device_d *dev, int num) { struct resource *res; @@ -330,7 +346,7 @@ void __iomem *dev_request_mem_region(struct device_d *dev, int num) if (IS_ERR(res)) return ERR_CAST(res); - return (void __force __iomem *)res->start; + return IOMEM(res->start); } EXPORT_SYMBOL(dev_request_mem_region); diff --git a/drivers/bus/omap-gpmc.c b/drivers/bus/omap-gpmc.c index 6cc3269993..6752c42a35 100644 --- a/drivers/bus/omap-gpmc.c +++ b/drivers/bus/omap-gpmc.c @@ -11,7 +11,7 @@ #include <driver.h> #include <malloc.h> #include <init.h> -#include <sizes.h> +#include <linux/sizes.h> #include <io.h> #include <of.h> #include <of_address.h> diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index 1f84e9f6e9..8bf27c1c07 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -22,7 +22,7 @@ #include <io.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx-regs.h> +#include <mach/imx23-regs.h> #include "clk.h" diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index aa2924c70e..77a13bc7ac 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -22,7 +22,7 @@ #include <io.h> #include <linux/clkdev.h> #include <linux/err.h> -#include <mach/imx-regs.h> +#include <mach/imx28-regs.h> #include "clk.h" diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index fc5a389b95..598edc9a81 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -18,28 +18,21 @@ config CLOCKSOURCE_DIGIC bool depends on ARCH_DIGIC -config CLOCKSOURCE_DUMMY - bool "Enable dummy software-only clocksource" +config CLOCKSOURCE_DUMMY_RATE + int + prompt "dummy clocksource rate" + default 1000 help When porting barebox to a new SoC there might be a case of broken or absent clocksource. This causes barebox serial console to be non functional. - To solve the problem this software-only clocksource driver is used. - WARNING!!! This clocksource doesn't provide correct timing. - To adjust this clocksource please use CONFIG_CLOCKSOURCE_DUMMY_RATE. + To solve the problem barebox has built-in software-only clocksource. + The software-only clocksource is used only if no hardware clocksource + is registered. This can help if initialization order is wrong so that + the time functions are used before the real clocksource was initialized. + WARNING!!! Built-in software-only clocksource doesn't provide correct timing. + The option CONFIG_CLOCKSOURCE_DUMMY_RATE is used to adjust this clocksource. The bigger rate valuest makes clocksource "faster". - It's possible to add this clocksource unconditionally. - This clocksource starts very early (pure_initcall) so - real clocksource will take over. - This can help if initialization order is wrong so that - the time functions are used before the real clocksource - was initialized. - -config CLOCKSOURCE_DUMMY_RATE - int - prompt "dummy clocksource rate" - depends on CLOCKSOURCE_DUMMY - default 1000 config CLOCKSOURCE_MVEBU bool diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index b80df6b2c9..f5f5141a3d 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -3,7 +3,6 @@ obj-$(CONFIG_ARM_SMP_TWD) += arm_smp_twd.o obj-$(CONFIG_CLOCKSOURCE_BCM2835) += bcm2835.o obj-$(CONFIG_CLOCKSOURCE_CLPS711X) += clps711x.o obj-$(CONFIG_CLOCKSOURCE_DIGIC) += digic.o -obj-$(CONFIG_CLOCKSOURCE_DUMMY) += dummy.o obj-$(CONFIG_CLOCKSOURCE_MVEBU) += mvebu.o obj-$(CONFIG_CLOCKSOURCE_NOMADIK) += nomadik.o obj-$(CONFIG_CLOCKSOURCE_ORION) += orion.o diff --git a/drivers/clocksource/dummy.c b/drivers/clocksource/dummy.c deleted file mode 100644 index 96f9b6efca..0000000000 --- a/drivers/clocksource/dummy.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> - * - * This file is part of barebox. - * See file CREDITS for list of people who contributed to this project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <common.h> -#include <init.h> -#include <clock.h> - -static uint64_t dummy_counter; - -static uint64_t dummy_cs_read(void) -{ - static int first; - - if (!first) { - pr_warn("Warning: Using dummy clocksource\n"); - first = 1; - } - - dummy_counter += CONFIG_CLOCKSOURCE_DUMMY_RATE; - - return dummy_counter; -} - -static struct clocksource dummy_cs = { - .read = dummy_cs_read, - .mask = CLOCKSOURCE_MASK(32), -}; - -static int clocksource_init(void) -{ - dummy_counter = 0; - - clocks_calc_mult_shift(&dummy_cs.mult, &dummy_cs.shift, - 100000000, NSEC_PER_SEC, 10); - - pr_debug("clocksource_init: mult=%08x, shift=%08x\n", - dummy_cs.mult, dummy_cs.shift); - - return init_clock(&dummy_cs); -} -pure_initcall(clocksource_init); diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 094f5916cf..96c3c2bc87 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -271,11 +271,6 @@ static struct omap_i2c_driver_data am33xx_data = { .fclk_rate = 48000, }; -static struct omap_i2c_driver_data omap4_of_data = { - .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE, - .fclk_rate = 0, -}; - static inline void omap_i2c_write_reg(struct omap_i2c_struct *i2c_omap, int reg, u16 val) { @@ -1011,6 +1006,11 @@ i2c_omap_probe(struct device_d *pdev) if (r) return r; + if (of_machine_is_compatible("ti,am33xx")) + i2c_data = &am33xx_data; + if (of_machine_is_compatible("ti,omap4")) + i2c_data = &omap4_data; + i2c_omap->data = i2c_data; i2c_omap->reg_shift = (i2c_data->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3; @@ -1140,7 +1140,6 @@ static __maybe_unused struct of_device_id omap_i2c_dt_ids[] = { .data = (unsigned long)&omap3_data, }, { .compatible = "ti,omap4-i2c", - .data = (unsigned long)&omap4_of_data, }, { /* sentinel */ } diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c index d6565ca2f8..367964c1d0 100644 --- a/drivers/mci/mxs.c +++ b/drivers/mci/mxs.c @@ -40,7 +40,6 @@ #include <linux/clk.h> #include <linux/err.h> #include <asm/bitops.h> -#include <mach/imx-regs.h> #include <mach/mci.h> #include <mach/clock.h> #include <mach/ssp.h> diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index 52b0da5927..dc0f8c6aa3 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -9,7 +9,7 @@ * */ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/mtd/nand.h> #ifdef CONFIG_NAND_INFO diff --git a/drivers/mtd/nand/nand_s3c24xx.c b/drivers/mtd/nand/nand_s3c24xx.c index bee037b96d..37bba39260 100644 --- a/drivers/mtd/nand/nand_s3c24xx.c +++ b/drivers/mtd/nand/nand_s3c24xx.c @@ -516,12 +516,12 @@ static void __nand_boot_init wait_for_completion(void __iomem *host) * * Uses the offset of the page to generate an page address into the NAND. This * differs when using a 512 byte or 2048 bytes per page NAND. - * The collumn part of the page address to be generated is always forced to '0'. + * The column part of the page address to be generated is always forced to '0'. */ static void __nand_boot_init nfc_addr(void __iomem *host, uint32_t offs, int ps, int c) { - send_addr(host, 0); /* collumn part 1 */ + send_addr(host, 0); /* column part 1 */ if (ps == 512) { send_addr(host, offs >> 9); @@ -529,7 +529,7 @@ static void __nand_boot_init nfc_addr(void __iomem *host, uint32_t offs, if (c > 3) send_addr(host, offs >> 25); } else { - send_addr(host, 0); /* collumn part 2 */ + send_addr(host, 0); /* column part 2 */ send_addr(host, offs >> 11); send_addr(host, offs >> 19); if (c > 4) diff --git a/drivers/net/cpsw.c b/drivers/net/cpsw.c index b6618ad675..799fac89a2 100644 --- a/drivers/net/cpsw.c +++ b/drivers/net/cpsw.c @@ -910,6 +910,16 @@ static int cpsw_slave_setup(struct cpsw_slave *slave, int slave_num, struct eth_device *edev = &slave->edev; struct device_d *dev = &slave->dev; int ret; + struct phy_device *phy; + + phy = mdiobus_scan(&priv->miibus, priv->slaves[slave_num].phy_id); + if (IS_ERR(phy)) + return PTR_ERR(phy); + + phy->dev.device_node = priv->slaves[slave_num].dev.device_node; + ret = phy_register_device(phy); + if (ret) + return ret; sprintf(dev->name, "cpsw-slave"); dev->id = slave->slave_num; @@ -1199,22 +1209,11 @@ int cpsw_probe(struct device_d *dev) mdiobus_register(&priv->miibus); for (i = 0; i < priv->num_slaves; i++) { - struct phy_device *phy; - - phy = mdiobus_scan(&priv->miibus, priv->slaves[i].phy_id); - if (IS_ERR(phy)) { - ret = PTR_ERR(phy); - goto out; - } - - phy->dev.device_node = priv->slaves[i].dev.device_node; - ret = phy_register_device(phy); - if (ret) - goto out; - ret = cpsw_slave_setup(&priv->slaves[i], i, priv); - if (ret) - goto out; + if (ret) { + dev_err(dev, "Failed to setup slave %d: %s\n", i, strerror(-ret)); + continue; + } } return 0; diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c index 7734cf8a44..8042e90951 100644 --- a/drivers/net/mvneta.c +++ b/drivers/net/mvneta.c @@ -28,7 +28,7 @@ #include <io.h> #include <net.h> #include <of_net.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/mmu.h> #include <linux/clk.h> #include <linux/err.h> diff --git a/drivers/net/orion-gbe.c b/drivers/net/orion-gbe.c index ab761ad2e0..3fbc1df893 100644 --- a/drivers/net/orion-gbe.c +++ b/drivers/net/orion-gbe.c @@ -31,7 +31,7 @@ #include <io.h> #include <net.h> #include <of_net.h> -#include <sizes.h> +#include <linux/sizes.h> #include <asm/mmu.h> #include <linux/clk.h> #include <linux/err.h> diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index 5702900e49..19f5763c87 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -50,11 +50,11 @@ struct rtl8169_priv { struct pci_dev *pci_dev; int chipset; - struct bufdesc *tx_desc; + volatile struct bufdesc *tx_desc; void *tx_buf; unsigned int cur_tx; - struct bufdesc *rx_desc; + volatile struct bufdesc *rx_desc; void *rx_buf; unsigned int cur_rx; @@ -250,10 +250,6 @@ static void rtl8169_init_ring(struct rtl8169_priv *priv) priv->rx_desc[i].buf_addr = virt_to_phys(priv->rx_buf + i * PKT_BUF_SIZE); } - - dma_flush_range((unsigned long)priv->rx_desc, - (unsigned long)priv->rx_desc + - NUM_RX_DESC * sizeof(struct bufdesc)); } static void rtl8169_hw_start(struct rtl8169_priv *priv) @@ -386,14 +382,10 @@ static int rtl8169_eth_send(struct eth_device *edev, void *packet, ((packet_length > ETH_ZLEN) ? packet_length : ETH_ZLEN); } - dma_flush_range((unsigned long)&priv->tx_desc[entry], - (unsigned long)&priv->tx_desc[entry + 1]); - RTL_W8(priv, TxPoll, 0x40); - do { - dma_inv_range((unsigned long)&priv->tx_desc[entry], - (unsigned long)&priv->tx_desc[entry + 1]); - } while (priv->tx_desc[entry].status & BD_STAT_OWN); + + while (priv->tx_desc[entry].status & BD_STAT_OWN) + ; priv->cur_tx++; @@ -408,9 +400,6 @@ static int rtl8169_eth_rx(struct eth_device *edev) entry = priv->cur_rx % NUM_RX_DESC; - dma_inv_range((unsigned long)&priv->rx_desc[entry], - (unsigned long)&priv->rx_desc[entry + 1]); - if ((priv->rx_desc[entry].status & BD_STAT_OWN) == 0) { if (!(priv->rx_desc[entry].status & BD_STAT_RX_RES)) { pkt_size = (priv->rx_desc[entry].status & 0x1fff) - 4; @@ -441,9 +430,6 @@ static int rtl8169_eth_rx(struct eth_device *edev) priv->rx_desc[entry].buf_addr = virt_to_phys(priv->rx_buf + entry * PKT_BUF_SIZE); - - dma_flush_range((unsigned long)&priv->rx_desc[entry], - (unsigned long)&priv->rx_desc[entry + 1]); } else { dev_err(&edev->dev, "rx error\n"); } diff --git a/drivers/net/smc91111.c b/drivers/net/smc91111.c index 55d93676b2..100688ccf8 100644 --- a/drivers/net/smc91111.c +++ b/drivers/net/smc91111.c @@ -152,6 +152,7 @@ /* Memory Information Register */ /* BANK 0 */ #define MIR_REG 0x0008 +#define MIR_FREE_MASK 0xff00 /* Receive/Phy Control Register */ /* BANK 0 */ @@ -582,6 +583,43 @@ static inline void SMC_SELECT_BANK(struct smc91c111_priv *p, int bank) SMC_outw(p, bank, BANK_SELECT); } +#if SMC_DEBUG > 2 +static void print_packet( unsigned char * buf, int length ) +{ + int i; + int remainder; + int lines; + + printf("Packet of length %d \n", length ); + +#if SMC_DEBUG > 3 + lines = length / 16; + remainder = length % 16; + + for ( i = 0; i < lines ; i ++ ) { + int cur; + + for ( cur = 0; cur < 8; cur ++ ) { + unsigned char a, b; + + a = *(buf ++ ); + b = *(buf ++ ); + printf("%02x%02x ", a, b ); + } + printf("\n"); + } + for ( i = 0; i < remainder/2 ; i++ ) { + unsigned char a, b; + + a = *(buf ++ ); + b = *(buf ++ ); + printf("%02x%02x ", a, b ); + } + printf("\n"); +#endif +} +#endif + /* note: timeout in seconds */ static int poll4int(struct smc91c111_priv *priv, unsigned char mask, int timeout) @@ -916,6 +954,30 @@ static int smc91c111_eth_open(struct eth_device *edev) return 0; } +static void smc91c111_ensure_freemem(struct eth_device *edev) +{ + struct smc91c111_priv *priv = (struct smc91c111_priv *)edev->priv; + u16 mir, rxfifo; + + SMC_SELECT_BANK(priv, 0); + mir = SMC_inw(priv, MIR_REG); + SMC_SELECT_BANK(priv, 2); + + if ((mir & MIR_FREE_MASK) == 0) { + do { + SMC_outw(priv, MC_RELEASE, MMU_CMD_REG); + smc_wait_mmu_release_complete(priv); + + SMC_SELECT_BANK(priv, 0); + mir = SMC_inw(priv, MIR_REG); + SMC_SELECT_BANK(priv, 2); + rxfifo = SMC_inw(priv, RXFIFO_REG); + dev_dbg(&edev->dev, "%s: card memory saturated, tidying up (rx_tx_fifo=0x%04x mir=0x%04x)\n", + SMC_DEV_NAME, rxfifo, mir); + } while (!(rxfifo & RXFIFO_REMPTY)); + } +} + static int smc91c111_eth_send(struct eth_device *edev, void *packet, int packet_length) { @@ -957,6 +1019,7 @@ static int smc91c111_eth_send(struct eth_device *edev, void *packet, return -EOVERFLOW; } + smc91c111_ensure_freemem(edev); /* now, try to allocate the memory */ SMC_SELECT_BANK(priv, 2); SMC_outw(priv, MC_ALLOC | numPages, MMU_CMD_REG); @@ -1255,44 +1318,6 @@ static void smc_dump_mii_stream (unsigned char * bits, int size) } #endif - -#if SMC_DEBUG > 2 -static void print_packet( unsigned char * buf, int length ) -{ - int i; - int remainder; - int lines; - - printf("Packet of length %d \n", length ); - -#if SMC_DEBUG > 3 - lines = length / 16; - remainder = length % 16; - - for ( i = 0; i < lines ; i ++ ) { - int cur; - - for ( cur = 0; cur < 8; cur ++ ) { - unsigned char a, b; - - a = *(buf ++ ); - b = *(buf ++ ); - printf("%02x%02x ", a, b ); - } - printf("\n"); - } - for ( i = 0; i < remainder/2 ; i++ ) { - unsigned char a, b; - - a = *(buf ++ ); - b = *(buf ++ ); - printf("%02x%02x ", a, b ); - } - printf("\n"); -#endif -} -#endif - static int smc91c111_init_dev(struct eth_device *edev) { return 0; diff --git a/drivers/of/base.c b/drivers/of/base.c index e9f0883f47..af10fd1da3 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -24,7 +24,7 @@ #include <malloc.h> #include <init.h> #include <memory.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/ctype.h> #include <linux/amba/bus.h> #include <linux/err.h> diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index 84c38fd5a1..dfa95c38c8 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -23,7 +23,7 @@ #include <malloc.h> #include <init.h> #include <memory.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/ctype.h> #include <linux/err.h> @@ -64,7 +64,7 @@ struct device_node *of_unflatten_dtb(const void *infdt) struct device_node *root, *node = NULL; struct property *p; uint32_t dt_struct; - struct fdt_node_header *fnh; + const struct fdt_node_header *fnh; void *dt_strings; struct fdt_header f; int ret; diff --git a/drivers/pci/pci-mvebu.c b/drivers/pci/pci-mvebu.c index a314a689c0..5e2b87a9e1 100644 --- a/drivers/pci/pci-mvebu.c +++ b/drivers/pci/pci-mvebu.c @@ -20,7 +20,7 @@ #include <of_address.h> #include <of_gpio.h> #include <of_pci.h> -#include <sizes.h> +#include <linux/sizes.h> #include "pci-mvebu.h" diff --git a/drivers/pci/pci-tegra.c b/drivers/pci/pci-tegra.c index 1ff3c0d150..1e7907e5b1 100644 --- a/drivers/pci/pci-tegra.c +++ b/drivers/pci/pci-tegra.c @@ -32,7 +32,7 @@ #include <linux/pci.h> #include <linux/phy/phy.h> #include <linux/reset.h> -#include <sizes.h> +#include <linux/sizes.h> #include <mach/tegra-powergate.h> #include <regulator.h> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 7f8ebcfe43..5b848eeb2a 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1,5 +1,5 @@ #include <common.h> -#include <sizes.h> +#include <linux/sizes.h> #include <linux/pci.h> #ifdef DEBUG diff --git a/drivers/pinctrl/mvebu/armada-370.c b/drivers/pinctrl/mvebu/armada-370.c index 4778358fad..bcfe40e6c8 100644 --- a/drivers/pinctrl/mvebu/armada-370.c +++ b/drivers/pinctrl/mvebu/armada-370.c @@ -17,7 +17,7 @@ #include <malloc.h> #include <of.h> #include <of_address.h> -#include <sizes.h> +#include <linux/sizes.h> #include "common.h" diff --git a/drivers/pinctrl/mvebu/armada-xp.c b/drivers/pinctrl/mvebu/armada-xp.c index 8c71867a7d..1745776a4d 100644 --- a/drivers/pinctrl/mvebu/armada-xp.c +++ b/drivers/pinctrl/mvebu/armada-xp.c @@ -26,7 +26,7 @@ #include <malloc.h> #include <of.h> #include <of_address.h> -#include <sizes.h> +#include <linux/sizes.h> #include "common.h" diff --git a/drivers/pinctrl/mvebu/dove.c b/drivers/pinctrl/mvebu/dove.c index bd0a632f1f..a2133a093b 100644 --- a/drivers/pinctrl/mvebu/dove.c +++ b/drivers/pinctrl/mvebu/dove.c @@ -15,7 +15,7 @@ #include <malloc.h> #include <of.h> #include <of_address.h> -#include <sizes.h> +#include <linux/sizes.h> #include "common.h" diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index 0d6d2e7e53..b803f891eb 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -652,9 +652,9 @@ static int at91_gpio_probe(struct device_d *dev) } gpio_banks = max(gpio_banks, alias_idx + 1); - at91_gpio->regbase = dev_request_mem_region(dev, 0); - if (IS_ERR(at91_gpio->regbase)) - return PTR_ERR(at91_gpio->regbase); + at91_gpio->regbase = dev_request_mem_region_err_null(dev, 0); + if (!at91_gpio->regbase) + return -ENOENT; at91_gpio->chip.ops = &at91_gpio_ops; at91_gpio->chip.ngpio = MAX_NB_GPIO_PER_BANK; diff --git a/drivers/serial/atmel.c b/drivers/serial/atmel.c index 1f406925a3..4e4624e235 100644 --- a/drivers/serial/atmel.c +++ b/drivers/serial/atmel.c @@ -398,9 +398,9 @@ static int atmel_serial_init_port(struct console_device *cdev) struct device_d *dev = cdev->dev; struct atmel_uart_port *uart = to_atmel_uart_port(cdev); - uart->base = dev_request_mem_region(dev, 0); - if (IS_ERR(uart->base)) - return PTR_ERR(uart->base); + uart->base = dev_request_mem_region_err_null(dev, 0); + if (!uart->base) + return -ENOENT; uart->clk = clk_get(dev, "usart"); clk_enable(uart->clk); diff --git a/drivers/serial/serial_auart.c b/drivers/serial/serial_auart.c index ae6c5b8219..87b2e33ca3 100644 --- a/drivers/serial/serial_auart.c +++ b/drivers/serial/serial_auart.c @@ -47,7 +47,6 @@ #include <linux/err.h> #include <mach/clock.h> -#include <mach/imx-regs.h> #define HW_UARTAPP_CTRL0 (0x00000000) diff --git a/drivers/serial/stm-serial.c b/drivers/serial/stm-serial.c index 39ff7ae942..e5f57dc6e7 100644 --- a/drivers/serial/stm-serial.c +++ b/drivers/serial/stm-serial.c @@ -31,7 +31,6 @@ #include <malloc.h> #include <linux/clk.h> #include <linux/err.h> -#include <mach/imx-regs.h> #include <mach/clock.h> #define UARTDBGDR 0x00 diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index 9a35e09b88..8932103475 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -25,7 +25,6 @@ #include <linux/err.h> #include <asm/mmu.h> #include <mach/generic.h> -#include <mach/imx-regs.h> #include <mach/clock.h> #include <mach/ssp.h> diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 92a1a218c6..76879db1f1 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -653,7 +653,8 @@ static void do_bootm_on_complete(struct usb_ep *ep, struct usb_request *req) pr_err("Booting failed\n"); } -static void cb_boot(struct usb_ep *ep, struct usb_request *req, const char *opt) +static void __maybe_unused cb_boot(struct usb_ep *ep, struct usb_request *req, + const char *opt) { struct f_fastboot *f_fb = req->context; @@ -857,9 +858,11 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] = { }, { .cmd = "download:", .cb = cb_download, +#if defined(CONFIG_BOOTM) }, { .cmd = "boot", .cb = cb_boot, +#endif }, { .cmd = "flash:", .cb = cb_flash, diff --git a/drivers/video/imx-ipu-v3/imx-hdmi.c b/drivers/video/imx-ipu-v3/imx-hdmi.c index 4f462889a8..2da76a4b7a 100644 --- a/drivers/video/imx-ipu-v3/imx-hdmi.c +++ b/drivers/video/imx-ipu-v3/imx-hdmi.c @@ -1190,16 +1190,18 @@ static int imx_hdmi_probe(struct device_d *dev) if (ret) return ret; - ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0); - if (ddc_node) { - hdmi->ddc = of_find_i2c_adapter_by_node(ddc_node); - if (!hdmi->ddc) - dev_dbg(hdmi->dev, "failed to read ddc node\n"); - } else { - dev_dbg(hdmi->dev, "no ddc property found\n"); - } + if (IS_ENABLED(CONFIG_DRIVER_VIDEO_EDID)) { + ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0); + if (ddc_node) { + hdmi->ddc = of_find_i2c_adapter_by_node(ddc_node); + if (!hdmi->ddc) + dev_dbg(hdmi->dev, "failed to read ddc node\n"); + } else { + dev_dbg(hdmi->dev, "no ddc property found\n"); + } - ddc_node = NULL; + ddc_node = NULL; + } hdmi->regs = dev_request_mem_region(dev, 0); if (!hdmi->regs) diff --git a/drivers/video/stm.c b/drivers/video/stm.c index 175e4b611d..3c90c0dc3f 100644 --- a/drivers/video/stm.c +++ b/drivers/video/stm.c @@ -27,7 +27,6 @@ #include <stmp-device.h> #include <linux/clk.h> #include <linux/err.h> -#include <mach/imx-regs.h> #include <mach/fb.h> #define HW_LCDIF_CTRL 0x00 diff --git a/fs/efivarfs.c b/fs/efivarfs.c index 58c637ef19..9a1503bd13 100644 --- a/fs/efivarfs.c +++ b/fs/efivarfs.c @@ -1,7 +1,7 @@ /* - * ramfs.c - a malloc based filesystem + * efivars.c - EFI variable filesystem * - * Copyright (c) 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * Copyright (c) 2014 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix * * See file CREDITS for list of people who contributed to this * project. @@ -34,9 +34,20 @@ #include <mach/efi.h> #include <mach/efi-device.h> +struct efivarfs_inode { + s16 *name; + efi_guid_t vendor; + char *full_name; /* name including vendor namespacing */ + struct list_head node; +}; + +struct efivarfs_dir { + struct list_head *current; + DIR dir; +}; + struct efivarfs_priv { - struct efi_file_handle *root_dir; - struct efi_file_io_interface *protocol; + struct list_head inodes; }; static int char_to_nibble(char c) @@ -75,8 +86,8 @@ int efi_guid_parse(const char *str, efi_guid_t *guid) if (*str != '-') return -EINVAL; str++; - break; - } + break; + } } return 0; @@ -115,11 +126,81 @@ static int efivarfs_parse_filename(const char *filename, efi_guid_t *vendor, s16 return 0; } +static int efivars_create(struct device_d *dev, const char *pathname, mode_t mode) +{ + struct efivarfs_priv *priv = dev->priv; + struct efivarfs_inode *inode; + efi_guid_t vendor; + efi_status_t efiret; + u8 dummydata; + char *name8; + s16 *name; + int ret; + + if (pathname[0] == '/') + pathname++; + + /* deny creating files with other vendor GUID than our own */ + ret = efivarfs_parse_filename(pathname, &vendor, &name); + if (ret) + return -ENOENT; + + if (memcmp(&vendor, &EFI_BAREBOX_VENDOR_GUID, sizeof(efi_guid_t))) + return -EPERM; + + inode = xzalloc(sizeof(*inode)); + inode->name = name; + inode->vendor = vendor; + + + name8 = strdup_wchar_to_char(inode->name); + inode->full_name = asprintf("%s-%pUl", name8, &inode->vendor); + free(name8); + + efiret = RT->set_variable(inode->name, &inode->vendor, + EFI_VARIABLE_NON_VOLATILE | + EFI_VARIABLE_BOOTSERVICE_ACCESS | + EFI_VARIABLE_RUNTIME_ACCESS, + 1, &dummydata); + if (EFI_ERROR(efiret)) { + free(inode); + return -efi_errno(efiret); + } + + list_add_tail(&inode->node, &priv->inodes); + + return 0; +} + +static int efivars_unlink(struct device_d *dev, const char *pathname) +{ + struct efivarfs_priv *priv = dev->priv; + struct efivarfs_inode *inode, *tmp; + efi_status_t efiret; + + if (pathname[0] == '/') + pathname++; + + list_for_each_entry_safe(inode, tmp, &priv->inodes, node) { + if (!strcmp(inode->full_name, pathname)) { + efiret = RT->set_variable(inode->name, &inode->vendor, + 0, 0, NULL); + if (EFI_ERROR(efiret)) + return -efi_errno(efiret); + list_del(&inode->node); + free(inode); + } + } + + return 0; +} + struct efivars_file { void *buf; unsigned long size; efi_guid_t vendor; s16 *name; + u32 attributes; }; static int efivarfs_open(struct device_d *dev, FILE *f, const char *filename) @@ -127,7 +208,6 @@ static int efivarfs_open(struct device_d *dev, FILE *f, const char *filename) struct efivars_file *efile; efi_status_t efiret; int ret; - uint32_t attributes; efile = xzalloc(sizeof(*efile)); @@ -135,28 +215,27 @@ static int efivarfs_open(struct device_d *dev, FILE *f, const char *filename) if (ret) return -ENOENT; - efiret = RT->get_variable(efile->name, &efile->vendor, &attributes, &efile->size, NULL); + efiret = RT->get_variable(efile->name, &efile->vendor, + &efile->attributes, &efile->size, NULL); if (EFI_ERROR(efiret) && efiret != EFI_BUFFER_TOO_SMALL) { ret = -efi_errno(efiret); goto out; } - efile->buf = malloc(efile->size + sizeof(uint32_t)); + efile->buf = malloc(efile->size); if (!efile->buf) { ret = -ENOMEM; goto out; } efiret = RT->get_variable(efile->name, &efile->vendor, NULL, &efile->size, - efile->buf + sizeof(uint32_t)); + efile->buf); if (EFI_ERROR(efiret)) { ret = -efi_errno(efiret); goto out; } - *(uint32_t *)efile->buf = attributes; - - f->size = efile->size + sizeof(uint32_t); + f->size = efile->size; f->inode = efile; return 0; @@ -187,74 +266,68 @@ static int efivarfs_read(struct device_d *_dev, FILE *f, void *buf, size_t insiz return insize; } -static loff_t efivarfs_lseek(struct device_d *dev, FILE *f, loff_t pos) +static int efivarfs_write(struct device_d *_dev, FILE *f, const void *buf, size_t insize) { - f->pos = pos; - - return f->pos; -} - -struct efivarfs_dir_entry { - char *name; - struct efivarfs_dir_entry *next; -}; + struct efivars_file *efile = f->inode; -struct efivarfs_dir { - struct efivarfs_dir_entry *first; - struct efivarfs_dir_entry *current; - DIR dir; -}; + if (efile->size < f->pos + insize) { + efile->buf = realloc(efile->buf, f->pos + insize); + efile->size = f->pos + insize; + } -static DIR *efivarfs_opendir(struct device_d *dev, const char *pathname) -{ - efi_status_t efiret; - efi_guid_t vendor; - s16 name[1024]; - struct efivarfs_dir *edir; - unsigned long size; - unsigned char *name8; + memcpy(efile->buf + f->pos, buf, insize); - name[0] = 0; + RT->set_variable(efile->name, &efile->vendor, efile->attributes, + efile->size ? efile->size : 1, efile->buf); - edir = xzalloc(sizeof(*edir)); + return insize; +} - while (1) { - struct efivarfs_dir_entry *entry; +static int efivarfs_truncate(struct device_d *dev, FILE *f, ulong size) +{ + struct efivars_file *efile = f->inode; - size = sizeof(name); - efiret = RT->get_next_variable(&size, name, &vendor); - if (EFI_ERROR(efiret)) - break; + efile->size = size; + efile->buf = realloc(efile->buf, efile->size + sizeof(uint32_t)); - entry = xzalloc(sizeof(*entry)); - name8 = strdup_wchar_to_char(name); + RT->set_variable(efile->name, &efile->vendor, efile->attributes, + efile->size ? efile->size : 1, efile->buf); - entry->name = asprintf("%s-%pUl", name8, &vendor); + f->size = efile->size; - free(name8); + return 0; +} - if (!edir->first) - edir->first = entry; +static loff_t efivarfs_lseek(struct device_d *dev, FILE *f, loff_t pos) +{ + f->pos = pos; - if (edir->current) - edir->current->next = entry; + return f->pos; +} - edir->current = entry; - } +static DIR *efivarfs_opendir(struct device_d *dev, const char *pathname) +{ + struct efivarfs_priv *priv = dev->priv; + struct efivarfs_dir *edir; - edir->current = edir->first; + edir = xzalloc(sizeof(*edir)); + edir->current = priv->inodes.next; return &edir->dir; } static struct dirent *efivarfs_readdir(struct device_d *dev, DIR *dir) { + struct efivarfs_priv *priv = dev->priv; struct efivarfs_dir *edir = container_of(dir, struct efivarfs_dir, dir); + struct efivarfs_inode *inode; - if (!edir->current) + if (edir->current == &priv->inodes) return NULL; - strcpy(dir->d.d_name, edir->current->name); + inode = list_entry(edir->current, struct efivarfs_inode, node); + + strcpy(dir->d.d_name, inode->full_name); edir->current = edir->current->next; @@ -264,17 +337,6 @@ static struct dirent *efivarfs_readdir(struct device_d *dev, DIR *dir) static int efivarfs_closedir(struct device_d *dev, DIR *dir) { struct efivarfs_dir *edir = container_of(dir, struct efivarfs_dir, dir); - struct efivarfs_dir_entry *entry; - - entry = edir->first; - - while (entry) { - struct efivarfs_dir_entry *tmp; - free(entry->name); - tmp = entry->next; - free(entry); - entry = tmp; - } free(edir); @@ -308,18 +370,64 @@ static int efivarfs_stat(struct device_d *dev, const char *filename, struct stat static int efivarfs_probe(struct device_d *dev) { + efi_status_t efiret; + efi_guid_t vendor; + s16 name[1024]; + char *name8; + unsigned long size; + struct efivarfs_priv *priv; + + name[0] = 0; + + priv = xzalloc(sizeof(*priv)); + INIT_LIST_HEAD(&priv->inodes); + + while (1) { + struct efivarfs_inode *inode; + + size = sizeof(name); + efiret = RT->get_next_variable(&size, name, &vendor); + if (EFI_ERROR(efiret)) + break; + + inode = xzalloc(sizeof(*inode)); + inode->name = strdup_wchar(name); + + inode->vendor = vendor; + + name8 = strdup_wchar_to_char(inode->name); + inode->full_name = asprintf("%s-%pUl", name8, &vendor); + free(name8); + + list_add_tail(&inode->node, &priv->inodes); + } + + dev->priv = priv; + return 0; } static void efivarfs_remove(struct device_d *dev) { - free(dev->priv); + struct efivarfs_priv *priv = dev->priv; + struct efivarfs_inode *inode, *tmp; + + list_for_each_entry_safe(inode, tmp, &priv->inodes, node) { + free(inode->name); + free(inode); + } + + free(priv); } static struct fs_driver_d efivarfs_driver = { + .create = efivars_create, + .unlink = efivars_unlink, .open = efivarfs_open, .close = efivarfs_close, .read = efivarfs_read, + .write = efivarfs_write, + .truncate = efivarfs_truncate, .lseek = efivarfs_lseek, .opendir = efivarfs_opendir, .readdir = efivarfs_readdir, @@ -33,7 +33,7 @@ #include <linux/stat.h> #include <linux/err.h> #include <kfifo.h> -#include <sizes.h> +#include <linux/sizes.h> #include <byteorder.h> #include "parseopt.h" @@ -31,7 +31,7 @@ #include <linux/stat.h> #include <linux/err.h> #include <kfifo.h> -#include <sizes.h> +#include <linux/sizes.h> #define TFTP_PORT 69 /* Well known TFTP port number */ diff --git a/images/.gitignore b/images/.gitignore index d27e71a0c8..c5377d9f65 100644 --- a/images/.gitignore +++ b/images/.gitignore @@ -16,6 +16,8 @@ *.t124img.cfg *.mlo *.mlospi +*.mxsbs +*.mxssd pbl.lds barebox.x barebox.z diff --git a/images/Makefile b/images/Makefile index c55cbdc1fb..7c3aaf7627 100644 --- a/images/Makefile +++ b/images/Makefile @@ -103,6 +103,7 @@ include $(srctree)/images/Makefile.mvebu include $(srctree)/images/Makefile.rockchip include $(srctree)/images/Makefile.socfpga include $(srctree)/images/Makefile.tegra +include $(srctree)/images/Makefile.mxs targets += $(image-y) pbl.lds barebox.x barebox.z targets += $(patsubst %,%.pblx,$(pblx-y)) @@ -119,5 +120,5 @@ images: $(addprefix $(obj)/, $(image-y)) FORCE clean-files := *.pbl *.pblb *.pblx *.map start_*.imximg *.img barebox.z start_*.kwbimg \ start_*.kwbuartimg *.socfpgaimg *.mlo *.t20img *.t20img.cfg *.t30img \ - *.t30img.cfg *.t124img *.t124img.cfg *.mlospi *.mlo + *.t30img.cfg *.t124img *.t124img.cfg *.mlospi *.mlo *.mxsbs *.mxssd clean-files += pbl.lds diff --git a/images/Makefile.mxs b/images/Makefile.mxs new file mode 100644 index 0000000000..abff255c3d --- /dev/null +++ b/images/Makefile.mxs @@ -0,0 +1,43 @@ +# +# barebox image generation Makefile for MXS images +# + +# %.mxsbs - convert into MXS BootStream image +# ---------------------------------------------------------------- +quiet_cmd_mxs_bootstream = MXS-BOOTSTREAM $@ + cmd_mxs_bootstream = $(objtree)/scripts/mxsimage -c $(CFG_$(@F)) -b $< -o $@ -p $(word 2,$^) + +$(obj)/%.mxsbs: $(obj)/%.pblx $(obj)/prep_%.pblb FORCE + $(call if_changed,mxs_bootstream) + +# %.mxssd - convert into MXS SD card image +# ---------------------------------------------------------------- +quiet_cmd_mxs_sd = MXS-SD $@ + cmd_mxs_sd = $(objtree)/scripts/mxsboot sd $< $@ + +$(obj)/%.mxssd: $(obj)/% + $(call if_changed,mxs_sd) + +board = $(srctree)/arch/$(ARCH)/boards +mxs23cfg = $(srctree)/arch/arm/mach-mxs/mxs23img.cfg +mxs28cfg = $(srctree)/arch/arm/mach-mxs/mxs28img.cfg + +pblx-$(CONFIG_MACH_TX28) += start_barebox_karo_tx28 prep_start_barebox_karo_tx28 +PREP_start_barebox_karo_tx28.pblx.mxsbs = start_barebox_karo_tx28_prep +CFG_start_barebox_karo_tx28.mxsbs = $(mxs28cfg) +FILE_barebox-karo-tx28-bootstream.img = start_barebox_karo_tx28.mxsbs +image-$(CONFIG_MACH_TX28) += barebox-karo-tx28-bootstream.img +FILE_barebox-karo-tx28-sd.img = start_barebox_karo_tx28.mxsbs.mxssd +image-$(CONFIG_MACH_TX28) += barebox-karo-tx28-sd.img +FILE_barebox-karo-tx28-2nd.img = start_barebox_karo_tx28.pblx +image-$(CONFIG_MACH_TX28) += barebox-karo-tx28-2nd.img + +pblx-$(CONFIG_MACH_IMX233_OLINUXINO) += start_barebox_olinuxino_imx23 prep_start_barebox_olinuxino_imx23 +PREP_start_barebox_olinuxino_imx23.pblx.mxsbs = start_barebox_olinuxino_imx23_prep; +CFG_start_barebox_olinuxino_imx23.mxsbs = $(mxs23cfg) +FILE_barebox-olinuxino-imx23-bootstream.img = start_barebox_olinuxino_imx23.mxsbs +image-$(CONFIG_MACH_IMX233_OLINUXINO) += barebox-olinuxino-imx23-bootstream.img +FILE_barebox-olinuxino-imx23-sd.img = start_barebox_olinuxino_imx23.mxsbs.mxssd +image-$(CONFIG_MACH_IMX233_OLINUXINO) += barebox-olinuxino-imx23-sd.img +FILE_barebox-olinuxino-imx23-2nd.img = start_barebox_olinuxino_imx23.pblx +image-$(CONFIG_MACH_IMX233_OLINUXINO) += barebox-olinuxino-imx23-2nd.img diff --git a/include/console.h b/include/console.h index 97a406d9c9..beafb4d778 100644 --- a/include/console.h +++ b/include/console.h @@ -44,6 +44,7 @@ struct console_device { int (*setbrg)(struct console_device *cdev, int baudrate); void (*flush)(struct console_device *cdev); int (*set_mode)(struct console_device *cdev, enum console_mode mode); + int (*set_active)(struct console_device *cdev, unsigned active); char *devname; diff --git a/include/driver.h b/include/driver.h index 53e1000067..46aae4f433 100644 --- a/include/driver.h +++ b/include/driver.h @@ -206,6 +206,14 @@ void *dev_get_mem_region(struct device_d *dev, int num); */ void __iomem *dev_request_mem_region(struct device_d *dev, int num); +/* + * exlusively request register base 'num' for a device + * will return NULL on error + * only used on platform like at91 where the Ressource address collision with + * PTR errno + */ +void __iomem *dev_request_mem_region_err_null(struct device_d *dev, int num); + struct device_d *device_alloc(const char *devname, int id); int device_add_resources(struct device_d *dev, const struct resource *res, int num); diff --git a/include/efi.h b/include/efi.h index 4ad9f69237..9b4f16bd9f 100644 --- a/include/efi.h +++ b/include/efi.h @@ -255,9 +255,11 @@ extern efi_boot_services_t *BS; /* * Types and defines for EFI ResetSystem */ -#define EFI_RESET_COLD 0 -#define EFI_RESET_WARM 1 -#define EFI_RESET_SHUTDOWN 2 +typedef enum { + EFI_RESET_COLD = 0, + EFI_RESET_WARM = 1, + EFI_RESET_SHUTDOWN = 2 +} efi_reset_type_t; /* * EFI Runtime Services table @@ -277,9 +279,11 @@ typedef struct { u32 *Attributes, unsigned long *data_size, void *data); efi_status_t (EFIAPI *get_next_variable)(unsigned long *variable_name_size, s16 *variable_name, efi_guid_t *vendor); - void *set_variable; + efi_status_t (EFIAPI *set_variable)(s16 *variable_name, efi_guid_t *vendor, + u32 Attributes, unsigned long data_size, void *data); void *get_next_high_mono_count; - void *reset_system; + void (EFIAPI *reset_system)(efi_reset_type_t reset_type, efi_status_t reset_status, + unsigned long data_size, void *reset_data); void *update_capsule; void *query_capsule_caps; void *query_variable_info; @@ -465,6 +469,10 @@ extern efi_runtime_services_t *RT; #define EFI_VLANCONFIGDXE_INF_GUID \ EFI_GUID(0xe4f61863, 0xfe2c, 0x4b56, 0xa8, 0xf4, 0x08, 0x51, 0x9b, 0xc4, 0x39, 0xdf) +/* barebox specific GUIDs */ +#define EFI_BAREBOX_VENDOR_GUID \ + EFI_GUID(0x5b91f69c, 0x8b88, 0x4a2b, 0x92, 0x69, 0x5f, 0x1d, 0x80, 0x2b, 0x51, 0x75) + extern efi_guid_t efi_file_info_id; extern efi_guid_t efi_simple_file_system_protocol_guid; extern efi_guid_t efi_device_path_protocol_guid; @@ -615,6 +623,7 @@ static inline int efi_compare_guid(efi_guid_t *a, efi_guid_t *b) } char *device_path_to_str(struct efi_device_path *dev_path); +u8 device_path_to_type(struct efi_device_path *dev_path); const char *efi_guid_string(efi_guid_t *g); diff --git a/include/linux/amba/sp804.h b/include/linux/amba/sp804.h index aba550c374..8ec58f6c18 100644 --- a/include/linux/amba/sp804.h +++ b/include/linux/amba/sp804.h @@ -8,7 +8,7 @@ #define __AMBA_SP804_H__ #include <linux/amba/bus.h> -#include <sizes.h> +#include <linux/sizes.h> #define AMBA_ARM_SP804_ID 0x00141804 #define AMBA_ARM_SP804_ID_MASK 0x00ffffff diff --git a/include/sizes.h b/include/linux/sizes.h index 6f91e9b4bd..ce3e8150c1 100644 --- a/include/sizes.h +++ b/include/linux/sizes.h @@ -1,22 +1,13 @@ /* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * include/linux/sizes.h * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -/* Size defintions - * Copyright (C) ARM Limited 1998. All rights reserved. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. */ +#ifndef __LINUX_SIZES_H__ +#define __LINUX_SIZES_H__ -#ifndef __sizes_h -#define __sizes_h 1 - -/* handy sizes */ #define SZ_1 0x00000001 #define SZ_2 0x00000002 #define SZ_4 0x00000004 @@ -53,4 +44,4 @@ #define SZ_1G 0x40000000 #define SZ_2G 0x80000000 -#endif /* __sizes_h */ +#endif /* __LINUX_SIZES_H__ */ diff --git a/include/wchar.h b/include/wchar.h index 80dcd81bf4..702d8e239a 100644 --- a/include/wchar.h +++ b/include/wchar.h @@ -5,6 +5,8 @@ typedef u16 wchar_t; +wchar_t *strdup_wchar(const wchar_t *src); + char *strcpy_wchar_to_char(char *dst, const wchar_t *src); wchar_t *strcpy_char_to_wchar(wchar_t *dst, const char *src); diff --git a/lib/bootstrap/devfs.c b/lib/bootstrap/devfs.c index 25d07c761c..704680a4c9 100644 --- a/lib/bootstrap/devfs.c +++ b/lib/bootstrap/devfs.c @@ -12,7 +12,7 @@ #include <linux/mtd/mtd.h> #include <fcntl.h> #include <filetype.h> -#include <sizes.h> +#include <linux/sizes.h> #include <errno.h> #include <malloc.h> #include <bootstrap.h> diff --git a/lib/bootstrap/disk.c b/lib/bootstrap/disk.c index 1e9fbd834b..ebf9ee5a98 100644 --- a/lib/bootstrap/disk.c +++ b/lib/bootstrap/disk.c @@ -8,7 +8,7 @@ #include <common.h> #include <fs.h> #include <fcntl.h> -#include <sizes.h> +#include <linux/sizes.h> #include <errno.h> #include <malloc.h> #include <libfile.h> diff --git a/lib/gui/graphic_utils.c b/lib/gui/graphic_utils.c index 300c525b0e..6465f8e3e9 100644 --- a/lib/gui/graphic_utils.c +++ b/lib/gui/graphic_utils.c @@ -104,7 +104,7 @@ void set_pixel(struct fb_info *info, void *adr, u32 px) case 8: break; case 16: - *(u16 *)adr = px; + *(u16 *)adr = px & 0xffff; break; case 32: *(u32 *)adr = px; diff --git a/lib/wchar.c b/lib/wchar.c index 6368a01994..b2e9e7545b 100644 --- a/lib/wchar.c +++ b/lib/wchar.c @@ -31,6 +31,22 @@ size_t wcslen(const wchar_t *s) return len; } +wchar_t *strdup_wchar(const wchar_t *src) +{ + int len = wcslen(src); + wchar_t *tmp, *dst; + + if (!(dst = malloc((len + 1) * sizeof(wchar_t)))) + return NULL; + + tmp = dst; + + while ((*dst++ = *src++)) + /* nothing */; + + return tmp; +} + char *strcpy_wchar_to_char(char *dst, const wchar_t *src) { char *ret = dst; diff --git a/net/netconsole.c b/net/netconsole.c index c817107296..99b998408c 100644 --- a/net/netconsole.c +++ b/net/netconsole.c @@ -52,24 +52,6 @@ static void nc_handler(void *ctx, char *pkt, unsigned len) kfifo_put(priv->fifo, packet, net_eth_to_udplen(pkt)); } -static int nc_init(void) -{ - struct nc_priv *priv = g_priv; - - if (priv->con) - net_unregister(priv->con); - - priv->con = net_udp_new(priv->ip, priv->port, nc_handler, NULL); - if (IS_ERR(priv->con)) { - int ret = PTR_ERR(priv->con); - priv->con = NULL; - return ret; - } - - net_udp_bind(priv->con, priv->port); - return 0; -} - static int nc_getc(struct console_device *cdev) { struct nc_priv *priv = container_of(cdev, @@ -123,9 +105,39 @@ static void nc_putc(struct console_device *cdev, char c) priv->busy = 0; } -static int nc_port_set(struct param_d *p, void *_priv) +static int nc_set_active(struct console_device *cdev, unsigned flags) { - nc_init(); + struct nc_priv *priv = container_of(cdev, + struct nc_priv, cdev); + + if (priv->con) { + net_unregister(priv->con); + priv->con = NULL; + } + + if (!flags) + return 0; + + if (!priv->port) { + pr_err("port not set\n"); + return -EINVAL; + } + + if (!priv->ip) { + pr_err("ip not set\n"); + return -EINVAL; + } + + priv->con = net_udp_new(priv->ip, priv->port, nc_handler, NULL); + if (IS_ERR(priv->con)) { + int ret = PTR_ERR(priv->con); + priv->con = NULL; + return ret; + } + + net_udp_bind(priv->con, priv->port); + + pr_info("netconsole initialized with %s:%d\n", ip_to_string(priv->ip), priv->port); return 0; } @@ -142,6 +154,7 @@ static int netconsole_init(void) cdev->putc = nc_putc; cdev->getc = nc_getc; cdev->devname = "netconsole"; + cdev->set_active = nc_set_active; g_priv = priv; @@ -157,7 +170,7 @@ static int netconsole_init(void) priv->port = 6666; dev_add_param_ip(&cdev->class_dev, "ip", NULL, NULL, &priv->ip, NULL); - dev_add_param_int(&cdev->class_dev, "port", nc_port_set, NULL, &priv->port, "%u", NULL); + dev_add_param_int(&cdev->class_dev, "port", NULL, NULL, &priv->port, "%u", NULL); pr_info("registered as %s%d\n", cdev->class_dev.name, cdev->class_dev.id); diff --git a/scripts/.gitignore b/scripts/.gitignore index b574b22fb1..6203589fe3 100644 --- a/scripts/.gitignore +++ b/scripts/.gitignore @@ -22,3 +22,5 @@ bareboximd-target bareboxstate bareboxstate-target mk-am35xx-spi-image +mxsimage +mxsboot diff --git a/scripts/Makefile b/scripts/Makefile index 5483a64245..74c22136db 100644 --- a/scripts/Makefile +++ b/scripts/Makefile @@ -19,6 +19,11 @@ hostprogs-$(CONFIG_ARCH_S5PCxx) += s5p_cksum hostprogs-$(CONFIG_ARCH_DAVINCI) += mkublheader hostprogs-$(CONFIG_ARCH_ZYNQ) += zynq_mkimage hostprogs-$(CONFIG_ARCH_SOCFPGA) += socfpga_mkimage +hostprogs-$(CONFIG_ARCH_MXS) += mxsimage mxsboot +HOSTLOADLIBES_mxsimage = `pkg-config --libs openssl` +HOSTCFLAGS_mxs-usb-loader.o = `pkg-config --cflags libusb-1.0` +HOSTLOADLIBES_mxs-usb-loader = `pkg-config --libs libusb-1.0` +hostprogs-$(CONFIG_ARCH_MXS_USBLOADER) += mxs-usb-loader subdir-y += mod subdir-$(CONFIG_OMAP4_USBBOOT) += omap4_usbboot diff --git a/scripts/mxs-usb-loader.c b/scripts/mxs-usb-loader.c new file mode 100644 index 0000000000..8529274d6e --- /dev/null +++ b/scripts/mxs-usb-loader.c @@ -0,0 +1,236 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2010 Amaury Pouly + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <libusb.h> +#include <stdint.h> + +#ifndef MIN +#define MIN(a,b) ((a) < (b) ? (a) : (b)) +#endif + +void put32le(uint8_t * buf, uint32_t i) +{ + *buf++ = i & 0xff; + *buf++ = (i >> 8) & 0xff; + *buf++ = (i >> 16) & 0xff; + *buf++ = (i >> 24) & 0xff; +} + +void put32be(uint8_t * buf, uint32_t i) +{ + *buf++ = (i >> 24) & 0xff; + *buf++ = (i >> 16) & 0xff; + *buf++ = (i >> 8) & 0xff; + *buf++ = i & 0xff; +} + +enum dev_type_t { + HID_DEVICE, + RECOVERY_DEVICE, +}; + +struct dev_info_t { + uint16_t vendor_id; + uint16_t product_id; + unsigned xfer_size; + enum dev_type_t dev_type; +}; + +struct dev_info_t g_dev_info[] = { + {0x066f, 0x3780, 1024, HID_DEVICE}, /* i.MX233 / STMP3780 */ + {0x066f, 0x3770, 48, HID_DEVICE}, /* STMP3770 */ + {0x15A2, 0x004F, 1024, HID_DEVICE}, /* i.MX28 */ + {0x066f, 0x3600, 4096, RECOVERY_DEVICE}, /* STMP36xx */ +}; + +int send_hid(libusb_device_handle * dev, int xfer_size, uint8_t * data, + int size, int nr_xfers) +{ + int i; + + libusb_detach_kernel_driver(dev, 0); + libusb_detach_kernel_driver(dev, 4); + + libusb_claim_interface(dev, 0); + libusb_claim_interface(dev, 4); + + uint8_t *xfer_buf = malloc(1 + xfer_size); + uint8_t *p = xfer_buf; + + *p++ = 0x01; /* Report id */ + + /* Command block wrapper */ + *p++ = 'B'; /* Signature */ + *p++ = 'L'; + *p++ = 'T'; + *p++ = 'C'; + put32le(p, 0x1); /* Tag */ + p += 4; + put32le(p, size); /* Payload size */ + p += 4; + *p++ = 0; /* Flags (host to device) */ + p += 2; /* Reserved */ + + /* Command descriptor block */ + *p++ = 0x02; /* Firmware download */ + put32be(p, size); /* Download size */ + + int ret = libusb_control_transfer(dev, + LIBUSB_REQUEST_TYPE_CLASS | + LIBUSB_RECIPIENT_INTERFACE, 0x9, + 0x201, 0, + xfer_buf, xfer_size + 1, 1000); + if (ret < 0) { + printf("transfer error at init step\n"); + return 1; + } + + for (i = 0; i < nr_xfers; i++) { + xfer_buf[0] = 0x2; + memcpy(&xfer_buf[1], &data[i * xfer_size], xfer_size); + + ret = libusb_control_transfer(dev, + LIBUSB_REQUEST_TYPE_CLASS | + LIBUSB_RECIPIENT_INTERFACE, 0x9, + 0x202, 0, xfer_buf, xfer_size + 1, + 1000); + if (ret < 0) { + printf("transfer error at send step %d\n", i); + return 1; + } + } + + int recv_size; + ret = + libusb_interrupt_transfer(dev, 0x81, xfer_buf, xfer_size, + &recv_size, 1000); + if (ret < 0) { + printf("transfer error at final stage\n"); + return 1; + } + + return ret; +} + +int send_recovery(libusb_device_handle * dev, int xfer_size, uint8_t * data, + int size, int nr_xfers) +{ + (void)nr_xfers; + // there should be no kernel driver attached but in doubt... + libusb_detach_kernel_driver(dev, 0); + libusb_claim_interface(dev, 0); + + int sent = 0; + while (sent < size) { + int xfered; + int len = MIN(size - sent, xfer_size); + int ret = + libusb_bulk_transfer(dev, 1, data + sent, len, &xfered, + 1000); + if (ret < 0) { + printf("transfer error at send offset %d\n", sent); + return 1; + } + if (xfered == 0) { + printf("empty transfer at step offset %d\n", sent); + return 2; + } + sent += xfered; + } + return 0; +} + +int main(int argc, char **argv) +{ + if (argc != 3) { + printf("usage: %s <xfer size> <file>\n", argv[0]); + printf + ("If <xfer size> is set to zero, the preferred one is used.\n"); + return 1; + } + + char *end; + int xfer_size = strtol(argv[1], &end, 0); + if (end != (argv[1] + strlen(argv[1]))) { + printf("Invalid transfer size !\n"); + return 1; + } + + libusb_device_handle *dev; + + libusb_init(NULL); + + libusb_set_debug(NULL, 3); + + unsigned i; + for (i = 0; i < sizeof(g_dev_info) / sizeof(g_dev_info[0]); i++) { + dev = libusb_open_device_with_vid_pid(NULL, + g_dev_info[i].vendor_id, + g_dev_info[i].product_id); + if (dev == NULL) + continue; + if (xfer_size == 0) + xfer_size = g_dev_info[i].xfer_size; + printf("Found a match for %04x:%04x\n", + g_dev_info[i].vendor_id, g_dev_info[i].product_id); + break; + } + if (dev == NULL) { + printf("Cannot open device\n"); + return 1; + } + + FILE *f = fopen(argv[2], "r"); + if (f == NULL) { + perror("cannot open file"); + return 1; + } + fseek(f, 0, SEEK_END); + size_t size = ftell(f); + fseek(f, 0, SEEK_SET); + + printf("Transfer size: %d\n", xfer_size); + int nr_xfers = (size + xfer_size - 1) / xfer_size; + uint8_t *file_buf = malloc(nr_xfers * xfer_size); + memset(file_buf, 0xff, nr_xfers * xfer_size); // pad with 0xff + if (fread(file_buf, size, 1, f) != 1) { + perror("read error"); + fclose(f); + return 1; + } + fclose(f); + + switch (g_dev_info[i].dev_type) { + case HID_DEVICE: + send_hid(dev, xfer_size, file_buf, size, nr_xfers); + break; + case RECOVERY_DEVICE: + send_recovery(dev, xfer_size, file_buf, size, nr_xfers); + break; + default: + printf("unknown device type\n"); + break; + } + + return 0; +} diff --git a/scripts/mxsboot.c b/scripts/mxsboot.c new file mode 100644 index 0000000000..2b90b2561d --- /dev/null +++ b/scripts/mxsboot.c @@ -0,0 +1,641 @@ +/* + * Freescale i.MX28 image generator + * + * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> + * on behalf of DENX Software Engineering GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <fcntl.h> +#include <sys/stat.h> +#include <sys/types.h> +#include <unistd.h> +#include <getopt.h> + +#include "compiler.h" + +/* + * Default BCB layout. + * + * TWEAK this if you have blown any OCOTP fuses. + */ +#define STRIDE_PAGES 64 +#define STRIDE_COUNT 4 + +/* + * Layout for 256Mb big NAND with 2048b page size, 64b OOB size and + * 128kb erase size. + * + * TWEAK this if you have different kind of NAND chip. + */ +static uint32_t nand_writesize = 2048; +static uint32_t nand_oobsize = 64; +static uint32_t nand_erasesize = 128 * 1024; + +/* + * Sector on which the SigmaTel boot partition (0x53) starts. + */ +static uint32_t sd_sector = 2048; + +/* + * Each of the U-Boot bootstreams is at maximum 1MB big. + * + * TWEAK this if, for some wild reason, you need to boot bigger image. + */ +#define MAX_BOOTSTREAM_SIZE (1 * 1024 * 1024) + +/* i.MX28 NAND controller-specific constants. DO NOT TWEAK! */ +#define MXS_NAND_DMA_DESCRIPTOR_COUNT 4 +#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE 512 +#define MXS_NAND_METADATA_SIZE 10 +#define MXS_NAND_COMMAND_BUFFER_SIZE 32 + +struct mx28_nand_fcb { + uint32_t checksum; + uint32_t fingerprint; + uint32_t version; + struct { + uint8_t data_setup; + uint8_t data_hold; + uint8_t address_setup; + uint8_t dsample_time; + uint8_t nand_timing_state; + uint8_t rea; + uint8_t rloh; + uint8_t rhoh; + } timing; + uint32_t page_data_size; + uint32_t total_page_size; + uint32_t sectors_per_block; + uint32_t number_of_nands; /* Ignored */ + uint32_t total_internal_die; /* Ignored */ + uint32_t cell_type; /* Ignored */ + uint32_t ecc_block_n_ecc_type; + uint32_t ecc_block_0_size; + uint32_t ecc_block_n_size; + uint32_t ecc_block_0_ecc_type; + uint32_t metadata_bytes; + uint32_t num_ecc_blocks_per_page; + uint32_t ecc_block_n_ecc_level_sdk; /* Ignored */ + uint32_t ecc_block_0_size_sdk; /* Ignored */ + uint32_t ecc_block_n_size_sdk; /* Ignored */ + uint32_t ecc_block_0_ecc_level_sdk; /* Ignored */ + uint32_t num_ecc_blocks_per_page_sdk; /* Ignored */ + uint32_t metadata_bytes_sdk; /* Ignored */ + uint32_t erase_threshold; + uint32_t boot_patch; + uint32_t patch_sectors; + uint32_t firmware1_starting_sector; + uint32_t firmware2_starting_sector; + uint32_t sectors_in_firmware1; + uint32_t sectors_in_firmware2; + uint32_t dbbt_search_area_start_address; + uint32_t badblock_marker_byte; + uint32_t badblock_marker_start_bit; + uint32_t bb_marker_physical_offset; +}; + +struct mx28_nand_dbbt { + uint32_t checksum; + uint32_t fingerprint; + uint32_t version; + uint32_t number_bb; + uint32_t number_2k_pages_bb; +}; + +struct mx28_nand_bbt { + uint32_t nand; + uint32_t number_bb; + uint32_t badblock[510]; +}; + +struct mx28_sd_drive_info { + uint32_t chip_num; + uint32_t drive_type; + uint32_t tag; + uint32_t first_sector_number; + uint32_t sector_count; +}; + +struct mx28_sd_config_block { + uint32_t signature; + uint32_t primary_boot_tag; + uint32_t secondary_boot_tag; + uint32_t num_copies; + struct mx28_sd_drive_info drv_info[1]; +}; + +static inline uint32_t mx28_nand_ecc_size_in_bits(uint32_t ecc_strength) +{ + return ecc_strength * 13; +} + +static inline uint32_t mx28_nand_get_ecc_strength(uint32_t page_data_size, + uint32_t page_oob_size) +{ + if (page_data_size == 2048) + return 8; + + if (page_data_size == 4096) { + if (page_oob_size == 128) + return 8; + + if (page_oob_size == 218) + return 16; + } + + return 0; +} + +static inline uint32_t mx28_nand_get_mark_offset(uint32_t page_data_size, + uint32_t ecc_strength) +{ + uint32_t chunk_data_size_in_bits; + uint32_t chunk_ecc_size_in_bits; + uint32_t chunk_total_size_in_bits; + uint32_t block_mark_chunk_number; + uint32_t block_mark_chunk_bit_offset; + uint32_t block_mark_bit_offset; + + chunk_data_size_in_bits = MXS_NAND_CHUNK_DATA_CHUNK_SIZE * 8; + chunk_ecc_size_in_bits = mx28_nand_ecc_size_in_bits(ecc_strength); + + chunk_total_size_in_bits = + chunk_data_size_in_bits + chunk_ecc_size_in_bits; + + /* Compute the bit offset of the block mark within the physical page. */ + block_mark_bit_offset = page_data_size * 8; + + /* Subtract the metadata bits. */ + block_mark_bit_offset -= MXS_NAND_METADATA_SIZE * 8; + + /* + * Compute the chunk number (starting at zero) in which the block mark + * appears. + */ + block_mark_chunk_number = + block_mark_bit_offset / chunk_total_size_in_bits; + + /* + * Compute the bit offset of the block mark within its chunk, and + * validate it. + */ + block_mark_chunk_bit_offset = block_mark_bit_offset - + (block_mark_chunk_number * chunk_total_size_in_bits); + + if (block_mark_chunk_bit_offset > chunk_data_size_in_bits) + return 1; + + /* + * Now that we know the chunk number in which the block mark appears, + * we can subtract all the ECC bits that appear before it. + */ + block_mark_bit_offset -= + block_mark_chunk_number * chunk_ecc_size_in_bits; + + return block_mark_bit_offset; +} + +static inline uint32_t mx28_nand_mark_byte_offset(void) +{ + uint32_t ecc_strength; + ecc_strength = mx28_nand_get_ecc_strength(nand_writesize, nand_oobsize); + return mx28_nand_get_mark_offset(nand_writesize, ecc_strength) >> 3; +} + +static inline uint32_t mx28_nand_mark_bit_offset(void) +{ + uint32_t ecc_strength; + ecc_strength = mx28_nand_get_ecc_strength(nand_writesize, nand_oobsize); + return mx28_nand_get_mark_offset(nand_writesize, ecc_strength) & 0x7; +} + +static uint32_t mx28_nand_block_csum(uint8_t *block, uint32_t size) +{ + uint32_t csum = 0; + int i; + + for (i = 0; i < size; i++) + csum += block[i]; + + return csum ^ 0xffffffff; +} + +static struct mx28_nand_fcb *mx28_nand_get_fcb(uint32_t size) +{ + struct mx28_nand_fcb *fcb; + uint32_t bcb_size_bytes; + uint32_t stride_size_bytes; + uint32_t bootstream_size_pages; + uint32_t fw1_start_page; + uint32_t fw2_start_page; + + fcb = malloc(nand_writesize); + if (!fcb) { + printf("MX28 NAND: Unable to allocate FCB\n"); + return NULL; + } + + memset(fcb, 0, nand_writesize); + + fcb->fingerprint = 0x20424346; + fcb->version = 0x01000000; + + /* + * FIXME: These here are default values as found in kobs-ng. We should + * probably retrieve the data from NAND or something. + */ + fcb->timing.data_setup = 80; + fcb->timing.data_hold = 60; + fcb->timing.address_setup = 25; + fcb->timing.dsample_time = 6; + + fcb->page_data_size = nand_writesize; + fcb->total_page_size = nand_writesize + nand_oobsize; + fcb->sectors_per_block = nand_erasesize / nand_writesize; + + fcb->num_ecc_blocks_per_page = (nand_writesize / 512) - 1; + fcb->ecc_block_0_size = 512; + fcb->ecc_block_n_size = 512; + fcb->metadata_bytes = 10; + + if (nand_writesize == 2048) { + fcb->ecc_block_n_ecc_type = 4; + fcb->ecc_block_0_ecc_type = 4; + } else if (nand_writesize == 4096) { + if (nand_oobsize == 128) { + fcb->ecc_block_n_ecc_type = 4; + fcb->ecc_block_0_ecc_type = 4; + } else if (nand_oobsize == 218) { + fcb->ecc_block_n_ecc_type = 8; + fcb->ecc_block_0_ecc_type = 8; + } + } + + if (fcb->ecc_block_n_ecc_type == 0) { + printf("MX28 NAND: Unsupported NAND geometry\n"); + goto err; + } + + fcb->boot_patch = 0; + fcb->patch_sectors = 0; + + fcb->badblock_marker_byte = mx28_nand_mark_byte_offset(); + fcb->badblock_marker_start_bit = mx28_nand_mark_bit_offset(); + fcb->bb_marker_physical_offset = nand_writesize; + + stride_size_bytes = STRIDE_PAGES * nand_writesize; + bcb_size_bytes = stride_size_bytes * STRIDE_COUNT; + + bootstream_size_pages = (size + (nand_writesize - 1)) / + nand_writesize; + + fw1_start_page = 2 * bcb_size_bytes / nand_writesize; + fw2_start_page = (2 * bcb_size_bytes + MAX_BOOTSTREAM_SIZE) / + nand_writesize; + + fcb->firmware1_starting_sector = fw1_start_page; + fcb->firmware2_starting_sector = fw2_start_page; + fcb->sectors_in_firmware1 = bootstream_size_pages; + fcb->sectors_in_firmware2 = bootstream_size_pages; + + fcb->dbbt_search_area_start_address = STRIDE_PAGES * STRIDE_COUNT; + + return fcb; + +err: + free(fcb); + return NULL; +} + +static struct mx28_nand_dbbt *mx28_nand_get_dbbt(void) +{ + struct mx28_nand_dbbt *dbbt; + + dbbt = malloc(nand_writesize); + if (!dbbt) { + printf("MX28 NAND: Unable to allocate DBBT\n"); + return NULL; + } + + memset(dbbt, 0, nand_writesize); + + dbbt->fingerprint = 0x54424244; + dbbt->version = 0x1; + + return dbbt; +} + +static inline uint8_t mx28_nand_parity_13_8(const uint8_t b) +{ + uint32_t parity = 0, tmp; + + tmp = ((b >> 6) ^ (b >> 5) ^ (b >> 3) ^ (b >> 2)) & 1; + parity |= tmp << 0; + + tmp = ((b >> 7) ^ (b >> 5) ^ (b >> 4) ^ (b >> 2) ^ (b >> 1)) & 1; + parity |= tmp << 1; + + tmp = ((b >> 7) ^ (b >> 6) ^ (b >> 5) ^ (b >> 1) ^ (b >> 0)) & 1; + parity |= tmp << 2; + + tmp = ((b >> 7) ^ (b >> 4) ^ (b >> 3) ^ (b >> 0)) & 1; + parity |= tmp << 3; + + tmp = ((b >> 6) ^ (b >> 4) ^ (b >> 3) ^ + (b >> 2) ^ (b >> 1) ^ (b >> 0)) & 1; + parity |= tmp << 4; + + return parity; +} + +static uint8_t *mx28_nand_fcb_block(struct mx28_nand_fcb *fcb) +{ + uint8_t *block; + uint8_t *ecc; + int i; + + block = malloc(nand_writesize + nand_oobsize); + if (!block) { + printf("MX28 NAND: Unable to allocate FCB block\n"); + return NULL; + } + + memset(block, 0, nand_writesize + nand_oobsize); + + /* Update the FCB checksum */ + fcb->checksum = mx28_nand_block_csum(((uint8_t *)fcb) + 4, 508); + + /* Figure 12-11. in iMX28RM, rev. 1, says FCB is at offset 12 */ + memcpy(block + 12, fcb, sizeof(struct mx28_nand_fcb)); + + /* ECC is at offset 12 + 512 */ + ecc = block + 12 + 512; + + /* Compute the ECC parity */ + for (i = 0; i < sizeof(struct mx28_nand_fcb); i++) + ecc[i] = mx28_nand_parity_13_8(block[i + 12]); + + return block; +} + +static int mx28_nand_write_fcb(struct mx28_nand_fcb *fcb, uint8_t *buf) +{ + uint32_t offset; + uint8_t *fcbblock; + int ret = 0; + int i; + + fcbblock = mx28_nand_fcb_block(fcb); + if (!fcbblock) + return -1; + + for (i = 0; i < STRIDE_PAGES * STRIDE_COUNT; i += STRIDE_PAGES) { + offset = i * nand_writesize; + memcpy(buf + offset, fcbblock, nand_writesize + nand_oobsize); + /* Mark the NAND page is OK. */ + buf[offset + nand_writesize] = 0xff; + } + + free(fcbblock); + return ret; +} + +static int mx28_nand_write_dbbt(struct mx28_nand_dbbt *dbbt, uint8_t *buf) +{ + uint32_t offset; + int i = STRIDE_PAGES * STRIDE_COUNT; + + for (; i < 2 * STRIDE_PAGES * STRIDE_COUNT; i += STRIDE_PAGES) { + offset = i * nand_writesize; + memcpy(buf + offset, dbbt, sizeof(struct mx28_nand_dbbt)); + } + + return 0; +} + +static int mx28_nand_write_firmware(struct mx28_nand_fcb *fcb, int infd, + uint8_t *buf) +{ + int ret; + off_t size; + uint32_t offset1, offset2; + + size = lseek(infd, 0, SEEK_END); + lseek(infd, 0, SEEK_SET); + + offset1 = fcb->firmware1_starting_sector * nand_writesize; + offset2 = fcb->firmware2_starting_sector * nand_writesize; + + ret = read(infd, buf + offset1, size); + if (ret != size) + return -1; + + memcpy(buf + offset2, buf + offset1, size); + + return 0; +} + +static void usage(void) +{ + printf( + "Usage: mxsboot [ops] <type> <infile> <outfile>\n" + "Augment BootStream file with a proper header for i.MX28 boot\n" + "\n" + " <type> type of image:\n" + " \"nand\" for NAND image\n" + " \"sd\" for SD image\n" + " <infile> input file, the u-boot.sb bootstream\n" + " <outfile> output file, the bootable image\n" + "\n"); + printf( + "For NAND boot, these options are accepted:\n" + " -w <size> NAND page size\n" + " -o <size> NAND OOB size\n" + " -e <size> NAND erase size\n" + "\n" + "For SD boot, these options are accepted:\n" + " -p <sector> Sector where the SGTL partition starts\n" + ); +} + +static int mx28_create_nand_image(int infd, int outfd) +{ + struct mx28_nand_fcb *fcb; + struct mx28_nand_dbbt *dbbt; + int ret = -1; + uint8_t *buf; + int size; + ssize_t wr_size; + + size = nand_writesize * 512 + 2 * MAX_BOOTSTREAM_SIZE; + + buf = malloc(size); + if (!buf) { + printf("Can not allocate output buffer of %d bytes\n", size); + goto err0; + } + + memset(buf, 0, size); + + fcb = mx28_nand_get_fcb(MAX_BOOTSTREAM_SIZE); + if (!fcb) { + printf("Unable to compile FCB\n"); + goto err1; + } + + dbbt = mx28_nand_get_dbbt(); + if (!dbbt) { + printf("Unable to compile DBBT\n"); + goto err2; + } + + ret = mx28_nand_write_fcb(fcb, buf); + if (ret) { + printf("Unable to write FCB to buffer\n"); + goto err3; + } + + ret = mx28_nand_write_dbbt(dbbt, buf); + if (ret) { + printf("Unable to write DBBT to buffer\n"); + goto err3; + } + + ret = mx28_nand_write_firmware(fcb, infd, buf); + if (ret) { + printf("Unable to write firmware to buffer\n"); + goto err3; + } + + wr_size = write(outfd, buf, size); + if (wr_size != size) { + ret = -1; + goto err3; + } + + ret = 0; + +err3: + free(dbbt); +err2: + free(fcb); +err1: + free(buf); +err0: + return ret; +} + +static int mx28_create_sd_image(int infd, int outfd) +{ + int ret = -1; + uint32_t *buf; + int size; + off_t fsize; + ssize_t wr_size; + struct mx28_sd_config_block *cb; + + fsize = lseek(infd, 0, SEEK_END); + lseek(infd, 0, SEEK_SET); + size = fsize + 4 * 512; + + buf = malloc(size); + if (!buf) { + printf("Can not allocate output buffer of %d bytes\n", size); + goto err0; + } + + ret = read(infd, (uint8_t *)buf + 4 * 512, fsize); + if (ret != fsize) { + ret = -1; + goto err1; + } + + cb = (struct mx28_sd_config_block *)buf; + + cb->signature = 0x00112233; + cb->primary_boot_tag = 0x1; + cb->secondary_boot_tag = 0x1; + cb->num_copies = 1; + cb->drv_info[0].chip_num = 0x0; + cb->drv_info[0].drive_type = 0x0; + cb->drv_info[0].tag = 0x1; + cb->drv_info[0].first_sector_number = sd_sector + 4; + cb->drv_info[0].sector_count = (size - 4) / 512; + + wr_size = write(outfd, buf, size); + if (wr_size != size) { + ret = -1; + goto err1; + } + + ret = 0; + +err1: + free(buf); +err0: + return ret; +} + +int main(int argc, char **argv) +{ + int infd, outfd; + int ret = 0; + int opt; + int sdimage = 0; + + while ((opt = getopt(argc, argv, "w:o:e:p:")) != -1) { + switch (opt) { + case 'w': + nand_writesize = strtoul(optarg, NULL, 0); + break; + case 'o': + nand_oobsize = strtoul(optarg, NULL, 0); + break; + case 'e': + nand_erasesize = strtoul(optarg, NULL, 0); + break; + case 'p': + sd_sector = strtoul(optarg, NULL, 0); + break; + } + } + + if (argc - optind < 3) { + usage(); + ret = 1; + goto err1; + } + + if (!strcmp(argv[optind], "sd")) + sdimage = 1; + else if (strcmp(argv[optind], "nand")) + return -1; + + infd = open(argv[optind + 1], O_RDONLY); + if (infd < 0) { + printf("Input BootStream file can not be opened\n"); + ret = 2; + goto err1; + } + + outfd = open(argv[optind + 2], O_CREAT | O_TRUNC | O_WRONLY, + S_IRUSR | S_IWUSR); + if (outfd < 0) { + printf("Output file can not be created\n"); + ret = 3; + goto err2; + } + + if (sdimage) + ret = mx28_create_sd_image(infd, outfd); + else + ret = mx28_create_nand_image(infd, outfd); + + close(outfd); +err2: + close(infd); +err1: + return ret; +} diff --git a/scripts/mxsimage.c b/scripts/mxsimage.c new file mode 100644 index 0000000000..0a5f6a05ef --- /dev/null +++ b/scripts/mxsimage.c @@ -0,0 +1,2561 @@ +/* + * Freescale i.MX23/i.MX28 SB image generator + * + * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <errno.h> +#include <fcntl.h> +#include <stdio.h> +#include <string.h> +#include <unistd.h> +#include <limits.h> +#include <openssl/evp.h> +#include <getopt.h> +#include <stdint.h> +#include <arpa/inet.h> + +#define SB_BLOCK_SIZE 16 + +#define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) +#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) + +static char *prepfile; +static char *bootloaderfile; + +struct sb_boot_image_version { + uint16_t major; + uint16_t pad0; + uint16_t minor; + uint16_t pad1; + uint16_t revision; + uint16_t pad2; +}; + +struct sb_boot_image_header { + union { + /* SHA1 of the header. */ + uint8_t digest[20]; + struct { + /* CBC-MAC initialization vector. */ + uint8_t iv[16]; + uint8_t extra[4]; + }; + }; + /* 'STMP' */ + uint8_t signature1[4]; + /* Major version of the image format. */ + uint8_t major_version; + /* Minor version of the image format. */ + uint8_t minor_version; + /* Flags associated with the image. */ + uint16_t flags; + /* Size of the image in 16b blocks. */ + uint32_t image_blocks; + /* Offset of the first tag in 16b blocks. */ + uint32_t first_boot_tag_block; + /* ID of the section to boot from. */ + uint32_t first_boot_section_id; + /* Amount of crypto keys. */ + uint16_t key_count; + /* Offset to the key dictionary in 16b blocks. */ + uint16_t key_dictionary_block; + /* Size of this header in 16b blocks. */ + uint16_t header_blocks; + /* Amount of section headers. */ + uint16_t section_count; + /* Section header size in 16b blocks. */ + uint16_t section_header_size; + /* Padding to align timestamp to uint64_t. */ + uint8_t padding0[2]; + /* 'sgtl' (since v1.1) */ + uint8_t signature2[4]; + /* Image generation date, in microseconds since 1.1.2000 . */ + uint64_t timestamp_us; + /* Product version. */ + struct sb_boot_image_version + product_version; + /* Component version. */ + struct sb_boot_image_version + component_version; + /* Drive tag for the system drive. (since v1.1) */ + uint16_t drive_tag; + /* Padding. */ + uint8_t padding1[6]; +}; + +#define SB_VERSION_MAJOR 1 +#define SB_VERSION_MINOR 1 + +/* Enable to HTLLC verbose boot report. */ +#define SB_IMAGE_FLAG_VERBOSE (1 << 0) + +struct sb_key_dictionary_key { + /* The CBC-MAC of image and sections header. */ + uint8_t cbc_mac[SB_BLOCK_SIZE]; + /* The AES key encrypted by image key (zero). */ + uint8_t key[SB_BLOCK_SIZE]; +}; + +struct sb_ivt_header { + uint32_t header; + uint32_t entry; + uint32_t reserved1; + uint32_t dcd; + uint32_t boot_data; + uint32_t self; + uint32_t csf; + uint32_t reserved2; +}; + +#define SB_HAB_IVT_TAG 0xd1UL +#define SB_HAB_DCD_TAG 0xd2UL + +#define SB_HAB_VERSION 0x40UL + +/* + * The "size" field in the IVT header is not naturally aligned, + * use this macro to fill first 4 bytes of the IVT header without + * causing issues on some systems (esp. M68k, PPC, MIPS-BE, ARM-BE). + */ +static inline uint32_t sb_hab_ivt_header(void) +{ + uint32_t ret = 0; + ret |= SB_HAB_IVT_TAG << 24; + ret |= sizeof(struct sb_ivt_header) << 16; + ret |= SB_HAB_VERSION; + return htonl(ret); +} + +struct sb_sections_header { + /* Section number. */ + uint32_t section_number; + /* Offset of this sections first instruction after "TAG". */ + uint32_t section_offset; + /* Size of the section in 16b blocks. */ + uint32_t section_size; + /* Section flags. */ + uint32_t section_flags; +}; + +#define SB_SECTION_FLAG_BOOTABLE (1 << 0) + +struct sb_command { + struct { + uint8_t checksum; + uint8_t tag; + uint16_t flags; +#define ROM_TAG_CMD_FLAG_ROM_LAST_TAG 0x1 +#define ROM_LOAD_CMD_FLAG_DCD_LOAD 0x1 /* MX28 only */ +#define ROM_JUMP_CMD_FLAG_HAB 0x1 /* MX28 only */ +#define ROM_CALL_CMD_FLAG_HAB 0x1 /* MX28 only */ + } header; + + union { + struct { + uint32_t reserved[3]; + } nop; + struct { + uint32_t section_number; + uint32_t section_length; + uint32_t section_flags; + } tag; + struct { + uint32_t address; + uint32_t count; + uint32_t crc32; + } load; + struct { + uint32_t address; + uint32_t count; + uint32_t pattern; + } fill; + struct { + uint32_t address; + uint32_t reserved; + /* Passed in register r0 before JUMP */ + uint32_t argument; + } jump; + struct { + uint32_t address; + uint32_t reserved; + /* Passed in register r0 before CALL */ + uint32_t argument; + } call; + struct { + uint32_t reserved1; + uint32_t reserved2; + uint32_t mode; + } mode; + + }; +}; + +/* + * Most of the mode names are same or at least similar + * on i.MX23 and i.MX28, but some of the mode names + * differ. The "name" field represents the mode name + * on i.MX28 as seen in Table 12-2 of the datasheet. + * The "altname" field represents the differently named + * fields on i.MX23 as seen in Table 35-3 of the + * datasheet. + */ +static const struct { + const char *name; + const char *altname; + const uint8_t mode; +} modetable[] = { + { "USB", NULL, 0x00 }, + { "I2C", NULL, 0x01 }, + { "SPI2_FLASH", "SPI1_FLASH", 0x02 }, + { "SPI3_FLASH", "SPI2_FLASH", 0x03 }, + { "NAND_BCH", NULL, 0x04 }, + { "JTAG", NULL, 0x06 }, + { "SPI3_EEPROM", "SPI2_EEPROM", 0x08 }, + { "SD_SSP0", NULL, 0x09 }, + { "SD_SSP1", NULL, 0x0A } +}; + +enum sb_tag { + ROM_NOP_CMD = 0x00, + ROM_TAG_CMD = 0x01, + ROM_LOAD_CMD = 0x02, + ROM_FILL_CMD = 0x03, + ROM_JUMP_CMD = 0x04, + ROM_CALL_CMD = 0x05, + ROM_MODE_CMD = 0x06 +}; + +struct sb_source_entry { + uint8_t tag; + uint32_t address; + uint32_t flags; + char *filename; +}; + +/* + * DCD block + * |-Write to address command block + * | 0xf00 == 0xf33d + * | 0xba2 == 0xb33f + * |-ORR address with mask command block + * | 0xf00 |= 0x1337 + * |-Write to address command block + * | 0xba2 == 0xd00d + * : + */ +#define SB_HAB_DCD_WRITE 0xccUL +#define SB_HAB_DCD_CHECK 0xcfUL +#define SB_HAB_DCD_NOOP 0xc0UL +#define SB_HAB_DCD_MASK_BIT (1 << 3) +#define SB_HAB_DCD_SET_BIT (1 << 4) + +/* Addr.n = Value.n */ +#define SB_DCD_WRITE \ + (SB_HAB_DCD_WRITE << 24) +/* Addr.n &= ~Value.n */ +#define SB_DCD_ANDC \ + ((SB_HAB_DCD_WRITE << 24) | SB_HAB_DCD_SET_BIT) +/* Addr.n |= Value.n */ +#define SB_DCD_ORR \ + ((SB_HAB_DCD_WRITE << 24) | SB_HAB_DCD_SET_BIT | SB_HAB_DCD_MASK_BIT) +/* (Addr.n & Value.n) == 0 */ +#define SB_DCD_CHK_EQZ \ + (SB_HAB_DCD_CHECK << 24) +/* (Addr.n & Value.n) == Value.n */ +#define SB_DCD_CHK_EQ \ + ((SB_HAB_DCD_CHECK << 24) | SB_HAB_DCD_SET_BIT) +/* (Addr.n & Value.n) != Value.n */ +#define SB_DCD_CHK_NEQ \ + ((SB_HAB_DCD_CHECK << 24) | SB_HAB_DCD_MASK_BIT) +/* (Addr.n & Value.n) != 0 */ +#define SB_DCD_CHK_NEZ \ + ((SB_HAB_DCD_CHECK << 24) | SB_HAB_DCD_SET_BIT | SB_HAB_DCD_MASK_BIT) +/* NOP */ +#define SB_DCD_NOOP \ + (SB_HAB_DCD_NOOP << 24) + +struct sb_dcd_ctx { + struct sb_dcd_ctx *dcd; + + uint32_t id; + + /* The DCD block. */ + uint32_t *payload; + /* Size of the whole DCD block. */ + uint32_t size; + + /* Pointer to previous DCD command block. */ + uint32_t *prev_dcd_head; +}; + +/* + * IMAGE + * |-SECTION + * | |-CMD + * | |-CMD + * | `-CMD + * |-SECTION + * | |-CMD + * : : + */ +struct sb_cmd_list { + char *cmd; + size_t len; + unsigned int lineno; +}; + +struct sb_cmd_ctx { + uint32_t size; + + struct sb_cmd_ctx *cmd; + + uint8_t *data; + uint32_t length; + + struct sb_command payload; + struct sb_command c_payload; +}; + +struct sb_section_ctx { + uint32_t size; + + /* Section flags */ + unsigned int boot:1; + + struct sb_section_ctx *sect; + + struct sb_cmd_ctx *cmd_head; + struct sb_cmd_ctx *cmd_tail; + + struct sb_sections_header payload; +}; + +struct sb_image_ctx { + unsigned int in_section:1; + unsigned int in_dcd:1; + /* Image configuration */ + unsigned int verbose_boot:1; + unsigned int silent_dump:1; + const char *input_filename; + const char *output_filename; + const char *cfg_filename; + uint8_t image_key[16]; + + /* Number of section in the image */ + unsigned int sect_count; + /* Bootable section */ + unsigned int sect_boot; + unsigned int sect_boot_found:1; + + struct sb_section_ctx *sect_head; + struct sb_section_ctx *sect_tail; + + struct sb_dcd_ctx *dcd_head; + struct sb_dcd_ctx *dcd_tail; + + EVP_CIPHER_CTX cipher_ctx; + EVP_MD_CTX md_ctx; + uint8_t digest[32]; + struct sb_key_dictionary_key sb_dict_key; + + struct sb_boot_image_header payload; +}; + +/* + * Instruction semantics: + * NOOP + * TAG [LAST] + * LOAD address file + * LOAD IVT address IVT_entry_point + * FILL address pattern length + * JUMP [HAB] address [r0_arg] + * CALL [HAB] address [r0_arg] + * MODE mode + * For i.MX23, mode = USB/I2C/SPI1_FLASH/SPI2_FLASH/NAND_BCH + * JTAG/SPI3_EEPROM/SD_SSP0/SD_SSP1 + * For i.MX28, mode = USB/I2C/SPI2_FLASH/SPI3_FLASH/NAND_BCH + * JTAG/SPI2_EEPROM/SD_SSP0/SD_SSP1 + */ + +static uint32_t crc_table[256]; +static int crc_table_valid; + +static void make_crc_table(void) +{ + uint32_t mask; + int i, j; + uint32_t poly; /* polynomial exclusive-or pattern */ + + if (crc_table_valid) + return; + + /* + * the polynomial used by PBL is 1 + x1 + x2 + x4 + x5 + x7 + x8 + x10 + * + x11 + x12 + x16 + x22 + x23 + x26 + x32. + */ + poly = 0x04c11db7; + + for (i = 0; i < 256; i++) { + mask = i << 24; + for (j = 0; j < 8; j++) { + if (mask & 0x80000000) + mask = (mask << 1) ^ poly; + else + mask <<= 1; + } + crc_table[i] = mask; + } + + crc_table_valid = 1; +} + +uint32_t pbl_crc32(uint32_t in_crc, const char *buf, uint32_t len) +{ + uint32_t crc32_val; + int i; + + make_crc_table(); + + crc32_val = ~in_crc; + + for (i = 0; i < len; i++) + crc32_val = (crc32_val << 8) ^ + crc_table[(crc32_val >> 24) ^ (*buf++ & 0xff)]; + + return crc32_val; +} +/* + * AES libcrypto + */ +static int sb_aes_init(struct sb_image_ctx *ictx, uint8_t *iv, int enc) +{ + EVP_CIPHER_CTX *ctx = &ictx->cipher_ctx; + int ret; + + /* If there is no init vector, init vector is all zeroes. */ + if (!iv) + iv = ictx->image_key; + + EVP_CIPHER_CTX_init(ctx); + ret = EVP_CipherInit(ctx, EVP_aes_128_cbc(), ictx->image_key, iv, enc); + if (ret == 1) + EVP_CIPHER_CTX_set_padding(ctx, 0); + return ret; +} + +static int sb_aes_crypt(struct sb_image_ctx *ictx, uint8_t *in_data, + uint8_t *out_data, int in_len) +{ + EVP_CIPHER_CTX *ctx = &ictx->cipher_ctx; + int ret, outlen; + uint8_t *outbuf; + + outbuf = malloc(in_len); + if (!outbuf) + return -ENOMEM; + memset(outbuf, 0, sizeof(in_len)); + + ret = EVP_CipherUpdate(ctx, outbuf, &outlen, in_data, in_len); + if (!ret) { + ret = -EINVAL; + goto err; + } + + if (out_data) + memcpy(out_data, outbuf, outlen); + +err: + free(outbuf); + return ret; +} + +static int sb_aes_deinit(EVP_CIPHER_CTX *ctx) +{ + return EVP_CIPHER_CTX_cleanup(ctx); +} + +static int sb_aes_reinit(struct sb_image_ctx *ictx, int enc) +{ + int ret; + EVP_CIPHER_CTX *ctx = &ictx->cipher_ctx; + struct sb_boot_image_header *sb_header = &ictx->payload; + uint8_t *iv = sb_header->iv; + + ret = sb_aes_deinit(ctx); + if (!ret) + return ret; + return sb_aes_init(ictx, iv, enc); +} + +/* + * Debug + */ +static void soprintf(struct sb_image_ctx *ictx, const char *fmt, ...) +{ + va_list ap; + + if (ictx->silent_dump) + return; + + va_start(ap, fmt); + vfprintf(stdout, fmt, ap); + va_end(ap); +} + +/* + * Code + */ +static time_t sb_get_timestamp(void) +{ + struct tm time_2000 = { + .tm_yday = 1, /* Jan. 1st */ + .tm_year = 100, /* 2000 */ + }; + time_t seconds_to_2000 = mktime(&time_2000); + time_t seconds_to_now = time(NULL); + + return seconds_to_now - seconds_to_2000; +} + +static int sb_get_time(time_t time, struct tm *tm) +{ + struct tm time_2000 = { + .tm_yday = 1, /* Jan. 1st */ + .tm_year = 0, /* 1900 */ + }; + const time_t seconds_to_2000 = mktime(&time_2000); + const time_t seconds_to_now = seconds_to_2000 + time; + struct tm *ret; + ret = gmtime_r(&seconds_to_now, tm); + return ret ? 0 : -EINVAL; +} + +static void sb_encrypt_sb_header(struct sb_image_ctx *ictx) +{ + EVP_MD_CTX *md_ctx = &ictx->md_ctx; + struct sb_boot_image_header *sb_header = &ictx->payload; + uint8_t *sb_header_ptr = (uint8_t *)sb_header; + + /* Encrypt the header, compute the digest. */ + sb_aes_crypt(ictx, sb_header_ptr, NULL, sizeof(*sb_header)); + EVP_DigestUpdate(md_ctx, sb_header_ptr, sizeof(*sb_header)); +} + +static void sb_encrypt_sb_sections_header(struct sb_image_ctx *ictx) +{ + EVP_MD_CTX *md_ctx = &ictx->md_ctx; + struct sb_section_ctx *sctx = ictx->sect_head; + struct sb_sections_header *shdr; + uint8_t *sb_sections_header_ptr; + const int size = sizeof(*shdr); + + while (sctx) { + shdr = &sctx->payload; + sb_sections_header_ptr = (uint8_t *)shdr; + + sb_aes_crypt(ictx, sb_sections_header_ptr, + ictx->sb_dict_key.cbc_mac, size); + EVP_DigestUpdate(md_ctx, sb_sections_header_ptr, size); + + sctx = sctx->sect; + }; +} + +static void sb_encrypt_key_dictionary_key(struct sb_image_ctx *ictx) +{ + EVP_MD_CTX *md_ctx = &ictx->md_ctx; + + sb_aes_crypt(ictx, ictx->image_key, ictx->sb_dict_key.key, + sizeof(ictx->sb_dict_key.key)); + EVP_DigestUpdate(md_ctx, &ictx->sb_dict_key, sizeof(ictx->sb_dict_key)); +} + +static void sb_decrypt_key_dictionary_key(struct sb_image_ctx *ictx) +{ + EVP_MD_CTX *md_ctx = &ictx->md_ctx; + + EVP_DigestUpdate(md_ctx, &ictx->sb_dict_key, sizeof(ictx->sb_dict_key)); + sb_aes_crypt(ictx, ictx->sb_dict_key.key, ictx->image_key, + sizeof(ictx->sb_dict_key.key)); +} + +static void sb_encrypt_tag(struct sb_image_ctx *ictx, + struct sb_cmd_ctx *cctx) +{ + EVP_MD_CTX *md_ctx = &ictx->md_ctx; + struct sb_command *cmd = &cctx->payload; + + sb_aes_crypt(ictx, (uint8_t *)cmd, + (uint8_t *)&cctx->c_payload, sizeof(*cmd)); + EVP_DigestUpdate(md_ctx, &cctx->c_payload, sizeof(*cmd)); +} + +static int sb_encrypt_image(struct sb_image_ctx *ictx) +{ + /* Start image-wide crypto. */ + EVP_MD_CTX_init(&ictx->md_ctx); + EVP_DigestInit(&ictx->md_ctx, EVP_sha1()); + + /* + * SB image header. + */ + sb_aes_init(ictx, NULL, 1); + sb_encrypt_sb_header(ictx); + + /* + * SB sections header. + */ + sb_encrypt_sb_sections_header(ictx); + + /* + * Key dictionary. + */ + sb_aes_reinit(ictx, 1); + sb_encrypt_key_dictionary_key(ictx); + + /* + * Section tags. + */ + struct sb_cmd_ctx *cctx; + struct sb_command *ccmd; + struct sb_section_ctx *sctx = ictx->sect_head; + + while (sctx) { + cctx = sctx->cmd_head; + + sb_aes_reinit(ictx, 1); + + while (cctx) { + ccmd = &cctx->payload; + + sb_encrypt_tag(ictx, cctx); + + if (ccmd->header.tag == ROM_TAG_CMD) { + sb_aes_reinit(ictx, 1); + } else if (ccmd->header.tag == ROM_LOAD_CMD) { + sb_aes_crypt(ictx, cctx->data, cctx->data, + cctx->length); + EVP_DigestUpdate(&ictx->md_ctx, cctx->data, + cctx->length); + } + + cctx = cctx->cmd; + } + + sctx = sctx->sect; + }; + + /* + * Dump the SHA1 of the whole image. + */ + sb_aes_reinit(ictx, 1); + + EVP_DigestFinal(&ictx->md_ctx, ictx->digest, NULL); + sb_aes_crypt(ictx, ictx->digest, ictx->digest, sizeof(ictx->digest)); + + /* Stop the encryption session. */ + sb_aes_deinit(&ictx->cipher_ctx); + + return 0; +} + +static int sb_load_file(struct sb_cmd_ctx *cctx, const char *filename) +{ + long real_size, roundup_size; + uint8_t *data; + long ret; + unsigned long size; + FILE *fp; + + if (!filename) { + fprintf(stderr, "ERR: Missing filename!\n"); + return -EINVAL; + } + + fp = fopen(filename, "r"); + if (!fp) + goto err_open; + + ret = fseek(fp, 0, SEEK_END); + if (ret < 0) + goto err_file; + + real_size = ftell(fp); + if (real_size < 0) + goto err_file; + + ret = fseek(fp, 0, SEEK_SET); + if (ret < 0) + goto err_file; + + roundup_size = roundup(real_size, SB_BLOCK_SIZE); + data = calloc(1, roundup_size); + if (!data) + goto err_file; + + size = fread(data, 1, real_size, fp); + if (size != (unsigned long)real_size) + goto err_alloc; + + cctx->data = data; + cctx->length = roundup_size; + + fclose(fp); + return 0; + +err_alloc: + free(data); +err_file: + fclose(fp); +err_open: + fprintf(stderr, "ERR: Failed to load file \"%s\"\n", filename); + return -EINVAL; +} + +static uint8_t sb_command_checksum(struct sb_command *inst) +{ + uint8_t *inst_ptr = (uint8_t *)inst; + uint8_t csum = 0; + unsigned int i; + + for (i = 0; i < sizeof(struct sb_command); i++) + csum += inst_ptr[i]; + + return csum; +} + +static int sb_token_to_long(char *tok, uint32_t *rid) +{ + char *endptr; + unsigned long id; + + if (tok[0] != '0' || tok[1] != 'x') { + fprintf(stderr, "ERR: Invalid hexadecimal number!\n"); + return -EINVAL; + } + + tok += 2; + + errno = 0; + id = strtoul(tok, &endptr, 16); + if ((errno == ERANGE && id == ULONG_MAX) || (errno != 0 && id == 0)) { + fprintf(stderr, "ERR: Value can't be decoded!\n"); + return -EINVAL; + } + + /* Check for 32-bit overflow. */ + if (id > 0xffffffff) { + fprintf(stderr, "ERR: Value too big!\n"); + return -EINVAL; + } + + if (endptr == tok) { + fprintf(stderr, "ERR: Deformed value!\n"); + return -EINVAL; + } + + *rid = (uint32_t)id; + return 0; +} + +static int sb_grow_dcd(struct sb_dcd_ctx *dctx, unsigned int inc_size) +{ + uint32_t *tmp; + + if (!inc_size) + return 0; + + dctx->size += inc_size; + tmp = realloc(dctx->payload, dctx->size); + if (!tmp) + return -ENOMEM; + + dctx->payload = tmp; + + /* Assemble and update the HAB DCD header. */ + dctx->payload[0] = htonl((SB_HAB_DCD_TAG << 24) | + (dctx->size << 8) | + SB_HAB_VERSION); + + return 0; +} + +static int sb_build_dcd(struct sb_image_ctx *ictx, struct sb_cmd_list *cmd) +{ + struct sb_dcd_ctx *dctx; + + char *tok; + uint32_t id; + int ret; + + dctx = calloc(1, sizeof(*dctx)); + if (!dctx) + return -ENOMEM; + + ret = sb_grow_dcd(dctx, 4); + if (ret) + goto err_dcd; + + /* Read DCD block number. */ + tok = strtok(cmd->cmd, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: DCD block without number!\n", + cmd->lineno); + ret = -EINVAL; + goto err_dcd; + } + + /* Parse the DCD block number. */ + ret = sb_token_to_long(tok, &id); + if (ret) { + fprintf(stderr, "#%i ERR: Malformed DCD block number!\n", + cmd->lineno); + goto err_dcd; + } + + dctx->id = id; + + /* + * The DCD block is now constructed. Append it to the list. + * WARNING: The DCD size is still not computed and will be + * updated while parsing it's commands. + */ + if (!ictx->dcd_head) { + ictx->dcd_head = dctx; + ictx->dcd_tail = dctx; + } else { + ictx->dcd_tail->dcd = dctx; + ictx->dcd_tail = dctx; + } + + return 0; + +err_dcd: + free(dctx->payload); + free(dctx); + return ret; +} + +static int sb_build_dcd_block(struct sb_image_ctx *ictx, + struct sb_cmd_list *cmd, + uint32_t type) +{ + char *tok; + uint32_t address, value, length; + int ret; + + struct sb_dcd_ctx *dctx = ictx->dcd_tail; + uint32_t *dcd; + + if (dctx->prev_dcd_head && (type != SB_DCD_NOOP) && + ((dctx->prev_dcd_head[0] & 0xff0000ff) == type)) { + /* Same instruction as before, just append it. */ + ret = sb_grow_dcd(dctx, 8); + if (ret) + return ret; + } else if (type == SB_DCD_NOOP) { + ret = sb_grow_dcd(dctx, 4); + if (ret) + return ret; + + /* Update DCD command block pointer. */ + dctx->prev_dcd_head = dctx->payload + + dctx->size / sizeof(*dctx->payload) - 1; + + /* NOOP has only 4 bytes and no payload. */ + goto noop; + } else { + /* + * Either a different instruction block started now + * or this is the first instruction block. + */ + ret = sb_grow_dcd(dctx, 12); + if (ret) + return ret; + + /* Update DCD command block pointer. */ + dctx->prev_dcd_head = dctx->payload + + dctx->size / sizeof(*dctx->payload) - 3; + } + + dcd = dctx->payload + dctx->size / sizeof(*dctx->payload) - 2; + + /* + * Prepare the command. + */ + tok = strtok(cmd->cmd, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: Missing DCD address!\n", + cmd->lineno); + ret = -EINVAL; + goto err; + } + + /* Read DCD destination address. */ + ret = sb_token_to_long(tok, &address); + if (ret) { + fprintf(stderr, "#%i ERR: Incorrect DCD address!\n", + cmd->lineno); + goto err; + } + + tok = strtok(NULL, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: Missing DCD value!\n", + cmd->lineno); + ret = -EINVAL; + goto err; + } + + /* Read DCD operation value. */ + ret = sb_token_to_long(tok, &value); + if (ret) { + fprintf(stderr, "#%i ERR: Incorrect DCD value!\n", + cmd->lineno); + goto err; + } + + /* Fill in the new DCD entry. */ + dcd[0] = htonl(address); + dcd[1] = htonl(value); + +noop: + /* Update the DCD command block. */ + length = dctx->size - + ((dctx->prev_dcd_head - dctx->payload) * + sizeof(*dctx->payload)); + dctx->prev_dcd_head[0] = htonl(type | (length << 8)); + +err: + return ret; +} + +static int sb_build_section(struct sb_image_ctx *ictx, struct sb_cmd_list *cmd) +{ + struct sb_section_ctx *sctx; + struct sb_sections_header *shdr; + char *tok; + uint32_t bootable = 0; + uint32_t id; + int ret; + + sctx = calloc(1, sizeof(*sctx)); + if (!sctx) + return -ENOMEM; + + /* Read section number. */ + tok = strtok(cmd->cmd, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: Section without number!\n", + cmd->lineno); + ret = -EINVAL; + goto err_sect; + } + + /* Parse the section number. */ + ret = sb_token_to_long(tok, &id); + if (ret) { + fprintf(stderr, "#%i ERR: Malformed section number!\n", + cmd->lineno); + goto err_sect; + } + + /* Read section's BOOTABLE flag. */ + tok = strtok(NULL, " "); + if (tok && (strlen(tok) == 8) && !strncmp(tok, "BOOTABLE", 8)) + bootable = SB_SECTION_FLAG_BOOTABLE; + + sctx->boot = bootable; + + shdr = &sctx->payload; + shdr->section_number = id; + shdr->section_flags = bootable; + + /* + * The section is now constructed. Append it to the list. + * WARNING: The section size is still not computed and will + * be updated while parsing it's commands. + */ + ictx->sect_count++; + + /* Mark that this section is bootable one. */ + if (bootable) { + if (ictx->sect_boot_found) { + fprintf(stderr, + "#%i WARN: Multiple bootable section!\n", + cmd->lineno); + } else { + ictx->sect_boot = id; + ictx->sect_boot_found = 1; + } + } + + if (!ictx->sect_head) { + ictx->sect_head = sctx; + ictx->sect_tail = sctx; + } else { + ictx->sect_tail->sect = sctx; + ictx->sect_tail = sctx; + } + + return 0; + +err_sect: + free(sctx); + return ret; +} + +static int sb_build_command_nop(struct sb_image_ctx *ictx) +{ + struct sb_section_ctx *sctx = ictx->sect_tail; + struct sb_cmd_ctx *cctx; + struct sb_command *ccmd; + + cctx = calloc(1, sizeof(*cctx)); + if (!cctx) + return -ENOMEM; + + ccmd = &cctx->payload; + + /* + * Construct the command. + */ + ccmd->header.checksum = 0x5a; + ccmd->header.tag = ROM_NOP_CMD; + + cctx->size = sizeof(*ccmd); + + /* + * Append the command to the last section. + */ + if (!sctx->cmd_head) { + sctx->cmd_head = cctx; + sctx->cmd_tail = cctx; + } else { + sctx->cmd_tail->cmd = cctx; + sctx->cmd_tail = cctx; + } + + return 0; +} + +static int sb_build_command_tag(struct sb_image_ctx *ictx, + struct sb_cmd_list *cmd) +{ + struct sb_section_ctx *sctx = ictx->sect_tail; + struct sb_cmd_ctx *cctx; + struct sb_command *ccmd; + char *tok; + + cctx = calloc(1, sizeof(*cctx)); + if (!cctx) + return -ENOMEM; + + ccmd = &cctx->payload; + + /* + * Prepare the command. + */ + /* Check for the LAST keyword. */ + tok = strtok(cmd->cmd, " "); + if (tok && !strcmp(tok, "LAST")) + ccmd->header.flags = ROM_TAG_CMD_FLAG_ROM_LAST_TAG; + + /* + * Construct the command. + */ + ccmd->header.checksum = 0x5a; + ccmd->header.tag = ROM_TAG_CMD; + + cctx->size = sizeof(*ccmd); + + /* + * Append the command to the last section. + */ + if (!sctx->cmd_head) { + sctx->cmd_head = cctx; + sctx->cmd_tail = cctx; + } else { + sctx->cmd_tail->cmd = cctx; + sctx->cmd_tail = cctx; + } + + return 0; +} + +static int sb_build_command_load(struct sb_image_ctx *ictx, + struct sb_cmd_list *cmd) +{ + struct sb_section_ctx *sctx = ictx->sect_tail; + struct sb_cmd_ctx *cctx; + struct sb_command *ccmd; + char *tok; + int ret, is_ivt = 0, is_dcd = 0; + uint32_t dest, dcd = 0; + + cctx = calloc(1, sizeof(*cctx)); + if (!cctx) + return -ENOMEM; + + ccmd = &cctx->payload; + + /* + * Prepare the command. + */ + tok = strtok(cmd->cmd, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: Missing LOAD address or 'IVT'!\n", + cmd->lineno); + ret = -EINVAL; + goto err; + } + + /* Check for "IVT" flag. */ + if (!strcmp(tok, "IVT")) + is_ivt = 1; + if (!strcmp(tok, "DCD")) + is_dcd = 1; + if (is_ivt || is_dcd) { + tok = strtok(NULL, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: Missing LOAD address!\n", + cmd->lineno); + ret = -EINVAL; + goto err; + } + } + + /* Read load destination address. */ + ret = sb_token_to_long(tok, &dest); + if (ret) { + fprintf(stderr, "#%i ERR: Incorrect LOAD address!\n", + cmd->lineno); + goto err; + } + + /* Read filename or IVT entrypoint or DCD block ID. */ + tok = strtok(NULL, " "); + if (!tok) { + fprintf(stderr, + "#%i ERR: Missing LOAD filename or IVT ep or DCD block ID!\n", + cmd->lineno); + ret = -EINVAL; + goto err; + } + + if (is_ivt) { + /* Handle IVT. */ + struct sb_ivt_header *ivt; + uint32_t ivtep; + ret = sb_token_to_long(tok, &ivtep); + + if (ret) { + fprintf(stderr, + "#%i ERR: Incorrect IVT entry point!\n", + cmd->lineno); + goto err; + } + + ivt = calloc(1, sizeof(*ivt)); + if (!ivt) { + ret = -ENOMEM; + goto err; + } + + ivt->header = sb_hab_ivt_header(); + ivt->entry = ivtep; + ivt->self = dest; + + cctx->data = (uint8_t *)ivt; + cctx->length = sizeof(*ivt); + } else if (is_dcd) { + struct sb_dcd_ctx *dctx = ictx->dcd_head; + uint32_t dcdid; + uint8_t *payload; + uint32_t asize; + ret = sb_token_to_long(tok, &dcdid); + + if (ret) { + fprintf(stderr, + "#%i ERR: Incorrect DCD block ID!\n", + cmd->lineno); + goto err; + } + + while (dctx) { + if (dctx->id == dcdid) + break; + dctx = dctx->dcd; + } + + if (!dctx) { + fprintf(stderr, "#%i ERR: DCD block %08x not found!\n", + cmd->lineno, dcdid); + goto err; + } + + asize = roundup(dctx->size, SB_BLOCK_SIZE); + payload = calloc(1, asize); + if (!payload) { + ret = -ENOMEM; + goto err; + } + + memcpy(payload, dctx->payload, dctx->size); + + cctx->data = payload; + cctx->length = asize; + + /* Set the Load DCD flag. */ + dcd = ROM_LOAD_CMD_FLAG_DCD_LOAD; + } else { + const char *loadfile; + + /* Regular LOAD of a file. */ + if (!strcmp(tok, "@PREP@")) + loadfile = prepfile; + else if (!strcmp(tok, "@BOOTLOADER@")) + loadfile = bootloaderfile; + else + loadfile = tok; + + ret = sb_load_file(cctx, loadfile); + if (ret) { + fprintf(stderr, "#%i ERR: Cannot load '%s'!\n", + cmd->lineno, tok); + goto err; + } + } + + if (cctx->length & (SB_BLOCK_SIZE - 1)) { + fprintf(stderr, "#%i ERR: Unaligned payload!\n", + cmd->lineno); + } + + /* + * Construct the command. + */ + ccmd->header.checksum = 0x5a; + ccmd->header.tag = ROM_LOAD_CMD; + ccmd->header.flags = dcd; + + ccmd->load.address = dest; + ccmd->load.count = cctx->length; + ccmd->load.crc32 = pbl_crc32(0, + (const char *)cctx->data, + cctx->length); + + cctx->size = sizeof(*ccmd) + cctx->length; + + /* + * Append the command to the last section. + */ + if (!sctx->cmd_head) { + sctx->cmd_head = cctx; + sctx->cmd_tail = cctx; + } else { + sctx->cmd_tail->cmd = cctx; + sctx->cmd_tail = cctx; + } + + return 0; + +err: + free(cctx); + return ret; +} + +static int sb_build_command_fill(struct sb_image_ctx *ictx, + struct sb_cmd_list *cmd) +{ + struct sb_section_ctx *sctx = ictx->sect_tail; + struct sb_cmd_ctx *cctx; + struct sb_command *ccmd; + char *tok; + uint32_t address, pattern, length; + int ret; + + cctx = calloc(1, sizeof(*cctx)); + if (!cctx) + return -ENOMEM; + + ccmd = &cctx->payload; + + /* + * Prepare the command. + */ + tok = strtok(cmd->cmd, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: Missing FILL address!\n", + cmd->lineno); + ret = -EINVAL; + goto err; + } + + /* Read fill destination address. */ + ret = sb_token_to_long(tok, &address); + if (ret) { + fprintf(stderr, "#%i ERR: Incorrect FILL address!\n", + cmd->lineno); + goto err; + } + + tok = strtok(NULL, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: Missing FILL pattern!\n", + cmd->lineno); + ret = -EINVAL; + goto err; + } + + /* Read fill pattern address. */ + ret = sb_token_to_long(tok, &pattern); + if (ret) { + fprintf(stderr, "#%i ERR: Incorrect FILL pattern!\n", + cmd->lineno); + goto err; + } + + tok = strtok(NULL, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: Missing FILL length!\n", + cmd->lineno); + ret = -EINVAL; + goto err; + } + + /* Read fill pattern address. */ + ret = sb_token_to_long(tok, &length); + if (ret) { + fprintf(stderr, "#%i ERR: Incorrect FILL length!\n", + cmd->lineno); + goto err; + } + + /* + * Construct the command. + */ + ccmd->header.checksum = 0x5a; + ccmd->header.tag = ROM_FILL_CMD; + + ccmd->fill.address = address; + ccmd->fill.count = length; + ccmd->fill.pattern = pattern; + + cctx->size = sizeof(*ccmd); + + /* + * Append the command to the last section. + */ + if (!sctx->cmd_head) { + sctx->cmd_head = cctx; + sctx->cmd_tail = cctx; + } else { + sctx->cmd_tail->cmd = cctx; + sctx->cmd_tail = cctx; + } + + return 0; + +err: + free(cctx); + return ret; +} + +static int sb_build_command_jump_call(struct sb_image_ctx *ictx, + struct sb_cmd_list *cmd, + unsigned int is_call) +{ + struct sb_section_ctx *sctx = ictx->sect_tail; + struct sb_cmd_ctx *cctx; + struct sb_command *ccmd; + char *tok; + uint32_t dest, arg = 0x0; + uint32_t hab = 0; + int ret; + const char *cmdname = is_call ? "CALL" : "JUMP"; + + cctx = calloc(1, sizeof(*cctx)); + if (!cctx) + return -ENOMEM; + + ccmd = &cctx->payload; + + /* + * Prepare the command. + */ + tok = strtok(cmd->cmd, " "); + if (!tok) { + fprintf(stderr, + "#%i ERR: Missing %s address or 'HAB'!\n", + cmd->lineno, cmdname); + ret = -EINVAL; + goto err; + } + + /* Check for "HAB" flag. */ + if (!strcmp(tok, "HAB")) { + hab = is_call ? ROM_CALL_CMD_FLAG_HAB : ROM_JUMP_CMD_FLAG_HAB; + tok = strtok(NULL, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: Missing %s address!\n", + cmd->lineno, cmdname); + ret = -EINVAL; + goto err; + } + } + /* Read load destination address. */ + ret = sb_token_to_long(tok, &dest); + if (ret) { + fprintf(stderr, "#%i ERR: Incorrect %s address!\n", + cmd->lineno, cmdname); + goto err; + } + + tok = strtok(NULL, " "); + if (tok) { + ret = sb_token_to_long(tok, &arg); + if (ret) { + fprintf(stderr, + "#%i ERR: Incorrect %s argument!\n", + cmd->lineno, cmdname); + goto err; + } + } + + /* + * Construct the command. + */ + ccmd->header.checksum = 0x5a; + ccmd->header.tag = is_call ? ROM_CALL_CMD : ROM_JUMP_CMD; + ccmd->header.flags = hab; + + ccmd->call.address = dest; + ccmd->call.argument = arg; + + cctx->size = sizeof(*ccmd); + + /* + * Append the command to the last section. + */ + if (!sctx->cmd_head) { + sctx->cmd_head = cctx; + sctx->cmd_tail = cctx; + } else { + sctx->cmd_tail->cmd = cctx; + sctx->cmd_tail = cctx; + } + + return 0; + +err: + free(cctx); + return ret; +} + +static int sb_build_command_jump(struct sb_image_ctx *ictx, + struct sb_cmd_list *cmd) +{ + return sb_build_command_jump_call(ictx, cmd, 0); +} + +static int sb_build_command_call(struct sb_image_ctx *ictx, + struct sb_cmd_list *cmd) +{ + return sb_build_command_jump_call(ictx, cmd, 1); +} + +static int sb_build_command_mode(struct sb_image_ctx *ictx, + struct sb_cmd_list *cmd) +{ + struct sb_section_ctx *sctx = ictx->sect_tail; + struct sb_cmd_ctx *cctx; + struct sb_command *ccmd; + char *tok; + int ret; + unsigned int i; + uint32_t mode = 0xffffffff; + + cctx = calloc(1, sizeof(*cctx)); + if (!cctx) + return -ENOMEM; + + ccmd = &cctx->payload; + + /* + * Prepare the command. + */ + tok = strtok(cmd->cmd, " "); + if (!tok) { + fprintf(stderr, "#%i ERR: Missing MODE boot mode argument!\n", + cmd->lineno); + ret = -EINVAL; + goto err; + } + + for (i = 0; i < ARRAY_SIZE(modetable); i++) { + if (!strcmp(tok, modetable[i].name)) { + mode = modetable[i].mode; + break; + } + + if (!modetable[i].altname) + continue; + + if (!strcmp(tok, modetable[i].altname)) { + mode = modetable[i].mode; + break; + } + } + + if (mode == 0xffffffff) { + fprintf(stderr, "#%i ERR: Invalid MODE boot mode argument!\n", + cmd->lineno); + ret = -EINVAL; + goto err; + } + + /* + * Construct the command. + */ + ccmd->header.checksum = 0x5a; + ccmd->header.tag = ROM_MODE_CMD; + + ccmd->mode.mode = mode; + + cctx->size = sizeof(*ccmd); + + /* + * Append the command to the last section. + */ + if (!sctx->cmd_head) { + sctx->cmd_head = cctx; + sctx->cmd_tail = cctx; + } else { + sctx->cmd_tail->cmd = cctx; + sctx->cmd_tail = cctx; + } + + return 0; + +err: + free(cctx); + return ret; +} + +static int sb_prefill_image_header(struct sb_image_ctx *ictx) +{ + struct sb_boot_image_header *hdr = &ictx->payload; + + /* Fill signatures */ + memcpy(hdr->signature1, "STMP", 4); + memcpy(hdr->signature2, "sgtl", 4); + + /* SB Image version 1.1 */ + hdr->major_version = SB_VERSION_MAJOR; + hdr->minor_version = SB_VERSION_MINOR; + + /* Boot image major version */ + hdr->product_version.major = htons(0x999); + hdr->product_version.minor = htons(0x999); + hdr->product_version.revision = htons(0x999); + /* Boot image major version */ + hdr->component_version.major = htons(0x999); + hdr->component_version.minor = htons(0x999); + hdr->component_version.revision = htons(0x999); + + /* Drive tag must be 0x0 for i.MX23 */ + hdr->drive_tag = 0; + + hdr->header_blocks = + sizeof(struct sb_boot_image_header) / SB_BLOCK_SIZE; + hdr->section_header_size = + sizeof(struct sb_sections_header) / SB_BLOCK_SIZE; + hdr->timestamp_us = sb_get_timestamp() * 1000000; + + /* FIXME -- add proper config option */ + hdr->flags = ictx->verbose_boot ? SB_IMAGE_FLAG_VERBOSE : 0, + + /* FIXME -- We support only default key */ + hdr->key_count = 1; + + return 0; +} + +static int sb_postfill_image_header(struct sb_image_ctx *ictx) +{ + struct sb_boot_image_header *hdr = &ictx->payload; + struct sb_section_ctx *sctx = ictx->sect_head; + uint32_t kd_size, sections_blocks; + EVP_MD_CTX md_ctx; + + /* The main SB header size in blocks. */ + hdr->image_blocks = hdr->header_blocks; + + /* Size of the key dictionary, which has single zero entry. */ + kd_size = hdr->key_count * sizeof(struct sb_key_dictionary_key); + hdr->image_blocks += kd_size / SB_BLOCK_SIZE; + + /* Now count the payloads. */ + hdr->section_count = ictx->sect_count; + while (sctx) { + hdr->image_blocks += sctx->size / SB_BLOCK_SIZE; + sctx = sctx->sect; + } + + if (!ictx->sect_boot_found) { + fprintf(stderr, "ERR: No bootable section selected!\n"); + return -EINVAL; + } + hdr->first_boot_section_id = ictx->sect_boot; + + /* The n * SB section size in blocks. */ + sections_blocks = hdr->section_count * hdr->section_header_size; + hdr->image_blocks += sections_blocks; + + /* Key dictionary offset. */ + hdr->key_dictionary_block = hdr->header_blocks + sections_blocks; + + /* Digest of the whole image. */ + hdr->image_blocks += 2; + + /* Pointer past the dictionary. */ + hdr->first_boot_tag_block = + hdr->key_dictionary_block + kd_size / SB_BLOCK_SIZE; + + /* Compute header digest. */ + EVP_MD_CTX_init(&md_ctx); + + EVP_DigestInit(&md_ctx, EVP_sha1()); + EVP_DigestUpdate(&md_ctx, hdr->signature1, + sizeof(struct sb_boot_image_header) - + sizeof(hdr->digest)); + EVP_DigestFinal(&md_ctx, hdr->digest, NULL); + + return 0; +} + +static int sb_fixup_sections_and_tags(struct sb_image_ctx *ictx) +{ + /* Fixup the placement of sections. */ + struct sb_boot_image_header *ihdr = &ictx->payload; + struct sb_section_ctx *sctx = ictx->sect_head; + struct sb_sections_header *shdr; + struct sb_cmd_ctx *cctx; + struct sb_command *ccmd; + uint32_t offset = ihdr->first_boot_tag_block; + + while (sctx) { + shdr = &sctx->payload; + + /* Fill in the section TAG offset. */ + shdr->section_offset = offset + 1; + offset += shdr->section_size; + + /* Section length is measured from the TAG block. */ + shdr->section_size--; + + /* Fixup the TAG command. */ + cctx = sctx->cmd_head; + while (cctx) { + ccmd = &cctx->payload; + if (ccmd->header.tag == ROM_TAG_CMD) { + ccmd->tag.section_number = shdr->section_number; + ccmd->tag.section_length = shdr->section_size; + ccmd->tag.section_flags = shdr->section_flags; + } + + /* Update the command checksum. */ + ccmd->header.checksum = sb_command_checksum(ccmd); + + cctx = cctx->cmd; + } + + sctx = sctx->sect; + } + + return 0; +} + +static int sb_parse_line(struct sb_image_ctx *ictx, struct sb_cmd_list *cmd) +{ + char *tok; + char *line = cmd->cmd; + char *rptr = NULL; + int ret; + + /* Analyze the identifier on this line first. */ + tok = strtok_r(line, " ", &rptr); + if (!tok || (strlen(tok) == 0)) { + fprintf(stderr, "#%i ERR: Invalid line!\n", cmd->lineno); + return -EINVAL; + } + + cmd->cmd = rptr; + + /* DCD */ + if (!strcmp(tok, "DCD")) { + ictx->in_section = 0; + ictx->in_dcd = 1; + sb_build_dcd(ictx, cmd); + return 0; + } + + /* Section */ + if (!strcmp(tok, "SECTION")) { + ictx->in_section = 1; + ictx->in_dcd = 0; + sb_build_section(ictx, cmd); + return 0; + } + + if (!ictx->in_section && !ictx->in_dcd) { + fprintf(stderr, "#%i ERR: Data outside of a section!\n", + cmd->lineno); + return -EINVAL; + } + + if (ictx->in_section) { + /* Section commands */ + if (!strcmp(tok, "NOP")) { + ret = sb_build_command_nop(ictx); + } else if (!strcmp(tok, "TAG")) { + ret = sb_build_command_tag(ictx, cmd); + } else if (!strcmp(tok, "LOAD")) { + ret = sb_build_command_load(ictx, cmd); + } else if (!strcmp(tok, "FILL")) { + ret = sb_build_command_fill(ictx, cmd); + } else if (!strcmp(tok, "JUMP")) { + ret = sb_build_command_jump(ictx, cmd); + } else if (!strcmp(tok, "CALL")) { + ret = sb_build_command_call(ictx, cmd); + } else if (!strcmp(tok, "MODE")) { + ret = sb_build_command_mode(ictx, cmd); + } else { + fprintf(stderr, + "#%i ERR: Unsupported instruction '%s'!\n", + cmd->lineno, tok); + return -ENOTSUP; + } + } else if (ictx->in_dcd) { + char *lptr; + uint32_t ilen = '1'; + + tok = strtok_r(tok, ".", &lptr); + if (!tok || (strlen(tok) == 0) || (lptr && strlen(lptr) != 1)) { + fprintf(stderr, "#%i ERR: Invalid line!\n", + cmd->lineno); + return -EINVAL; + } + + if (lptr && + (lptr[0] != '1' && lptr[0] != '2' && lptr[0] != '4')) { + fprintf(stderr, "#%i ERR: Invalid instruction width!\n", + cmd->lineno); + return -EINVAL; + } + + if (lptr) + ilen = lptr[0] - '1'; + + /* DCD commands */ + if (!strcmp(tok, "WRITE")) { + ret = sb_build_dcd_block(ictx, cmd, + SB_DCD_WRITE | ilen); + } else if (!strcmp(tok, "ANDC")) { + ret = sb_build_dcd_block(ictx, cmd, + SB_DCD_ANDC | ilen); + } else if (!strcmp(tok, "ORR")) { + ret = sb_build_dcd_block(ictx, cmd, + SB_DCD_ORR | ilen); + } else if (!strcmp(tok, "EQZ")) { + ret = sb_build_dcd_block(ictx, cmd, + SB_DCD_CHK_EQZ | ilen); + } else if (!strcmp(tok, "EQ")) { + ret = sb_build_dcd_block(ictx, cmd, + SB_DCD_CHK_EQ | ilen); + } else if (!strcmp(tok, "NEQ")) { + ret = sb_build_dcd_block(ictx, cmd, + SB_DCD_CHK_NEQ | ilen); + } else if (!strcmp(tok, "NEZ")) { + ret = sb_build_dcd_block(ictx, cmd, + SB_DCD_CHK_NEZ | ilen); + } else if (!strcmp(tok, "NOOP")) { + ret = sb_build_dcd_block(ictx, cmd, SB_DCD_NOOP); + } else { + fprintf(stderr, + "#%i ERR: Unsupported instruction '%s'!\n", + cmd->lineno, tok); + return -ENOTSUP; + } + } else { + fprintf(stderr, "#%i ERR: Unsupported instruction '%s'!\n", + cmd->lineno, tok); + return -ENOTSUP; + } + + /* + * Here we have at least one section with one command, otherwise we + * would have failed already higher above. + * + * FIXME -- should the updating happen here ? + */ + if (ictx->in_section && !ret) { + ictx->sect_tail->size += ictx->sect_tail->cmd_tail->size; + ictx->sect_tail->payload.section_size = + ictx->sect_tail->size / SB_BLOCK_SIZE; + } + + return ret; +} + +static int sb_load_cmdfile(struct sb_image_ctx *ictx) +{ + struct sb_cmd_list cmd; + int lineno = 1, ret; + FILE *fp; + char *line = NULL; + ssize_t rlen; + size_t len; + + fp = fopen(ictx->cfg_filename, "r"); + if (!fp) + goto err_file; + + while ((rlen = getline(&line, &len, fp)) > 0) { + memset(&cmd, 0, sizeof(cmd)); + + /* Strip the trailing newline. */ + line[rlen - 1] = '\0'; + + cmd.cmd = line; + cmd.len = rlen; + cmd.lineno = lineno++; + + ret = sb_parse_line(ictx, &cmd); + if (ret) + goto out; + } + + ret = 0; +out: + free(line); + + fclose(fp); + + return ret; + +err_file: + fprintf(stderr, "ERR: Failed to load file \"%s\"\n", + ictx->cfg_filename); + return -EINVAL; +} + +static int sb_build_tree_from_cfg(struct sb_image_ctx *ictx) +{ + int ret; + + ret = sb_load_cmdfile(ictx); + if (ret) + return ret; + + ret = sb_prefill_image_header(ictx); + if (ret) + return ret; + + ret = sb_postfill_image_header(ictx); + if (ret) + return ret; + + ret = sb_fixup_sections_and_tags(ictx); + if (ret) + return ret; + + return 0; +} + +static int sb_verify_image_header(struct sb_image_ctx *ictx, + FILE *fp, long fsize) +{ + /* Verify static fields in the image header. */ + struct sb_boot_image_header *hdr = &ictx->payload; + const char *stat[2] = { "[PASS]", "[FAIL]" }; + struct tm tm; + int sz, ret = 0; + unsigned char digest[20]; + EVP_MD_CTX md_ctx; + unsigned long size; + + /* Start image-wide crypto. */ + EVP_MD_CTX_init(&ictx->md_ctx); + EVP_DigestInit(&ictx->md_ctx, EVP_sha1()); + + soprintf(ictx, "---------- Verifying SB Image Header ----------\n"); + + size = fread(&ictx->payload, 1, sizeof(ictx->payload), fp); + if (size != sizeof(ictx->payload)) { + fprintf(stderr, "ERR: SB image header too short!\n"); + return -EINVAL; + } + + /* Compute header digest. */ + EVP_MD_CTX_init(&md_ctx); + EVP_DigestInit(&md_ctx, EVP_sha1()); + EVP_DigestUpdate(&md_ctx, hdr->signature1, + sizeof(struct sb_boot_image_header) - + sizeof(hdr->digest)); + EVP_DigestFinal(&md_ctx, digest, NULL); + + sb_aes_init(ictx, NULL, 1); + sb_encrypt_sb_header(ictx); + + if (memcmp(digest, hdr->digest, 20)) + ret = -EINVAL; + soprintf(ictx, "%s Image header checksum: %s\n", stat[!!ret], + ret ? "BAD" : "OK"); + if (ret) + return ret; + + if (memcmp(hdr->signature1, "STMP", 4) || + memcmp(hdr->signature2, "sgtl", 4)) + ret = -EINVAL; + soprintf(ictx, "%s Signatures: '%.4s' '%.4s'\n", + stat[!!ret], hdr->signature1, hdr->signature2); + if (ret) + return ret; + + if ((hdr->major_version != SB_VERSION_MAJOR) || + ((hdr->minor_version != 1) && (hdr->minor_version != 2))) + ret = -EINVAL; + soprintf(ictx, "%s Image version: v%i.%i\n", stat[!!ret], + hdr->major_version, hdr->minor_version); + if (ret) + return ret; + + ret = sb_get_time(hdr->timestamp_us / 1000000, &tm); + soprintf(ictx, + "%s Creation time: %02i:%02i:%02i %02i/%02i/%04i\n", + stat[!!ret], tm.tm_hour, tm.tm_min, tm.tm_sec, + tm.tm_mday, tm.tm_mon, tm.tm_year + 2000); + if (ret) + return ret; + + soprintf(ictx, "%s Product version: %x.%x.%x\n", stat[0], + ntohs(hdr->product_version.major), + ntohs(hdr->product_version.minor), + ntohs(hdr->product_version.revision)); + soprintf(ictx, "%s Component version: %x.%x.%x\n", stat[0], + ntohs(hdr->component_version.major), + ntohs(hdr->component_version.minor), + ntohs(hdr->component_version.revision)); + + if (hdr->flags & ~SB_IMAGE_FLAG_VERBOSE) + ret = -EINVAL; + soprintf(ictx, "%s Image flags: %s\n", stat[!!ret], + hdr->flags & SB_IMAGE_FLAG_VERBOSE ? "Verbose_boot" : ""); + if (ret) + return ret; + + if (hdr->drive_tag != 0) + ret = -EINVAL; + soprintf(ictx, "%s Drive tag: %i\n", stat[!!ret], + hdr->drive_tag); + if (ret) + return ret; + + sz = sizeof(struct sb_boot_image_header) / SB_BLOCK_SIZE; + if (hdr->header_blocks != sz) + ret = -EINVAL; + soprintf(ictx, "%s Image header size (blocks): %i\n", stat[!!ret], + hdr->header_blocks); + if (ret) + return ret; + + sz = sizeof(struct sb_sections_header) / SB_BLOCK_SIZE; + if (hdr->section_header_size != sz) + ret = -EINVAL; + soprintf(ictx, "%s Section header size (blocks): %i\n", stat[!!ret], + hdr->section_header_size); + if (ret) + return ret; + + soprintf(ictx, "%s Sections count: %i\n", stat[!!ret], + hdr->section_count); + soprintf(ictx, "%s First bootable section %i\n", stat[!!ret], + hdr->first_boot_section_id); + + if (hdr->image_blocks != fsize / SB_BLOCK_SIZE) + ret = -EINVAL; + soprintf(ictx, "%s Image size (blocks): %i\n", stat[!!ret], + hdr->image_blocks); + if (ret) + return ret; + + sz = hdr->header_blocks + hdr->section_header_size * hdr->section_count; + if (hdr->key_dictionary_block != sz) + ret = -EINVAL; + soprintf(ictx, "%s Key dict offset (blocks): %i\n", stat[!!ret], + hdr->key_dictionary_block); + if (ret) + return ret; + + if (hdr->key_count != 1) + ret = -EINVAL; + soprintf(ictx, "%s Number of encryption keys: %i\n", stat[!!ret], + hdr->key_count); + if (ret) + return ret; + + sz = hdr->header_blocks + hdr->section_header_size * hdr->section_count; + sz += hdr->key_count * + sizeof(struct sb_key_dictionary_key) / SB_BLOCK_SIZE; + if (hdr->first_boot_tag_block != (unsigned)sz) + ret = -EINVAL; + soprintf(ictx, "%s First TAG block (blocks): %i\n", stat[!!ret], + hdr->first_boot_tag_block); + if (ret) + return ret; + + return 0; +} + +static void sb_decrypt_tag(struct sb_image_ctx *ictx, + struct sb_cmd_ctx *cctx) +{ + EVP_MD_CTX *md_ctx = &ictx->md_ctx; + struct sb_command *cmd = &cctx->payload; + + sb_aes_crypt(ictx, (uint8_t *)&cctx->c_payload, + (uint8_t *)&cctx->payload, sizeof(*cmd)); + EVP_DigestUpdate(md_ctx, &cctx->c_payload, sizeof(*cmd)); +} + +static int sb_verify_command(struct sb_image_ctx *ictx, + struct sb_cmd_ctx *cctx, FILE *fp, + unsigned long *tsize) +{ + struct sb_command *ccmd = &cctx->payload; + unsigned long size, asize; + char *csum, *flag = ""; + int ret; + unsigned int i; + uint8_t csn, csc = ccmd->header.checksum; + ccmd->header.checksum = 0x5a; + csn = sb_command_checksum(ccmd); + ccmd->header.checksum = csc; + + if (csc == csn) + ret = 0; + else + ret = -EINVAL; + csum = ret ? "checksum BAD" : "checksum OK"; + + switch (ccmd->header.tag) { + case ROM_NOP_CMD: + soprintf(ictx, " NOOP # %s\n", csum); + return ret; + case ROM_TAG_CMD: + if (ccmd->header.flags & ROM_TAG_CMD_FLAG_ROM_LAST_TAG) + flag = "LAST"; + soprintf(ictx, " TAG %s # %s\n", flag, csum); + sb_aes_reinit(ictx, 0); + return ret; + case ROM_LOAD_CMD: + soprintf(ictx, " LOAD addr=0x%08x length=0x%08x # %s\n", + ccmd->load.address, ccmd->load.count, csum); + + cctx->length = ccmd->load.count; + asize = roundup(cctx->length, SB_BLOCK_SIZE); + cctx->data = malloc(asize); + if (!cctx->data) + return -ENOMEM; + + size = fread(cctx->data, 1, asize, fp); + if (size != asize) { + fprintf(stderr, + "ERR: SB LOAD command payload too short!\n"); + return -EINVAL; + } + + *tsize += size; + + EVP_DigestUpdate(&ictx->md_ctx, cctx->data, asize); + sb_aes_crypt(ictx, cctx->data, cctx->data, asize); + + if (ccmd->load.crc32 != pbl_crc32(0, + (const char *)cctx->data, + asize)) { + fprintf(stderr, + "ERR: SB LOAD command payload CRC32 invalid!\n"); + return -EINVAL; + } + return 0; + case ROM_FILL_CMD: + soprintf(ictx, + " FILL addr=0x%08x length=0x%08x pattern=0x%08x # %s\n", + ccmd->fill.address, ccmd->fill.count, + ccmd->fill.pattern, csum); + return 0; + case ROM_JUMP_CMD: + if (ccmd->header.flags & ROM_JUMP_CMD_FLAG_HAB) + flag = " HAB"; + soprintf(ictx, + " JUMP%s addr=0x%08x r0_arg=0x%08x # %s\n", + flag, ccmd->fill.address, ccmd->jump.argument, csum); + return 0; + case ROM_CALL_CMD: + if (ccmd->header.flags & ROM_CALL_CMD_FLAG_HAB) + flag = " HAB"; + soprintf(ictx, + " CALL%s addr=0x%08x r0_arg=0x%08x # %s\n", + flag, ccmd->fill.address, ccmd->jump.argument, csum); + return 0; + case ROM_MODE_CMD: + for (i = 0; i < ARRAY_SIZE(modetable); i++) { + if (ccmd->mode.mode == modetable[i].mode) { + soprintf(ictx, " MODE %s # %s\n", + modetable[i].name, csum); + break; + } + } + fprintf(stderr, " MODE !INVALID! # %s\n", csum); + return 0; + } + + return ret; +} + +static int sb_verify_commands(struct sb_image_ctx *ictx, + struct sb_section_ctx *sctx, FILE *fp) +{ + unsigned long size, tsize = 0; + struct sb_cmd_ctx *cctx; + int ret; + + sb_aes_reinit(ictx, 0); + + while (tsize < sctx->size) { + cctx = calloc(1, sizeof(*cctx)); + if (!cctx) + return -ENOMEM; + if (!sctx->cmd_head) { + sctx->cmd_head = cctx; + sctx->cmd_tail = cctx; + } else { + sctx->cmd_tail->cmd = cctx; + sctx->cmd_tail = cctx; + } + + size = fread(&cctx->c_payload, 1, sizeof(cctx->c_payload), fp); + if (size != sizeof(cctx->c_payload)) { + fprintf(stderr, "ERR: SB command header too short!\n"); + return -EINVAL; + } + + tsize += size; + + sb_decrypt_tag(ictx, cctx); + + ret = sb_verify_command(ictx, cctx, fp, &tsize); + if (ret) + return -EINVAL; + } + + return 0; +} + +static int sb_verify_sections_cmds(struct sb_image_ctx *ictx, FILE *fp) +{ + struct sb_boot_image_header *hdr = &ictx->payload; + struct sb_sections_header *shdr; + unsigned int i; + int ret; + struct sb_section_ctx *sctx; + unsigned long size; + char *bootable = ""; + + soprintf(ictx, "----- Verifying SB Sections and Commands -----\n"); + + for (i = 0; i < hdr->section_count; i++) { + sctx = calloc(1, sizeof(*sctx)); + if (!sctx) + return -ENOMEM; + if (!ictx->sect_head) { + ictx->sect_head = sctx; + ictx->sect_tail = sctx; + } else { + ictx->sect_tail->sect = sctx; + ictx->sect_tail = sctx; + } + + size = fread(&sctx->payload, 1, sizeof(sctx->payload), fp); + if (size != sizeof(sctx->payload)) { + fprintf(stderr, "ERR: SB section header too short!\n"); + return -EINVAL; + } + } + + size = fread(&ictx->sb_dict_key, 1, sizeof(ictx->sb_dict_key), fp); + if (size != sizeof(ictx->sb_dict_key)) { + fprintf(stderr, "ERR: SB key dictionary too short!\n"); + return -EINVAL; + } + + sb_encrypt_sb_sections_header(ictx); + sb_aes_reinit(ictx, 0); + sb_decrypt_key_dictionary_key(ictx); + + sb_aes_reinit(ictx, 0); + + sctx = ictx->sect_head; + while (sctx) { + shdr = &sctx->payload; + + if (shdr->section_flags & SB_SECTION_FLAG_BOOTABLE) { + sctx->boot = 1; + bootable = " BOOTABLE"; + } + + sctx->size = (shdr->section_size * SB_BLOCK_SIZE) + + sizeof(struct sb_command); + soprintf(ictx, "SECTION 0x%x%s # size = %i bytes\n", + shdr->section_number, bootable, sctx->size); + + if (shdr->section_flags & ~SB_SECTION_FLAG_BOOTABLE) + fprintf(stderr, " WARN: Unknown section flag(s) %08x\n", + shdr->section_flags); + + if ((shdr->section_flags & SB_SECTION_FLAG_BOOTABLE) && + (hdr->first_boot_section_id != shdr->section_number)) { + fprintf(stderr, + " WARN: Bootable section does ID not match image header ID!\n"); + } + + ret = sb_verify_commands(ictx, sctx, fp); + if (ret) + return ret; + + sctx = sctx->sect; + } + + /* + * FIXME IDEA: + * check if the first TAG command is at sctx->section_offset + */ + return 0; +} + +static int sb_verify_image_end(struct sb_image_ctx *ictx, + FILE *fp, off_t filesz) +{ + uint8_t digest[32]; + unsigned long size; + off_t pos; + int ret; + + soprintf(ictx, "------------- Verifying image end -------------\n"); + + size = fread(digest, 1, sizeof(digest), fp); + if (size != sizeof(digest)) { + fprintf(stderr, "ERR: SB key dictionary too short!\n"); + return -EINVAL; + } + + pos = ftell(fp); + if (pos != filesz) { + fprintf(stderr, "ERR: Trailing data past the image!\n"); + return -EINVAL; + } + + /* Check the image digest. */ + EVP_DigestFinal(&ictx->md_ctx, ictx->digest, NULL); + + /* Decrypt the image digest from the input image. */ + sb_aes_reinit(ictx, 0); + sb_aes_crypt(ictx, digest, digest, sizeof(digest)); + + /* Check all of 20 bytes of the SHA1 hash. */ + ret = memcmp(digest, ictx->digest, 20) ? -EINVAL : 0; + + if (ret) + soprintf(ictx, "[FAIL] Full-image checksum: BAD\n"); + else + soprintf(ictx, "[PASS] Full-image checksum: OK\n"); + + return ret; +} + + +static int sb_build_tree_from_img(struct sb_image_ctx *ictx) +{ + long filesize; + int ret; + FILE *fp; + + if (!ictx->input_filename) { + fprintf(stderr, "ERR: Missing filename!\n"); + return -EINVAL; + } + + fp = fopen(ictx->input_filename, "r"); + if (!fp) + goto err_open; + + ret = fseek(fp, 0, SEEK_END); + if (ret < 0) + goto err_file; + + filesize = ftell(fp); + if (filesize < 0) + goto err_file; + + ret = fseek(fp, 0, SEEK_SET); + if (ret < 0) + goto err_file; + + if (filesize < (signed)sizeof(ictx->payload)) { + fprintf(stderr, "ERR: File too short!\n"); + goto err_file; + } + + /* Load and verify image header */ + ret = sb_verify_image_header(ictx, fp, filesize); + if (ret) + goto err_verify; + + /* Load and verify sections and commands */ + ret = sb_verify_sections_cmds(ictx, fp); + if (ret) + goto err_verify; + + ret = sb_verify_image_end(ictx, fp, filesize); + if (ret) + goto err_verify; + + ret = 0; + +err_verify: + soprintf(ictx, "-------------------- Result -------------------\n"); + soprintf(ictx, "Verification %s\n", ret ? "FAILED" : "PASSED"); + + /* Stop the encryption session. */ + sb_aes_deinit(&ictx->cipher_ctx); + + fclose(fp); + return ret; + +err_file: + fclose(fp); +err_open: + fprintf(stderr, "ERR: Failed to load file \"%s\"\n", + ictx->input_filename); + return -EINVAL; +} + +static void sb_free_image(struct sb_image_ctx *ictx) +{ + struct sb_section_ctx *sctx = ictx->sect_head, *s_head; + struct sb_dcd_ctx *dctx = ictx->dcd_head, *d_head; + struct sb_cmd_ctx *cctx, *c_head; + + while (sctx) { + s_head = sctx; + c_head = sctx->cmd_head; + + while (c_head) { + cctx = c_head; + c_head = c_head->cmd; + if (cctx->data) + free(cctx->data); + free(cctx); + } + + sctx = sctx->sect; + free(s_head); + } + + while (dctx) { + d_head = dctx; + dctx = dctx->dcd; + free(d_head->payload); + free(d_head); + } +} + +static int mxsimage_verify_print_header(char *file, int silent) +{ + int ret; + struct sb_image_ctx ctx; + + memset(&ctx, 0, sizeof(ctx)); + + ctx.input_filename = file; + ctx.silent_dump = silent; + + ret = sb_build_tree_from_img(&ctx); + sb_free_image(&ctx); + + return ret; +} + +static int sb_build_image(struct sb_image_ctx *ictx) +{ + struct sb_boot_image_header *sb_header = &ictx->payload; + struct sb_section_ctx *sctx; + struct sb_cmd_ctx *cctx; + struct sb_command *ccmd; + struct sb_key_dictionary_key *sb_dict_key = &ictx->sb_dict_key; + int fd; + ssize_t now; + + uint8_t *image, *iptr; + + /* Calculate image size. */ + uint32_t size = sizeof(*sb_header) + + ictx->sect_count * sizeof(struct sb_sections_header) + + sizeof(*sb_dict_key) + sizeof(ictx->digest); + + sctx = ictx->sect_head; + while (sctx) { + size += sctx->size; + sctx = sctx->sect; + }; + + image = malloc(size); + if (!image) + return -ENOMEM; + iptr = image; + + memcpy(iptr, sb_header, sizeof(*sb_header)); + iptr += sizeof(*sb_header); + + sctx = ictx->sect_head; + while (sctx) { + memcpy(iptr, &sctx->payload, sizeof(struct sb_sections_header)); + iptr += sizeof(struct sb_sections_header); + sctx = sctx->sect; + }; + + memcpy(iptr, sb_dict_key, sizeof(*sb_dict_key)); + iptr += sizeof(*sb_dict_key); + + sctx = ictx->sect_head; + while (sctx) { + cctx = sctx->cmd_head; + while (cctx) { + ccmd = &cctx->payload; + + memcpy(iptr, &cctx->c_payload, sizeof(cctx->payload)); + iptr += sizeof(cctx->payload); + + if (ccmd->header.tag == ROM_LOAD_CMD) { + memcpy(iptr, cctx->data, cctx->length); + iptr += cctx->length; + } + + cctx = cctx->cmd; + } + + sctx = sctx->sect; + }; + + memcpy(iptr, ictx->digest, sizeof(ictx->digest)); + iptr += sizeof(ictx->digest); + + fd = open(ictx->output_filename, O_WRONLY | O_CREAT, 0644); + if (fd < 0) + return -errno; + + while (size) { + now = write(fd, image, size); + if (now < 0) + return -errno; + image += now; + size -= now; + } + + close(fd); + + return 0; +} + +static int mxsimage_generate(const char *configfile, const char *imagefile) +{ + int ret; + struct sb_image_ctx ctx; + + memset(&ctx, 0, sizeof(ctx)); + + ctx.cfg_filename = configfile; + ctx.output_filename = imagefile; + ctx.verbose_boot = 1; + + ret = sb_build_tree_from_cfg(&ctx); + if (ret) + goto fail; + + ret = sb_encrypt_image(&ctx); + if (!ret) + ret = sb_build_image(&ctx); + +fail: + sb_free_image(&ctx); + + return ret; +} + +int main(int argc, char *argv[]) +{ + int ret; + int opt; + char *configfile = NULL, *outfile = NULL, *verify = NULL; + + while ((opt = getopt(argc, argv, "p:b:c:o:v:")) != -1) { + switch (opt) { + case 'p': + prepfile = optarg; + break; + case 'b': + bootloaderfile = optarg; + break; + case 'c': + configfile = optarg; + break; + case 'o': + outfile = optarg; + break; + case 'v': + verify = optarg; + break; + default: + exit(1); + } + } + + if (verify) { + ret = mxsimage_verify_print_header(verify, 0); + if (ret) + exit(1); + else + exit(0); + } + + if (!configfile) { + fprintf(stderr, "Configfile missing\n"); + exit(1); + } + + if (!outfile) { + fprintf(stderr, "outfile missing\n"); + exit(1); + } + + ret = mxsimage_generate(configfile, outfile); + if (ret) + exit(1); + + return 0; +} |