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-rw-r--r--arch/arm/cpu/cache-armv7.S1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/cache-armv7.S b/arch/arm/cpu/cache-armv7.S
index c19618b..aaa8bf8 100644
--- a/arch/arm/cpu/cache-armv7.S
+++ b/arch/arm/cpu/cache-armv7.S
@@ -68,6 +68,7 @@ ENTRY(v7_mmu_cache_flush)
ENDPROC(v7_mmu_cache_flush)
ENTRY(__v7_mmu_cache_flush_invalidate)
+ mcr p15, 0, r12, c7, c10, 5 @ DMB
mrc p15, 0, r12, c0, c1, 5 @ read ID_MMFR1
tst r12, #0xf << 16 @ hierarchical cache (ARMv7)
mov r12, #0