diff options
186 files changed, 4930 insertions, 1164 deletions
@@ -1,5 +1,5 @@ VERSION = 2015 -PATCHLEVEL = 11 +PATCHLEVEL = 12 SUBLEVEL = 0 EXTRAVERSION = NAME = None diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 95103c1c9a..9f4d8e9587 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -152,6 +152,7 @@ config ARCH_PXA bool "Intel/Marvell PXA based" select GENERIC_GPIO select HAS_POWEROFF + select HAVE_CLK config ARCH_ROCKCHIP bool "Rockchip RX3xxx" @@ -322,7 +323,6 @@ config ARM_EXCEPTIONS config ARM_UNWIND bool "enable stack unwinding support" depends on AEABI - depends on ARM_EXCEPTIONS help This option enables stack unwinding support in barebox using the information automatically generated by the diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 2229817dba..2e58f15f35 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_MACH_CANON_A1100) += canon-a1100/ obj-$(CONFIG_MACH_CM_FX6) += cm-fx6/ obj-$(CONFIG_MACH_NITROGEN6X) += boundarydevices-nitrogen6x/ obj-$(CONFIG_MACH_CCMX51) += ccxmx51/ +obj-$(CONFIG_MACH_CCMX53) += ccxmx53/ obj-$(CONFIG_MACH_CFA10036) += crystalfontz-cfa10036/ obj-$(CONFIG_MACH_CHUMBY) += chumby_falconwing/ obj-$(CONFIG_MACH_CLEP7212) += clep7212/ @@ -79,13 +80,12 @@ obj-$(CONFIG_MACH_PANDA) += panda/ obj-$(CONFIG_MACH_PCA100) += phytec-phycard-imx27/ obj-$(CONFIG_MACH_PCAAL1) += phytec-phycard-omap3/ obj-$(CONFIG_MACH_PCAAXL2) += phytec-phycard-omap4/ -obj-$(CONFIG_MACH_PCAAXL3) += phytec-phycard-imx6/ obj-$(CONFIG_MACH_PCM037) += phytec-phycore-imx31/ obj-$(CONFIG_MACH_PCM038) += phytec-phycore-imx27/ obj-$(CONFIG_MACH_PCM043) += phytec-phycore-imx35/ obj-$(CONFIG_MACH_PCM049) += phytec-phycore-omap4460/ obj-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += phytec-som-am335x/ -obj-$(CONFIG_MACH_PHYTEC_PFLA02) += phytec-phyflex-imx6/ +obj-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += phytec-som-imx6/ obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += plathome-openblocks-ax3/ obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += plathome-openblocks-a6/ obj-$(CONFIG_MACH_PM9261) += pm9261/ diff --git a/arch/arm/boards/phytec-phyflex-imx6/Makefile b/arch/arm/boards/ccxmx53/Makefile index 11e1c7dc38..01c7a259e9 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/Makefile +++ b/arch/arm/boards/ccxmx53/Makefile @@ -1,3 +1,2 @@ obj-y += board.o lwl-y += lowlevel.o -bbenv-y += defaultenv-phyflex-imx6 diff --git a/arch/arm/boards/ccxmx53/board.c b/arch/arm/boards/ccxmx53/board.c new file mode 100644 index 0000000000..0031aed772 --- /dev/null +++ b/arch/arm/boards/ccxmx53/board.c @@ -0,0 +1,181 @@ +/* + * Copyright (C) 2015 Jason Cobham <cobham.jason@gmail.com> + * + * Board specific file for the Digi ConnectCore ccxmx53 SoM + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <init.h> +#include <linux/sizes.h> +#include <i2c/i2c.h> +#include <gpio.h> + +#include <generated/mach-types.h> +#include <mach/imx5.h> +#include <mach/generic.h> +#include <mach/imx53-regs.h> +#include <mach/esdctl.h> +#include <asm/armlinux.h> +#include <mach/bbu.h> +#include <mach/iim.h> + + +struct ccwmx53_ident { + const char *id_string; + const int mem_sz; + const char industrial; + const char eth0; + const char eth1; + const char wless; +}; + +static struct ccwmx53_ident ccwmx53_ids[] = { + /* 0x00 - 5500xxxx-xx */ + { "Unknown", 0, 0, 0, 0, 0}, + /* 0x01 - 5500xxxx-xx */ + { "Not supported", 0, 0, 0, 0, 0}, + /* 0x02 - 55001604-01 */ + { "i.MX535@1000MHz, Wireless, PHY, Ext. Eth, Accel", SZ_512M, 0, 1, 1, 1}, + /* 0x03 - 55001605-01 */ + { "i.MX535@1000MHz, PHY, Accel", SZ_512M, 0, 1, 0, 0}, + /* 0x04 - 55001604-02 */ + { "i.MX535@1000MHz, Wireless, PHY, Ext. Eth, Accel", SZ_512M, 0, 1, 1, 1}, + /* 0x05 - 5500xxxx-xx */ + { "i.MX535@1000MHz, PHY, Ext. Eth, Accel", SZ_512M, 0, 1, 1, 0}, + /* 0x06 - 55001604-03 */ + { "i.MX535@1000MHz, Wireless, PHY, Accel", SZ_512M, 0, 1, 0, 1}, + /* 0x07 - 5500xxxx-xx */ + { "i.MX535@1000MHz, PHY, Accel", SZ_512M, 0, 1, 0, 0}, + /* 0x08 - 55001604-04 */ + { "i.MX537@800MHz, Wireless, PHY, Accel", SZ_512M, 1, 1, 0, 1}, + /* 0x09 - 55001605-02 */ + { "i.MX537@800MHz, PHY, Accel", SZ_512M, 1, 1, 0, 0}, + /* 0x0a - 5500xxxx-xx */ + { "i.MX537@800MHz, Wireless, PHY, Ext. Eth, Accel", SZ_512M, 1, 1, 1, 1}, + /* 0x0b - 55001605-03 */ + { "i.MX537@800MHz, PHY, Ext. Eth, Accel", SZ_1G, 1, 1, 1, 0}, + /* 0x0c - 5500xxxx-xx */ + { "Reserved for future use", 0, 0, 0, 0, 0}, + /* 0x0d - 55001605-05 */ + { "i.MX537@800MHz, PHY, Accel", SZ_1G, 1, 1, 0, 0}, + /* 0x0e - 5500xxxx-xx */ + { "Reserved for future use", 0, 0, 0, 0, 0}, + /* 0x0f - 5500xxxx-xx */ + { "Reserved for future use", 0, 0, 0, 0, 0}, +}; + +static struct ccwmx53_ident *ccwmx53_id; + +/* On these boards, memory information is encoded in the MAC address. + * Print device memory, and option info from lookup table. + * */ +static int ccwmx53_devices_init(void) +{ + u8 hwid[6] = {0}; + char manloc = 0; + + if ((imx_iim_read(1, 9, hwid, sizeof(hwid)) != sizeof(hwid)) || + (hwid[0] < 0x02) || + (hwid[0] >= ARRAY_SIZE(ccwmx53_ids))) { + printf("Module Variant: Unknown (0x%02x) (0x%02x) (0x%02x) (0x%02x) (0x%02x) (0x%02x)\n", + hwid[0], hwid[1], hwid[2], hwid[3], hwid[4], hwid[5]); + memset(hwid, 0x00, sizeof(hwid)); + } + + ccwmx53_id = &ccwmx53_ids[hwid[0]]; + printf("Module Variant: %s (0x%02x)\n", ccwmx53_id->id_string, hwid[0]); + + if (hwid[0]) { + printf("Module HW Rev : %02x\n", hwid[1] + 1); + switch (hwid[2] & 0xc0) { + case 0x00: + manloc = 'B'; + break; + case 0x40: + manloc = 'W'; + break; + case 0x80: + manloc = 'S'; + break; + default: + manloc = 'N'; + break; + } + + printf("Module Serial : %c%d\n", manloc, + ((hwid[2] & 0x3f) << 24) | + (hwid[3] << 16) | + (hwid[4] << 8) | + hwid[5]); + + printf("Module RAM : %dK\n", (ccwmx53_id->mem_sz) / 1024); + + } else { + return -ENOSYS; + } + + armlinux_set_architecture(MACH_TYPE_CCWMX53); + + return 0; +} +device_initcall(ccwmx53_devices_init); + +static int ccxmx53_init(void) +{ + unsigned char value = 0; + struct i2c_adapter *adapter = NULL; + struct i2c_client client; + int addr = 0x68; /* da9053 device address is 0x68 */ + int bus = 0; /* I2C0 bus */ + + if (!of_machine_is_compatible("digi,imx53-ccxmx53")) + return 0; + + adapter = i2c_get_adapter(bus); + if (adapter) { + client.adapter = adapter; + client.addr = addr; + /* Enable 3.3V ext regulator. */ + value = 0xfa; + if (i2c_write_reg(&client, 0x19, &value, 1) < 0) { + printf("Can't set regulator. I2C write failed\n"); + return -ENOSYS; + } + } else { + printf("Can't set regulator. No I2C Adapter\n"); + return -ENOSYS; + } + + armlinux_set_architecture(MACH_TYPE_CCMX53); + + barebox_set_model("Digi CCMX53"); + barebox_set_hostname("ccxmx53"); + + imx53_bbu_internal_nand_register_handler("nand", + BBU_HANDLER_FLAG_DEFAULT, SZ_512K); + + return 0; +} +late_initcall(ccxmx53_init); + +static int ccxmx53_postcore_init(void) +{ + if (!of_machine_is_compatible("digi,imx53-ccxmx53")) + return 0; + + imx53_init_lowlevel(800); + + return 0; +} +postcore_initcall(ccxmx53_postcore_init); diff --git a/arch/arm/boards/ccxmx53/flash-header-imx53-ccxmx53_1gib.imxcfg b/arch/arm/boards/ccxmx53/flash-header-imx53-ccxmx53_1gib.imxcfg new file mode 100644 index 0000000000..6f1cab60c7 --- /dev/null +++ b/arch/arm/boards/ccxmx53/flash-header-imx53-ccxmx53_1gib.imxcfg @@ -0,0 +1,67 @@ +loadaddr 0x70000000 +soc imx53 +dcdofs 0x400 +wm 32 0x53fa8554 0x00200000 +wm 32 0x53fa8558 0x00200040 +wm 32 0x53fa8560 0x00200000 +wm 32 0x53fa8564 0x00200040 +wm 32 0x53fa8568 0x00200040 +wm 32 0x53fa8570 0x00200000 +wm 32 0x53fa8574 0x00200000 +wm 32 0x53fa8578 0x00200000 +wm 32 0x53fa857c 0x00200040 +wm 32 0x53fa8580 0x00200040 +wm 32 0x53fa8584 0x00200000 +wm 32 0x53fa8588 0x00200000 +wm 32 0x53fa8590 0x00200040 +wm 32 0x53fa8594 0x00200000 +wm 32 0x53fa86f0 0x00200000 +wm 32 0x53fa86f4 0x00000200 +wm 32 0x53fa86fc 0x00000000 +wm 32 0x53fa8714 0x00000000 +wm 32 0x53fa8718 0x00200000 +wm 32 0x53fa871c 0x00200000 +wm 32 0x53fa8720 0x00200000 +wm 32 0x53fa8724 0x06000000 +wm 32 0x53fa8728 0x00200000 +wm 32 0x53fa872c 0x00200000 +wm 32 0x63fd9088 0x2d313331 +wm 32 0x63fd9090 0x393b3836 +wm 32 0x63fd90f8 0x00000800 +wm 32 0x63fd907c 0x020c0211 +wm 32 0x63fd9080 0x014c0155 +wm 32 0x63fd9018 0x000016d0 +wm 32 0x63fd9000 0xc4110000 +wm 32 0x63fd900c 0x4d5122d2 +wm 32 0x63fd9010 0x92d18a22 +wm 32 0x63fd9014 0x00c70092 +wm 32 0x63fd902c 0x000026d2 +wm 32 0x63fd9030 0x009f000e +wm 32 0x63fd9008 0x12272000 +wm 32 0x63fd9004 0x00030012 +wm 32 0x63fd901c 0x04008010 +wm 32 0x63fd901c 0x00008032 +wm 32 0x63fd901c 0x00008033 +wm 32 0x63fd901c 0x00008031 +wm 32 0x63fd901c 0x0b5280b0 +wm 32 0x63fd901c 0x04008010 +wm 32 0x63fd901c 0x00008020 +wm 32 0x63fd901c 0x00008020 +wm 32 0x63fd901c 0x0a528030 +wm 32 0x63fd901c 0x03c68031 +wm 32 0x63fd901c 0x00448031 +wm 32 0x63fd901c 0x04008018 +wm 32 0x63fd901c 0x0000803a +wm 32 0x63fd901c 0x0000803b +wm 32 0x63fd901c 0x00008039 +wm 32 0x63fd901c 0x0b528138 +wm 32 0x63fd901c 0x04008018 +wm 32 0x63fd901c 0x00008028 +wm 32 0x63fd901c 0x00008028 +wm 32 0x63fd901c 0x0a528038 +wm 32 0x63fd901c 0x03c68039 +wm 32 0x63fd901c 0x00448039 +wm 32 0x63fd9020 0x00005800 +wm 32 0x63fd9058 0x00022225 +wm 32 0x63fd901c 0x00000000 +wm 32 0x63fd9040 0x04b80003 diff --git a/arch/arm/boards/ccxmx53/flash-header-imx53-ccxmx53_512mb.imxcfg b/arch/arm/boards/ccxmx53/flash-header-imx53-ccxmx53_512mb.imxcfg new file mode 100644 index 0000000000..b707dd64a6 --- /dev/null +++ b/arch/arm/boards/ccxmx53/flash-header-imx53-ccxmx53_512mb.imxcfg @@ -0,0 +1,67 @@ +loadaddr 0x70000000 +soc imx53 +dcdofs 0x400 +wm 32 0x53fa8554 0x00200000 +wm 32 0x53fa8558 0x00200040 +wm 32 0x53fa8560 0x00200000 +wm 32 0x53fa8564 0x00200040 +wm 32 0x53fa8568 0x00200040 +wm 32 0x53fa8570 0x00200000 +wm 32 0x53fa8574 0x00200000 +wm 32 0x53fa8578 0x00200000 +wm 32 0x53fa857c 0x00200040 +wm 32 0x53fa8580 0x00200040 +wm 32 0x53fa8584 0x00200000 +wm 32 0x53fa8588 0x00200000 +wm 32 0x53fa8590 0x00200040 +wm 32 0x53fa8594 0x00200000 +wm 32 0x53fa86f0 0x00200000 +wm 32 0x53fa86f4 0x00000200 +wm 32 0x53fa86fc 0x00000000 +wm 32 0x53fa8714 0x00000000 +wm 32 0x53fa8718 0x00200000 +wm 32 0x53fa871c 0x00200000 +wm 32 0x53fa8720 0x00200000 +wm 32 0x53fa8724 0x06000000 +wm 32 0x53fa8728 0x00200000 +wm 32 0x53fa872c 0x00200000 +wm 32 0x63fd9088 0x2d313331 +wm 32 0x63fd9090 0x393b3836 +wm 32 0x63fd90f8 0x00000800 +wm 32 0x63fd907c 0x020c0211 +wm 32 0x63fd9080 0x014c0155 +wm 32 0x63fd9018 0x000016d0 +wm 32 0x63fd9000 0xc2110000 +wm 32 0x63fd900c 0x4d5122d2 +wm 32 0x63fd9010 0x92d18a22 +wm 32 0x63fd9014 0x00c70092 +wm 32 0x63fd902c 0x000026d2 +wm 32 0x63fd9030 0x009f000e +wm 32 0x63fd9008 0x12272000 +wm 32 0x63fd9004 0x00030012 +wm 32 0x63fd901c 0x04008010 +wm 32 0x63fd901c 0x00008032 +wm 32 0x63fd901c 0x00008033 +wm 32 0x63fd901c 0x00008031 +wm 32 0x63fd901c 0x0b5280b0 +wm 32 0x63fd901c 0x04008010 +wm 32 0x63fd901c 0x00008020 +wm 32 0x63fd901c 0x00008020 +wm 32 0x63fd901c 0x0a528030 +wm 32 0x63fd901c 0x03c68031 +wm 32 0x63fd901c 0x00448031 +wm 32 0x63fd901c 0x04008018 +wm 32 0x63fd901c 0x0000803a +wm 32 0x63fd901c 0x0000803b +wm 32 0x63fd901c 0x00008039 +wm 32 0x63fd901c 0x0b528138 +wm 32 0x63fd901c 0x04008018 +wm 32 0x63fd901c 0x00008028 +wm 32 0x63fd901c 0x00008028 +wm 32 0x63fd901c 0x0a528038 +wm 32 0x63fd901c 0x03c68039 +wm 32 0x63fd901c 0x00448039 +wm 32 0x63fd9020 0x00005800 +wm 32 0x63fd9058 0x00022225 +wm 32 0x63fd901c 0x00000000 +wm 32 0x63fd9040 0x04b80003 diff --git a/arch/arm/boards/ccxmx53/lowlevel.c b/arch/arm/boards/ccxmx53/lowlevel.c new file mode 100644 index 0000000000..b321811e95 --- /dev/null +++ b/arch/arm/boards/ccxmx53/lowlevel.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2013 Sascha Hauer <s.hauer@pengutronix.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <mach/esdctl.h> +#include <mach/generic.h> +#include <image-metadata.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <asm/sections.h> +#include <asm/cache.h> +#include <asm/mmu.h> + +BAREBOX_IMD_TAG_STRING(ccxmx53_memsize_SZ_512M, IMD_TYPE_PARAMETER, "memsize=512", 0); +BAREBOX_IMD_TAG_STRING(ccxmx53_memsize_SZ_1G, IMD_TYPE_PARAMETER, "memsize=1024", 0); + +static void __noreturn start_imx53_ccxmx53_common(uint32_t size, + void *fdt_blob_fixed_offset) +{ + void *fdt; + + imx5_cpu_lowlevel_init(); + arm_setup_stack(0xf8020000 - 8); + + fdt = fdt_blob_fixed_offset - get_runtime_offset(); + barebox_arm_entry(0x70000000, size, fdt); +} + +#define CCMX53_ENTRY(name, fdt_name, memory_size) \ + ENTRY_FUNCTION(name, r0, r1, r2) \ + { \ + extern char __dtb_##fdt_name##_start[]; \ + \ + IMD_USED(ccxmx53_memsize_##memory_size); \ + \ + start_imx53_ccxmx53_common(memory_size, \ + __dtb_##fdt_name##_start); \ + } + +CCMX53_ENTRY(start_ccxmx53_512mb, imx53_ccxmx53, SZ_512M); +CCMX53_ENTRY(start_ccxmx53_1gib, imx53_ccxmx53, SZ_1G); diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c index 378f4e80e6..7b3993d506 100644 --- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c +++ b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c @@ -91,27 +91,18 @@ static struct imx_ipu_fb_platform_data ipu_fb_data = { }; #ifdef CONFIG_USB -static void imx35_usb_init(void) -{ - unsigned int tmp; +#ifndef CONFIG_USB_GADGET +struct imxusb_platformdata otg_pdata = { + .flags = MXC_EHCI_INTERFACE_DIFF_UNI, + .mode = IMX_USB_MODE_HOST, + .phymode = USBPHY_INTERFACE_MODE_UTMI, +}; +#endif - /* Host 1 */ - tmp = readl(MX35_USB_OTG_BASE_ADDR + 0x600); - tmp &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_TLL_BIT | - MX35_H1_USBTE_BIT | MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT); - tmp |= (MXC_EHCI_INTERFACE_SINGLE_UNI) << MX35_H1_SIC_SHIFT; - tmp |= MX35_H1_USBTE_BIT | MX35_H1_PM_BIT | MX35_H1_TLL_BIT ; - tmp |= MX35_H1_IPPUE_DOWN_BIT; - writel(tmp, MX35_USB_OTG_BASE_ADDR + 0x600); - - tmp = readl(MX35_USB_OTG_BASE_ADDR + 0x584); - tmp |= 3 << 30; - writel(tmp, MX35_USB_OTG_BASE_ADDR + 0x584); - - /* Set to Host mode */ - tmp = readl(MX35_USB_OTG_BASE_ADDR + 0x5a8); - writel(tmp | 0x3, MX35_USB_OTG_BASE_ADDR + 0x5a8); -} +struct imxusb_platformdata hs_pdata = { + .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN, + .mode = IMX_USB_MODE_HOST, +}; #endif #ifdef CONFIG_USB_GADGET @@ -206,9 +197,12 @@ static int eukrea_cpuimx35_devices_init(void) gpio_direction_output(1, 0); #ifdef CONFIG_USB - imx35_usb_init(); - add_generic_usb_ehci_device(DEVICE_ID_DYNAMIC, MX35_USB_HS_BASE_ADDR, NULL); +#ifndef CONFIG_USB_GADGET + imx_add_usb((void *)MX35_USB_OTG_BASE_ADDR, 0, &otg_pdata); #endif + imx_add_usb((void *)MX35_USB_HS_BASE_ADDR, 1, &hs_pdata); +#endif + #ifdef CONFIG_USB_GADGET /* Workaround ENGcm09152 */ tmp = readl(MX35_USB_OTG_BASE_ADDR + 0x608); diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/Makefile b/arch/arm/boards/freescale-mx6sx-sabresdb/Makefile index cc4078f7b4..01c7a259e9 100644 --- a/arch/arm/boards/freescale-mx6sx-sabresdb/Makefile +++ b/arch/arm/boards/freescale-mx6sx-sabresdb/Makefile @@ -1,3 +1,2 @@ -obj-y += board.o flash-header-mx6sx-sabresdb.dcd.o -extra-y += flash-header-mx6sx-sabresdb.dcd.S flash-header-mx6sx-sabresdb.dcd +obj-y += board.o lwl-y += lowlevel.o diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/board.c b/arch/arm/boards/freescale-mx6sx-sabresdb/board.c index 353b460a16..ca22eba393 100644 --- a/arch/arm/boards/freescale-mx6sx-sabresdb/board.c +++ b/arch/arm/boards/freescale-mx6sx-sabresdb/board.c @@ -241,9 +241,11 @@ static int imx6sx_sdb_coredevices_init(void) imx6sx_sdb_setup_fec(); + barebox_set_hostname("mx6sx-sabresdb"); + imx6_bbu_internal_mmc_register_handler("sd", "/dev/mmc3", BBU_HANDLER_FLAG_DEFAULT); return 0; } -console_initcall(imx6sx_sdb_coredevices_init); +coredevice_initcall(imx6sx_sdb_coredevices_init); diff --git a/arch/arm/boards/gateworks-ventana/clocks.imxcfg b/arch/arm/boards/gateworks-ventana/clocks.imxcfg deleted file mode 100644 index bfd5331f01..0000000000 --- a/arch/arm/boards/gateworks-ventana/clocks.imxcfg +++ /dev/null @@ -1,8 +0,0 @@ -wm 32 MX6_CCM_CCGR0 0x00C03F3F -wm 32 MX6_CCM_CCGR1 0x0030FC03 -wm 32 MX6_CCM_CCGR2 0x0FFFC000 -wm 32 MX6_CCM_CCGR3 0x3FF00000 -wm 32 MX6_CCM_CCGR4 0xFFFFF300 -wm 32 MX6_CCM_CCGR5 0x0F0000C3 -wm 32 MX6_CCM_CCGR6 0x000003FF -wm 32 MX6_CCM_CCOSR 0x000000FB diff --git a/arch/arm/boards/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg b/arch/arm/boards/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg index 75271e477d..f4506f1da5 100644 --- a/arch/arm/boards/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg +++ b/arch/arm/boards/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg @@ -8,4 +8,3 @@ dcdofs 0x400 #include "ram-base.imxcfg" #include "quad_128x64.imxcfg" -#include "clocks.imxcfg" diff --git a/arch/arm/boards/lubbock/lowlevel.c b/arch/arm/boards/lubbock/lowlevel.c index 3c8ae76e03..1c52b3e36b 100644 --- a/arch/arm/boards/lubbock/lowlevel.c +++ b/arch/arm/boards/lubbock/lowlevel.c @@ -171,7 +171,7 @@ static inline void pxa2xx_dram_init(void) void __bare_init __naked barebox_arm_reset_vector(void) { - unsigned long pssr = PSSR; + unsigned long pssr = PSPR; unsigned long pc = get_pc(); arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/mainstone/lowlevel.c b/arch/arm/boards/mainstone/lowlevel.c index 86bb09cdf2..89839415d4 100644 --- a/arch/arm/boards/mainstone/lowlevel.c +++ b/arch/arm/boards/mainstone/lowlevel.c @@ -243,7 +243,7 @@ static inline void pxa2xx_dram_init(void) void __bare_init __naked barebox_arm_reset_vector(void) { - unsigned long pssr = PSSR; + unsigned long pssr = PSPR; unsigned long pc = get_pc(); arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/phytec-phycard-imx6/Makefile b/arch/arm/boards/phytec-phycard-imx6/Makefile deleted file mode 100644 index de67f04dde..0000000000 --- a/arch/arm/boards/phytec-phycard-imx6/Makefile +++ /dev/null @@ -1,3 +0,0 @@ -obj-y += board.o -lwl-y += lowlevel.o -bbenv-y += defaultenv-phycard-imx6 diff --git a/arch/arm/boards/phytec-phycard-imx6/board.c b/arch/arm/boards/phytec-phycard-imx6/board.c deleted file mode 100644 index 27b84aa1b8..0000000000 --- a/arch/arm/boards/phytec-phycard-imx6/board.c +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Copyright (C) 2014 Christian Hemp, Phytec Messtechnik GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation. - * - */ - -#include <envfs.h> -#include <environment.h> -#include <bootsource.h> -#include <common.h> -#include <gpio.h> -#include <init.h> -#include <of.h> - -#include <mach/bbu.h> -#include <mach/imx6.h> - -static int phytec_pcaaxl3_init(void) -{ - if (!of_machine_is_compatible("phytec,imx6q-pcaaxl3")) - return 0; - - switch (bootsource_get()) { - case BOOTSOURCE_MMC: - of_device_enable_path("/chosen/environment-sd"); - break; - default: - case BOOTSOURCE_NAND: - of_device_enable_path("/chosen/environment-nand"); - break; - } - - imx6_bbu_nand_register_handler("nand", BBU_HANDLER_FLAG_DEFAULT); - - defaultenv_append_directory(defaultenv_phycard_imx6); - - return 0; -} -device_initcall(phytec_pcaaxl3_init); diff --git a/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/boot/nand b/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/boot/nand deleted file mode 100644 index 3f3a9aa2fc..0000000000 --- a/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/boot/nand +++ /dev/null @@ -1,7 +0,0 @@ -#!/bin/sh - -global.bootm.image="/dev/nand0.kernel.bb" -global.bootm.oftree="/dev/nand0.oftree.bb" -bootargs-ip -global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=root rootfstype=ubifs rw" - diff --git a/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/boot/sd-ext3 b/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/boot/sd-ext3 deleted file mode 100644 index fd35fe0c74..0000000000 --- a/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/boot/sd-ext3 +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/sh - -global.bootm.image="/mnt/mmc/linuximage" -global.bootm.oftree="/mnt/mmc/oftree" -bootargs-ip -global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootfstype=ext3 rootwait rw" diff --git a/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/nv/boot.default b/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/nv/boot.default deleted file mode 100644 index 026a25cc7e..0000000000 --- a/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/nv/boot.default +++ /dev/null @@ -1 +0,0 @@ -nand diff --git a/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/nv/hostname b/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/nv/hostname deleted file mode 100644 index 47b16cc8cc..0000000000 --- a/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/nv/hostname +++ /dev/null @@ -1 +0,0 @@ -phyCARD-i.MX6 diff --git a/arch/arm/boards/phytec-phycard-imx6/lowlevel.c b/arch/arm/boards/phytec-phycard-imx6/lowlevel.c deleted file mode 100644 index 09ab6452ba..0000000000 --- a/arch/arm/boards/phytec-phycard-imx6/lowlevel.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (C) 2014 Christian Hemp <c.hemp@phytec.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ -#include <debug_ll.h> -#include <common.h> -#include <linux/sizes.h> -#include <io.h> -#include <asm/barebox-arm-head.h> -#include <asm/barebox-arm.h> -#include <asm/sections.h> -#include <asm/cache.h> -#include <asm/mmu.h> -#include <mach/imx6.h> - -static inline void setup_uart(void) -{ - void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR); - - writel(0x4, iomuxbase + 0x01f8); - - imx6_ungate_all_peripherals(); - imx6_uart_setup_ll(); - - putc_ll('>'); -} - -extern char __dtb_imx6q_phytec_pbaa03_start[]; - -static void __noreturn start_imx6q_phytec_pbaa03_common(uint32_t size) -{ - void *fdt; - - imx6_cpu_lowlevel_init(); - - arm_setup_stack(0x00920000 - 8); - - if (IS_ENABLED(CONFIG_DEBUG_LL)) - setup_uart(); - - fdt = __dtb_imx6q_phytec_pbaa03_start - get_runtime_offset(); - - barebox_arm_entry(0x10000000, size, fdt); -} - -ENTRY_FUNCTION(start_phytec_pbaa03_1gib, r0, r1, r2) -{ - start_imx6q_phytec_pbaa03_common(SZ_1G); -} - -ENTRY_FUNCTION(start_phytec_pbaa03_1gib_1bank, r0, r1, r2) -{ - start_imx6q_phytec_pbaa03_common(SZ_1G); -} - -ENTRY_FUNCTION(start_phytec_pbaa03_2gib, r0, r1, r2) -{ - start_imx6q_phytec_pbaa03_common(SZ_2G); -} diff --git a/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/boot/sd-ext3 b/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/boot/sd-ext3 deleted file mode 100644 index fd35fe0c74..0000000000 --- a/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/boot/sd-ext3 +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/sh - -global.bootm.image="/mnt/mmc/linuximage" -global.bootm.oftree="/mnt/mmc/oftree" -bootargs-ip -global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootfstype=ext3 rootwait rw" diff --git a/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/nv/boot.default b/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/nv/boot.default deleted file mode 100644 index 026a25cc7e..0000000000 --- a/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/nv/boot.default +++ /dev/null @@ -1 +0,0 @@ -nand diff --git a/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/nv/hostname b/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/nv/hostname deleted file mode 100644 index 192f6b4ae8..0000000000 --- a/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/nv/hostname +++ /dev/null @@ -1 +0,0 @@ -phyFLEX-i.MX6 diff --git a/arch/arm/boards/phytec-som-imx6/Makefile b/arch/arm/boards/phytec-som-imx6/Makefile new file mode 100644 index 0000000000..c61e9cddcf --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/Makefile @@ -0,0 +1,4 @@ +obj-y += board.o +lwl-y += lowlevel.o +bbenv-y += defaultenv-physom-imx6 +bbenv-y += defaultenv-physom-imx6-mira diff --git a/arch/arm/boards/phytec-phyflex-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c index d3100c88b3..9aefa552c3 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/board.c +++ b/arch/arm/boards/phytec-som-imx6/board.c @@ -1,5 +1,7 @@ /* * Copyright (C) 2013 Sascha Hauer, Pengutronix + * Copyright (C) 2015 PHYTEC Messtechnik GmbH, + * Author: Stefan Christ <s.christ@phytec.de> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -16,7 +18,7 @@ * Foundation. * */ -#define pr_fmt(fmt) "phyFLEX-i.MX6: " fmt +#define pr_fmt(fmt) "phySOM-i.MX6: " fmt #include <malloc.h> #include <envfs.h> @@ -83,24 +85,42 @@ static unsigned int get_module_rev(void) return 16 - val; } -static int phytec_pfla02_init(void) +static int physom_imx6_devices_init(void) { int ret; - char *environment_path, *envdev; + char *environment_path, *default_environment_path; + char *envdev, *default_envdev; - if (!of_machine_is_compatible("phytec,imx6q-pfla02") && - !of_machine_is_compatible("phytec,imx6dl-pfla02") && - !of_machine_is_compatible("phytec,imx6s-pfla02")) - return 0; + if (of_machine_is_compatible("phytec,imx6q-pfla02") + || of_machine_is_compatible("phytec,imx6dl-pfla02") + || of_machine_is_compatible("phytec,imx6s-pfla02")) { - phyflex_err006282_workaround(); + phyflex_err006282_workaround(); - imx6_bbu_nand_register_handler("nand", BBU_HANDLER_FLAG_DEFAULT); + pfla02_module_revision = get_module_rev(); + globalvar_add_simple_int("board.revision", &pfla02_module_revision, "%u"); + pr_info("Module Revision: %u\n", pfla02_module_revision); + + barebox_set_hostname("phyFLEX-i.MX6"); + default_environment_path = "/chosen/environment-spinor"; + default_envdev = "SPI NOR flash"; + + } else if (of_machine_is_compatible("phytec,imx6q-pcaaxl3")) { + + barebox_set_hostname("phyCARD-i.MX6"); + default_environment_path = "/chosen/environment-nand"; + default_envdev = "NAND flash"; - pfla02_module_revision = get_module_rev(); - globalvar_add_simple_int("board.revision", &pfla02_module_revision, "%u"); + } else if (of_machine_is_compatible("phytec,imx6q-pcm058-nand") + || of_machine_is_compatible("phytec,imx6q-pcm058-emmc") + || of_machine_is_compatible("phytec,imx6dl-pcm058-nand")) { - pr_info("Module Revision: %u\n", pfla02_module_revision); + barebox_set_hostname("phyCORE-i.MX6"); + default_environment_path = "/chosen/environment-spinor"; + default_envdev = "SPI NOR flash"; + + } else + return 0; switch (bootsource_get()) { case BOOTSOURCE_MMC: @@ -112,35 +132,37 @@ static int phytec_pfla02_init(void) environment_path = asprintf("/chosen/environment-nand"); envdev = "NAND flash"; break; - default: case BOOTSOURCE_SPI: environment_path = asprintf("/chosen/environment-spinor"); envdev = "SPI NOR flash"; break; + default: + environment_path = asprintf(default_environment_path); + envdev = default_envdev; + break; } - ret = of_device_enable_path(environment_path); - if (ret < 0) - pr_warn("Failed to enable environment partition '%s' (%d)\n", - environment_path, ret); - - free(environment_path); + if (environment_path) { + ret = of_device_enable_path(environment_path); + if (ret < 0) + pr_warn("Failed to enable environment partition '%s' (%d)\n", + environment_path, ret); + free(environment_path); + } pr_notice("Using environment in %s\n", envdev); - return 0; -} -device_initcall(phytec_pfla02_init); + imx6_bbu_nand_register_handler("nand", BBU_HANDLER_FLAG_DEFAULT); -static int phytec_pbab0x_init(void) -{ - if (!of_machine_is_compatible("phytec,imx6x-pbab01") && - !of_machine_is_compatible("phytec,imx6dl-pbab05") && - !of_machine_is_compatible("phytec,imx6q-pbab02")) - return 0; + defaultenv_append_directory(defaultenv_physom_imx6); - defaultenv_append_directory(defaultenv_phyflex_imx6); + /* Overwrite file /env/init/automount */ + if (of_machine_is_compatible("phytec,imx6q-pcm058-nand") + || of_machine_is_compatible("phytec,imx6q-pcm058-emmc") + || of_machine_is_compatible("phytec,imx6dl-pcm058-nand")) { + defaultenv_append_directory(defaultenv_physom_imx6_mira); + } return 0; } -device_initcall(phytec_pbab0x_init); +device_initcall(physom_imx6_devices_init); diff --git a/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/init/automount b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6-mira/init/automount index 49d99bd78d..3659cf7d39 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/init/automount +++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6-mira/init/automount @@ -11,4 +11,4 @@ mkdir -p /mnt/tftp automount /mnt/tftp 'ifup eth0 && mount -t tftp $eth0.serverip /mnt/tftp' mkdir -p /mnt/mmc -automount -d /mnt/mmc 'mmc2.probe=1 && [ -e /dev/mmc2.0 ] && mount /dev/mmc2.0 /mnt/mmc' +automount -d /mnt/mmc 'mmc0.probe=1 && [ -e /dev/mmc0.0 ] && mount /dev/mmc0.0 /mnt/mmc' diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc new file mode 100644 index 0000000000..332fc26ad0 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/mmc @@ -0,0 +1,5 @@ +#!/bin/sh + +global.bootm.image="/mnt/mmc/linuximage" +global.bootm.oftree="/mnt/mmc/oftree" +global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootwait rw" diff --git a/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/boot/nand b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand index 79dc03c34a..a23aa21cc7 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/boot/nand +++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/nand @@ -2,5 +2,4 @@ global.bootm.image="/dev/nand0.kernel.bb" global.bootm.oftree="/dev/nand0.oftree.bb" -bootargs-ip global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=root rootfstype=ubifs rw" diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/spi b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/spi new file mode 100644 index 0000000000..2000a16a12 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/boot/spi @@ -0,0 +1,5 @@ +#!/bin/sh + +global.bootm.image="/dev/m25p0.kernel" +global.bootm.oftree="/dev/m25p0.oftree" +global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=root rootfstype=ubifs rw" diff --git a/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/init/automount b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/init/automount index 49d99bd78d..49d99bd78d 100644 --- a/arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/init/automount +++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/init/automount diff --git a/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/init/bootsource b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/init/bootsource new file mode 100644 index 0000000000..3f2ff4bcc8 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/defaultenv-physom-imx6/init/bootsource @@ -0,0 +1,15 @@ +#!/bin/sh + +if [ -n "$nv.boot.default" ]; then + exit +fi + +if [ $bootsource = mmc ]; then + global.boot.default="mmc nand spi net" +elif [ $bootsource = nand ]; then + global.boot.default="nand spi mmc net" +elif [ $bootsource = spi ]; then + global.boot.default="spi nand mmc net" +elif [ $bootsource = net ]; then + global.boot.default="net nand spi mmc" +fi diff --git a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg index 62a24ed0df..62a24ed0df 100644 --- a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg diff --git a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg index bab726d147..bab726d147 100644 --- a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg diff --git a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg index 512f6cbd47..512f6cbd47 100644 --- a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg diff --git a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3.h index a03b8dc0fa..ebcc1ddf94 100644 --- a/arch/arm/boards/phytec-phycard-imx6/flash-header-phytec-pcaaxl3.h +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcaaxl3.h @@ -1,5 +1,5 @@ soc imx6 -loadaddr 0x20000000 +loadaddr 0x10000000 dcdofs 0x400 wm 32 0x020e05a8 0x00000028 diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg new file mode 100644 index 0000000000..5df46b9ff4 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg @@ -0,0 +1,8 @@ +#define SETUP_MDCFG0 \ + wm 32 0x021b000c 0x555A7955 + +#define SETUP_MDASP_MDCTL \ + wm 32 0x021b0040 0x00000027; \ + wm 32 0x021b0000 0x831A0000 + +#include "flash-header-phytec-pcm058.h" diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058.h new file mode 100644 index 0000000000..7cdf45ccea --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058.h @@ -0,0 +1,102 @@ +soc imx6 +loadaddr 0x10000000 +dcdofs 0x400 + +wm 32 0x020e0798 0x000C0000 +wm 32 0x020e0758 0x00000000 +wm 32 0x020e0588 0x00000030 +wm 32 0x020e0594 0x00000030 +wm 32 0x020e056c 0x00000030 +wm 32 0x020e0578 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e057c 0x00000030 +wm 32 0x020e058c 0x00000000 +wm 32 0x020e059c 0x00000030 +wm 32 0x020e05a0 0x00000030 +wm 32 0x020e0590 0x00003000 +wm 32 0x020e0598 0x00003000 +wm 32 0x020e078c 0x00000030 +wm 32 0x020e0750 0x00020000 +wm 32 0x020e05a8 0x00000028 +wm 32 0x020e05b0 0x00000028 +wm 32 0x020e0524 0x00000028 +wm 32 0x020e051c 0x00000028 +wm 32 0x020e0518 0x00000028 +wm 32 0x020e050c 0x00000028 +wm 32 0x020e05b8 0x00000028 +wm 32 0x020e05c0 0x00000028 +wm 32 0x020e0774 0x00020000 +wm 32 0x020e0784 0x00000028 +wm 32 0x020e0788 0x00000028 +wm 32 0x020e0794 0x00000028 +wm 32 0x020e079c 0x00000028 +wm 32 0x020e07a0 0x00000028 +wm 32 0x020e07a4 0x00000028 +wm 32 0x020e07a8 0x00000028 +wm 32 0x020e0748 0x00000028 +wm 32 0x020e05ac 0x00000028 +wm 32 0x020e05b4 0x00000028 +wm 32 0x020e0528 0x00000028 +wm 32 0x020e0520 0x00000028 +wm 32 0x020e0514 0x00000028 +wm 32 0x020e0510 0x00000028 +wm 32 0x020e05bc 0x00000028 +wm 32 0x020e05c4 0x00000028 +wm 32 0x021b0800 0xa1390003 +wm 32 0x021b4800 0xa1380003 +wm 32 0x021b080c 0x00140014 +wm 32 0x021b0810 0x00230018 +wm 32 0x021b480c 0x000A001E +wm 32 0x021b4810 0x000A0015 +wm 32 0x021b083c 0x43080314 +wm 32 0x021b0840 0x02680300 +wm 32 0x021b483c 0x430C0318 +wm 32 0x021b4840 0x03000254 +wm 32 0x021b0848 0x3A323234 +wm 32 0x021b4848 0x3E3C3242 +wm 32 0x021b0850 0x2A2E3632 +wm 32 0x021b4850 0x3C323E34 +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b481c 0x33333333 +wm 32 0x021b4820 0x33333333 +wm 32 0x021b4824 0x33333333 +wm 32 0x021b4828 0x33333333 +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 +wm 32 0x021b0004 0x00020036 +wm 32 0x021b0008 0x09444040 + +SETUP_MDCFG0 + +wm 32 0x021b0010 0xFF328F64 +wm 32 0x021b0014 0x01FF00DB +wm 32 0x021b0018 0x00011740 +wm 32 0x021b001c 0x00008000 +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x003F1023 + +SETUP_MDASP_MDCTL + +wm 32 0x021b001c 0x04088032 +wm 32 0x021b001c 0x0408803a +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x0000803b +wm 32 0x021b001c 0x00048031 +wm 32 0x021b001c 0x00048039 +wm 32 0x021b001c 0x09408030 +wm 32 0x021b001c 0x09408038 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b001c 0x04008048 +wm 32 0x021b0020 0x00007800 +wm 32 0x021b0818 0x00011117 +wm 32 0x021b4818 0x00011117 +wm 32 0x021b0004 0x00025576 +wm 32 0x021b0404 0x00011006 +wm 32 0x021b001c 0x00000000 +wm 32 0x020e0010 0xf00000ff +wm 32 0x020e0018 0x007F007F +wm 32 0x020e001c 0x007F007F +wm 32 0x020c8000 0x80002021 diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-256mb.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-256mb.imxcfg new file mode 100644 index 0000000000..bf50190c78 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-256mb.imxcfg @@ -0,0 +1,8 @@ +#define SETUP_MDCFG0 \ + wm 32 0x021b000c 0x3c409b85 + +#define SETUP_MDASP_MDCTL \ + wm 32 0x021b0040 0x0000000F; \ + wm 32 0x021b0000 0x82190000 + +#include "flash-header-phytec-pcm058dl.h" diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl.h new file mode 100644 index 0000000000..c7df7907d1 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl.h @@ -0,0 +1,98 @@ +soc imx6 +loadaddr 0x10000000 +dcdofs 0x400 + +wm 32 0x020e0774 0x000C0000 +wm 32 0x020e0754 0x00000000 +wm 32 0x020e04ac 0x00000030 +wm 32 0x020e04b0 0x00000030 +wm 32 0x020e0464 0x00000030 +wm 32 0x020e0490 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e0494 0x00000030 +wm 32 0x020e04a0 0x00000000 +wm 32 0x020e04b4 0x00000030 +wm 32 0x020e04b8 0x00000030 +wm 32 0x020e04a4 0x00003000 +wm 32 0x020e04a8 0x00003000 +wm 32 0x020e076c 0x00000030 +wm 32 0x020e0750 0x00020000 +wm 32 0x020e04bc 0x00000028 +wm 32 0x020e04c0 0x00000028 +wm 32 0x020e04c4 0x00000028 +wm 32 0x020e04c8 0x00000028 +wm 32 0x020e04cc 0x00000028 +wm 32 0x020e04d0 0x00000028 +wm 32 0x020e04d4 0x00000028 +wm 32 0x020e04d8 0x00000028 +wm 32 0x020e0760 0x00020000 +wm 32 0x020e0764 0x00000028 +wm 32 0x020e0770 0x00000028 +wm 32 0x020e0778 0x00000028 +wm 32 0x020e077c 0x00000028 +wm 32 0x020e0780 0x00000028 +wm 32 0x020e0784 0x00000028 +wm 32 0x020e078c 0x00000028 +wm 32 0x020e0748 0x00000028 +wm 32 0x020e0470 0x00000028 +wm 32 0x020e0474 0x00000028 +wm 32 0x020e0478 0x00000028 +wm 32 0x020e047c 0x00000028 +wm 32 0x020e0480 0x00000028 +wm 32 0x020e0484 0x00000028 +wm 32 0x020e0488 0x00000028 +wm 32 0x020e048c 0x00000028 +wm 32 0x021b0800 0xa1390003 +wm 32 0x021b4800 0xa1380003 +wm 32 0x021b080c 0x0032003A +wm 32 0x021b0810 0x00350037 +wm 32 0x021b480c 0x00260038 +wm 32 0x021b4810 0x002C0038 +wm 32 0x021b083c 0x42630244 +wm 32 0x021b0840 0x02300238 +wm 32 0x021b483c 0x02540258 +wm 32 0x021b4840 0x0236021e +wm 32 0x021b0848 0x46484446 +wm 32 0x021b4848 0x302d2c35 +wm 32 0x021b0850 0x36342630 +wm 32 0x021b4850 0x3423372d +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b481c 0x33333333 +wm 32 0x021b4820 0x33333333 +wm 32 0x021b4824 0x33333333 +wm 32 0x021b4828 0x33333333 +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 +wm 32 0x021b0004 0x00025576 +wm 32 0x021b0008 0x09444040 + +SETUP_MDCFG0 + +wm 32 0x021b0010 0xff538f64 +wm 32 0x021b0014 0x01ff0124 +wm 32 0x021b0018 0x00091740 +wm 32 0x021b001c 0x00008000 +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x003F1023 + +SETUP_MDASP_MDCTL + +wm 32 0x021b001c 0x04088032 +wm 32 0x021b001c 0x0408803a +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x0000803b +wm 32 0x021b001c 0x00428031 +wm 32 0x021b001c 0x00428039 +wm 32 0x021b001c 0x09408030 +wm 32 0x021b001c 0x09408038 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b001c 0x04008048 +wm 32 0x021b0020 0x00007800 +wm 32 0x021b0818 0x00011117 +wm 32 0x021b4818 0x00011117 +wm 32 0x021b0004 0x00025576 +wm 32 0x021b0404 0x00011006 +wm 32 0x021b001c 0x00000000 diff --git a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg index 75dc982432..75dc982432 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg diff --git a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg index 1f1fbe542c..1f1fbe542c 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg diff --git a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-2gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-2gib.imxcfg index aa01c056be..aa01c056be 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-2gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-2gib.imxcfg diff --git a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-4gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-4gib.imxcfg index c8d33cfacc..c8d33cfacc 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-4gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-4gib.imxcfg diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-512mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-512mb-1bank.imxcfg new file mode 100644 index 0000000000..d6bbe1f1c3 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02-512mb-1bank.imxcfg @@ -0,0 +1,8 @@ +#define SETUP_MDCFG0 \ + wm 32 0x021b000c 0x555a7975 + +#define SETUP_MDASP_MDCTL \ + wm 32 0x021b0040 0x00000017; \ + wm 32 0x021b0000 0x821a0000 + +#include "flash-header-phytec-pfla02.h" diff --git a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02.h index 93291e9836..507b9c6236 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02.h +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02.h @@ -1,5 +1,5 @@ soc imx6 -loadaddr 0x20000000 +loadaddr 0x10000000 dcdofs 0x400 wm 32 0x020e0798 0x000C0000 diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg new file mode 100644 index 0000000000..156eea971e --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg @@ -0,0 +1,8 @@ +#define SETUP_MDCFG0 \ + wm 32 0x021b000c 0x565c9b85 + +#define SETUP_MDASP_MDCTL \ + wm 32 0x021b0040 0x00000027; \ + wm 32 0x021b0000 0x831a0000 + +#include "flash-header-phytec-pfla02dl.h" diff --git a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg index e76867004a..e76867004a 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg diff --git a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02dl.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h index 337488bdf0..6cdf429cb1 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02dl.h +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02dl.h @@ -1,5 +1,5 @@ soc imx6 -loadaddr 0x20000000 +loadaddr 0x10000000 dcdofs 0x400 wm 32 0x020e0774 0x000C0000 diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg new file mode 100644 index 0000000000..26fe2b2f7d --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg @@ -0,0 +1,8 @@ +#define SETUP_MDCFG0 \ + wm 32 0x021b000c 0x3c409b85 + +#define SETUP_MDASP_MDCTL \ + wm 32 0x021b0040 0x0000000B; \ + wm 32 0x021b0000 0x82180000 + +#include "flash-header-phytec-pfla02dl.h" diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg new file mode 100644 index 0000000000..babb0dfe24 --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg @@ -0,0 +1,8 @@ +#define SETUP_MDCFG0 \ + wm 32 0x021b000c 0x3c409b85 + +#define SETUP_MDASP_MDCTL \ + wm 32 0x021b0040 0x0000000F; \ + wm 32 0x021b0000 0x82190000 + +#include "flash-header-phytec-pfla02dl.h" diff --git a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02s-512mb.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg index 6a46cd958f..6a46cd958f 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02s-512mb.imxcfg +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg diff --git a/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c index 82c0244631..eb796e78b8 100644 --- a/arch/arm/boards/phytec-phyflex-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c @@ -1,5 +1,7 @@ /* * Copyright (C) 2013 Sascha Hauer <s.hauer@pengutronix.de> + * Copyright (C) 2015 PHYTEC Messtechnik GmbH, + * Author: Stefan Christ <s.christ@phytec.de> * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -38,10 +40,12 @@ static inline void setup_uart(void) #define SZ_4G 0xEFFFFFF8 -BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_512M, IMD_TYPE_PARAMETER, "memsize=512", 0); -BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_1G, IMD_TYPE_PARAMETER, "memsize=1024", 0); -BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_2G, IMD_TYPE_PARAMETER, "memsize=2048", 0); -BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_SZ_4G, IMD_TYPE_PARAMETER, "memsize=4096", 0); +BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_128M, IMD_TYPE_PARAMETER, "memsize=128", 0); +BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_256M, IMD_TYPE_PARAMETER, "memsize=256", 0); +BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_512M, IMD_TYPE_PARAMETER, "memsize=512", 0); +BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_1G, IMD_TYPE_PARAMETER, "memsize=1024", 0); +BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_2G, IMD_TYPE_PARAMETER, "memsize=2048", 0); +BAREBOX_IMD_TAG_STRING(physom_mx6_memsize_SZ_4G, IMD_TYPE_PARAMETER, "memsize=4096", 0); static void __noreturn start_imx6_phytec_common(uint32_t size, bool do_early_uart_config, @@ -65,17 +69,29 @@ static void __noreturn start_imx6_phytec_common(uint32_t size, { \ extern char __dtb_##fdt_name##_start[]; \ \ - IMD_USED(phyflex_mx6_memsize_##memory_size); \ + IMD_USED(physom_mx6_memsize_##memory_size); \ \ start_imx6_phytec_common(memory_size, do_early_uart_config, \ __dtb_##fdt_name##_start); \ } +PHYTEC_ENTRY(start_phytec_pbaa03_1gib, imx6q_phytec_pbaa03, SZ_1G, true); +PHYTEC_ENTRY(start_phytec_pbaa03_1gib_1bank, imx6q_phytec_pbaa03, SZ_1G, true); +PHYTEC_ENTRY(start_phytec_pbaa03_2gib, imx6q_phytec_pbaa03, SZ_2G, true); + +PHYTEC_ENTRY(start_phytec_pbab01_512mb_1bank, imx6q_phytec_pbab01, SZ_512M, true); PHYTEC_ENTRY(start_phytec_pbab01_1gib, imx6q_phytec_pbab01, SZ_1G, true); PHYTEC_ENTRY(start_phytec_pbab01_1gib_1bank, imx6q_phytec_pbab01, SZ_1G, true); PHYTEC_ENTRY(start_phytec_pbab01_2gib, imx6q_phytec_pbab01, SZ_2G, true); PHYTEC_ENTRY(start_phytec_pbab01_4gib, imx6q_phytec_pbab01, SZ_4G, true); PHYTEC_ENTRY(start_phytec_pbab01dl_1gib, imx6dl_phytec_pbab01, SZ_1G, false); -PHYTEC_ENTRY(start_phytec_pbab01s_512mb, imx6s_phytec_pbab01, SZ_512M, false); +PHYTEC_ENTRY(start_phytec_pbab01dl_1gib_1bank, imx6dl_phytec_pbab01, SZ_1G, false); +PHYTEC_ENTRY(start_phytec_pbab01s_128mb_1bank, imx6s_phytec_pbab01, SZ_128M, false); +PHYTEC_ENTRY(start_phytec_pbab01s_256mb_1bank, imx6s_phytec_pbab01, SZ_256M, false); +PHYTEC_ENTRY(start_phytec_pbab01s_512mb_1bank, imx6s_phytec_pbab01, SZ_512M, false); PHYTEC_ENTRY(start_phytec_phyboard_alcor_1gib, imx6q_phytec_phyboard_alcor, SZ_1G, false); -PHYTEC_ENTRY(start_phytec_phyboard_subra_512mb, imx6dl_phytec_phyboard_subra, SZ_512M, false); +PHYTEC_ENTRY(start_phytec_phyboard_subra_512mb_1bank, imx6dl_phytec_phyboard_subra, SZ_512M, false); + +PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_256mb, imx6dl_phytec_phycore_som_nand, SZ_256M, true); +PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_nand_1gib, imx6q_phytec_phycore_som_nand, SZ_1G, true); +PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true); diff --git a/arch/arm/boards/solidrun-microsom/1066mhz-4x128mx16.imxcfg b/arch/arm/boards/solidrun-microsom/1066mhz-4x128mx16.imxcfg new file mode 100644 index 0000000000..6902fe113f --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/1066mhz-4x128mx16.imxcfg @@ -0,0 +1,70 @@ +/* + * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2013 SolidRun ltd. + * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390003 +wm 32 MX6_MMDC_P1_MPZQHWCTRL 0xa1390003 +wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x00000000 +wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x00000000 +wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x00000000 +wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x00000000 +wm 32 MX6_MMDC_P0_MPDGCTRL0 0x0314031c +wm 32 MX6_MMDC_P0_MPDGCTRL1 0x023e0304 +wm 32 MX6_MMDC_P1_MPDGCTRL0 0x03240330 +wm 32 MX6_MMDC_P1_MPDGCTRL1 0x03180260 +wm 32 MX6_MMDC_P0_MPRDDLCTL 0x3630323c +wm 32 MX6_MMDC_P1_MPRDDLCTL 0x3436283a +wm 32 MX6_MMDC_P0_MPWRDLCTL 0x36344038 +wm 32 MX6_MMDC_P1_MPWRDLCTL 0x422a423c +wm 32 MX6_MMDC_P0_MPRDDQBY0DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY1DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY2DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY3DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY0DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY1DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY2DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333 +wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 +wm 32 MX6_MMDC_P1_MPMUR0 0x00000800 +wm 32 MX6_MMDC_P0_MDPDC 0x00025576 +wm 32 MX6_MMDC_P0_MDOTC 0x09444040 +wm 32 MX6_MMDC_P0_MDCFG0 0x54597955 +wm 32 MX6_MMDC_P0_MDCFG1 0xFF328F64 +wm 32 MX6_MMDC_P0_MDCFG2 0x01FF00DB +wm 32 MX6_MMDC_P0_MDMISC 0x00011740 +wm 32 MX6_MMDC_P0_MDSCR 0x00008000 +wm 32 MX6_MMDC_P0_MDRWD 0x000026d2 +wm 32 MX6_MMDC_P0_MDOR 0x005B0E21 +wm 32 MX6_MMDC_P0_MDASP 0x00000027 +wm 32 MX6_MMDC_P0_MAARCR 0x11420000 +wm 32 MX6_MMDC_P0_MDCTL 0x831A0000 +wm 32 MX6_MMDC_P0_MDSCR 0x02088032 +wm 32 MX6_MMDC_P0_MDSCR 0x0208803A +wm 32 MX6_MMDC_P0_MDSCR 0x00008033 +wm 32 MX6_MMDC_P0_MDSCR 0x0000803B +wm 32 MX6_MMDC_P0_MDSCR 0x00408031 +wm 32 MX6_MMDC_P0_MDSCR 0x00408039 +wm 32 MX6_MMDC_P0_MDSCR 0x09408030 +wm 32 MX6_MMDC_P0_MDSCR 0x09408038 +wm 32 MX6_MMDC_P0_MDSCR 0x04008040 +wm 32 MX6_MMDC_P0_MDSCR 0x04008048 +wm 32 MX6_MMDC_P0_MDREF 0x00005800 +wm 32 MX6_MMDC_P0_MPODTCTRL 0x00000007 +wm 32 MX6_MMDC_P1_MPODTCTRL 0x00000007 +wm 32 MX6_MMDC_P0_MDSCR 0x00000000 +wm 32 MX6_MMDC_P0_MAPSR 0x00011006 diff --git a/arch/arm/boards/solidrun-microsom/1066mhz-4x256mx16.imxcfg b/arch/arm/boards/solidrun-microsom/1066mhz-4x256mx16.imxcfg new file mode 100644 index 0000000000..ac336e532b --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/1066mhz-4x256mx16.imxcfg @@ -0,0 +1,70 @@ +/* + * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2013 SolidRun ltd. + * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390003 +wm 32 MX6_MMDC_P1_MPZQHWCTRL 0xa1390003 +wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x00000000 +wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x00000000 +wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x00000000 +wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x00000000 +wm 32 MX6_MMDC_P0_MPDGCTRL0 0x0314031c +wm 32 MX6_MMDC_P0_MPDGCTRL1 0x023e0304 +wm 32 MX6_MMDC_P1_MPDGCTRL0 0x03240330 +wm 32 MX6_MMDC_P1_MPDGCTRL1 0x03180260 +wm 32 MX6_MMDC_P0_MPRDDLCTL 0x3630323c +wm 32 MX6_MMDC_P1_MPRDDLCTL 0x3436283a +wm 32 MX6_MMDC_P0_MPWRDLCTL 0x36344038 +wm 32 MX6_MMDC_P1_MPWRDLCTL 0x422a423c +wm 32 MX6_MMDC_P0_MPRDDQBY0DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY1DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY2DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY3DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY0DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY1DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY2DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333 +wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 +wm 32 MX6_MMDC_P1_MPMUR0 0x00000800 +wm 32 MX6_MMDC_P0_MDPDC 0x00025576 +wm 32 MX6_MMDC_P0_MDOTC 0x09444040 +wm 32 MX6_MMDC_P0_MDCFG0 0x898E7975 +wm 32 MX6_MMDC_P0_MDCFG1 0xFF328F64 +wm 32 MX6_MMDC_P0_MDCFG2 0x01FF00DB +wm 32 MX6_MMDC_P0_MDMISC 0x00011740 +wm 32 MX6_MMDC_P0_MDSCR 0x00008000 +wm 32 MX6_MMDC_P0_MDRWD 0x000026d2 +wm 32 MX6_MMDC_P0_MDOR 0x005B0E21 +wm 32 MX6_MMDC_P0_MDASP 0x00000047 +wm 32 MX6_MMDC_P0_MAARCR 0x11420000 +wm 32 MX6_MMDC_P0_MDCTL 0x841A0000 +wm 32 MX6_MMDC_P0_MDSCR 0x02088032 +wm 32 MX6_MMDC_P0_MDSCR 0x0208803A +wm 32 MX6_MMDC_P0_MDSCR 0x00008033 +wm 32 MX6_MMDC_P0_MDSCR 0x0000803B +wm 32 MX6_MMDC_P0_MDSCR 0x00408031 +wm 32 MX6_MMDC_P0_MDSCR 0x00408039 +wm 32 MX6_MMDC_P0_MDSCR 0x09408030 +wm 32 MX6_MMDC_P0_MDSCR 0x09408038 +wm 32 MX6_MMDC_P0_MDSCR 0x04008040 +wm 32 MX6_MMDC_P0_MDSCR 0x04008048 +wm 32 MX6_MMDC_P0_MDREF 0x00005800 +wm 32 MX6_MMDC_P0_MPODTCTRL 0x00000007 +wm 32 MX6_MMDC_P1_MPODTCTRL 0x00000007 +wm 32 MX6_MMDC_P0_MDSCR 0x00000000 +wm 32 MX6_MMDC_P0_MAPSR 0x00011006 diff --git a/arch/arm/boards/solidrun-microsom/1066mhz-64b.imxcfg b/arch/arm/boards/solidrun-microsom/1066mhz-64b.imxcfg new file mode 100644 index 0000000000..c8e5a0ced1 --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/1066mhz-64b.imxcfg @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2013 SolidRun ltd. + * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +wm 32 MX6_IOM_GRP_DDR_TYPE 0x000C0000 +wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 +wm 32 MX6_IOM_DRAM_SDCLK_0 0x00020030 +wm 32 MX6_IOM_DRAM_SDCLK_1 0x00020030 +wm 32 MX6_IOM_DRAM_CAS 0x00020030 +wm 32 MX6_IOM_DRAM_RAS 0x00020030 +wm 32 MX6_IOM_GRP_ADDDS 0x00000030 +wm 32 MX6_IOM_DRAM_RESET 0x00020030 +wm 32 MX6_IOM_DRAM_SDCKE0 0x00003000 +wm 32 MX6_IOM_DRAM_SDCKE1 0x00003000 +wm 32 MX6_IOM_DRAM_SDBA2 0x00000000 +wm 32 MX6_IOM_DRAM_SDODT0 0x00003030 +wm 32 MX6_IOM_DRAM_SDODT1 0x00003030 +wm 32 MX6_IOM_DDRMODE_CTL 0x00020000 +wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS1 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS2 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS3 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS4 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS5 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS6 0x00000030 +wm 32 MX6_IOM_DRAM_SDQS7 0x00000030 +wm 32 MX6_IOM_GRP_DDRMODE 0x00020000 +wm 32 MX6_IOM_GRP_B0DS 0x00000030 +wm 32 MX6_IOM_GRP_B1DS 0x00000030 +wm 32 MX6_IOM_GRP_B2DS 0x00000030 +wm 32 MX6_IOM_GRP_B3DS 0x00000030 +wm 32 MX6_IOM_GRP_B4DS 0x00000030 +wm 32 MX6_IOM_GRP_B5DS 0x00000030 +wm 32 MX6_IOM_GRP_B6DS 0x00000030 +wm 32 MX6_IOM_GRP_B7DS 0x00000030 +wm 32 MX6_IOM_DRAM_DQM0 0x00020030 +wm 32 MX6_IOM_DRAM_DQM1 0x00020030 +wm 32 MX6_IOM_DRAM_DQM2 0x00020030 +wm 32 MX6_IOM_DRAM_DQM3 0x00020030 +wm 32 MX6_IOM_DRAM_DQM4 0x00020030 +wm 32 MX6_IOM_DRAM_DQM5 0x00020030 +wm 32 MX6_IOM_DRAM_DQM6 0x00020030 +wm 32 MX6_IOM_DRAM_DQM7 0x00020030 diff --git a/arch/arm/boards/solidrun-microsom/800mhz-2x128mx16.imxcfg b/arch/arm/boards/solidrun-microsom/800mhz-2x128mx16.imxcfg new file mode 100644 index 0000000000..affb011dd9 --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/800mhz-2x128mx16.imxcfg @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2013 SolidRun ltd. + * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390003 +wm 32 MX6_MMDC_P1_MPZQHWCTRL 0xa1390003 +wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x005a0057 +wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x004a0052 +wm 32 MX6_MMDC_P0_MPDGCTRL0 0x02480240 +wm 32 MX6_MMDC_P0_MPDGCTRL1 0x02340230 +wm 32 MX6_MMDC_P0_MPRDDLCTL 0x40404440 +wm 32 MX6_MMDC_P0_MPWRDLCTL 0x38343034 +wm 32 MX6_MMDC_P0_MPRDDQBY0DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY1DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY2DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY3DL 0x33333333 +wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 +wm 32 MX6_MMDC_P1_MPMUR0 0x00000800 +wm 32 MX6_MMDC_P0_MDPDC 0x0002002d +wm 32 MX6_MMDC_P0_MDOTC 0x00333040 +wm 32 MX6_MMDC_P0_MDCFG0 0x3f435313 +wm 32 MX6_MMDC_P0_MDCFG1 0xb66e8b63 +wm 32 MX6_MMDC_P0_MDCFG2 0x01ff00db +wm 32 MX6_MMDC_P0_MDMISC 0x00011740 +wm 32 MX6_MMDC_P0_MDSCR 0x00008000 +wm 32 MX6_MMDC_P0_MDRWD 0x000026d2 +wm 32 MX6_MMDC_P0_MDOR 0x00431023 +wm 32 MX6_MMDC_P0_MDASP 0x00000017 +wm 32 MX6_MMDC_P0_MAARCR 0x11420000 +wm 32 MX6_MMDC_P0_MDCTL 0x83190000 +wm 32 MX6_MMDC_P0_MDSCR 0x00008032 +wm 32 MX6_MMDC_P0_MDSCR 0x00008033 +wm 32 MX6_MMDC_P0_MDSCR 0x00008031 +wm 32 MX6_MMDC_P0_MDSCR 0x05208030 +wm 32 MX6_MMDC_P0_MDSCR 0x04008040 +wm 32 MX6_MMDC_P0_MDREF 0x00007800 +wm 32 MX6_MMDC_P0_MPODTCTRL 0x00000007 +wm 32 MX6_MMDC_P0_MDPDC 0x0002556d +wm 32 MX6_MMDC_P0_MAPSR 0x00011006 +wm 32 MX6_MMDC_P0_MDSCR 0x00000000 diff --git a/arch/arm/boards/solidrun-microsom/800mhz-32b.imxcfg b/arch/arm/boards/solidrun-microsom/800mhz-32b.imxcfg new file mode 100644 index 0000000000..91322f4603 --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/800mhz-32b.imxcfg @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2013 SolidRun ltd. + * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +wm 32 MX6_IOM_GRP_DDR_TYPE 0x000c0000 +wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 +wm 32 MX6_IOM_DRAM_SDCLK_0 0x00000028 +wm 32 MX6_IOM_DRAM_SDCLK_1 0x00000028 +wm 32 MX6_IOM_DRAM_CAS 0x00000010 +wm 32 MX6_IOM_DRAM_RAS 0x00000010 +wm 32 MX6_IOM_GRP_ADDDS 0x00000010 +wm 32 MX6_IOM_DRAM_RESET 0x00000010 +wm 32 MX6_IOM_DRAM_SDCKE0 0x00003000 +wm 32 MX6_IOM_DRAM_SDCKE1 0x00003000 +wm 32 MX6_IOM_DRAM_SDBA2 0x00000000 +wm 32 MX6_IOM_DRAM_SDODT0 0x00000010 +wm 32 MX6_IOM_DRAM_SDODT1 0x00000010 +wm 32 MX6_IOM_GRP_CTLDS 0x00000010 +wm 32 MX6_IOM_DDRMODE_CTL 0x00020000 +wm 32 MX6_IOM_DRAM_SDQS0 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS1 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS2 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS3 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS4 0x00000000 +wm 32 MX6_IOM_DRAM_SDQS5 0x00000000 +wm 32 MX6_IOM_DRAM_SDQS6 0x00000000 +wm 32 MX6_IOM_DRAM_SDQS7 0x00000000 +wm 32 MX6_IOM_GRP_DDRMODE 0x00020000 +wm 32 MX6_IOM_GRP_B0DS 0x00000028 +wm 32 MX6_IOM_GRP_B1DS 0x00000028 +wm 32 MX6_IOM_GRP_B2DS 0x00000028 +wm 32 MX6_IOM_GRP_B3DS 0x00000028 +wm 32 MX6_IOM_GRP_B4DS 0x00000000 +wm 32 MX6_IOM_GRP_B5DS 0x00000000 +wm 32 MX6_IOM_GRP_B6DS 0x00000000 +wm 32 MX6_IOM_GRP_B7DS 0x00000000 +wm 32 MX6_IOM_DRAM_DQM0 0x00000028 +wm 32 MX6_IOM_DRAM_DQM1 0x00000028 +wm 32 MX6_IOM_DRAM_DQM2 0x00000028 +wm 32 MX6_IOM_DRAM_DQM3 0x00000028 +wm 32 MX6_IOM_DRAM_DQM4 0x00000000 +wm 32 MX6_IOM_DRAM_DQM5 0x00000000 +wm 32 MX6_IOM_DRAM_DQM6 0x00000000 +wm 32 MX6_IOM_DRAM_DQM7 0x00000000 diff --git a/arch/arm/boards/solidrun-microsom/800mhz-4x128mx16.imxcfg b/arch/arm/boards/solidrun-microsom/800mhz-4x128mx16.imxcfg new file mode 100644 index 0000000000..384e6fde42 --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/800mhz-4x128mx16.imxcfg @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2013 SolidRun ltd. + * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390003 +wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x0045004D +wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x003A0047 +wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x001F001F +wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x00210035 +wm 32 MX6_MMDC_P0_MPDGCTRL0 0x023C0224 +wm 32 MX6_MMDC_P0_MPDGCTRL1 0x02000220 +wm 32 MX6_MMDC_P1_MPDGCTRL0 0x02200220 +wm 32 MX6_MMDC_P1_MPDGCTRL1 0x02040208 +wm 32 MX6_MMDC_P0_MPRDDLCTL 0x44444846 +wm 32 MX6_MMDC_P1_MPRDDLCTL 0x4042463C +wm 32 MX6_MMDC_P0_MPWRDLCTL 0x32343032 +wm 32 MX6_MMDC_P1_MPWRDLCTL 0x36363430 +wm 32 MX6_MMDC_P0_MPRDDQBY0DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY1DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY2DL 0x33333333 +wm 32 MX6_MMDC_P0_MPRDDQBY3DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY0DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY1DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY2DL 0x33333333 +wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333 +wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 +wm 32 MX6_MMDC_P1_MPMUR0 0x00000800 +wm 32 MX6_MMDC_P0_MDPDC 0x0002002d +wm 32 MX6_MMDC_P0_MDOTC 0x00333040 +wm 32 MX6_MMDC_P0_MDCFG0 0x3F4352F3 +wm 32 MX6_MMDC_P0_MDCFG1 0xB66D8B63 +wm 32 MX6_MMDC_P0_MDCFG2 0x01FF00DB +wm 32 MX6_MMDC_P0_MDMISC 0x00011740 +wm 32 MX6_MMDC_P0_MDSCR 0x00008000 +wm 32 MX6_MMDC_P0_MDRWD 0x000026d2 +wm 32 MX6_MMDC_P0_MDOR 0x00431023 +wm 32 MX6_MMDC_P0_MDASP 0x00000027 +wm 32 MX6_MMDC_P0_MDCTL 0x831A0000 +wm 32 MX6_MMDC_P0_MDSCR 0x02008032 +wm 32 MX6_MMDC_P0_MDSCR 0x00008033 +wm 32 MX6_MMDC_P0_MDSCR 0x04008031 +wm 32 MX6_MMDC_P0_MDSCR 0x05208030 +wm 32 MX6_MMDC_P0_MDSCR 0x04008040 +wm 32 MX6_MMDC_P0_MDREF 0x00007800 +wm 32 MX6_MMDC_P0_MPODTCTRL 0x00000007 +wm 32 MX6_MMDC_P1_MPODTCTRL 0x00000007 +wm 32 MX6_MMDC_P0_MDPDC 0x0002556d +wm 32 MX6_MMDC_P0_MAPSR 0x00011006 +wm 32 MX6_MMDC_P0_MDSCR 0x00000000 diff --git a/arch/arm/boards/solidrun-microsom/800mhz-64b.imxcfg b/arch/arm/boards/solidrun-microsom/800mhz-64b.imxcfg new file mode 100644 index 0000000000..021b40b9ef --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/800mhz-64b.imxcfg @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2013 Boundary Devices + * Copyright (C) 2013 SolidRun ltd. + * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +wm 32 MX6_IOM_GRP_DDR_TYPE 0x000c0000 +wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 +wm 32 MX6_IOM_DRAM_SDCLK_0 0x00000028 +wm 32 MX6_IOM_DRAM_SDCLK_1 0x00000028 +wm 32 MX6_IOM_DRAM_CAS 0x00000028 +wm 32 MX6_IOM_DRAM_RAS 0x00000028 +wm 32 MX6_IOM_GRP_ADDDS 0x00000028 +wm 32 MX6_IOM_DRAM_RESET 0x00000028 +wm 32 MX6_IOM_DRAM_SDBA2 0x00000000 +wm 32 MX6_IOM_DRAM_SDODT0 0x00000028 +wm 32 MX6_IOM_DRAM_SDODT1 0x00000028 +wm 32 MX6_IOM_GRP_CTLDS 0x00000028 +wm 32 MX6_IOM_DDRMODE_CTL 0x00020000 +wm 32 MX6_IOM_DRAM_SDQS0 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS1 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS2 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS3 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS4 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS5 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS6 0x00000028 +wm 32 MX6_IOM_DRAM_SDQS7 0x00000028 +wm 32 MX6_IOM_GRP_DDRMODE 0x00020000 +wm 32 MX6_IOM_GRP_B0DS 0x00000028 +wm 32 MX6_IOM_GRP_B1DS 0x00000028 +wm 32 MX6_IOM_GRP_B2DS 0x00000028 +wm 32 MX6_IOM_GRP_B3DS 0x00000028 +wm 32 MX6_IOM_GRP_B4DS 0x00000028 +wm 32 MX6_IOM_GRP_B5DS 0x00000028 +wm 32 MX6_IOM_GRP_B6DS 0x00000028 +wm 32 MX6_IOM_GRP_B7DS 0x00000028 +wm 32 MX6_IOM_DRAM_DQM0 0x00000028 +wm 32 MX6_IOM_DRAM_DQM1 0x00000028 +wm 32 MX6_IOM_DRAM_DQM2 0x00000028 +wm 32 MX6_IOM_DRAM_DQM3 0x00000028 +wm 32 MX6_IOM_DRAM_DQM4 0x00000028 +wm 32 MX6_IOM_DRAM_DQM5 0x00000028 +wm 32 MX6_IOM_DRAM_DQM6 0x00000028 +wm 32 MX6_IOM_DRAM_DQM7 0x00000028 diff --git a/arch/arm/boards/solidrun-microsom/Makefile b/arch/arm/boards/solidrun-microsom/Makefile index 8b4754e1c1..01c7a259e9 100644 --- a/arch/arm/boards/solidrun-microsom/Makefile +++ b/arch/arm/boards/solidrun-microsom/Makefile @@ -1,3 +1,2 @@ -obj-y += board.o flash-header-solidrun-hummingboard.dcd.o -extra-y += flash-header-solidrun-hummingboard.dcd.S flash-header-solidrun-hummingboard.dcd +obj-y += board.o lwl-y += lowlevel.o diff --git a/arch/arm/boards/solidrun-microsom/board.c b/arch/arm/boards/solidrun-microsom/board.c index c231c17103..28a60b9e8c 100644 --- a/arch/arm/boards/solidrun-microsom/board.c +++ b/arch/arm/boards/solidrun-microsom/board.c @@ -25,6 +25,7 @@ #include <mach/imx6-regs.h> #include <mach/imx6.h> #include <mfd/imx6q-iomuxc-gpr.h> +#include <linux/clk.h> #include <linux/sizes.h> #include <linux/phy.h> @@ -61,12 +62,26 @@ static int ar8035_phy_fixup(struct phy_device *dev) return 0; } +static void microsom_eth_init(void) +{ + void __iomem *iomux = (void *)MX6_IOMUXC_BASE_ADDR; + u32 val; + + clk_set_rate(clk_lookup("enet_ref"), 25000000); + + val = readl(iomux + IOMUXC_GPR1); + val |= IMX6Q_GPR1_ENET_CLK_SEL_ANATOP; + writel(val, iomux + IOMUXC_GPR1); + + phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup); +} static int hummingboard_device_init(void) { - if (!of_machine_is_compatible("solidrun,hummingboard/dl")) + if (!of_machine_is_compatible("solidrun,hummingboard/dl") && + !of_machine_is_compatible("solidrun,hummingboard/q")) return 0; - phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup); + microsom_eth_init(); /* enable USB VBUS */ gpio_direction_output(IMX_GPIO_NR(3, 22), 1); @@ -80,7 +95,8 @@ device_initcall(hummingboard_device_init); static int hummingboard_late_init(void) { - if (!of_machine_is_compatible("solidrun,hummingboard/dl")) + if (!of_machine_is_compatible("solidrun,hummingboard/dl") && + !of_machine_is_compatible("solidrun,hummingboard/q")) return 0; imx6_bbu_internal_mmc_register_handler("sdcard", "/dev/mmc1.barebox", diff --git a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i1.imxcfg b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i1.imxcfg new file mode 100644 index 0000000000..eb7bc8486d --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i1.imxcfg @@ -0,0 +1,9 @@ +loadaddr 0x10000000 +soc imx6 +dcdofs 0x400 + +#include <mach/imx6-ddr-regs.h> +#include <mach/imx6dl-ddr-regs.h> + +#include "800mhz-32b.imxcfg" +#include "800mhz-2x128mx16.imxcfg" diff --git a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2.imxcfg b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2.imxcfg new file mode 100644 index 0000000000..8930012885 --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2.imxcfg @@ -0,0 +1,9 @@ +loadaddr 0x10000000 +soc imx6 +dcdofs 0x400 + +#include <mach/imx6-ddr-regs.h> +#include <mach/imx6dl-ddr-regs.h> + +#include "800mhz-64b.imxcfg" +#include "800mhz-4x128mx16.imxcfg" diff --git a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2eX.imxcfg b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2eX.imxcfg new file mode 100644 index 0000000000..4eb937a717 --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i2eX.imxcfg @@ -0,0 +1,9 @@ +loadaddr 0x10000000 +soc imx6 +dcdofs 0x400 + +#include <mach/imx6-ddr-regs.h> +#include <mach/imx6q-ddr-regs.h> + +#include "1066mhz-64b.imxcfg" +#include "1066mhz-4x128mx16.imxcfg" diff --git a/arch/arm/boards/solidrun-microsom/flash-header-microsom-i4.imxcfg b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i4.imxcfg new file mode 100644 index 0000000000..438bd8ea4d --- /dev/null +++ b/arch/arm/boards/solidrun-microsom/flash-header-microsom-i4.imxcfg @@ -0,0 +1,9 @@ +loadaddr 0x10000000 +soc imx6 +dcdofs 0x400 + +#include <mach/imx6-ddr-regs.h> +#include <mach/imx6q-ddr-regs.h> + +#include "1066mhz-64b.imxcfg" +#include "1066mhz-4x256mx16.imxcfg" diff --git a/arch/arm/boards/solidrun-microsom/flash-header-solidrun-hummingboard.imxcfg b/arch/arm/boards/solidrun-microsom/flash-header-solidrun-hummingboard.imxcfg deleted file mode 100644 index b1856b49ce..0000000000 --- a/arch/arm/boards/solidrun-microsom/flash-header-solidrun-hummingboard.imxcfg +++ /dev/null @@ -1,79 +0,0 @@ -loadaddr 0x10000000 -soc imx6 -dcdofs 0x400 -wm 32 0x020e0774 0x000c0000 -wm 32 0x020e0754 0x00000000 -wm 32 0x020e04ac 0x00000030 -wm 32 0x020e04b0 0x00000030 -wm 32 0x020e0464 0x00000030 -wm 32 0x020e0490 0x00000030 -wm 32 0x020e074c 0x00000030 -wm 32 0x020e0494 0x00000030 -wm 32 0x020e04a4 0x00003000 -wm 32 0x020e04a8 0x00003000 -wm 32 0x020e04a0 0x00000000 -wm 32 0x020e04b4 0x00003030 -wm 32 0x020e04b8 0x00003030 -wm 32 0x020e076c 0x00000030 -wm 32 0x020e0750 0x00000000 -wm 32 0x020e04bc 0x00000030 -wm 32 0x020e04c0 0x00000030 -wm 32 0x020e04c4 0x00000030 -wm 32 0x020e04c8 0x00000030 -wm 32 0x020e04cc 0x00000000 -wm 32 0x020e04d0 0x00000000 -wm 32 0x020e04d4 0x00000000 -wm 32 0x020e04d8 0x00000000 -wm 32 0x020e0760 0x00000000 -wm 32 0x020e0764 0x00000030 -wm 32 0x020e0770 0x00000030 -wm 32 0x020e0778 0x00000030 -wm 32 0x020e077c 0x00000030 -wm 32 0x020e0780 0x00000000 -wm 32 0x020e0784 0x00000000 -wm 32 0x020e078c 0x00000000 -wm 32 0x020e0748 0x00000000 -wm 32 0x020e0470 0x00000030 -wm 32 0x020e0474 0x00000030 -wm 32 0x020e0478 0x00000030 -wm 32 0x020e047c 0x00000030 -wm 32 0x020e0480 0x00000000 -wm 32 0x020e0484 0x00000000 -wm 32 0x020e0488 0x00000000 -wm 32 0x020e048c 0x00000000 -wm 32 0x021b0800 0xa1390003 -wm 32 0x021b4800 0xa1390003 -wm 32 0x021b080c 0x000F0011 -wm 32 0x021b0810 0x000E000F -wm 32 0x021b083c 0x42240229 -wm 32 0x021b0840 0x021a0219 -wm 32 0x021b0848 0x4e4f5150 -wm 32 0x021b0850 0x35363136 -wm 32 0x021b081c 0x33333333 -wm 32 0x021b0820 0x33333333 -wm 32 0x021b0824 0x33333333 -wm 32 0x021b0828 0x33333333 -wm 32 0x021b08b8 0x00000800 -wm 32 0x021b48b8 0x00000800 -wm 32 0x021b0004 0x0002002d -wm 32 0x021b0008 0x00333030 -wm 32 0x021b000c 0x40445323 -wm 32 0x021b0010 0xb68e8c63 -wm 32 0x021b0014 0x01ff00db -wm 32 0x021b0018 0x00001740 -wm 32 0x021b001c 0x00008000 -wm 32 0x021b002c 0x000026d2 -wm 32 0x021b0030 0x00440e21 -wm 32 0x021b0040 0x00000017 -wm 32 0x021b0400 0x11420000 -wm 32 0x021b0000 0x83190000 -wm 32 0x021b001c 0x04008032 -wm 32 0x021b001c 0x00008033 -wm 32 0x021b001c 0x00428031 -wm 32 0x021b001c 0x07208030 -wm 32 0x021b001c 0x04008040 -wm 32 0x021b0020 0x00005800 -wm 32 0x021b0818 0x00000007 -wm 32 0x021b0004 0x0002556d -wm 32 0x021b0404 0x00011006 -wm 32 0x021b001c 0x00000000 diff --git a/arch/arm/boards/solidrun-microsom/lowlevel.c b/arch/arm/boards/solidrun-microsom/lowlevel.c index 30f4a3f591..54f1cdf9f4 100644 --- a/arch/arm/boards/solidrun-microsom/lowlevel.c +++ b/arch/arm/boards/solidrun-microsom/lowlevel.c @@ -5,8 +5,9 @@ #include <asm/barebox-arm.h> extern char __dtb_imx6dl_hummingboard_start[]; +extern char __dtb_imx6q_hummingboard_start[]; -ENTRY_FUNCTION(start_imx6dl_hummingboard, r0, r1, r2) +ENTRY_FUNCTION(start_hummingboard_microsom_i1, r0, r1, r2) { void *fdt; @@ -15,3 +16,33 @@ ENTRY_FUNCTION(start_imx6dl_hummingboard, r0, r1, r2) fdt = __dtb_imx6dl_hummingboard_start - get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_512M, fdt); } + +ENTRY_FUNCTION(start_hummingboard_microsom_i2, r0, r1, r2) +{ + void *fdt; + + imx6_cpu_lowlevel_init(); + + fdt = __dtb_imx6dl_hummingboard_start - get_runtime_offset(); + barebox_arm_entry(0x10000000, SZ_1G, fdt); +} + +ENTRY_FUNCTION(start_hummingboard_microsom_i2ex, r0, r1, r2) +{ + void *fdt; + + imx6_cpu_lowlevel_init(); + + fdt = __dtb_imx6q_hummingboard_start - get_runtime_offset(); + barebox_arm_entry(0x10000000, SZ_1G, fdt); +} + +ENTRY_FUNCTION(start_hummingboard_microsom_i4, r0, r1, r2) +{ + void *fdt; + + imx6_cpu_lowlevel_init(); + + fdt = __dtb_imx6q_hummingboard_start - get_runtime_offset(); + barebox_arm_entry(0x10000000, SZ_2G, fdt); +} diff --git a/arch/arm/boards/zylonite/board.c b/arch/arm/boards/zylonite/board.c index 2caadbcecc..2ff08b7934 100644 --- a/arch/arm/boards/zylonite/board.c +++ b/arch/arm/boards/zylonite/board.c @@ -28,6 +28,8 @@ #include <net/smc91111.h> #include <platform_data/mtd-nand-mrvl.h> #include <pwm.h> +#include <linux/clk.h> +#include <linux/clkdev.h> #include <linux/sizes.h> #include <mach/devices.h> @@ -60,11 +62,16 @@ static mfp_cfg_t pxa310_mfp_cfg[] = { static int zylonite_devices_init(void) { + struct clk *clk; + armlinux_set_architecture(MACH_TYPE_ZYLONITE); pxa_add_uart((void *)0x40100000, 0); add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL, 0x14000300, 0x100000, IORESOURCE_MEM, &smsc91x_pdata); + clk = clk_get_sys("nand", NULL); + if (!IS_ERR(clk)) + clkdev_add_physbase(clk, 0x43100000, NULL); add_generic_device("mrvl_nand", DEVICE_ID_DYNAMIC, NULL, 0x43100000, 0x1000, IORESOURCE_MEM, &nand_pdata); devfs_add_partition("nand0", SZ_1M, SZ_256K, DEVFS_PARTITION_FIXED, diff --git a/arch/arm/configs/eukrea_cpuimx35_defconfig b/arch/arm/configs/eukrea_cpuimx35_defconfig index 4c83102ce1..c1638270a2 100644 --- a/arch/arm/configs/eukrea_cpuimx35_defconfig +++ b/arch/arm/configs/eukrea_cpuimx35_defconfig @@ -77,6 +77,7 @@ CONFIG_NAND_ALLOW_ERASE_BAD=y CONFIG_NAND_IMX=y CONFIG_NAND_IMX_BBM=y CONFIG_USB_HOST=y +CONFIG_USB_IMX_CHIPIDEA=y CONFIG_USB_EHCI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig index 0f3812595d..82b3821d91 100644 --- a/arch/arm/configs/imx_v7_defconfig +++ b/arch/arm/configs/imx_v7_defconfig @@ -4,10 +4,10 @@ CONFIG_MACH_EFIKA_MX_SMARTBOOK=y CONFIG_MACH_EMBEDSKY_E9=y CONFIG_MACH_FREESCALE_MX51_PDK=y CONFIG_MACH_FREESCALE_MX53_LOCO=y +CONFIG_MACH_CCMX53=y CONFIG_MACH_TQMA53=y CONFIG_MACH_FREESCALE_MX53_VMX53=y -CONFIG_MACH_PCAAXL3=y -CONFIG_MACH_PHYTEC_PFLA02=y +CONFIG_MACH_PHYTEC_SOM_IMX6=y CONFIG_MACH_DFI_FS700_M60=y CONFIG_MACH_GUF_SANTARO=y CONFIG_MACH_REALQ7=y diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c index e8191ecde5..eb12166c16 100644 --- a/arch/arm/cpu/cpu.c +++ b/arch/arm/cpu/cpu.c @@ -121,29 +121,3 @@ static int arm_request_stack(void) return 0; } coredevice_initcall(arm_request_stack); - -#ifdef CONFIG_THUMB2_BAREBOX -static void thumb2_execute(void *func, int argc, char *argv[]) -{ - /* - * Switch back to ARM mode before executing external - * programs. - */ - __asm__ __volatile__ ( - "mov r0, #0\n" - "mov r1, %0\n" - "mov r2, %1\n" - "bx %2\n" - : - : "r" (argc - 1), "r" (&argv[1]), "r" (func) - : "r0", "r1", "r2" - ); -} - -static int execute_init(void) -{ - do_execute = thumb2_execute; - return 0; -} -postcore_initcall(execute_init); -#endif diff --git a/arch/arm/cpu/interrupts.c b/arch/arm/cpu/interrupts.c index c437af7188..fb4bb78dae 100644 --- a/arch/arm/cpu/interrupts.c +++ b/arch/arm/cpu/interrupts.c @@ -71,13 +71,6 @@ void show_regs (struct pt_regs *regs) #endif } -#ifdef CONFIG_ARM_UNWIND -void dump_stack(void) -{ - unwind_backtrace(NULL); -} -#endif - static void __noreturn do_exception(struct pt_regs *pt_regs) { show_regs(pt_regs); diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index 81c23947b7..784221ce13 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -163,23 +163,11 @@ static void dma_inv_range(unsigned long start, unsigned long end) __dma_inv_range(start, end); } -int arch_remap_range(void *_start, size_t size, unsigned flags) +static int __remap_range(void *_start, size_t size, u32 pte_flags) { unsigned long start = (unsigned long)_start; u32 *p; int numentries, i; - u32 pte_flags; - - switch (flags) { - case MAP_CACHED: - pte_flags = pte_flags_cached; - break; - case MAP_UNCACHED: - pte_flags = pte_flags_uncached; - break; - default: - return -EINVAL; - } numentries = size >> PAGE_SHIFT; p = find_pte(start); @@ -197,6 +185,24 @@ int arch_remap_range(void *_start, size_t size, unsigned flags) return 0; } +int arch_remap_range(void *start, size_t size, unsigned flags) +{ + u32 pte_flags; + + switch (flags) { + case MAP_CACHED: + pte_flags = pte_flags_cached; + break; + case MAP_UNCACHED: + pte_flags = pte_flags_uncached; + break; + default: + return -EINVAL; + } + + return __remap_range(start, size, pte_flags); +} + void *map_io_sections(unsigned long phys, void *_start, size_t size) { unsigned long start = (unsigned long)_start, sec; @@ -412,7 +418,7 @@ void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle) dma_inv_range((unsigned long)ret, (unsigned long)ret + size); - remap_range(ret, size, pte_flags_uncached); + __remap_range(ret, size, pte_flags_uncached); return ret; } @@ -428,7 +434,7 @@ void *dma_alloc_writecombine(size_t size, dma_addr_t *dma_handle) dma_inv_range((unsigned long)ret, (unsigned long)ret + size); - remap_range(ret, size, pte_flags_wc); + __remap_range(ret, size, pte_flags_wc); return ret; } @@ -446,7 +452,7 @@ void *phys_to_virt(unsigned long phys) void dma_free_coherent(void *mem, dma_addr_t dma_handle, size_t size) { size = PAGE_ALIGN(size); - remap_range(mem, size, pte_flags_cached); + __remap_range(mem, size, pte_flags_cached); free(mem); } diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index 64b0dd88dd..c054f3c440 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -147,7 +147,7 @@ __noreturn void barebox_non_pbl_start(unsigned long membase, name = "DTB"; } else if (blob_is_compressed_fdt(boarddata)) { struct barebox_arm_boarddata_compressed_dtb *bd = boarddata; - totalsize = bd->datalen; + totalsize = bd->datalen + sizeof(*bd); name = "Compressed DTB"; } else if (blob_is_arm_boarddata(boarddata)) { totalsize = sizeof(struct barebox_arm_boarddata); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c87bd93660..49a2f994ae 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -18,6 +18,7 @@ pbl-dtb-$(CONFIG_MACH_EMBEST_RIOTBOARD) += imx6s-riotboard.dtb.o pbl-dtb-$(CONFIG_MACH_EMBEDSKY_E9) += imx6q-embedsky-e9.dtb.o pbl-dtb-$(CONFIG_MACH_FREESCALE_MX51_PDK) += imx51-babbage.dtb.o pbl-dtb-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += imx53-qsb.dtb.o imx53-qsrb.dtb.o +pbl-dtb-$(CONFIG_MACH_CCMX53) += imx53-ccxmx53.dtb.o pbl-dtb-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += imx53-voipac-bsb.dtb.o pbl-dtb-$(CONFIG_MACH_GK802) += imx6q-gk802.dtb.o pbl-dtb-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += kirkwood-guruplug-server-plus-bb.dtb.o @@ -31,7 +32,6 @@ pbl-dtb-$(CONFIG_MACH_NITROGEN6X) += imx6q-nitrogen6x.dtb.o imx6dl-nitrogen6x.dt pbl-dtb-$(CONFIG_MACH_NVIDIA_BEAVER) += tegra30-beaver.dtb.o pbl-dtb-$(CONFIG_MACH_NVIDIA_JETSON) += tegra124-jetson-tk1.dtb.o pbl-dtb-$(CONFIG_MACH_PCA100) += imx27-phytec-phycard-s-rdk-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_PCAAXL3) += imx6q-phytec-pbaa03.dtb.o pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am335x-phytec-phyflex-som-mlo.dtb.o \ am335x-phytec-phyflex-som-no-spi.dtb.o am335x-phytec-phyflex-som-no-eeprom.dtb.o \ @@ -39,7 +39,15 @@ pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am33 am335x-phytec-phycore-som.dtb.o am335x-phytec-phycore-som-no-spi.dtb.o am335x-phytec-phycore-som-mlo.dtb.o \ am335x-phytec-phycore-som-no-eeprom.dtb.o am335x-phytec-phycore-som-no-spi-no-eeprom.dtb.o \ am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o -pbl-dtb-$(CONFIG_MACH_PHYTEC_PFLA02) += imx6s-phytec-pbab01.dtb.o imx6dl-phytec-pbab01.dtb.o imx6q-phytec-pbab01.dtb.o imx6q-phytec-phyboard-alcor.dtb.o imx6dl-phytec-phyboard-subra.dtb.o +pbl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-pbaa03.dtb.o \ + imx6s-phytec-pbab01.dtb.o \ + imx6dl-phytec-pbab01.dtb.o \ + imx6q-phytec-pbab01.dtb.o \ + imx6q-phytec-phyboard-alcor.dtb.o \ + imx6dl-phytec-phyboard-subra.dtb.o \ + imx6q-phytec-phycore-som-nand.dtb.o \ + imx6q-phytec-phycore-som-emmc.dtb.o \ + imx6dl-phytec-phycore-som-nand.dtb.o pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += armada-xp-openblocks-ax3-4-bb.dtb.o pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += kirkwood-openblocks_a6-bb.dtb.o pbl-dtb-$(CONFIG_MACH_RADXA_ROCK) += rk3188-radxarock.dtb.o @@ -51,7 +59,7 @@ pbl-dtb-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += socfpga_cyclone5_socdk.dtb.o pbl-dtb-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o pbl-dtb-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o pbl-dtb-$(CONFIG_MACH_SOLIDRUN_CUBOX) += dove-cubox-bb.dtb.o -pbl-dtb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o +pbl-dtb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingboard.dtb.o pbl-dtb-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += imx6q-wandboard.dtb.o imx6dl-wandboard.dtb.o pbl-dtb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += tegra20-colibri-iris.dtb.o pbl-dtb-$(CONFIG_MACH_TOSHIBA_AC100) += tegra20-paz00.dtb.o diff --git a/arch/arm/dts/imx53-ccxmx53.dts b/arch/arm/dts/imx53-ccxmx53.dts new file mode 100644 index 0000000000..ac6103ad83 --- /dev/null +++ b/arch/arm/dts/imx53-ccxmx53.dts @@ -0,0 +1,15 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <arm/imx53-ccxmx53.dts> +#include "imx53-ccxmx53.dtsi" +#include "imx53.dtsi" diff --git a/arch/arm/dts/imx53-ccxmx53.dtsi b/arch/arm/dts/imx53-ccxmx53.dtsi new file mode 100644 index 0000000000..6f76d2867a --- /dev/null +++ b/arch/arm/dts/imx53-ccxmx53.dtsi @@ -0,0 +1,35 @@ +/ { + chosen { + linux,stdout-path = &uart1; + + environment@0 { + compatible = "barebox,environment"; + device-path = &nfc, "partname:environment"; + }; + }; +}; + +&nfc { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x80000>; + }; + + partition@1 { + label = "environment"; + reg = <0x80000 0x80000>; + }; + + partition@2 { + label = "kernel"; + reg = <0x100000 0x400000>; + }; + + partition@3 { + label = "rootfs"; + reg = <0x500000 0x07B00000>; + }; +}; diff --git a/arch/arm/dts/imx6dl-hummingboard.dts b/arch/arm/dts/imx6dl-hummingboard.dts index 24f6bfa817..2314965260 100644 --- a/arch/arm/dts/imx6dl-hummingboard.dts +++ b/arch/arm/dts/imx6dl-hummingboard.dts @@ -17,10 +17,10 @@ device-path = &usdhc2, "partname:barebox-environment"; }; }; +}; - memory { - reg = <0x10000000 0x20000000>; - }; +&ocotp { + barebox,provide-mac-address = <&fec 0x620>; }; &usdhc2 { diff --git a/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts b/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts new file mode 100644 index 0000000000..2324f3a6e5 --- /dev/null +++ b/arch/arm/dts/imx6dl-phytec-phycore-som-nand.dts @@ -0,0 +1,63 @@ +/* + * Copyright 2015 Christian Hemp, Phytec Messtechnik GmbH + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; + +#include <arm/imx6dl.dtsi> +#include "imx6dl.dtsi" +#include "imx6qdl-phytec-phycore-som.dtsi" + +/ { + model = "Phytec phyCORE-i.MX6 Duallite/SOLO with NAND"; + compatible = "phytec,imx6dl-pcm058-nand", "fsl,imx6dl"; +}; + +&eeprom { + status = "okay"; +}; + +&fec { + status = "okay"; + phy-handle = <ðphy>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 14 1>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy@3 { + reg = <3>; + max-speed = <100>; + }; + }; +}; + +&gpmi { + status = "okay"; +}; + +&usdhc1 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x80000>; + }; + + partition@1 { + label = "barebox-environment"; + reg = <0x80000 0x80000>; + }; +}; diff --git a/arch/arm/dts/imx6q-hummingboard.dts b/arch/arm/dts/imx6q-hummingboard.dts new file mode 100644 index 0000000000..e1d2fa8ce2 --- /dev/null +++ b/arch/arm/dts/imx6q-hummingboard.dts @@ -0,0 +1,39 @@ +/* + * Copyright (C) 2013 Russell King + * + * The code contained herein is licensed under the GNU General Public + * License version 2. + */ + +#include <arm/imx6q-hummingboard.dts> +#include "imx6qdl.dtsi" + +/ { + chosen { + linux,stdout-path = &uart1; + + environment@0 { + compatible = "barebox,environment"; + device-path = &usdhc2, "partname:barebox-environment"; + }; + }; +}; + +&ocotp { + barebox,provide-mac-address = <&fec 0x620>; +}; + +&usdhc2 { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x80000>; + }; + + partition@1 { + label = "barebox-environment"; + reg = <0x80000 0x80000>; + }; +}; diff --git a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi index 97cf78a73c..05224657dc 100644 --- a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi +++ b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi @@ -17,7 +17,7 @@ compatible = "phytec,imx6q-pcaaxl3", "fsl,imx6q"; chosen { - environment-sd { + environment-sd3 { compatible = "barebox,environment"; device-path = &environment_usdhc3; status = "disabled"; diff --git a/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts new file mode 100644 index 0000000000..6e19ab553e --- /dev/null +++ b/arch/arm/dts/imx6q-phytec-phycore-som-emmc.dts @@ -0,0 +1,50 @@ +/* + * Copyright 2015 Christian Hemp, Phytec Messtechnik GmbH + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; + +#include <arm/imx6q.dtsi> +#include "imx6q.dtsi" +#include "imx6qdl-phytec-phycore-som.dtsi" + +/ { + model = "Phytec phyCORE-i.MX6 Quad with eMMC"; + compatible = "phytec,imx6q-pcm058-emmc", "fsl,imx6q"; +}; + +&eeprom { + status = "okay"; +}; + +&fec { + status = "okay"; + phy-handle = <ðphy>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 14 1>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy@3 { + reg = <3>; + max-speed = <1000>; + }; + }; +}; + +&usdhc1 { + status = "okay"; +}; + +&usdhc4 { + status = "okay"; +}; diff --git a/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts b/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts new file mode 100644 index 0000000000..06f2f71537 --- /dev/null +++ b/arch/arm/dts/imx6q-phytec-phycore-som-nand.dts @@ -0,0 +1,72 @@ +/* + * Copyright 2015 Christian Hemp, Phytec Messtechnik GmbH + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; + +#include <arm/imx6q.dtsi> +#include "imx6q.dtsi" +#include "imx6qdl-phytec-phycore-som.dtsi" + +/ { + model = "Phytec phyCORE-i.MX6 Quad with NAND"; + compatible = "phytec,imx6q-pcm058-nand", "fsl,imx6q"; + +}; + +&ecspi1 { + status = "okay"; +}; + +&eeprom { + status = "okay"; +}; + +&fec { + status = "okay"; + phy-handle = <ðphy>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 14 1>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy@3 { + reg = <3>; + max-speed = <1000>; + }; + }; +}; + +&flash { + status = "okay"; +}; + +&gpmi { + status = "okay"; +}; + +&usdhc1 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x80000>; + }; + + partition@1 { + label = "barebox-environment"; + reg = <0x80000 0x80000>; + }; +}; diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi new file mode 100644 index 0000000000..2a975d103e --- /dev/null +++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi @@ -0,0 +1,266 @@ +/* + * Copyright 2015 Christian Hemp, Phytec Messtechnik GmbH + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include "imx6qdl.dtsi" + +/ { + chosen { + linux,stdout-path = &uart2; + + environment-sd1 { + compatible = "barebox,environment"; + device-path = &usdhc1, "partname:barebox-environment"; + status = "disabled"; + }; + + environment-sd4 { + compatible = "barebox,environment"; + device-path = &usdhc4, "partname:barebox-environment"; + status = "disabled"; + }; + + environment-nand { + compatible = "barebox,environment"; + device-path = &gpmi, "partname:barebox-environment"; + status = "disabled"; + }; + }; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio3 19 0>; + status = "disabled"; + + flash: m25p80@0 { + compatible = "m25p80"; + spi-max-frequency = <20000000>; + reg = <0>; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x100000>; + }; + + partition@1 { + label = "barebox-environment"; + reg = <0x100000 0x20000>; + }; + + partition@2 { + label = "oftree"; + reg = <0x120000 0x20000>; + }; + + partition@3 { + label = "kernel"; + reg = <0x140000 0x0>; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + status = "disabled"; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x400000>; + }; + + partition@1 { + label = "barebox-environment"; + reg = <0x400000 0x100000>; + }; + + partition@2 { + label = "oftree"; + reg = <0x500000 0x100000>; + }; + + partition@3 { + label = "kernel"; + reg = <0x600000 0x800000>; + }; + + partition@4 { + label = "root"; + reg = <0xe00000 0x0>; + }; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clock-frequency = <400000>; + status = "okay"; + + eeprom: 24c32@50 { + status = "disabled"; + compatible = "st,24c32"; + reg = <0x50>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + + imx6qdl-phytec-phycore-som { + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x80000000 + >; + }; + + pinctrl_gpmi_nand: gpmigrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_NANDF_CS2__NAND_CE2_B 0xb0b1 + MX6QDL_PAD_NANDF_CS3__NAND_CE3_B 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 + MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x80000000 /* CD */ + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 + >; + }; + }; +}; + +&ocotp { + barebox,provide-mac-address = <&fec 0x620>; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + cd-gpios = <&gpio6 31 0>; + status = "disabled"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <8>; + non-removable; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x80000>; + }; + + partition@1 { + label = "barebox-environment"; + reg = <0x80000 0x80000>; + }; +}; diff --git a/arch/arm/lib/armlinux.c b/arch/arm/lib/armlinux.c index 16879f8e59..47b9bd33ed 100644 --- a/arch/arm/lib/armlinux.c +++ b/arch/arm/lib/armlinux.c @@ -277,17 +277,5 @@ void start_linux(void *adr, int swap, unsigned long initrd_address, __asm__ __volatile__("mcr p15, 0, %0, c1, c0" :: "r" (reg)); } -#ifdef CONFIG_THUMB2_BAREBOX - __asm__ __volatile__ ( - "mov r0, #0\n" - "mov r1, %0\n" - "mov r2, %1\n" - "bx %2\n" - : - : "r" (architecture), "r" (params), "r" (kernel) - : "r0", "r1", "r2" - ); -#else kernel(0, architecture, params); -#endif } diff --git a/arch/arm/lib/unwind.c b/arch/arm/lib/unwind.c index 7932bca702..c3dca5b61d 100644 --- a/arch/arm/lib/unwind.c +++ b/arch/arm/lib/unwind.c @@ -331,6 +331,11 @@ void unwind_backtrace(struct pt_regs *regs) } } +void dump_stack(void) +{ + unwind_backtrace(NULL); +} + static int unwind_init(void) { struct unwind_idx *idx; diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 0a7b517b4c..3f6dd7743e 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -34,11 +34,10 @@ config ARCH_TEXT_BASE default 0x4fc00000 if MACH_REALQ7 default 0x4fc00000 if MACH_GK802 default 0x2fc00000 if MACH_TQMA6X - default 0x4fc00000 if MACH_PHYTEC_PFLA02 default 0x4fc00000 if MACH_DFI_FS700_M60 default 0x4fc00000 if MACH_UDOO default 0x4fc00000 if MACH_VARISCITE_MX6 - default 0x4fc00000 if MACH_PCAAXL3 + default 0x4fc00000 if MACH_PHYTEC_SOM_IMX6 config ARCH_IMX_INTERNAL_BOOT bool "support internal boot mode" @@ -246,6 +245,13 @@ config MACH_FREESCALE_MX51_PDK select DRIVER_SPI_IMX select MFD_MC13XXX +config MACH_CCMX53 + bool "Digi ConnectCore i.MX53" + select ARCH_IMX53 + help + Say Y here if you are using the Digi ConnectCore ccxmx53 + series SoM + config MACH_FREESCALE_MX53_LOCO bool "Freescale i.MX53 LOCO" select ARCH_IMX53 @@ -268,14 +274,10 @@ config MACH_FREESCALE_MX53_VMX53 Say Y here if you are using the Voipac Technologies X53-DMM-668 module equipped with a Freescale i.MX53 Processor -config MACH_PCAAXL3 - bool "Phytec phyCARD-i.MX6 Quad" +config MACH_PHYTEC_SOM_IMX6 + bool "Phytec phyCARD-i.MX6 and phyFLEX-i.MX6" select ARCH_IMX6 -config MACH_PHYTEC_PFLA02 - bool "Phytec phyFLEX-i.MX6" - select ARCH_IMX6 - config MACH_DFI_FS700_M60 bool "DFI i.MX6 FS700 M60 Q7 Board" select ARCH_IMX6 diff --git a/arch/arm/mach-imx/clk-imx5.c b/arch/arm/mach-imx/clk-imx5.c index 6dc3c8008e..70db31c18e 100644 --- a/arch/arm/mach-imx/clk-imx5.c +++ b/arch/arm/mach-imx/clk-imx5.c @@ -332,7 +332,7 @@ static struct driver_d imx51_ccm_driver = { static void mx53_clocks_ipu_init(void __iomem *regs) { clks[IMX5_CLK_LDB_DI1_DIV_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7); - clks[IMX5_CLK_LDB_DI1_DIV] = imx_clk_divider("ldb_di1_div", "ldb_di1_div_3_5", regs + CCM_CSCMR2, 11, 1); + clks[IMX5_CLK_LDB_DI1_DIV] = imx_clk_divider_np("ldb_di1_div", "ldb_di1_div_3_5", regs + CCM_CSCMR2, 11, 1); clks[IMX5_CLK_LDB_DI1_SEL] = imx_clk_mux_p("ldb_di1_sel", regs + CCM_CSCMR2, 9, 1, mx53_ldb_di1_sel, ARRAY_SIZE(mx53_ldb_di1_sel)); clks[IMX5_CLK_DI_PLL4_PODF] = imx_clk_divider("di_pll4_podf", "pll4_sw", regs + CCM_CDCDR, 16, 3); diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-imx/clk-imx6.c index f18ad402a6..597e502050 100644 --- a/arch/arm/mach-imx/clk-imx6.c +++ b/arch/arm/mach-imx/clk-imx6.c @@ -300,9 +300,9 @@ static void imx6_add_video_clks(void __iomem *anab, void __iomem *cb) clks[IMX6QDL_CLK_IPU1_PODF] = imx_clk_divider("ipu1_podf", "ipu1_sel", cb + 0x3c, 11, 3); clks[IMX6QDL_CLK_IPU2_PODF] = imx_clk_divider("ipu2_podf", "ipu2_sel", cb + 0x3c, 16, 3); clks[IMX6QDL_CLK_LDB_DI0_DIV_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7); - clks[IMX6QDL_CLK_LDB_DI0_PODF] = imx_clk_divider("ldb_di0_podf", "ldb_di0_div_3_5", cb + 0x20, 10, 1); + clks[IMX6QDL_CLK_LDB_DI0_PODF] = imx_clk_divider_np("ldb_di0_podf", "ldb_di0_div_3_5", cb + 0x20, 10, 1); clks[IMX6QDL_CLK_LDB_DI1_DIV_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7); - clks[IMX6QDL_CLK_LDB_DI1_PODF] = imx_clk_divider("ldb_di1_podf", "ldb_di1_div_3_5", cb + 0x20, 11, 1); + clks[IMX6QDL_CLK_LDB_DI1_PODF] = imx_clk_divider_np("ldb_di1_podf", "ldb_di1_div_3_5", cb + 0x20, 11, 1); clks[IMX6QDL_CLK_IPU1_DI0_PRE] = imx_clk_divider("ipu1_di0_pre", "ipu1_di0_pre_sel", cb + 0x34, 3, 3); clks[IMX6QDL_CLK_IPU1_DI1_PRE] = imx_clk_divider("ipu1_di1_pre", "ipu1_di1_pre_sel", cb + 0x34, 12, 3); clks[IMX6QDL_CLK_IPU2_DI0_PRE] = imx_clk_divider("ipu2_di0_pre", "ipu2_di0_pre_sel", cb + 0x38, 3, 3); diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h index c8da2fa70c..c5913e1879 100644 --- a/arch/arm/mach-imx/clk.h +++ b/arch/arm/mach-imx/clk.h @@ -10,6 +10,12 @@ static inline struct clk *imx_clk_divider(const char *name, const char *parent, return clk_divider(name, parent, reg, shift, width, CLK_SET_RATE_PARENT); } +static inline struct clk *imx_clk_divider_np(const char *name, const char *parent, + void __iomem *reg, u8 shift, u8 width) +{ + return clk_divider(name, parent, reg, shift, width, 0); +} + static inline struct clk *imx_clk_divider_table(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width, const struct clk_div_table *table) diff --git a/arch/arm/mach-imx/imx35.c b/arch/arm/mach-imx/imx35.c index 69d45eba66..3e1aa97583 100644 --- a/arch/arm/mach-imx/imx35.c +++ b/arch/arm/mach-imx/imx35.c @@ -73,6 +73,7 @@ int imx35_devices_init(void) add_generic_device("imx31-gpio", 1, NULL, MX35_GPIO2_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL); add_generic_device("imx31-gpio", 2, NULL, MX35_GPIO3_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL); add_generic_device("imx21-wdt", 0, NULL, MX35_WDOG_BASE_ADDR, 0x4000, IORESOURCE_MEM, NULL); + add_generic_device("imx35-usb-misc", 0, NULL, MX35_USB_OTG_BASE_ADDR + 0x600, 0x100, IORESOURCE_MEM, NULL); return 0; } diff --git a/arch/arm/mach-imx/imx6-mmdc.c b/arch/arm/mach-imx/imx6-mmdc.c index 7840c1a7ac..146df573e4 100644 --- a/arch/arm/mach-imx/imx6-mmdc.c +++ b/arch/arm/mach-imx/imx6-mmdc.c @@ -470,7 +470,7 @@ int mmdc_do_dqs_calibration(void) writel(v, P0_IPS + MDPDC); /* enable Adopt power down timer */ - v = readl(P0_IPS + MAPSR) & 0xfffffff7; + v = readl(P0_IPS + MAPSR) & 0xfffffffe; writel(v, P0_IPS + MAPSR); /* restore MDMISC value (RALAT, WALAT) */ diff --git a/arch/arm/mach-imx/include/mach/imx6-ddr-regs.h b/arch/arm/mach-imx/include/mach/imx6-ddr-regs.h index ac2764f1b6..fd1de8e074 100644 --- a/arch/arm/mach-imx/include/mach/imx6-ddr-regs.h +++ b/arch/arm/mach-imx/include/mach/imx6-ddr-regs.h @@ -24,6 +24,7 @@ #define MX6_MMDC_P0_MDRWD 0x021b002c #define MX6_MMDC_P0_MDOR 0x021b0030 #define MX6_MMDC_P0_MDASP 0x021b0040 +#define MX6_MMDC_P0_MAARCR 0x021b0400 #define MX6_MMDC_P0_MAPSR 0x021b0404 #define MX6_MMDC_P0_MPZQHWCTRL 0x021b0800 #define MX6_MMDC_P0_MPWLDECTRL0 0x021b080c diff --git a/arch/arm/mach-imx/ocotp.c b/arch/arm/mach-imx/ocotp.c index c99a003bb0..6ff5ee4efc 100644 --- a/arch/arm/mach-imx/ocotp.c +++ b/arch/arm/mach-imx/ocotp.c @@ -426,6 +426,7 @@ static int imx_ocotp_probe(struct device_d *dev) cdev->priv = priv; cdev->size = 192; cdev->name = "imx-ocotp"; + cdev->device_node = dev->device_node; ret = devfs_create(cdev); diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 54094f4ca0..1c0894892b 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -17,6 +17,8 @@ config ARCH_PXA2XX config ARCH_PXA3XX bool select CPU_XSC3 + select CLKDEV_LOOKUP + select COMMON_CLK config ARCH_PXA310 bool diff --git a/arch/arm/mach-pxa/include/mach/clock.h b/arch/arm/mach-pxa/include/mach/clock.h index 40f6223cd9..f86152f7af 100644 --- a/arch/arm/mach-pxa/include/mach/clock.h +++ b/arch/arm/mach-pxa/include/mach/clock.h @@ -14,7 +14,6 @@ unsigned long pxa_get_uartclk(void); unsigned long pxa_get_mmcclk(void); unsigned long pxa_get_lcdclk(void); -unsigned long pxa_get_nandclk(void); unsigned long pxa_get_pwmclk(void); #endif /* !__MACH_CLOCK_H */ diff --git a/arch/arm/mach-pxa/speed-pxa3xx.c b/arch/arm/mach-pxa/speed-pxa3xx.c index 6a08ea78f0..b24b7a8fc3 100644 --- a/arch/arm/mach-pxa/speed-pxa3xx.c +++ b/arch/arm/mach-pxa/speed-pxa3xx.c @@ -8,6 +8,9 @@ */ #include <common.h> +#include <init.h> +#include <linux/clk.h> +#include <linux/clkdev.h> #include <mach/clock.h> #include <mach/pxa-regs.h> @@ -24,10 +27,17 @@ unsigned long pxa_get_pwmclk(void) return BASE_CLK; } -unsigned long pxa_get_nandclk(void) +static int pxa3xx_clock_init(void) { - if (cpu_is_pxa320()) - return 104000000; - else - return 156000000; + unsigned long nand_rate = (cpu_is_pxa320()) ? 104000000 : 156000000; + struct clk *clk; + int ret; + + clk = clk_fixed("nand", nand_rate); + ret = clk_register_clkdev(clk, NULL, "nand"); + if (ret) + return ret; + + return 0; } +postcore_initcall(pxa3xx_clock_init); diff --git a/arch/arm/mach-socfpga/xload.c b/arch/arm/mach-socfpga/xload.c index 272896b6bd..cf05ff374b 100644 --- a/arch/arm/mach-socfpga/xload.c +++ b/arch/arm/mach-socfpga/xload.c @@ -10,6 +10,7 @@ #include <linux/sizes.h> #include <fs.h> #include <io.h> +#include <mci.h> #include <linux/clkdev.h> #include <linux/stat.h> @@ -33,6 +34,7 @@ enum socfpga_clks { static struct clk *clks[clk_max]; static struct dw_mmc_platform_data mmc_pdata = { + .bus_width_caps = MMC_CAP_4_BIT_DATA, .ciu_div = 3, }; diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a2d443f94c..fdf62e8608 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -331,6 +331,14 @@ config NMON_HELP Say yes here to get the nmon commands message on every nmon start. +config MIPS_OPTIMIZED_STRING_FUNCTIONS + bool "use assembler optimized string functions" + default y + help + Say yes here to use assembler optimized memcpy / memset functions. + These functions work much faster than the normal versions but + increase your binary size. + endmenu source common/Kconfig diff --git a/arch/mips/boards/black-swift/include/board/board_pbl_start.h b/arch/mips/boards/black-swift/include/board/board_pbl_start.h index f78e0d9fb2..7394092838 100644 --- a/arch/mips/boards/black-swift/include/board/board_pbl_start.h +++ b/arch/mips/boards/black-swift/include/board/board_pbl_start.h @@ -28,9 +28,12 @@ mips_disable_interrupts + pbl_blt 0xbf000000 skip_pll_ram_config t8 + pbl_ar9331_pll pbl_ar9331_ddr2_config +skip_pll_ram_config: pbl_ar9331_uart_enable debug_ll_ar9331_init mips_nmon diff --git a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h b/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h index 08204fe656..d25f5aa337 100644 --- a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h +++ b/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h @@ -28,9 +28,12 @@ mips_disable_interrupts + pbl_blt 0xbf000000 skip_pll_ram_config t8 + pbl_ar9331_pll pbl_ar9331_ddr1_config +skip_pll_ram_config: pbl_ar9331_uart_enable debug_ll_ar9331_init mips_nmon diff --git a/arch/mips/include/asm/barebox.h b/arch/mips/include/asm/barebox.h index 499b731924..e5b964ca1b 100644 --- a/arch/mips/include/asm/barebox.h +++ b/arch/mips/include/asm/barebox.h @@ -15,6 +15,6 @@ #ifndef _ASM_MIPS_BAREBOX_H_ #define _ASM_MIPS_BAREBOX_H_ -/* nothing special yet */ +#define ARCH_HAS_DATA_ABORT_MASK #endif /* _ASM_MIPS_BAREBOX_H_ */ diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h index 681b40a305..dbe3410632 100644 --- a/arch/mips/include/asm/pbl_macros.h +++ b/arch/mips/include/asm/pbl_macros.h @@ -60,6 +60,18 @@ .set pop .endm + .macro pbl_blt addr label tmp + .set push + .set noreorder + move \tmp, ra # preserve ra beforehand + bal 253f + nop +253: + bltu ra, \addr, \label + move ra, \tmp # restore ra + .set pop + .endm + .macro pbl_sleep reg count .set push .set noreorder @@ -145,7 +157,7 @@ copy_loop_exit: .set push .set noreorder mfc0 k0, CP0_STATUS - li k1, ~ST0_IE + li k1, ~(ST0_ERL | ST0_IE) and k0, k1 mtc0 k0, CP0_STATUS .set pop diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index 0266ec693e..abfa2d25b0 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -15,6 +15,8 @@ #include <asm/mipsregs.h> #include <asm/asm-offsets.h> +#define STATMASK 0x1f + .macro SAVE_AT .set push .set noat @@ -102,4 +104,89 @@ SAVE_STATIC .endm + .macro RESTORE_AT + .set push + .set noat + LONG_L $1, PT_R1(sp) + .set pop + .endm + + .macro RESTORE_TEMP + LONG_L $24, PT_LO(sp) + mtlo $24 + LONG_L $24, PT_HI(sp) + mthi $24 +#ifdef CONFIG_32BIT + LONG_L $8, PT_R8(sp) + LONG_L $9, PT_R9(sp) +#endif + LONG_L $10, PT_R10(sp) + LONG_L $11, PT_R11(sp) + LONG_L $12, PT_R12(sp) + LONG_L $13, PT_R13(sp) + LONG_L $14, PT_R14(sp) + LONG_L $15, PT_R15(sp) + LONG_L $24, PT_R24(sp) + .endm + + .macro RESTORE_STATIC + LONG_L $16, PT_R16(sp) + LONG_L $17, PT_R17(sp) + LONG_L $18, PT_R18(sp) + LONG_L $19, PT_R19(sp) + LONG_L $20, PT_R20(sp) + LONG_L $21, PT_R21(sp) + LONG_L $22, PT_R22(sp) + LONG_L $23, PT_R23(sp) + LONG_L $30, PT_R30(sp) + .endm + + .macro RESTORE_SOME + .set push + .set reorder + .set noat + mfc0 a0, CP0_STATUS + ori a0, STATMASK + xori a0, STATMASK + mtc0 a0, CP0_STATUS + li v1, 0xff00 + and a0, v1 + LONG_L v0, PT_STATUS(sp) + nor v1, $0, v1 + and v0, v1 + or v0, a0 + mtc0 v0, CP0_STATUS + LONG_L v1, PT_EPC(sp) + MTC0 v1, CP0_EPC + LONG_L $31, PT_R31(sp) + LONG_L $28, PT_R28(sp) + LONG_L $25, PT_R25(sp) +#ifdef CONFIG_64BIT + LONG_L $8, PT_R8(sp) + LONG_L $9, PT_R9(sp) +#endif + LONG_L $7, PT_R7(sp) + LONG_L $6, PT_R6(sp) + LONG_L $5, PT_R5(sp) + LONG_L $4, PT_R4(sp) + LONG_L $3, PT_R3(sp) + LONG_L $2, PT_R2(sp) + .set pop + .endm + + .macro RESTORE_SP_AND_RET + LONG_L sp, PT_R29(sp) + .set arch=r4000 + eret + .set mips0 + .endm + + .macro RESTORE_ALL_AND_RET + RESTORE_TEMP + RESTORE_STATIC + RESTORE_AT + RESTORE_SOME + RESTORE_SP_AND_RET + .endm + #endif /* _ASM_STACKFRAME_H */ diff --git a/arch/mips/include/asm/string.h b/arch/mips/include/asm/string.h index 3a32d18159..a797a7459c 100644 --- a/arch/mips/include/asm/string.h +++ b/arch/mips/include/asm/string.h @@ -22,6 +22,13 @@ #ifndef __ASM_MIPS_STRING_H #define __ASM_MIPS_STRING_H -/* nothing special yet */ +#ifdef CONFIG_MIPS_OPTIMIZED_STRING_FUNCTIONS + +#define __HAVE_ARCH_MEMCPY +extern void *memcpy(void *, const void *, __kernel_size_t); +#define __HAVE_ARCH_MEMSET +extern void *memset(void *, int, __kernel_size_t); + +#endif #endif diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 0145f35876..02ee1893f8 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -7,6 +7,9 @@ obj-y += cpu-probe.o obj-y += traps.o obj-y += genex.o +obj-$(CONFIG_MIPS_OPTIMIZED_STRING_FUNCTIONS) += memcpy.o +obj-$(CONFIG_MIPS_OPTIMIZED_STRING_FUNCTIONS) += memset.o + obj-$(CONFIG_CPU_MIPS32) += c-r4k.o obj-$(CONFIG_CPU_MIPS64) += c-r4k.o diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S index 8941714af9..5fb2223231 100644 --- a/arch/mips/lib/genex.S +++ b/arch/mips/lib/genex.S @@ -31,3 +31,9 @@ NESTED(except_vec3_generic, 0, sp) nop END(except_vec3_generic) .set at + +FEXPORT(ret_from_exception) + .set noat + RESTORE_ALL_AND_RET + nop + .set at diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S new file mode 100644 index 0000000000..a5af0c9381 --- /dev/null +++ b/arch/mips/lib/memcpy.S @@ -0,0 +1,276 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1998, 99, 2000, 01, 2002 Ralf Baechle (ralf@gnu.org) + * Copyright (C) 1999, 2000, 01, 2002 Silicon Graphics, Inc. + * Copyright (C) 2002 Broadcom, Inc. + * memcpy/copy_user author: Mark Vandevoorde + * Copyright (C) 2007 Maciej W. Rozycki + * Copyright (C) 2014 Imagination Technologies Ltd. + * + * Kernel-mode memcpy function without exceptions for _some_ MIPS CPUs + * by Aleksey Kuleshov (rndfax@yandex.ru), 2015 + * + */ + +#include <asm/asm.h> +#include <asm/asm-offsets.h> +#include <asm/regdef.h> + +#define dst a0 +#define src a1 +#define len a2 + +#define LOADK lw /* No exception */ +#define LOAD(reg, addr) lw reg, addr +#define LOADL(reg, addr) lwl reg, addr +#define LOADR(reg, addr) lwr reg, addr +#define STOREL(reg, addr) swl reg, addr +#define STORER(reg, addr) swr reg, addr +#define STORE(reg, addr) sw reg, addr +#define ADD addu +#define SUB subu +#define SRL srl +#define SLL sll +#define SRA sra +#define SLLV sllv +#define SRLV srlv +#define NBYTES 4 +#define LOG_NBYTES 2 + +#define LOADB(reg, addr) lb reg, addr +#define STOREB(reg, addr) sb reg, addr + +#ifdef CONFIG_CPU_LITTLE_ENDIAN +#define LDFIRST LOADR +#define LDREST LOADL +#define STFIRST STORER +#define STREST STOREL +#define SHIFT_DISCARD SLLV +#else +#define LDFIRST LOADL +#define LDREST LOADR +#define STFIRST STOREL +#define STREST STORER +#define SHIFT_DISCARD SRLV +#endif + +#define FIRST(unit) ((unit)*NBYTES) +#define REST(unit) (FIRST(unit)+NBYTES-1) +#define UNIT(unit) FIRST(unit) + +#define ADDRMASK (NBYTES-1) + + .text + .align 5 + .set noreorder +LEAF(memcpy) /* a0=dst a1=src a2=len */ + move v0, dst /* return value */ + + /* + * Note: dst & src may be unaligned, len may be 0 + * Temps + */ +#define rem t8 + + /* + * The "issue break"s below are very approximate. + * Issue delays for dcache fills will perturb the schedule, as will + * load queue full replay traps, etc. + * + * If len < NBYTES use byte operations. + */ + sltu t2, len, NBYTES + and t1, dst, ADDRMASK + bnez t2, .Lcopy_bytes_checklen + and t0, src, ADDRMASK + bnez t1, .Ldst_unaligned + nop + bnez t0, .Lsrc_unaligned_dst_aligned + /* + * use delay slot for fall-through + * src and dst are aligned; need to compute rem + */ +.Lboth_aligned: + SRL t0, len, LOG_NBYTES+3 # +3 for 8 units/iter + beqz t0, .Lcleanup_both_aligned # len < 8*NBYTES + and rem, len, (8*NBYTES-1) # rem = len % (8*NBYTES) + .align 4 +1: + LOAD(t0, UNIT(0)(src)) + LOAD(t1, UNIT(1)(src)) + LOAD(t2, UNIT(2)(src)) + LOAD(t3, UNIT(3)(src)) + SUB len, len, 8*NBYTES + LOAD(t4, UNIT(4)(src)) + LOAD(t7, UNIT(5)(src)) + STORE(t0, UNIT(0)(dst)) + STORE(t1, UNIT(1)(dst)) + LOAD(t0, UNIT(6)(src)) + LOAD(t1, UNIT(7)(src)) + ADD src, src, 8*NBYTES + ADD dst, dst, 8*NBYTES + STORE(t2, UNIT(-6)(dst)) + STORE(t3, UNIT(-5)(dst)) + STORE(t4, UNIT(-4)(dst)) + STORE(t7, UNIT(-3)(dst)) + STORE(t0, UNIT(-2)(dst)) + STORE(t1, UNIT(-1)(dst)) + bne len, rem, 1b + nop + + /* + * len == rem == the number of bytes left to copy < 8*NBYTES + */ +.Lcleanup_both_aligned: + beqz len, .Ldone + sltu t0, len, 4*NBYTES + bnez t0, .Lless_than_4units + and rem, len, (NBYTES-1) # rem = len % NBYTES + /* + * len >= 4*NBYTES + */ + LOAD( t0, UNIT(0)(src)) + LOAD( t1, UNIT(1)(src)) + LOAD( t2, UNIT(2)(src)) + LOAD( t3, UNIT(3)(src)) + SUB len, len, 4*NBYTES + ADD src, src, 4*NBYTES + STORE(t0, UNIT(0)(dst)) + STORE(t1, UNIT(1)(dst)) + STORE(t2, UNIT(2)(dst)) + STORE(t3, UNIT(3)(dst)) + .set reorder /* DADDI_WAR */ + ADD dst, dst, 4*NBYTES + beqz len, .Ldone + .set noreorder +.Lless_than_4units: + /* + * rem = len % NBYTES + */ + beq rem, len, .Lcopy_bytes + nop +1: + LOAD(t0, 0(src)) + ADD src, src, NBYTES + SUB len, len, NBYTES + STORE(t0, 0(dst)) + .set reorder /* DADDI_WAR */ + ADD dst, dst, NBYTES + bne rem, len, 1b + .set noreorder + + /* + * src and dst are aligned, need to copy rem bytes (rem < NBYTES) + * A loop would do only a byte at a time with possible branch + * mispredicts. Can't do an explicit LOAD dst,mask,or,STORE + * because can't assume read-access to dst. Instead, use + * STREST dst, which doesn't require read access to dst. + * + * This code should perform better than a simple loop on modern, + * wide-issue mips processors because the code has fewer branches and + * more instruction-level parallelism. + */ +#define bits t2 + beqz len, .Ldone + ADD t1, dst, len # t1 is just past last byte of dst + li bits, 8*NBYTES + SLL rem, len, 3 # rem = number of bits to keep + LOAD(t0, 0(src)) + SUB bits, bits, rem # bits = number of bits to discard + SHIFT_DISCARD t0, t0, bits + STREST(t0, -1(t1)) + jr ra + move len, zero +.Ldst_unaligned: + /* + * dst is unaligned + * t0 = src & ADDRMASK + * t1 = dst & ADDRMASK; T1 > 0 + * len >= NBYTES + * + * Copy enough bytes to align dst + * Set match = (src and dst have same alignment) + */ +#define match rem + LDFIRST(t3, FIRST(0)(src)) + ADD t2, zero, NBYTES + LDREST(t3, REST(0)(src)) + SUB t2, t2, t1 # t2 = number of bytes copied + xor match, t0, t1 + STFIRST(t3, FIRST(0)(dst)) + beq len, t2, .Ldone + SUB len, len, t2 + ADD dst, dst, t2 + beqz match, .Lboth_aligned + ADD src, src, t2 + +.Lsrc_unaligned_dst_aligned: + SRL t0, len, LOG_NBYTES+2 # +2 for 4 units/iter + beqz t0, .Lcleanup_src_unaligned + and rem, len, (4*NBYTES-1) # rem = len % 4*NBYTES +1: +/* + * Avoid consecutive LD*'s to the same register since some mips + * implementations can't issue them in the same cycle. + * It's OK to load FIRST(N+1) before REST(N) because the two addresses + * are to the same unit (unless src is aligned, but it's not). + */ + LDFIRST(t0, FIRST(0)(src)) + LDFIRST(t1, FIRST(1)(src)) + SUB len, len, 4*NBYTES + LDREST(t0, REST(0)(src)) + LDREST(t1, REST(1)(src)) + LDFIRST(t2, FIRST(2)(src)) + LDFIRST(t3, FIRST(3)(src)) + LDREST(t2, REST(2)(src)) + LDREST(t3, REST(3)(src)) + ADD src, src, 4*NBYTES + STORE(t0, UNIT(0)(dst)) + STORE(t1, UNIT(1)(dst)) + STORE(t2, UNIT(2)(dst)) + STORE(t3, UNIT(3)(dst)) + .set reorder /* DADDI_WAR */ + ADD dst, dst, 4*NBYTES + bne len, rem, 1b + .set noreorder + +.Lcleanup_src_unaligned: + beqz len, .Ldone + and rem, len, NBYTES-1 # rem = len % NBYTES + beq rem, len, .Lcopy_bytes + nop +1: + LDFIRST(t0, FIRST(0)(src)) + LDREST(t0, REST(0)(src)) + ADD src, src, NBYTES + SUB len, len, NBYTES + STORE(t0, 0(dst)) + .set reorder /* DADDI_WAR */ + ADD dst, dst, NBYTES + bne len, rem, 1b + .set noreorder + +.Lcopy_bytes_checklen: + beqz len, .Ldone + nop +.Lcopy_bytes: + /* 0 < len < NBYTES */ +#define COPY_BYTE(N) \ + LOADB(t0, N(src)); \ + SUB len, len, 1; \ + beqz len, .Ldone; \ + STOREB(t0, N(dst)) + + COPY_BYTE(0) + COPY_BYTE(1) + LOADB(t0, NBYTES-2(src)) + SUB len, len, 1 + jr ra + STOREB(t0, NBYTES-2(dst)) +.Ldone: + jr ra + nop + END(memcpy) diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S new file mode 100644 index 0000000000..d3c1c72393 --- /dev/null +++ b/arch/mips/lib/memset.S @@ -0,0 +1,146 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1998, 1999, 2000 by Ralf Baechle + * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + * Copyright (C) 2007 by Maciej W. Rozycki + * Copyright (C) 2011, 2012 MIPS Technologies, Inc. + * + * Kernel-mode memset function without exceptions + * by Aleksey Kuleshov (rndfax@yandex.ru), 2015 + */ +#include <asm/asm.h> +#include <asm/asm-offsets.h> +#include <asm/regdef.h> + +#if LONGSIZE == 4 +#define LONG_S_L swl +#define LONG_S_R swr +#else +#define LONG_S_L sdl +#define LONG_S_R sdr +#endif + +#define STORSIZE LONGSIZE +#define STORMASK LONGMASK +#define FILL64RG a1 +#define FILLPTRG t0 + +/* + * memset(void *s, int c, size_t n) + * + * a0: start of area to clear + * a1: char to fill with + * a2: size of area to clear + */ + +LEAF(memset) + beqz a1, 1f + move v0, a0 /* result */ + + andi a1, 0xff /* spread fillword */ + LONG_SLL t1, a1, 8 + or a1, t1 + LONG_SLL t1, a1, 16 +#if LONGSIZE == 8 + or a1, t1 + LONG_SLL t1, a1, 32 +#endif + or a1, t1 + + .macro f_fill64 dst, offset, val + LONG_S \val, (\offset + 0 * STORSIZE)(\dst) + LONG_S \val, (\offset + 1 * STORSIZE)(\dst) + LONG_S \val, (\offset + 2 * STORSIZE)(\dst) + LONG_S \val, (\offset + 3 * STORSIZE)(\dst) + LONG_S \val, (\offset + 4 * STORSIZE)(\dst) + LONG_S \val, (\offset + 5 * STORSIZE)(\dst) + LONG_S \val, (\offset + 6 * STORSIZE)(\dst) + LONG_S \val, (\offset + 7 * STORSIZE)(\dst) +#if (LONGSIZE == 4) + LONG_S \val, (\offset + 8 * STORSIZE)(\dst) + LONG_S \val, (\offset + 9 * STORSIZE)(\dst) + LONG_S \val, (\offset + 10 * STORSIZE)(\dst) + LONG_S \val, (\offset + 11 * STORSIZE)(\dst) + LONG_S \val, (\offset + 12 * STORSIZE)(\dst) + LONG_S \val, (\offset + 13 * STORSIZE)(\dst) + LONG_S \val, (\offset + 14 * STORSIZE)(\dst) + LONG_S \val, (\offset + 15 * STORSIZE)(\dst) +#endif + .endm + + .set noreorder + .align 5 + +1: + sltiu t0, a2, STORSIZE /* very small region? */ + bnez t0, .Lsmall_memset + andi t0, a0, STORMASK /* aligned? */ + + beqz t0, 1f + PTR_SUBU t0, STORSIZE /* alignment in bytes */ + +#ifdef __MIPSEB__ + LONG_S_L a1, (a0) /* make word/dword aligned */ +#else + LONG_S_R a1, (a0) /* make word/dword aligned */ +#endif + PTR_SUBU a0, t0 /* long align ptr */ + PTR_ADDU a2, t0 /* correct size */ + +1: ori t1, a2, 0x3f /* # of full blocks */ + xori t1, 0x3f + beqz t1, .Lmemset_partial /* no block to fill */ + andi t0, a2, 0x40-STORSIZE + + PTR_ADDU t1, a0 /* end address */ + .set reorder +1: PTR_ADDIU a0, 64 + f_fill64 a0, -64, FILL64RG + bne t1, a0, 1b + .set noreorder + +.Lmemset_partial: + PTR_LA t1, 2f /* where to start */ +#if LONGSIZE == 4 + PTR_SUBU t1, FILLPTRG +#else + .set noat + LONG_SRL AT, FILLPTRG, 1 + PTR_SUBU t1, AT + .set at +#endif + jr t1 + PTR_ADDU a0, t0 /* dest ptr */ + + .set push + .set noreorder + .set nomacro + /* ... but first do longs ... */ + f_fill64 a0, -64, FILL64RG +2: .set pop + andi a2, STORMASK /* At most one long to go */ + + beqz a2, 1f + PTR_ADDU a0, a2 /* What's left */ +#ifdef __MIPSEB__ + LONG_S_R a1, -1(a0) +#else + LONG_S_L a1, -1(a0) +#endif +1: jr ra + move a2, zero + +.Lsmall_memset: + beqz a2, 2f + PTR_ADDU t1, a0, a2 + +1: PTR_ADDIU a0, 1 /* fill bytewise */ + bne t1, a0, 1b + sb a1, -1(a0) + +2: jr ra /* done */ + move a2, zero + END(memset) diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c index 0a5914ea81..5fc32fe7e4 100644 --- a/arch/mips/lib/traps.c +++ b/arch/mips/lib/traps.c @@ -1,9 +1,25 @@ #include <common.h> - +#include <abort.h> #include <asm/mipsregs.h> #include <asm/ptrace.h> -void barebox_exc_handler(const struct pt_regs *regs); +static int mips_ignore_data_abort; +static int mips_data_abort_occurred; + +void data_abort_mask(void) +{ + mips_data_abort_occurred = 0; + mips_ignore_data_abort = 1; +} + +int data_abort_unmask(void) +{ + mips_ignore_data_abort = 0; + + return mips_data_abort_occurred != 0; +} + +void barebox_exc_handler(struct pt_regs *regs); /* * Trap codes from OpenBSD trap.h @@ -31,9 +47,14 @@ void barebox_exc_handler(const struct pt_regs *regs); #define CR_EXC_CODE 0x0000007c #define CR_EXC_CODE_SHIFT 2 +static inline u32 get_exc_code(u32 cause) +{ + return (cause & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT; +} + static char *get_exc_name(u32 cause) { - switch ((cause & CR_EXC_CODE) >> CR_EXC_CODE_SHIFT) { + switch (get_exc_code(cause)) { case T_INT: return "interrupt pending"; @@ -96,13 +117,10 @@ static char *get_exc_name(u32 cause) return "unknown exception"; } -void barebox_exc_handler(const struct pt_regs *regs) +static void show_regs(const struct pt_regs *regs) { - const int field = 2 * sizeof(unsigned long); - unsigned int cause = regs->cp0_cause; int i; - - printf("\nOoops, %s!\n\n", get_exc_name(cause)); + const int field = 2 * sizeof(unsigned long); /* * Saved main processor registers @@ -131,9 +149,36 @@ void barebox_exc_handler(const struct pt_regs *regs) printf("epc : %0*lx\n", field, regs->cp0_epc); printf("ra : %0*lx\n", field, regs->regs[31]); - printf("Status: %08x\n", (uint32_t) regs->cp0_status); - printf("Cause : %08x\n", cause); + printf("Status: %08x\n", (uint32_t)regs->cp0_status); + printf("Cause : %08x\n", (uint32_t)regs->cp0_cause); printf("Config: %08x\n\n", read_c0_config()); +} + +void barebox_exc_handler(struct pt_regs *regs) +{ + unsigned int cause = regs->cp0_cause; + + if (get_exc_code(cause) == T_ADDR_ERR_LD && mips_ignore_data_abort) { + + mips_data_abort_occurred = 1; + + regs->cp0_epc += 4; + + /* + * Don't let your children do this ... + */ + __asm__ __volatile__( + "move\t$29, %0\n\t" + "j\tret_from_exception" + :/* no outputs */ + :"r" (®s)); + + /* Unreached */ + + } else { + printf("\nOoops, %s!\n\n", get_exc_name(cause)); + show_regs(regs); + } hang(); } diff --git a/commands/Kconfig b/commands/Kconfig index 0853ffda7c..1743670ed3 100644 --- a/commands/Kconfig +++ b/commands/Kconfig @@ -1493,9 +1493,9 @@ config CMD_SPLASH config CMD_READLINE tristate - prompt "Readline" + prompt "readline" help - rompt for user input + Prompt for user input Usage: readline PROMPT VAR diff --git a/commands/go.c b/commands/go.c index f25db48ca2..fb319b320c 100644 --- a/commands/go.c +++ b/commands/go.c @@ -60,10 +60,7 @@ static int do_go(int argc, char *argv[]) shutdown_barebox(); - if (do_execute) - do_execute(func, argc - 1, &argv[1]); - else - func(argc - 1, &argv[1]); + func(argc - 1, &argv[1]); /* * The application returned. Since we have shutdown barebox and diff --git a/commands/i2c.c b/commands/i2c.c index d6c5412762..f4ffc99827 100644 --- a/commands/i2c.c +++ b/commands/i2c.c @@ -22,30 +22,16 @@ #include <getopt.h> #include <i2c/i2c.h> -static int do_i2c_probe(int argc, char *argv[]) +static void i2c_probe_range(struct i2c_adapter *adapter, int startaddr, int stopaddr) { - struct i2c_adapter *adapter; - struct i2c_client client; - int startaddr = -1, stopaddr = -1, addr, ret; + struct i2c_client client = {}; + int addr; + int ret; u8 reg; - if (argc < 4) - return COMMAND_ERROR_USAGE; - - adapter = i2c_get_adapter(simple_strtoul(argv[1], NULL, 0)); - if (!adapter) - return -ENODEV; client.adapter = adapter; - startaddr = simple_strtol(argv[2], NULL, 0); - stopaddr = simple_strtol(argv[3], NULL, 0); - if ((startaddr == -1) || (stopaddr == -1) || (startaddr > stopaddr)) - return COMMAND_ERROR_USAGE; - - if (stopaddr > 0x7F) - stopaddr = 0x7F; - - printf("probing i2c range 0x%02x - 0x%02x :\n", startaddr, stopaddr); + printf("probing i2c%d range 0x%02x-0x%02x: ", adapter->nr, startaddr, stopaddr); for (addr = startaddr; addr <= stopaddr; addr++) { client.addr = addr; ret = i2c_write_reg(&client, 0x00, ®, 0); @@ -53,6 +39,38 @@ static int do_i2c_probe(int argc, char *argv[]) printf("0x%02x ", addr); } printf("\n"); +} + +static int do_i2c_probe(int argc, char *argv[]) +{ + struct i2c_adapter *adapter = NULL; + int startaddr = 0, stopaddr = 0x7f; + + if (argc > 1) { + adapter = i2c_get_adapter(simple_strtoul(argv[1], NULL, 0)); + if (!adapter) + return -ENODEV; + } + + if (argc > 2) + startaddr = simple_strtol(argv[2], NULL, 0); + if (argc > 3) + startaddr = simple_strtol(argv[3], NULL, 0); + + + if (startaddr > stopaddr) + return COMMAND_ERROR_USAGE; + + if (stopaddr > 0x7F) + stopaddr = 0x7F; + + if (adapter) { + i2c_probe_range(adapter, startaddr, stopaddr); + } else { + for_each_i2c_adapter(adapter) + i2c_probe_range(adapter, startaddr, stopaddr); + } + return 0; } diff --git a/commands/loadb.c b/commands/loadb.c index aabb00ab20..6223512477 100644 --- a/commands/loadb.c +++ b/commands/loadb.c @@ -67,13 +67,24 @@ static char his_eol; /* character he needs at end of packet */ static int his_pad_count; /* number of pad chars he needs */ static char his_pad_char; /* pad chars he needs */ static char his_quote; /* quote chars he'll use */ +static struct console_device *cdev; /* The console device we are using */ + +static void sendchar(char c) +{ + cdev->putc(cdev, c); +} + +static int receivechar(void) +{ + return cdev->getc(cdev); +} static void send_pad(void) { int count = his_pad_count; while (count-- > 0) - console_putc(CONSOLE_STDOUT, his_pad_char); + sendchar(his_pad_char); } /* converts escaped kermit char to binary char */ @@ -100,9 +111,8 @@ static int chk1(char *buffer) static void s1_sendpacket(char *packet) { send_pad(); - while (*packet) { - console_putc(CONSOLE_STDOUT, *packet++); - } + while (*packet) + sendchar(*packet++); } static char a_b[24]; @@ -397,7 +407,7 @@ static int k_recv(void) /* get a packet */ /* wait for the starting character or ^C */ for (;;) { - switch (getc()) { + switch (receivechar()) { case START_CHAR: /* start packet */ goto START; case ETX_CHAR: /* ^C waiting for packet */ @@ -411,13 +421,13 @@ static int k_recv(void) START: /* get length of packet */ sum = 0; - new_char = getc(); + new_char = receivechar(); if ((new_char & 0xE0) == 0) goto packet_error; sum += new_char & 0xff; length = untochar(new_char); /* get sequence number */ - new_char = getc(); + new_char = receivechar(); if ((new_char & 0xE0) == 0) goto packet_error; sum += new_char & 0xff; @@ -447,7 +457,7 @@ START: /* END NEW CODE */ /* get packet type */ - new_char = getc(); + new_char = receivechar(); if ((new_char & 0xE0) == 0) goto packet_error; sum += new_char & 0xff; @@ -457,19 +467,19 @@ START: if (length == -2) { /* (length byte was 0, decremented twice) */ /* get the two length bytes */ - new_char = getc(); + new_char = receivechar(); if ((new_char & 0xE0) == 0) goto packet_error; sum += new_char & 0xff; len_hi = untochar(new_char); - new_char = getc(); + new_char = receivechar(); if ((new_char & 0xE0) == 0) goto packet_error; sum += new_char & 0xff; len_lo = untochar(new_char); length = len_hi * 95 + len_lo; /* check header checksum */ - new_char = getc(); + new_char = receivechar(); if ((new_char & 0xE0) == 0) goto packet_error; if (new_char != @@ -488,7 +498,7 @@ START: } } while (length > 1) { - new_char = getc(); + new_char = receivechar(); if ((new_char & 0xE0) == 0) goto packet_error; sum += new_char & 0xff; @@ -505,13 +515,13 @@ START: } } /* get and validate checksum character */ - new_char = getc(); + new_char = receivechar(); if ((new_char & 0xE0) == 0) goto packet_error; if (new_char != tochar((sum + ((sum >> 6) & 0x03)) & 0x3f)) goto packet_error; /* get END_CHAR */ - new_char = getc(); + new_char = receivechar(); if (new_char != END_CHAR) { packet_error: /* restore state machines */ @@ -566,8 +576,8 @@ static ulong load_serial_bin(void) * box some time (100 * 1 ms) */ for (i = 0; i < 100; ++i) { - if (tstc()) - (void)getc(); + if (cdev->tstc(cdev)) + (void)receivechar();; udelay(1000); } @@ -607,9 +617,10 @@ static int do_load_serial_bin(int argc, char *argv[]) int rcode = 0, ret; int opt; char *output_file = NULL; - struct console_device *cdev = NULL; + int current_active; + char *console_dev_name = NULL; - while ((opt = getopt(argc, argv, "f:b:o:c")) > 0) { + while ((opt = getopt(argc, argv, "f:b:o:c:")) > 0) { switch (opt) { case 'f': output_file = optarg; @@ -620,18 +631,30 @@ static int do_load_serial_bin(int argc, char *argv[]) case 'o': offset = (int)simple_strtoul(optarg, NULL, 10); break; + case 'c': + console_dev_name = optarg; + break; default: perror(argv[0]); return 1; } } - cdev = console_get_first_active(); - if (NULL == cdev) { - printf("%s:No console device with STDIN and STDOUT\n", argv[0]); - return -ENODEV; + if (console_dev_name) { + cdev = console_get_by_name(console_dev_name); + if (!cdev) { + printf("Console %s not found\n", console_dev_name); + return -ENODEV; + } + } else { + cdev = console_get_first_active(); + if (!cdev) { + printf("No console device with STDIN and STDOUT\n"); + return -ENODEV; + } } current_baudrate = console_get_baudrate(cdev); + current_active = console_get_active(cdev); /* Load Defaults */ if (load_baudrate == 0) @@ -656,13 +679,15 @@ static int do_load_serial_bin(int argc, char *argv[]) } } + printf("## Ready for binary (kermit) download " + "to 0x%08lX offset on %s device at %d bps...\n", offset, + output_file, load_baudrate); + + console_set_active(cdev, 0); ret = console_set_baudrate(cdev, load_baudrate); if (ret) return ret; - printf("## Ready for binary (kermit) download " - "to 0x%08lX offset on %s device at %d bps...\n", offset, - output_file, load_baudrate); addr = load_serial_bin(); if (addr == 0) { printf("## Binary (kermit) download aborted\n"); @@ -673,6 +698,8 @@ static int do_load_serial_bin(int argc, char *argv[]) if (ret) return ret; + console_set_active(cdev, current_active); + close(ofd); ofd = 0; return rcode; @@ -684,6 +711,7 @@ BAREBOX_CMD_HELP_TEXT("Options:") BAREBOX_CMD_HELP_OPT("-f FILE", "download to FILE (default image.bin)") BAREBOX_CMD_HELP_OPT("-o OFFS", "destination file OFFSet (default 0)") BAREBOX_CMD_HELP_OPT("-b BAUD", "baudrate for download (default: console baudrate)") +BAREBOX_CMD_HELP_OPT("-c CONSOLE", "Specify console (default: first active console") BAREBOX_CMD_HELP_END BAREBOX_CMD_START(loadb) diff --git a/commands/loads.c b/commands/loads.c index 24093e191f..aa3095ee8c 100644 --- a/commands/loads.c +++ b/commands/loads.c @@ -127,7 +127,7 @@ static ulong load_serial(ulong offset) } if (!do_echo) { /* print a '.' every 100 lines */ if ((++line_count % 100) == 0) - console_putc(CONSOLE_STDOUT, '.'); + putchar('.'); } } @@ -144,7 +144,7 @@ static int read_record(char *buf, ulong len) for (p=buf; p < buf+len; ++p) { c = getc(); /* read character */ if (do_echo) - console_putc(CONSOLE_STDOUT, c); + putchar(c); switch (c) { case '\r': @@ -259,7 +259,7 @@ static int write_record(char *buf) char c; while ((c = *buf++)) - console_putc(CONSOLE_STDOUT, c); + putchar(c); /* Check for the console hangup (if any different from serial) */ diff --git a/commands/ls.c b/commands/ls.c index 09437afcdf..ce02f16c49 100644 --- a/commands/ls.c +++ b/commands/ls.c @@ -124,7 +124,7 @@ out: static int do_ls(int argc, char *argv[]) { - int ret, opt, o; + int ret, opt, o, exitcode = 0; struct stat s; ulong flags = LS_COLUMN; struct string_list sl; @@ -165,6 +165,7 @@ static int do_ls(int argc, char *argv[]) printf("%s: %s: %s\n", argv[0], argv[o], errno_str()); o++; + exitcode = COMMAND_ERROR; continue; } @@ -190,6 +191,7 @@ static int do_ls(int argc, char *argv[]) ret = lstat(argv[o], &s); if (ret) { o++; + exitcode = COMMAND_ERROR; continue; } @@ -197,6 +199,7 @@ static int do_ls(int argc, char *argv[]) ret = ls(argv[o], flags); if (ret) { perror("ls"); + exitcode = COMMAND_ERROR; o++; continue; } @@ -205,7 +208,7 @@ static int do_ls(int argc, char *argv[]) o++; } - return 0; + return exitcode; } BAREBOX_CMD_HELP_START(ls) diff --git a/common/bootm.c b/common/bootm.c index 447c9b624c..08125e7bb0 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -245,25 +245,19 @@ static int bootm_open_initrd_uimage(struct image_data *data) return 0; } -static int bootm_open_oftree(struct image_data *data, const char *oftree, int num) +static int bootm_open_oftree_uimage(struct image_data *data) { - enum filetype ft; struct fdt_header *fdt; + enum filetype ft; + const char *oftree = data->oftree_file; + int num = data->oftree_num; + struct uimage_handle *of_handle; + int release = 0; size_t size; - printf("Loading devicetree from '%s'\n", oftree); - - ft = file_name_detect_type(oftree); - if ((int)ft < 0) { - printf("failed to open %s: %s\n", oftree, strerror(-(int)ft)); - return ft; - } - - if (ft == filetype_uimage) { -#ifdef CONFIG_CMD_BOOTM_OFTREE_UIMAGE - struct uimage_handle *of_handle; - int release = 0; + printf("Loading devicetree from '%s'@%d\n", oftree, num); + if (IS_ENABLED(CONFIG_CMD_BOOTM_OFTREE_UIMAGE)) { if (!strcmp(data->os_file, oftree)) { of_handle = data->os; } else if (!strcmp(data->initrd_file, oftree)) { @@ -280,23 +274,42 @@ static int bootm_open_oftree(struct image_data *data, const char *oftree, int nu if (release) uimage_close(of_handle); -#else - return -EINVAL; -#endif - } else { - fdt = read_file(oftree, &size); - if (!fdt) { - perror("open"); - return -ENODEV; + + ft = file_detect_type(fdt, size); + if (ft != filetype_oftree) { + printf("%s is not an oftree but %s\n", + data->oftree_file, file_type_to_string(ft)); + return -EINVAL; } - } - ft = file_detect_type(fdt, size); - if (ft != filetype_oftree) { - printf("%s is not an oftree but %s\n", oftree, - file_type_to_string(ft)); + data->of_root_node = of_unflatten_dtb(fdt); + if (!data->of_root_node) { + pr_err("unable to unflatten devicetree\n"); + free(fdt); + return -EINVAL; + } + + free(fdt); + + return 0; + } else { return -EINVAL; } +} + +static int bootm_open_oftree(struct image_data *data) +{ + struct fdt_header *fdt; + const char *oftree = data->oftree_file; + size_t size; + + printf("Loading devicetree from '%s'\n", oftree); + + fdt = read_file(oftree, &size); + if (!fdt) { + perror("open"); + return -ENODEV; + } data->of_root_node = of_unflatten_dtb(fdt); if (!data->of_root_node) { @@ -368,6 +381,7 @@ int bootm_boot(struct bootm_data *bootm_data) struct image_handler *handler; int ret; enum filetype os_type, initrd_type = filetype_unknown; + enum filetype oftree_type = filetype_unknown; if (!bootm_data->os_file) { printf("no image given\n"); @@ -401,6 +415,28 @@ int bootm_boot(struct bootm_data *bootm_data) goto err_out; } + if (IS_ENABLED(CONFIG_CMD_BOOTM_INITRD) && data->initrd_file) { + initrd_type = file_name_detect_type(data->initrd_file); + + if ((int)initrd_type < 0) { + printf("could not open %s: %s\n", data->initrd_file, + strerror(-initrd_type)); + ret = (int)initrd_type; + goto err_out; + } + } + + if (IS_ENABLED(CONFIG_OFTREE) && data->oftree_file) { + oftree_type = file_name_detect_type(data->oftree_file); + + if ((int)oftree_type < 0) { + printf("could not open %s: %s\n", data->oftree_file, + strerror(-oftree_type)); + ret = (int) oftree_type; + goto err_out; + } + } + if (os_type == filetype_uimage) { ret = bootm_open_os_uimage(data); if (ret) { @@ -411,14 +447,6 @@ int bootm_boot(struct bootm_data *bootm_data) } if (IS_ENABLED(CONFIG_CMD_BOOTM_INITRD) && data->initrd_file) { - - initrd_type = file_name_detect_type(data->initrd_file); - if ((int)initrd_type < 0) { - printf("could not open %s: %s\n", data->initrd_file, - strerror(-initrd_type)); - ret = (int)initrd_type; - goto err_out; - } if (initrd_type == filetype_uimage) { ret = bootm_open_initrd_uimage(data); if (ret) { @@ -438,7 +466,10 @@ int bootm_boot(struct bootm_data *bootm_data) if (IS_ENABLED(CONFIG_OFTREE)) { if (data->oftree_file) { - ret = bootm_open_oftree(data, data->oftree_file, data->oftree_num); + if (oftree_type == filetype_uimage) + ret = bootm_open_oftree_uimage(data); + if (oftree_type == filetype_oftree) + ret = bootm_open_oftree(data); if (ret) goto err_out; } else { diff --git a/common/console.c b/common/console.c index 84d4ea714d..4a1d2576d0 100644 --- a/common/console.c +++ b/common/console.c @@ -67,12 +67,6 @@ int console_set_active(struct console_device *cdev, unsigned flag) if (!cdev->putc) flag &= ~(CONSOLE_STDOUT | CONSOLE_STDERR); - if (flag && !cdev->f_active) { - /* The device is being activated, set its baudrate */ - if (cdev->setbrg) - cdev->setbrg(cdev, cdev->baudrate); - } - if (!flag && cdev->f_active && cdev->flush) cdev->flush(cdev); @@ -240,7 +234,7 @@ static int __console_puts(struct console_device *cdev, const char *s) int console_register(struct console_device *newcdev) { struct device_d *dev = &newcdev->class_dev; - int activate = 0; + int activate = 0, ret; if (initialized == CONSOLE_UNINITIALIZED) console_init_early(); @@ -258,6 +252,9 @@ int console_register(struct console_device *newcdev) platform_device_register(dev); if (newcdev->setbrg) { + ret = newcdev->setbrg(newcdev, CONFIG_BAUDRATE); + if (ret) + return ret; newcdev->baudrate = CONFIG_BAUDRATE; dev_add_param_int(dev, "baudrate", console_baudrate_set, NULL, &newcdev->baudrate_param, "%u", newcdev); diff --git a/common/environment.c b/common/environment.c index f6fd781a8a..f412e62258 100644 --- a/common/environment.c +++ b/common/environment.c @@ -324,16 +324,16 @@ int envfs_save(const char *filename, const char *dirname, unsigned flags) ret = protect(envfd, ~0, 0, 0); - /* ENOSYS is no error here, many devices do not need it */ - if (ret && errno != ENOSYS) { + /* ENOSYS and EOPNOTSUPP aren't errors here, many devices don't need it */ + if (ret && errno != ENOSYS && errno != EOPNOTSUPP) { printf("could not unprotect %s: %s\n", filename, errno_str()); goto out; } ret = erase(envfd, ~0, 0); - /* ENOSYS is no error here, many devices do not need it */ - if (ret && errno != ENOSYS) { + /* ENOSYS and EOPNOTSUPP aren't errors here, many devices don't need it */ + if (ret && errno != ENOSYS && errno != EOPNOTSUPP) { printf("could not erase %s: %s\n", filename, errno_str()); goto out; } @@ -355,8 +355,8 @@ int envfs_save(const char *filename, const char *dirname, unsigned flags) ret = protect(envfd, ~0, 0, 1); - /* ENOSYS is no error here, many devices do not need it */ - if (ret && errno != ENOSYS) { + /* ENOSYS and EOPNOTSUPP aren't errors here, many devices don't need it */ + if (ret && errno != ENOSYS && errno != EOPNOTSUPP) { printf("could not protect %s: %s\n", filename, errno_str()); goto out; } diff --git a/common/memtest.c b/common/memtest.c index 401b902c78..8af998e883 100644 --- a/common/memtest.c +++ b/common/memtest.c @@ -363,7 +363,7 @@ static int update_progress(resource_size_t offset) int mem_test_moving_inversions(resource_size_t _start, resource_size_t _end) { - volatile resource_size_t *start, num_words, offset, pattern, expected; + volatile resource_size_t *start, num_words, offset, temp, anti_pattern; int ret; _start = ALIGN(_start, sizeof(resource_size_t)); @@ -405,13 +405,17 @@ int mem_test_moving_inversions(resource_size_t _start, resource_size_t _end) if (ret) return ret; - pattern = start[offset]; - expected = offset + 1; - - if (pattern != expected) - goto mem_err; + temp = start[offset]; + if (temp != (offset + 1)) { + printf("\n"); + mem_test_report_failure("read/write", + (offset + 1), + temp, &start[offset]); + return -EIO; + } - start[offset] = ~start[offset]; + anti_pattern = ~(offset + 1); + start[offset] = anti_pattern; } /* Check each location for the inverted pattern and zero it */ @@ -420,11 +424,16 @@ int mem_test_moving_inversions(resource_size_t _start, resource_size_t _end) if (ret) return ret; - pattern = start[offset]; - expected = ~(offset + 1); + anti_pattern = ~(offset + 1); + temp = start[offset]; - if (pattern != expected) - goto mem_err; + if (temp != anti_pattern) { + printf("\n"); + mem_test_report_failure("read/write", + anti_pattern, + temp, &start[offset]); + return -EIO; + } start[offset] = 0; } @@ -434,10 +443,4 @@ int mem_test_moving_inversions(resource_size_t _start, resource_size_t _end) printf("\n"); return 0; - -mem_err: - printf("\n"); - mem_test_report_failure("read/write", expected, pattern, &start[offset]); - - return -EIO; } diff --git a/common/misc.c b/common/misc.c index 5532349e43..8b2417b660 100644 --- a/common/misc.c +++ b/common/misc.c @@ -130,9 +130,6 @@ void perror(const char *s) } EXPORT_SYMBOL(perror); -void (*do_execute)(void *func, int argc, char *argv[]); -EXPORT_SYMBOL(do_execute); - static char *model; /* diff --git a/common/state.c b/common/state.c index 117a686759..a161b94f3a 100644 --- a/common/state.c +++ b/common/state.c @@ -716,6 +716,8 @@ static int state_convert_node_variable(struct state *state, vtype = state_find_type_by_name(type_name); if (!vtype) { + dev_err(&state->dev, "unkown type: %s in %s\n", type_name, + node->full_name); ret = -ENOENT; goto out_free; } diff --git a/crypto/crc32.c b/crypto/crc32.c index e7b1bd76b6..58637bd770 100644 --- a/crypto/crc32.c +++ b/crypto/crc32.c @@ -16,6 +16,9 @@ #include <malloc.h> #include <linux/ctype.h> #include <errno.h> +#define STATIC +#else +#define STATIC static inline #endif #ifdef CONFIG_DYNAMIC_CRC_TABLE @@ -138,7 +141,7 @@ static const ulong crc_table[256] = { #define DO8(buf) DO4(buf); DO4(buf); /* ========================================================================= */ -uint32_t crc32(uint32_t crc, const void *_buf, unsigned int len) +STATIC uint32_t crc32(uint32_t crc, const void *_buf, unsigned int len) { const unsigned char *buf = _buf; @@ -164,7 +167,7 @@ EXPORT_SYMBOL(crc32); /* No ones complement version. JFFS2 (and other things ?) * don't use ones compliment in their CRC calculations. */ -uint32_t crc32_no_comp(uint32_t crc, const void *_buf, unsigned int len) +STATIC uint32_t crc32_no_comp(uint32_t crc, const void *_buf, unsigned int len) { const unsigned char *buf = _buf; @@ -184,7 +187,7 @@ uint32_t crc32_no_comp(uint32_t crc, const void *_buf, unsigned int len) return crc; } -int file_crc(char *filename, ulong start, ulong size, ulong *crc, +STATIC int file_crc(char *filename, ulong start, ulong size, ulong *crc, ulong *total) { int fd, now; diff --git a/defaultenv/defaultenv-2-base/boot/net b/defaultenv/defaultenv-2-base/boot/net index ced2fadba2..af096410b7 100644 --- a/defaultenv/defaultenv-2-base/boot/net +++ b/defaultenv/defaultenv-2-base/boot/net @@ -11,4 +11,10 @@ fi nfsroot="/home/${global.user}/nfsroot/${global.hostname}" bootargs-ip -global.linux.bootargs.dyn.root="root=/dev/nfs nfsroot=$nfsroot,v3,tcp" + +initramfs="${path}/${global.user}-initramfs-${global.hostname}" +if [ -f "${initramfs}" ]; then + global.bootm.initrd="$initramfs" +else + global.linux.bootargs.dyn.root="root=/dev/nfs nfsroot=$nfsroot,v3,tcp" +fi diff --git a/drivers/base/bus.c b/drivers/base/bus.c index 1264e40250..b889a48662 100644 --- a/drivers/base/bus.c +++ b/drivers/base/bus.c @@ -54,9 +54,6 @@ int device_match(struct device_d *dev, struct driver_d *drv) drv->of_compatible) return of_match(dev, drv); - if (!strcmp(dev->name, drv->name)) - return 0; - if (drv->id_table) { const struct platform_device_id *id = drv->id_table; @@ -67,6 +64,8 @@ int device_match(struct device_d *dev, struct driver_d *drv) } id++; } + } else if (!strcmp(dev->name, drv->name)) { + return 0; } return -1; diff --git a/drivers/base/driver.c b/drivers/base/driver.c index 943deb489c..a70fbb217a 100644 --- a/drivers/base/driver.c +++ b/drivers/base/driver.c @@ -380,7 +380,7 @@ void __iomem *dev_request_mem_region_by_name(struct device_d *dev, const char *n if (IS_ERR(res)) return ERR_CAST(res); - return (void __force __iomem *)res->start; + return IOMEM(res->start); } EXPORT_SYMBOL(dev_request_mem_region_by_name); @@ -396,7 +396,7 @@ void __iomem *dev_request_mem_region_err_null(struct device_d *dev, int num) if (IS_ERR(res)) return NULL; - return (void __force __iomem *)res->start; + return IOMEM(res->start); } EXPORT_SYMBOL(dev_request_mem_region_err_null); diff --git a/drivers/eeprom/at24.c b/drivers/eeprom/at24.c index 76f30e7e22..3c0a7a9d47 100644 --- a/drivers/eeprom/at24.c +++ b/drivers/eeprom/at24.c @@ -84,7 +84,9 @@ static unsigned io_limit = 128; */ static unsigned write_timeout = 25; +/* number of bits in driver_data reserved for eeprom byte length */ #define AT24_SIZE_BYTELEN 5 +/* number of bits in driver_data reserved for flags */ #define AT24_SIZE_FLAGS 8 #define AT24_BITMASK(x) (BIT(x) - 1) @@ -113,6 +115,7 @@ static struct platform_device_id at24_ids[] = { { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) }, { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) }, { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) }, + { "24c1025", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16 | AT24_FLAG_BANK_BIT_2) }, { "at24", 0 }, { /* END OF LIST */ } }; @@ -381,6 +384,7 @@ static int at24_probe(struct device_d *dev) chip = *(struct at24_platform_data *)dev->platform_data; } else { unsigned long magic; + u32 page_size; err = dev_get_drvdata(dev, (const void **)&magic); if (err) @@ -389,12 +393,17 @@ static int at24_probe(struct device_d *dev) chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); magic >>= AT24_SIZE_BYTELEN; chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); - /* - * This is slow, but we can't know all eeproms, so we better - * play safe. Specifying custom eeprom-types via platform_data - * is recommended anyhow. - */ - chip.page_size = 1; + if (dev->device_node && + !of_property_read_u32(dev->device_node, "pagesize", &page_size)) + chip.page_size = page_size; + else { + /* + * This is slow, but we can't know all eeproms, so we better + * play safe. Specifying custom eeprom-types via platform_data + * is recommended anyhow. + */ + chip.page_size = 1; + } } if (!is_power_of_2(chip.byte_len)) @@ -460,11 +469,12 @@ static int at24_probe(struct device_d *dev) /* use dummy devices for multiple-address chips */ for (i = 1; i < num_addresses; i++) { + const int shift = (chip.flags & AT24_FLAG_BANK_BIT_2) ? 2 : 0; at24->client[i] = i2c_new_dummy(client->adapter, - client->addr + i); + client->addr + (i << shift)); if (!at24->client[i]) { dev_err(&client->dev, "address 0x%02x unavailable\n", - client->addr + i); + client->addr + (i << shift)); err = -EADDRINUSE; goto err_clients; } diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 0c6aec39c9..56259d82d4 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -6,4 +6,13 @@ if I2C source drivers/i2c/algos/Kconfig source drivers/i2c/busses/Kconfig +config I2C_MUX + tristate "I2C bus multiplexing support" + help + Say Y here if you want the I2C core to support the ability to + handle multiplexed I2C bus topologies, by presenting each + multiplexed segment as a I2C adapter. + +source drivers/i2c/muxes/Kconfig + endif diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile index 648d844252..c93653414e 100644 --- a/drivers/i2c/Makefile +++ b/drivers/i2c/Makefile @@ -1 +1,2 @@ -obj-$(CONFIG_I2C) += i2c.o i2c-smbus.o busses/ algos/ +obj-$(CONFIG_I2C) += i2c.o i2c-smbus.o busses/ algos/ muxes/ +obj-$(CONFIG_I2C_MUX) += i2c-mux.o diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 181321b159..a25a871809 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -25,6 +25,12 @@ config I2C_IMX for many i.MX ARM based SoCs, for MPC85xx and MPC5200 PowerPC based SoCs. +config I2C_DESIGNWARE + bool "Synopsys DesignWare I2C Master driver" + help + If you say yes to this option, support will be included for the + Synopsys DesignWare I2C adapter. Only master mode is supported. + config I2C_MV64XXX bool "Marvell mv64xxx I2C Controller" depends on HAVE_CLK && OFDEVICE diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 1dbfbdf93b..8dccc38379 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o obj-$(CONFIG_I2C_OMAP) += i2c-omap.o obj-$(CONFIG_I2C_TEGRA) += i2c-tegra.o obj-$(CONFIG_I2C_VERSATILE) += i2c-versatile.o +obj-$(CONFIG_I2C_DESIGNWARE) += i2c-designware.o diff --git a/drivers/i2c/busses/i2c-designware.c b/drivers/i2c/busses/i2c-designware.c new file mode 100644 index 0000000000..a51439f2d5 --- /dev/null +++ b/drivers/i2c/busses/i2c-designware.c @@ -0,0 +1,574 @@ +/* + * Synopsys DesignWare I2C adapter driver (master only). + * + * Partly based on code of similar driver from U-Boot: + * Copyright (C) 2009 ST Micoelectronics + * + * and corresponding code from Linux Kernel + * Copyright (C) 2006 Texas Instruments. + * Copyright (C) 2007 MontaVista Software Inc. + * Copyright (C) 2009 Provigent Ltd. + * + * Copyright (C) 2015 Andrey Smirnov <andrew.smirnov@gmail.com> + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <clock.h> +#include <common.h> +#include <driver.h> +#include <init.h> +#include <of.h> +#include <malloc.h> +#include <types.h> +#include <xfuncs.h> +#include <linux/clk.h> +#include <linux/err.h> + +#include <io.h> +#include <i2c/i2c.h> + +#define DW_I2C_BIT_RATE 100000 + +#define DW_IC_CON 0x0 +#define DW_IC_CON_MASTER (1 << 0) +#define DW_IC_CON_SPEED_STD (1 << 1) +#define DW_IC_CON_SPEED_FAST (1 << 2) +#define DW_IC_CON_SLAVE_DISABLE (1 << 6) + +#define DW_IC_TAR 0x4 + +#define DW_IC_DATA_CMD 0x10 +#define DW_IC_DATA_CMD_CMD (1 << 8) +#define DW_IC_DATA_CMD_STOP (1 << 9) + +#define DW_IC_SS_SCL_HCNT 0x14 +#define DW_IC_SS_SCL_LCNT 0x18 +#define DW_IC_FS_SCL_HCNT 0x1c +#define DW_IC_FS_SCL_LCNT 0x20 + +#define DW_IC_INTR_MASK 0x30 + +#define DW_IC_RAW_INTR_STAT 0x34 +#define DW_IC_INTR_RX_UNDER (1 << 0) +#define DW_IC_INTR_RX_OVER (1 << 1) +#define DW_IC_INTR_RX_FULL (1 << 2) +#define DW_IC_INTR_TX_OVER (1 << 3) +#define DW_IC_INTR_TX_EMPTY (1 << 4) +#define DW_IC_INTR_RD_REQ (1 << 5) +#define DW_IC_INTR_TX_ABRT (1 << 6) +#define DW_IC_INTR_RX_DONE (1 << 7) +#define DW_IC_INTR_ACTIVITY (1 << 8) +#define DW_IC_INTR_STOP_DET (1 << 9) +#define DW_IC_INTR_START_DET (1 << 10) +#define DW_IC_INTR_GEN_CALL (1 << 11) + +#define DW_IC_RX_TL 0x38 +#define DW_IC_TX_TL 0x3c +#define DW_IC_CLR_INTR 0x40 +#define DW_IC_CLR_TX_ABRT 0x54 + +#define DW_IC_ENABLE 0x6c +#define DW_IC_ENABLE_ENABLE (1 << 0) + +#define DW_IC_STATUS 0x70 +#define DW_IC_STATUS_TFNF (1 << 1) +#define DW_IC_STATUS_TFE (1 << 2) +#define DW_IC_STATUS_RFNE (1 << 3) +#define DW_IC_STATUS_MST_ACTIVITY (1 << 5) + +#define DW_IC_TX_ABRT_SOURCE 0x80 + +#define DW_IC_ENABLE_STATUS 0x9c +#define DW_IC_ENABLE_STATUS_IC_EN (1 << 0) + +#define DW_IC_COMP_TYPE 0xfc +#define DW_IC_COMP_TYPE_VALUE 0x44570140 + +#define MAX_T_POLL_COUNT 100 + +#define DW_TIMEOUT_IDLE (40 * MSECOND) +#define DW_TIMEOUT_TX (2 * MSECOND) +#define DW_TIMEOUT_RX (2 * MSECOND) + +struct dw_i2c_dev { + void __iomem *base; + struct clk *clk; + struct i2c_adapter adapter; +}; + +static inline struct dw_i2c_dev *to_dw_i2c_dev(struct i2c_adapter *a) +{ + return container_of(a, struct dw_i2c_dev, adapter); +} + +static void i2c_dw_enable(struct dw_i2c_dev *dw, bool enable) +{ + /* + * This subrotine is an implementation of an algorithm + * described in "Cyclone V Hard Processor System Technical + * Reference * Manual" p. 20-19, "Disabling the I2C Controller" + */ + int timeout = MAX_T_POLL_COUNT; + + enable = enable ? DW_IC_ENABLE_ENABLE : 0; + + do { + uint32_t ic_enable_status; + + writel(enable, dw->base + DW_IC_ENABLE); + + ic_enable_status = readl(dw->base + DW_IC_ENABLE_STATUS); + if ((ic_enable_status & DW_IC_ENABLE_STATUS_IC_EN) == enable) + return; + + udelay(250); + } while (timeout--); + + dev_warn(&dw->adapter.dev, "timeout in %sabling adapter\n", + enable ? "en" : "dis"); +} + +/* + * All of the code pertaining to tming calculation is taken from + * analogous driver in Linux kernel + */ +static uint32_t +i2c_dw_scl_hcnt(uint32_t ic_clk, uint32_t tSYMBOL, uint32_t tf, int cond, + int offset) +{ + /* + * DesignWare I2C core doesn't seem to have solid strategy to meet + * the tHD;STA timing spec. Configuring _HCNT based on tHIGH spec + * will result in violation of the tHD;STA spec. + */ + if (cond) + /* + * Conditional expression: + * + * IC_[FS]S_SCL_HCNT + (1+4+3) >= IC_CLK * tHIGH + * + * This is based on the DW manuals, and represents an ideal + * configuration. The resulting I2C bus speed will be + * faster than any of the others. + * + * If your hardware is free from tHD;STA issue, try this one. + */ + return (ic_clk * tSYMBOL + 500000) / 1000000 - 8 + offset; + else + /* + * Conditional expression: + * + * IC_[FS]S_SCL_HCNT + 3 >= IC_CLK * (tHD;STA + tf) + * + * This is just experimental rule; the tHD;STA period turned + * out to be proportinal to (_HCNT + 3). With this setting, + * we could meet both tHIGH and tHD;STA timing specs. + * + * If unsure, you'd better to take this alternative. + * + * The reason why we need to take into account "tf" here, + * is the same as described in i2c_dw_scl_lcnt(). + */ + return (ic_clk * (tSYMBOL + tf) + 500000) / 1000000 + - 3 + offset; +} + +static uint32_t +i2c_dw_scl_lcnt(uint32_t ic_clk, uint32_t tLOW, uint32_t tf, int offset) +{ + /* + * Conditional expression: + * + * IC_[FS]S_SCL_LCNT + 1 >= IC_CLK * (tLOW + tf) + * + * DW I2C core starts counting the SCL CNTs for the LOW period + * of the SCL clock (tLOW) as soon as it pulls the SCL line. + * In order to meet the tLOW timing spec, we need to take into + * account the fall time of SCL signal (tf). Default tf value + * should be 0.3 us, for safety. + */ + return ((ic_clk * (tLOW + tf) + 500000) / 1000000) - 1 + offset; +} + +static void i2c_dw_setup_timings(struct dw_i2c_dev *dw) +{ + uint32_t hcnt, lcnt; + + const uint32_t sda_falling_time = 300; /* ns */ + const uint32_t scl_falling_time = 300; /* ns */ + + const unsigned int input_clock_khz = clk_get_rate(dw->clk) / 1000; + + /* Set SCL timing parameters for standard-mode */ + hcnt = i2c_dw_scl_hcnt(input_clock_khz, + 4000, /* tHD;STA = tHIGH = 4.0 us */ + sda_falling_time, + 0, /* 0: DW default, 1: Ideal */ + 0); /* No offset */ + lcnt = i2c_dw_scl_lcnt(input_clock_khz, + 4700, /* tLOW = 4.7 us */ + scl_falling_time, + 0); /* No offset */ + + writel(hcnt, dw->base + DW_IC_SS_SCL_HCNT); + writel(lcnt, dw->base + DW_IC_SS_SCL_LCNT); + + hcnt = i2c_dw_scl_hcnt(input_clock_khz, + 600, /* tHD;STA = tHIGH = 0.6 us */ + sda_falling_time, + 0, /* 0: DW default, 1: Ideal */ + 0); /* No offset */ + lcnt = i2c_dw_scl_lcnt(input_clock_khz, + 1300, /* tLOW = 1.3 us */ + scl_falling_time, + 0); /* No offset */ + + writel(hcnt, dw->base + DW_IC_FS_SCL_HCNT); + writel(lcnt, dw->base + DW_IC_FS_SCL_LCNT); +} + +static int i2c_dw_wait_for_bits(struct dw_i2c_dev *dw, uint32_t offset, + uint32_t mask, uint32_t value, uint64_t timeout) +{ + const uint64_t start = get_time_ns(); + + do { + const uint32_t reg = readl(dw->base + offset); + + if ((reg & mask) == value) + return 0; + + } while (!is_timeout(start, timeout)); + + return -ETIMEDOUT; +} + +static int i2c_dw_wait_for_idle(struct dw_i2c_dev *dw) +{ + const uint32_t mask = DW_IC_STATUS_MST_ACTIVITY | DW_IC_STATUS_TFE; + const uint32_t value = DW_IC_STATUS_TFE; + + return i2c_dw_wait_for_bits(dw, DW_IC_STATUS, mask, value, + DW_TIMEOUT_IDLE); +} + +static int i2c_dw_wait_for_tx_fifo_not_full(struct dw_i2c_dev *dw) +{ + const uint32_t mask = DW_IC_STATUS_TFNF; + const uint32_t value = DW_IC_STATUS_TFNF; + + return i2c_dw_wait_for_bits(dw, DW_IC_STATUS, mask, value, + DW_TIMEOUT_TX); +} + +static int i2c_dw_wait_for_rx_fifo_not_empty(struct dw_i2c_dev *dw) +{ + const uint32_t mask = DW_IC_STATUS_RFNE; + const uint32_t value = DW_IC_STATUS_RFNE; + + return i2c_dw_wait_for_bits(dw, DW_IC_STATUS, mask, value, + DW_TIMEOUT_RX); +} + +static void i2c_dw_reset(struct dw_i2c_dev *dw) +{ + i2c_dw_enable(dw, false); + i2c_dw_enable(dw, true); +} + +static void i2c_dw_abort_tx(struct dw_i2c_dev *dw) +{ + i2c_dw_reset(dw); +} + +static void i2c_dw_abort_rx(struct dw_i2c_dev *dw) +{ + i2c_dw_reset(dw); +} + +static int i2c_dw_read(struct dw_i2c_dev *dw, + const struct i2c_msg *msg) +{ + int i; + for (i = 0; i < msg->len; i++) { + int ret; + const bool last_byte = i == msg->len - 1; + uint32_t ic_cmd_data = DW_IC_DATA_CMD_CMD; + + if (last_byte) + ic_cmd_data |= DW_IC_DATA_CMD_STOP; + + writel(ic_cmd_data, dw->base + DW_IC_DATA_CMD); + + ret = i2c_dw_wait_for_rx_fifo_not_empty(dw); + if (ret < 0) { + i2c_dw_abort_rx(dw); + return ret; + } + + msg->buf[i] = (uint8_t)readl(dw->base + DW_IC_DATA_CMD); + } + + return msg->len; +} + +static int i2c_dw_write(struct dw_i2c_dev *dw, + const struct i2c_msg *msg) +{ + int i; + uint32_t ic_int_stat; + + for (i = 0; i < msg->len; i++) { + int ret; + uint32_t ic_cmd_data; + const bool last_byte = i == msg->len - 1; + + ic_int_stat = readl(dw->base + DW_IC_RAW_INTR_STAT); + + if (ic_int_stat & DW_IC_INTR_TX_ABRT) + return -EIO; + + ret = i2c_dw_wait_for_tx_fifo_not_full(dw); + if (ret < 0) { + i2c_dw_abort_tx(dw); + return ret; + } + + ic_cmd_data = msg->buf[i]; + + if (last_byte) + ic_cmd_data |= DW_IC_DATA_CMD_STOP; + + writel(ic_cmd_data, dw->base + DW_IC_DATA_CMD); + } + + return msg->len; +} + +static int i2c_dw_wait_for_stop(struct dw_i2c_dev *dw) +{ + const uint32_t mask = DW_IC_INTR_STOP_DET; + const uint32_t value = DW_IC_INTR_STOP_DET; + + return i2c_dw_wait_for_bits(dw, DW_IC_RAW_INTR_STAT, mask, value, + DW_TIMEOUT_IDLE); +} + +static int i2c_dw_finish_xfer(struct dw_i2c_dev *dw) +{ + int ret; + uint32_t ic_int_stat; + + /* + * We expect the controller to signal STOP condition on the + * bus, so we are going to wait for that first. + */ + ret = i2c_dw_wait_for_stop(dw); + if (ret < 0) + return ret; + + /* + * Now that we now that the stop condition has been signaled + * we need to wait for controller to go into IDLE state to + * make sure all of the possible error conditions on the bus + * have been propagated to apporpriate status + * registers. Experiment shows that not doing so often results + * in false positive "successful" transfers + */ + ret = i2c_dw_wait_for_idle(dw); + + if (ret >= 0) { + ic_int_stat = readl(dw->base + DW_IC_RAW_INTR_STAT); + + if (ic_int_stat & DW_IC_INTR_TX_ABRT) + return -EIO; + } + + return ret; +} + +static int i2c_dw_set_address(struct dw_i2c_dev *dw, uint8_t address) +{ + int ret; + uint32_t ic_tar; + /* + * As per "Cyclone V Hard Processor System Technical Reference + * Manual" p. 20-19, we have to wait for controller to be in + * idle state in order to be able to set the address + * dynamically + */ + ret = i2c_dw_wait_for_idle(dw); + if (ret < 0) + return ret; + + ic_tar = readl(dw->base + DW_IC_TAR); + ic_tar &= 0xfffffc00; + + writel(ic_tar | address, dw->base + DW_IC_TAR); + + return 0; +} + +static int i2c_dw_xfer(struct i2c_adapter *adapter, + struct i2c_msg *msgs, int num) +{ + int i, ret = 0; + struct dw_i2c_dev *dw = to_dw_i2c_dev(adapter); + + for (i = 0; i < num; i++) { + if (msgs[i].flags & I2C_M_DATA_ONLY) + return -ENOTSUPP; + + ret = i2c_dw_set_address(dw, msgs[i].addr); + if (ret < 0) + break; + + if (msgs[i].flags & I2C_M_RD) + ret = i2c_dw_read(dw, &msgs[i]); + else + ret = i2c_dw_write(dw, &msgs[i]); + + if (ret < 0) + break; + + ret = i2c_dw_finish_xfer(dw); + if (ret < 0) + break; + } + + if (ret == -EIO) { + /* + * If we got -EIO it means that transfer was for some + * reason aborted, so we should figure out the reason + * and take steps to clear that condition + */ + const uint32_t ic_tx_abrt_source = + readl(dw->base + DW_IC_TX_ABRT_SOURCE); + dev_dbg(&dw->adapter.dev, + "<%s> ic_tx_abrt_source: 0x%04x\n", + __func__, ic_tx_abrt_source); + readl(dw->base + DW_IC_CLR_TX_ABRT); + + return ret; + } + + if (ret < 0) { + i2c_dw_reset(dw); + return ret; + } + + return num; +} + + +static int i2c_dw_probe(struct device_d *pdev) +{ + struct dw_i2c_dev *dw; + struct i2c_platform_data *pdata; + int ret, bitrate; + uint32_t ic_con, ic_comp_type_value; + + pdata = pdev->platform_data; + + dw = xzalloc(sizeof(*dw)); + + if (IS_ENABLED(CONFIG_COMMON_CLK)) { + dw->clk = clk_get(pdev, NULL); + if (IS_ERR(dw->clk)) { + ret = PTR_ERR(dw->clk); + goto fail; + } + } + + dw->adapter.master_xfer = i2c_dw_xfer; + dw->adapter.nr = pdev->id; + dw->adapter.dev.parent = pdev; + dw->adapter.dev.device_node = pdev->device_node; + + dw->base = dev_request_mem_region(pdev, 0); + if (IS_ERR(dw->base)) { + ret = PTR_ERR(dw->base); + goto fail; + } + + ic_comp_type_value = readl(dw->base + DW_IC_COMP_TYPE); + if (ic_comp_type_value != DW_IC_COMP_TYPE_VALUE) { + dev_err(pdev, + "unknown DesignWare IP block 0x%08x", + ic_comp_type_value); + ret = -ENODEV; + goto fail; + } + + i2c_dw_enable(dw, false); + + if (IS_ENABLED(CONFIG_COMMON_CLK)) + i2c_dw_setup_timings(dw); + + bitrate = (pdata && pdata->bitrate) ? pdata->bitrate : DW_I2C_BIT_RATE; + + /* + * We have to clear 'ic_10bitaddr_master' in 'ic_tar' + * register, otherwise 'ic_10bitaddr_master' in 'ic_con' + * wouldn't clear. We don't care about preserving the contents + * of that register so we set it to zero. + */ + writel(0, dw->base + DW_IC_TAR); + + switch (bitrate) { + case 400000: + ic_con = DW_IC_CON_SPEED_FAST; + break; + default: + dev_warn(pdev, "requested bitrate (%d) is not supported." + " Falling back to 100kHz", bitrate); + case 100000: /* FALLTHROUGH */ + ic_con = DW_IC_CON_SPEED_STD; + break; + } + + ic_con |= DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE; + + writel(ic_con, dw->base + DW_IC_CON); + + /* + * Since we will be working in polling mode set both + * thresholds to their minimum + */ + writel(0, dw->base + DW_IC_RX_TL); + writel(0, dw->base + DW_IC_TX_TL); + + /* Disable and clear all interrrupts */ + writel(0, dw->base + DW_IC_INTR_MASK); + readl(dw->base + DW_IC_CLR_INTR); + + i2c_dw_enable(dw, true); + + ret = i2c_add_numbered_adapter(&dw->adapter); +fail: + if (ret < 0) + kfree(dw); + + return ret; +} + +static __maybe_unused struct of_device_id i2c_dw_dt_ids[] = { + { .compatible = "snps,designware-i2c", }, + { /* sentinel */ } +}; + +static struct driver_d i2c_dw_driver = { + .probe = i2c_dw_probe, + .name = "i2c-designware", + .of_compatible = DRV_OF_COMPAT(i2c_dw_dt_ids), +}; +coredevice_platform_driver(i2c_dw_driver); diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 7df4a26dd3..affc277164 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -590,7 +590,7 @@ static int __init i2c_fsl_probe(struct device_d *pdev) pdata = pdev->platform_data; - i2c_fsl = kzalloc(sizeof(struct fsl_i2c_struct), GFP_KERNEL); + i2c_fsl = xzalloc(sizeof(*i2c_fsl)); #ifdef CONFIG_COMMON_CLK i2c_fsl->clk = clk_get(pdev, NULL); diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c new file mode 100644 index 0000000000..f87e1fadb6 --- /dev/null +++ b/drivers/i2c/i2c-mux.c @@ -0,0 +1,148 @@ +/* + * Multiplexed I2C bus driver. + * + * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it> + * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it> + * Copyright (c) 2009-2010 NSN GmbH & Co KG <michael.lawnick.ext@nsn.com> + * + * Ported to barebox from linux-v4.4-rc1 + * Copyright (C) 2015 Antony Pavlov <antonynpavlov@gmail.com> + * + * Simplifies access to complex multiplexed I2C bus topologies, by presenting + * each multiplexed bus segment as an additional I2C adapter. + * Supports multi-level mux'ing (mux behind a mux). + * + * Based on: + * i2c-virt.c from Kumar Gala <galak@kernel.crashing.org> + * i2c-virtual.c from Ken Harrenstien, Copyright (c) 2004 Google, Inc. + * i2c-virtual.c from Brian Kuschak <bkuschak@yahoo.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <common.h> +#include <malloc.h> +#include <xfuncs.h> +#include <of.h> +#include <i2c/i2c.h> +#include <i2c/i2c-mux.h> + +/* multiplexer per channel data */ +struct i2c_mux_priv { + struct i2c_adapter adap; + + struct i2c_adapter *parent; + struct device_d *mux_dev; + void *mux_priv; + u32 chan_id; + + int (*select)(struct i2c_adapter *, void *mux_priv, u32 chan_id); + int (*deselect)(struct i2c_adapter *, void *mux_priv, u32 chan_id); +}; + +static int i2c_mux_master_xfer(struct i2c_adapter *adap, + struct i2c_msg msgs[], int num) +{ + struct i2c_mux_priv *priv = adap->algo_data; + struct i2c_adapter *parent = priv->parent; + int ret; + + /* Switch to the right mux port and perform the transfer. */ + + ret = priv->select(parent, priv->mux_priv, priv->chan_id); + if (ret >= 0) + ret = parent->master_xfer(parent, msgs, num); + if (priv->deselect) + priv->deselect(parent, priv->mux_priv, priv->chan_id); + + return ret; +} + +struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent, + struct device_d *mux_dev, + void *mux_priv, u32 force_nr, u32 chan_id, + int (*select) (struct i2c_adapter *, + void *, u32), + int (*deselect) (struct i2c_adapter *, + void *, u32)) +{ + struct i2c_mux_priv *priv; + int ret; + + priv = kzalloc(sizeof(struct i2c_mux_priv), GFP_KERNEL); + if (!priv) + return NULL; + + /* Set up private adapter data */ + priv->parent = parent; + priv->mux_dev = mux_dev; + priv->mux_priv = mux_priv; + priv->chan_id = chan_id; + priv->select = select; + priv->deselect = deselect; + + /* Need to do algo dynamically because we don't know ahead + * of time what sort of physical adapter we'll be dealing with. + */ + if (parent->master_xfer) + priv->adap.master_xfer = i2c_mux_master_xfer; + + /* Now fill out new adapter structure */ + priv->adap.algo_data = priv; + priv->adap.dev.parent = &parent->dev; + priv->adap.retries = parent->retries; + + /* + * Try to populate the mux adapter's device_node, expands to + * nothing if !CONFIG_OF. + */ + if (mux_dev->device_node) { + struct device_node *child; + u32 reg; + + for_each_child_of_node(mux_dev->device_node, child) { + ret = of_property_read_u32(child, "reg", ®); + if (ret) + continue; + if (chan_id == reg) { + priv->adap.dev.device_node = child; + break; + } + } + } + + if (force_nr) { + priv->adap.nr = force_nr; + } else { + priv->adap.nr = -1; + } + + ret = i2c_add_numbered_adapter(&priv->adap); + if (ret < 0) { + dev_err(&parent->dev, + "failed to add mux-adapter (error=%d)\n", + ret); + kfree(priv); + return NULL; + } + + dev_info(&parent->dev, "Added multiplexed i2c bus %d\n", + i2c_adapter_id(&priv->adap)); + + return &priv->adap; +} +EXPORT_SYMBOL_GPL(i2c_add_mux_adapter); + +void i2c_del_mux_adapter(struct i2c_adapter *adap) +{ + struct i2c_mux_priv *priv = adap->algo_data; + + free(priv); +} +EXPORT_SYMBOL_GPL(i2c_del_mux_adapter); + +MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>"); +MODULE_DESCRIPTION("I2C driver for multiplexed I2C busses"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/i2c/i2c.c b/drivers/i2c/i2c.c index 52aaea8170..fa2c0cd136 100644 --- a/drivers/i2c/i2c.c +++ b/drivers/i2c/i2c.c @@ -42,7 +42,7 @@ struct boardinfo { }; static LIST_HEAD(board_list); -static LIST_HEAD(adapter_list); +LIST_HEAD(i2c_adapter_list); /** * i2c_transfer - execute a single or combined I2C message @@ -358,6 +358,14 @@ int i2c_recover_bus(struct i2c_adapter *adap) return adap->bus_recovery_info->recover_bus(adap); } +static void i2c_info(struct device_d *dev) +{ + const struct i2c_client *client = to_i2c_client(dev); + + printf(" Address: 0x%02x\n", client->addr); + return; +} + /** * i2c_new_device - instantiate one new I2C device * @@ -396,6 +404,7 @@ static struct i2c_client *i2c_new_device(struct i2c_adapter *adapter, free(client); return NULL; } + client->dev.info = i2c_info; return client; } @@ -529,7 +538,7 @@ struct i2c_adapter *i2c_get_adapter(int busnum) { struct i2c_adapter *adap; - list_for_each_entry(adap, &adapter_list, list) + for_each_i2c_adapter(adap) if (adap->nr == busnum) return adap; return NULL; @@ -539,7 +548,7 @@ struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node) { struct i2c_adapter *adap; - list_for_each_entry(adap, &adapter_list, list) + for_each_i2c_adapter(adap) if (adap->dev.device_node == node) return adap; @@ -584,7 +593,7 @@ int i2c_add_numbered_adapter(struct i2c_adapter *adapter) if (ret) return ret; - list_add_tail(&adapter->list, &adapter_list); + list_add_tail(&adapter->list, &i2c_adapter_list); /* populate children from any i2c device tables */ scan_boardinfo(adapter); diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig new file mode 100644 index 0000000000..74b73459aa --- /dev/null +++ b/drivers/i2c/muxes/Kconfig @@ -0,0 +1,14 @@ +# +# Multiplexer I2C chip drivers configuration +# + +menu "Multiplexer I2C Chip support" + depends on I2C_MUX + +config I2C_MUX_PCA954x + tristate "Philips PCA954x I2C Mux/switches" + help + If you say yes here you get support for the Philips PCA954x + I2C mux/switch devices. + +endmenu diff --git a/drivers/i2c/muxes/Makefile b/drivers/i2c/muxes/Makefile new file mode 100644 index 0000000000..f35d40d0e3 --- /dev/null +++ b/drivers/i2c/muxes/Makefile @@ -0,0 +1,4 @@ +# +# Makefile for multiplexer I2C chip drivers. + +obj-$(CONFIG_I2C_MUX_PCA954x) += i2c-mux-pca954x.o diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c new file mode 100644 index 0000000000..baeae7bb94 --- /dev/null +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c @@ -0,0 +1,251 @@ +/* + * I2C multiplexer + * + * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it> + * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it> + * + * Ported to barebox from linux-v4.4-rc1 + * Copyright (C) 2015 Antony Pavlov <antonynpavlov@gmail.com> + * + * This module supports the PCA954x series of I2C multiplexer/switch chips + * made by Philips Semiconductors. + * This includes the: + * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547 + * and PCA9548. + * + * These chips are all controlled via the I2C bus itself, and all have a + * single 8-bit register. The upstream "parent" bus fans out to two, + * four, or eight downstream busses or channels; which of these + * are selected is determined by the chip type and register contents. A + * mux can select only one sub-bus at a time; a switch can select any + * combination simultaneously. + * + * Based on: + * pca954x.c from Kumar Gala <galak@kernel.crashing.org> + * Copyright (C) 2006 + * + * Based on: + * pca954x.c from Ken Harrenstien + * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) + * + * Based on: + * i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com> + * and + * pca9540.c from Jean Delvare <jdelvare@suse.de>. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <common.h> +#include <driver.h> +#include <malloc.h> +#include <i2c/i2c.h> +#include <i2c/i2c-algo-bit.h> +#include <i2c/i2c-mux.h> +#include <init.h> + +#define PCA954X_MAX_NCHANS 8 + +enum pca_type { + pca_9540, + pca_9542, + pca_9543, + pca_9544, + pca_9545, + pca_9546, + pca_9547, + pca_9548, +}; + +struct pca954x { + enum pca_type type; + struct i2c_adapter *virt_adaps[PCA954X_MAX_NCHANS]; + + u8 last_chan; /* last register value */ +}; + +struct chip_desc { + u8 nchans; + u8 enable; /* used for muxes only */ + enum muxtype { + pca954x_ismux = 0, + pca954x_isswi + } muxtype; +}; + +/* Provide specs for the PCA954x types we know about */ +static const struct chip_desc chips[] = { + [pca_9540] = { + .nchans = 2, + .enable = 0x4, + .muxtype = pca954x_ismux, + }, + [pca_9543] = { + .nchans = 2, + .muxtype = pca954x_isswi, + }, + [pca_9544] = { + .nchans = 4, + .enable = 0x4, + .muxtype = pca954x_ismux, + }, + [pca_9545] = { + .nchans = 4, + .muxtype = pca954x_isswi, + }, + [pca_9547] = { + .nchans = 8, + .enable = 0x8, + .muxtype = pca954x_ismux, + }, + [pca_9548] = { + .nchans = 8, + .muxtype = pca954x_isswi, + }, +}; + +static const struct platform_device_id pca954x_id[] = { + { "pca9540", pca_9540 }, + { "pca9542", pca_9540 }, + { "pca9543", pca_9543 }, + { "pca9544", pca_9544 }, + { "pca9545", pca_9545 }, + { "pca9546", pca_9545 }, + { "pca9547", pca_9547 }, + { "pca9548", pca_9548 }, + { } +}; + +/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() + for this as they will try to lock adapter a second time */ +static int pca954x_reg_write(struct i2c_adapter *adap, + struct i2c_client *client, u8 val) +{ + int ret = -ENODEV; + + if (adap->master_xfer) { + struct i2c_msg msg; + char buf[1]; + + msg.addr = client->addr; + msg.flags = 0; + msg.len = 1; + buf[0] = val; + msg.buf = buf; + ret = adap->master_xfer(adap, &msg, 1); + } else { + union i2c_smbus_data data; + ret = i2c_smbus_xfer(adap, client->addr, + 0 /* client->flags */, + I2C_SMBUS_WRITE, + val, I2C_SMBUS_BYTE, &data); + } + + return ret; +} + +static int pca954x_select_chan(struct i2c_adapter *adap, + void *client, u32 chan) +{ + struct pca954x *data = i2c_get_clientdata(client); + const struct chip_desc *chip = &chips[data->type]; + u8 regval; + int ret = 0; + + /* we make switches look like muxes, not sure how to be smarter */ + if (chip->muxtype == pca954x_ismux) + regval = chan | chip->enable; + else + regval = 1 << chan; + + /* Only select the channel if its different from the last channel */ + if (data->last_chan != regval) { + ret = pca954x_reg_write(adap, client, regval); + data->last_chan = regval; + } + + return ret; +} + +/* + * I2C init/probing/exit functions + */ +static int pca954x_probe(struct device_d *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); + int num, force; + struct pca954x *data; + int ret = -ENODEV; + + data = kzalloc(sizeof(struct pca954x), GFP_KERNEL); + if (!data) { + ret = -ENOMEM; + goto err; + } + + i2c_set_clientdata(client, data); + + /* Read the mux register at addr to verify + * that the mux is in fact present. + */ + if (i2c_smbus_read_byte(client) < 0) { + dev_warn(&client->dev, "probe failed\n"); + goto exit_free; + } + + ret = dev_get_drvdata(dev, (const void **)&data->type); + if (ret) + goto exit_free; + + data->last_chan = 0; /* force the first selection */ + + /* Now create an adapter for each channel */ + for (num = 0; num < chips[data->type].nchans; num++) { + + data->virt_adaps[num] = + i2c_add_mux_adapter(adap, &client->dev, client, + 0, num, pca954x_select_chan, NULL); + + if (data->virt_adaps[num] == NULL) { + ret = -ENODEV; + dev_err(&client->dev, + "failed to register multiplexed adapter" + " %d as bus %d\n", num, force); + goto virt_reg_failed; + } + } + + dev_info(&client->dev, + "registered %d multiplexed busses for I2C %s\n", + num, chips[data->type].muxtype == pca954x_ismux + ? "mux" : "switch"); + + return 0; + +virt_reg_failed: + for (num--; num >= 0; num--) + i2c_del_mux_adapter(data->virt_adaps[num]); +exit_free: + kfree(data); +err: + return ret; +} + +static struct driver_d pca954x_driver = { + .name = "pca954x", + .probe = pca954x_probe, + .id_table = pca954x_id, +}; + +static int __init pca954x_init(void) +{ + return i2c_driver_register(&pca954x_driver); +} +device_initcall(pca954x_init); + +MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>"); +MODULE_DESCRIPTION("PCA954x I2C mux/switch driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/mci/dw_mmc.c b/drivers/mci/dw_mmc.c index acdf795ac1..cbd3f00646 100644 --- a/drivers/mci/dw_mmc.c +++ b/drivers/mci/dw_mmc.c @@ -676,11 +676,9 @@ static int dw_mmc_detect(struct device_d *dev) static int dw_mmc_probe(struct device_d *dev) { struct dwmci_host *host; - struct mci_host *mci; struct dw_mmc_platform_data *pdata = dev->platform_data; host = xzalloc(sizeof(*host)); - mci = &host->mci; host->clk_biu = clk_get(dev, "biu"); if (IS_ERR(host->clk_biu)) @@ -698,13 +696,27 @@ static int dw_mmc_probe(struct device_d *dev) if (IS_ERR(host->ioaddr)) return PTR_ERR(host->ioaddr); + host->idmac = dma_alloc_coherent(sizeof(*host->idmac) * DW_MMC_NUM_IDMACS, + DMA_ADDRESS_BROKEN); + + host->mci.send_cmd = dwmci_cmd; + host->mci.set_ios = dwmci_set_ios; + host->mci.init = dwmci_init; + host->mci.card_present = dwmci_card_present; + host->mci.hw_dev = dev; + host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; + host->mci.host_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; + host->mci.host_caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED_52MHZ | + MMC_CAP_SD_HIGHSPEED; + if (pdata) { - mci->devname = pdata->devname; host->ciu_div = pdata->ciu_div; + host->mci.host_caps &= ~MMC_CAP_BIT_DATA_MASK; + host->mci.host_caps |= pdata->bus_width_caps; } else if (dev->device_node) { const char *alias = of_alias_get(dev->device_node); if (alias) - mci->devname = xstrdup(alias); + host->mci.devname = xstrdup(alias); of_property_read_u32(dev->device_node, "dw-mshc-ciu-div", &host->ciu_div); } @@ -712,17 +724,6 @@ static int dw_mmc_probe(struct device_d *dev) /* divider is 0 based in pdata and 1 based in our private struct */ host->ciu_div++; - host->idmac = dma_alloc_coherent(sizeof(*host->idmac) * DW_MMC_NUM_IDMACS, - DMA_ADDRESS_BROKEN); - - host->mci.send_cmd = dwmci_cmd; - host->mci.set_ios = dwmci_set_ios; - host->mci.init = dwmci_init; - host->mci.card_present = dwmci_card_present; - host->mci.hw_dev = dev; - host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; - host->mci.host_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; - if (of_device_is_compatible(dev->device_node, "rockchip,rk2928-dw-mshc")) host->pwren_value = 0; diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c index 29c0d5474e..4e6b83be5f 100644 --- a/drivers/mci/mci-core.c +++ b/drivers/mci/mci-core.c @@ -1819,23 +1819,29 @@ void mci_of_parse(struct mci_host *host) /* "bus-width" is translated to MMC_CAP_*_BIT_DATA flags */ if (of_property_read_u32(np, "bus-width", &bus_width) < 0) { + /* If bus-width is missing we get the driver's default, which + * is, unfortunately, not consistent from driver to driver. + * Better to specify it in the device tree. */ dev_dbg(host->hw_dev, - "\"bus-width\" property is missing, assuming 1 bit.\n"); - bus_width = 1; - } - - switch (bus_width) { - case 8: - host->host_caps |= MMC_CAP_8_BIT_DATA; - /* Hosts capable of 8-bit transfers can also do 4 bits */ - case 4: - host->host_caps |= MMC_CAP_4_BIT_DATA; - break; - case 1: - break; - default: - dev_err(host->hw_dev, - "Invalid \"bus-width\" value %u!\n", bus_width); + "\"bus-width\" property missing, default is %d\n", + (host->host_caps & MMC_CAP_8_BIT_DATA) ? 8 : + (host->host_caps & MMC_CAP_4_BIT_DATA) ? 4 : 1); + } else { + /* Set data width caps to exactly those specified in the DT. + * bus-width isn't a list, so widths smaller than the specified + * value are implictly supported as well. */ + host->host_caps &= ~MMC_CAP_BIT_DATA_MASK; + switch (bus_width) { + case 8: + host->host_caps |= MMC_CAP_8_BIT_DATA; + case 4: /* note fall through from above */ + host->host_caps |= MMC_CAP_4_BIT_DATA; + case 1: + break; + default: + dev_err(host->hw_dev, + "Invalid \"bus-width\" value %u!\n", bus_width); + } } /* f_max is obtained from the optional "max-frequency" property */ diff --git a/drivers/mtd/core.c b/drivers/mtd/core.c index d873369d5d..62307db709 100644 --- a/drivers/mtd/core.c +++ b/drivers/mtd/core.c @@ -340,6 +340,8 @@ int mtd_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, int mtd_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf) { + *retlen = 0; + return mtd->write(mtd, to, len, retlen, buf); } diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index ff26584845..2b4a478a03 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -92,17 +92,18 @@ config NAND_OMAP_GPMC config NAND_ORION bool - prompt "Orion NAND driver" + prompt "Marvell Orion NAND driver" depends on ARCH_KIRKWOOD help Support for the Orion NAND controller, present in Kirkwood SoCs. config NAND_MRVL_NFC bool - prompt "Marvell NAND driver" - depends on ARCH_PXA3XX + prompt "Marvell PXA3xx NAND driver" + depends on ARCH_ARMADA_370 || ARCH_ARMADA_XP || ARCH_PXA3XX help - Support for the PXA3xx NAND controller, present in pxa3xx SoCs. + Support for the PXA3xx NAND controller, present in Armada 370/XP and + PXA3xx SoCs. config NAND_ATMEL bool diff --git a/drivers/mtd/nand/nand_mrvl_nfc.c b/drivers/mtd/nand/nand_mrvl_nfc.c index 1ec48cc09e..f160d15ab5 100644 --- a/drivers/mtd/nand/nand_mrvl_nfc.c +++ b/drivers/mtd/nand/nand_mrvl_nfc.c @@ -24,7 +24,6 @@ #include <linux/types.h> #include <linux/clk.h> #include <linux/err.h> -#include <mach/clock.h> #include <malloc.h> #include <of_mtd.h> #include <stmp-device.h> @@ -54,6 +53,7 @@ #define NDCB0 (0x48) /* Command Buffer0 */ #define NDCB1 (0x4C) /* Command Buffer1 */ #define NDCB2 (0x50) /* Command Buffer2 */ +#define NDCB3 (0x54) /* Command Buffer3 */ #define NDCR_SPARE_EN (0x1 << 31) #define NDCR_ECC_EN (0x1 << 30) @@ -93,6 +93,8 @@ #define NDSR_RDDREQ (0x1 << 1) #define NDSR_WRCMDREQ (0x1) +#define NDECCCTRL_BCH_EN BIT(0) + #define NDCB0_LEN_OVRD (0x1 << 28) #define NDCB0_ST_ROW_EN (0x1 << 26) #define NDCB0_AUTO_RS (0x1 << 25) @@ -130,11 +132,16 @@ #define nand_readsl(host, off, buf, nbbytes) \ readsl((host)->mmio_base + (off), buf, nbbytes) +struct mrvl_nand_variant { + unsigned int hwflags; +}; + struct mrvl_nand_host { struct mtd_info mtd; struct nand_chip chip; struct mtd_partition *parts; struct device_d *dev; + struct clk *core_clk; /* calculated from mrvl_nand_flash data */ unsigned int col_addr_cycles; @@ -142,6 +149,9 @@ struct mrvl_nand_host { size_t read_id_bytes; void __iomem *mmio_base; + unsigned int hwflags; +#define HWFLAGS_ECC_BCH BIT(0) +#define HWFLAGS_HAS_NDCB3 BIT(1) unsigned int buf_start; unsigned int buf_count; @@ -153,8 +163,10 @@ struct mrvl_nand_host { int ecc_strength; int ecc_step; + int num_cs; /* avaiable CS signals */ int cs; /* selected chip 0/1 */ int use_ecc; /* use HW ECC ? */ + int ecc_bch; /* HW ECC is BCH */ int use_spare; /* use spare ? */ int flash_bbt; @@ -219,6 +231,42 @@ static struct nand_ecclayout ecc_layout_2KB_hwecc = { .oobfree = { {0, 40} } }; +static struct nand_ecclayout ecc_layout_2KB_bch4bit = { + .eccbytes = 32, + .eccpos = { + 32, 33, 34, 35, 36, 37, 38, 39, + 40, 41, 42, 43, 44, 45, 46, 47, + 48, 49, 50, 51, 52, 53, 54, 55, + 56, 57, 58, 59, 60, 61, 62, 63}, + .oobfree = { {2, 30} } +}; + +static struct nand_ecclayout ecc_layout_4KB_bch4bit = { + .eccbytes = 64, + .eccpos = { + 32, 33, 34, 35, 36, 37, 38, 39, + 40, 41, 42, 43, 44, 45, 46, 47, + 48, 49, 50, 51, 52, 53, 54, 55, + 56, 57, 58, 59, 60, 61, 62, 63, + 96, 97, 98, 99, 100, 101, 102, 103, + 104, 105, 106, 107, 108, 109, 110, 111, + 112, 113, 114, 115, 116, 117, 118, 119, + 120, 121, 122, 123, 124, 125, 126, 127}, + /* Bootrom looks in bytes 0 & 5 for bad blocks */ + .oobfree = { {1, 4}, {6, 26}, {64, 32} } +}; + +static struct nand_ecclayout ecc_layout_4KB_bch8bit = { + .eccbytes = 64, + .eccpos = { + 32, 33, 34, 35, 36, 37, 38, 39, + 40, 41, 42, 43, 44, 45, 46, 47, + 48, 49, 50, 51, 52, 53, 54, 55, + 56, 57, 58, 59, 60, 61, 62, 63}, + /* Bootrom looks in bytes 0 & 5 for bad blocks */ + .oobfree = { {1, 4}, {6, 26} } +}; + #define NDTR0_tCH(c) (min((c), 7) << 19) #define NDTR0_tCS(c) (min((c), 7) << 16) #define NDTR0_tWH(c) (min((c), 7) << 11) @@ -233,9 +281,22 @@ static struct nand_ecclayout ecc_layout_2KB_hwecc = { #define mtd_info_to_host(mtd) ((struct mrvl_nand_host *) \ (((struct nand_chip *)((mtd)->priv))->priv)) +static const struct mrvl_nand_variant pxa3xx_variant = { + .hwflags = 0, +}; + +static const struct mrvl_nand_variant armada370_variant = { + .hwflags = HWFLAGS_ECC_BCH | HWFLAGS_HAS_NDCB3, +}; + static struct of_device_id mrvl_nand_dt_ids[] = { { .compatible = "marvell,pxa3xx-nand", + .data = &pxa3xx_variant, + }, + { + .compatible = "marvell,armada370-nand", + .data = &armada370_variant, }, {} }; @@ -270,6 +331,7 @@ static struct mrvl_nand_timing timings[] = { { 0x46ec, 10, 0, 20, 40, 30, 40, 11123, 110, 10, }, { 0xdaec, 10, 0, 20, 40, 30, 40, 11123, 110, 10, }, { 0xd7ec, 10, 0, 20, 40, 30, 40, 11123, 110, 10, }, + { 0xd3ec, 5, 20, 10, 12, 10, 12, 25000, 60, 10, }, { 0xa12c, 10, 25, 15, 25, 15, 30, 25000, 60, 10, }, { 0xb12c, 10, 25, 15, 25, 15, 30, 25000, 60, 10, }, { 0xdc2c, 10, 25, 15, 25, 15, 30, 25000, 60, 10, }, @@ -281,10 +343,10 @@ static struct mrvl_nand_timing timings[] = { static void mrvl_nand_set_timing(struct mrvl_nand_host *host, bool use_default) { struct mtd_info *mtd = &host->mtd; + unsigned long nand_clk = clk_get_rate(host->core_clk); struct mrvl_nand_timing *t; uint32_t ndtr0, ndtr1; u16 id; - unsigned long nand_clk = pxa_get_nandclk(); if (use_default) { id = 0; @@ -377,6 +439,17 @@ static void mrvl_nand_start(struct mrvl_nand_host *host) { uint32_t ndcr; + if (host->hwflags & HWFLAGS_ECC_BCH) { + uint32_t reg = nand_readl(host, NDECCCTRL); + + if (host->use_ecc && host->ecc_bch) + reg |= NDECCCTRL_BCH_EN; + else + reg &= ~NDECCCTRL_BCH_EN; + + nand_writel(host, NDECCCTRL, reg); + } + ndcr = host->reg_ndcr; if (host->use_ecc) ndcr |= NDCR_ECC_EN; @@ -403,12 +476,19 @@ static void mrvl_nand_start(struct mrvl_nand_host *host) dev_err(host->dev, "Waiting for command request failed\n"); } else { /* - * Writing 12 bytes to NDBC0 sets NDBC0, NDBC1 and NDBC2 ! + * Command buffer registers NDCB{0-2,3} + * must be loaded by writing directly either 12 or 16 + * bytes directly to NDCB0, four bytes at a time. + * + * Direct write access to NDCB1, NDCB2 and NDCB3 is ignored + * but each NDCBx register can be read. */ nand_writel(host, NDSR, NDSR_WRCMDREQ); nand_writel(host, NDCB0, host->ndcb0); nand_writel(host, NDCB0, host->ndcb1); nand_writel(host, NDCB0, host->ndcb2); + if (host->hwflags & HWFLAGS_HAS_NDCB3) + nand_writel(host, NDCB0, host->ndcb3); } } @@ -562,6 +642,7 @@ static int prepare_set_command(struct mrvl_nand_host *host, int command, case NAND_CMD_PAGEPROG: host->ndcb0 |= NDCB0_CMD_TYPE(0x1) + | NDCB0_AUTO_RS | NDCB0_DBC | (NAND_CMD_PAGEPROG << 8) | NAND_CMD_SEQIN @@ -599,6 +680,7 @@ static int prepare_set_command(struct mrvl_nand_host *host, int command, case NAND_CMD_ERASE1: host->ndcb0 |= NDCB0_CMD_TYPE(2) + | NDCB0_AUTO_RS | NDCB0_ADDR_CYC(3) | NDCB0_DBC | (NAND_CMD_ERASE2 << 8) @@ -719,7 +801,7 @@ static int mrvl_nand_write_page_hwecc(struct mtd_info *mtd, memcpy(host->data_buff + mtd->writesize, chip->oob_poi, mtd->oobsize); else - memset(host->data_buff + mtd->writesize, 0, mtd->oobsize); + memset(host->data_buff + mtd->writesize, 0xff, mtd->oobsize); dev_dbg(host->dev, "%s(buf=%p, oob_required=%d) => 0\n", __func__, buf, oob_required); return 0; @@ -743,8 +825,14 @@ static int mrvl_nand_read_page_hwecc(struct mtd_info *mtd, else ret = -EBADMSG; } - if (ndsr & NDSR_CORERR) + if (ndsr & NDSR_CORERR) { ret = 1; + if ((host->hwflags & HWFLAGS_ECC_BCH) && host->ecc_bch) { + ret = NDSR_ERR_CNT(ndsr); + ndsr &= ~(NDSR_ERR_CNT_MASK << NDSR_ERR_CNT_OFF); + nand_writel(host, NDSR, ndsr); + } + } dev_dbg(host->dev, "%s(buf=%p, page=%d, oob_required=%d) => %d\n", __func__, buf, page, oob_required, ret); return ret; @@ -821,32 +909,124 @@ static void mrvl_nand_config_flash(struct mrvl_nand_host *host) host->reg_ndcr = ndcr; } -static int pxa_ecc_init(struct mrvl_nand_host *host, - struct nand_ecc_ctrl *ecc, - int strength, int ecc_stepsize, int page_size) +static int pxa_ecc_strength1(struct mrvl_nand_host *host, + struct nand_ecc_ctrl *ecc, int ecc_stepsize, int page_size) { - if (strength == 1 && ecc_stepsize == 512 && page_size == 2048) { + if (ecc_stepsize == 512 && page_size == 2048) { host->chunk_size = 2048; host->spare_size = 40; host->ecc_size = 24; + host->ecc_bch = 0; ecc->mode = NAND_ECC_HW; ecc->size = 512; ecc->strength = 1; ecc->layout = &ecc_layout_2KB_hwecc; + return 0; + } - } else if (strength == 1 && ecc_stepsize == 512 && page_size == 512) { + if (ecc_stepsize == 512 && page_size == 512) { host->chunk_size = 512; host->spare_size = 8; host->ecc_size = 8; + host->ecc_bch = 0; ecc->mode = NAND_ECC_HW; ecc->size = 512; ecc->layout = &ecc_layout_512B_hwecc; ecc->strength = 1; - } else { + return 0; + } + + return -ENODEV; +} + +static int pxa_ecc_strength4(struct mrvl_nand_host *host, + struct nand_ecc_ctrl *ecc, int ecc_stepsize, int page_size) +{ + if (!(host->hwflags & HWFLAGS_ECC_BCH)) + return -ENODEV; + + /* + * Required ECC: 4-bit correction per 512 bytes + * Select: 16-bit correction per 2048 bytes + */ + if (ecc_stepsize == 512 && page_size == 2048) { + host->chunk_size = 2048; + host->spare_size = 32; + host->ecc_size = 32; + host->ecc_bch = 1; + ecc->mode = NAND_ECC_HW; + ecc->size = 2048; + ecc->layout = &ecc_layout_2KB_bch4bit; + ecc->strength = 16; + return 0; + } + + if (ecc_stepsize == 512 && page_size == 4096) { + host->chunk_size = 2048; + host->spare_size = 32; + host->ecc_size = 32; + host->ecc_bch = 1; + ecc->mode = NAND_ECC_HW; + ecc->size = 2048; + ecc->layout = &ecc_layout_4KB_bch4bit; + ecc->strength = 16; + return 0; + } + + return -ENODEV; +} + +static int pxa_ecc_strength8(struct mrvl_nand_host *host, + struct nand_ecc_ctrl *ecc, int ecc_stepsize, int page_size) +{ + if (!(host->hwflags & HWFLAGS_ECC_BCH)) + return -ENODEV; + + /* + * Required ECC: 8-bit correction per 512 bytes + * Select: 16-bit correction per 1024 bytes + */ + if (ecc_stepsize == 512 && page_size == 4096) { + host->chunk_size = 1024; + host->spare_size = 0; + host->ecc_size = 32; + host->ecc_bch = 1; + ecc->mode = NAND_ECC_HW; + ecc->size = 1024; + ecc->layout = &ecc_layout_4KB_bch8bit; + ecc->strength = 16; + return 0; + } + + return -ENODEV; +} + +static int pxa_ecc_init(struct mrvl_nand_host *host, + struct nand_ecc_ctrl *ecc, + int strength, int ecc_stepsize, int page_size) +{ + int ret; + + switch (strength) { + case 1: + ret = pxa_ecc_strength1(host, ecc, ecc_stepsize, page_size); + break; + case 4: + ret = pxa_ecc_strength4(host, ecc, ecc_stepsize, page_size); + break; + case 8: + ret = pxa_ecc_strength8(host, ecc, ecc_stepsize, page_size); + break; + default: + ret = -ENODEV; + break; + } + + if (ret) { dev_err(host->dev, "ECC strength %d at page size %d is not supported\n", strength, page_size); - return -ENODEV; + return ret; } dev_info(host->dev, "ECC strength %d, ECC step size %d\n", @@ -868,6 +1048,11 @@ static int mrvl_nand_scan(struct mtd_info *mtd) ndcr |= NDCR_RD_ID_CNT(host->read_id_bytes); host->reg_ndcr = ndcr; + /* Device detection must be done with BCH ECC disabled */ + if (host->hwflags & HWFLAGS_ECC_BCH) + nand_writel(host, NDECCCTRL, + nand_readl(host, NDECCCTRL) & ~NDECCCTRL_BCH_EN); + mrvl_nand_set_timing(host, true); if (nand_scan_ident(mtd, 1, NULL)) { host->reg_ndcr |= NDCR_DWIDTH_M | NDCR_DWIDTH_C; @@ -927,6 +1112,7 @@ static struct mrvl_nand_host *alloc_nand_resource(struct device_d *dev) pdata = dev->platform_data; host = xzalloc(sizeof(*host)); + host->num_cs = 1; host->cs = 0; mtd = &host->mtd; mtd->priv = &host->chip; @@ -954,6 +1140,13 @@ static struct mrvl_nand_host *alloc_nand_resource(struct device_d *dev) free(host); return host->mmio_base; } + host->core_clk = clk_get(dev, NULL); + if (IS_ERR(host->core_clk)) { + free(host); + return (void *)host->core_clk; + } + clk_enable(host->core_clk); + if (pdata) { host->keep_config = pdata->keep_config; host->flash_bbt = pdata->flash_bbt; @@ -973,13 +1166,33 @@ static struct mrvl_nand_host *alloc_nand_resource(struct device_d *dev) static int mrvl_nand_probe_dt(struct mrvl_nand_host *host) { struct device_node *np = host->dev->device_node; + const struct of_device_id *match; + const struct mrvl_nand_variant *variant; + + if (!IS_ENABLED(CONFIG_OFTREE) || host->dev->platform_data) + return 0; + + match = of_match_node(mrvl_nand_dt_ids, np); + if (!match) + return -EINVAL; + variant = match->data; if (of_get_property(np, "marvell,nand-keep-config", NULL)) host->keep_config = 1; - of_property_read_u32(np, "num-cs", &host->cs); + of_property_read_u32(np, "num-cs", &host->num_cs); if (of_get_nand_on_flash_bbt(np)) host->flash_bbt = 1; + host->ecc_strength = of_get_nand_ecc_strength(np); + if (host->ecc_strength < 0) + host->ecc_strength = 0; + + host->ecc_step = of_get_nand_ecc_step_size(np); + if (host->ecc_step < 0) + host->ecc_step = 0; + + host->hwflags = variant->hwflags; + return 0; } diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 800652760a..966f64f7b6 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -213,12 +213,34 @@ static void descs_init(struct eth_device *dev) rx_descs_init(dev); } +/* Get PHY out of power saving mode. If this is needed elsewhere then + * consider making it part of phy-core and adding a resume method to + * the phy device ops. */ +static int phy_resume(struct phy_device *phydev) +{ + int bmcr; + + bmcr = phy_read(phydev, MII_BMCR); + if (bmcr < 0) + return bmcr; + if (bmcr & BMCR_PDOWN) { + bmcr &= ~BMCR_PDOWN; + return phy_write(phydev, MII_BMCR, bmcr); + } + return 0; +} + static int dwc_ether_init(struct eth_device *dev) { struct dw_eth_dev *priv = dev->priv; struct eth_mac_regs *mac_p = priv->mac_regs_p; struct eth_dma_regs *dma_p = priv->dma_regs_p; + /* Before we reset the mac, we must insure the PHY is not powered down + * as the dw controller needs all clock domains to be running, including + * the PHY clock, to come out of a mac reset. */ + phy_resume(dev->phydev); + if (mac_reset(dev) < 0) return -1; @@ -275,6 +297,8 @@ static int dwc_ether_open(struct eth_device *dev) if (ret) return ret; + dwc_ether_init(dev); + descs_init(dev); /* @@ -468,7 +492,6 @@ static int dwc_ether_probe(struct device_d *dev) edev->priv = priv; edev->parent = dev; - edev->init = dwc_ether_init; edev->open = dwc_ether_open; edev->send = dwc_ether_send; edev->recv = dwc_ether_rx; diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c index 78ccb85376..5418034129 100644 --- a/drivers/net/fec_imx.c +++ b/drivers/net/fec_imx.c @@ -259,7 +259,7 @@ static int fec_set_hwaddr(struct eth_device *dev, const unsigned char *mac) writel((mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3], fec->regs + FEC_PADDR1); writel((mac[4] << 24) + (mac[5] << 16) + 0x8808, fec->regs + FEC_PADDR2); - return 0; + return 0; } static int fec_init(struct eth_device *dev) @@ -647,13 +647,14 @@ static int fec_probe_dt(struct device_d *dev, struct fec_priv *fec) #endif static int fec_probe(struct device_d *dev) { - struct fec_platform_data *pdata = (struct fec_platform_data *)dev->platform_data; - struct eth_device *edev; + struct fec_platform_data *pdata = (struct fec_platform_data *)dev->platform_data; + struct eth_device *edev; struct fec_priv *fec; void *base; int ret; enum fec_type type; int phy_reset; + u32 msec = 1; ret = dev_get_drvdata(dev, (const void **)&type); if (ret) @@ -684,6 +685,8 @@ static int fec_probe(struct device_d *dev) phy_reset = of_get_named_gpio(dev->device_node, "phy-reset-gpios", 0); if (gpio_is_valid(phy_reset)) { + of_property_read_u32(dev->device_node, "phy-reset-duration", &msec); + ret = gpio_request(phy_reset, "phy-reset"); if (ret) goto err_free; @@ -692,7 +695,7 @@ static int fec_probe(struct device_d *dev) if (ret) goto err_free; - udelay(10); + mdelay(msec); gpio_set_value(phy_reset, 1); } @@ -775,7 +778,7 @@ static __maybe_unused struct of_device_id imx_fec_dt_ids[] = { }, { .compatible = "fsl,imx6q-fec", .data = (void *)FEC_TYPE_IMX6, - }, { + }, { .compatible = "fsl,imx6sx-fec", .data = (void *)FEC_TYPE_IMX6, }, { diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index 47d5e4a893..9ec0178386 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -51,10 +51,12 @@ struct rtl8169_priv { int chipset; volatile struct bufdesc *tx_desc; + dma_addr_t tx_desc_phys; void *tx_buf; unsigned int cur_tx; volatile struct bufdesc *rx_desc; + dma_addr_t rx_desc_phys; void *rx_buf; unsigned int cur_rx; @@ -228,10 +230,10 @@ static void rtl8169_init_ring(struct rtl8169_priv *priv) priv->cur_rx = priv->cur_tx = 0; priv->tx_desc = dma_alloc_coherent(NUM_TX_DESC * - sizeof(struct bufdesc), DMA_ADDRESS_BROKEN); + sizeof(struct bufdesc), &priv->tx_desc_phys); priv->tx_buf = malloc(NUM_TX_DESC * PKT_BUF_SIZE); priv->rx_desc = dma_alloc_coherent(NUM_RX_DESC * - sizeof(struct bufdesc), DMA_ADDRESS_BROKEN); + sizeof(struct bufdesc), &priv->rx_desc_phys); priv->rx_buf = malloc(NUM_RX_DESC * PKT_BUF_SIZE); dma_sync_single_for_device((unsigned long)priv->rx_buf, NUM_RX_DESC * PKT_BUF_SIZE, DMA_FROM_DEVICE); @@ -275,9 +277,9 @@ static void rtl8169_hw_start(struct rtl8169_priv *priv) /* Set DMA burst size and Interframe Gap Time */ RTL_W32(priv, TxConfig, (6 << TxDMAShift) | (3 << TxInterFrameGapShift)); - RTL_W32(priv, TxDescStartAddrLow, virt_to_phys(priv->tx_desc)); + RTL_W32(priv, TxDescStartAddrLow, priv->tx_desc_phys); RTL_W32(priv, TxDescStartAddrHigh, 0); - RTL_W32(priv, RxDescStartAddrLow, virt_to_phys(priv->rx_desc)); + RTL_W32(priv, RxDescStartAddrLow, priv->rx_desc_phys); RTL_W32(priv, RxDescStartAddrHigh, 0); /* RTL-8169sc/8110sc or later version */ diff --git a/drivers/net/smc91111.c b/drivers/net/smc91111.c index 5ea1bc3259..1199b372b6 100644 --- a/drivers/net/smc91111.c +++ b/drivers/net/smc91111.c @@ -1392,7 +1392,7 @@ static int smc91c111_set_ethaddr(struct eth_device *edev, SMC_outw(priv, address, (ADDR0_REG + i)); } - return -1; + return 0; } #if (SMC_DEBUG > 2 ) diff --git a/drivers/net/tap.c b/drivers/net/tap.c index ca53f12d92..4277956ed3 100644 --- a/drivers/net/tap.c +++ b/drivers/net/tap.c @@ -29,7 +29,7 @@ struct tap_priv { char *name; }; -int tap_eth_send (struct eth_device *edev, void *packet, int length) +static int tap_eth_send(struct eth_device *edev, void *packet, int length) { struct tap_priv *priv = edev->priv; @@ -37,7 +37,7 @@ int tap_eth_send (struct eth_device *edev, void *packet, int length) return 0; } -int tap_eth_rx (struct eth_device *edev) +static int tap_eth_rx(struct eth_device *edev) { struct tap_priv *priv = edev->priv; int length; @@ -50,12 +50,12 @@ int tap_eth_rx (struct eth_device *edev) return 0; } -int tap_eth_open(struct eth_device *edev) +static int tap_eth_open(struct eth_device *edev) { return 0; } -void tap_eth_halt (struct eth_device *edev) +static void tap_eth_halt(struct eth_device *edev) { /* nothing to do here */ } @@ -70,7 +70,7 @@ static int tap_set_ethaddr(struct eth_device *edev, const unsigned char *adr) return 0; } -int tap_probe(struct device_d *dev) +static int tap_probe(struct device_d *dev) { struct eth_device *edev; struct tap_priv *priv; @@ -99,14 +99,15 @@ int tap_probe(struct device_d *dev) eth_register(edev); - return 0; + return 0; + out: free(priv); return ret; } static struct driver_d tap_driver = { - .name = "tap", - .probe = tap_probe, + .name = "tap", + .probe = tap_probe, }; device_platform_driver(tap_driver); diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c index 4c53a142f1..3ca27ff027 100644 --- a/drivers/net/usb/asix.c +++ b/drivers/net/usb/asix.c @@ -158,7 +158,7 @@ struct asix_rx_fixup_info { u16 size; u16 offset; bool split_head; - unsigned char ax_skb[RX_FIXUP_SIZE]; + unsigned char ax_skb[RX_FIXUP_SIZE] __aligned(2); }; struct asix_common_private { @@ -424,7 +424,7 @@ static int ax88172_get_ethaddr(struct eth_device *edev, unsigned char *adr) return 0; } -int asix_rx_fixup_internal(struct usbnet *dev, void *buf, int len, +static int asix_rx_fixup_internal(struct usbnet *dev, void *buf, int len, struct asix_rx_fixup_info *rx) { int offset = 0; diff --git a/drivers/of/of_mtd.c b/drivers/of/of_mtd.c index 97f3095740..0956ee15d3 100644 --- a/drivers/of/of_mtd.c +++ b/drivers/of/of_mtd.c @@ -49,6 +49,40 @@ int of_get_nand_ecc_mode(struct device_node *np) EXPORT_SYMBOL_GPL(of_get_nand_ecc_mode); /** + * of_get_nand_ecc_step_size - Get ECC step size associated to + * the required ECC strength (see below). + * @np: Pointer to the given device_node + * + * return the ECC step size, or errno in error case. + */ +int of_get_nand_ecc_step_size(struct device_node *np) +{ + int ret; + u32 val; + + ret = of_property_read_u32(np, "nand-ecc-step-size", &val); + return ret ? ret : val; +} +EXPORT_SYMBOL_GPL(of_get_nand_ecc_step_size); + +/** + * of_get_nand_ecc_strength - Get required ECC strength over the + * correspnding step size as defined by 'nand-ecc-size' + * @np: Pointer to the given device_node + * + * return the ECC strength, or errno in error case. + */ +int of_get_nand_ecc_strength(struct device_node *np) +{ + int ret; + u32 val; + + ret = of_property_read_u32(np, "nand-ecc-strength", &val); + return ret ? ret : val; +} +EXPORT_SYMBOL_GPL(of_get_nand_ecc_strength); + +/** * of_get_nand_bus_width - Get nand bus witdh for given device_node * @np: Pointer to the given device_node * diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c index 9a3f05cdec..2e489674d8 100644 --- a/drivers/spi/imx_spi.c +++ b/drivers/spi/imx_spi.c @@ -380,6 +380,77 @@ static void imx_spi_do_transfer(struct spi_device *spi) } } +static int cspi_2_3_xchg_burst(struct spi_device *spi) +{ + struct imx_spi *imx = container_of(spi->master, struct imx_spi, master); + int now, txlen, rxlen; + u32 ctrl; + void __iomem *base = imx->regs; + + now = min(imx->xfer_len, 512); + now >>= 2; + + if (!now) + return 0; + + txlen = rxlen = now; + + ctrl = readl(base + CSPI_2_3_CTRL); + ctrl &= ~(0xfff << CSPI_2_3_CTRL_BL_OFFSET); + ctrl |= ((txlen * 32) - 1) << CSPI_2_3_CTRL_BL_OFFSET; + ctrl |= 1 << 3; + writel(ctrl, base + CSPI_2_3_CTRL); + + while (txlen || rxlen) { + u32 status = readl(base + CSPI_2_3_STAT); + + if (txlen && !(status & CSPI_2_3_STAT_TF)) { + if (imx->tx_buf) { + u32 data = swab32(*(u32 *)imx->tx_buf); + writel(data, base + CSPI_2_3_TXDATA); + imx->tx_buf += sizeof(u32); + } else { + writel(0, base + CSPI_2_3_TXDATA); + } + txlen--; + } + + if (rxlen && (status & CSPI_2_3_STAT_RR)) { + u32 data = readl(base + CSPI_2_3_RXDATA); + + if (imx->rx_buf) { + *(u32 *)imx->rx_buf = swab32(data); + imx->rx_buf += sizeof(u32); + } + + rxlen--; + } + } + + imx->xfer_len -= now * 4; + + return now; +} + +static void cspi_2_3_do_transfer(struct spi_device *spi) +{ + struct imx_spi *imx = container_of(spi->master, struct imx_spi, master); + u32 ctrl; + + if (imx->bits_per_word == 8 && !(spi->mode & SPI_LSB_FIRST)) + while (cspi_2_3_xchg_burst(spi) > 0); + + if (!imx->xfer_len) + return; + + ctrl = readl(imx->regs + CSPI_2_3_CTRL); + ctrl &= ~(0xfff << CSPI_2_3_CTRL_BL_OFFSET); + ctrl |= (spi->bits_per_word - 1) << CSPI_2_3_CTRL_BL_OFFSET; + writel(ctrl, imx->regs + CSPI_2_3_CTRL); + + imx_spi_do_transfer(spi); +} + static int imx_spi_transfer(struct spi_device *spi, struct spi_message *mesg) { struct imx_spi *imx = container_of(spi->master, struct imx_spi, master); @@ -437,7 +508,7 @@ static __maybe_unused struct spi_imx_devtype_data spi_imx_devtype_data_0_7 = { static __maybe_unused struct spi_imx_devtype_data spi_imx_devtype_data_2_3 = { .chipselect = cspi_2_3_chipselect, - .do_transfer = imx_spi_do_transfer, + .do_transfer = cspi_2_3_do_transfer, .xchg_single = cspi_2_3_xchg_single, }; diff --git a/drivers/video/backlight-pwm.c b/drivers/video/backlight-pwm.c index ba6f9bcb41..91435f8d0a 100644 --- a/drivers/video/backlight-pwm.c +++ b/drivers/video/backlight-pwm.c @@ -39,6 +39,7 @@ struct pwm_backlight { int enable_active_high; int max_value; int enabled; + unsigned int scale; }; static int backlight_pwm_enable(struct pwm_backlight *pwm_backlight) @@ -87,18 +88,26 @@ static int backlight_pwm_disable(struct pwm_backlight *pwm_backlight) return 0; } +static int compute_duty_cycle(struct pwm_backlight *pwm_backlight, int brightness) +{ + int duty_cycle; + + if (pwm_backlight->levels) + duty_cycle = pwm_backlight->levels[brightness]; + else + duty_cycle = brightness; + + return duty_cycle * pwm_backlight->period / pwm_backlight->scale; +} + static int backlight_pwm_set(struct backlight_device *backlight, int brightness) { struct pwm_backlight *pwm_backlight = container_of(backlight, struct pwm_backlight, backlight); - unsigned long long duty = pwm_backlight->period; - unsigned int max = pwm_backlight->backlight.brightness_max; - - duty *= brightness; - do_div(duty, max); - pwm_config(pwm_backlight->pwm, duty, pwm_backlight->period); + pwm_config(pwm_backlight->pwm, compute_duty_cycle(pwm_backlight, brightness), + pwm_backlight->period); if (brightness) return backlight_pwm_enable(pwm_backlight); @@ -113,7 +122,7 @@ static int pwm_backlight_parse_dt(struct device_d *dev, struct property *prop; int length; u32 value; - int ret; + int ret, i; enum of_gpio_flags flags; if (!node) @@ -141,6 +150,10 @@ static int pwm_backlight_parse_dt(struct device_d *dev, if (ret < 0) return ret; + for (i = 0; i <= pwm_backlight->backlight.brightness_max; i++) + if (pwm_backlight->levels[i] > pwm_backlight->scale) + pwm_backlight->scale = pwm_backlight->levels[i]; + ret = of_property_read_u32(node, "default-brightness-level", &value); if (ret < 0) diff --git a/drivers/video/fbconsole.c b/drivers/video/fbconsole.c index c38d13c304..693c21f547 100644 --- a/drivers/video/fbconsole.c +++ b/drivers/video/fbconsole.c @@ -22,8 +22,8 @@ struct fbc_priv { struct param_d *par_font; int par_font_val; - int font_width, font_height; - const u8 *fontdata; + const struct font_desc *font; + unsigned int cols, rows; unsigned int x, y; /* cursor position */ @@ -84,7 +84,7 @@ static struct rgb colors[] = { { 255, 255, 255 }, }; -static void drawchar(struct fbc_priv *priv, int x, int y, char c) +static void drawchar(struct fbc_priv *priv, int x, int y, int c) { void *buf; int bpp = priv->fb->bits_per_pixel >> 3; @@ -97,7 +97,8 @@ static void drawchar(struct fbc_priv *priv, int x, int y, char c) buf = gui_screen_render_buffer(priv->sc); - inbuf = &priv->fontdata[c * priv->font_height]; + i = find_font_index(priv->font, c); + inbuf = priv->font->data + i; line_length = priv->fb->line_length; @@ -113,13 +114,13 @@ static void drawchar(struct fbc_priv *priv, int x, int y, char c) rgb = &colors[bgcolor]; bgcolor = gu_rgb_to_pixel(priv->fb, rgb->r, rgb->g, rgb->b, 0xff); - for (i = 0; i < priv->font_height; i++) { + for (i = 0; i < priv->font->height; i++) { uint8_t t = inbuf[i]; int j; - adr = buf + line_length * (y * priv->font_height + i) + x * priv->font_width * bpp; + adr = buf + line_length * (y * priv->font->height + i) + x * priv->font->width * bpp; - for (j = 0; j < priv->font_width; j++) { + for (j = 0; j < priv->font->width; j++) { if (t & 0x80) gu_set_pixel(priv->fb, adr, color); else @@ -137,10 +138,10 @@ static void video_invertchar(struct fbc_priv *priv, int x, int y) buf = gui_screen_render_buffer(priv->sc); - gu_invert_area(priv->fb, buf, x * priv->font_width, y * priv->font_height, - priv->font_width, priv->font_height); - gu_screen_blit_area(priv->sc, x * priv->font_width, y * priv->font_height, - priv->font_width, priv->font_height); + gu_invert_area(priv->fb, buf, x * priv->font->width, y * priv->font->height, + priv->font->width, priv->font->height); + gu_screen_blit_area(priv->sc, x * priv->font->width, y * priv->font->height, + priv->font->width, priv->font->height); } static void printchar(struct fbc_priv *priv, int c) @@ -174,9 +175,9 @@ static void printchar(struct fbc_priv *priv, int c) default: drawchar(priv, priv->x, priv->y, c); - gu_screen_blit_area(priv->sc, priv->x * priv->font_width, - priv->y * priv->font_height, - priv->font_width, priv->font_height); + gu_screen_blit_area(priv->sc, priv->x * priv->font->width, + priv->y * priv->font->height, + priv->font->width, priv->font->height); priv->x++; if (priv->x > priv->cols) { @@ -188,7 +189,7 @@ static void printchar(struct fbc_priv *priv, int c) if (priv->y > priv->rows) { void *buf; u32 line_length = priv->fb->line_length; - int line_height = line_length * priv->font_height; + int line_height = line_length * priv->font->height; buf = gui_screen_render_buffer(priv->sc); @@ -356,12 +357,10 @@ static int setup_font(struct fbc_priv *priv) return -ENOENT; } - priv->font_width = font->width; - priv->font_height = font->height; - priv->fontdata = font->data; + priv->font = font; - priv->rows = fb->yres / priv->font_height - 1; - priv->cols = fb->xres / priv->font_width - 1; + priv->rows = fb->yres / priv->font->height - 1; + priv->cols = fb->xres / priv->font->width - 1; return 0; } diff --git a/drivers/video/imx-ipu-v3/imx-ldb.c b/drivers/video/imx-ipu-v3/imx-ldb.c index a41eb1a3fc..2340b9b1d6 100644 --- a/drivers/video/imx-ipu-v3/imx-ldb.c +++ b/drivers/video/imx-ipu-v3/imx-ldb.c @@ -68,7 +68,7 @@ struct imx_ldb_channel { struct imx_ldb_data { void __iomem *base; - int (*prepare)(struct imx_ldb_channel *imx_ldb_ch, int di); + int (*prepare)(struct imx_ldb_channel *imx_ldb_ch, int di, unsigned long clkrate); unsigned ipu_mask; int have_mux; }; @@ -114,7 +114,7 @@ static int imx_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, struct fb_videomo { struct imx_ldb *ldb = imx_ldb_ch->ldb; - ldb->soc_data->prepare(imx_ldb_ch, di); + ldb->soc_data->prepare(imx_ldb_ch, di, PICOS2KHZ(mode->pixclock) * 1000UL); /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */ if (imx_ldb_ch == &ldb->channel[0]) { @@ -146,7 +146,8 @@ static int imx_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, struct fb_videomo return 0; } -static int imx6q_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, int di) +static int imx6q_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, int di, + unsigned long pixclk) { struct clk *diclk, *ldbclk; struct imx_ldb *ldb = imx_ldb_ch->ldb; @@ -155,6 +156,7 @@ static int imx6q_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, int di) void __iomem *gpr3 = (void *)MX6_IOMUXC_BASE_ADDR + 0xc; uint32_t val; int shift; + int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN; ipuno = ((di >> 1) & 1) + 1; dino = di & 0x1; @@ -181,6 +183,11 @@ static int imx6q_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, int di) return ret; } + if (!dual) + pixclk *= 2; + + clk_set_rate(clk_get_parent(ldbclk), pixclk); + val = readl(gpr3); shift = (imx_ldb_ch->chno == 0) ? 6 : 8; val &= ~(3 << shift); @@ -190,12 +197,14 @@ static int imx6q_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, int di) return 0; } -static int imx53_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, int di) +static int imx53_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, int di, + unsigned long pixclk) { struct clk *diclk, *ldbclk; struct imx_ldb *ldb = imx_ldb_ch->ldb; int ret, dino; char *clkname; + int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN; dino = di & 0x1; @@ -221,6 +230,11 @@ static int imx53_ldb_prepare(struct imx_ldb_channel *imx_ldb_ch, int di) return ret; } + if (!dual) + pixclk *= 2; + + clk_set_rate(clk_get_parent(ldbclk), pixclk); + return 0; } @@ -299,6 +313,10 @@ static int imx_ldb_probe(struct device_d *dev) imx_ldb->base = devtype->base; imx_ldb->soc_data = devtype; + dual = of_property_read_bool(np, "fsl,dual-channel"); + if (dual) + imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN; + for_each_child_of_node(np, child) { struct imx_ldb_channel *channel; struct device_node *port; diff --git a/drivers/watchdog/imxwd.c b/drivers/watchdog/imxwd.c index dd11a62613..1952548fa7 100644 --- a/drivers/watchdog/imxwd.c +++ b/drivers/watchdog/imxwd.c @@ -97,9 +97,12 @@ static int imx21_watchdog_set_timeout(struct imx_wd *priv, int timeout) dev_dbg(priv->dev, "%s: %d\n", __func__, timeout); - if (!timeout || timeout > 128) + if (timeout < -1 || timeout > 128) return -EINVAL; + if (timeout == 0) /* bit 2 (WDE) cannot be set to 0 again */ + return -ENOSYS; + if (timeout > 0) val = ((timeout * 2 - 1) << 8) | IMX21_WDOG_WCR_SRS | IMX21_WDOG_WCR_WDA; diff --git a/dts/src/arm/imx53-ccxmx53.dts b/dts/src/arm/imx53-ccxmx53.dts new file mode 100644 index 0000000000..85d20c3b63 --- /dev/null +++ b/dts/src/arm/imx53-ccxmx53.dts @@ -0,0 +1,104 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "imx53-ccxmx53.dtsi" + +/ { + model = "Digi ConnectCore ccxmx53"; + compatible = "digi,imx53-ccxmx53", "fsl,imx53"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + imx53-ccxmx53 { + pinctrl_hog: hoggrp { + + }; + + pinctrl_esdhc2: esdhc2grp { + fsl,pins = < + MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5 + MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5 + MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5 + MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5 + MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5 + MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5 + /* SD2_CD */ + MX53_PAD_GPIO_4__GPIO1_4 0x1d5 + /* SD2_WP */ + MX53_PAD_GPIO_2__GPIO1_2 0x1d5 + >; + }; + + pinctrl_esdhc3: esdhc3grp { + fsl,pins = < + MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 + MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 + MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 + MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 + MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 + MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 + >; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <400000>; + status = "okay"; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clock-frequency = <400000>; + status = "okay"; +}; + +&esdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc2>; + cd-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + status = "okay"; +}; + +&esdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc3>; + bus-width = <4>; + non-removable; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-mode = "rmii"; + phy-reset-gpios = <&gpio7 6 0>; + phy-reset-duration = <10>; + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&iim { + barebox,provide-mac-address = <&fec 1 9>; +}; diff --git a/dts/src/arm/imx53-ccxmx53.dtsi b/dts/src/arm/imx53-ccxmx53.dtsi new file mode 100644 index 0000000000..763216757b --- /dev/null +++ b/dts/src/arm/imx53-ccxmx53.dtsi @@ -0,0 +1,223 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include "imx53.dtsi" + +/ { + memory { + reg = <0x70000000 0x40000000>; + }; + +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + imx53-ccxmx53 { + pinctrl_hog: hoggrp { + + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 + MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 + MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 + MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 + MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 + MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 + MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 + MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 + MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 + MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000 + MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 + MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000 + MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 + MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 + >; + }; + + pinctrl_nand: nandgrp { + fsl,pins = < + MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4 + MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4 + MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4 + MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4 + MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0 + MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0 + MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4 + MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4 + MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4 + MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4 + MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4 + MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4 + MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4 + MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4 + MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4 + >; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clock-frequency = <400000>; + status = "okay"; + + pmic: dialog@68 { + compatible = "dlg,da9053-aa"; + reg = <0x68>; + interrupt-parent = <&gpio7>; + interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */ + + regulators { + buck1_reg: buck1 { + regulator-name = "BUCKCORE"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-name = "BUCKPRO"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-name = "BUCKMEM"; + regulator-min-microvolt = <1420000>; + regulator-max-microvolt = <1580000>; + regulator-always-on; + }; + + buck4_reg: buck4 { + regulator-name = "BUCKPERI"; + regulator-min-microvolt = <2370000>; + regulator-max-microvolt = <2630000>; + regulator-always-on; + }; + + ldo1_reg: ldo1 { + regulator-name = "ldo1_1v3"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1350000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo2_reg: ldo2 { + regulator-name = "ldo2_1v3"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + ldo3_reg: ldo3 { + regulator-name = "ldo3_3v3"; + regulator-min-microvolt = <3250000>; + regulator-max-microvolt = <3350000>; + regulator-always-on; + }; + + ldo4_reg: ldo4 { + regulator-name = "ldo4_2v775"; + regulator-min-microvolt = <2770000>; + regulator-max-microvolt = <2780000>; + regulator-always-on; + }; + + ldo5_reg: ldo5 { + regulator-name = "ldo5_3v3"; + regulator-min-microvolt = <3250000>; + regulator-max-microvolt = <3350000>; + regulator-always-on; + }; + + ldo6_reg: ldo6 { + regulator-name = "ldo6_1v3"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + ldo7_reg: ldo7 { + regulator-name = "ldo7_2v75"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo8_reg: ldo8 { + regulator-name = "ldo8_1v8"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1850000>; + regulator-always-on; + }; + + ldo9_reg: ldo9 { + regulator-name = "ldo9_1v5"; + regulator-min-microvolt = <1450000>; + regulator-max-microvolt = <1550000>; + regulator-always-on; + }; + + ldo10_reg: ldo10 { + regulator-name = "ldo10_1v3"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + }; + }; +}; + +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; diff --git a/images/Makefile.imx b/images/Makefile.imx index a09afd695b..ea9346abaa 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -76,6 +76,16 @@ CFG_start_imx53_loco_r.pblx.imximg = $(board)/freescale-mx53-qsb/flash-header-im FILE_barebox-freescale-imx53-loco-r.img = start_imx53_loco_r.pblx.imximg image-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += barebox-freescale-imx53-loco-r.img +pblx-$(CONFIG_MACH_CCMX53) += start_ccxmx53_512mb +CFG_start_ccxmx53_512mb.pblx.imximg = $(board)/ccxmx53/flash-header-imx53-ccxmx53_512mb.imxcfg +FILE_barebox-imx53-ccxmx53_512mb.img = start_ccxmx53_512mb.pblx.imximg +image-$(CONFIG_MACH_CCMX53) += barebox-imx53-ccxmx53_512mb.img + +pblx-$(CONFIG_MACH_CCMX53) += start_ccxmx53_1gib +CFG_start_ccxmx53_1gib.pblx.imximg = $(board)/ccxmx53/flash-header-imx53-ccxmx53_1gib.imxcfg +FILE_barebox-imx53-ccxmx53_1gib.img = start_ccxmx53_1gib.pblx.imximg +image-$(CONFIG_MACH_CCMX53) += barebox-imx53-ccxmx53_1gib.img + pblx-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += start_imx53_vmx53 CFG_start_imx53_vmx53.pblx.imximg = $(board)/freescale-mx53-vmx53/flash-header-imx53-vmx53.imxcfg FILE_barebox-freescale-imx53-vmx53.img = start_imx53_vmx53.pblx.imximg @@ -127,45 +137,65 @@ CFG_start_imx6q_mba6x.pblx.imximg = $(board)/tqma6x/flash-header-tqma6q.imxcfg FILE_barebox-tq-tqma6q-mba6x.img = start_imx6q_mba6x.pblx.imximg image-$(CONFIG_MACH_TQMA6X) += barebox-tq-tqma6q-mba6x.img -pblx-$(CONFIG_MACH_PHYTEC_PFLA02) += start_phytec_pbab01_4gib -CFG_start_phytec_pbab01_4gib.pblx.imximg = $(board)/phytec-phyflex-imx6/flash-header-phytec-pfla02-4gib.imxcfg +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_4gib +CFG_start_phytec_pbab01_4gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-4gib.imxcfg FILE_barebox-phytec-pbab01-4gib.img = start_phytec_pbab01_4gib.pblx.imximg -image-$(CONFIG_MACH_PHYTEC_PFLA02) += barebox-phytec-pbab01-4gib.img +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01-4gib.img -pblx-$(CONFIG_MACH_PHYTEC_PFLA02) += start_phytec_pbab01_2gib -CFG_start_phytec_pbab01_2gib.pblx.imximg = $(board)/phytec-phyflex-imx6/flash-header-phytec-pfla02-2gib.imxcfg +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_2gib +CFG_start_phytec_pbab01_2gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-2gib.imxcfg FILE_barebox-phytec-pbab01-2gib.img = start_phytec_pbab01_2gib.pblx.imximg -image-$(CONFIG_MACH_PHYTEC_PFLA02) += barebox-phytec-pbab01-2gib.img +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01-2gib.img -pblx-$(CONFIG_MACH_PHYTEC_PFLA02) += start_phytec_pbab01_1gib -CFG_start_phytec_pbab01_1gib.pblx.imximg = $(board)/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib.imxcfg +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_1gib +CFG_start_phytec_pbab01_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg FILE_barebox-phytec-pbab01-1gib.img = start_phytec_pbab01_1gib.pblx.imximg -image-$(CONFIG_MACH_PHYTEC_PFLA02) += barebox-phytec-pbab01-1gib.img +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01-1gib.img -pblx-$(CONFIG_MACH_PHYTEC_PFLA02) += start_phytec_pbab01_1gib_1bank -CFG_start_phytec_pbab01_1gib_1bank.pblx.imximg = $(board)/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_1gib_1bank +CFG_start_phytec_pbab01_1gib_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg FILE_barebox-phytec-pbab01-1gib-1bank.img = start_phytec_pbab01_1gib_1bank.pblx.imximg -image-$(CONFIG_MACH_PHYTEC_PFLA02) += barebox-phytec-pbab01-1gib-1bank.img - -pblx-$(CONFIG_MACH_PHYTEC_PFLA02) += start_phytec_pbab01dl_1gib -CFG_start_phytec_pbab01dl_1gib.pblx.imximg = $(board)/phytec-phyflex-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg -FILE_barebox-phytec-pbab01dl-1gib.img = start_phytec_pbab01dl_1gib.pblx.imximg -image-$(CONFIG_MACH_PHYTEC_PFLA02) += barebox-phytec-pbab01dl-1gib.img +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01-1gib-1bank.img -pblx-$(CONFIG_MACH_PHYTEC_PFLA02) += start_phytec_pbab01s_512mb -CFG_start_phytec_pbab01s_512mb.pblx.imximg = $(board)/phytec-phyflex-imx6/flash-header-phytec-pfla02s-512mb.imxcfg -FILE_barebox-phytec-pbab01s-512mb.img = start_phytec_pbab01s_512mb.pblx.imximg -image-$(CONFIG_MACH_PHYTEC_PFLA02) += barebox-phytec-pbab01s-512mb.img +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_512mb_1bank +CFG_start_phytec_pbab01_512mb_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-512mb-1bank.imxcfg +FILE_barebox-phytec-pbab01-512mb-1bank.img = start_phytec_pbab01_512mb_1bank.pblx.imximg +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01-512mb-1bank.img -pblx-$(CONFIG_MACH_PHYTEC_PFLA02) += start_phytec_phyboard_alcor_1gib -CFG_start_phytec_phyboard_alcor_1gib.pblx.imximg = $(board)/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib.imxcfg +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01dl_1gib +CFG_start_phytec_pbab01dl_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg +FILE_barebox-phytec-pbab01dl-1gib.img = start_phytec_pbab01dl_1gib.pblx.imximg +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01dl-1gib.img + +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01dl_1gib_1bank +CFG_start_phytec_pbab01dl_1gib_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg +FILE_barebox-phytec-pbab01dl-1gib-1bank.img = start_phytec_pbab01dl_1gib_1bank.pblx.imximg +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01dl-1gib-1bank.img + +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01s_512mb_1bank +CFG_start_phytec_pbab01s_512mb_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg +FILE_barebox-phytec-pbab01s-512mb-1bank.img = start_phytec_pbab01s_512mb_1bank.pblx.imximg +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01s-512mb-1bank.img + +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01s_256mb_1bank +CFG_start_phytec_pbab01s_256mb_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg +FILE_barebox-phytec-pbab01s-256mb-1bank.img = start_phytec_pbab01s_256mb_1bank.pblx.imximg +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01s-256mb-1bank.img + +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01s_128mb_1bank +CFG_start_phytec_pbab01s_128mb_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg +FILE_barebox-phytec-pbab01s-128mb-1bank.img = start_phytec_pbab01s_128mb_1bank.pblx.imximg +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01s-128mb-1bank.img + +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phyboard_alcor_1gib +CFG_start_phytec_phyboard_alcor_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg FILE_barebox-phytec-phyboard-alcor-1gib.img = start_phytec_phyboard_alcor_1gib.pblx.imximg -image-$(CONFIG_MACH_PHYTEC_PFLA02) += barebox-phytec-phyboard-alcor-1gib.img +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phyboard-alcor-1gib.img -pblx-$(CONFIG_MACH_PHYTEC_PFLA02) += start_phytec_phyboard_subra_512mb -CFG_start_phytec_phyboard_subra_512mb.pblx.imximg = $(board)/phytec-phyflex-imx6/flash-header-phytec-pfla02s-512mb.imxcfg -FILE_barebox-phytec-phyboard-subra-512mb.img = start_phytec_phyboard_subra_512mb.pblx.imximg -image-$(CONFIG_MACH_PHYTEC_PFLA02) += barebox-phytec-phyboard-subra-512mb.img +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phyboard_subra_512mb_1bank +CFG_start_phytec_phyboard_subra_512mb_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg +FILE_barebox-phytec-phyboard-subra-512mb-1bank.img = start_phytec_phyboard_subra_512mb_1bank.pblx.imximg +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phyboard-subra-512mb-1bank.img pblx-$(CONFIG_MACH_DFI_FS700_M60) += start_imx6dl_dfi_fs700_m60_6s CFG_start_imx6dl_dfi_fs700_m60_6s.pblx.imximg = $(board)/dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg @@ -202,16 +232,31 @@ CFG_start_imx6sx_sabresdb.pblx.imximg = $(board)/freescale-mx6sx-sabresdb/flash- FILE_barebox-freescale-imx6sx-sabresdb.img = start_imx6sx_sabresdb.pblx.imximg image-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += barebox-freescale-imx6sx-sabresdb.img -pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_imx6dl_hummingboard -CFG_start_imx6dl_hummingboard.pblx.imximg = $(board)/solidrun-microsom/flash-header-solidrun-hummingboard.imxcfg -FILE_barebox-solidrun-imx6dl-hummingboard.img = start_imx6dl_hummingboard.pblx.imximg -image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-imx6dl-hummingboard.img +pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i1 +CFG_start_hummingboard_microsom_i1.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i1.imxcfg +FILE_barebox-solidrun-hummingboard-microsom-i1.img = start_hummingboard_microsom_i1.pblx.imximg +image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard-microsom-i1.img pblx-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += start_imx6_wandboard CFG_start_imx6_wandboard.imx-sram-img = $(board)/technexion-wandboard/flash-header-technexion-wandboard.imxcfg FILE_barebox-imx6-wandboard.img = start_imx6_wandboard.imx-sram-img image-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += barebox-imx6-wandboard.img +pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i2 +CFG_start_hummingboard_microsom_i2.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2.imxcfg +FILE_barebox-solidrun-hummingboard-microsom-i2.img = start_hummingboard_microsom_i2.pblx.imximg +image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard-microsom-i2.img + +pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i2ex +CFG_start_hummingboard_microsom_i2ex.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2eX.imxcfg +FILE_barebox-solidrun-hummingboard-microsom-i2eX.img = start_hummingboard_microsom_i2ex.pblx.imximg +image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard-microsom-i2eX.img + +pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i4 +CFG_start_hummingboard_microsom_i4.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i4.imxcfg +FILE_barebox-solidrun-hummingboard-microsom-i4.img = start_hummingboard_microsom_i4.pblx.imximg +image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard-microsom-i4.img + pblx-$(CONFIG_MACH_NITROGEN6X) += start_imx6q_nitrogen6x_1g CFG_start_imx6q_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6x/flash-header-nitrogen6q-1g.imxcfg FILE_barebox-boundarydevices-imx6q-nitrogen6x-1g.img = start_imx6q_nitrogen6x_1g.pblx.imximg @@ -267,20 +312,35 @@ CFG_start_imx6s_riotboard.pblx.imximg = $(board)/embest-riotboard/flash-header-e FILE_barebox-embest-imx6s-riotboard.img = start_imx6s_riotboard.pblx.imximg image-$(CONFIG_MACH_EMBEST_RIOTBOARD) += barebox-embest-imx6s-riotboard.img -pblx-$(CONFIG_MACH_PCAAXL3) += start_phytec_pbaa03_1gib -CFG_start_phytec_pbaa03_1gib.pblx.imximg = $(board)/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbaa03_1gib +CFG_start_phytec_pbaa03_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg FILE_barebox-phytec-pbaa03-1gib.img = start_phytec_pbaa03_1gib.pblx.imximg -image-$(CONFIG_MACH_PCAAXL3) += barebox-phytec-pbaa03-1gib.img +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbaa03-1gib.img -pblx-$(CONFIG_MACH_PCAAXL3) += start_phytec_pbaa03_1gib_1bank -CFG_start_phytec_pbaa03_1gib_1bank.pblx.imximg = $(board)/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbaa03_1gib_1bank +CFG_start_phytec_pbaa03_1gib_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg FILE_barebox-phytec-pbaa03-1gib-1bank.img = start_phytec_pbaa03_1gib_1bank.pblx.imximg -image-$(CONFIG_MACH_PCAAXL3) += barebox-phytec-pbaa03-1gib-1bank.img +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbaa03-1gib-1bank.img -pblx-$(CONFIG_MACH_PCAAXL3) += start_phytec_pbaa03_2gib -CFG_start_phytec_pbaa03_2gib.pblx.imximg = $(board)/phytec-phycard-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbaa03_2gib +CFG_start_phytec_pbaa03_2gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg FILE_barebox-phytec-pbaa03-2gib.img = start_phytec_pbaa03_2gib.pblx.imximg -image-$(CONFIG_MACH_PCAAXL3) += barebox-phytec-pbaa03-2gib.img +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbaa03-2gib.img + +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6q_som_nand_1gib +CFG_start_phytec_phycore_imx6q_som_nand_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg +FILE_barebox-phytec-phycore-imx6q-som-nand-1gib.img = start_phytec_phycore_imx6q_som_nand_1gib.pblx.imximg +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6q-som-nand-1gib.img + +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6q_som_emmc_1gib +CFG_start_phytec_phycore_imx6q_som_emmc_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg +FILE_barebox-phytec-phycore-imx6q-som-emmc-1gib.img = start_phytec_phycore_imx6q_som_emmc_1gib.pblx.imximg +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6q-som-emmc-1gib.img + +pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6dl_som_nand_256mb +CFG_start_phytec_phycore_imx6dl_som_nand_256mb.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058dl-256mb.imxcfg +FILE_barebox-phytec-phycore-imx6dl-som-nand-256mb.img = start_phytec_phycore_imx6dl_som_nand_256mb.pblx.imximg +image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6dl-som-nand-256mb.img pblx-$(CONFIG_MACH_GW_VENTANA) += start_imx6q_gw54xx_1gx64 CFG_start_imx6q_gw54xx_1gx64.pblx.imximg = $(board)/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg diff --git a/include/common.h b/include/common.h index 03ceec257d..38a6dbf933 100644 --- a/include/common.h +++ b/include/common.h @@ -113,12 +113,6 @@ extern int (*barebox_main)(void); void __noreturn start_barebox(void); void shutdown_barebox(void); -/* - * architectures which have special calling conventions for - * executing programs should set this. Used by the 'go' command - */ -extern void (*do_execute)(void *func, int argc, char *argv[]); - int run_shell(void); #ifdef CONFIG_SHELL_HUSH diff --git a/include/i2c/at24.h b/include/i2c/at24.h index 1013308459..44a64a0e16 100644 --- a/include/i2c/at24.h +++ b/include/i2c/at24.h @@ -30,6 +30,7 @@ struct at24_platform_data { #define AT24_FLAG_READONLY 0x40 /* sysfs-entry will be read-only */ #define AT24_FLAG_IRUGO 0x20 /* sysfs-entry will be world-readable */ #define AT24_FLAG_TAKE8ADDR 0x10 /* take always 8 addresses (24c00) */ +#define AT24_FLAG_BANK_BIT_2 0x08 /* blank select at bit 2 (vs lsb) */ }; #endif /* _LINUX_AT24_H */ diff --git a/include/i2c/i2c-mux.h b/include/i2c/i2c-mux.h new file mode 100644 index 0000000000..80223996da --- /dev/null +++ b/include/i2c/i2c-mux.h @@ -0,0 +1,40 @@ +/* + * + * i2c-mux.h - functions for the i2c-bus mux support + * + * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it> + * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it> + * Michael Lawnick <michael.lawnick.ext@nsn.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef _LINUX_I2C_MUX_H +#define _LINUX_I2C_MUX_H + +/* + * Called to create a i2c bus on a multiplexed bus segment. + * The mux_dev and chan_id parameters are passed to the select + * and deselect callback functions to perform hardware-specific + * mux control. + */ +struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent, + struct device_d *mux_dev, + void *mux_priv, u32 force_nr, u32 chan_id, + int (*select) (struct i2c_adapter *, + void *mux_dev, u32 chan_id), + int (*deselect) (struct i2c_adapter *, + void *mux_dev, u32 chan_id)); + +void i2c_del_mux_adapter(struct i2c_adapter *adap); + +#endif /* _LINUX_I2C_MUX_H */ diff --git a/include/i2c/i2c.h b/include/i2c/i2c.h index 12e4827755..33a4791c96 100644 --- a/include/i2c/i2c.h +++ b/include/i2c/i2c.h @@ -121,15 +121,28 @@ struct i2c_adapter { struct i2c_bus_recovery_info *bus_recovery_info; }; +#define to_i2c_adapter(d) container_of(d, struct i2c_adapter, dev) struct i2c_client { struct device_d dev; struct i2c_adapter *adapter; unsigned short addr; + void *driver_data; /* Driver data, set and get with + dev_set/get_drvdata */ }; #define to_i2c_client(a) container_of(a, struct i2c_client, dev) +static inline void *i2c_get_clientdata(const struct i2c_client *dev) +{ + return dev->driver_data; +} + +static inline void i2c_set_clientdata(struct i2c_client *dev, void *data) +{ + dev->driver_data = data; +} + /*flags for the client struct: */ #define I2C_CLIENT_PEC 0x04 /* Use Packet Error Checking */ #define I2C_CLIENT_SCCB 0x9000 /* Use Omnivision SCCB protocol */ @@ -235,13 +248,21 @@ extern int i2c_add_numbered_adapter(struct i2c_adapter *adapter); struct i2c_adapter *i2c_get_adapter(int busnum); struct i2c_adapter *of_find_i2c_adapter_by_node(struct device_node *node); +extern struct list_head i2c_adapter_list; +#define for_each_i2c_adapter(adap) \ + list_for_each_entry(adap, &i2c_adapter_list, list) + /* For devices that use several addresses, use i2c_new_dummy() to make * client handles for the extra addresses. */ extern struct i2c_client * i2c_new_dummy(struct i2c_adapter *adap, u16 address); - +/* Return the adapter number for a specific adapter */ +static inline int i2c_adapter_id(struct i2c_adapter *adap) +{ + return adap->nr; +} extern int i2c_transfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num); extern int i2c_master_send(struct i2c_client *client, const char *buf, int count); diff --git a/include/linux/font.h b/include/linux/font.h index 62b1879da6..feeab97191 100644 --- a/include/linux/font.h +++ b/include/linux/font.h @@ -12,24 +12,31 @@ #define _VIDEO_FONT_H #include <param.h> +#include <wchar.h> +struct font_index { + wchar_t wc; /* code of the char. */ + short index; /* offset of the char in the bitmap. */ +}; struct font_desc { const char *name; int width, height; + struct font_index *index; const void *data; + int num_chars; + struct list_head list; }; -extern const struct font_desc font_vga_8x16, - font_7x14, - font_mini_4x6; - /* Max. length for the name of a predefined font */ #define MAX_FONT_NAME 32 +extern int find_font_index(const struct font_desc *font, int ch); extern const struct font_desc *find_font_enum(int n); extern struct param_d *add_param_font(struct device_d *dev, int (*set)(struct param_d *p, void *priv), int (*get)(struct param_d *p, void *priv), int *value, void *priv); +int font_register(struct font_desc *font); + #endif /* _VIDEO_FONT_H */ diff --git a/include/mci.h b/include/mci.h index 41a757e6de..174d15022a 100644 --- a/include/mci.h +++ b/include/mci.h @@ -56,6 +56,8 @@ #define MMC_CAP_SD_HIGHSPEED (1 << 3) #define MMC_CAP_MMC_HIGHSPEED (1 << 4) #define MMC_CAP_MMC_HIGHSPEED_52MHZ (1 << 5) +/* Mask of all caps for bus width */ +#define MMC_CAP_BIT_DATA_MASK (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA) #define SD_DATA_4BIT 0x00040000 diff --git a/include/net.h b/include/net.h index d7a475132a..2a37a43a5c 100644 --- a/include/net.h +++ b/include/net.h @@ -60,7 +60,6 @@ struct eth_device { IPaddr_t serverip; IPaddr_t netmask; IPaddr_t gateway; - char ethaddr_param[6]; char ethaddr[6]; }; diff --git a/include/of_mtd.h b/include/of_mtd.h index a5a8f20daf..9f5b8a2796 100644 --- a/include/of_mtd.h +++ b/include/of_mtd.h @@ -12,6 +12,8 @@ #include <of.h> int of_get_nand_ecc_mode(struct device_node *np); +int of_get_nand_ecc_step_size(struct device_node *np); +int of_get_nand_ecc_strength(struct device_node *np); int of_get_nand_bus_width(struct device_node *np); bool of_get_nand_on_flash_bbt(struct device_node *np); diff --git a/include/platform_data/dw_mmc.h b/include/platform_data/dw_mmc.h index 48faa76c63..4325a4f483 100644 --- a/include/platform_data/dw_mmc.h +++ b/include/platform_data/dw_mmc.h @@ -2,7 +2,7 @@ #define __INCLUDE_PLATFORM_DATA_DW_MMC_H struct dw_mmc_platform_data { - char *devname; + unsigned int bus_width_caps; int ciu_div; }; diff --git a/include/spi/imx-spi.h b/include/spi/imx-spi.h index 5c89634770..221c66502f 100644 --- a/include/spi/imx-spi.h +++ b/include/spi/imx-spi.h @@ -79,6 +79,7 @@ #define CSPI_2_3_INT_RREN (1 << 3) #define CSPI_2_3_STAT 0x18 -#define CSPI_2_3_STAT_RR (1 << 3) +#define CSPI_2_3_STAT_TF (1 << 2) +#define CSPI_2_3_STAT_RR (1 << 3) #endif /* __SPI_IMX_SPI_H */ diff --git a/lib/fonts/Kconfig b/lib/fonts/Kconfig index 715d5e5bbd..d23b283964 100644 --- a/lib/fonts/Kconfig +++ b/lib/fonts/Kconfig @@ -20,6 +20,11 @@ config FONT_7x14 config FONT_MINI_4x6 bool "Mini 4x6 font" +config FONT_CUSTOM_16X + bool "Custom 16x16 font" + help + This font is useful for Chinese and other non ascii chars. + config FONT_AUTOSELECT def_bool y depends on !FONT_MINI_4x6 diff --git a/lib/fonts/Makefile b/lib/fonts/Makefile index b7d4765395..98245b3d65 100644 --- a/lib/fonts/Makefile +++ b/lib/fonts/Makefile @@ -5,6 +5,7 @@ font-objs := fonts.o font-objs-$(CONFIG_FONT_8x16) += font_8x16.o font-objs-$(CONFIG_FONT_7x14) += font_7x14.o font-objs-$(CONFIG_FONT_MINI_4x6) += font_mini_4x6.o +font-objs-$(CONFIG_FONT_CUSTOM_16X)+= font_custom_16x.o font-objs += $(font-objs-y) diff --git a/lib/fonts/font_7x14.c b/lib/fonts/font_7x14.c index fe99871556..384ba39f17 100644 --- a/lib/fonts/font_7x14.c +++ b/lib/fonts/font_7x14.c @@ -3,6 +3,7 @@ /* by Jurriaan Kalkman 05-2005 */ /**************************************/ +#include <init.h> #include <linux/font.h> #define FONTDATAMAX 3584 @@ -4108,9 +4109,15 @@ static const unsigned char fontdata_7x14[FONTDATAMAX] = { }; -const struct font_desc font_7x14 = { +static struct font_desc font_7x14 = { .name = "7x14", .width = 7, .height = 14, .data = fontdata_7x14, }; + +static int font_7x14_register(void) +{ + return font_register(&font_7x14); +} +postcore_initcall(font_7x14_register); diff --git a/lib/fonts/font_8x16.c b/lib/fonts/font_8x16.c index 4717ead699..c5c14fc427 100644 --- a/lib/fonts/font_8x16.c +++ b/lib/fonts/font_8x16.c @@ -4,6 +4,7 @@ /* */ /**********************************************/ +#include <init.h> #include <module.h> #include <linux/font.h> @@ -4621,10 +4622,15 @@ static const unsigned char fontdata_8x16[FONTDATAMAX] = { }; -const struct font_desc font_vga_8x16 = { +static struct font_desc font_vga_8x16 = { .name = "VGA8x16", .width = 8, .height = 16, .data = fontdata_8x16, }; -EXPORT_SYMBOL(font_vga_8x16); + +static int font_vga_8x16_register(void) +{ + return font_register(&font_vga_8x16); +} +postcore_initcall(font_vga_8x16_register); diff --git a/lib/fonts/font_custom_16x.c b/lib/fonts/font_custom_16x.c new file mode 100644 index 0000000000..2666e1f6d6 --- /dev/null +++ b/lib/fonts/font_custom_16x.c @@ -0,0 +1,50 @@ +/* + * by Du Huanpeng <u74147@gmail.com> + */ + +#include <init.h> +#include <module.h> +#include <linux/font.h> +#include <common.h> + +/* place real font data here or set fontdata_custom_16x points to + * the address of font data and also setup the index. + */ + +static const unsigned char fontdata_custom_16x[] = { + 0xFF, 0xFF, /*OOOOOOOOOOOOOOOO*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0x80, 0x01, /*O______________O*/ + 0xFF, 0xFF, /*OOOOOOOOOOOOOOOO*/ +}; + +static struct font_index fontdata_custom_16x_index[] = { + { 0x0000, 0x0000 }, +}; + +static struct font_desc font_custom_16x = { + .name = "CUSTOM-16x", + .width = 16, + .height = 16, + .data = fontdata_custom_16x, + .index = fontdata_custom_16x_index, + .num_chars = ARRAY_SIZE(fontdata_custom_16x_index), +}; + +static int font_custom_16x_register(void) +{ + return font_register(&font_custom_16x); +} +postcore_initcall(font_custom_16x_register); diff --git a/lib/fonts/font_mini_4x6.c b/lib/fonts/font_mini_4x6.c index 3ecb4fbc2c..4a1de138a9 100644 --- a/lib/fonts/font_mini_4x6.c +++ b/lib/fonts/font_mini_4x6.c @@ -39,6 +39,7 @@ __END__; MSBit to LSBit = left to right. */ +#include <init.h> #include <linux/font.h> #define FONTDATAMAX 1536 @@ -2147,9 +2148,15 @@ static const unsigned char fontdata_mini_4x6[FONTDATAMAX] = { /*}*/ }; -const struct font_desc font_mini_4x6 = { +static struct font_desc font_mini_4x6 = { .name = "MINI4x6", .width = 4, .height = 6, .data = fontdata_mini_4x6, }; + +static int font_mini_4x6_register(void) +{ + return font_register(&font_mini_4x6); +} +postcore_initcall(font_mini_4x6_register); diff --git a/lib/fonts/fonts.c b/lib/fonts/fonts.c index 5a9d3f11f0..926f880128 100644 --- a/lib/fonts/fonts.c +++ b/lib/fonts/fonts.c @@ -18,37 +18,55 @@ #include <linux/string.h> #include <linux/font.h> -#define NO_FONTS - -static const struct font_desc *fonts[] = { -#ifdef CONFIG_FONT_8x16 -#undef NO_FONTS - &font_vga_8x16, -#endif -#ifdef CONFIG_FONT_7x14 -#undef NO_FONTS - &font_7x14, -#endif -#ifdef CONFIG_FONT_MINI_4x6 -#undef NO_FONTS - &font_mini_4x6, -#endif -}; - -#define num_fonts ARRAY_SIZE(fonts) - -#ifdef NO_FONTS -#error No fonts configured. -#endif - static char *font_names; +static LIST_HEAD(fonts_list); + +int font_register(struct font_desc *font) +{ + if (font_names) + return -EBUSY; + + list_add_tail(&font->list, &fonts_list); + + return 0; +} +int find_font_index(const struct font_desc *font, int ch) +{ + int index; + if (font->index == NULL) { + index = font->width + 7; + index /= 8; + index *= font->height; + index *= ch; + } else { + /* + * FIXME: use binary search instead! + */ + index = font->num_chars - 1; + + while (index && font->index[index].wc != ch) + index--; + + /* return 0 if not found. */ + index = font->index->index; + } + + return index; +} + const struct font_desc *find_font_enum(int n) { - if (n > num_fonts) - return NULL; + struct font_desc *f; + int i = 0; - return fonts[n]; + list_for_each_entry(f, &fonts_list, list) { + if (i == n) + return f; + i++; + } + + return NULL; } struct param_d *add_param_font(struct device_d *dev, @@ -56,13 +74,21 @@ struct param_d *add_param_font(struct device_d *dev, int (*get)(struct param_d *p, void *priv), int *value, void *priv) { - unsigned int i; + struct font_desc *f; + int num_fonts = 0; + + list_for_each_entry(f, &fonts_list, list) + num_fonts++; if (!font_names) { + int i = 0; + font_names = xmalloc(sizeof(char *) * num_fonts); - for (i = 0; i < num_fonts; i++) - ((const char **)font_names)[i] = fonts[i]->name; + list_for_each_entry(f, &fonts_list, list) { + ((const char **)font_names)[i] = f->name; + i++; + } } return dev_add_param_enum(dev, "font", diff --git a/lib/gui/graphic_utils.c b/lib/gui/graphic_utils.c index 4c1885d55b..2fe9fa358a 100644 --- a/lib/gui/graphic_utils.c +++ b/lib/gui/graphic_utils.c @@ -249,6 +249,10 @@ struct screen *fb_create_screen(struct fb_info *info) { struct screen *sc; + if (!info->xres || !info->yres || !info->line_length || + !info->screen_base) + return ERR_PTR(-EINVAL); + sc = xzalloc(sizeof(*sc)); sc->s.x = 0; diff --git a/lib/make_directory.c b/lib/make_directory.c index c14c86d45b..7432efc192 100644 --- a/lib/make_directory.c +++ b/lib/make_directory.c @@ -5,9 +5,12 @@ #include <fs.h> #include <malloc.h> #include <common.h> +#define STATIC +#else +#define STATIC static inline #endif -int make_directory(const char *dir) +STATIC int make_directory(const char *dir) { char *s = strdup(dir); char *path = s; diff --git a/lib/readline.c b/lib/readline.c index 14dd31171d..c007e10f50 100644 --- a/lib/readline.c +++ b/lib/readline.c @@ -262,6 +262,14 @@ int readline(const char *prompt, char *buf, int len) eol_num--; } break; + case CTL_CH('l'): + printf(ANSI_CLEAR_SCREEN); + buf[eol_num] = 0; + printf("%s%s", prompt, buf); + wlen = eol_num - num; + while (wlen--) + getcmd_putch(CTL_BACKSPACE); + break; case BB_KEY_ERASE_TO_EOL: ERASE_TO_EOL(); break; @@ -285,7 +285,7 @@ static int eth_param_set_ethaddr(struct param_d *param, void *priv) { struct eth_device *edev = priv; - return eth_set_ethaddr(edev, edev->ethaddr_param); + return eth_set_ethaddr(edev, edev->ethaddr); } #ifdef CONFIG_OFTREE @@ -383,7 +383,7 @@ int eth_register(struct eth_device *edev) dev_add_param_ip(dev, "gateway", NULL, NULL, &edev->gateway, edev); dev_add_param_ip(dev, "netmask", NULL, NULL, &edev->netmask, edev); dev_add_param_mac(dev, "ethaddr", eth_param_set_ethaddr, NULL, - edev->ethaddr_param, edev); + edev->ethaddr, edev); if (edev->init) edev->init(edev); diff --git a/pbl/console.c b/pbl/console.c index 3574753d23..4cefe74808 100644 --- a/pbl/console.c +++ b/pbl/console.c @@ -32,7 +32,7 @@ int console_puts(unsigned int ch, const char *str) while (*str) { if (*str == '\n') - putc_ll('\r'); + console_putc(CONSOLE_STDOUT, '\r'); console_putc(CONSOLE_STDOUT, *str); str++; diff --git a/scripts/basic/.gitignore b/scripts/basic/.gitignore index dc24f5f4c7..a776371a35 100644 --- a/scripts/basic/.gitignore +++ b/scripts/basic/.gitignore @@ -1,2 +1 @@ -docproc fixdep diff --git a/scripts/basic/Makefile b/scripts/basic/Makefile index 4f284df33b..9e92d899a5 100644 --- a/scripts/basic/Makefile +++ b/scripts/basic/Makefile @@ -7,9 +7,8 @@ # .config is included by main Makefile. # --------------------------------------------------------------------------- # fixdep: Used to generate dependency information during build process -# docproc: Used in Documentation/docbook -hostprogs-y := fixdep docproc +hostprogs-y := fixdep always := $(hostprogs-y) # fixdep is needed to compile other host programs diff --git a/scripts/basic/docproc.c b/scripts/basic/docproc.c deleted file mode 100644 index 9f6535d18f..0000000000 --- a/scripts/basic/docproc.c +++ /dev/null @@ -1,402 +0,0 @@ -/* - * docproc is a simple preprocessor for the template files - * used as placeholders for the barebox internal documentation. - * docproc is used for documentation-frontend and - * dependency-generator. - * The two usages have in common that they require - * some knowledge of the .tmpl syntax, therefore they - * are kept together. - * - * documentation-frontend - * Scans the template file and call kernel-doc for - * all occurrences of ![EIF]file - * Beforehand each referenced file are scanned for - * any exported sympols "EXPORT_SYMBOL()" statements. - * This is used to create proper -function and - * -nofunction arguments in calls to kernel-doc. - * Usage: docproc doc file.tmpl - * - * dependency-generator: - * Scans the template file and list all files - * referenced in a format recognized by make. - * Usage: docproc depend file.tmpl - * Writes dependency information to stdout - * in the following format: - * file.tmpl src.c src2.c - * The filenames are obtained from the following constructs: - * !Efilename - * !Ifilename - * !Dfilename - * !Ffilename - * - */ - -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <ctype.h> -#include <unistd.h> -#include <limits.h> -#include <sys/types.h> -#include <sys/wait.h> - -/* exitstatus is used to keep track of any failing calls to kernel-doc, - * but execution continues. */ -int exitstatus = 0; - -typedef void DFL(char *); -DFL *defaultline; - -typedef void FILEONLY(char * file); -FILEONLY *internalfunctions; -FILEONLY *externalfunctions; -FILEONLY *symbolsonly; - -typedef void FILELINE(char * file, char * line); -FILELINE * singlefunctions; -FILELINE * entity_system; - -#define MAXLINESZ 2048 -#define MAXFILES 250 -#define KERNELDOCPATH "scripts/" -#define KERNELDOC "kernel-doc" -#define DOCBOOK "-docbook" -#define FUNCTION "-function" -#define NOFUNCTION "-nofunction" - -void usage (void) -{ - fprintf(stderr, "Usage: docproc {doc|depend} file\n"); - fprintf(stderr, "Input is read from file.tmpl. Output is sent to stdout\n"); - fprintf(stderr, "doc: frontend when generating kernel documentation\n"); - fprintf(stderr, "depend: generate list of files referenced within file\n"); -} - -/* - * Execute kernel-doc with parameters givin in svec - */ -void exec_kernel_doc(char **svec) -{ - pid_t pid; - int ret; - char real_filename[PATH_MAX + 1]; - /* Make sure output generated so far are flushed */ - fflush(stdout); - switch(pid=fork()) { - case -1: - perror("fork"); - exit(1); - case 0: - memset(real_filename, 0, sizeof(real_filename)); - strncat(real_filename, getenv("SRCTREE"), PATH_MAX); - strncat(real_filename, KERNELDOCPATH KERNELDOC, - PATH_MAX - strlen(real_filename)); - execvp(real_filename, svec); - fprintf(stderr, "exec "); - perror(real_filename); - exit(1); - default: - waitpid(pid, &ret ,0); - } - if (WIFEXITED(ret)) - exitstatus |= WEXITSTATUS(ret); - else - exitstatus = 0xff; -} - -/* Types used to create list of all exported symbols in a number of files */ -struct symbols -{ - char *name; -}; - -struct symfile -{ - char *filename; - struct symbols *symbollist; - int symbolcnt; -}; - -struct symfile symfilelist[MAXFILES]; -int symfilecnt = 0; - -void add_new_symbol(struct symfile *sym, char * symname) -{ - sym->symbollist = realloc(sym->symbollist, (sym->symbolcnt + 1) * sizeof(char *)); - if (!sym->symbollist) { - fprintf(stderr, "docproc: out of memory\n"); - exit(1); - } - sym->symbollist[sym->symbolcnt++].name = strdup(symname); -} - -/* Add a filename to the list */ -struct symfile * add_new_file(char * filename) -{ - symfilelist[symfilecnt++].filename = strdup(filename); - return &symfilelist[symfilecnt - 1]; -} -/* Check if file already are present in the list */ -struct symfile * filename_exist(char * filename) -{ - int i; - for (i=0; i < symfilecnt; i++) - if (strcmp(symfilelist[i].filename, filename) == 0) - return &symfilelist[i]; - return NULL; -} - -/* - * List all files referenced within the template file. - * Files are separated by tabs. - */ -void adddep(char * file) { printf("\t%s", file); } -void adddep2(char * file, char * line) { line = line; adddep(file); } -void noaction(char * line) { line = line; } -void noaction2(char * file, char * line) { file = file; line = line; } - -/* Echo the line without further action */ -void printline(char * line) { printf("%s", line); } - -/* - * Find all symbols exported with EXPORT_SYMBOL and EXPORT_SYMBOL_GPL - * in filename. - * All symbols located are stored in symfilelist. - */ -void find_export_symbols(char * filename) -{ - FILE * fp; - struct symfile *sym; - char line[MAXLINESZ]; - if (filename_exist(filename) == NULL) { - char real_filename[PATH_MAX + 1]; - memset(real_filename, 0, sizeof(real_filename)); - strncat(real_filename, getenv("SRCTREE"), PATH_MAX); - strncat(real_filename, filename, - PATH_MAX - strlen(real_filename)); - sym = add_new_file(filename); - fp = fopen(real_filename, "r"); - if (fp == NULL) - { - fprintf(stderr, "docproc: "); - perror(real_filename); - exit(1); - } - while(fgets(line, MAXLINESZ, fp)) { - char *p; - char *e; - if (((p = strstr(line, "EXPORT_SYMBOL_GPL")) != 0) || - ((p = strstr(line, "EXPORT_SYMBOL")) != 0)) { - /* Skip EXPORT_SYMBOL{_GPL} */ - while (isalnum(*p) || *p == '_') - p++; - /* Remove paranteses and additional ws */ - while (isspace(*p)) - p++; - if (*p != '(') - continue; /* Syntax error? */ - else - p++; - while (isspace(*p)) - p++; - e = p; - while (isalnum(*e) || *e == '_') - e++; - *e = '\0'; - add_new_symbol(sym, p); - } - } - fclose(fp); - } -} - -/* - * Document all external or internal functions in a file. - * Call kernel-doc with following parameters: - * kernel-doc -docbook -nofunction function_name1 filename - * function names are obtained from all the the src files - * by find_export_symbols. - * intfunc uses -nofunction - * extfunc uses -function - */ -void docfunctions(char * filename, char * type) -{ - int i,j; - int symcnt = 0; - int idx = 0; - char **vec; - - for (i=0; i <= symfilecnt; i++) - symcnt += symfilelist[i].symbolcnt; - vec = malloc((2 + 2 * symcnt + 2) * sizeof(char*)); - if (vec == NULL) { - perror("docproc: "); - exit(1); - } - vec[idx++] = KERNELDOC; - vec[idx++] = DOCBOOK; - for (i=0; i < symfilecnt; i++) { - struct symfile * sym = &symfilelist[i]; - for (j=0; j < sym->symbolcnt; j++) { - vec[idx++] = type; - vec[idx++] = sym->symbollist[j].name; - } - } - vec[idx++] = filename; - vec[idx] = NULL; - printf("<!-- %s -->\n", filename); - exec_kernel_doc(vec); - fflush(stdout); - free(vec); -} -void intfunc(char * filename) { docfunctions(filename, NOFUNCTION); } -void extfunc(char * filename) { docfunctions(filename, FUNCTION); } - -/* - * Document specific function(s) in a file. - * Call kernel-doc with the following parameters: - * kernel-doc -docbook -function function1 [-function function2] - */ -void singfunc(char * filename, char * line) -{ - char *vec[200]; /* Enough for specific functions */ - int i, idx = 0; - int startofsym = 1; - vec[idx++] = KERNELDOC; - vec[idx++] = DOCBOOK; - - /* Split line up in individual parameters preceeded by FUNCTION */ - for (i=0; line[i]; i++) { - if (isspace(line[i])) { - line[i] = '\0'; - startofsym = 1; - continue; - } - if (startofsym) { - startofsym = 0; - vec[idx++] = FUNCTION; - vec[idx++] = &line[i]; - } - } - vec[idx++] = filename; - vec[idx] = NULL; - exec_kernel_doc(vec); -} - -/* - * Parse file, calling action specific functions for: - * 1) Lines containing !E - * 2) Lines containing !I - * 3) Lines containing !D - * 4) Lines containing !F - * 5) Default lines - lines not matching the above - */ -void parse_file(FILE *infile) -{ - char line[MAXLINESZ]; - char * s; - while(fgets(line, MAXLINESZ, infile)) { - if (line[0] == '!') { - s = line + 2; - switch (line[1]) { - case 'E': - while (*s && !isspace(*s)) s++; - *s = '\0'; - externalfunctions(line+2); - break; - case 'I': - while (*s && !isspace(*s)) s++; - *s = '\0'; - internalfunctions(line+2); - break; - case 'D': - while (*s && !isspace(*s)) s++; - *s = '\0'; - symbolsonly(line+2); - break; - case 'F': - /* filename */ - while (*s && !isspace(*s)) s++; - *s++ = '\0'; - /* function names */ - while (isspace(*s)) - s++; - singlefunctions(line +2, s); - break; - default: - defaultline(line); - } - } - else { - defaultline(line); - } - } - fflush(stdout); -} - - -int main(int argc, char *argv[]) -{ - FILE * infile; - if (argc != 3) { - usage(); - exit(1); - } - /* Open file, exit on error */ - infile = fopen(argv[2], "r"); - if (infile == NULL) { - fprintf(stderr, "docproc: "); - perror(argv[2]); - exit(2); - } - - if (strcmp("doc", argv[1]) == 0) - { - /* Need to do this in two passes. - * First pass is used to collect all symbols exported - * in the various files. - * Second pass generate the documentation. - * This is required because function are declared - * and exported in different files :-(( - */ - /* Collect symbols */ - defaultline = noaction; - internalfunctions = find_export_symbols; - externalfunctions = find_export_symbols; - symbolsonly = find_export_symbols; - singlefunctions = noaction2; - parse_file(infile); - - /* Rewind to start from beginning of file again */ - fseek(infile, 0, SEEK_SET); - defaultline = printline; - internalfunctions = intfunc; - externalfunctions = extfunc; - symbolsonly = printline; - singlefunctions = singfunc; - - parse_file(infile); - } - else if (strcmp("depend", argv[1]) == 0) - { - /* Create first part of dependency chain - * file.tmpl */ - printf("%s\t", argv[2]); - defaultline = noaction; - internalfunctions = adddep; - externalfunctions = adddep; - symbolsonly = adddep; - singlefunctions = adddep2; - parse_file(infile); - printf("\n"); - } - else - { - fprintf(stderr, "Unknown option: %s\n", argv[1]); - exit(1); - } - fclose(infile); - fflush(stdout); - return exitstatus; -} - diff --git a/scripts/mk-omap-image.c b/scripts/mk-omap-image.c index 1d61a34e65..234b7e37c2 100644 --- a/scripts/mk-omap-image.c +++ b/scripts/mk-omap-image.c @@ -49,7 +49,7 @@ #include <getopt.h> #include <endian.h> -void usage(char *prgname) +static void usage(char *prgname) { printf("usage: %s [OPTION] FILE > IMAGE\n" "\n" |