diff options
60 files changed, 969 insertions, 210 deletions
diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst index 837bf5cf32..6912ed9a54 100644 --- a/Documentation/boards/imx.rst +++ b/Documentation/boards/imx.rst @@ -95,8 +95,7 @@ The External Boot Mode is supported by the older i.MX SoCs: * i.MX21 * i.MX27 * i.MX31 - -(It may be supported on newer SoCs as well, but it is not widely used there.) +* i.MX35 The External Boot Mode supports booting only from NOR and NAND flash. On NOR flash, the binary is started directly on its physical address in memory. Booting diff --git a/Documentation/boards/imx/amazon-kindle3.rst b/Documentation/boards/imx/amazon-kindle3.rst new file mode 100644 index 0000000000..50592f2cb9 --- /dev/null +++ b/Documentation/boards/imx/amazon-kindle3.rst @@ -0,0 +1,28 @@ +Amazon Kindle 3 "Kindle Keyboard" Model No. D00901 +================================================== + +This e-book reader is based on a Freescale i.MX35 SOC. +The device is equiped with: + +* 256MiB synchronous dynamic RAM +* 4GiB eMMC +* a MC13892 PMIC + +The device boots in internal boot mode from eMMC and is shipped with a +vendor modified u-boot imximage. + +To upload and run a new bootloader the device can be put into USB-downloader +mode by the SOC microcode when Vol+ is pressed during startup. A new USB +device "SE Blank RINGO" should appear, barebox may be uploaded using +$ scripts/imx/imx-usb-loader barebox.imximg + +Note: a USB serial ACM console will be launched by a barebox init script +when the cursor select key is pressed during startup (e.g. before running +imx-usb-loader) + +Barebox may be used as drop-in replacement for the shipped bootloader. +When installing the barebox imximg on the eMMC take care not to overwrite +the partition table and vendor supplied serial numbers stored on the eMMC. +e.g. just write the imx-header and the application section: +memcpy -b -s barebox.imximg -d /dev/disk0.imx_header 1024 0 1024 +memcpy -b -s barebox.imximg -d /dev/disk0.self 4096 0 195584 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f904579404..150320c6af 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -318,6 +318,16 @@ config ARM_BOARD_APPEND_ATAG This option is purely to start some vendor provided kernels. ** DO NOT USE FOR YOUR OWN DESIGNS! ** +config ARM_BOARD_PREPEND_ATAG + bool "Prepend the board specific ATAGs" + depends on ARM_BOARD_APPEND_ATAG + help + Choose this option if your kernel crops the passed ATAG list e.g. at + ATAG_MEM, also cropping off the board specific ATAGs. This option + will pass all board specific ATAGs in front of all other ATAGs. + This option is purely to start some vendor provided kernels. + ** DO NOT USE FOR YOUR OWN DESIGNS! ** + endmenu choice diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 865de047bc..9fc3cd3deb 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -252,6 +252,7 @@ imxcfg-$(CONFIG_MACH_FREESCALE_MX35_3STACK) += $(boarddir)/freescale-mx35-3ds/fl imxcfg-$(CONFIG_MACH_TQMA53) += $(boarddir)/tqma53/flash-header.imxcfg imxcfg-$(CONFIG_MACH_EUKREA_CPUIMX25) += $(boarddir)/eukrea_cpuimx25/flash-header.imxcfg imxcfg-$(CONFIG_MACH_EUKREA_CPUIMX35) += $(boarddir)/eukrea_cpuimx35/flash-header.imxcfg +imxcfg-$(CONFIG_MACH_KINDLE3) += $(boarddir)/kindle3/flash-header.imxcfg imxcfg-$(CONFIG_TX53_REV_1011) += $(boarddir)/karo-tx53/flash-header-tx53-rev1011.imxcfg imxcfg-$(CONFIG_TX53_REV_XX30) += $(boarddir)/karo-tx53/flash-header-tx53-revxx30.imxcfg ifneq ($(imxcfg-y),) diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index c271f5dbb9..e3dcc6a615 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -59,6 +59,7 @@ obj-$(CONFIG_MACH_HIGHBANK) += highbank/ obj-$(CONFIG_MACH_IMX21ADS) += freescale-mx21-ads/ obj-$(CONFIG_MACH_IMX233_OLINUXINO) += imx233-olinuxino/ obj-$(CONFIG_MACH_IMX27ADS) += freescale-mx27-ads/ +obj-$(CONFIG_MACH_KINDLE3) += kindle3/ obj-$(CONFIG_MACH_LENOVO_IX4_300D) += lenovo-ix4-300d/ obj-$(CONFIG_MACH_LUBBOCK) += lubbock/ obj-$(CONFIG_MACH_MAINSTONE) += mainstone/ diff --git a/arch/arm/boards/ccxmx53/lowlevel.c b/arch/arm/boards/ccxmx53/lowlevel.c index 55f6f366ac..22492140d8 100644 --- a/arch/arm/boards/ccxmx53/lowlevel.c +++ b/arch/arm/boards/ccxmx53/lowlevel.c @@ -17,6 +17,7 @@ #include <common.h> #include <linux/sizes.h> #include <io.h> +#include <mach/imx53-regs.h> #include <mach/esdctl.h> #include <mach/generic.h> #include <image-metadata.h> @@ -36,7 +37,7 @@ ENTRY_FUNCTION(start_ccxmx53_512mb, r0, r1, r2) void *fdt; imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); IMD_USED(ccxmx53_memsize_SZ_512M); @@ -50,7 +51,7 @@ ENTRY_FUNCTION(start_ccxmx53_1gib, r0, r1, r2) void *fdt; imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); IMD_USED(ccxmx53_memsize_SZ_1G); diff --git a/arch/arm/boards/efika-mx-smartbook/board.c b/arch/arm/boards/efika-mx-smartbook/board.c index d1d020e762..d7c11dc2fc 100644 --- a/arch/arm/boards/efika-mx-smartbook/board.c +++ b/arch/arm/boards/efika-mx-smartbook/board.c @@ -122,9 +122,13 @@ static void efikamx_power_init(struct mc13xxx *mc) /* Set VDIG to 1.8V, VGEN3 to 1.8V, VCAM to 2.6V */ mc13xxx_reg_read(mc, MC13892_REG_SETTING_0, &val); val &= ~(MC13892_SETTING_0_VCAM_MASK | + MC13892_SETTING_0_VGEN1_MASK | + MC13892_SETTING_0_VGEN2_MASK | MC13892_SETTING_0_VGEN3_MASK | MC13892_SETTING_0_VDIG_MASK); val |= MC13892_SETTING_0_VDIG_1_8 | + MC13892_SETTING_0_VGEN1_1_2 | + MC13892_SETTING_0_VGEN2_3_15 | MC13892_SETTING_0_VGEN3_1_8 | MC13892_SETTING_0_VCAM_2_6; mc13xxx_reg_write(mc, MC13892_REG_SETTING_0, val); @@ -136,9 +140,7 @@ static void efikamx_power_init(struct mc13xxx *mc) MC13892_SETTING_1_VAUDIO_MASK); val |= MC13892_SETTING_1_VSD_3_15 | MC13892_SETTING_1_VAUDIO_3_0 | - MC13892_SETTING_1_VVIDEO_2_775 | - MC13892_SETTING_1_VGEN1_1_2 | - MC13892_SETTING_1_VGEN2_3_15; + MC13892_SETTING_1_VVIDEO_2_775; mc13xxx_reg_write(mc, MC13892_REG_SETTING_1, val); /* Enable VGEN1, VGEN2, VDIG, VPLL */ diff --git a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c index 9c4ea13d8e..04ef9b2e00 100644 --- a/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c +++ b/arch/arm/boards/eukrea_cpuimx35/eukrea_cpuimx35.c @@ -232,10 +232,12 @@ static int eukrea_cpuimx35_core_init(void) { u32 reg; - /* enable clock for I2C1, SDHC1, USB and FEC */ + /* enable clock for I2C1, ESDHC1, USB and FEC */ + reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR0); + reg |= 0x3 << MX35_CCM_CGR0_ESDHC1_SHIFT; + reg = writel(reg, MX35_CCM_BASE_ADDR + MX35_CCM_CGR0); reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); reg |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT; - reg |= 0x3 << MX35_CCM_CGR1_SDHC1_SHIFT; reg |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT, reg = writel(reg, MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR2); @@ -318,9 +320,6 @@ static int eukrea_cpuimx35_core_init(void) core_initcall(eukrea_cpuimx35_core_init); -#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5)) -#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) - static int do_cpufreq(int argc, char *argv[]) { unsigned long freq; diff --git a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c index 83c25feb41..aca77a7fbf 100644 --- a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c +++ b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c @@ -30,11 +30,6 @@ #include <asm-generic/memory_layout.h> #include <asm/system.h> -/* Assuming 24MHz input clock */ -#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5)) -#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) -#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1)) - void __bare_init __naked barebox_arm_reset_vector(void) { uint32_t r, s; @@ -92,17 +87,18 @@ void __bare_init __naked barebox_arm_reset_vector(void) writel(0x00001000, ccm_base + MX35_CCM_PDR0); r = readl(ccm_base + MX35_CCM_CGR0); - r |= 0x00300000; + r |= 0x3 << MX35_CCM_CGR0_EPIT1_SHIFT; writel(r, ccm_base + MX35_CCM_CGR0); r = readl(ccm_base + MX35_CCM_CGR1); - r |= 0x00030C00; - r |= 0x00000003; + r |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT; + r |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT; + r |= 0x3 << MX35_CCM_CGR1_IOMUX_SHIFT; writel(r, ccm_base + MX35_CCM_CGR1); /* enable watchdog asap */ r = readl(ccm_base + MX35_CCM_CGR2); - r |= 0x03000000; + r |= 0x3 << MX35_CCM_CGR2_WDOG_SHIFT; writel(r, ccm_base + MX35_CCM_CGR2); r = readl(MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); diff --git a/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S b/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S index a5d54e8d01..bf3830d8d6 100644 --- a/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S +++ b/arch/arm/boards/freescale-mx25-3ds/lowlevel_init.S @@ -35,9 +35,8 @@ strb r1, [r0]; /* Assuming 24MHz input clock */ -#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5)) -#define MPCTL_PARAM_532 (IMX_PLL_PD(1) | IMX_PLL_MFD(0) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) -#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1)) +#define MPCTL_PARAM_532_MX25 \ + (IMX_PLL_PD(1) | IMX_PLL_MFD(0) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) .section ".text_bare_init","ax" @@ -46,7 +45,7 @@ L2CACHE_PARAM: .word 0x00030024 CCM_CCMR_W: .word 0x003F4208 CCM_PDR0_W: .word 0x00801000 MPCTL_PARAM_399_W: .word MPCTL_PARAM_399 -MPCTL_PARAM_532_W: .word MPCTL_PARAM_532 +MPCTL_PARAM_532_W: .word MPCTL_PARAM_532_MX25 PPCTL_PARAM_W: .word PPCTL_PARAM_300 CCM_BASE_ADDR_W: .word MX25_CCM_BASE_ADDR diff --git a/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S b/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S index 0f9e813191..011de6dadf 100644 --- a/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S +++ b/arch/arm/boards/freescale-mx35-3ds/lowlevel_init.S @@ -40,11 +40,6 @@ ldr r1, =val; \ strb r1, [r0]; -/* Assuming 24MHz input clock */ -#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5)) -#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) -#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1)) - .section ".text_bare_init","ax" ARM_PPMRR: .word 0x40000015 diff --git a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c index ce6a290ca2..bed886357c 100644 --- a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c +++ b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c @@ -1,4 +1,5 @@ #include <common.h> +#include <mach/imx53-regs.h> #include <mach/esdctl.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> @@ -12,7 +13,7 @@ ENTRY_FUNCTION(start_imx53_loco, r0, r1, r2) void *fdt; imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); fdt = __dtb_imx53_qsb_start - get_runtime_offset(); @@ -26,7 +27,7 @@ ENTRY_FUNCTION(start_imx53_loco_r, r0, r1, r2) void *fdt; imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); fdt = __dtb_imx53_qsrb_start - get_runtime_offset(); diff --git a/arch/arm/boards/freescale-mx53-smd/lowlevel.c b/arch/arm/boards/freescale-mx53-smd/lowlevel.c index 5ad0312e82..88c461da73 100644 --- a/arch/arm/boards/freescale-mx53-smd/lowlevel.c +++ b/arch/arm/boards/freescale-mx53-smd/lowlevel.c @@ -1,4 +1,5 @@ #include <common.h> +#include <mach/imx53-regs.h> #include <mach/esdctl.h> #include <mach/generic.h> #include <asm/barebox-arm-head.h> @@ -6,6 +7,6 @@ void __naked barebox_arm_reset_vector(void) { imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); imx53_barebox_entry(NULL); } diff --git a/arch/arm/boards/guf-cupid/board.c b/arch/arm/boards/guf-cupid/board.c index 6ec74eb49b..d1b285cfaf 100644 --- a/arch/arm/boards/guf-cupid/board.c +++ b/arch/arm/boards/guf-cupid/board.c @@ -318,9 +318,6 @@ static int cupid_core_setup(void) core_initcall(cupid_core_setup); -#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5)) -#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) - static int do_cpufreq(int argc, char *argv[]) { unsigned long freq; diff --git a/arch/arm/boards/guf-cupid/lowlevel.c b/arch/arm/boards/guf-cupid/lowlevel.c index bcd2a24f8f..66d76ae795 100644 --- a/arch/arm/boards/guf-cupid/lowlevel.c +++ b/arch/arm/boards/guf-cupid/lowlevel.c @@ -30,11 +30,6 @@ #include <asm-generic/memory_layout.h> #include <asm/system.h> -/* Assuming 24MHz input clock */ -#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5)) -#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) -#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1)) - #define SDRAM_MODE_BL_8 0x0003 #define SDRAM_MODE_BSEQ 0x0000 #define SDRAM_MODE_CL_3 0x0030 @@ -294,11 +289,12 @@ void __bare_init __naked barebox_arm_reset_vector(void) /* configure clock-gates */ r0 = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR0); - r0 |= 0x00300000; + r0 |= 0x3 << MX35_CCM_CGR0_EPIT1_SHIFT; writel(r0, MX35_CCM_BASE_ADDR + MX35_CCM_CGR0); r0 = readl(MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); - r0 |= 0x00000c03; + r0 |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT; + r0 |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT; writel(r0, MX35_CCM_BASE_ADDR + MX35_CCM_CGR1); /* Configure SDRAM */ diff --git a/arch/arm/boards/guf-vincell/lowlevel.c b/arch/arm/boards/guf-vincell/lowlevel.c index a72eaf8b81..af7c65d9be 100644 --- a/arch/arm/boards/guf-vincell/lowlevel.c +++ b/arch/arm/boards/guf-vincell/lowlevel.c @@ -129,7 +129,7 @@ static noinline void imx53_guf_vincell_init(void *fdt) u32 r; imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); writel(0x0088494c, ccm + MX5_CCM_CBCDR); writel(0x02b12f0a, ccm + MX5_CCM_CSCMR2); diff --git a/arch/arm/boards/karo-tx53/lowlevel.c b/arch/arm/boards/karo-tx53/lowlevel.c index fdfb1b7573..9f584fa256 100644 --- a/arch/arm/boards/karo-tx53/lowlevel.c +++ b/arch/arm/boards/karo-tx53/lowlevel.c @@ -2,13 +2,14 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx5.h> +#include <mach/imx53-regs.h> #include <mach/esdctl.h> #include <mach/generic.h> void __naked barebox_arm_reset_vector(void) { imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); /* * For the TX53 rev 8030 the SDRAM setup is not stable without diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg new file mode 100644 index 0000000000..dd1ae6e5e9 --- /dev/null +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg @@ -0,0 +1,136 @@ +soc imx6 +loadaddr 0x20000000 +dcdofs 0x400 + +wm 32 0x020e0158 0x00000016 +wm 32 0x020e0174 0x00000011 +wm 32 0x020e0528 0x0000f079 +wm 32 0x020e0544 0x0000f079 +wm 32 0x020e0868 0x00000001 +wm 32 0x020e086c 0x00000001 +wm 32 0x020e0214 0x00000012 +wm 32 0x020e031c 0x00000015 +wm 32 0x020e0704 0x000030b0 +wm 32 0x020e0154 0x00000015 +wm 32 0x020e0524 0x000030b0 +wm 32 0x020e0218 0x00000005 +wm 32 0x020e05e8 0x000030b0 +wm 32 0x020c402c 0x006336c1 +wm 32 0x020c4034 0x00012093 +wm 32 0x020c4038 0x00012090 +wm 32 0x020c80e0 0x00002001 +wm 32 0x020c80a0 0x80082029 +wm 32 0x020c80b0 0x00065b9a +wm 32 0x020c80c0 0x000f4240 +wm 32 0x020e0004 0x48640005 +wm 32 0x020e0330 0x00000001 +wm 32 0x020e032c 0x00000001 +wm 32 0x020e08fc 0x00000002 +wm 32 0x020e0314 0x00000001 +wm 32 0x020e0318 0x00000001 +wm 32 0x020e08f8 0x00000003 +wm 32 0x020e027c 0x00000000 +wm 32 0x020e0470 0x00020030 +wm 32 0x020e0474 0x00020030 +wm 32 0x020e0478 0x00020030 +wm 32 0x020e047c 0x00020030 +wm 32 0x020e0424 0x00020200 +wm 32 0x020e0428 0x00020200 +wm 32 0x020e0444 0x00020200 +wm 32 0x020e0448 0x00020200 +wm 32 0x020e044c 0x00020200 +wm 32 0x020e0450 0x00020200 +wm 32 0x020e0454 0x00020200 +wm 32 0x020e0458 0x00020200 +wm 32 0x020e045c 0x00020200 +wm 32 0x020e0460 0x00020200 +wm 32 0x020e042c 0x00020200 +wm 32 0x020e0430 0x00020200 +wm 32 0x020e0434 0x00020200 +wm 32 0x020e0438 0x00020200 +wm 32 0x020e043c 0x00020200 +wm 32 0x020e0440 0x00020200 +wm 32 0x020e0464 0x00020030 +wm 32 0x020e0490 0x00020030 +wm 32 0x020e04ac 0x00020030 +wm 32 0x020e04b0 0x00020030 +wm 32 0x020e0494 0x00020030 +wm 32 0x020e04a4 0x00003000 +wm 32 0x020e04a8 0x00003000 +wm 32 0x020e0498 0x00000000 +wm 32 0x020e049c 0x00000000 +wm 32 0x020e04a0 0x00000000 +wm 32 0x020e04b4 0x00003030 +wm 32 0x020e04b8 0x00003030 +wm 32 0x020e0784 0x00000030 +wm 32 0x020e0788 0x00000030 +wm 32 0x020e0794 0x00000030 +wm 32 0x020e079c 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e0750 0x00020000 +wm 32 0x020e0754 0x00000000 +wm 32 0x020e0760 0x00020000 +wm 32 0x020e078c 0x00000030 +wm 32 0x020e0798 0x000c0000 +wm 32 0x020e0758 0x00002000 +wm 32 0x020e075c 0x00000000 +wm 32 0x021b001c 0x04008010 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b0800 0xa1390001 +wm 32 0x021b080c 0x001e001e +wm 32 0x021b0810 0x001e001e +wm 32 0x021b083c 0x42490244 +wm 32 0x021b0840 0x022f0238 +wm 32 0x021b0848 0x40404040 +wm 32 0x021b0850 0x40404040 +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b0018 0x00000742 +check 32 while_all_bits_clear 0x021b0018 0x00000002 +wm 32 0x021b001c 0x00008000 +check 32 while_any_bit_clear 0x021b001c 0x00004000 +wm 32 0x021b0000 0x83190000 +check 32 while_any_bit_clear 0x021b0018 0x40000000 +wm 32 0x021b000c 0x3f435333 +wm 32 0x021b0010 0xb66e8a63 +wm 32 0x021b0014 0x01ff00db +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x00431023 +wm 32 0x021b0008 0x1b333030 +wm 32 0x021b0004 0x0002006d +wm 32 0x021b0040 0x00000017 +wm 32 0x021b001c 0x05208030 +wm 32 0x021b001c 0x00048031 +wm 32 0x021b001c 0x00408032 +wm 32 0x021b001c 0x00008033 +wm 32 0x021b0020 0x0000c000 +wm 32 0x021b001c 0x00008020 +wm 32 0x021b0818 0x00022222 +wm 32 0x021b0890 0x00000003 +wm 32 0x021b0404 0x00000001 +wm 32 0x021b001c 0x04008010 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b0800 0xa1390001 +check 32 while_all_bits_clear 0x021b0800 0x00010000 +wm 32 0x021b0800 0xa1380000 +wm 32 0x021b001c 0x00048033 +wm 32 0x020e04bc 0x00000030 +wm 32 0x020e04c0 0x00000030 +wm 32 0x020e04c4 0x00000030 +wm 32 0x020e04c8 0x00000030 +wm 32 0x021b001c 0x04008050 +wm 32 0x021b0860 0x00000030 +check 32 while_all_bits_clear 0x021b0860 0x0000001f +wm 32 0x021b001c 0x04008050 +wm 32 0x021b0864 0x00000030 +check 32 while_all_bits_clear 0x021b0864 0x0000001f +wm 32 0x021b001c 0x00008033 +wm 32 0x021b0800 0xa138002b +wm 32 0x021b0020 0x00001800 +wm 32 0x021b0404 0x00001000 +wm 32 0x021b0004 0x0002556d +wm 32 0x021b001c 0x00000000 +check 32 while_all_bits_clear 0x021b001c 0x00004000 diff --git a/arch/arm/boards/karo-tx6x/lowlevel.c b/arch/arm/boards/karo-tx6x/lowlevel.c index 459c44b845..f2643efb05 100644 --- a/arch/arm/boards/karo-tx6x/lowlevel.c +++ b/arch/arm/boards/karo-tx6x/lowlevel.c @@ -38,6 +38,26 @@ static inline void setup_uart(void) extern char __dtb_imx6dl_tx6u_start[]; +BAREBOX_IMD_TAG_STRING(tx6x_mx6_memsize_512M, IMD_TYPE_PARAMETER, "memsize=512", 0); + +ENTRY_FUNCTION(start_imx6dl_tx6x_512m, r0, r1, r2) +{ + void *fdt; + + imx6_cpu_lowlevel_init(); + + arm_setup_stack(0x00920000 - 8); + + IMD_USED(tx6x_mx6_memsize_512M); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + fdt = __dtb_imx6dl_tx6u_start - get_runtime_offset(); + + barebox_arm_entry(0x10000000, SZ_512M, fdt); +} + BAREBOX_IMD_TAG_STRING(tx6x_mx6_memsize_1G, IMD_TYPE_PARAMETER, "memsize=1024", 0); ENTRY_FUNCTION(start_imx6dl_tx6x_1g, r0, r1, r2) diff --git a/arch/arm/boards/kindle3/Makefile b/arch/arm/boards/kindle3/Makefile new file mode 100644 index 0000000000..86c746240e --- /dev/null +++ b/arch/arm/boards/kindle3/Makefile @@ -0,0 +1,2 @@ +obj-y += kindle3.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/kindle3/env/boot/mmc_kernel b/arch/arm/boards/kindle3/env/boot/mmc_kernel new file mode 100644 index 0000000000..c6145b85ac --- /dev/null +++ b/arch/arm/boards/kindle3/env/boot/mmc_kernel @@ -0,0 +1,7 @@ +#!/bin/sh +# Boot the Amazon factory-shipped kernel uimage stored on +# the eMMC at MOVINAND_OFFSET_KERNEL=266240. + +global linux.bootargs.dyn.root="root=/dev/mmcblk0p1 ro" + +bootm -c -a 0x80008000 /dev/disk0.kernel diff --git a/arch/arm/boards/kindle3/env/init/serials b/arch/arm/boards/kindle3/env/init/serials new file mode 100644 index 0000000000..76580aeece --- /dev/null +++ b/arch/arm/boards/kindle3/env/init/serials @@ -0,0 +1,21 @@ +#!/bin/sh + +global board.serial16 +global board.revision16 + +# 16-byte alphanumeric containing the serial number +# SN is the first 16 bytes before the bootloader +if test -b /dev/disk0.serial; then + if memcpy -s /dev/disk0.serial -d tmp_serial16 -b 0 0 16; then + readf tmp_serial16 global.board.serial16 + fi +fi +[ -f tmp_serial16 ] && rm tmp_serial16 + +# 16-byte alphanumeric containing the board revision +if test -b /dev/disk0.imx_header; then + if memcpy -s /dev/disk0.imx_header -d tmp_revision16 -b 2032 0 16; then + readf tmp_revision16 global.board.revision16 + fi +fi +[ -f tmp_revision16 ] && rm tmp_revision16 diff --git a/arch/arm/boards/kindle3/env/init/usbconsole b/arch/arm/boards/kindle3/env/init/usbconsole new file mode 100644 index 0000000000..87a8f9bf8c --- /dev/null +++ b/arch/arm/boards/kindle3/env/init/usbconsole @@ -0,0 +1,8 @@ +#!/bin/sh + +# Fiveway device select key activates usbserial access for 60s +echo +if gpio_get_value 63; then + usbserial + global.autoboot_timeout=60 +fi diff --git a/arch/arm/boards/kindle3/env/nv/autoboot_timeout b/arch/arm/boards/kindle3/env/nv/autoboot_timeout new file mode 100644 index 0000000000..00750edc07 --- /dev/null +++ b/arch/arm/boards/kindle3/env/nv/autoboot_timeout @@ -0,0 +1 @@ +3 diff --git a/arch/arm/boards/kindle3/env/nv/boot.default b/arch/arm/boards/kindle3/env/nv/boot.default new file mode 100644 index 0000000000..3118b7af45 --- /dev/null +++ b/arch/arm/boards/kindle3/env/nv/boot.default @@ -0,0 +1 @@ +mmc_kernel diff --git a/arch/arm/boards/kindle3/env/nv/linux.bootargs.base b/arch/arm/boards/kindle3/env/nv/linux.bootargs.base new file mode 100644 index 0000000000..3a940d88fa --- /dev/null +++ b/arch/arm/boards/kindle3/env/nv/linux.bootargs.base @@ -0,0 +1 @@ +mem=256M ip=none diff --git a/arch/arm/boards/kindle3/env/nv/linux.bootargs.console b/arch/arm/boards/kindle3/env/nv/linux.bootargs.console new file mode 100644 index 0000000000..d775310b40 --- /dev/null +++ b/arch/arm/boards/kindle3/env/nv/linux.bootargs.console @@ -0,0 +1 @@ +console=ttymxc0,115200 diff --git a/arch/arm/boards/kindle3/env/nv/linux.bootargs.lpj b/arch/arm/boards/kindle3/env/nv/linux.bootargs.lpj new file mode 100644 index 0000000000..aa3ba59e55 --- /dev/null +++ b/arch/arm/boards/kindle3/env/nv/linux.bootargs.lpj @@ -0,0 +1 @@ +lpj=2555904 diff --git a/arch/arm/boards/kindle3/flash-header.imxcfg b/arch/arm/boards/kindle3/flash-header.imxcfg new file mode 100644 index 0000000000..cb56acf9cd --- /dev/null +++ b/arch/arm/boards/kindle3/flash-header.imxcfg @@ -0,0 +1,24 @@ +soc imx35 +loadaddr 0x87eff400 +dcdofs 0x400 + +wm 32 0x53f80004 0x00821000 +wm 32 0x53f80004 0x00821000 +wm 32 0xb8001010 0x00000002 +wm 32 0xb8001010 0x00000004 +wm 32 0xb8001004 0x0019672f +wm 32 0xb8001000 0x93100000 +wm 8 0x80000400 0xda +wm 32 0xb8001000 0xa3100000 +wm 32 0x80000000 0x12344321 +wm 32 0x80000000 0x12344321 +wm 32 0xb8001000 0xb3100000 +wm 8 0x80000033 0xda +wm 8 0x82000000 0xff +wm 32 0xb8001000 0x83226080 +wm 32 0xb8001010 0x0000000c +wm 32 0x80000000 0xdeadbeef +wm 32 0xb8001030 0x00e78000 +wm 32 0x43fac004 0x00000004 +wm 32 0x43fac328 0x00002100 +wm 32 0x43fac7d0 0x00000000 diff --git a/arch/arm/boards/kindle3/kindle3.c b/arch/arm/boards/kindle3/kindle3.c new file mode 100644 index 0000000000..e06b3d70ce --- /dev/null +++ b/arch/arm/boards/kindle3/kindle3.c @@ -0,0 +1,318 @@ +/* + * (C) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> + * (C) 2016 Alexander Kurz <akurz@blala.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Board support for the Amazon Kindle 3rd generation + */ + +#include <common.h> +#include <command.h> +#include <driver.h> +#include <init.h> +#include <bootsource.h> +#include <io.h> +#include <environment.h> +#include <generated/mach-types.h> +#include <asm/armlinux.h> +#include <asm/mmu.h> +#include <asm/setup.h> +#include <mach/imx35-regs.h> +#include <mach/imx-pll.h> +#include <mach/iomux-mx35.h> +#include <mach/devices-imx35.h> +#include <mach/generic.h> +#include <usb/fsl_usb2.h> +#include <mach/usb.h> +#include <mach/spi.h> +#include <spi/spi.h> +#include <magicvar.h> + +/* 16 byte id for serial number */ +#define ATAG_SERIAL16 0x5441000a +/* 16 byte id for a board revision */ +#define ATAG_REVISION16 0x5441000b + +struct char16_tag { + char data[16]; +}; + +static struct tag *setup_16char_tag(struct tag *params, uint32_t tag, + const char *value) +{ + struct char16_tag *target; + target = ((void *) params) + sizeof(struct tag_header); + params->hdr.tag = tag; + params->hdr.size = tag_size(char16_tag); + memcpy(target->data, value, sizeof target->data); + return tag_next(params); +} + +static const char *get_env_16char_tag(const char *tag) +{ + static const char *default16 = "0000000000000000"; + const char *value; + value = getenv(tag); + if (!value) { + printf("env var %s not found, using default\n", tag); + return default16; + } + if (strlen(value) != 16) { + printf("env var %s: expecting 16 characters, using default\n", + tag); + return default16; + } + printf("%s: %s\n", tag, value); + return value; +} + +BAREBOX_MAGICVAR_NAMED(global_atags_serial16, global.board.serial16, + "Pass the kindle Serial as vendor-specific ATAG to linux"); +BAREBOX_MAGICVAR_NAMED(global_atags_revision16, global.board.revision16, + "Pass the kindle BoardId as vendor-specific ATAG to linux"); + +/* The Kindle3 Kernel expects two custom ATAGs, ATAG_REVISION16 describing + * the board and ATAG_SERIAL16 to identify the individual device. + */ +struct tag *kindle3_append_atags(struct tag *params) +{ + params = setup_16char_tag(params, ATAG_SERIAL16, + get_env_16char_tag("global.board.serial16")); + params = setup_16char_tag(params, ATAG_REVISION16, + get_env_16char_tag("global.board.revision16")); + return params; +} + +static struct fsl_usb2_platform_data kindle3_usb_info = { + .operating_mode = FSL_USB2_DR_DEVICE, + .phy_mode = FSL_USB2_PHY_UTMI, +}; + +/* SPI master devices. */ +static int kindle3_spi0_internal_chipselect[] = { + IMX_GPIO_NR(1, 18), +}; + +static struct spi_imx_master kindle3_spi0_info = { + .chipselect = kindle3_spi0_internal_chipselect, + .num_chipselect = ARRAY_SIZE(kindle3_spi0_internal_chipselect), +}; + +static const struct spi_board_info kindle3_spi_board_info[] = { + { + .name = "mc13892", + .bus_num = 0, + .chip_select = 0, + .mode = SPI_CS_HIGH, + }, +}; + +static int kindle3_mmu_init(void) +{ + l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000); + + return 0; +} +postmmu_initcall(kindle3_mmu_init); + +static int kindle3_devices_init(void) +{ + imx35_add_mmc0(NULL); + + if (IS_ENABLED(CONFIG_USB_GADGET)) { + unsigned int tmp; + /* Workaround ENGcm09152 */ + tmp = readl(MX35_USB_OTG_BASE_ADDR + 0x608); + writel(tmp | (1 << 23), MX35_USB_OTG_BASE_ADDR + 0x608); + add_generic_device("fsl-udc", DEVICE_ID_DYNAMIC, NULL, + MX35_USB_OTG_BASE_ADDR, 0x200, + IORESOURCE_MEM, &kindle3_usb_info); + } + + /* The kindle3 related linux patch published by amazon bluntly + * renamed MACH_MX35_3DS to MACH_MX35_LUIGI + */ + armlinux_set_architecture(MACH_TYPE_MX35_3DS); + + /* Compatibility ATAGs for original kernel */ + armlinux_set_atag_appender(kindle3_append_atags); + return 0; +} +device_initcall(kindle3_devices_init); + +static iomux_v3_cfg_t kindle3_pads[] = { + /* UART1 */ + MX35_PAD_RXD1__UART1_RXD_MUX, + MX35_PAD_TXD1__UART1_TXD_MUX, + + /* eMMC */ + MX35_PAD_SD1_CMD__ESDHC1_CMD, + MX35_PAD_SD1_CLK__ESDHC1_CLK, + MX35_PAD_SD1_DATA0__ESDHC1_DAT0, + MX35_PAD_SD1_DATA1__ESDHC1_DAT1, + MX35_PAD_SD1_DATA2__ESDHC1_DAT2, + MX35_PAD_SD1_DATA3__ESDHC1_DAT3, + + /* USB */ + MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR, + MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC, + + /* I2C 1+2 */ + MX35_PAD_I2C1_CLK__I2C1_SCL, + MX35_PAD_I2C1_DAT__I2C1_SDA, + MX35_PAD_I2C2_CLK__I2C2_SCL, + MX35_PAD_I2C2_DAT__I2C2_SDA, + + /* SPI */ + MX35_PAD_CSPI1_SS0__GPIO1_18, + MX35_PAD_CSPI1_SCLK__CSPI1_SCLK, + MX35_PAD_CSPI1_MOSI__CSPI1_MOSI, + MX35_PAD_CSPI1_MISO__CSPI1_MISO, + MX35_PAD_CSPI1_SPI_RDY__CSPI1_RDY, + + /* fiveway device: up, down, left, right, select */ + MX35_PAD_ATA_DATA14__GPIO2_27, + MX35_PAD_ATA_DATA15__GPIO2_28, + MX35_PAD_TX5_RX0__GPIO1_10, + MX35_PAD_ATA_BUFF_EN__GPIO2_30, + IOMUX_PAD(0x728, 0x2c4, 5, 0x8c8, 1, + PAD_CTL_PUS_100K_UP | PAD_CTL_HYS | PAD_CTL_DVS), + + /* Volume keys: up, down */ + MX35_PAD_SCKR__GPIO1_4, + MX35_PAD_FSR__GPIO1_5, + +}; + +static int kindle3_part_init(void) +{ + devfs_add_partition("disk0", SZ_1K, 2 * SZ_1K, + DEVFS_PARTITION_FIXED, "disk0.imx_header"); + devfs_add_partition("disk0", 4 * SZ_1K, (192 - 1) * SZ_1K, + DEVFS_PARTITION_FIXED, "disk0.self"); + devfs_add_partition("disk0", (192 + 3) * SZ_1K, SZ_64K, + DEVFS_PARTITION_FIXED, "env0"); + devfs_add_partition("disk0", (256 + 3) * SZ_1K, SZ_1K, + DEVFS_PARTITION_FIXED, "disk0.serial"); + devfs_add_partition("disk0", (256 + 4) * SZ_1K, 3407872, + DEVFS_PARTITION_FIXED, "disk0.kernel"); + devfs_add_partition("disk0", 3674112, SZ_256K, + DEVFS_PARTITION_FIXED, "disk0.waveform"); + return 0; +} + +late_initcall(kindle3_part_init); + +static int imx35_console_init(void) +{ + mxc_iomux_v3_setup_multiple_pads(kindle3_pads, + ARRAY_SIZE(kindle3_pads)); + + barebox_set_model("Kindle3"); + barebox_set_hostname("kindle3"); + + imx35_add_uart0(); + + spi_register_board_info(kindle3_spi_board_info, + ARRAY_SIZE(kindle3_spi_board_info)); + imx35_add_spi0(&kindle3_spi0_info); + + imx35_add_i2c0(NULL); + imx35_add_i2c1(NULL); + return 0; +} +console_initcall(imx35_console_init); + +static int kindle3_core_setup(void) +{ + u32 tmp; + + /* AIPS setup - Only setup MPROTx registers. + * The PACR default values are good. + */ + /* + * Set all MPROTx to be non-bufferable, trusted for R/W, + * not forced to user-mode. + */ + writel(0x77777777, MX35_AIPS1_BASE_ADDR); + writel(0x77777777, MX35_AIPS1_BASE_ADDR + 0x4); + writel(0x77777777, MX35_AIPS2_BASE_ADDR); + writel(0x77777777, MX35_AIPS2_BASE_ADDR + 0x4); + + /* + * Clear the on and off peripheral modules Supervisor Protect bit + * for SDMA to access them. Did not change the AIPS control registers + * (offset 0x20) access type + */ + writel(0x0, MX35_AIPS1_BASE_ADDR + 0x40); + writel(0x0, MX35_AIPS1_BASE_ADDR + 0x44); + writel(0x0, MX35_AIPS1_BASE_ADDR + 0x48); + writel(0x0, MX35_AIPS1_BASE_ADDR + 0x4C); + tmp = readl(MX35_AIPS1_BASE_ADDR + 0x50); + tmp &= 0x00FFFFFF; + writel(tmp, MX35_AIPS1_BASE_ADDR + 0x50); + + writel(0x0, MX35_AIPS2_BASE_ADDR + 0x40); + writel(0x0, MX35_AIPS2_BASE_ADDR + 0x44); + writel(0x0, MX35_AIPS2_BASE_ADDR + 0x48); + writel(0x0, MX35_AIPS2_BASE_ADDR + 0x4C); + tmp = readl(MX35_AIPS2_BASE_ADDR + 0x50); + tmp &= 0x00FFFFFF; + writel(tmp, MX35_AIPS2_BASE_ADDR + 0x50); + + /* MAX (Multi-Layer AHB Crossbar Switch) setup */ + + /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ +#define MAX_PARAM1 0x00302154 + writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x0); /* for S0 */ + writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x100); /* for S1 */ + writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x200); /* for S2 */ + writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x300); /* for S3 */ + writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x400); /* for S4 */ + + /* SGPCR - always park on last master */ + writel(0x10, MX35_MAX_BASE_ADDR + 0x10); /* for S0 */ + writel(0x10, MX35_MAX_BASE_ADDR + 0x110); /* for S1 */ + writel(0x10, MX35_MAX_BASE_ADDR + 0x210); /* for S2 */ + writel(0x10, MX35_MAX_BASE_ADDR + 0x310); /* for S3 */ + writel(0x10, MX35_MAX_BASE_ADDR + 0x410); /* for S4 */ + + /* MGPCR - restore default values */ + writel(0x0, MX35_MAX_BASE_ADDR + 0x800); /* for M0 */ + writel(0x0, MX35_MAX_BASE_ADDR + 0x900); /* for M1 */ + writel(0x0, MX35_MAX_BASE_ADDR + 0xa00); /* for M2 */ + writel(0x0, MX35_MAX_BASE_ADDR + 0xb00); /* for M3 */ + writel(0x0, MX35_MAX_BASE_ADDR + 0xc00); /* for M4 */ + writel(0x0, MX35_MAX_BASE_ADDR + 0xd00); /* for M5 */ + + /* + * M3IF Control Register (M3IFCTL) + * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000 + * MRRP[1] = MAX1 not on priority list (0 << 0) = 0x00000000 + * MRRP[2] = L2CC1 not on priority list (0 << 0) = 0x00000000 + * MRRP[3] = USB not on priority list (0 << 0) = 0x00000000 + * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000 + * MRRP[5] = GPU not on priority list (0 << 0) = 0x00000000 + * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040 + * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000 + * ------------ + * 0x00000040 + */ + writel(0x40, MX35_M3IF_BASE_ADDR); + + return 0; +} + +core_initcall(kindle3_core_setup); diff --git a/arch/arm/boards/kindle3/lowlevel.c b/arch/arm/boards/kindle3/lowlevel.c new file mode 100644 index 0000000000..58e6318f65 --- /dev/null +++ b/arch/arm/boards/kindle3/lowlevel.c @@ -0,0 +1,142 @@ +/* + * + * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> + * (c) 2016 Alexander Kurz <akurz@blala.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ +#include <common.h> +#include <init.h> +#include <mach/imx35-regs.h> +#include <mach/imx-pll.h> +#include <mach/esdctl.h> +#include <asm/cache-l2x0.h> +#include <io.h> +#include <mach/imx-nand.h> +#include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> +#include <asm/sections.h> +#include <asm-generic/memory_layout.h> +#include <asm/system.h> + +void __bare_init __naked barebox_arm_reset_vector(void) +{ + uint32_t r, s; + unsigned long ccm_base = MX35_CCM_BASE_ADDR; + register uint32_t loops = 0x20000; + + arm_cpu_lowlevel_init(); + + arm_setup_stack(MX35_IRAM_BASE_ADDR + MX35_IRAM_SIZE - 8); + + r = get_cr(); + r |= CR_Z; /* Flow prediction (Z) */ + r |= CR_U; /* unaligned accesses */ + r |= CR_FI; /* Low Int Latency */ + + __asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1" : "=r"(s)); + s |= 0x7; + __asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1" : : "r"(s)); + + set_cr(r); + + r = 0; + __asm__ __volatile__("mcr p15, 0, %0, c15, c2, 4" : : "r"(r)); + + /* + * Branch predicition is now enabled. Flush the BTAC to ensure a valid + * starting point. Don't flush BTAC while it is disabled to avoid + * ARM1136 erratum 408023. + */ + __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 6" : : "r"(r)); + + /* invalidate I cache and D cache */ + __asm__ __volatile__("mcr p15, 0, %0, c7, c7, 0" : : "r"(r)); + + /* invalidate TLBs */ + __asm__ __volatile__("mcr p15, 0, %0, c8, c7, 0" : : "r"(r)); + + /* Drain the write buffer */ + __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" : : "r"(r)); + + /* Also setup the Peripheral Port Remap register inside the core */ + r = 0x40000015; /* start from AIPS 2GB region */ + __asm__ __volatile__("mcr p15, 0, %0, c15, c2, 4" : : "r"(r)); + + /* + * End of ARM1136 init + */ + + writel(0x003F4208, ccm_base + MX35_CCM_CCMR); + + /* Set MPLL , arm clock and ahb clock*/ + writel(MPCTL_PARAM_532, ccm_base + MX35_CCM_MPCTL); + + writel(PPCTL_PARAM_300, ccm_base + MX35_CCM_PPCTL); + writel(0x00001000, ccm_base + MX35_CCM_PDR0); + + r = readl(ccm_base + MX35_CCM_CGR0); + r |= 0x3 << MX35_CCM_CGR0_CSPI1_SHIFT; + r |= 0x3 << MX35_CCM_CGR0_EPIT1_SHIFT; + r |= 0x3 << MX35_CCM_CGR0_ESDHC1_SHIFT; + writel(r, ccm_base + MX35_CCM_CGR0); + + r = readl(ccm_base + MX35_CCM_CGR1); + r |= 0x3 << MX35_CCM_CGR1_IOMUX_SHIFT; + r |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT; + r |= 0x3 << MX35_CCM_CGR1_I2C2_SHIFT; + r |= 0x3 << MX35_CCM_CGR1_GPIO1_SHIFT; + r |= 0x3 << MX35_CCM_CGR1_GPIO2_SHIFT; + writel(r, ccm_base + MX35_CCM_CGR1); + + r = readl(MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); + r |= 0x1000; + writel(r, MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); + + /* Skip SDRAM initialization if we run from RAM */ + r = get_pc(); + if (r > 0x80000000 && r < 0x90000000) + goto out; + + /* Init Mobile DDR */ + writel(0x0000000E, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); + /* ESD_MISC: Enable DDR SDRAM */ + writel(0x00000004, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); + __asm__ volatile ("1:\n" + "subs %0, %1, #1\n" + "bne 1b" : "=r" (loops) : "0" (loops)); + + writel(0x0019672f, MX35_ESDCTL_BASE_ADDR + IMX_ESDCFG0); + /* ESD_ESDCTL0 : select Prechare-All mode */ + writel(0x93220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); + writeb(0xda, MX35_CSD0_BASE_ADDR + 0x400); + /* ESD_ESDCTL0: Auto Refresh command */ + writel(0xA3220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); + writeb(0xda, MX35_CSD0_BASE_ADDR); + writeb(0xda, MX35_CSD0_BASE_ADDR); + /* ESD_ESDCTL0: Load Mode Register */ + writel(0xB3220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); + writeb(0xda, MX35_CSD0_BASE_ADDR + 0x33); + writeb(0xff, MX35_CSD0_BASE_ADDR + 0x2000000); + /* ESD_ESDCTL0: enable Auto-Refresh */ + writel(0x83228080, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); + + writel(0x0000000c, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); + writel(0xdeadbeef, MX35_CSD0_BASE_ADDR); + writel(0x00e78000, MX35_CSD0_BASE_ADDR + 0x1030); + +out: + imx35_barebox_entry(NULL); +} diff --git a/arch/arm/boards/phytec-phycore-imx35/lowlevel.c b/arch/arm/boards/phytec-phycore-imx35/lowlevel.c index 1ad5439c28..5e2f335efa 100644 --- a/arch/arm/boards/phytec-phycore-imx35/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-imx35/lowlevel.c @@ -30,11 +30,6 @@ #include <asm-generic/memory_layout.h> #include <asm/system.h> -/* Assuming 24MHz input clock */ -#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5)) -#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) -#define PPCTL_PARAM_300 (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1)) - #define IMX35_CHIP_REVISION_2_1 0x11 #define CCM_PDR0_399 0x00011000 @@ -104,12 +99,12 @@ void __bare_init __naked barebox_arm_reset_vector(void) writel(CCM_PDR0_399, ccm_base + MX35_CCM_PDR0); r = readl(ccm_base + MX35_CCM_CGR0); - r |= 0x00300000; + r |= 0x3 << MX35_CCM_CGR0_EPIT1_SHIFT; writel(r, ccm_base + MX35_CCM_CGR0); r = readl(ccm_base + MX35_CCM_CGR1); - r |= 0x00000C00; - r |= 0x00000003; + r |= 0x3 << MX35_CCM_CGR1_FEC_SHIFT; + r |= 0x3 << MX35_CCM_CGR1_I2C1_SHIFT; writel(r, ccm_base + MX35_CCM_CGR1); r = readl(MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); diff --git a/arch/arm/boards/phytec-phycore-imx35/pcm043.c b/arch/arm/boards/phytec-phycore-imx35/pcm043.c index b83698b90a..65b592d0b5 100644 --- a/arch/arm/boards/phytec-phycore-imx35/pcm043.c +++ b/arch/arm/boards/phytec-phycore-imx35/pcm043.c @@ -295,9 +295,6 @@ static int pcm043_core_setup(void) core_initcall(pcm043_core_setup); -#define MPCTL_PARAM_399 (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5)) -#define MPCTL_PARAM_532 ((1 << 31) | IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) - static int do_cpufreq(int argc, char *argv[]) { unsigned long freq; diff --git a/arch/arm/boards/tqma53/lowlevel.c b/arch/arm/boards/tqma53/lowlevel.c index 4e129e49f6..0cb5952608 100644 --- a/arch/arm/boards/tqma53/lowlevel.c +++ b/arch/arm/boards/tqma53/lowlevel.c @@ -5,6 +5,7 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx5.h> +#include <mach/imx53-regs.h> #include <mach/generic.h> #include <image-metadata.h> @@ -44,7 +45,7 @@ ENTRY_FUNCTION(start_imx53_mba53_512mib, r0, r1, r2) imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); IMD_USED(tqma53_memsize_512M); @@ -63,7 +64,7 @@ ENTRY_FUNCTION(start_imx53_mba53_1gib, r0, r1, r2) imx5_cpu_lowlevel_init(); - arm_setup_stack(0xf8020000 - 8); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); IMD_USED(tqma53_memsize_1G); diff --git a/arch/arm/boards/variscite-mx6/board.c b/arch/arm/boards/variscite-mx6/board.c index 3585debb51..267f68c6da 100644 --- a/arch/arm/boards/variscite-mx6/board.c +++ b/arch/arm/boards/variscite-mx6/board.c @@ -47,24 +47,19 @@ static int setup_pmic_voltages(void) { unsigned char value, rev_id = 0 ; - struct i2c_adapter *adapter = NULL; + struct i2c_adapter *adapter; struct i2c_client client; - int addr = -1, bus = 0; /* I2C2 bus (2-1 = 1 in barebox numbering) */ - bus = 1; - - /* PFUZE100 device address is 0x08 */ - addr = 0x08; - - adapter = i2c_get_adapter(bus); + adapter = i2c_get_adapter(1); if (!adapter) { - pr_err("i2c bus %d not found\n", bus); + pr_err("i2c2 bus not found\n"); return -ENODEV; } client.adapter = adapter; - client.addr = addr; + /* PFUZE100 device address is 0x08 */ + client.addr = 0x08; /* Attempt to locate the PFUZE100 chip. */ if (i2c_read_reg(&client, 0x00, &value, 1) != 1) { diff --git a/arch/arm/configs/imx_defconfig b/arch/arm/configs/imx_defconfig index 886bcefd9b..69ab021e25 100644 --- a/arch/arm/configs/imx_defconfig +++ b/arch/arm/configs/imx_defconfig @@ -19,6 +19,10 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y +CONFIG_BOOTM_SHOW_TYPE=y +CONFIG_BOOTM_VERBOSE=y +CONFIG_BOOTM_INITRD=y +CONFIG_BOOTM_OFTREE=y CONFIG_BLSPEC=y CONFIG_CONSOLE_ACTIVATE_NONE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y @@ -26,10 +30,6 @@ CONFIG_RESET_SOURCE=y CONFIG_LONGHELP=y CONFIG_CMD_IOMEM=y CONFIG_CMD_MEMINFO=y -CONFIG_BOOTM_SHOW_TYPE=y -CONFIG_BOOTM_VERBOSE=y -CONFIG_BOOTM_INITRD=y -CONFIG_BOOTM_OFTREE=y # CONFIG_CMD_BOOTU is not set CONFIG_CMD_GO=y CONFIG_CMD_RESET=y @@ -79,7 +79,6 @@ CONFIG_OF_BAREBOX_DRIVERS=y CONFIG_DRIVER_NET_FEC_IMX=y CONFIG_NET_USB=y CONFIG_NET_USB_ASIX=y -CONFIG_DRIVER_SPI_IMX=y CONFIG_I2C=y CONFIG_I2C_IMX=y CONFIG_MTD=y @@ -89,7 +88,9 @@ CONFIG_CFI_BUFFER_WRITE=y CONFIG_NAND=y # CONFIG_NAND_ECC_SOFT is not set # CONFIG_NAND_ECC_HW_SYNDROME is not set +CONFIG_NAND_ALLOW_ERASE_BAD=y CONFIG_NAND_IMX=y +CONFIG_NAND_IMX_BBM=y CONFIG_MTD_UBI=y CONFIG_MTD_UBI_FASTMAP=y CONFIG_USB_HOST=y @@ -97,7 +98,6 @@ CONFIG_USB_EHCI=y CONFIG_USB_ULPI=y CONFIG_MCI=y CONFIG_MCI_IMX=y -CONFIG_MFD_MC13XXX=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_LED_GPIO_OF=y diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig index 5ab343392c..8594965b54 100644 --- a/arch/arm/configs/imx_v7_defconfig +++ b/arch/arm/configs/imx_v7_defconfig @@ -164,6 +164,7 @@ CONFIG_MFD_MC9SDZ60=y CONFIG_MFD_STMPE=y CONFIG_LED=y CONFIG_LED_GPIO=y +CONFIG_LED_GPIO_OF=y CONFIG_LED_TRIGGERS=y CONFIG_EEPROM_AT25=y CONFIG_EEPROM_AT24=y diff --git a/arch/arm/configs/kindle3_defconfig b/arch/arm/configs/kindle3_defconfig new file mode 100644 index 0000000000..0b7088e867 --- /dev/null +++ b/arch/arm/configs/kindle3_defconfig @@ -0,0 +1,65 @@ +CONFIG_ARCH_IMX=y +CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x30000 +CONFIG_MACH_KINDLE3=y +CONFIG_ARCH_IMX_USBLOADER=y +CONFIG_IMX_IIM=y +CONFIG_AEABI=y +CONFIG_ARM_BOARD_APPEND_ATAG=y +CONFIG_ARM_BOARD_PREPEND_ATAG=y +CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y +CONFIG_PBL_IMAGE=y +CONFIG_PBL_RELOCATABLE=y +CONFIG_IMAGE_COMPRESSION_XZKERN=y +CONFIG_MALLOC_SIZE=0x2000000 +CONFIG_MALLOC_TLSF=y +CONFIG_RELOCATABLE=y +CONFIG_HUSH_FANCY_PROMPT=y +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +CONFIG_BOOTM_OFTREE=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y +CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/kindle3/env/" +CONFIG_RESET_SOURCE=y +CONFIG_CMD_DMESG=y +CONFIG_LONGHELP=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MMC_EXTCSD=y +# CONFIG_CMD_BOOTU is not set +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GO=y +CONFIG_CMD_LOADY=y +CONFIG_CMD_RESET=y +CONFIG_CMD_UIMAGE=y +CONFIG_CMD_PARTITION=y +CONFIG_CMD_EXPORT=y +CONFIG_CMD_DEFAULTENV=y +CONFIG_CMD_LOADENV=y +CONFIG_CMD_PRINTENV=y +CONFIG_CMD_MAGICVAR=y +CONFIG_CMD_MAGICVAR_HELP=y +CONFIG_CMD_SAVEENV=y +CONFIG_CMD_READF=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_EDIT=y +CONFIG_CMD_READLINE=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_CRC=y +CONFIG_CMD_CRC_CMP=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USBGADGET=y +CONFIG_DRIVER_SPI_IMX=y +CONFIG_I2C=y +CONFIG_I2C_IMX=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_SERIAL=y +CONFIG_MCI=y +CONFIG_MCI_STARTUP=y +CONFIG_MCI_IMX_ESDHC=y +CONFIG_MFD_MC13XXX=y +CONFIG_FS_EXT4=y +CONFIG_FS_FAT=y +CONFIG_FS_FAT_WRITE=y +CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/lib32/armlinux.c b/arch/arm/lib32/armlinux.c index 47b9bd33ed..6c7bd101c2 100644 --- a/arch/arm/lib32/armlinux.c +++ b/arch/arm/lib32/armlinux.c @@ -107,8 +107,9 @@ static struct tag *armlinux_get_bootparams(void) BUG(); } -#ifdef CONFIG_ARM_BOARD_APPEND_ATAG static struct tag *(*atag_appender)(struct tag *); + +#if defined CONFIG_ARM_BOARD_APPEND_ATAG void armlinux_set_atag_appender(struct tag *(*func)(struct tag *)) { atag_appender = func; @@ -234,6 +235,9 @@ static void setup_tags(unsigned long initrd_address, const char *commandline = linux_bootargs_get(); setup_start_tag(); + if (IS_ENABLED(CONFIG_ARM_BOARD_PREPEND_ATAG) && atag_appender) + params = atag_appender(params); + setup_memory_tags(); setup_commandline_tag(commandline, swap); @@ -242,10 +246,10 @@ static void setup_tags(unsigned long initrd_address, setup_revision_tag(); setup_serial_tag(); -#ifdef CONFIG_ARM_BOARD_APPEND_ATAG - if (atag_appender != NULL) + if (IS_ENABLED(CONFIG_ARM_BOARD_APPEND_ATAG) && atag_appender && + !IS_ENABLED(CONFIG_ARM_BOARD_PREPEND_ATAG)) params = atag_appender(params); -#endif + setup_end_tag(); printf("commandline: %s\n" diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 5b648acbbc..80f8fd80ae 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -33,6 +33,7 @@ config ARCH_TEXT_BASE default 0x17800000 if MACH_SABRESD default 0x4fc00000 if MACH_REALQ7 default 0x4fc00000 if MACH_GK802 + default 0x87f00000 if MACH_KINDLE3 default 0x2fc00000 if MACH_TQMA6X default 0x4fc00000 if MACH_DFI_FS700_M60 default 0x4fc00000 if MACH_UDOO @@ -453,6 +454,14 @@ config MACH_GUF_CUPID Say Y here if you are using the Garz+Fricke Neso board equipped with a Freescale i.MX35 Processor +config MACH_KINDLE3 + bool "Amazon Kindle3" + select ARCH_IMX35 + select ARCH_HAS_L2X0 + select HAVE_DEFAULT_ENVIRONMENT_NEW + help + Say Y here if you are using the Amazon Model No. D00901 Kindle + # ---------------------------------------------------------- comment "i.MX51 Boards" diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c index 6785da0dee..f992134f7e 100644 --- a/arch/arm/mach-imx/clk-pllv1.c +++ b/arch/arm/mach-imx/clk-pllv1.c @@ -61,8 +61,9 @@ static unsigned long clk_pllv1_recalc_rate(struct clk *clk, do_div(ll, mfd + 1); if (mfn < 0) - ll = -ll; - ll = (freq * mfi) + ll; + ll = (freq * mfi) - ll; + else + ll = (freq * mfi) + ll; return ll; } diff --git a/arch/arm/mach-imx/clk-pllv2.c b/arch/arm/mach-imx/clk-pllv2.c index a2b016f346..5ba07fa5e6 100644 --- a/arch/arm/mach-imx/clk-pllv2.c +++ b/arch/arm/mach-imx/clk-pllv2.c @@ -113,8 +113,9 @@ static unsigned long __clk_pllv2_recalc_rate(unsigned long parent_rate, temp = (u64) ref_clk * mfn_abs; do_div(temp, mfd + 1); if (mfn < 0) - temp = -temp; - temp = (ref_clk * mfi) + temp; + temp = (ref_clk * mfi) - temp; + else + temp = (ref_clk * mfi) + temp; return temp; } diff --git a/arch/arm/mach-imx/imx25.c b/arch/arm/mach-imx/imx25.c index 3cfeebbe93..2534d75429 100644 --- a/arch/arm/mach-imx/imx25.c +++ b/arch/arm/mach-imx/imx25.c @@ -23,14 +23,6 @@ #define MX25_BOOTROM_HAB_MAGIC 0x3c95cac6 #define MX25_DRYICE_GPR 0x3c -void imx25_setup_weimcs(size_t cs, unsigned upper, unsigned lower, - unsigned additional) -{ - writel(upper, MX25_WEIM_BASE_ADDR + (cs * 0x10) + 0x0); - writel(lower, MX25_WEIM_BASE_ADDR + (cs * 0x10) + 0x4); - writel(additional, MX25_WEIM_BASE_ADDR + (cs * 0x10) + 0x8); -} - /* IIM fuse definitions */ #define IIM_BANK0_BASE (MX25_IIM_BASE_ADDR + 0x800) #define IIM_BANK1_BASE (MX25_IIM_BASE_ADDR + 0xc00) diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h index 46fe38856f..0a4200b3f4 100644 --- a/arch/arm/mach-imx/include/mach/generic.h +++ b/arch/arm/mach-imx/include/mach/generic.h @@ -4,6 +4,7 @@ #include <linux/compiler.h> #include <linux/types.h> #include <bootsource.h> +#include <mach/imx_cpu_types.h> u64 imx_uid(void); @@ -42,16 +43,6 @@ void imx6_cpu_lowlevel_init(void); /* range e.g. GPIO_1_5 is gpio 5 under linux */ #define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr)) -#define IMX_CPU_IMX1 1 -#define IMX_CPU_IMX21 21 -#define IMX_CPU_IMX25 25 -#define IMX_CPU_IMX27 27 -#define IMX_CPU_IMX31 31 -#define IMX_CPU_IMX35 35 -#define IMX_CPU_IMX51 51 -#define IMX_CPU_IMX53 53 -#define IMX_CPU_IMX6 6 - extern unsigned int __imx_cpu_type; #ifdef CONFIG_ARCH_IMX1 diff --git a/arch/arm/mach-imx/include/mach/imx-pll.h b/arch/arm/mach-imx/include/mach/imx-pll.h index df7e73efea..0ccf41bcaa 100644 --- a/arch/arm/mach-imx/include/mach/imx-pll.h +++ b/arch/arm/mach-imx/include/mach/imx-pll.h @@ -15,4 +15,12 @@ #define IMX_PLL_MFN(x) (((x) & 0x3ff) << 0) #define IMX_PLL_BRMO (1 << 31) +/* Assuming 24MHz input clock */ +#define MPCTL_PARAM_532 ((1 << 31) | \ + IMX_PLL_PD(0) | IMX_PLL_MFD(11) | IMX_PLL_MFI(11) | IMX_PLL_MFN(1)) +#define MPCTL_PARAM_399 \ + (IMX_PLL_PD(0) | IMX_PLL_MFD(15) | IMX_PLL_MFI(8) | IMX_PLL_MFN(5)) +#define PPCTL_PARAM_300 \ + (IMX_PLL_PD(0) | IMX_PLL_MFD(3) | IMX_PLL_MFI(6) | IMX_PLL_MFN(1)) + #endif /* __INCLUDE_ASM_ARCH_IMX_PLL_H*/ diff --git a/arch/arm/mach-imx/include/mach/imx35-regs.h b/arch/arm/mach-imx/include/mach/imx35-regs.h index 52e209b4de..48bf64386a 100644 --- a/arch/arm/mach-imx/include/mach/imx35-regs.h +++ b/arch/arm/mach-imx/include/mach/imx35-regs.h @@ -150,11 +150,26 @@ #define MX35_CCM_CGR3 0x38 #define MX35_CCM_CGR0_CSPI1_SHIFT 10 +#define MX35_CCM_CGR0_CSPI2_SHIFT 12 +#define MX35_CCM_CGR0_EPIT1_SHIFT 20 +#define MX35_CCM_CGR0_EPIT2_SHIFT 22 +#define MX35_CCM_CGR0_ESDHC1_SHIFT 26 +#define MX35_CCM_CGR0_ESDHC2_SHIFT 28 +#define MX35_CCM_CGR0_ESDHC3_SHIFT 30 #define MX35_CCM_CGR1_FEC_SHIFT 0 +#define MX35_CCM_CGR1_GPIO1_SHIFT 2 +#define MX35_CCM_CGR1_GPIO2_SHIFT 4 +#define MX35_CCM_CGR1_GPIO3_SHIFT 6 #define MX35_CCM_CGR1_I2C1_SHIFT 10 -#define MX35_CCM_CGR1_SDHC1_SHIFT 26 +#define MX35_CCM_CGR1_I2C2_SHIFT 12 +#define MX35_CCM_CGR1_I2C3_SHIFT 14 +#define MX35_CCM_CGR1_IOMUX_SHIFT 16 +#define MX35_CCM_CGR1_KPP_SHIFT 20 +#define MX35_CCM_CGR2_UART1_SHIFT 16 #define MX35_CCM_CGR2_UART2_SHIFT 18 +#define MX35_CCM_CGR2_UART3_SHIFT 20 #define MX35_CCM_CGR2_USB_SHIFT 22 +#define MX35_CCM_CGR2_WDOG_SHIFT 24 #define MX35_CCM_RCSR_MEM_CTRL_SHIFT 25 #define MX35_CCM_RCSR_MEM_TYPE_SHIFT 23 diff --git a/arch/arm/mach-imx/include/mach/imx53-regs.h b/arch/arm/mach-imx/include/mach/imx53-regs.h index 9cd7723ce9..d45c94370d 100644 --- a/arch/arm/mach-imx/include/mach/imx53-regs.h +++ b/arch/arm/mach-imx/include/mach/imx53-regs.h @@ -1,8 +1,13 @@ #ifndef __MACH_IMX53_REGS_H #define __MACH_IMX53_REGS_H +#include <linux/sizes.h> + #define MX53_IROM_BASE_ADDR 0x0 +#define MX53_IRAM_BASE_ADDR 0xF8000000 +#define MX53_IRAM_SIZE SZ_128K + #define MX53_SATA_BASE_ADDR 0x10000000 #define MX53_IPU_BASE_ADDR 0x18000000 diff --git a/arch/arm/mach-imx/include/mach/imx_cpu_types.h b/arch/arm/mach-imx/include/mach/imx_cpu_types.h new file mode 100644 index 0000000000..781ab9fe74 --- /dev/null +++ b/arch/arm/mach-imx/include/mach/imx_cpu_types.h @@ -0,0 +1,14 @@ +#ifndef __MACH_IMX_CPU_TYPES_H +#define __MACH_IMX_CPU_TYPES_H + +#define IMX_CPU_IMX1 1 +#define IMX_CPU_IMX21 21 +#define IMX_CPU_IMX25 25 +#define IMX_CPU_IMX27 27 +#define IMX_CPU_IMX31 31 +#define IMX_CPU_IMX35 35 +#define IMX_CPU_IMX51 51 +#define IMX_CPU_IMX53 53 +#define IMX_CPU_IMX6 6 + +#endif /* __MACH_IMX_CPU_TYPES_H */ diff --git a/arch/arm/mach-imx/include/mach/iomux-mx31.h b/arch/arm/mach-imx/include/mach/iomux-mx31.h index 258ccee034..c814c15912 100644 --- a/arch/arm/mach-imx/include/mach/iomux-mx31.h +++ b/arch/arm/mach-imx/include/mach/iomux-mx31.h @@ -573,10 +573,7 @@ enum iomux_pins { #define MX31_PIN_CONTRAST__CONTRAST IOMUX_MODE(MX31_PIN_CONTRAST, IOMUX_CONFIG_FUNC) #define MX31_PIN_D3_SPL__D3_SPL IOMUX_MODE(MX31_PIN_D3_SPL, IOMUX_CONFIG_FUNC) #define MX31_PIN_D3_CLS__D3_CLS IOMUX_MODE(MX31_PIN_D3_CLS, IOMUX_CONFIG_FUNC) -#define MX31_PIN_LCS0__GPI03_23 IOMUX_MODE(MX31_PIN_LCS0, IOMUX_CONFIG_GPIO) #define MX31_PIN_GPIO1_1__GPIO IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO) -#define MX31_PIN_I2C_CLK__SCL IOMUX_MODE(MX31_PIN_I2C_CLK, IOMUX_CONFIG_FUNC) -#define MX31_PIN_I2C_DAT__SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC) #define MX31_PIN_DCD_DTE1__I2C2_SDA IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT2) #define MX31_PIN_RI_DTE1__I2C2_SCL IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT2) #define MX31_PIN_CSPI2_SS2__I2C3_SDA IOMUX_MODE(MX31_PIN_CSPI2_SS2, IOMUX_CONFIG_ALT1) @@ -640,37 +637,6 @@ enum iomux_pins { #define MX31_PIN_USB_OC__GPIO1_30 IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO) #define MX31_PIN_I2C_DAT__I2C1_SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC) #define MX31_PIN_I2C_CLK__I2C1_SCL IOMUX_MODE(MX31_PIN_I2C_CLK, IOMUX_CONFIG_FUNC) -#define MX31_PIN_DCD_DTE1__I2C2_SDA IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT2) -#define MX31_PIN_RI_DTE1__I2C2_SCL IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT2) -#define MX31_PIN_ATA_CS0__GPIO3_26 IOMUX_MODE(MX31_PIN_ATA_CS0, IOMUX_CONFIG_GPIO) -#define MX31_PIN_ATA_CS1__GPIO3_27 IOMUX_MODE(MX31_PIN_ATA_CS1, IOMUX_CONFIG_GPIO) -#define MX31_PIN_PC_PWRON__SD2_DATA3 IOMUX_MODE(MX31_PIN_PC_PWRON, IOMUX_CONFIG_ALT1) -#define MX31_PIN_PC_VS1__SD2_DATA2 IOMUX_MODE(MX31_PIN_PC_VS1, IOMUX_CONFIG_ALT1) -#define MX31_PIN_PC_READY__SD2_DATA1 IOMUX_MODE(MX31_PIN_PC_READY, IOMUX_CONFIG_ALT1) -#define MX31_PIN_PC_WAIT_B__SD2_DATA0 IOMUX_MODE(MX31_PIN_PC_WAIT_B, IOMUX_CONFIG_ALT1) -#define MX31_PIN_PC_CD2_B__SD2_CLK IOMUX_MODE(MX31_PIN_PC_CD2_B, IOMUX_CONFIG_ALT1) -#define MX31_PIN_PC_CD1_B__SD2_CMD IOMUX_MODE(MX31_PIN_PC_CD1_B, IOMUX_CONFIG_ALT1) -#define MX31_PIN_ATA_DIOR__GPIO3_28 IOMUX_MODE(MX31_PIN_ATA_DIOR, IOMUX_CONFIG_GPIO) -#define MX31_PIN_ATA_DIOW__GPIO3_29 IOMUX_MODE(MX31_PIN_ATA_DIOW, IOMUX_CONFIG_GPIO) -#define MX31_PIN_CSI_D4__CSI_D4 IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D5__CSI_D5 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D6__CSI_D6 IOMUX_MODE(MX31_PIN_CSI_D6, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D7__CSI_D7 IOMUX_MODE(MX31_PIN_CSI_D7, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D8__CSI_D8 IOMUX_MODE(MX31_PIN_CSI_D8, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D9__CSI_D9 IOMUX_MODE(MX31_PIN_CSI_D9, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D10__CSI_D10 IOMUX_MODE(MX31_PIN_CSI_D10, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D11__CSI_D11 IOMUX_MODE(MX31_PIN_CSI_D11, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D12__CSI_D12 IOMUX_MODE(MX31_PIN_CSI_D12, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D13__CSI_D13 IOMUX_MODE(MX31_PIN_CSI_D13, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D14__CSI_D14 IOMUX_MODE(MX31_PIN_CSI_D14, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_D15__CSI_D15 IOMUX_MODE(MX31_PIN_CSI_D15, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_HSYNC__CSI_HSYNC IOMUX_MODE(MX31_PIN_CSI_HSYNC, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_MCLK__CSI_MCLK IOMUX_MODE(MX31_PIN_CSI_MCLK, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_PIXCLK__CSI_PIXCLK IOMUX_MODE(MX31_PIN_CSI_PIXCLK, IOMUX_CONFIG_FUNC) -#define MX31_PIN_CSI_VSYNC__CSI_VSYNC IOMUX_MODE(MX31_PIN_CSI_VSYNC, IOMUX_CONFIG_FUNC) -#define MX31_PIN_GPIO3_0__GPIO3_0 IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO) -#define MX31_PIN_GPIO3_1__GPIO3_1 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO) -#define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO) #define MX31_PIN_GPIO1_0__GPIO1_0 IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO) #define MX31_PIN_SVEN0__GPIO2_0 IOMUX_MODE(MX31_PIN_SVEN0, IOMUX_CONFIG_GPIO) #define MX31_PIN_STX0__GPIO2_1 IOMUX_MODE(MX31_PIN_STX0, IOMUX_CONFIG_GPIO) diff --git a/arch/arm/mach-imx/include/mach/weim.h b/arch/arm/mach-imx/include/mach/weim.h index 3fbbb6ba8e..22d9c76d61 100644 --- a/arch/arm/mach-imx/include/mach/weim.h +++ b/arch/arm/mach-imx/include/mach/weim.h @@ -12,9 +12,6 @@ void imx31_setup_weimcs(size_t cs, unsigned upper, unsigned lower, void imx35_setup_weimcs(size_t cs, unsigned upper, unsigned lower, unsigned additional); -void imx25_setup_weimcs(size_t cs, unsigned upper, unsigned lower, - unsigned additional); - void imx1_setup_eimcs(size_t cs, unsigned upper, unsigned lower); void imx21_setup_eimcs(size_t cs, unsigned upper, unsigned lower); diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c index 66786ffec7..4c45e929ba 100644 --- a/drivers/mci/imx-esdhc.c +++ b/drivers/mci/imx-esdhc.c @@ -550,13 +550,6 @@ static int esdhc_reset(struct fsl_esdhc_host *host) return 0; } -static int fsl_esdhc_detect(struct device_d *dev) -{ - struct fsl_esdhc_host *host = dev->priv; - - return mci_detect_card(&host->mci); -} - static int fsl_esdhc_probe(struct device_d *dev) { struct resource *iores; @@ -615,8 +608,6 @@ static int fsl_esdhc_probe(struct device_d *dev) host->mci.card_present = esdhc_card_present; host->mci.hw_dev = dev; - dev->detect = fsl_esdhc_detect, - rate = clk_get_rate(host->clk); host->mci.f_min = rate >> 12; if (host->mci.f_min < 200000) diff --git a/drivers/mci/imx.c b/drivers/mci/imx.c index 2788fb9d9d..354daba05d 100644 --- a/drivers/mci/imx.c +++ b/drivers/mci/imx.c @@ -519,9 +519,9 @@ static int mxcmci_probe(struct device_d *dev) host->mci.f_min = rate >> 7; host->mci.f_max = rate >> 1; - mci_register(&host->mci); + mci_of_parse(&host->mci); - return 0; + return mci_register(&host->mci); } static __maybe_unused struct of_device_id mxcmci_compatible[] = { diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c index 42dde06c3c..4e176f7b3c 100644 --- a/drivers/mci/mci-core.c +++ b/drivers/mci/mci-core.c @@ -1589,11 +1589,13 @@ static int mci_card_probe(struct mci *mci) return -ENODEV; } - ret = regulator_enable(host->supply); - if (ret) { - dev_err(&mci->dev, "failed to enable regulator: %s\n", + if (!IS_ERR(host->supply)) { + ret = regulator_enable(host->supply); + if (ret) { + dev_err(&mci->dev, "failed to enable regulator: %s\n", strerror(-ret)); - return ret; + return ret; + } } /* start with a host interface reset */ @@ -1684,7 +1686,8 @@ on_error: if (rc != 0) { host->clock = 0; /* disable the MCI clock */ mci_set_ios(mci); - regulator_disable(host->supply); + if (!IS_ERR(host->supply)) + regulator_disable(host->supply); } return rc; @@ -1771,10 +1774,8 @@ int mci_register(struct mci_host *host) mci->dev.detect = mci_detect; host->supply = regulator_get(host->hw_dev, "vmmc"); - if (IS_ERR(host->supply)) { - ret = PTR_ERR(host->supply); - goto err_free; - } + if (IS_ERR(host->supply)) + dev_err(&mci->dev, "Failed to get 'vmmc' regulator.\n"); ret = register_device(&mci->dev); if (ret) diff --git a/drivers/mtd/nand/nand_imx_bbm.c b/drivers/mtd/nand/nand_imx_bbm.c index 251dfe5d3f..23722a9064 100644 --- a/drivers/mtd/nand/nand_imx_bbm.c +++ b/drivers/mtd/nand/nand_imx_bbm.c @@ -52,12 +52,20 @@ * on the flash BBT. * */ -static int checkbad(struct mtd_info *mtd, loff_t ofs, void *__buf) +static int checkbad(struct mtd_info *mtd, loff_t ofs) { - int ret, retlen; - uint8_t *buf = __buf; - - ret = mtd->read(mtd, ofs, mtd->writesize, &retlen, buf); + int ret; + uint8_t buf[mtd->writesize + mtd->oobsize]; + struct mtd_oob_ops ops; + + ops.mode = MTD_OPS_RAW; + ops.ooboffs = 0; + ops.datbuf = buf; + ops.len = mtd->writesize; + ops.oobbuf = buf + mtd->writesize; + ops.ooblen = mtd->oobsize; + + ret = mtd_read_oob(mtd, ofs, &ops); if (ret < 0) return ret; @@ -72,7 +80,6 @@ static void *create_bbt(struct mtd_info *mtd) struct nand_chip *chip = mtd->priv; int len, i, numblocks, ret; loff_t from = 0; - void *buf; uint8_t *bbt; if ((chip->bbt_td && chip->bbt_td->pages[0] != -1) || @@ -88,18 +95,12 @@ static void *create_bbt(struct mtd_info *mtd) if (!bbt) return ERR_PTR(-ENOMEM); - buf = malloc(mtd->writesize); - if (!buf) { - ret = -ENOMEM; - goto out2; - } - numblocks = mtd->size >> (chip->bbt_erase_shift - 1); for (i = 0; i < numblocks;) { - ret = checkbad(mtd, from, buf); + ret = checkbad(mtd, from); if (ret < 0) - goto out1; + goto out; if (ret) { bbt[i >> 3] |= 0x03 << (i & 0x6); @@ -113,9 +114,7 @@ static void *create_bbt(struct mtd_info *mtd) return bbt; -out1: - free(buf); -out2: +out: free(bbt); return ERR_PTR(ret); diff --git a/drivers/spi/imx_spi.c b/drivers/spi/imx_spi.c index 99ec228887..dc7a8c89f3 100644 --- a/drivers/spi/imx_spi.c +++ b/drivers/spi/imx_spi.c @@ -515,23 +515,16 @@ static __maybe_unused struct spi_imx_devtype_data spi_imx_devtype_data_2_3 = { static int imx_spi_dt_probe(struct imx_spi *imx) { struct device_node *node = imx->master.dev->device_node; - int ret, i; - u32 num_cs; + int i; if (!node) return -ENODEV; - ret = of_property_read_u32(node, "fsl,spi-num-chipselects", &num_cs); - if (ret) - return ret; - - imx->master.num_chipselect = num_cs; - imx->cs_array = xzalloc(sizeof(u32) * num_cs); + imx->master.num_chipselect = of_gpio_named_count(node, "cs-gpios"); + imx->cs_array = xzalloc(sizeof(u32) * imx->master.num_chipselect); - for (i = 0; i < num_cs; i++) { - int cs_gpio = of_get_named_gpio(node, "cs-gpios", i); - imx->cs_array[i] = cs_gpio; - } + for (i = 0; i < imx->master.num_chipselect; i++) + imx->cs_array[i] = of_get_named_gpio(node, "cs-gpios", i); return 0; } diff --git a/images/Makefile.imx b/images/Makefile.imx index 0ff317ba07..effa5edc0f 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -288,6 +288,11 @@ CFG_start_imx6dl_nitrogen6x_2g.pblx.imximg = $(board)/boundarydevices-nitrogen6x FILE_barebox-boundarydevices-imx6dl-nitrogen6x-2g.img = start_imx6dl_nitrogen6x_2g.pblx.imximg image-$(CONFIG_MACH_NITROGEN6X) += barebox-boundarydevices-imx6dl-nitrogen6x-2g.img +pblx-$(CONFIG_MACH_TX6X) += start_imx6dl_tx6x_512m +CFG_start_imx6dl_tx6x_512m.pblx.imximg = $(board)/karo-tx6x/flash-header-tx6dl-512m.imxcfg +FILE_barebox-karo-imx6dl-tx6x-512m.img = start_imx6dl_tx6x_512m.pblx.imximg +image-$(CONFIG_MACH_TX6X) += barebox-karo-imx6dl-tx6x-512m.img + pblx-$(CONFIG_MACH_TX6X) += start_imx6dl_tx6x_1g CFG_start_imx6dl_tx6x_1g.pblx.imximg = $(board)/karo-tx6x/flash-header-tx6dl-1g.imxcfg FILE_barebox-karo-imx6dl-tx6x-1g.img = start_imx6dl_tx6x_1g.pblx.imximg diff --git a/include/mfd/mc13892.h b/include/mfd/mc13892.h index 22df5f0676..c92a462445 100644 --- a/include/mfd/mc13892.h +++ b/include/mfd/mc13892.h @@ -95,22 +95,22 @@ #define MC13892_SETTING_1_VSD_3_0 (6 << 6) #define MC13892_SETTING_1_VSD_3_15 (7 << 6) #define MC13892_SETTING_1_VSD_MASK (7 << 6) -#define MC13892_SETTING_1_VGEN1_1_2 0 -#define MC13892_SETTING_1_VGEN1_1_5 1 -#define MC13892_SETTING_1_VGEN1_2_775 2 -#define MC13892_SETTING_1_VGEN1_3_15 3 -#define MC13892_SETTING_1_VGEN1_MASK 3 -#define MC13892_SETTING_1_VGEN2_1_2 (0 << 6) -#define MC13892_SETTING_1_VGEN2_1_5 (1 << 6) -#define MC13892_SETTING_1_VGEN2_1_6 (2 << 6) -#define MC13892_SETTING_1_VGEN2_1_8 (3 << 6) -#define MC13892_SETTING_1_VGEN2_2_7 (4 << 6) -#define MC13892_SETTING_1_VGEN2_2_8 (5 << 6) -#define MC13892_SETTING_1_VGEN2_3_0 (6 << 6) -#define MC13892_SETTING_1_VGEN2_3_15 (7 << 6) -#define MC13892_SETTING_1_VGEN2_MASK (7 << 6) /* Fields in REG_SETTING_0 */ +#define MC13892_SETTING_0_VGEN1_1_2 (0 << 0) +#define MC13892_SETTING_0_VGEN1_1_5 (1 << 0) +#define MC13892_SETTING_0_VGEN1_2_775 (2 << 0) +#define MC13892_SETTING_0_VGEN1_3_15 (3 << 0) +#define MC13892_SETTING_0_VGEN1_MASK (3 << 0) +#define MC13892_SETTING_0_VGEN2_1_2 (0 << 6) +#define MC13892_SETTING_0_VGEN2_1_5 (1 << 6) +#define MC13892_SETTING_0_VGEN2_1_6 (2 << 6) +#define MC13892_SETTING_0_VGEN2_1_8 (3 << 6) +#define MC13892_SETTING_0_VGEN2_2_7 (4 << 6) +#define MC13892_SETTING_0_VGEN2_2_8 (5 << 6) +#define MC13892_SETTING_0_VGEN2_3_0 (6 << 6) +#define MC13892_SETTING_0_VGEN2_3_15 (7 << 6) +#define MC13892_SETTING_0_VGEN2_MASK (7 << 6) #define MC13892_SETTING_0_VGEN3_1_8 (0 << 14) #define MC13892_SETTING_0_VGEN3_2_9 (1 << 14) #define MC13892_SETTING_0_VGEN3_MASK (1 << 14) diff --git a/scripts/imx/Makefile b/scripts/imx/Makefile index d9f0c51298..335e3e65ae 100644 --- a/scripts/imx/Makefile +++ b/scripts/imx/Makefile @@ -6,7 +6,8 @@ always := $(hostprogs-y) HOSTCFLAGS_imx-usb-loader.o = `pkg-config --cflags libusb-1.0` HOSTLOADLIBES_imx-usb-loader = `pkg-config --libs libusb-1.0` -HOSTCFLAGS_imx-image.o = -I$(srctree) +HOSTCFLAGS_imx.o = -I$(srctree)/arch/arm/mach-imx/include +HOSTCFLAGS_imx-image.o = -I$(srctree) -I$(srctree)/arch/arm/mach-imx/include ifdef CONFIG_ARCH_IMX_IMXIMAGE_SSL_SUPPORT HOSTCFLAGS_imx-image.o += -DIMXIMAGE_SSL_SUPPORT HOSTLOADLIBES_imx-image = `pkg-config --libs openssl` diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c index 0d315a2668..3f62228ab1 100644 --- a/scripts/imx/imx-image.c +++ b/scripts/imx/imx-image.c @@ -29,6 +29,7 @@ #include <endian.h> #include <linux/kernel.h> #include <sys/file.h> +#include <mach/imx_cpu_types.h> #include "imx.h" @@ -788,7 +789,7 @@ int main(int argc, char *argv[]) exit(1); } - if (data.cpu_type == 35) { + if (data.cpu_type == IMX_CPU_IMX35) { ret = xwrite(outfd, buf, HEADER_LEN); if (ret < 0) { perror("write"); diff --git a/scripts/imx/imx.c b/scripts/imx/imx.c index 70936babfd..4ec8c89541 100644 --- a/scripts/imx/imx.c +++ b/scripts/imx/imx.c @@ -23,6 +23,7 @@ #include <stdint.h> #include <errno.h> #include <linux/kernel.h> +#include <mach/imx_cpu_types.h> #include "imx.h" @@ -216,11 +217,11 @@ struct soc_type { }; static struct soc_type socs[] = { - { .name = "imx25", .header_version = 1, .cpu_type = 25}, - { .name = "imx35", .header_version = 1, .cpu_type = 35 }, - { .name = "imx51", .header_version = 1, .cpu_type = 51 }, - { .name = "imx53", .header_version = 2, .cpu_type = 53 }, - { .name = "imx6", .header_version = 2, .cpu_type = 6 }, + { .name = "imx25", .header_version = 1, .cpu_type = IMX_CPU_IMX25 }, + { .name = "imx35", .header_version = 1, .cpu_type = IMX_CPU_IMX35 }, + { .name = "imx51", .header_version = 1, .cpu_type = IMX_CPU_IMX51 }, + { .name = "imx53", .header_version = 2, .cpu_type = IMX_CPU_IMX53 }, + { .name = "imx6", .header_version = 2, .cpu_type = IMX_CPU_IMX6 }, }; static int do_soc(struct config_data *data, int argc, char *argv[]) @@ -238,7 +239,7 @@ static int do_soc(struct config_data *data, int argc, char *argv[]) data->header_version = socs[i].header_version; data->cpu_type = socs[i].cpu_type; - if (data->cpu_type == 35) + if (data->cpu_type == IMX_CPU_IMX35) data->load_size += HEADER_LEN; return 0; @@ -327,7 +328,7 @@ static int do_super_root_key(struct config_data *data, int argc, char *argv[]) return -EINVAL; } - if (data->cpu_type != 35 && data->cpu_type != 25) { + if (data->header_version != 1) { fprintf(stderr, "Warning: The super_root_key command is meaningless " "on non HABv3 based SoCs\n"); return 0; |