diff options
74 files changed, 2097 insertions, 408 deletions
@@ -1,8 +1,8 @@ VERSION = 2013 -PATCHLEVEL = 11 +PATCHLEVEL = 12 SUBLEVEL = 0 EXTRAVERSION = -NAME = La tour Eiffel +NAME = Saint Nicholas Day # *DOCUMENTATION* # To see a list of typical targets execute "make help" diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index c273f0cb1e..bb269418ef 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -36,6 +36,7 @@ obj-$(CONFIG_MACH_FREESCALE_MX35_3STACK) += freescale-mx35-3-stack/ obj-$(CONFIG_MACH_FREESCALE_MX51_PDK) += freescale-mx51-pdk/ obj-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += freescale-mx53-loco/ obj-$(CONFIG_MACH_FREESCALE_MX53_SMD) += freescale-mx53-smd/ +obj-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += freescale-mx53-vmx53/ obj-$(CONFIG_MACH_GE863) += telit-evk-pro3/ obj-$(CONFIG_MACH_GK802) += gk802/ obj-$(CONFIG_MACH_GUF_CUPID) += guf-cupid/ @@ -77,6 +78,7 @@ obj-$(CONFIG_MACH_SAMA5D3XEK) += sama5d3xek/ obj-$(CONFIG_MACH_SCB9328) += scb9328/ obj-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += ebv-socrates/ obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += terasic-sockit/ +obj-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += solidrun-carrier-1/ obj-$(CONFIG_MACH_TNY_A9260) += tny-a926x/ obj-$(CONFIG_MACH_TNY_A9263) += tny-a926x/ obj-$(CONFIG_MACH_TNY_A9G20) += tny-a926x/ diff --git a/arch/arm/boards/freescale-mx53-vmx53/Makefile b/arch/arm/boards/freescale-mx53-vmx53/Makefile new file mode 100644 index 0000000000..33d5e59d35 --- /dev/null +++ b/arch/arm/boards/freescale-mx53-vmx53/Makefile @@ -0,0 +1,3 @@ +obj-y += board.o flash-header-imx53-vmx53.dcd.o +extra-y += flash-header-imx53-vmx53.dcd.S flash-header-imx53-vmx53.dcd +lwl-y += lowlevel.o diff --git a/arch/arm/boards/freescale-mx53-vmx53/board.c b/arch/arm/boards/freescale-mx53-vmx53/board.c new file mode 100644 index 0000000000..5f2a9bf41a --- /dev/null +++ b/arch/arm/boards/freescale-mx53-vmx53/board.c @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2013 Rostislav Lisovy <lisovy@gmail.com>, PiKRON s.r.o. + * + * Board specific file for Voipac X53-DMM-668 module equipped + * with i.MX53 CPU + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <init.h> +#include <sizes.h> + +#include <generated/mach-types.h> +#include <mach/imx5.h> +#include <asm/armlinux.h> +#include <mach/bbu.h> + +extern char flash_header_imx53_vmx53_start[]; +extern char flash_header_imx53_vmx53_end[]; + +static int vmx53_late_init(void) +{ + armlinux_set_bootparams((void *)0x70000100); + armlinux_set_architecture(MACH_TYPE_VMX53); + + barebox_set_model("Voipac VMX53"); + barebox_set_hostname("vmx53"); + + imx53_bbu_internal_nand_register_handler("nand", + BBU_HANDLER_FLAG_DEFAULT, (void *)flash_header_imx53_vmx53_start, + flash_header_imx53_vmx53_end - flash_header_imx53_vmx53_start, + SZ_512K, 0); + + return 0; +} +late_initcall(vmx53_late_init); + +static int vmx53_postcore_init(void) +{ + if (!of_machine_is_compatible("voipac,imx53-dmm-668")) + return 0; + + imx53_init_lowlevel(800); + + return 0; +} +postcore_initcall(vmx53_postcore_init); diff --git a/arch/arm/boards/freescale-mx53-vmx53/env/config-board b/arch/arm/boards/freescale-mx53-vmx53/env/config-board new file mode 100644 index 0000000000..e4d41e5987 --- /dev/null +++ b/arch/arm/boards/freescale-mx53-vmx53/env/config-board @@ -0,0 +1,7 @@ +#!/bin/sh + +# board defaults, do not change in running system. Change /env/config +# instead + +global.hostname=vmx53 +global.linux.bootargs.base="console=ttymxc0,115200" diff --git a/arch/arm/boards/freescale-mx53-vmx53/flash-header-imx53-vmx53.imxcfg b/arch/arm/boards/freescale-mx53-vmx53/flash-header-imx53-vmx53.imxcfg new file mode 100644 index 0000000000..3bf73b65aa --- /dev/null +++ b/arch/arm/boards/freescale-mx53-vmx53/flash-header-imx53-vmx53.imxcfg @@ -0,0 +1,54 @@ +loadaddr 0x70000000 +soc imx53 +dcdofs 0x400 +wm 32 0x53fa8554 0x00300000 +wm 32 0x53fa8558 0x00300040 +wm 32 0x53fa8560 0x00300000 +wm 32 0x53fa8564 0x00300040 +wm 32 0x53fa8568 0x00300040 +wm 32 0x53fa8570 0x00300000 +wm 32 0x53fa8574 0x00300000 +wm 32 0x53fa8578 0x00300000 +wm 32 0x53fa857c 0x00300040 +wm 32 0x53fa8580 0x00300040 +wm 32 0x53fa8584 0x00300000 +wm 32 0x53fa8588 0x00300000 +wm 32 0x53fa8590 0x00300040 +wm 32 0x53fa8594 0x00300000 +wm 32 0x53fa86f0 0x00300000 +wm 32 0x53fa86f4 0x00000000 +wm 32 0x53fa86fc 0x00000000 +wm 32 0x53fa8714 0x00000000 +wm 32 0x53fa8718 0x00300000 +wm 32 0x53fa871c 0x00300000 +wm 32 0x53fa8720 0x00300000 +wm 32 0x53fa8724 0x04000000 +wm 32 0x53fa8728 0x00300000 +wm 32 0x53fa872c 0x00300000 +wm 32 0x63fd9088 0x35343535 +wm 32 0x63fd9090 0x4d444c44 +wm 32 0x63fd907c 0x01370138 +wm 32 0x63fd9080 0x013b013c +wm 32 0x63fd9018 0x00011740 +wm 32 0x63fd9000 0xc4190000 +wm 32 0x63fd900c 0x9f5152e3 +wm 32 0x63fd9010 0xb68e8a63 +wm 32 0x63fd9014 0x01ff00db +wm 32 0x63fd902c 0x000026d2 +wm 32 0x63fd9030 0x009f0e21 +wm 32 0x63fd9008 0x12273030 +wm 32 0x63fd9004 0x0002002d +wm 32 0x63fd901c 0x00008032 +wm 32 0x63fd901c 0x00008033 +wm 32 0x63fd901c 0x00028031 +wm 32 0x63fd901c 0x052080b0 +wm 32 0x63fd901c 0x04008040 +wm 32 0x63fd901c 0x0000803a +wm 32 0x63fd901c 0x0000803b +wm 32 0x63fd901c 0x00028039 +wm 32 0x63fd901c 0x05208138 +wm 32 0x63fd901c 0x04008048 +wm 32 0x63fd9020 0x00005800 +wm 32 0x63fd9040 0x04b80003 +wm 32 0x63fd9058 0x00022227 +wm 32 0x63fd901c 0x00000000 diff --git a/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c b/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c new file mode 100644 index 0000000000..5dc23fd8c5 --- /dev/null +++ b/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c @@ -0,0 +1,19 @@ +#include <common.h> +#include <mach/esdctl.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> + +extern char __dtb_imx53_voipac_bsb_start[]; + +ENTRY_FUNCTION(start_imx53_vmx53)(void) +{ + uint32_t fdt; + + __barebox_arm_head(); + + arm_cpu_lowlevel_init(); + + fdt = (uint32_t)__dtb_imx53_voipac_bsb_start - get_runtime_offset(); + + imx53_barebox_entry(fdt); +} diff --git a/arch/arm/boards/freescale-mx6-sabrelite/Makefile b/arch/arm/boards/freescale-mx6-sabrelite/Makefile index d44f697718..6ae9e75e2d 100644 --- a/arch/arm/boards/freescale-mx6-sabrelite/Makefile +++ b/arch/arm/boards/freescale-mx6-sabrelite/Makefile @@ -1,3 +1,3 @@ -obj-y += board.o -lwl-y += flash_header.o +obj-y += board.o flash-header-mx6-sabrelite.dcd.o +extra-y += flash-header-mx6-sabrelite.dcd.S flash-header-mx6-sabrelite.dcd lwl-y += lowlevel.o diff --git a/arch/arm/boards/freescale-mx6-sabrelite/board.c b/arch/arm/boards/freescale-mx6-sabrelite/board.c index eb6eb3c747..e9a8a4a626 100644 --- a/arch/arm/boards/freescale-mx6-sabrelite/board.c +++ b/arch/arm/boards/freescale-mx6-sabrelite/board.c @@ -20,6 +20,7 @@ #include <mach/imx6-regs.h> #include <fec.h> #include <gpio.h> +#include <mach/bbu.h> #include <asm/armlinux.h> #include <generated/mach-types.h> #include <partition.h> @@ -107,26 +108,24 @@ fs_initcall(sabrelite_ksz9021rn_setup); static void sabrelite_ehci_init(void) { - imx6_usb_phy2_disable_oc(); - imx6_usb_phy2_enable(); - /* hub reset */ gpio_direction_output(204, 0); udelay(2000); gpio_set_value(204, 1); - - add_generic_usb_ehci_device(1, MX6_USBOH3_USB_BASE_ADDR + 0x200, NULL); } static int sabrelite_devices_init(void) { + if (!of_machine_is_compatible("fsl,imx6q-sabrelite")) + return 0; + sabrelite_ehci_init(); armlinux_set_bootparams((void *)0x10000100); armlinux_set_architecture(3769); - devfs_add_partition("m25p0", 0, SZ_512K, DEVFS_PARTITION_FIXED, "self0"); - devfs_add_partition("m25p0", SZ_512K, SZ_512K, DEVFS_PARTITION_FIXED, "env0"); + imx6_bbu_internal_spi_i2c_register_handler("spiflash", "/dev/m25p0.barebox", + BBU_HANDLER_FLAG_DEFAULT, NULL, 0, 0); return 0; } @@ -134,18 +133,24 @@ device_initcall(sabrelite_devices_init); static int sabrelite_coredevices_init(void) { + if (!of_machine_is_compatible("fsl,imx6q-sabrelite")) + return 0; + phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, ksz9021rn_phy_fixup); return 0; } coredevice_initcall(sabrelite_coredevices_init); -static int sabrelite_core_init(void) +static int sabrelite_postcore_init(void) { + if (!of_machine_is_compatible("fsl,imx6q-sabrelite")) + return 0; + imx6_init_lowlevel(); barebox_set_hostname("sabrelite"); return 0; } -core_initcall(sabrelite_core_init); +postcore_initcall(sabrelite_postcore_init); diff --git a/arch/arm/boards/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg b/arch/arm/boards/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg new file mode 100644 index 0000000000..60a39fe870 --- /dev/null +++ b/arch/arm/boards/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg @@ -0,0 +1,106 @@ +soc imx6 +loadaddr 0x20000000 +dcdofs 0x400 + +wm 32 0x020e05a8 0x00000030 +wm 32 0x020e05b0 0x00000030 +wm 32 0x020e0524 0x00000030 +wm 32 0x020e051c 0x00000030 +wm 32 0x020e0518 0x00000030 +wm 32 0x020e050c 0x00000030 +wm 32 0x020e05b8 0x00000030 +wm 32 0x020e05c0 0x00000030 +wm 32 0x020e05ac 0x00020030 +wm 32 0x020e05b4 0x00020030 +wm 32 0x020e0528 0x00020030 +wm 32 0x020e0520 0x00020030 +wm 32 0x020e0514 0x00020030 +wm 32 0x020e0510 0x00020030 +wm 32 0x020e05bc 0x00020030 +wm 32 0x020e05c4 0x00020030 +wm 32 0x020e056c 0x00020030 +wm 32 0x020e0578 0x00020030 +wm 32 0x020e0588 0x00020030 +wm 32 0x020e0594 0x00020030 +wm 32 0x020e057c 0x00020030 +wm 32 0x020e0590 0x00003000 +wm 32 0x020e0598 0x00003000 +wm 32 0x020e058c 0x00000000 +wm 32 0x020e059c 0x00003030 +wm 32 0x020e05a0 0x00003030 +wm 32 0x020e0784 0x00000030 +wm 32 0x020e0788 0x00000030 +wm 32 0x020e0794 0x00000030 +wm 32 0x020e079c 0x00000030 +wm 32 0x020e07a0 0x00000030 +wm 32 0x020e07a4 0x00000030 +wm 32 0x020e07a8 0x00000030 +wm 32 0x020e0748 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e0750 0x00020000 +wm 32 0x020e0758 0x00000000 +wm 32 0x020e0774 0x00020000 +wm 32 0x020e078c 0x00000030 +wm 32 0x020e0798 0x000c0000 +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b481c 0x33333333 +wm 32 0x021b4820 0x33333333 +wm 32 0x021b4824 0x33333333 +wm 32 0x021b4828 0x33333333 +wm 32 0x021b0018 0x00081740 +wm 32 0x021b001c 0x00008000 +wm 32 0x021b000c 0x555a7975 +wm 32 0x021b0010 0xff538e64 +wm 32 0x021b0014 0x01ff00db +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x005b0e21 +wm 32 0x021b0008 0x09444040 +wm 32 0x021b0004 0x00025576 +wm 32 0x021b0040 0x00000027 +wm 32 0x021b0000 0x831a0000 +wm 32 0x021b001c 0x04088032 +wm 32 0x021b001c 0x0408803a +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x0000803b +wm 32 0x021b001c 0x00428031 +wm 32 0x021b001c 0x00428039 +wm 32 0x021b001c 0x09408030 +wm 32 0x021b001c 0x09408038 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b001c 0x04008048 +wm 32 0x021b0800 0xa1380003 +wm 32 0x021b4800 0xa1380003 +wm 32 0x021b0020 0x00005800 +wm 32 0x021b0818 0x00022227 +wm 32 0x021b4818 0x00022227 +wm 32 0x021b083c 0x434b0350 +wm 32 0x021b0840 0x034c0359 +wm 32 0x021b483c 0x434b0350 +wm 32 0x021b4840 0x03650348 +wm 32 0x021b0848 0x4436383b +wm 32 0x021b4848 0x39393341 +wm 32 0x021b0850 0x35373933 +wm 32 0x021b4850 0x48254A36 +wm 32 0x021b080c 0x001f001f +wm 32 0x021b0810 0x001f001f +wm 32 0x021b480c 0x00440044 +wm 32 0x021b4810 0x00440044 +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 +wm 32 0x021b001c 0x00000000 +wm 32 0x021b0404 0x00011006 +wm 32 0x020c4068 0x00c03f3f +wm 32 0x020c406c 0x0030fc03 +wm 32 0x020c4070 0x0fffc000 +wm 32 0x020c4074 0x3ff00000 +wm 32 0x020c4078 0x00fff300 +wm 32 0x020c407c 0x0f0000c3 +wm 32 0x020c4080 0x000003ff +/* enable AXI cache for VDOA/VPU/IPU */ +wm 32 0x020e0010 0xf00000cf +/* set IPU AXI-id0 Qos=0xf(bypass AXI-id1 Qos=0x7 */ +wm 32 0x020e0018 0x007f007f +wm 32 0x020e001c 0x007f007f diff --git a/arch/arm/boards/freescale-mx6-sabrelite/flash_header.c b/arch/arm/boards/freescale-mx6-sabrelite/flash_header.c deleted file mode 100644 index 61d482b437..0000000000 --- a/arch/arm/boards/freescale-mx6-sabrelite/flash_header.c +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (C) 2011 Marc Kleine-Budde <mkl@pengutronix.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <common.h> -#include <asm/byteorder.h> -#include <mach/imx-flash-header.h> -#include <mach/imx6-regs.h> -#include <asm/barebox-arm-head.h> - -void __naked __flash_header_start go(void) -{ - barebox_arm_head(); -} - -#define DCD(a, v) { .addr = cpu_to_be32(a), .val = cpu_to_be32(v), } - -struct imx_dcd_v2_entry __dcd_entry_section dcd_entry[] = { - DCD(MX6_IOMUXC_BASE_ADDR + 0x5a8, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x5b0, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x524, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x51c, 0x00000030), - - DCD(MX6_IOMUXC_BASE_ADDR + 0x518, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x50c, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x5b8, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x5c0, 0x00000030), - - DCD(MX6_IOMUXC_BASE_ADDR + 0x5ac, 0x00020030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x5b4, 0x00020030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x528, 0x00020030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x520, 0x00020030), - - DCD(MX6_IOMUXC_BASE_ADDR + 0x514, 0x00020030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x510, 0x00020030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x5bc, 0x00020030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x5c4, 0x00020030), - - DCD(MX6_IOMUXC_BASE_ADDR + 0x56c, 0x00020030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x578, 0x00020030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x588, 0x00020030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x594, 0x00020030), - - DCD(MX6_IOMUXC_BASE_ADDR + 0x57c, 0x00020030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x590, 0x00003000), - DCD(MX6_IOMUXC_BASE_ADDR + 0x598, 0x00003000), - DCD(MX6_IOMUXC_BASE_ADDR + 0x58c, 0x00000000), - - DCD(MX6_IOMUXC_BASE_ADDR + 0x59c, 0x00003030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x5a0, 0x00003030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x784, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x788, 0x00000030), - - DCD(MX6_IOMUXC_BASE_ADDR + 0x794, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x79c, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x7a0, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x7a4, 0x00000030), - - DCD(MX6_IOMUXC_BASE_ADDR + 0x7a8, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x748, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x74c, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x750, 0x00020000), - - DCD(MX6_IOMUXC_BASE_ADDR + 0x758, 0x00000000), - DCD(MX6_IOMUXC_BASE_ADDR + 0x774, 0x00020000), - DCD(MX6_IOMUXC_BASE_ADDR + 0x78c, 0x00000030), - DCD(MX6_IOMUXC_BASE_ADDR + 0x798, 0x000C0000), - - DCD(MX6_MMDC_P0_BASE_ADDR + 0x81c, 0x33333333), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x820, 0x33333333), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x824, 0x33333333), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x828, 0x33333333), - - DCD(MX6_MMDC_P1_BASE_ADDR + 0x81c, 0x33333333), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x820, 0x33333333), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x824, 0x33333333), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x828, 0x33333333), - - DCD(MX6_MMDC_P0_BASE_ADDR + 0x018, 0x00081740), - - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00008000), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x00c, 0x555A7975), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x010, 0xFF538E64), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x014, 0x01FF00DB), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x02c, 0x000026D2), - - DCD(MX6_MMDC_P0_BASE_ADDR + 0x030, 0x005B0E21), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x008, 0x09444040), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x004, 0x00025576), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x040, 0x00000027), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x000, 0x831A0000), - - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x04088032), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x0408803A), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00008033), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x0000803B), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00428031), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00428039), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x09408030), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x09408038), - - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x04008040), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x04008048), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x800, 0xA1380003), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x800, 0xA1380003), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x020, 0x00005800), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x818, 0x00022227), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x818, 0x00022227), - - DCD(MX6_MMDC_P0_BASE_ADDR + 0x83c, 0x434B0350), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x840, 0x034C0359), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x83c, 0x434B0350), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x840, 0x03650348), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x848, 0x4436383B), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x848, 0x39393341), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x850, 0x35373933), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x850, 0x48254A36), - - DCD(MX6_MMDC_P0_BASE_ADDR + 0x80c, 0x001F001F), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x810, 0x001F001F), - - DCD(MX6_MMDC_P1_BASE_ADDR + 0x80c, 0x00440044), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x810, 0x00440044), - - DCD(MX6_MMDC_P0_BASE_ADDR + 0x8b8, 0x00000800), - DCD(MX6_MMDC_P1_BASE_ADDR + 0x8b8, 0x00000800), - - DCD(MX6_MMDC_P0_BASE_ADDR + 0x01c, 0x00000000), - DCD(MX6_MMDC_P0_BASE_ADDR + 0x404, 0x00011006), - - DCD(MX6_CCM_BASE_ADDR + 0x068, 0x00c03f3f), - DCD(MX6_CCM_BASE_ADDR + 0x06c, 0x0030fc03), - DCD(MX6_CCM_BASE_ADDR + 0x070, 0x0fffc000), - DCD(MX6_CCM_BASE_ADDR + 0x074, 0x3ff00000), - DCD(MX6_CCM_BASE_ADDR + 0x078, 0x00fff300), - DCD(MX6_CCM_BASE_ADDR + 0x07c, 0x0f0000c3), - DCD(MX6_CCM_BASE_ADDR + 0x080, 0x000003ff), - - /* enable AXI cache for VDOA/VPU/IPU */ - DCD(MX6_IOMUXC_BASE_ADDR + 0x010, 0xf00000cf), - /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ - DCD(MX6_IOMUXC_BASE_ADDR + 0x018, 0x007f007f), - DCD(MX6_IOMUXC_BASE_ADDR + 0x01c, 0x007f007f), -}; - -#define APP_DEST CONFIG_TEXT_BASE - -struct imx_flash_header_v2 __flash_header_section flash_header = { - .header.tag = IVT_HEADER_TAG, - .header.length = cpu_to_be16(32), - .header.version = IVT_VERSION, - .entry = (u32)_stext, - .dcd_ptr = APP_DEST + FLASH_HEADER_OFFSET + offsetof(struct imx_flash_header_v2, dcd), - .boot_data_ptr = APP_DEST + FLASH_HEADER_OFFSET + offsetof(struct imx_flash_header_v2, boot_data), - .self = APP_DEST + FLASH_HEADER_OFFSET, - - .boot_data.start = APP_DEST, - .boot_data.size = barebox_image_size, - - .dcd.header.tag = DCD_HEADER_TAG, - .dcd.header.length = cpu_to_be16(sizeof(struct imx_dcd) + sizeof(dcd_entry)), - .dcd.header.version = DCD_VERSION, - - .dcd.command.tag = DCD_COMMAND_WRITE_TAG, - .dcd.command.length = cpu_to_be16(sizeof(struct imx_dcd_command) + sizeof(dcd_entry)), - .dcd.command.param = DCD_COMMAND_WRITE_PARAM, -}; diff --git a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c index aec46fd8cc..a68e09a9f6 100644 --- a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c +++ b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c @@ -3,8 +3,17 @@ #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -void __naked barebox_arm_reset_vector(void) +extern char __dtb_imx6q_sabrelite_start[]; + +ENTRY_FUNCTION(start_imx6_sabrelite)(void) { + uint32_t fdt; + + __barebox_arm_head(); + arm_cpu_lowlevel_init(); - barebox_arm_entry(0x10000000, SZ_1G, 0); + + fdt = (uint32_t)__dtb_imx6q_sabrelite_start - get_runtime_offset(); + + barebox_arm_entry(0x10000000, SZ_1G, fdt); } diff --git a/arch/arm/boards/karo-tx25/flash-header-tx25.imxcfg b/arch/arm/boards/karo-tx25/flash-header-tx25.imxcfg new file mode 100644 index 0000000000..2345f18e93 --- /dev/null +++ b/arch/arm/boards/karo-tx25/flash-header-tx25.imxcfg @@ -0,0 +1,23 @@ +# +# currently unused in barebox, but useful to generate +# a imx-image to use with imx-usb-loader +# +soc imx25 +loadaddr 0x80000000 +dcdofs 0x400 +wm 32 0xb8001010 0x00000002 +wm 32 0xb8001004 0x00095728 +wm 32 0xb8001000 0x92116480 +wm 32 0x80000400 0x92116480 +wm 32 0xb8001000 0xa2116480 +wm 32 0xb8001000 0xb2116480 +wm 8 0x80000033 0x80 +wm 32 0xb8001000 0x82116480 + +wm 32 0xb800100c 0x00095728 +wm 32 0xb8001008 0x92116480 +wm 32 0x80000400 0x92116480 +wm 32 0xb8001008 0xa2116480 +wm 32 0xb8001008 0xb2116480 +wm 8 0x90000033 0x80 +wm 32 0xb8001008 0x82116480 diff --git a/arch/arm/boards/karo-tx25/lowlevel.c b/arch/arm/boards/karo-tx25/lowlevel.c index d0100437e6..742100d0ab 100644 --- a/arch/arm/boards/karo-tx25/lowlevel.c +++ b/arch/arm/boards/karo-tx25/lowlevel.c @@ -29,6 +29,27 @@ #include <asm/system.h> #include <asm/sections.h> #include <asm-generic/memory_layout.h> +#include <debug_ll.h> + +static inline void setup_uart(void) +{ + void __iomem *uartbase = (void *)MX25_UART1_BASE_ADDR; + void __iomem *iomuxbase = (void *)MX25_IOMUXC_BASE_ADDR; + + writel(0x0, iomuxbase + 0x174); + + writel(0x00000000, uartbase + 0x80); + writel(0x00004027, uartbase + 0x84); + writel(0x00000704, uartbase + 0x88); + writel(0x00000a81, uartbase + 0x90); + writel(0x0000002b, uartbase + 0x9c); + writel(0x00013880, uartbase + 0xb0); + writel(0x0000047f, uartbase + 0xa4); + writel(0x0000a259, uartbase + 0xa8); + writel(0x00000001, uartbase + 0x80); + + putc_ll('>'); +} static inline void __bare_init setup_sdram(uint32_t base, uint32_t esdctl, uint32_t esdcfg) @@ -113,6 +134,8 @@ void __bare_init __naked barebox_arm_reset_vector(void) writel(0xffffffff, MX25_CCM_BASE_ADDR + MX25_CCM_CGCR1); writel(0x000fdfff, MX25_CCM_BASE_ADDR + MX25_CCM_CGCR2); + setup_uart(); + /* Skip SDRAM initialization if we run from RAM */ r = get_pc(); if (r > 0x80000000 && r < 0xa0000000) diff --git a/arch/arm/boards/solidrun-carrier-1/Makefile b/arch/arm/boards/solidrun-carrier-1/Makefile new file mode 100644 index 0000000000..d243c8f1a3 --- /dev/null +++ b/arch/arm/boards/solidrun-carrier-1/Makefile @@ -0,0 +1,3 @@ +obj-y += board.o flash-header-solidrun-carrier-1.dcd.o +extra-y += flash-header-solidrun-carrier-1.dcd.S flash-header-solidrun-carrier-1.dcd +lwl-y += lowlevel.o diff --git a/arch/arm/boards/solidrun-carrier-1/board.c b/arch/arm/boards/solidrun-carrier-1/board.c new file mode 100644 index 0000000000..f520303b73 --- /dev/null +++ b/arch/arm/boards/solidrun-carrier-1/board.c @@ -0,0 +1,89 @@ +/* + * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <asm/armlinux.h> +#include <asm/io.h> +#include <bootsource.h> +#include <common.h> +#include <environment.h> +#include <envfs.h> +#include <gpio.h> +#include <init.h> +#include <mach/generic.h> +#include <mach/imx6-regs.h> +#include <mach/imx6.h> +#include <mfd/imx6q-iomuxc-gpr.h> +#include <sizes.h> +#include <linux/phy.h> + +static int ar8035_phy_fixup(struct phy_device *dev) +{ + u16 val; + + /* Ar803x phy SmartEEE feature cause link status generates glitch, + * which cause ethernet link down/up issue, so disable SmartEEE + */ + phy_write(dev, 0xd, 0x3); + phy_write(dev, 0xe, 0x805d); + phy_write(dev, 0xd, 0x4003); + + val = phy_read(dev, 0xe); + phy_write(dev, 0xe, val & ~(1 << 8)); + + /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ + phy_write(dev, 0xd, 0x7); + phy_write(dev, 0xe, 0x8016); + phy_write(dev, 0xd, 0x4007); + + val = phy_read(dev, 0xe); + val &= 0xffe3; + val |= 0x18; + phy_write(dev, 0xe, val); + + /* introduce tx clock delay */ + phy_write(dev, 0x1d, 0x5); + val = phy_read(dev, 0x1e); + val |= 0x0100; + phy_write(dev, 0x1e, val); + + return 0; +} + +static int carrier1_device_init(void) +{ + if (!of_machine_is_compatible("solidrun,cubox-i-carrier-1")) + return 0; + + phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup); + + /* enable USB VBUS */ + gpio_direction_output(IMX_GPIO_NR(3, 22), 1); + gpio_direction_output(IMX_GPIO_NR(1, 0), 1); + + return 0; +} +device_initcall(carrier1_device_init); + +static int carrier1_lwl_init(void) +{ + if (!of_machine_is_compatible("solidrun,cubox-i-carrier-1")) + return 0; + + barebox_set_hostname("carrier-1"); + + imx6_init_lowlevel(); + + return 0; +} +postcore_initcall(carrier1_lwl_init); diff --git a/arch/arm/boards/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg b/arch/arm/boards/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg new file mode 100644 index 0000000000..b1856b49ce --- /dev/null +++ b/arch/arm/boards/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg @@ -0,0 +1,79 @@ +loadaddr 0x10000000 +soc imx6 +dcdofs 0x400 +wm 32 0x020e0774 0x000c0000 +wm 32 0x020e0754 0x00000000 +wm 32 0x020e04ac 0x00000030 +wm 32 0x020e04b0 0x00000030 +wm 32 0x020e0464 0x00000030 +wm 32 0x020e0490 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e0494 0x00000030 +wm 32 0x020e04a4 0x00003000 +wm 32 0x020e04a8 0x00003000 +wm 32 0x020e04a0 0x00000000 +wm 32 0x020e04b4 0x00003030 +wm 32 0x020e04b8 0x00003030 +wm 32 0x020e076c 0x00000030 +wm 32 0x020e0750 0x00000000 +wm 32 0x020e04bc 0x00000030 +wm 32 0x020e04c0 0x00000030 +wm 32 0x020e04c4 0x00000030 +wm 32 0x020e04c8 0x00000030 +wm 32 0x020e04cc 0x00000000 +wm 32 0x020e04d0 0x00000000 +wm 32 0x020e04d4 0x00000000 +wm 32 0x020e04d8 0x00000000 +wm 32 0x020e0760 0x00000000 +wm 32 0x020e0764 0x00000030 +wm 32 0x020e0770 0x00000030 +wm 32 0x020e0778 0x00000030 +wm 32 0x020e077c 0x00000030 +wm 32 0x020e0780 0x00000000 +wm 32 0x020e0784 0x00000000 +wm 32 0x020e078c 0x00000000 +wm 32 0x020e0748 0x00000000 +wm 32 0x020e0470 0x00000030 +wm 32 0x020e0474 0x00000030 +wm 32 0x020e0478 0x00000030 +wm 32 0x020e047c 0x00000030 +wm 32 0x020e0480 0x00000000 +wm 32 0x020e0484 0x00000000 +wm 32 0x020e0488 0x00000000 +wm 32 0x020e048c 0x00000000 +wm 32 0x021b0800 0xa1390003 +wm 32 0x021b4800 0xa1390003 +wm 32 0x021b080c 0x000F0011 +wm 32 0x021b0810 0x000E000F +wm 32 0x021b083c 0x42240229 +wm 32 0x021b0840 0x021a0219 +wm 32 0x021b0848 0x4e4f5150 +wm 32 0x021b0850 0x35363136 +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 +wm 32 0x021b0004 0x0002002d +wm 32 0x021b0008 0x00333030 +wm 32 0x021b000c 0x40445323 +wm 32 0x021b0010 0xb68e8c63 +wm 32 0x021b0014 0x01ff00db +wm 32 0x021b0018 0x00001740 +wm 32 0x021b001c 0x00008000 +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x00440e21 +wm 32 0x021b0040 0x00000017 +wm 32 0x021b0400 0x11420000 +wm 32 0x021b0000 0x83190000 +wm 32 0x021b001c 0x04008032 +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x00428031 +wm 32 0x021b001c 0x07208030 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b0020 0x00005800 +wm 32 0x021b0818 0x00000007 +wm 32 0x021b0004 0x0002556d +wm 32 0x021b0404 0x00011006 +wm 32 0x021b001c 0x00000000 diff --git a/arch/arm/boards/solidrun-carrier-1/lowlevel.c b/arch/arm/boards/solidrun-carrier-1/lowlevel.c new file mode 100644 index 0000000000..21bc7870a5 --- /dev/null +++ b/arch/arm/boards/solidrun-carrier-1/lowlevel.c @@ -0,0 +1,18 @@ +#include <common.h> +#include <sizes.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> + +extern char __dtb_imx6dl_cubox_i_carrier_1_start[]; + +ENTRY_FUNCTION(start_imx6dl_cubox_i_carrier_1)(void) +{ + uint32_t fdt; + + __barebox_arm_head(); + + arm_cpu_lowlevel_init(); + + fdt = (uint32_t)__dtb_imx6dl_cubox_i_carrier_1_start - get_runtime_offset(); + barebox_arm_entry(0x10000000, SZ_512M, fdt); +} diff --git a/arch/arm/configs/freescale-mx6-sabrelite_defconfig b/arch/arm/configs/freescale-mx6-sabrelite_defconfig index d4d6cf24a2..520c31a8df 100644 --- a/arch/arm/configs/freescale-mx6-sabrelite_defconfig +++ b/arch/arm/configs/freescale-mx6-sabrelite_defconfig @@ -1,7 +1,5 @@ -CONFIG_BUILTIN_DTB=y -CONFIG_BUILTIN_DTB_NAME="imx6q-sabrelite" CONFIG_ARCH_IMX=y -CONFIG_ARCH_IMX6=y +CONFIG_IMX_MULTI_BOARDS=y CONFIG_MACH_SABRELITE=y CONFIG_IMX_IIM=y CONFIG_IMX_IIM_FUSE_BLOW=y diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig index 10bdda6802..04791409d2 100644 --- a/arch/arm/configs/imx_v7_defconfig +++ b/arch/arm/configs/imx_v7_defconfig @@ -8,6 +8,7 @@ CONFIG_MACH_DFI_FS700_M60=y CONFIG_MACH_REALQ7=y CONFIG_MACH_GK802=y CONFIG_MACH_TQMA6X=y +CONFIG_MACH_SOLIDRUN_CARRIER1=y CONFIG_IMX_IIM=y CONFIG_IMX_IIM_FUSE_BLOW=y CONFIG_IMX_OCOTP=y @@ -87,6 +88,7 @@ CONFIG_NET_NETCONSOLE=y CONFIG_NET_RESOLV=y CONFIG_OFDEVICE=y CONFIG_OF_BAREBOX_DRIVERS=y +CONFIG_AT803X_PHY=y CONFIG_DRIVER_NET_FEC_IMX=y CONFIG_NET_USB=y CONFIG_NET_USB_ASIX=y diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index 0eb15e665a..399e6b8330 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -83,7 +83,7 @@ static noinline __noreturn void __start(uint32_t membase, uint32_t memsize, * If boarddata is a pointer inside valid memory and contains a * FDT magic then use it as later to probe devices */ - if (boarddata > membase && boarddata < membase + memsize && + if (boarddata >= membase && boarddata < membase + memsize && get_unaligned_be32((void *)boarddata) == FDT_MAGIC) { uint32_t totalsize = get_unaligned_be32((void *)boarddata + 4); endmem -= ALIGN(totalsize, 64); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 511adf45e4..3630c04008 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1,6 +1,7 @@ dtb-$(CONFIG_ARCH_IMX51) += imx51-babbage.dtb \ imx51-genesi-efika-sb.dtb -dtb-$(CONFIG_ARCH_IMX53) += imx53-qsb.dtb +dtb-$(CONFIG_ARCH_IMX53) += imx53-qsb.dtb \ + imx53-voipac-bsb.dtb dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \ imx6dl-dfi-fs700-m60-6s.dtb \ imx6q-dfi-fs700-m60-6q.dtb \ @@ -9,7 +10,8 @@ dtb-$(CONFIG_ARCH_IMX6) += imx6q-gk802.dtb \ imx6q-sabresd.dtb \ imx6dl-mba6x.dtb \ imx6q-mba6x.dtb \ - imx6q-phytec-pbab01.dtb + imx6q-phytec-pbab01.dtb \ + imx6dl-cubox-i-carrier-1.dtb dtb-$(CONFIG_ARCH_MVEBU) += dove-cubox.dtb dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_sockit.dtb \ socfpga_cyclone5_socrates.dtb @@ -23,6 +25,7 @@ obj-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o pbl-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += imx51-genesi-efika-sb.dtb.o pbl-$(CONFIG_MACH_FREESCALE_MX51_PDK) += imx51-babbage.dtb.o pbl-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += imx53-qsb.dtb.o +pbl-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += imx53-voipac-bsb.dtb.o pbl-$(CONFIG_MACH_DFI_FS700_M60) += imx6q-dfi-fs700-m60-6q.dtb.o imx6dl-dfi-fs700-m60-6s.dtb.o pbl-$(CONFIG_MACH_PHYTEC_PFLA02) += imx6q-phytec-pbab01.dtb.o pbl-$(CONFIG_MACH_REALQ7) += imx6q-dmo-realq7.dtb.o @@ -33,6 +36,8 @@ pbl-$(CONFIG_MACH_TOSHIBA_AC100) += tegra20-paz00.dtb.o pbl-$(CONFIG_MACH_TQMA6X) += imx6dl-mba6x.dtb.o imx6q-mba6x.dtb.o pbl-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o pbl-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += socfpga_cyclone5_sockit.dtb.o +pbl-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += imx6dl-cubox-i-carrier-1.dtb.o +pbl-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o .SECONDARY: $(obj)/$(BUILTIN_DTB).dtb.S .SECONDARY: $(patsubst %,$(obj)/%.S,$(dtb-y)) diff --git a/arch/arm/dts/imx53-voipac-bsb.dts b/arch/arm/dts/imx53-voipac-bsb.dts new file mode 100644 index 0000000000..5c88c0e77f --- /dev/null +++ b/arch/arm/dts/imx53-voipac-bsb.dts @@ -0,0 +1,135 @@ +/* + * Copyright 2013 Rostislav Lisovy <lisovy@gmail.com>, PiKRON s.r.o. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "imx53-voipac-dmm-668.dtsi" + +/ { + sound { + compatible = "fsl,imx53-voipac-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx53-voipac-sgtl5000"; + ssi-controller = <&ssi2>; + audio-codec = <&sgtl5000>; + audio-routing = + "Headphone Jack", "HP_OUT"; + mux-int-port = <2>; + mux-ext-port = <5>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin_gpio>; + + led1 { + label = "led-red"; + gpios = <&gpio3 29 0>; + default-state = "off"; + }; + + led2 { + label = "led-orange"; + gpios = <&gpio2 31 0>; + default-state = "off"; + }; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + hog { + pinctrl_hog: hoggrp { + fsl,pins = < + /* SD2_CD */ + MX53_PAD_EIM_D25__GPIO3_25 0x80000000 + /* SD2_WP */ + MX53_PAD_EIM_A19__GPIO2_19 0x80000000 + >; + }; + + led_pin_gpio: led_gpio { + fsl,pins = < + MX53_PAD_EIM_D29__GPIO3_29 0x80000000 + MX53_PAD_EIM_EB3__GPIO2_31 0x80000000 + >; + }; + }; + + /* Keyboard controller */ + kpp { + pinctrl_kpp_1: kppgrp-1 { + fsl,pins = < + MX53_PAD_GPIO_9__KPP_COL_6 0xe8 + MX53_PAD_GPIO_4__KPP_COL_7 0xe8 + MX53_PAD_KEY_COL2__KPP_COL_2 0xe8 + MX53_PAD_KEY_COL3__KPP_COL_3 0xe8 + MX53_PAD_KEY_COL4__KPP_COL_4 0xe8 + + MX53_PAD_GPIO_2__KPP_ROW_6 0xe0 + MX53_PAD_GPIO_5__KPP_ROW_7 0xe0 + MX53_PAD_KEY_ROW2__KPP_ROW_2 0xe0 + MX53_PAD_KEY_ROW3__KPP_ROW_3 0xe0 + MX53_PAD_KEY_ROW4__KPP_ROW_4 0xe0 + >; + }; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux_1>; /* SSI1 */ + status = "okay"; +}; + +&esdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc2_1>; + cd-gpios = <&gpio3 25 0>; + wp-gpios = <&gpio2 19 0>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3_2>; + status = "okay"; + + sgtl5000: codec@0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + VDDA-supply = <®_3p3v>; + VDDIO-supply = <®_3p3v>; + clocks = <&clks 150>; + }; +}; + +&kpp { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_kpp_1>; + linux,keymap = < + 0x0203003b /* KEY_F1 */ + 0x0603003c /* KEY_F2 */ + 0x0207003d /* KEY_F3 */ + 0x0607003e /* KEY_F4 */ + >; + keypad,num-rows = <8>; + keypad,num-columns = <1>; + status = "okay"; +}; + +&ssi2 { + fsl,mode = "i2s-slave"; + status = "okay"; +}; diff --git a/arch/arm/dts/imx53-voipac-dmm-668.dtsi b/arch/arm/dts/imx53-voipac-dmm-668.dtsi new file mode 100644 index 0000000000..9dc9490aae --- /dev/null +++ b/arch/arm/dts/imx53-voipac-dmm-668.dtsi @@ -0,0 +1,204 @@ +/* + * Copyright 2013 Rostislav Lisovy <lisovy@gmail.com>, PiKRON s.r.o. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include "imx53.dtsi" + +/ { + model = "Voipac i.MX53 X53-DMM-668"; + compatible = "voipac,imx53-dmm-668", "fsl,imx53"; + + memory@70000000 { + device_type = "memory"; + reg = <0x70000000 0x20000000>; + }; + + memory@b0000000 { + device_type = "memory"; + reg = <0xb0000000 0x20000000>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + reg_3p3v: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + hog { + pinctrl_hog: hoggrp { + fsl,pins = < + /* Make DA9053 regulator functional */ + MX53_PAD_GPIO_16__GPIO7_11 0x80000000 + /* FEC Power enable */ + MX53_PAD_GPIO_11__GPIO4_1 0x80000000 + /* FEC RST */ + MX53_PAD_GPIO_12__GPIO4_2 0x80000000 + >; + }; + }; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1_1>; + fsl,spi-num-chipselects = <4>; + cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>, <&gpio2 16 0>, <&gpio2 17 0>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec_1>; + phy-mode = "rmii"; + phy-reset-gpios = <&gpio4 2 0>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_2>; + status = "okay"; + + pmic: dialog@48 { + compatible = "dlg,da9053-aa", "dlg,da9052"; + reg = <0x48>; + interrupt-parent = <&gpio7>; + interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */ + + regulators { + buck1_reg: buck1 { + regulator-name = "BUCKCORE"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-name = "BUCKPRO"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-name = "BUCKMEM"; + regulator-min-microvolt = <1420000>; + regulator-max-microvolt = <1580000>; + regulator-always-on; + }; + + buck4_reg: buck4 { + regulator-name = "BUCKPERI"; + regulator-min-microvolt = <2370000>; + regulator-max-microvolt = <2630000>; + regulator-always-on; + }; + + ldo1_reg: ldo1 { + regulator-name = "ldo1_1v3"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1350000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo2_reg: ldo2 { + regulator-name = "ldo2_1v3"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + ldo3_reg: ldo3 { + regulator-name = "ldo3_3v3"; + regulator-min-microvolt = <3250000>; + regulator-max-microvolt = <3350000>; + regulator-always-on; + }; + + ldo4_reg: ldo4 { + regulator-name = "ldo4_2v775"; + regulator-min-microvolt = <2770000>; + regulator-max-microvolt = <2780000>; + regulator-always-on; + }; + + ldo5_reg: ldo5 { + regulator-name = "ldo5_3v3"; + regulator-min-microvolt = <3250000>; + regulator-max-microvolt = <3350000>; + regulator-always-on; + }; + + ldo6_reg: ldo6 { + regulator-name = "ldo6_1v3"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + ldo7_reg: ldo7 { + regulator-name = "ldo7_2v75"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + }; + + ldo8_reg: ldo8 { + regulator-name = "ldo8_1v8"; + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1850000>; + regulator-always-on; + }; + + ldo9_reg: ldo9 { + regulator-name = "ldo9_1v5"; + regulator-min-microvolt = <1450000>; + regulator-max-microvolt = <1550000>; + regulator-always-on; + }; + + ldo10_reg: ldo10 { + regulator-name = "ldo10_1v3"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + }; + }; +}; + +&nfc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand_1>; + nand-bus-width = <8>; + nand-ecc-mode = "hw"; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_2>; + status = "okay"; +}; diff --git a/arch/arm/dts/imx53.dtsi b/arch/arm/dts/imx53.dtsi index 09c5772d16..678547cf1a 100644 --- a/arch/arm/dts/imx53.dtsi +++ b/arch/arm/dts/imx53.dtsi @@ -269,6 +269,14 @@ #interrupt-cells = <2>; }; + kpp: kpp@53f94000 { + compatible = "fsl,imx53-kpp", "fsl,imx21-kpp"; + reg = <0x53f94000 0x4000>; + interrupts = <60>; + clocks = <&clks 0>; + status = "disabled"; + }; + wdog1: wdog@53f98000 { compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; reg = <0x53f98000 0x4000>; @@ -587,6 +595,13 @@ MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000 >; }; + + pinctrl_i2c3_2: i2c3grp-2 { + fsl,pins = < + MX53_PAD_GPIO_3__I2C3_SCL 0xc0000000 + MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000 + >; + }; }; ipu_disp0 { diff --git a/arch/arm/dts/imx6dl-cubox-i-carrier-1.dts b/arch/arm/dts/imx6dl-cubox-i-carrier-1.dts new file mode 100644 index 0000000000..88c3ef7005 --- /dev/null +++ b/arch/arm/dts/imx6dl-cubox-i-carrier-1.dts @@ -0,0 +1,116 @@ +/* + * Copyright (C) 2013 Russell King + * + * The code contained herein is licensed under the GNU General Public + * License version 2. + */ +/dts-v1/; + +#include "imx6dl.dtsi" +#include "imx6qdl-microsom.dtsi" +#include "imx6qdl-microsom-ar8035.dtsi" + +/ { + model = "SolidRun Cubox-i DL/Solo Carrier-1 Board"; + compatible = "solidrun,cubox-i-carrier-1", "fsl,imx6dl"; + + chosen { + linux,stdout-path = &uart1; + + environment@0 { + compatible = "barebox,environment"; + device-path = &usdhc2, "partname:barebox-environment"; + }; + }; + + memory { + reg = <0x10000000 0x20000000>; + }; + + ir_recv: ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio1 2 1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_carrier1_gpio1_2>; + }; + + codec: spdif-transmitter { + compatible = "linux,spdif-dit"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_carrier1_spdif>; + }; + + sound-spdif { + compatible = "fsl,imx-audio-spdif"; + model = "imx-spdif"; + /* IMX6 doesn't implement this yet */ + spdif-controller = <&spdif>; + spdif-out; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_1>; + + /* + * Not fitted on Carrier-1 board... yet + status = "okay"; + + rtc: pcf8523@68 { + compatible = "nxp,pcf8523"; + reg = <0x68>; + }; + */ +}; + +&iomuxc { + carrier1 { + pinctrl_carrier1_gpio1_2: carrier1-gpio1_2 { + fsl,pins = < + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 + >; + }; + + pinctrl_carrier1_spdif: carrier1-spdif { + fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0>; + }; + + pinctrl_carrier1_usdhc2: carrier1-usdhc2 { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059 + MX6QDL_PAD_GPIO_4__SD2_CD_B 0x1f071 + >; + }; + }; +}; + +&spdif { + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_carrier1_usdhc2>; + vmmc-supply = <®_3p3v>; + fsl,cd-controller; + status = "okay"; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x80000>; + }; + + partition@1 { + label = "barebox-environment"; + reg = <0x80000 0x80000>; + }; +}; diff --git a/arch/arm/dts/imx6q-sabrelite.dts b/arch/arm/dts/imx6q-sabrelite.dts index 9f822206b5..fd3ffa911e 100644 --- a/arch/arm/dts/imx6q-sabrelite.dts +++ b/arch/arm/dts/imx6q-sabrelite.dts @@ -18,7 +18,12 @@ compatible = "fsl,imx6q-sabrelite", "fsl,imx6q"; chosen { - linux,stdout-path = "/soc/aips-bus@02100000/serial@021e8000"; + linux,stdout-path = &uart2; + + environment@0 { + compatible = "barebox,environment"; + device-path = &flash, "partname:barebox-environment"; + }; }; memory { @@ -80,6 +85,18 @@ compatible = "sst,sst25vf016b", "m25p80"; spi-max-frequency = <20000000>; reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x80000>; + }; + + partition@1 { + label = "barebox-environment"; + reg = <0x80000 0x80000>; + }; }; }; @@ -117,10 +134,14 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg_1>; disable-over-current; + phy-mode = "utmi"; + dr_mode = "host"; status = "okay"; }; &usbh1 { + phy-mode = "utmi"; + dr_mode = "host"; status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/dts/imx6qdl-microsom-ar8035.dtsi new file mode 100644 index 0000000000..c1be487dfc --- /dev/null +++ b/arch/arm/dts/imx6qdl-microsom-ar8035.dtsi @@ -0,0 +1,58 @@ +/* + * Copyright 2013 Russell King + * + * The code contained herein is licensed under the GNU General Public + * License version 2. + * + * This describes the hookup for an AR8035 to the IMX6 on the Cubox-i + * MicroSOM. + * + * FIXME: we need to configure PLL_ENET to produce 25MHz, but there + * doesn't seem to be a way to do that yet from DT. (Writing 0x2000 + * to 0x020c80e0 phys will do this.) + */ +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; + phy-mode = "rgmii"; + phy-reset-duration = <2>; + phy-reset-gpios = <&gpio4 15 0>; + status = "okay"; +}; + +&iomuxc { + enet { + pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + /* AR8035 reset */ + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0 + /* AR8035 interrupt */ + MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000 + /* GPIO16 -> AR8035 25MHz */ + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */ + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 + /* AR8035 pin strapping: IO voltage: pull up */ + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + /* AR8035 pin strapping: PHYADDR#0: pull down */ + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0 + /* AR8035 pin strapping: PHYADDR#1: pull down */ + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0 + /* AR8035 pin strapping: MODE#1: pull up */ + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + /* AR8035 pin strapping: MODE#3: pull up */ + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + /* AR8035 pin strapping: MODE#0: pull down */ + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 + >; + }; + }; +}; diff --git a/arch/arm/dts/imx6qdl-microsom.dtsi b/arch/arm/dts/imx6qdl-microsom.dtsi new file mode 100644 index 0000000000..1d6d56d330 --- /dev/null +++ b/arch/arm/dts/imx6qdl-microsom.dtsi @@ -0,0 +1,84 @@ +/* + * Copyright 2013 Russell King + * + * The code contained herein is licensed under the GNU General Public + * License version 2. + */ +/ { + regulators { + compatible = "simple-bus"; + + reg_3p3v: 3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_h1_vbus: usb_h1_vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_h1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 0 0>; + enable-active-high; + }; + + reg_usb_otg_vbus: usb_otg_vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 0>; + enable-active-high; + }; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_microsom_flexcan1>; + status = "okay"; +}; + +&iomuxc { + microsom { + pinctrl_microsom_flexcan1: microsom-flexcan1 { + fsl,pins = < + MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000 + MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000 + >; + }; + + pinctrl_microsom_usbotg: microsom-usbotg { + /* + * Similar to pinctrl_usbotg_2, but we want it + * pulled down for a fixed host connection. + */ + fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>; + }; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_1>; + status = "okay"; +}; + +&usbotg { + phy_type = "utmi"; + dr_mode = "host"; + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_microsom_usbotg>; + status = "okay"; +}; + +&usbh1 { + phy_type = "utmi"; + dr_mode = "host"; + vbus-supply = <®_usb_h1_vbus>; + status = "okay"; +}; diff --git a/arch/arm/lib/barebox.lds.S b/arch/arm/lib/barebox.lds.S index 10c63bf29f..d9588736f8 100644 --- a/arch/arm/lib/barebox.lds.S +++ b/arch/arm/lib/barebox.lds.S @@ -92,6 +92,8 @@ SECTIONS __usymtab : { BAREBOX_SYMS } __usymtab_end = .; + .oftables : { BAREBOX_CLK_TABLE() } + .dtb : { BAREBOX_DTB() } .rel.dyn : { diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index e3fd6bdd23..3a1089f0ed 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -20,6 +20,7 @@ config ARCH_TEXT_BASE default 0x97f00000 if MACH_FREESCALE_MX51_PDK default 0x7ff00000 if MACH_FREESCALE_MX53_LOCO default 0x7ff00000 if MACH_FREESCALE_MX53_SMD + default 0x7ff00000 if MACH_FREESCALE_MX53_VMX53 default 0x87f00000 if MACH_GUF_CUPID default 0x93d00000 if MACH_TX25 default 0x7ff00000 if MACH_TQMA53 @@ -195,6 +196,13 @@ config MACH_FREESCALE_MX53_LOCO bool "Freescale i.MX53 LOCO" select ARCH_IMX53 +config MACH_FREESCALE_MX53_VMX53 + bool "Voipac i.MX53" + select ARCH_IMX53 + help + Say Y here if you are using the Voipac Technologies X53-DMM-668 + module equipped with a Freescale i.MX53 Processor + config MACH_PHYTEC_PFLA02 bool "Phytec phyFLEX-i.MX6 Ouad" select ARCH_IMX6 @@ -215,6 +223,16 @@ config MACH_TQMA6X bool "TQ tqma6x on mba6x" select ARCH_IMX6 +config MACH_SABRELITE + bool "Freescale i.MX6 Sabre Lite" + select ARCH_IMX6 + select HAVE_DEFAULT_ENVIRONMENT_NEW + select HAVE_PBL_MULTI_IMAGES + +config MACH_SOLIDRUN_CARRIER1 + bool "SolidRun CuBox-i Carrier-1" + select ARCH_IMX6 + endif # ---------------------------------------------------------- @@ -444,11 +462,6 @@ config MACH_MX6Q_ARM2 bool "Freescale i.MX6q Armadillo2" select ARCH_IMX6 -config MACH_SABRELITE - bool "Freescale i.MX6 Sabre Lite" - select ARCH_IMX6 - select HAVE_DEFAULT_ENVIRONMENT_NEW - config MACH_SABRESD bool "Freescale i.MX6 SabreSD" select ARCH_IMX6 diff --git a/arch/arm/mach-imx/external-nand-boot.c b/arch/arm/mach-imx/external-nand-boot.c index b0aeb43b15..1af46b78ea 100644 --- a/arch/arm/mach-imx/external-nand-boot.c +++ b/arch/arm/mach-imx/external-nand-boot.c @@ -15,6 +15,7 @@ #include <init.h> #include <io.h> #include <linux/mtd/nand.h> +#include <asm/cache.h> #include <asm/sections.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> @@ -244,6 +245,8 @@ void __bare_init imx_nand_load_image(void *dest, int size, void __iomem *base, */ static __bare_init __naked void jump_sdram(unsigned long offset) { + flush_icache(); + __asm__ __volatile__ ( "sub lr, lr, %0;" "mov pc, lr;" : : "r"(offset) diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c index 268f7c1fd2..72f72a17a1 100644 --- a/arch/arm/mach-omap/omap4_clock.c +++ b/arch/arm/mach-omap/omap4_clock.c @@ -89,7 +89,7 @@ void omap4_configure_per_dpll(const struct dpll_param *dpll_param) void omap4_configure_abe_dpll(const struct dpll_param *dpll_param) { /* Select sys_clk as ref clk for ABE dpll */ - writel(CM_ABE_PLL_REF_CLKSEL, 0x0); + writel(0x0, CM_ABE_PLL_REF_CLKSEL); /* Unlock the ABE dpll */ sr32(CM_CLKMODE_DPLL_ABE, 0, 3, PLL_MN_POWER_BYPASS); @@ -102,11 +102,11 @@ void omap4_configure_abe_dpll(const struct dpll_param *dpll_param) sr32(CM_CLKSEL_DPLL_ABE, 0, 6, dpll_param->n); /* Force DPLL CLKOUTHIF to stay enabled */ - writel(CM_DIV_M2_DPLL_ABE, 0x500); + writel(0x500, CM_DIV_M2_DPLL_ABE); sr32(CM_DIV_M2_DPLL_ABE, 0, 5, dpll_param->m2); sr32(CM_DIV_M2_DPLL_ABE, 8, 1, 0x1); /* Force DPLL CLKOUTHIF to stay enabled */ - writel(CM_DIV_M3_DPLL_ABE, 0x100); + writel(0x100, CM_DIV_M3_DPLL_ABE); sr32(CM_DIV_M3_DPLL_ABE, 0, 5, dpll_param->m3); sr32(CM_DIV_M3_DPLL_ABE, 8, 1, 0x1); @@ -120,7 +120,7 @@ void omap4_configure_abe_dpll(const struct dpll_param *dpll_param) void omap4_configure_usb_dpll(const struct dpll_param *dpll_param) { /* Select the 60Mhz clock 480/8 = 60*/ - writel(CM_CLKSEL_USB_60MHz, 0x1); + writel(0x1, CM_CLKSEL_USB_60MHz); /* Unlock the USB dpll */ sr32(CM_CLKMODE_DPLL_USB, 0, 3, PLL_MN_POWER_BYPASS); @@ -133,7 +133,7 @@ void omap4_configure_usb_dpll(const struct dpll_param *dpll_param) sr32(CM_CLKSEL_DPLL_USB, 0, 6, dpll_param->n); /* Force DPLL CLKOUT to stay active */ - writel(CM_DIV_M2_DPLL_USB, 0x100); + writel(0x100, CM_DIV_M2_DPLL_USB); sr32(CM_DIV_M2_DPLL_USB, 0, 5, dpll_param->m2); sr32(CM_DIV_M2_DPLL_USB, 8, 1, 0x1); sr32(CM_CLKDCOLDO_DPLL_USB, 8, 1, 0x1); @@ -143,7 +143,7 @@ void omap4_configure_usb_dpll(const struct dpll_param *dpll_param) wait_on_value((1 << 0), 1, CM_IDLEST_DPLL_USB, LDELAY); /* force enable the CLKDCOLDO clock */ - writel(CM_CLKDCOLDO_DPLL_USB, 0x100); + writel(0x100, CM_CLKDCOLDO_DPLL_USB); return; } @@ -151,7 +151,7 @@ void omap4_configure_usb_dpll(const struct dpll_param *dpll_param) void omap4_configure_core_dpll_no_lock(const struct dpll_param *param) { /* CORE_CLK=CORE_X2_CLK/2, L3_CLK=CORE_CLK/2, L4_CLK=L3_CLK/2 */ - writel(CM_CLKSEL_CORE, 0x110); + writel(0x110, CM_CLKSEL_CORE); /* Unlock the CORE dpll */ sr32(CM_CLKMODE_DPLL_CORE, 0, 3, PLL_MN_POWER_BYPASS); @@ -205,107 +205,107 @@ void omap4_lock_core_dpll_shadow(const struct dpll_param *param) void omap4_enable_gpio_clocks(void) { - writel(CM_L4PER_GPIO2_CLKCTRL, 0x1); + writel(0x1, CM_L4PER_GPIO2_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO2_CLKCTRL, LDELAY); - writel(CM_L4PER_GPIO3_CLKCTRL, 0x1); + writel(0x1, CM_L4PER_GPIO3_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO3_CLKCTRL, LDELAY); - writel(CM_L4PER_GPIO4_CLKCTRL, 0x1); + writel(0x1, CM_L4PER_GPIO4_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO4_CLKCTRL, LDELAY); - writel(CM_L4PER_GPIO5_CLKCTRL, 0x1); + writel(0x1, CM_L4PER_GPIO5_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO5_CLKCTRL, LDELAY); - writel(CM_L4PER_GPIO6_CLKCTRL, 0x1); + writel(0x1, CM_L4PER_GPIO6_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_GPIO6_CLKCTRL, LDELAY); } void omap4_enable_gpio1_wup_clocks(void) { /* WKUP clocks */ - writel(CM_WKUP_GPIO1_CLKCTRL, 0x1); + writel(0x1, CM_WKUP_GPIO1_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_WKUP_GPIO1_CLKCTRL, LDELAY); } void omap4_enable_all_clocks(void) { /* Enable Ducati clocks */ - writel(CM_DUCATI_DUCATI_CLKCTRL, 0x1); - writel(CM_DUCATI_CLKSTCTRL, 0x2); + writel(0x1, CM_DUCATI_DUCATI_CLKCTRL); + writel(0x2, CM_DUCATI_CLKSTCTRL); wait_on_value((1 << 8), (1 << 8), CM_DUCATI_CLKSTCTRL, LDELAY); /* Enable ivahd and sl2 clocks */ - writel(IVAHD_IVAHD_CLKCTRL, 0x1); - writel(IVAHD_SL2_CLKCTRL, 0x1); - writel(IVAHD_CLKSTCTRL, 0x2); + writel(0x1, IVAHD_IVAHD_CLKCTRL); + writel(0x1, IVAHD_SL2_CLKCTRL); + writel(0x2, IVAHD_CLKSTCTRL); wait_on_value((1 << 8), (1 << 8), IVAHD_CLKSTCTRL, LDELAY); /* Enable Tesla clocks */ - writel(DSP_DSP_CLKCTRL, 0x1); - writel(DSP_CLKSTCTRL, 0x2); + writel(0x1, DSP_DSP_CLKCTRL); + writel(0x2, DSP_CLKSTCTRL); wait_on_value((1 << 8), (1 << 8), DSP_CLKSTCTRL, LDELAY); /* wait for tesla to become accessible */ /* ABE clocks */ - writel(CM1_ABE_CLKSTCTRL, 0x3); - writel(CM1_ABE_AESS_CLKCTRL, 0x2); - writel(CM1_ABE_PDM_CLKCTRL, 0x2); - writel(CM1_ABE_DMIC_CLKCTRL, 0x2); - writel(CM1_ABE_MCASP_CLKCTRL, 0x2); - writel(CM1_ABE_MCBSP1_CLKCTRL, 0x2); - writel(CM1_ABE_MCBSP2_CLKCTRL, 0x2); - writel(CM1_ABE_MCBSP3_CLKCTRL, 0x2); - writel(CM1_ABE_SLIMBUS_CLKCTRL, 0xf02); - writel(CM1_ABE_TIMER5_CLKCTRL, 0x2); - writel(CM1_ABE_TIMER6_CLKCTRL, 0x2); - writel(CM1_ABE_TIMER7_CLKCTRL, 0x2); - writel(CM1_ABE_TIMER8_CLKCTRL, 0x2); - writel(CM1_ABE_WDT3_CLKCTRL, 0x2); + writel(0x3, CM1_ABE_CLKSTCTRL); + writel(0x2, CM1_ABE_AESS_CLKCTRL); + writel(0x2, CM1_ABE_PDM_CLKCTRL); + writel(0x2, CM1_ABE_DMIC_CLKCTRL); + writel(0x2, CM1_ABE_MCASP_CLKCTRL); + writel(0x2, CM1_ABE_MCBSP1_CLKCTRL); + writel(0x2, CM1_ABE_MCBSP2_CLKCTRL); + writel(0x2, CM1_ABE_MCBSP3_CLKCTRL); + writel(0xf02, CM1_ABE_SLIMBUS_CLKCTRL); + writel(0x2, CM1_ABE_TIMER5_CLKCTRL); + writel(0x2, CM1_ABE_TIMER6_CLKCTRL); + writel(0x2, CM1_ABE_TIMER7_CLKCTRL); + writel(0x2, CM1_ABE_TIMER8_CLKCTRL); + writel(0x2, CM1_ABE_WDT3_CLKCTRL); /* Disable sleep transitions */ - writel(CM1_ABE_CLKSTCTRL, 0x0); + writel(0x0, CM1_ABE_CLKSTCTRL); /* L4PER clocks */ - writel(CM_L4PER_CLKSTCTRL, 0x2); - writel(CM_L4PER_DMTIMER10_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_CLKSTCTRL); + writel(0x2, CM_L4PER_DMTIMER10_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_DMTIMER10_CLKCTRL, LDELAY); - writel(CM_L4PER_DMTIMER11_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_DMTIMER11_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_DMTIMER11_CLKCTRL, LDELAY); - writel(CM_L4PER_DMTIMER2_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_DMTIMER2_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_DMTIMER2_CLKCTRL, LDELAY); - writel(CM_L4PER_DMTIMER3_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_DMTIMER3_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_DMTIMER3_CLKCTRL, LDELAY); - writel(CM_L4PER_DMTIMER4_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_DMTIMER4_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_DMTIMER4_CLKCTRL, LDELAY); - writel(CM_L4PER_DMTIMER9_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_DMTIMER9_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_DMTIMER9_CLKCTRL, LDELAY); /* GPIO clocks */ omap4_enable_gpio_clocks(); - writel(CM_L4PER_HDQ1W_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_HDQ1W_CLKCTRL); /* I2C clocks */ - writel(CM_L4PER_I2C1_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_I2C1_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_I2C1_CLKCTRL, LDELAY); - writel(CM_L4PER_I2C2_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_I2C2_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_I2C2_CLKCTRL, LDELAY); - writel(CM_L4PER_I2C3_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_I2C3_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_I2C3_CLKCTRL, LDELAY); - writel(CM_L4PER_I2C4_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_I2C4_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_I2C4_CLKCTRL, LDELAY); - writel(CM_L4PER_MCBSP4_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_MCBSP4_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_MCBSP4_CLKCTRL, LDELAY); /* MCSPI clocks */ - writel(CM_L4PER_MCSPI1_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_MCSPI1_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_MCSPI1_CLKCTRL, LDELAY); - writel(CM_L4PER_MCSPI2_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_MCSPI2_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_MCSPI2_CLKCTRL, LDELAY); - writel(CM_L4PER_MCSPI3_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_MCSPI3_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_MCSPI3_CLKCTRL, LDELAY); - writel(CM_L4PER_MCSPI4_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_MCSPI4_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_MCSPI4_CLKCTRL, LDELAY); /* MMC clocks */ @@ -313,86 +313,86 @@ void omap4_enable_all_clocks(void) sr32(CM_L3INIT_HSMMC1_CLKCTRL, 24, 1, 0x1); sr32(CM_L3INIT_HSMMC2_CLKCTRL, 0, 2, 0x2); sr32(CM_L3INIT_HSMMC2_CLKCTRL, 24, 1, 0x1); - writel(CM_L4PER_MMCSD3_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_MMCSD3_CLKCTRL); wait_on_value((1 << 18)|(1 << 17)|(1 << 16), 0, CM_L4PER_MMCSD3_CLKCTRL, LDELAY); - writel(CM_L4PER_MMCSD4_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_MMCSD4_CLKCTRL); wait_on_value((1 << 18)|(1 << 17)|(1 << 16), 0, CM_L4PER_MMCSD4_CLKCTRL, LDELAY); - writel(CM_L4PER_MMCSD5_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_MMCSD5_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_MMCSD5_CLKCTRL, LDELAY); /* UART clocks */ - writel(CM_L4PER_UART1_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_UART1_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_UART1_CLKCTRL, LDELAY); - writel(CM_L4PER_UART2_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_UART2_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_UART2_CLKCTRL, LDELAY); - writel(CM_L4PER_UART3_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_UART3_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_UART3_CLKCTRL, LDELAY); - writel(CM_L4PER_UART4_CLKCTRL, 0x2); + writel(0x2, CM_L4PER_UART4_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L4PER_UART4_CLKCTRL, LDELAY); /* WKUP clocks */ omap4_enable_gpio1_wup_clocks(); - writel(CM_WKUP_TIMER1_CLKCTRL, 0x01000002); + writel(0x01000002, CM_WKUP_TIMER1_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_WKUP_TIMER1_CLKCTRL, LDELAY); - writel(CM_WKUP_KEYBOARD_CLKCTRL, 0x2); + writel(0x2, CM_WKUP_KEYBOARD_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_WKUP_KEYBOARD_CLKCTRL, LDELAY); - writel(CM_SDMA_CLKSTCTRL, 0x0); - writel(CM_MEMIF_CLKSTCTRL, 0x3); - writel(CM_MEMIF_EMIF_1_CLKCTRL, 0x1); + writel(0x0, CM_SDMA_CLKSTCTRL); + writel(0x3, CM_MEMIF_CLKSTCTRL); + writel(0x1, CM_MEMIF_EMIF_1_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_MEMIF_EMIF_1_CLKCTRL, LDELAY); - writel(CM_MEMIF_EMIF_2_CLKCTRL, 0x1); + writel(0x1, CM_MEMIF_EMIF_2_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_MEMIF_EMIF_2_CLKCTRL, LDELAY); - writel(CM_D2D_CLKSTCTRL, 0x3); - writel(CM_L3_2_GPMC_CLKCTRL, 0x1); + writel(0x3, CM_D2D_CLKSTCTRL); + writel(0x1, CM_L3_2_GPMC_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L3_2_GPMC_CLKCTRL, LDELAY); - writel(CM_L3INSTR_L3_3_CLKCTRL, 0x1); + writel(0x1, CM_L3INSTR_L3_3_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L3INSTR_L3_3_CLKCTRL, LDELAY); - writel(CM_L3INSTR_L3_INSTR_CLKCTRL, 0x1); + writel(0x1, CM_L3INSTR_L3_INSTR_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L3INSTR_L3_INSTR_CLKCTRL, LDELAY); - writel(CM_L3INSTR_OCP_WP1_CLKCTRL, 0x1); + writel(0x1, CM_L3INSTR_OCP_WP1_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_L3INSTR_OCP_WP1_CLKCTRL, LDELAY); /* WDT clocks */ - writel(CM_WKUP_WDT2_CLKCTRL, 0x2); + writel(0x2, CM_WKUP_WDT2_CLKCTRL); wait_on_value((1 << 17)|(1 << 16), 0, CM_WKUP_WDT2_CLKCTRL, LDELAY); /* Enable Camera clocks */ - writel(CM_CAM_CLKSTCTRL, 0x3); - writel(CM_CAM_ISS_CLKCTRL, 0x102); - writel(CM_CAM_FDIF_CLKCTRL, 0x2); - writel(CM_CAM_CLKSTCTRL, 0x0); + writel(0x3, CM_CAM_CLKSTCTRL); + writel(0x102, CM_CAM_ISS_CLKCTRL); + writel(0x2, CM_CAM_FDIF_CLKCTRL); + writel(0x0, CM_CAM_CLKSTCTRL); /* Enable DSS clocks */ /* PM_DSS_PWRSTCTRL ON State and LogicState = 1 (Retention) */ __raw_writel(7, 0x4A307100); /* DSS_PRM */ - writel(CM_DSS_CLKSTCTRL, 0x2); - writel(CM_DSS_DSS_CLKCTRL, 0xf02); - writel(CM_DSS_DEISS_CLKCTRL, 0x2); + writel(0x2, CM_DSS_CLKSTCTRL); + writel(0xf02, CM_DSS_DSS_CLKCTRL); + writel(0x2, CM_DSS_DEISS_CLKCTRL); /* Check for DSS Clocks */ while ((__raw_readl(0x4A009100) & 0xF00) != 0xE00) ; /* Set HW_AUTO transition mode */ - writel(CM_DSS_CLKSTCTRL, 0x3); + writel(0x3, CM_DSS_CLKSTCTRL); /* Enable SGX clocks */ - writel(CM_SGX_CLKSTCTRL, 0x2); - writel(CM_SGX_SGX_CLKCTRL, 0x2); + writel(0x2, CM_SGX_CLKSTCTRL); + writel(0x2, CM_SGX_SGX_CLKCTRL); /* Check for SGX FCLK and ICLK */ while (__raw_readl(0x4A009200) != 0x302) ; /* Enable hsi/unipro/usb clocks */ - writel(CM_L3INIT_HSI_CLKCTRL, 0x1); - writel(CM_L3INIT_UNIPRO1_CLKCTRL, 0x2); - writel(CM_L3INIT_HSUSBHOST_CLKCTRL, 0x2); - writel(CM_L3INIT_HSUSBOTG_CLKCTRL, 0x1); - writel(CM_L3INIT_HSUSBTLL_CLKCTRL, 0x1); - writel(CM_L3INIT_FSUSB_CLKCTRL, 0x2); + writel(0x1, CM_L3INIT_HSI_CLKCTRL); + writel(0x2, CM_L3INIT_UNIPRO1_CLKCTRL); + writel(0x2, CM_L3INIT_HSUSBHOST_CLKCTRL); + writel(0x1, CM_L3INIT_HSUSBOTG_CLKCTRL); + writel(0x1, CM_L3INIT_HSUSBTLL_CLKCTRL); + writel(0x2, CM_L3INIT_FSUSB_CLKCTRL); /* enable the 32K, 48M optional clocks and enable the module */ - writel(CM_L3INIT_USBPHY_CLKCTRL, 0x301); + writel(0x301, CM_L3INIT_USBPHY_CLKCTRL); } void omap4_do_scale_tps62361(u32 reg, u32 volt_mv) diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c index 64b0024cce..6da5cae567 100644 --- a/arch/arm/mach-omap/omap4_generic.c +++ b/arch/arm/mach-omap/omap4_generic.c @@ -499,20 +499,18 @@ static int omap_vector_init(void) return 0; } -#define OMAP4_TRACING_VECTOR3 0x4030d048 - static int omap4_bootsource(void) { - enum bootsource src = BOOTSOURCE_UNKNOWN; + enum bootsource src; switch (omap_bootinfo[2] & 0xFF) { - case 0x03: + case OMAP44XX_SAR_BOOT_NAND: src = BOOTSOURCE_NAND; break; - case 0x05: + case OMAP44XX_SAR_BOOT_MMC1: src = BOOTSOURCE_MMC; break; - case 0x20: + case OMAP44XX_SAR_BOOT_USB_1: src = BOOTSOURCE_USB; break; default: diff --git a/arch/mips/Makefile b/arch/mips/Makefile index dc0fe56d68..62e1acf658 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -143,3 +143,46 @@ dtbs: scripts KBUILD_DTBS := dtbs KBUILD_IMAGE ?= $(KBUILD_BINARY) + +##### +# Generate asm-offsets.h +# + +offsets-file := include/generated/asm-offsets.h + +always += $(offsets-file) +targets += $(offsets-file) +targets += arch/$(SRCARCH)/lib/asm-offsets.s + +# Default sed regexp - multiline due to syntax constraints +define sed-y + "/^->/{s:->#\(.*\):/* \1 */:; \ + s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \ + s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \ + s:->::; p;}" +endef + +quiet_cmd_offsets = GEN $@ +define cmd_offsets + (set -e; \ + echo "#ifndef __ASM_OFFSETS_H__"; \ + echo "#define __ASM_OFFSETS_H__"; \ + echo "/*"; \ + echo " * DO NOT MODIFY."; \ + echo " *"; \ + echo " * This file was generated by Kbuild"; \ + echo " *"; \ + echo " */"; \ + echo ""; \ + sed -ne $(sed-y) $<; \ + echo ""; \ + echo "#endif" ) > $@ +endef + +# We use internal kbuild rules to avoid the "is up to date" message from make +arch/$(SRCARCH)/lib/asm-offsets.s: arch/$(SRCARCH)/lib/asm-offsets.c FORCE + $(Q)mkdir -p $(dir $@) + $(call if_changed_dep,cc_s_c) + +$(obj)/$(offsets-file): arch/$(SRCARCH)/lib/asm-offsets.s Makefile + $(call cmd,offsets) diff --git a/arch/mips/include/asm/asm-offsets.h b/arch/mips/include/asm/asm-offsets.h new file mode 100644 index 0000000000..d370ee36a1 --- /dev/null +++ b/arch/mips/include/asm/asm-offsets.h @@ -0,0 +1 @@ +#include <generated/asm-offsets.h> diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h new file mode 100644 index 0000000000..211834d8f8 --- /dev/null +++ b/arch/mips/include/asm/ptrace.h @@ -0,0 +1,35 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 by Ralf Baechle + * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + */ + +#ifndef _ASM_PTRACE_H +#define _ASM_PTRACE_H + +/* + * This struct defines the way the registers are stored on the stack during an + * exception. As usual the registers k0/k1 aren't being saved. + */ +struct pt_regs { +#ifdef CONFIG_32BIT + /* Pad bytes for argument save space on the stack. */ + unsigned long pad0[6]; +#endif + + /* Saved main processor registers. */ + unsigned long regs[32]; + + /* Saved special registers. */ + unsigned long cp0_status; + unsigned long hi; + unsigned long lo; + unsigned long cp0_badvaddr; + unsigned long cp0_cause; + unsigned long cp0_epc; +} __attribute__ ((aligned (8))); + +#endif /* _ASM_PTRACE_H */ diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h new file mode 100644 index 0000000000..0266ec693e --- /dev/null +++ b/arch/mips/include/asm/stackframe.h @@ -0,0 +1,105 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 1994, 95, 96, 99, 2001 Ralf Baechle + * Copyright (C) 1994, 1995, 1996 Paul M. Antoine. + * Copyright (C) 1999 Silicon Graphics, Inc. + * Copyright (C) 2007 Maciej W. Rozycki + */ +#ifndef _ASM_STACKFRAME_H +#define _ASM_STACKFRAME_H + +#include <asm/asm.h> +#include <asm/mipsregs.h> +#include <asm/asm-offsets.h> + + .macro SAVE_AT + .set push + .set noat + LONG_S $1, PT_R1(sp) + .set pop + .endm + + .macro SAVE_TEMP + mfhi v1 +#ifdef CONFIG_32BIT + LONG_S $8, PT_R8(sp) + LONG_S $9, PT_R9(sp) +#endif + LONG_S $10, PT_R10(sp) + LONG_S $11, PT_R11(sp) + LONG_S $12, PT_R12(sp) + + LONG_S v1, PT_HI(sp) + mflo v1 + + LONG_S $13, PT_R13(sp) + LONG_S $14, PT_R14(sp) + LONG_S $15, PT_R15(sp) + LONG_S $24, PT_R24(sp) + + LONG_S v1, PT_LO(sp) + + .endm + + .macro SAVE_STATIC + LONG_S $16, PT_R16(sp) + LONG_S $17, PT_R17(sp) + LONG_S $18, PT_R18(sp) + LONG_S $19, PT_R19(sp) + LONG_S $20, PT_R20(sp) + LONG_S $21, PT_R21(sp) + LONG_S $22, PT_R22(sp) + LONG_S $23, PT_R23(sp) + LONG_S $30, PT_R30(sp) + .endm + + .macro SAVE_SOME + .set push + .set noat + .set reorder + .set at=k0 + move k1, sp + PTR_SUBU k1, PT_SIZE + .set noat + move k0, sp + move sp, k1 + LONG_S k0, PT_R29(sp) + LONG_S $3, PT_R3(sp) + /* + * You might think that you don't need to save $0, + * but the FPU emulator and gdb remote debug stub + * need it to operate correctly + */ + LONG_S $0, PT_R0(sp) + mfc0 v1, CP0_STATUS + LONG_S $2, PT_R2(sp) + LONG_S v1, PT_STATUS(sp) + LONG_S $4, PT_R4(sp) + mfc0 v1, CP0_CAUSE + LONG_S $5, PT_R5(sp) + LONG_S v1, PT_CAUSE(sp) + LONG_S $6, PT_R6(sp) + MFC0 v1, CP0_EPC + LONG_S $7, PT_R7(sp) +#ifdef CONFIG_64BIT + LONG_S $8, PT_R8(sp) + LONG_S $9, PT_R9(sp) +#endif + LONG_S v1, PT_EPC(sp) + LONG_S $25, PT_R25(sp) + LONG_S $28, PT_R28(sp) + LONG_S $31, PT_R31(sp) + .set pop + .endm + + .macro SAVE_ALL + SAVE_SOME + SAVE_AT + SAVE_TEMP + SAVE_STATIC + .endm + +#endif /* _ASM_STACKFRAME_H */ diff --git a/arch/mips/lib/asm-offsets.c b/arch/mips/lib/asm-offsets.c new file mode 100644 index 0000000000..457bc8ab7c --- /dev/null +++ b/arch/mips/lib/asm-offsets.c @@ -0,0 +1,61 @@ +/* + * offset.c: Calculate pt_regs and task_struct offsets. + * + * Copyright (C) 1996 David S. Miller + * Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003 Ralf Baechle + * Copyright (C) 1999, 2000 Silicon Graphics, Inc. + * + * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com + * Copyright (C) 2000 MIPS Technologies, Inc. + */ + +#include <linux/kbuild.h> +#include <linux/stddef.h> +#include <asm/ptrace.h> + +void output_ptreg_defines(void); + +void output_ptreg_defines(void) +{ + COMMENT("MIPS pt_regs offsets."); + OFFSET(PT_R0, pt_regs, regs[0]); + OFFSET(PT_R1, pt_regs, regs[1]); + OFFSET(PT_R2, pt_regs, regs[2]); + OFFSET(PT_R3, pt_regs, regs[3]); + OFFSET(PT_R4, pt_regs, regs[4]); + OFFSET(PT_R5, pt_regs, regs[5]); + OFFSET(PT_R6, pt_regs, regs[6]); + OFFSET(PT_R7, pt_regs, regs[7]); + OFFSET(PT_R8, pt_regs, regs[8]); + OFFSET(PT_R9, pt_regs, regs[9]); + OFFSET(PT_R10, pt_regs, regs[10]); + OFFSET(PT_R11, pt_regs, regs[11]); + OFFSET(PT_R12, pt_regs, regs[12]); + OFFSET(PT_R13, pt_regs, regs[13]); + OFFSET(PT_R14, pt_regs, regs[14]); + OFFSET(PT_R15, pt_regs, regs[15]); + OFFSET(PT_R16, pt_regs, regs[16]); + OFFSET(PT_R17, pt_regs, regs[17]); + OFFSET(PT_R18, pt_regs, regs[18]); + OFFSET(PT_R19, pt_regs, regs[19]); + OFFSET(PT_R20, pt_regs, regs[20]); + OFFSET(PT_R21, pt_regs, regs[21]); + OFFSET(PT_R22, pt_regs, regs[22]); + OFFSET(PT_R23, pt_regs, regs[23]); + OFFSET(PT_R24, pt_regs, regs[24]); + OFFSET(PT_R25, pt_regs, regs[25]); + OFFSET(PT_R26, pt_regs, regs[26]); + OFFSET(PT_R27, pt_regs, regs[27]); + OFFSET(PT_R28, pt_regs, regs[28]); + OFFSET(PT_R29, pt_regs, regs[29]); + OFFSET(PT_R30, pt_regs, regs[30]); + OFFSET(PT_R31, pt_regs, regs[31]); + OFFSET(PT_LO, pt_regs, lo); + OFFSET(PT_HI, pt_regs, hi); + OFFSET(PT_EPC, pt_regs, cp0_epc); + OFFSET(PT_BVADDR, pt_regs, cp0_badvaddr); + OFFSET(PT_STATUS, pt_regs, cp0_status); + OFFSET(PT_CAUSE, pt_regs, cp0_cause); + DEFINE(PT_SIZE, sizeof(struct pt_regs)); + BLANK(); +} diff --git a/arch/mips/lib/genex.S b/arch/mips/lib/genex.S index d6f65a2ca4..8941714af9 100644 --- a/arch/mips/lib/genex.S +++ b/arch/mips/lib/genex.S @@ -1,6 +1,7 @@ #include <asm/asm.h> #include <asm/regdef.h> #include <asm/mipsregs.h> +#include <asm/stackframe.h> .text .set macro @@ -10,6 +11,7 @@ /* Exception vector */ NESTED(handle_reserved, 0, sp) + SAVE_ALL la k0, barebox_exc_handler jal k0 move a0, sp diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c index 4e167cc9f4..0a5914ea81 100644 --- a/arch/mips/lib/traps.c +++ b/arch/mips/lib/traps.c @@ -1,8 +1,9 @@ #include <common.h> #include <asm/mipsregs.h> +#include <asm/ptrace.h> -void barebox_exc_handler(void *regs); +void barebox_exc_handler(const struct pt_regs *regs); /* * Trap codes from OpenBSD trap.h @@ -95,13 +96,44 @@ static char *get_exc_name(u32 cause) return "unknown exception"; } -void barebox_exc_handler(void *regs) +void barebox_exc_handler(const struct pt_regs *regs) { - printf("\nOoops, %s!\n", get_exc_name(read_c0_cause())); - printf("EPC = 0x%08x\n", read_c0_epc()); - printf("CP0_STATUS = 0x%08x\n", read_c0_status()); - printf("CP0_CAUSE = 0x%08x\n", read_c0_cause()); - printf("CP0_CONFIG = 0x%08x\n\n", read_c0_config()); + const int field = 2 * sizeof(unsigned long); + unsigned int cause = regs->cp0_cause; + int i; + + printf("\nOoops, %s!\n\n", get_exc_name(cause)); + + /* + * Saved main processor registers + */ + for (i = 0; i < 32; ) { + if ((i % 4) == 0) + printf("$%2d :", i); + if (i == 0) + printf(" %0*lx", field, 0UL); + else if (i == 26 || i == 27) + printf(" %*s", field, ""); + else + printf(" %0*lx", field, regs->regs[i]); + + i++; + if ((i % 4) == 0) + printf("\n"); + } + + printf("Hi : %0*lx\n", field, regs->hi); + printf("Lo : %0*lx\n", field, regs->lo); + + /* + * Saved cp0 registers + */ + printf("epc : %0*lx\n", field, regs->cp0_epc); + printf("ra : %0*lx\n", field, regs->regs[31]); + + printf("Status: %08x\n", (uint32_t) regs->cp0_status); + printf("Cause : %08x\n", cause); + printf("Config: %08x\n\n", read_c0_config()); hang(); } diff --git a/commands/Kconfig b/commands/Kconfig index 9738ec4630..1e07b5b7ac 100644 --- a/commands/Kconfig +++ b/commands/Kconfig @@ -559,7 +559,7 @@ config CMD_OF_NODE select OFTREE prompt "of_node" help - The of_property command allows adding and removing devicetree nodes. + The of_node command allows adding and removing devicetree nodes. endmenu diff --git a/commands/boot.c b/commands/boot.c index 91766e03be..c4b49a9035 100644 --- a/commands/boot.c +++ b/commands/boot.c @@ -216,7 +216,9 @@ static struct blspec *bootentries_collect(char *entries[], int num_entries) int i; blspec = blspec_alloc(); - blspec->menu->display = asprintf("boot"); + + if (IS_ENABLED(CONFIG_MENU)) + blspec->menu->display = asprintf("boot"); if (!num_entries) bootscript_scan_path(blspec, "/env/boot"); diff --git a/common/Kconfig b/common/Kconfig index b511645ccc..99a24a0f8f 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -456,6 +456,7 @@ config BLSPEC config KERNEL_INSTALL_TARGET bool + depends on !SANDBOX prompt "Build kernel-install utility for the target" help Enable this to compile the kernel-install script using the cross @@ -613,6 +614,7 @@ config DEFAULT_ENVIRONMENT_PATH config BAREBOXENV_TARGET bool + depends on !SANDBOX prompt "build bareboxenv tool for target" help 'bareboxenv' is a tool to access the barebox environment from a running Linux diff --git a/common/blspec.c b/common/blspec.c index 095809b470..2244d5a8a8 100644 --- a/common/blspec.c +++ b/common/blspec.c @@ -135,8 +135,7 @@ static int blspec_have_entry(struct blspec *blspec, const char *path) * * Given a root path collects all blspec entries found under /blspec/entries/. * - * returns 0 if at least one entry could be successfully loaded, negative - * error value otherwise. + * returns the number of entries found or a negative error value otherwise. */ int blspec_scan_directory(struct blspec *blspec, const char *root) { diff --git a/common/hush.c b/common/hush.c index bf1d9e6fd7..abe2ceda07 100644 --- a/common/hush.c +++ b/common/hush.c @@ -132,7 +132,6 @@ extern int do_bootd(int flag, int argc, char *argv[]); /* do_bootd */ #define EXIT_SUCCESS 0 #define EOF -1 -#define syntax() syntax_err() #define xstrdup strdup #define error_msg printf @@ -254,7 +253,7 @@ typedef struct { * available? Where is it documented? */ struct in_str { const char *p; - int __promptme; + int interrupt; int promptmode; int (*get) (struct in_str *); int (*peek) (struct in_str *); @@ -265,8 +264,27 @@ struct in_str { #define final_printf debug -static void syntax_err(void) { - printf("syntax error\n"); +static void syntax(void) +{ + printf("syntax error\n"); +} + +static void syntaxf(const char *fmt, ...) +{ + va_list args; + + printf("syntax error: "); + + va_start(args, fmt); + + vprintf(fmt, args); + + va_end(args); +} + +static void syntax_unexpected_token(const char *token) +{ + syntaxf("unexpected token `%s'\n", token); } /* o_string manipulation: */ @@ -420,17 +438,16 @@ static void get_user_input(struct in_str *i) { int n; static char the_command[CONFIG_CBSIZE]; + char *prompt; - i->__promptme = 1; - - if (i->promptmode == 1) { - n = readline(getprompt(), console_buffer, CONFIG_CBSIZE); - } else { - n = readline(CONFIG_PROMPT_HUSH_PS2, console_buffer, CONFIG_CBSIZE); - } + if (i->promptmode == 1) + prompt = getprompt(); + else + prompt = CONFIG_PROMPT_HUSH_PS2; + n = readline(prompt, console_buffer, CONFIG_CBSIZE); if (n == -1 ) { - i->__promptme = 0; + i->interrupt = 1; n = 0; } @@ -440,25 +457,27 @@ static void get_user_input(struct in_str *i) if (i->promptmode == 1) { strcpy(the_command,console_buffer); i->p = the_command; - } else { - if (console_buffer[0] != '\n') { - if (strlen(the_command) + strlen(console_buffer) - < CONFIG_CBSIZE) { - n = strlen(the_command); - the_command[n - 1] = ' '; - strcpy(&the_command[n], console_buffer); - } - else { - the_command[0] = '\n'; - the_command[1] = '\0'; - } - } - if (i->__promptme == 0) { + return; + } + + if (console_buffer[0] != '\n') { + if (strlen(the_command) + strlen(console_buffer) + < CONFIG_CBSIZE) { + n = strlen(the_command); + the_command[n - 1] = ' '; + strcpy(&the_command[n], console_buffer); + } else { the_command[0] = '\n'; the_command[1] = '\0'; } - i->p = console_buffer; } + + if (i->interrupt) { + the_command[0] = '\n'; + the_command[1] = '\0'; + } + + i->p = console_buffer; } /* This is the magic location that prints prompts @@ -468,21 +487,23 @@ static int file_get(struct in_str *i) int ch; ch = 0; + /* If there is data waiting, eat it up */ - if (i->p && *i->p) { + if (i->p && *i->p) + return *i->p++; + + /* need to double check i->file because we might be doing something + * more complicated by now, like sourcing or substituting. */ + while (!i->p || strlen(i->p) == 0 ) + get_user_input(i); + + i->promptmode = 2; + + if (i->p && *i->p) ch = *i->p++; - } else { - /* need to double check i->file because we might be doing something - * more complicated by now, like sourcing or substituting. */ - while (!i->p || strlen(i->p) == 0 ) { - get_user_input(i); - } - i->promptmode = 2; - if (i->p && *i->p) { - ch = *i->p++; - } - debug("%s: got a %d\n", __func__, ch); - } + + debug("%s: got a %d\n", __func__, ch); + return ch; } @@ -498,7 +519,7 @@ static void setup_file_in_str(struct in_str *i) { i->peek = file_peek; i->get = file_get; - i->__promptme = 1; + i->interrupt = 0; i->promptmode = 1; i->p = NULL; } @@ -507,7 +528,7 @@ static void setup_string_in_str(struct in_str *i, const char *s) { i->peek = static_peek; i->get = static_get; - i->__promptme = 1; + i->interrupt = 0; i->promptmode = 1; i->p = s; } @@ -1171,59 +1192,61 @@ static struct reserved_combo reserved_list[] = { { "do", RES_DO, FLAG_DONE }, { "done", RES_DONE, FLAG_END } }; -#define NRES (sizeof(reserved_list)/sizeof(struct reserved_combo)) static int reserved_word(o_string *dest, struct p_context *ctx) { struct reserved_combo *r; + int i; - for (r = reserved_list; r < reserved_list + NRES; r++) { - if (strcmp(dest->data, r->literal) == 0) { + for (i = 0; i < ARRAY_SIZE(reserved_list); i++) { + r = &reserved_list[i]; - debug("found reserved word %s, code %d\n",r->literal,r->code); + if (strcmp(dest->data, r->literal)) + continue; - if (r->flag & FLAG_START) { - struct p_context *new = xmalloc(sizeof(struct p_context)); + debug("found reserved word %s, code %d\n",r->literal,r->code); - debug("push stack\n"); + if (r->flag & FLAG_START) { + struct p_context *new = xmalloc(sizeof(struct p_context)); - if (ctx->w == RES_IN || ctx->w == RES_FOR) { - syntax(); - free(new); - ctx->w = RES_SNTX; - b_reset(dest); + debug("push stack\n"); - return 1; - } - *new = *ctx; /* physical copy */ - initialize_context(ctx); - ctx->stack = new; - } else if (ctx->w == RES_NONE || !(ctx->old_flag & (1 << r->code))) { + if (ctx->w == RES_IN || ctx->w == RES_FOR) { syntax(); + free(new); ctx->w = RES_SNTX; b_reset(dest); + return 1; } + *new = *ctx; /* physical copy */ + initialize_context(ctx); + ctx->stack = new; + } else if (ctx->w == RES_NONE || !(ctx->old_flag & (1 << r->code))) { + syntax_unexpected_token(r->literal); + ctx->w = RES_SNTX; + b_reset(dest); + return 1; + } - ctx->w = r->code; - ctx->old_flag = r->flag; + ctx->w = r->code; + ctx->old_flag = r->flag; - if (ctx->old_flag & FLAG_END) { - struct p_context *old; + if (ctx->old_flag & FLAG_END) { + struct p_context *old; - debug("pop stack\n"); + debug("pop stack\n"); - done_pipe(ctx,PIPE_SEQ); - old = ctx->stack; - old->child->group = ctx->list_head; - *ctx = *old; /* physical copy */ - free(old); - } + done_pipe(ctx,PIPE_SEQ); + old = ctx->stack; + old->child->group = ctx->list_head; + *ctx = *old; /* physical copy */ + free(old); + } - b_reset(dest); + b_reset(dest); - return 1; - } + return 1; } return 0; @@ -1465,7 +1488,7 @@ static int parse_stream(o_string *dest, struct p_context *ctx, while ((ch = b_getch(input)) != EOF) { m = map[ch]; - if (input->__promptme == 0) + if (input->interrupt) return 1; next = (ch == '\n') ? 0 : b_peek(input); @@ -1523,7 +1546,7 @@ static int parse_stream(o_string *dest, struct p_context *ctx, dest->nonnull = 1; b_addchr(dest, '\''); while (ch = b_getch(input), ch != EOF && ch != '\'') { - if (input->__promptme == 0) + if (input->interrupt) return 1; b_addchr(dest,ch); } @@ -1548,7 +1571,7 @@ static int parse_stream(o_string *dest, struct p_context *ctx, b_getch(input); done_pipe(ctx, PIPE_AND); } else { - syntax_err(); + syntax(); return 1; } break; @@ -1561,7 +1584,7 @@ static int parse_stream(o_string *dest, struct p_context *ctx, /* we could pick up a file descriptor choice here * with redirect_opt_num(), but bash doesn't do it. * "echo foo 2| cat" yields "foo 2". */ - syntax_err(); + syntax(); return 1; } break; @@ -1655,7 +1678,7 @@ static int parse_stream_outer(struct p_context *ctx, struct in_str *inp, int fla free(ctx->stack); b_reset(&temp); } - if (inp->__promptme == 0) + if (inp->interrupt) printf("<INTERRUPT>\n"); temp.nonnull = 0; temp.quote = 0; @@ -1853,14 +1876,17 @@ int run_shell(void) int rcode; struct in_str input; struct p_context ctx; + int exit = 0; do { setup_file_in_str(&input); rcode = parse_stream_outer(&ctx, &input, FLAG_PARSE_SEMICOLON); - if (rcode < -1) + if (rcode < -1) { + exit = 1; rcode = -rcode - 2; + } release_context(&ctx); - } while (!input.__promptme); + } while (!exit); return rcode; } diff --git a/drivers/ata/pata-imx.c b/drivers/ata/pata-imx.c index fd3a1cbfca..7f9e39b503 100644 --- a/drivers/ata/pata-imx.c +++ b/drivers/ata/pata-imx.c @@ -214,6 +214,8 @@ out_free: static __maybe_unused struct of_device_id imx_pata_dt_ids[] = { { .compatible = "fsl,imx27-pata", + }, { + /* sentinel */ }, }; diff --git a/drivers/clk/clk-fixed.c b/drivers/clk/clk-fixed.c index e5d36b4ffa..3a38865fbe 100644 --- a/drivers/clk/clk-fixed.c +++ b/drivers/clk/clk-fixed.c @@ -54,3 +54,26 @@ struct clk *clk_fixed(const char *name, int rate) return &fix->clk; } + +#if defined(CONFIG_OFTREE) && defined(CONFIG_COMMON_CLK_OF_PROVIDER) +/** + * of_fixed_clk_setup() - Setup function for simple fixed rate clock + */ +static int of_fixed_clk_setup(struct device_node *node) +{ + struct clk *clk; + const char *clk_name = node->name; + u32 rate; + + if (of_property_read_u32(node, "clock-frequency", &rate)) + return -EINVAL; + + of_property_read_string(node, "clock-output-names", &clk_name); + + clk = clk_fixed(clk_name, rate); + if (IS_ERR(clk)) + return IS_ERR(clk); + return of_clk_add_provider(node, of_clk_src_simple_get, clk); +} +CLK_OF_DECLARE(fixed_clk, "fixed-clock", of_fixed_clk_setup); +#endif diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 5942e29c48..31d73c028c 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -271,6 +271,10 @@ struct of_clk_provider { void *data; }; +extern struct of_device_id __clk_of_table_start[]; +const struct of_device_id __clk_of_table_sentinel + __attribute__ ((unused,section (".__clk_of_table_end"))); + static LIST_HEAD(of_clk_providers); struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, @@ -355,6 +359,39 @@ struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec) return clk; } + +/** + * of_clk_init() - Scan and init clock providers from the DT + * @root: parent of the first level to probe or NULL for the root of the tree + * @matches: array of compatible values and init functions for providers. + * + * This function scans the device tree for matching clock providers and + * calls their initialization functions + * + * Returns 0 on success, < 0 on failure. + */ +int of_clk_init(struct device_node *root, const struct of_device_id *matches) +{ + const struct of_device_id *match; + int rc; + + if (!root) + root = of_find_node_by_path("/"); + if (!root) + return -EINVAL; + if (!matches) + matches = __clk_of_table_start; + + for_each_matching_node_and_match(root, matches, &match) { + of_clk_init_cb_t clk_init_cb = (of_clk_init_cb_t)match->data; + rc = clk_init_cb(root); + if (rc) + pr_err("%s: failed to init clock for %s: %d\n", + __func__, root->full_name, rc); + } + + return 0; +} #endif static void dump_one(struct clk *clk, int verbose, int indent) diff --git a/drivers/gpio/gpio-dw.c b/drivers/gpio/gpio-dw.c index 791488a19d..e46cc8e129 100644 --- a/drivers/gpio/gpio-dw.c +++ b/drivers/gpio/gpio-dw.c @@ -90,9 +90,18 @@ static int dw_gpio_direction_output(struct gpio_chip *gc, return 0; } +static int dw_gpio_get_direction(struct gpio_chip *gc, unsigned offset) +{ + struct dw_gpio_instance *chip = to_dw_gpio(gc); + + return (readl(chip->regs + DW_GPIO_DDR) & (1 << offset)) ? + GPIOF_DIR_OUT : GPIOF_DIR_IN; +} + static struct gpio_ops imx_gpio_ops = { .direction_input = dw_gpio_direction_input, .direction_output = dw_gpio_direction_output, + .get_direction = dw_gpio_get_direction, .get = dw_gpio_get, .set = dw_gpio_set, }; diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index ca6e8adab4..cafef907ef 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -85,6 +85,72 @@ void gpio_free(unsigned gpio) free(gi->label); } +/** + * gpio_request_one - request a single GPIO with initial configuration + * @gpio: the GPIO number + * @flags: GPIO configuration as specified by GPIOF_* + * @label: a literal description string of this GPIO + */ +int gpio_request_one(unsigned gpio, unsigned long flags, const char *label) +{ + int err; + + err = gpio_request(gpio, label); + if (err) + return err; + + if (flags & GPIOF_DIR_IN) + err = gpio_direction_input(gpio); + else + err = gpio_direction_output(gpio, + (flags & GPIOF_INIT_HIGH) ? 1 : 0); + + if (err) + goto free_gpio; + + return 0; + + free_gpio: + gpio_free(gpio); + return err; +} +EXPORT_SYMBOL_GPL(gpio_request_one); + +/** + * gpio_request_array - request multiple GPIOs in a single call + * @array: array of the 'struct gpio' + * @num: how many GPIOs in the array + */ +int gpio_request_array(const struct gpio *array, size_t num) +{ + int i, err; + + for (i = 0; i < num; i++, array++) { + err = gpio_request_one(array->gpio, array->flags, array->label); + if (err) + goto err_free; + } + return 0; + +err_free: + while (i--) + gpio_free((--array)->gpio); + return err; +} +EXPORT_SYMBOL_GPL(gpio_request_array); + +/** + * gpio_free_array - release multiple GPIOs in a single call + * @array: array of the 'struct gpio' + * @num: how many GPIOs in the array + */ +void gpio_free_array(const struct gpio *array, size_t num) +{ + while (num--) + gpio_free((array++)->gpio); +} +EXPORT_SYMBOL_GPL(gpio_free_array); + void gpio_set_value(unsigned gpio, int value) { struct gpio_info *gi = gpio_to_desc(gpio); @@ -228,16 +294,34 @@ static int do_gpiolib(int argc, char *argv[]) int i; printf("gpiolib: gpio lists\n"); - printf("%*crequested label\n", 11, ' '); for (i = 0; i < ARCH_NR_GPIOS; i++) { struct gpio_info *gi = &gpio_desc[i]; + int val = -1, dir = -1; if (!gi->chip) continue; - printf("gpio %*d: %*s %s\n", 4, - i, 9, gi->requested ? "true" : "false", + /* print chip information and header on first gpio */ + if (gi->chip->base == i) { + printf("\ngpios %u-%u, chip %s:\n", + gi->chip->base, + gi->chip->base + gi->chip->ngpio - 1, + gi->chip->dev->name); + printf("%*cdir val requested label\n", 13, ' '); + } + + if (gi->chip->ops->get_direction) + dir = gi->chip->ops->get_direction(gi->chip, + i - gi->chip->base); + if (gi->chip->ops->get) + val = gi->chip->ops->get(gi->chip, + i - gi->chip->base); + + printf(" gpio %*d: %*s %*s %*s %s\n", 4, i, + 3, (dir < 0) ? "unk" : ((dir == GPIOF_DIR_IN) ? "in" : "out"), + 3, (val < 0) ? "unk" : ((val == 0) ? "lo" : "hi"), + 9, gi->requested ? "true" : "false", gi->label ? gi->label : ""); } diff --git a/drivers/led/led-gpio.c b/drivers/led/led-gpio.c index 69db70fab8..7a5ef473e6 100644 --- a/drivers/led/led-gpio.c +++ b/drivers/led/led-gpio.c @@ -225,6 +225,8 @@ static void led_of_parse_trigger(struct led *led, struct device_node *np) for (i = 0; i < ARRAY_SIZE(triggers); i++) { struct led_trg *trg = &triggers[i]; if (!strcmp(trg->str, trigger)) { + /* disable LED before installing trigger */ + led_set(led, 0); led_set_trigger(trg->trg, led); return; } @@ -252,8 +254,8 @@ static int led_gpio_of_probe(struct device_d *dev) dev_dbg(dev, "register led %s on gpio%d, active_low = %d\n", gled->led.name, gled->gpio, gled->active_low); - led_of_parse_trigger(&gled->led, child); led_gpio_register(gled); + led_of_parse_trigger(&gled->led, child); } return 0; diff --git a/drivers/mci/Kconfig b/drivers/mci/Kconfig index bd854247b0..1efb40ac01 100644 --- a/drivers/mci/Kconfig +++ b/drivers/mci/Kconfig @@ -103,6 +103,7 @@ config MCI_ATMEL config MCI_MMCI bool "ARM PL180 MMCI" + depends on ARM_AMBA help Enable this entry to add support to read and write SD cards on a ARM AMBA PL180. diff --git a/drivers/mci/mmci.c b/drivers/mci/mmci.c index 66ca450206..d93b3cbfbd 100644 --- a/drivers/mci/mmci.c +++ b/drivers/mci/mmci.c @@ -31,7 +31,6 @@ #include <linux/clk.h> #include <errno.h> #include <malloc.h> -#include <mmci.h> #include <linux/amba/bus.h> #include <linux/amba/mmci.h> diff --git a/drivers/mtd/mtdraw.c b/drivers/mtd/mtdraw.c index 2acd51f70b..be347233bd 100644 --- a/drivers/mtd/mtdraw.c +++ b/drivers/mtd/mtdraw.c @@ -278,7 +278,6 @@ static const struct file_operations mtd_raw_fops = { .read = mtdraw_read, .write = mtdraw_write, .erase = mtdraw_erase, - .ioctl = mtd_ioctl, .lseek = dev_lseek_default, }; diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c index 2f31352340..72e689dcb5 100644 --- a/drivers/net/fec_imx.c +++ b/drivers/net/fec_imx.c @@ -27,6 +27,8 @@ #include <linux/clk.h> #include <linux/err.h> #include <of_net.h> +#include <of_gpio.h> +#include <gpio.h> #include <asm/mmu.h> @@ -643,6 +645,7 @@ static int fec_probe(struct device_d *dev) void *base; int ret; enum fec_type type; + int phy_reset; ret = dev_get_drvdata(dev, (unsigned long *)&type); if (ret) @@ -671,6 +674,20 @@ static int fec_probe(struct device_d *dev) fec->regs = dev_request_mem_region(dev, 0); + phy_reset = of_get_named_gpio(dev->device_node, "phy-reset-gpios", 0); + if (gpio_is_valid(phy_reset)) { + ret = gpio_request(phy_reset, "phy-reset"); + if (ret) + goto err_free; + + ret = gpio_direction_output(phy_reset, 0); + if (ret) + goto err_free; + + udelay(10); + gpio_set_value(phy_reset, 1); + } + /* Reset chip. */ writel(FEC_ECNTRL_RESET, fec->regs + FEC_ECNTRL); while(readl(fec->regs + FEC_ECNTRL) & 1) { diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index b6ac9ee750..83966f997f 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -8,6 +8,11 @@ if PHYLIB comment "MII PHY device drivers" +config AT803X_PHY + bool "Driver for Atheros AT803X PHYs" + ---help--- + Currently supports the AT8030, AT8031 and AT8035 PHYs. + config MICREL_PHY bool "Driver for Micrel PHYs" ---help--- diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 5f8191d8a7..47e2b42331 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -1,3 +1,4 @@ obj-y += phy.o mdio_bus.o +obj-$(CONFIG_AT803X_PHY) += at803x.o obj-$(CONFIG_MICREL_PHY) += micrel.o obj-$(CONFIG_SMSC_PHY) += smsc.o diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c new file mode 100644 index 0000000000..a244c87cba --- /dev/null +++ b/drivers/net/phy/at803x.c @@ -0,0 +1,121 @@ +/* + * drivers/net/phy/at803x.c + * + * Driver for Atheros 803x PHY + * + * Author: Matus Ujhelyi <ujhelyi.m@gmail.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <common.h> +#include <init.h> +#include <linux/phy.h> +#include <linux/string.h> + +#define AT803X_INTR_ENABLE 0x12 +#define AT803X_INTR_STATUS 0x13 +#define AT803X_WOL_ENABLE 0x01 +#define AT803X_DEVICE_ADDR 0x03 +#define AT803X_LOC_MAC_ADDR_0_15_OFFSET 0x804C +#define AT803X_LOC_MAC_ADDR_16_31_OFFSET 0x804B +#define AT803X_LOC_MAC_ADDR_32_47_OFFSET 0x804A +#define AT803X_MMD_ACCESS_CONTROL 0x0D +#define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E +#define AT803X_FUNC_DATA 0x4003 +#define AT803X_DEBUG_ADDR 0x1D +#define AT803X_DEBUG_DATA 0x1E +#define AT803X_DEBUG_SYSTEM_MODE_CTRL 0x05 +#define AT803X_DEBUG_RGMII_TX_CLK_DLY (1 << 8) + +static int at803x_config_init(struct phy_device *phydev) +{ + int val; + int ret; + u32 features; + + features = SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_AUI | + SUPPORTED_FIBRE | SUPPORTED_BNC; + + val = phy_read(phydev, MII_BMSR); + if (val < 0) + return val; + + if (val & BMSR_ANEGCAPABLE) + features |= SUPPORTED_Autoneg; + if (val & BMSR_100FULL) + features |= SUPPORTED_100baseT_Full; + if (val & BMSR_100HALF) + features |= SUPPORTED_100baseT_Half; + if (val & BMSR_10FULL) + features |= SUPPORTED_10baseT_Full; + if (val & BMSR_10HALF) + features |= SUPPORTED_10baseT_Half; + + if (val & BMSR_ESTATEN) { + val = phy_read(phydev, MII_ESTATUS); + if (val < 0) + return val; + + if (val & ESTATUS_1000_TFULL) + features |= SUPPORTED_1000baseT_Full; + if (val & ESTATUS_1000_THALF) + features |= SUPPORTED_1000baseT_Half; + } + + phydev->supported = features; + phydev->advertising = features; + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { + ret = phy_write(phydev, AT803X_DEBUG_ADDR, + AT803X_DEBUG_SYSTEM_MODE_CTRL); + if (ret) + return ret; + ret = phy_write(phydev, AT803X_DEBUG_DATA, + AT803X_DEBUG_RGMII_TX_CLK_DLY); + if (ret) + return ret; + } + + return 0; +} + +static struct phy_driver at803x_driver[] = { +{ + /* ATHEROS 8035 */ + .phy_id = 0x004dd072, + .phy_id_mask = 0xffffffef, + .drv.name = "Atheros 8035 ethernet", + .config_init = at803x_config_init, + .features = PHY_GBIT_FEATURES, + .config_aneg = &genphy_config_aneg, + .read_status = &genphy_read_status, +}, { + /* ATHEROS 8030 */ + .phy_id = 0x004dd076, + .phy_id_mask = 0xffffffef, + .drv.name = "Atheros 8030 ethernet", + .config_init = at803x_config_init, + .features = PHY_GBIT_FEATURES, + .config_aneg = &genphy_config_aneg, + .read_status = &genphy_read_status, +}, { + /* ATHEROS 8031 */ + .phy_id = 0x004dd074, + .phy_id_mask = 0xffffffef, + .drv.name = "Atheros 8031 ethernet", + .config_init = at803x_config_init, + .features = PHY_GBIT_FEATURES, + .config_aneg = &genphy_config_aneg, + .read_status = &genphy_read_status, +} }; + +static int atheros_phy_init(void) +{ + return phy_drivers_register(at803x_driver, + ARRAY_SIZE(at803x_driver)); +} +fs_initcall(atheros_phy_init); diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig index 6b893d714d..cdf7ac7273 100644 --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig @@ -19,6 +19,11 @@ config OF_NET depends on NET def_bool y +config OF_GPIO + depends on CONFIG_GPIOLIB + depends on CONFIG_OFDEVICE + def_bool y + config OF_BAREBOX_DRIVERS depends on OFDEVICE depends on ENV_HANDLING diff --git a/drivers/of/Makefile b/drivers/of/Makefile index a19a8af635..c883e516c8 100644 --- a/drivers/of/Makefile +++ b/drivers/of/Makefile @@ -1,6 +1,6 @@ obj-y += address.o base.o fdt.o platform.o obj-$(CONFIG_OFTREE_MEM_GENERIC) += mem_generic.o -obj-$(CONFIG_GPIOLIB) += of_gpio.o +obj-$(CONFIG_OF_GPIO) += of_gpio.o obj-y += partition.o obj-y += of_net.o obj-$(CONFIG_MTD) += of_mtd.o diff --git a/drivers/of/base.c b/drivers/of/base.c index ba929bc1bf..ea2d879be4 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1734,6 +1734,7 @@ int of_probe(void) of_add_memory(memory, false); of_platform_populate(root_node, of_default_bus_match_table, NULL); + of_clk_init(root_node, NULL); return 0; } diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index 5055eee43c..3dc5d47602 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -408,12 +408,11 @@ void *of_flatten_dtb(struct device_node *node) nh->tag = cpu_to_fdt32(FDT_END); fdt.dt_nextofs = dt_next_ofs(fdt.dt_nextofs, sizeof(struct fdt_node_header)); - header.size_dt_strings = cpu_to_fdt32(fdt.str_nextofs); - header.size_dt_struct = cpu_to_fdt32(fdt.dt_nextofs); - header.off_dt_struct = cpu_to_fdt32(ofs); + header.size_dt_struct = cpu_to_fdt32(fdt.dt_nextofs - ofs); header.off_dt_strings = cpu_to_fdt32(fdt.dt_nextofs); + header.size_dt_strings = cpu_to_fdt32(fdt.str_nextofs); if (fdt.dt_size - fdt.dt_nextofs < fdt.str_nextofs) { fdt.dt = memalign_realloc(fdt.dt, fdt.dt_size, @@ -579,6 +579,8 @@ int chdir(const char *pathname) if (ret) goto out; + automount_mount(p, 0); + strcpy(cwd, p); out: diff --git a/images/Makefile.imx b/images/Makefile.imx index 794e3a3e09..49c7e3ed7d 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -26,6 +26,11 @@ CFG_start_imx53_loco.pblx.imximg = $(board)/freescale-mx53-loco/flash-header-imx FILE_barebox-freescale-imx53-loco.img = start_imx53_loco.pblx.imximg image-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += barebox-freescale-imx53-loco.img +pblx-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += start_imx53_vmx53 +CFG_start_imx53_vmx53.pblx.imximg = $(board)/freescale-mx53-vmx53/flash-header-imx53-vmx53.imxcfg +FILE_barebox-freescale-imx53-vmx53.img = start_imx53_vmx53.pblx.imximg +image-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += barebox-freescale-imx53-vmx53.img + # ----------------------- i.MX6 based boards --------------------------- pblx-$(CONFIG_MACH_REALQ7) += start_imx6_realq7 CFG_start_imx6_realq7.pblx.imximg = $(board)/dmo-mx6-realq7/flash-header.imxcfg @@ -66,3 +71,13 @@ pblx-$(CONFIG_MACH_DFI_FS700_M60) += start_imx6q_dfi_fs700_m60_6q CFG_start_imx6q_dfi_fs700_m60_6q.pblx.imximg = $(board)/dfi-fs700-m60/flash-header-fs700-m60-6q.imxcfg FILE_barebox-dfi-fs700-m60-6q.img = start_imx6q_dfi_fs700_m60_6q.pblx.imximg image-$(CONFIG_MACH_DFI_FS700_M60) += barebox-dfi-fs700-m60-6q.img + +pblx-$(CONFIG_MACH_SABRELITE) += start_imx6_sabrelite +CFG_start_imx6_sabrelite.pblx.imximg = $(board)/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg +FILE_barebox-freescale-imx6q-sabrelite.img = start_imx6_sabrelite.pblx.imximg +image-$(CONFIG_MACH_SABRELITE) += barebox-freescale-imx6q-sabrelite.img + +pblx-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += start_imx6dl_cubox_i_carrier_1 +CFG_start_imx6dl_cubox_i_carrier_1.pblx.imximg = $(board)/solidrun-carrier-1/flash-header-solidrun-carrier-1.imxcfg +FILE_barebox-cubox-i-carrier-1.img = start_imx6dl_cubox_i_carrier_1.pblx.imximg +image-$(CONFIG_MACH_SOLIDRUN_CARRIER1) += barebox-cubox-i-carrier-1.img diff --git a/include/asm-generic/barebox.lds.h b/include/asm-generic/barebox.lds.h index 4754779005..6d3a69ef20 100644 --- a/include/asm-generic/barebox.lds.h +++ b/include/asm-generic/barebox.lds.h @@ -41,9 +41,16 @@ #define BAREBOX_MAGICVARS KEEP(*(SORT_BY_NAME(.barebox_magicvar*))) +#define BAREBOX_CLK_TABLE() \ + . = ALIGN(8); \ + __clk_of_table_start = .; \ + KEEP(*(.__clk_of_table_*)); \ + __clk_of_table_end = .; + #define BAREBOX_DTB() \ + . = ALIGN(8); \ __dtb_start = .; \ - KEEP(*(.dtb.rodata.*)); \ + KEEP(*(.dtb.rodata.*)); \ __dtb_end = .; #if defined(CONFIG_ARCH_BAREBOX_MAX_BARE_INIT_SIZE) && \ diff --git a/include/gpio.h b/include/gpio.h index 140d53c83e..4a97521aee 100644 --- a/include/gpio.h +++ b/include/gpio.h @@ -3,6 +3,28 @@ #include <asm/gpio.h> +#define GPIOF_DIR_OUT (0 << 0) +#define GPIOF_DIR_IN (1 << 0) + +#define GPIOF_INIT_LOW (0 << 1) +#define GPIOF_INIT_HIGH (1 << 1) + +#define GPIOF_IN (GPIOF_DIR_IN) +#define GPIOF_OUT_INIT_LOW (GPIOF_DIR_OUT | GPIOF_INIT_LOW) +#define GPIOF_OUT_INIT_HIGH (GPIOF_DIR_OUT | GPIOF_INIT_HIGH) + +/** + * struct gpio - a structure describing a GPIO with configuration + * @gpio: the GPIO number + * @flags: GPIO configuration as specified by GPIOF_* + * @label: a literal description string of this GPIO + */ +struct gpio { + unsigned gpio; + unsigned long flags; + const char *label; +}; + #ifndef CONFIG_GPIOLIB static inline int gpio_request(unsigned gpio, const char *label) { @@ -12,9 +34,29 @@ static inline int gpio_request(unsigned gpio, const char *label) static inline void gpio_free(unsigned gpio) { } + +static inline int gpio_request_one(unsigned gpio, + unsigned long flags, const char *label) +{ + return -ENOSYS; +} + +static inline int gpio_request_array(const struct gpio *array, size_t num) +{ + return -ENOSYS; +} + +static inline void gpio_free_array(const struct gpio *array, size_t num) +{ + /* GPIO can never have been requested */ + WARN_ON(1); +} #else int gpio_request(unsigned gpio, const char *label); void gpio_free(unsigned gpio); +int gpio_request_one(unsigned gpio, unsigned long flags, const char *label); +int gpio_request_array(const struct gpio *array, size_t num); +void gpio_free_array(const struct gpio *array, size_t num); #endif struct gpio_chip; @@ -24,6 +66,7 @@ struct gpio_ops { void (*free)(struct gpio_chip *chip, unsigned offset); int (*direction_input)(struct gpio_chip *chip, unsigned offset); int (*direction_output)(struct gpio_chip *chip, unsigned offset, int value); + int (*get_direction)(struct gpio_chip *chip, unsigned offset); int (*get)(struct gpio_chip *chip, unsigned offset); void (*set)(struct gpio_chip *chip, unsigned offset, int value); }; diff --git a/include/linux/clk.h b/include/linux/clk.h index 477840020c..af38c720e8 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -12,6 +12,7 @@ #define __LINUX_CLK_H #include <linux/err.h> +#include <linux/stringify.h> struct device_d; @@ -278,6 +279,11 @@ void clk_dump(int verbose); struct device_node; struct of_phandle_args; +#define CLK_OF_DECLARE(name, compat, fn) \ +const struct of_device_id __clk_of_table_##name \ +__attribute__ ((unused,section (".__clk_of_table_" __stringify(name)))) \ + = { .compatible = compat, .data = (u32)fn } + #if defined(CONFIG_OFTREE) && defined(CONFIG_COMMON_CLK_OF_PROVIDER) int of_clk_add_provider(struct device_node *np, struct clk *(*clk_src_get)(struct of_phandle_args *args, @@ -285,6 +291,8 @@ int of_clk_add_provider(struct device_node *np, void *data); void of_clk_del_provider(struct device_node *np); +typedef int (*of_clk_init_cb_t)(struct device_node *); + struct clk_onecell_data { struct clk **clks; unsigned int clk_num; @@ -295,6 +303,7 @@ struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, void *data); struct clk *of_clk_get(struct device_node *np, int index); struct clk *of_clk_get_by_name(struct device_node *np, const char *name); struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec); +int of_clk_init(struct device_node *root, const struct of_device_id *matches); #else static inline struct clk *of_clk_get(struct device_node *np, int index) { @@ -305,6 +314,11 @@ static inline struct clk *of_clk_get_by_name(struct device_node *np, { return ERR_PTR(-ENOENT); } +static inline int of_clk_init(struct device_node *root, + const struct of_device_id *matches) +{ + return 0; +} #endif #endif diff --git a/include/linux/kbuild.h b/include/linux/kbuild.h new file mode 100644 index 0000000000..359d4a8682 --- /dev/null +++ b/include/linux/kbuild.h @@ -0,0 +1,15 @@ +#ifndef __LINUX_KBUILD_H +#define __LINUX_KBUILD_H + +#define DEFINE(sym, val) \ + asm volatile("\n->" #sym " %0 " #val : : "i" (val)) + +#define BLANK() asm volatile("\n->" : : ) + +#define OFFSET(sym, str, mem) \ + DEFINE(sym, offsetof(struct str, mem)) + +#define COMMENT(x) \ + asm volatile("\n->#" x) + +#endif diff --git a/include/of_gpio.h b/include/of_gpio.h index 50536a8a38..d42b18e63f 100644 --- a/include/of_gpio.h +++ b/include/of_gpio.h @@ -21,11 +21,11 @@ enum of_gpio_flags { OF_GPIO_ACTIVE_LOW = 0x1, }; -#ifdef CONFIG_OFTREE +#ifdef CONFIG_OF_GPIO extern int of_get_named_gpio_flags(struct device_node *np, const char *list_name, int index, enum of_gpio_flags *flags); -#else /* CONFIG_OFTREE */ +#else /* CONFIG_OF_GPIO */ static inline int of_get_named_gpio_flags(struct device_node *np, const char *list_name, int index, enum of_gpio_flags *flags) @@ -33,7 +33,7 @@ static inline int of_get_named_gpio_flags(struct device_node *np, return -ENOSYS; } -#endif /* CONFIG_OFTREE */ +#endif /* CONFIG_OF_GPIO */ static inline int of_get_named_gpio(struct device_node *np, const char *list_name, int index) diff --git a/lib/readline.c b/lib/readline.c index 3fb620e376..6afc4918ea 100644 --- a/lib/readline.c +++ b/lib/readline.c @@ -191,7 +191,6 @@ int readline(const char *prompt, char *buf, int len) unsigned wlen; int ichar; int insert = 1; - int rc = 0; #ifdef CONFIG_AUTO_COMPLETE char tmp; int reprint, i; @@ -351,5 +350,5 @@ int readline(const char *prompt, char *buf, int len) cread_add_to_hist(buf); hist_cur = hist_add_idx; - return rc < 0 ? rc : len; + return len; } diff --git a/scripts/Makefile b/scripts/Makefile index a837070246..3908c1dcb9 100644 --- a/scripts/Makefile +++ b/scripts/Makefile @@ -26,8 +26,8 @@ subdir-$(CONFIG_X86) += setupmbr subdir-$(CONFIG_DTC) += dtc targetprogs-$(CONFIG_BAREBOXENV_TARGET) += bareboxenv-target +targetprogs-$(CONFIG_KERNEL_INSTALL_TARGET) += kernel-install-target targetprogs-$(CONFIG_BAREBOXCRC32_TARGET) += bareboxcrc32-target -targetprogs-$(CONFIG_KERNEL_INSTALL_TARGET) += bareboxenv-target # Let clean descend into subdirs subdir- += basic kconfig setupmbr diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c index ec571ebf3e..1d935be756 100644 --- a/scripts/imx/imx-image.c +++ b/scripts/imx/imx-image.c @@ -442,6 +442,7 @@ struct soc_type { }; static struct soc_type socs[] = { + { .name = "imx25", .header_version = 1, }, { .name = "imx35", .header_version = 1, }, { .name = "imx51", .header_version = 1, }, { .name = "imx53", .header_version = 2, }, diff --git a/scripts/imx/imx-usb-loader.c b/scripts/imx/imx-usb-loader.c index a2da579938..12a89f5825 100644 --- a/scripts/imx/imx-usb-loader.c +++ b/scripts/imx/imx-usb-loader.c @@ -124,6 +124,13 @@ struct mach_id imx_ids[] = { .header_type = HDR_MX51, .mode = MODE_BULK, .max_transfer = 64, + }, { + .vid = 0x15a2, + .pid = 0x003a, + .name = "i.MX25", + .header_type = HDR_MX51, + .mode = MODE_BULK, + .max_transfer = 64, }, }; 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