diff options
285 files changed, 3600 insertions, 2774 deletions
diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst index 704aa027b6..9b1eb82d41 100644 --- a/Documentation/boards/imx.rst +++ b/Documentation/boards/imx.rst @@ -48,6 +48,63 @@ The images can also always be started second stage:: bootm /mnt/tftp/barebox-freescale-imx51-babbage.img +Information about the ``imx-image`` tool +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +The imx-image tool can be used to generate imximages from raw binaries. +It requires an configuration file describing how to setup the SDRAM on +a particular board. This mainly consists of a poke table. The recognized +options in this file are: + +Header: + ++----------------+--------------------------------------------------------------+ +| soc <soctype> | soctype can be one of imx35, imx51, imx53, imx6 | ++----------------+--------------------------------------------------------------+ +| loadaddr <adr> | The address the binary is uploaded to | ++----------------+--------------------------------------------------------------+ +| dcdofs <ofs> | The offset of the image header in the image. This should be: | +| | * ``0x400``: MMC/SD, NAND, serial ROM, PATA, SATA | +| | * ``0x1000``: NOR Flash | +| | * ``0x100``: OneNAND | ++----------------+--------------------------------------------------------------+ + +Memory manipulation: + ++------------------------------------+-----------------------------------------+ +| wm 8 <addr> <value> | write <value> into byte <addr> | ++------------------------------------+-----------------------------------------+ +| wm 16 <addr> <value> | write <value> into short <addr> | ++------------------------------------+-----------------------------------------+ +| wm 32 <addr> <value> | write <value> into word <addr> | ++------------------------------------+-----------------------------------------+ +| set_bits <width> <addr> <value> | set set bits in <value> in <addr> | ++------------------------------------+-----------------------------------------+ +| clear_bits <width> <addr> <value> | clear set bits in <value> in <addr> | ++------------------------------------+-----------------------------------------+ +| nop | do nothing (just waste time) | ++------------------------------------+-----------------------------------------+ + +<width> can be of 8, 16 or 32. + +Checking conditions: + ++------------------------------------+-----------------------------------------+ +| check <width> <cond> <addr> <mask> | Poll until condition becomes true. | +| | with <cond> being one of: | +| | * ``until_all_bits_clear`` | +| | * ``until_all_bits_set`` | +| | * ``until_any_bit_clear`` | +| | * ``until_any_bit_set`` | ++------------------------------------+-----------------------------------------+ + +Some notes about the mentioned *conditions*. + + - ``until_all_bits_clear`` waits until ``(*addr & mask) == 0`` is true + - ``until_all_bits_set`` waits until ``(*addr & mask) == mask`` is true + - ``until_any_bit_clear`` waits until ``(*addr & mask) != mask`` is true + - ``until_any_bit_set`` waits until ``(*addr & mask) != 0`` is true. + Internal Boot Mode Through Internal RAM(IRAM) --------------------------------------------- diff --git a/Documentation/user/framebuffer.rst b/Documentation/user/framebuffer.rst index 7d004fa1cf..8b95ad6b87 100644 --- a/Documentation/user/framebuffer.rst +++ b/Documentation/user/framebuffer.rst @@ -1,9 +1,10 @@ Framebuffer support =================== -barebox has support for framebuffer devices. Currently there is no console support -for framebuffers, so framebuffer usage is limited to splash screens only. barebox -supports BMP and PNG graphics using the :ref:`command_splash` command. barebox +Framebuffer splash screen +------------------------- + +barebox supports BMP and PNG graphics using the :ref:`command_splash` command. barebox currently has no support for backlights, so unless there is a board specific enable hook for enabling a display it must be done manually with a script. Since barebox has nothing useful to show on the framebuffer it doesn't enable it during startup. @@ -1,5 +1,5 @@ VERSION = 2018 -PATCHLEVEL = 03 +PATCHLEVEL = 04 SUBLEVEL = 0 EXTRAVERSION = NAME = None diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e7edc2ad44..37cde0c0c5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2,7 +2,7 @@ config ARM bool select HAS_KALLSYMS select HAS_CACHE - select HAVE_CONFIGURABLE_TEXT_BASE + select HAVE_CONFIGURABLE_TEXT_BASE if !RELOCATABLE select HAVE_IMAGE_COMPRESSION default y @@ -19,6 +19,10 @@ config ARM_USE_COMPRESSED_DTB select UNCOMPRESS select LZO_DECOMPRESS +config TEXT_BASE + hex + default 0x0 + menu "System Type" config BUILTIN_DTB @@ -282,6 +286,7 @@ config ARM_ASM_UNIFIED config AEABI bool "Use the ARM EABI to compile barebox" + depends on !CPU_V8 help This option allows for barebox to be compiled using the latest ARM ABI (aka EABI). @@ -304,7 +309,7 @@ config THUMB2_BAREBOX config ARM_BOARD_APPEND_ATAG bool "Let board specific code to add ATAGs to be passed to the kernel" - depends on ARM_LINUX + depends on ARM_LINUX && !CPU_V8 help This option is purely to start some vendor provided kernels. ** DO NOT USE FOR YOUR OWN DESIGNS! ** diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 620a3ccb0b..5db67b9db8 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -23,6 +23,8 @@ endif # accesses ifneq ($(CONFIG_CPU_V8),y) CFLAGS += -mno-unaligned-access +else +CFLAGS += -mstrict-align endif @@ -65,6 +67,7 @@ endif ifeq ($(CONFIG_CPU_V8), y) CPPFLAGS += $(CFLAGS_ABI) $(arch-y) $(tune-y) AFLAGS += -include asm/unified.h +export S64 = _64 else CPPFLAGS += $(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float $(CFLAGS_THUMB2) AFLAGS += -include asm/unified.h -msoft-float $(AFLAGS_THUMB2) @@ -254,8 +257,6 @@ imxcfg-$(CONFIG_MACH_EUKREA_CPUIMX25) += $(boarddir)/eukrea_cpuimx25/flash-heade imxcfg-$(CONFIG_MACH_EUKREA_CPUIMX35) += $(boarddir)/eukrea_cpuimx35/flash-header.imxcfg imxcfg-$(CONFIG_MACH_PCM043) += $(boarddir)/phytec-phycore-imx35/flash-header.imxcfg imxcfg-$(CONFIG_MACH_KINDLE3) += $(boarddir)/kindle3/flash-header.imxcfg -imxcfg-$(CONFIG_TX53_REV_1011) += $(boarddir)/karo-tx53/flash-header-tx53-rev1011.imxcfg -imxcfg-$(CONFIG_TX53_REV_XX30) += $(boarddir)/karo-tx53/flash-header-tx53-revxx30.imxcfg ifneq ($(imxcfg-y),) CFG_barebox.imximg := $(imxcfg-y) KBUILD_IMAGE := barebox.imximg @@ -295,7 +296,6 @@ endif common-y += $(BOARD) arch/arm/boards/ $(MACH) common-y += arch/arm/cpu/ -common-y += arch/arm/lib/ ifeq ($(CONFIG_CPU_V8), y) common-y += arch/arm/lib64/ diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index ca187ccb89..30f4c299f1 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -61,6 +61,7 @@ obj-$(CONFIG_MACH_IMX21ADS) += freescale-mx21-ads/ obj-$(CONFIG_MACH_IMX233_OLINUXINO) += imx233-olinuxino/ obj-$(CONFIG_MACH_IMX27ADS) += freescale-mx27-ads/ obj-$(CONFIG_MACH_KINDLE3) += kindle3/ +obj-$(CONFIG_MACH_KONTRON_SAMX6I) += kontron-samx6i/ obj-$(CONFIG_MACH_LENOVO_IX4_300D) += lenovo-ix4-300d/ obj-$(CONFIG_MACH_LUBBOCK) += lubbock/ obj-$(CONFIG_MACH_MAINSTONE) += mainstone/ diff --git a/arch/arm/boards/afi-gf/lowlevel.c b/arch/arm/boards/afi-gf/lowlevel.c index dfa202dda3..da4a000675 100644 --- a/arch/arm/boards/afi-gf/lowlevel.c +++ b/arch/arm/boards/afi-gf/lowlevel.c @@ -252,7 +252,7 @@ ENTRY_FUNCTION(start_am33xx_afi_gf_sdram, r0, r1, r2) { void *fdt; - fdt = __dtb_z_am335x_afi_gf_start - get_runtime_offset(); + fdt = __dtb_z_am335x_afi_gf_start + get_runtime_offset(); putc_ll('>'); diff --git a/arch/arm/boards/altera-socdk/lowlevel.c b/arch/arm/boards/altera-socdk/lowlevel.c index 8cfe839159..08e70a0fc6 100644 --- a/arch/arm/boards/altera-socdk/lowlevel.c +++ b/arch/arm/boards/altera-socdk/lowlevel.c @@ -26,7 +26,7 @@ ENTRY_FUNCTION(start_socfpga_socdk, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_socfpga_cyclone5_socdk_start - get_runtime_offset(); + fdt = __dtb_socfpga_cyclone5_socdk_start + get_runtime_offset(); barebox_arm_entry(0x0, SZ_1G, fdt); } diff --git a/arch/arm/boards/at91sam9263ek/lowlevel_init.c b/arch/arm/boards/at91sam9263ek/lowlevel_init.c index 2004d70cbe..30c14089d1 100644 --- a/arch/arm/boards/at91sam9263ek/lowlevel_init.c +++ b/arch/arm/boards/at91sam9263ek/lowlevel_init.c @@ -126,7 +126,7 @@ ENTRY_FUNCTION(start_at91sam9263ek, r0, r1, r2) arm_setup_stack(AT91SAM9263_SRAM0_BASE + AT91SAM9263_SRAM0_SIZE - 16); if (IS_ENABLED(CONFIG_MACH_AT91SAM9263EK_DT)) - fdt = __dtb_at91sam9263ek_start - get_runtime_offset(); + fdt = __dtb_at91sam9263ek_start + get_runtime_offset(); else fdt = NULL; diff --git a/arch/arm/boards/at91sam9x5ek/lowlevel.c b/arch/arm/boards/at91sam9x5ek/lowlevel.c index acf80d7955..9aa0e8ba9b 100644 --- a/arch/arm/boards/at91sam9x5ek/lowlevel.c +++ b/arch/arm/boards/at91sam9x5ek/lowlevel.c @@ -15,7 +15,7 @@ ENTRY_FUNCTION(start_at91sam9x5ek, r0, r1, r2) arm_cpu_lowlevel_init(); arm_setup_stack(AT91SAM9X5_SRAM_BASE + AT91SAM9X5_SRAM_SIZE - 16); - fdt = __dtb_at91sam9x5ek_start - get_runtime_offset(); + fdt = __dtb_at91sam9x5ek_start + get_runtime_offset(); barebox_arm_entry(AT91_CHIPSELECT_1, at91sam9x5_get_ddram_size(), fdt); } diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c index f2e1690b15..91d143e415 100644 --- a/arch/arm/boards/beaglebone/lowlevel.c +++ b/arch/arm/boards/beaglebone/lowlevel.c @@ -170,7 +170,7 @@ ENTRY_FUNCTION(start_am33xx_beaglebone_sdram, r0, r1, r2) fdt = __dtb_z_am335x_bone_start; } - fdt -= get_runtime_offset(); + fdt += get_runtime_offset(); barebox_arm_entry(0x80000000, sdram_size, fdt); } diff --git a/arch/arm/boards/boundarydevices-nitrogen6/lowlevel.c b/arch/arm/boards/boundarydevices-nitrogen6/lowlevel.c index bee70a5af4..74ff71fc24 100644 --- a/arch/arm/boards/boundarydevices-nitrogen6/lowlevel.c +++ b/arch/arm/boards/boundarydevices-nitrogen6/lowlevel.c @@ -11,7 +11,7 @@ ENTRY_FUNCTION(start_imx6q_nitrogen6x_1g, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_nitrogen6x_start - get_runtime_offset(); + fdt = __dtb_imx6q_nitrogen6x_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -22,7 +22,7 @@ ENTRY_FUNCTION(start_imx6q_nitrogen6x_2g, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_nitrogen6x_start - get_runtime_offset(); + fdt = __dtb_imx6q_nitrogen6x_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -35,7 +35,7 @@ ENTRY_FUNCTION(start_imx6dl_nitrogen6x_1g, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6dl_nitrogen6x_start - get_runtime_offset(); + fdt = __dtb_imx6dl_nitrogen6x_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -46,7 +46,7 @@ ENTRY_FUNCTION(start_imx6dl_nitrogen6x_2g, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6dl_nitrogen6x_start - get_runtime_offset(); + fdt = __dtb_imx6dl_nitrogen6x_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -59,7 +59,7 @@ ENTRY_FUNCTION(start_imx6qp_nitrogen6_max, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6qp_nitrogen6_max_start - get_runtime_offset(); + fdt = __dtb_imx6qp_nitrogen6_max_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } diff --git a/arch/arm/boards/ccxmx53/lowlevel.c b/arch/arm/boards/ccxmx53/lowlevel.c index 22492140d8..c27e33098c 100644 --- a/arch/arm/boards/ccxmx53/lowlevel.c +++ b/arch/arm/boards/ccxmx53/lowlevel.c @@ -41,7 +41,7 @@ ENTRY_FUNCTION(start_ccxmx53_512mb, r0, r1, r2) IMD_USED(ccxmx53_memsize_SZ_512M); - fdt = __dtb_imx53_ccxmx53_start - get_runtime_offset(); + fdt = __dtb_imx53_ccxmx53_start + get_runtime_offset(); imx53_barebox_entry(fdt); } @@ -55,7 +55,7 @@ ENTRY_FUNCTION(start_ccxmx53_1gib, r0, r1, r2) IMD_USED(ccxmx53_memsize_SZ_1G); - fdt = __dtb_imx53_ccxmx53_start - get_runtime_offset(); + fdt = __dtb_imx53_ccxmx53_start + get_runtime_offset(); imx53_barebox_entry(fdt); } diff --git a/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c b/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c index 28b4aa280d..3ecdb66bc5 100644 --- a/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c +++ b/arch/arm/boards/datamodul-edm-qmx6/lowlevel.c @@ -147,7 +147,7 @@ ENTRY_FUNCTION(start_imx6_realq7, r0, r1, r2) arm_setup_stack(0x00940000 - 8); - fdt = __dtb_imx6q_dmo_edmqmx6_start - get_runtime_offset(); + fdt = __dtb_imx6q_dmo_edmqmx6_start + get_runtime_offset(); if (get_pc() < 0x10000000) { sdram_init(); diff --git a/arch/arm/boards/dfi-fs700-m60/lowlevel.c b/arch/arm/boards/dfi-fs700-m60/lowlevel.c index a22f66a11b..b419228505 100644 --- a/arch/arm/boards/dfi-fs700-m60/lowlevel.c +++ b/arch/arm/boards/dfi-fs700-m60/lowlevel.c @@ -115,7 +115,7 @@ ENTRY_FUNCTION(start_imx6q_dfi_fs700_m60_6q_nanya, r0, r1, r2) early_uart_init_6q(); - fdt = __dtb_imx6q_dfi_fs700_m60_6q_start - get_runtime_offset(); + fdt = __dtb_imx6q_dfi_fs700_m60_6q_start + get_runtime_offset(); barebox_arm_entry(0x10000000, memsize_1G_2G(), fdt); } @@ -134,7 +134,7 @@ ENTRY_FUNCTION(start_imx6q_dfi_fs700_m60_6q_micron, r0, r1, r2) early_uart_init_6q(); - fdt = __dtb_imx6q_dfi_fs700_m60_6q_start - get_runtime_offset(); + fdt = __dtb_imx6q_dfi_fs700_m60_6q_start + get_runtime_offset(); *(uint32_t *)0x10000000 = SZ_1G; @@ -157,7 +157,7 @@ ENTRY_FUNCTION(start_imx6dl_dfi_fs700_m60_6s, r0, r1, r2) early_uart_init_6s(); - fdt = __dtb_imx6dl_dfi_fs700_m60_6s_start - get_runtime_offset(); + fdt = __dtb_imx6dl_dfi_fs700_m60_6s_start + get_runtime_offset(); barebox_arm_entry(0x10000000, memsize_512M_1G(), fdt); } diff --git a/arch/arm/boards/duckbill/lowlevel.c b/arch/arm/boards/duckbill/lowlevel.c index c00a9a0b04..2922e40f2a 100644 --- a/arch/arm/boards/duckbill/lowlevel.c +++ b/arch/arm/boards/duckbill/lowlevel.c @@ -20,7 +20,7 @@ ENTRY_FUNCTION(start_barebox_duckbill, r0, r1, r2) pr_debug("here we are!\n"); - fdt = __dtb_imx28_duckbill_start - get_runtime_offset(); + fdt = __dtb_imx28_duckbill_start + get_runtime_offset(); barebox_arm_entry(IMX_MEMORY_BASE, SZ_128M, fdt); } diff --git a/arch/arm/boards/ebv-socrates/lowlevel.c b/arch/arm/boards/ebv-socrates/lowlevel.c index 9643269f8e..ef9f4535f6 100644 --- a/arch/arm/boards/ebv-socrates/lowlevel.c +++ b/arch/arm/boards/ebv-socrates/lowlevel.c @@ -52,7 +52,7 @@ ENTRY_FUNCTION(start_socfpga_socrates, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_socfpga_cyclone5_socrates_start - get_runtime_offset(); + fdt = __dtb_socfpga_cyclone5_socrates_start + get_runtime_offset(); barebox_arm_entry(0x0, SZ_1G, fdt); } diff --git a/arch/arm/boards/efika-mx-smartbook/lowlevel.c b/arch/arm/boards/efika-mx-smartbook/lowlevel.c index 52454c7d50..6da5bfaf55 100644 --- a/arch/arm/boards/efika-mx-smartbook/lowlevel.c +++ b/arch/arm/boards/efika-mx-smartbook/lowlevel.c @@ -15,7 +15,7 @@ ENTRY_FUNCTION(start_imx51_genesi_efikasb, r0, r1, r2) arm_setup_stack(0x20000000 - 16); imx51_init_lowlevel(800); - fdt = __dtb_imx51_genesi_efika_sb_start - get_runtime_offset(); + fdt = __dtb_imx51_genesi_efika_sb_start + get_runtime_offset(); imx51_barebox_entry(fdt); } diff --git a/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg b/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg index d54b3ea851..7aa5dd8d45 100644 --- a/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg +++ b/arch/arm/boards/element14-warp7/flash-header-mx7-warp.imxcfg @@ -72,7 +72,7 @@ wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e4c7304 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e4c7306 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e4c7304 -check 32 while_any_bit_clear MX7_DDR_PHY_ZQ_CON1 0x1 +check 32 until_any_bit_set MX7_DDR_PHY_ZQ_CON1 0x1 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e487304 @@ -80,4 +80,4 @@ wm 32 0x30384130 0x00000000 wm 32 0x30340020 0x00000178 wm 32 0x30384130 0x00000002 -check 32 while_any_bit_clear MX7_DDRC_STAT 0x1 +check 32 until_any_bit_set MX7_DDRC_STAT 0x1 diff --git a/arch/arm/boards/element14-warp7/lowlevel.c b/arch/arm/boards/element14-warp7/lowlevel.c index 89a77d2f88..6ca733a0be 100644 --- a/arch/arm/boards/element14-warp7/lowlevel.c +++ b/arch/arm/boards/element14-warp7/lowlevel.c @@ -35,7 +35,7 @@ static noinline void warp7_start(void) pr_debug("Element14 i.MX7 Warp\n"); - fdt = __dtb_imx7s_warp_start - get_runtime_offset(); + fdt = __dtb_imx7s_warp_start + get_runtime_offset(); barebox_arm_entry(0x80000000, SZ_512M, fdt); } diff --git a/arch/arm/boards/eltec-hipercam/lowlevel.c b/arch/arm/boards/eltec-hipercam/lowlevel.c index 21542e49e9..b0d3155023 100644 --- a/arch/arm/boards/eltec-hipercam/lowlevel.c +++ b/arch/arm/boards/eltec-hipercam/lowlevel.c @@ -44,7 +44,7 @@ ENTRY_FUNCTION(start_imx6dl_eltec_hipercam, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = __dtb_imx6dl_eltec_hipercam_start - get_runtime_offset(); + fdt = __dtb_imx6dl_eltec_hipercam_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_256M, fdt); } diff --git a/arch/arm/boards/embedsky-e9/lowlevel.c b/arch/arm/boards/embedsky-e9/lowlevel.c index fb1ba5f64a..845c4ec90c 100644 --- a/arch/arm/boards/embedsky-e9/lowlevel.c +++ b/arch/arm/boards/embedsky-e9/lowlevel.c @@ -12,7 +12,7 @@ ENTRY_FUNCTION(start_imx6q_embedsky_e9, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_embedsky_e9_start - get_runtime_offset(); + fdt = __dtb_imx6q_embedsky_e9_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_2G, fdt); } diff --git a/arch/arm/boards/embest-riotboard/lowlevel.c b/arch/arm/boards/embest-riotboard/lowlevel.c index d26bc98bbb..07f669fc03 100644 --- a/arch/arm/boards/embest-riotboard/lowlevel.c +++ b/arch/arm/boards/embest-riotboard/lowlevel.c @@ -23,6 +23,6 @@ ENTRY_FUNCTION(start_imx6s_riotboard, r0, r1, r2) putc_ll('a'); } - fdt = __dtb_imx6s_riotboard_start - get_runtime_offset(); + fdt = __dtb_imx6s_riotboard_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_1G, fdt); } diff --git a/arch/arm/boards/freescale-mx51-babbage/lowlevel.c b/arch/arm/boards/freescale-mx51-babbage/lowlevel.c index af40f4405e..1c20b6a7ae 100644 --- a/arch/arm/boards/freescale-mx51-babbage/lowlevel.c +++ b/arch/arm/boards/freescale-mx51-babbage/lowlevel.c @@ -50,7 +50,7 @@ ENTRY_FUNCTION(start_imx51_babbage, r0, r1, r2) arm_setup_stack(0x20000000 - 16); - fdt = __dtb_imx51_babbage_start - get_runtime_offset(); + fdt = __dtb_imx51_babbage_start + get_runtime_offset(); imx51_barebox_entry(fdt); } diff --git a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c index bed886357c..cfe01f7807 100644 --- a/arch/arm/boards/freescale-mx53-qsb/lowlevel.c +++ b/arch/arm/boards/freescale-mx53-qsb/lowlevel.c @@ -15,7 +15,7 @@ ENTRY_FUNCTION(start_imx53_loco, r0, r1, r2) imx5_cpu_lowlevel_init(); arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); - fdt = __dtb_imx53_qsb_start - get_runtime_offset(); + fdt = __dtb_imx53_qsb_start + get_runtime_offset(); imx53_barebox_entry(fdt); } @@ -29,7 +29,7 @@ ENTRY_FUNCTION(start_imx53_loco_r, r0, r1, r2) imx5_cpu_lowlevel_init(); arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); - fdt = __dtb_imx53_qsrb_start - get_runtime_offset(); + fdt = __dtb_imx53_qsrb_start + get_runtime_offset(); imx53_barebox_entry(fdt); } diff --git a/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c b/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c index 3545a1c352..aac784ca6e 100644 --- a/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c +++ b/arch/arm/boards/freescale-mx53-vmx53/lowlevel.c @@ -13,7 +13,7 @@ ENTRY_FUNCTION(start_imx53_vmx53, r0, r1, r2) imx5_cpu_lowlevel_init(); arm_setup_stack(0xf8020000 - 8); - fdt = __dtb_imx53_voipac_bsb_start - get_runtime_offset(); + fdt = __dtb_imx53_voipac_bsb_start + get_runtime_offset(); imx53_barebox_entry(fdt); } diff --git a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c index 5743dbcf30..ae847feaa6 100644 --- a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c +++ b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c @@ -31,7 +31,7 @@ ENTRY_FUNCTION(start_imx6q_sabresd, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = __dtb_imx6q_sabresd_start - get_runtime_offset(); + fdt = __dtb_imx6q_sabresd_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_1G, fdt); } diff --git a/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c b/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c index af26557e90..6a6e27bf44 100644 --- a/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c +++ b/arch/arm/boards/freescale-mx6sx-sabresdb/lowlevel.c @@ -46,7 +46,7 @@ ENTRY_FUNCTION(start_imx6sx_sabresdb, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = __dtb_imx6sx_sdb_start - get_runtime_offset(); + fdt = __dtb_imx6sx_sdb_start + get_runtime_offset(); barebox_arm_entry(0x80000000, SZ_1G, fdt); } diff --git a/arch/arm/boards/freescale-mx7-sabresd/flash-header-mx7-sabresd.imxcfg b/arch/arm/boards/freescale-mx7-sabresd/flash-header-mx7-sabresd.imxcfg index fd4861153f..83ed2dc065 100644 --- a/arch/arm/boards/freescale-mx7-sabresd/flash-header-mx7-sabresd.imxcfg +++ b/arch/arm/boards/freescale-mx7-sabresd/flash-header-mx7-sabresd.imxcfg @@ -68,7 +68,7 @@ wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e407304 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e447304 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e447306 -check 32 while_any_bit_clear MX7_DDR_PHY_ZQ_CON1 0x1 +check 32 until_any_bit_set MX7_DDR_PHY_ZQ_CON1 0x1 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e447304 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e407304 @@ -79,4 +79,4 @@ wm 32 0x30384130 0x00000002 wm 32 MX7_DDR_PHY_LP_CON0 0x0000000f -check 32 while_any_bit_clear MX7_DDRC_STAT 0x1 +check 32 until_any_bit_set MX7_DDRC_STAT 0x1 diff --git a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c index 96ccbbfeb8..43aa610759 100644 --- a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c +++ b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c @@ -40,7 +40,7 @@ ENTRY_FUNCTION(start_imx7d_sabresd, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = __dtb_imx7d_sdb_start - get_runtime_offset(); + fdt = __dtb_imx7d_sdb_start + get_runtime_offset(); barebox_arm_entry(0x80000000, SZ_1G, fdt); } diff --git a/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg index 01ffc6998a..8dd62be210 100644 --- a/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg +++ b/arch/arm/boards/freescale-vf610-twr/flash-header-vf610-twr.imxcfg @@ -65,7 +65,7 @@ CHECKPOINT(2) /* * Wait for PLLs to lock */ -check 32 while_any_bit_clear 0x40050030 0x80000000 +check 32 until_any_bit_set 0x40050030 0x80000000 CHECKPOINT(3) @@ -240,7 +240,7 @@ wm 32 0x400ae000 0x00000601 CHECKPOINT(7) -check 32 while_any_bit_clear 0x400ae140 0x100 +check 32 until_any_bit_set 0x400ae140 0x100 CHECKPOINT(8) @@ -268,11 +268,11 @@ CHECKPOINT(8) * against that pattern */ wm 32 0x80000000 0xa5a5a5a5 -check 32 while_any_bit_clear 0x80000000 0xa5a5a5a5 +check 32 until_any_bit_set 0x80000000 0xa5a5a5a5 wm 32 0x400ae000 0x00000600 wm 32 0x400ae000 0x00000601 -check 32 while_any_bit_clear 0x400ae140 0x100 +check 32 until_any_bit_set 0x400ae140 0x100 -CHECKPOINT(9)
\ No newline at end of file +CHECKPOINT(9) diff --git a/arch/arm/boards/freescale-vf610-twr/lowlevel.c b/arch/arm/boards/freescale-vf610-twr/lowlevel.c index 53c7b3af6b..deabe4e371 100644 --- a/arch/arm/boards/freescale-vf610-twr/lowlevel.c +++ b/arch/arm/boards/freescale-vf610-twr/lowlevel.c @@ -34,6 +34,6 @@ ENTRY_FUNCTION(start_vf610_twr, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = __dtb_vf610_twr_start - get_runtime_offset(); + fdt = __dtb_vf610_twr_start + get_runtime_offset(); barebox_arm_entry(0x80000000, SZ_128M, fdt); } diff --git a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c index fea00ef503..4b9ba87d70 100644 --- a/arch/arm/boards/friendlyarm-tiny210/lowlevel.c +++ b/arch/arm/boards/friendlyarm-tiny210/lowlevel.c @@ -96,7 +96,7 @@ void __bare_init barebox_arm_reset_vector(void) debug_led(1, 1); - if (! load_stage2((void*)(ld_var(_text) - 16), + if (! load_stage2((void*)(_text - 16), barebox_image_size + 16)) { debug_led(3, 1); while (1) { } /* hang */ @@ -104,7 +104,7 @@ void __bare_init barebox_arm_reset_vector(void) debug_led(2, 1); - jump_sdram(IRAM_CODE_BASE - ld_var(_text)); + jump_sdram(IRAM_CODE_BASE - (unsigned long)_text); debug_led(1, 0); diff --git a/arch/arm/boards/gateworks-ventana/lowlevel.c b/arch/arm/boards/gateworks-ventana/lowlevel.c index 746beb87e5..0a79d82049 100644 --- a/arch/arm/boards/gateworks-ventana/lowlevel.c +++ b/arch/arm/boards/gateworks-ventana/lowlevel.c @@ -12,7 +12,7 @@ ENTRY_FUNCTION(start_imx6q_gw54xx_1gx64, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_gw54xx_start - get_runtime_offset(); + fdt = __dtb_imx6q_gw54xx_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_1G, fdt); } diff --git a/arch/arm/boards/gk802/lowlevel.c b/arch/arm/boards/gk802/lowlevel.c index b571969884..a41b711e36 100644 --- a/arch/arm/boards/gk802/lowlevel.c +++ b/arch/arm/boards/gk802/lowlevel.c @@ -12,6 +12,6 @@ ENTRY_FUNCTION(start_imx6_gk802, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_gk802_start - get_runtime_offset(); + fdt = __dtb_imx6q_gk802_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_1G, fdt); } diff --git a/arch/arm/boards/globalscale-guruplug/lowlevel.c b/arch/arm/boards/globalscale-guruplug/lowlevel.c index 67c3b23f2c..92424cbd6b 100644 --- a/arch/arm/boards/globalscale-guruplug/lowlevel.c +++ b/arch/arm/boards/globalscale-guruplug/lowlevel.c @@ -28,7 +28,7 @@ ENTRY_FUNCTION(start_globalscale_guruplug, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_kirkwood_guruplug_server_plus_bb_start - + fdt = __dtb_kirkwood_guruplug_server_plus_bb_start + get_runtime_offset(); kirkwood_barebox_entry(fdt); diff --git a/arch/arm/boards/globalscale-mirabox/lowlevel.c b/arch/arm/boards/globalscale-mirabox/lowlevel.c index 7b070d70b1..69786c88fb 100644 --- a/arch/arm/boards/globalscale-mirabox/lowlevel.c +++ b/arch/arm/boards/globalscale-mirabox/lowlevel.c @@ -28,7 +28,7 @@ ENTRY_FUNCTION(start_globalscale_mirabox, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_armada_370_mirabox_bb_start - + fdt = __dtb_armada_370_mirabox_bb_start + get_runtime_offset(); armada_370_xp_barebox_entry(fdt); diff --git a/arch/arm/boards/karo-tx25/lowlevel.c b/arch/arm/boards/karo-tx25/lowlevel.c index b7ff2d44c6..78e6f4d823 100644 --- a/arch/arm/boards/karo-tx25/lowlevel.c +++ b/arch/arm/boards/karo-tx25/lowlevel.c @@ -171,7 +171,7 @@ ENTRY_FUNCTION(start_imx25_karo_tx25, r0, r1, r2) arm_setup_stack(MX25_IRAM_BASE_ADDR + MX25_IRAM_SIZE - 8); - fdt = __dtb_imx25_karo_tx25_start - get_runtime_offset(); + fdt = __dtb_imx25_karo_tx25_start + get_runtime_offset(); karo_tx25_common_init(fdt); } diff --git a/arch/arm/boards/karo-tx53/board.c b/arch/arm/boards/karo-tx53/board.c index 51b534d01f..9f1485ad0b 100644 --- a/arch/arm/boards/karo-tx53/board.c +++ b/arch/arm/boards/karo-tx53/board.c @@ -41,223 +41,55 @@ #include <io.h> #include <asm/mmu.h> -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_RMII, -}; - -static iomux_v3_cfg_t tx53_pads[] = { - /* UART1 */ - MX53_PAD_PATA_DIOW__UART1_TXD_MUX, - MX53_PAD_PATA_DMACK__UART1_RXD_MUX, - - MX53_PAD_PATA_DMARQ__UART2_TXD_MUX, - MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX, - - MX53_PAD_PATA_CS_0__UART3_TXD_MUX, - MX53_PAD_PATA_CS_1__UART3_RXD_MUX, - - /* setup FEC PHY pins for GPIO function */ - MX53_PAD_FEC_REF_CLK__GPIO1_23, - MX53_PAD_FEC_MDC__GPIO1_31, - MX53_PAD_FEC_MDIO__GPIO1_22, - MX53_PAD_FEC_RXD0__GPIO1_27, - MX53_PAD_FEC_RXD1__GPIO1_26, - MX53_PAD_FEC_RX_ER__GPIO1_24, - MX53_PAD_FEC_TX_EN__GPIO1_28, - MX53_PAD_FEC_TXD0__GPIO1_30, - MX53_PAD_FEC_TXD1__GPIO1_29, - MX53_PAD_FEC_CRS_DV__GPIO1_25, - - /* FEC PHY reset */ - MX53_PAD_PATA_DA_0__GPIO7_6, - /* FEC PHY power */ - MX53_PAD_EIM_D20__GPIO3_20, - - /* SD1 */ - MX53_PAD_SD1_CMD__ESDHC1_CMD, - MX53_PAD_SD1_CLK__ESDHC1_CLK, - MX53_PAD_SD1_DATA0__ESDHC1_DAT0, - MX53_PAD_SD1_DATA1__ESDHC1_DAT1, - MX53_PAD_SD1_DATA2__ESDHC1_DAT2, - MX53_PAD_SD1_DATA3__ESDHC1_DAT3, - - /* SD1_CD */ - MX53_PAD_EIM_D24__GPIO3_24, - - MX53_PAD_GPIO_3__I2C3_SCL, - MX53_PAD_GPIO_6__I2C3_SDA, - - MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12, - MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13, - MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14, - MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15, - MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16, - MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17, - MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18, - MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19, - MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC, - MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC, - MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK, -}; - -#define TX53_SD1_CD IMX_GPIO_NR(3, 24) - -static struct esdhc_platform_data tx53_sd1_data = { - .cd_gpio = TX53_SD1_CD, - .cd_type = ESDHC_CD_GPIO, - .wp_type = ESDHC_WP_NONE, - .caps = MMC_CAP_4_BIT_DATA, -}; - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, - .flash_bbt = 1, -}; - -#define FEC_POWER_GPIO IMX_GPIO_NR(3, 20) -#define FEC_RESET_GPIO IMX_GPIO_NR(7, 6) - -static struct tx53_fec_gpio_setup { - iomux_v3_cfg_t pad; - unsigned gpio:9, - dir:1, - level:1; -} tx53_fec_gpios[] = { - { MX53_PAD_PATA_DA_0__GPIO7_6, FEC_RESET_GPIO, 1, 0, }, /* PHY reset */ - { MX53_PAD_EIM_D20__GPIO3_20, FEC_POWER_GPIO, 1, 1, }, /* PHY power enable */ - { MX53_PAD_FEC_REF_CLK__GPIO1_23, IMX_GPIO_NR(1, 23), 0, }, /* ENET_CLK */ - { MX53_PAD_FEC_MDC__GPIO1_31, IMX_GPIO_NR(1, 31), 1, 0, }, /* MDC */ - { MX53_PAD_FEC_MDIO__GPIO1_22, IMX_GPIO_NR(1, 22), 1, 0, }, /* MDIO */ - { MX53_PAD_FEC_RXD0__GPIO1_27, IMX_GPIO_NR(1, 27), 1, 1, }, /* Mode0/RXD0 */ - { MX53_PAD_FEC_RXD1__GPIO1_26, IMX_GPIO_NR(1, 26), 1, 1, }, /* Mode1/RXD1 */ - { MX53_PAD_FEC_RX_ER__GPIO1_24, IMX_GPIO_NR(1, 24), 0, }, /* RX_ER */ - { MX53_PAD_FEC_TX_EN__GPIO1_28, IMX_GPIO_NR(1, 28), 1, 0, }, /* TX_EN */ - { MX53_PAD_FEC_TXD0__GPIO1_30, IMX_GPIO_NR(1, 30), 1, 0, }, /* TXD0 */ - { MX53_PAD_FEC_TXD1__GPIO1_29, IMX_GPIO_NR(1, 29), 1, 0, }, /* TXD1 */ - { MX53_PAD_FEC_CRS_DV__GPIO1_25, IMX_GPIO_NR(1, 25), 1, 1, }, /* Mode2/CRS_DV */ -}; - -static iomux_v3_cfg_t tx53_fec_pads[] = { - MX53_PAD_FEC_REF_CLK__FEC_TX_CLK, - MX53_PAD_FEC_MDC__FEC_MDC, - MX53_PAD_FEC_MDIO__FEC_MDIO, - MX53_PAD_FEC_RXD0__FEC_RDATA_0, - MX53_PAD_FEC_RXD1__FEC_RDATA_1, - MX53_PAD_FEC_RX_ER__FEC_RX_ER, - MX53_PAD_FEC_TX_EN__FEC_TX_EN, - MX53_PAD_FEC_TXD0__FEC_TDATA_0, - MX53_PAD_FEC_TXD1__FEC_TDATA_1, - MX53_PAD_FEC_CRS_DV__FEC_RX_DV, -}; - -static inline void tx53_fec_init(void) -{ - int i; - - /* Configure LAN8700 pads as GPIO and set up - * necessary strap options for PHY - */ - for (i = 0; i < ARRAY_SIZE(tx53_fec_gpios); i++) { - struct tx53_fec_gpio_setup *gs = &tx53_fec_gpios[i]; - - if (gs->dir) - gpio_direction_output(gs->gpio, gs->level); - else - gpio_direction_input(gs->gpio); - - mxc_iomux_v3_setup_pad(gs->pad); - } - - /* - *Turn on phy power, leave in reset state - */ - gpio_set_value(FEC_POWER_GPIO, 1); - - /* - * Wait some time to let the phy activate the internal regulator - */ - mdelay(10); - - /* - * Deassert reset, phy latches the rest of bootstrap pins - */ - gpio_set_value(FEC_RESET_GPIO, 1); - - /* LAN7800 has an internal Power On Reset (POR) signal (OR'ed with - * the external RESET signal) which is deactivated 21ms after - * power on and latches the strap options. - * Delay for 22ms to ensure, that the internal POR is inactive - * before reconfiguring the strap pins. - */ - mdelay(22); - - /* - * The phy is ready, now configure imx51 pads for fec operation - */ - mxc_iomux_v3_setup_multiple_pads(tx53_fec_pads, - ARRAY_SIZE(tx53_fec_pads)); -} - static int tx53_devices_init(void) { - imx53_iim_register_fec_ethaddr(); - tx53_fec_init(); - imx53_add_fec(&fec_info); - imx53_add_mmc0(&tx53_sd1_data); - imx53_add_nand(&nand_info); - - armlinux_set_architecture(MACH_TYPE_TX53); - - /* rev xx30 can boot from nand or USB */ - imx53_bbu_internal_nand_register_handler("nand-xx30", - BBU_HANDLER_FLAG_DEFAULT, SZ_512K); - - /* rev 1011 can boot from MMC/SD, other bootsource currently unknown */ - imx53_bbu_internal_mmc_register_handler("mmc-1011", "/dev/disk0", 0); + const char *envdev; + uint32_t flag_nand = 0; + uint32_t flag_mmc = 0; - return 0; -} + if (!of_machine_is_compatible("karo,tx53")) + return 0; -device_initcall(tx53_devices_init); - -static int tx53_part_init(void) -{ - const char *envdev; + barebox_set_model("Ka-Ro TX53"); + barebox_set_hostname("tx53"); switch (bootsource_get()) { case BOOTSOURCE_MMC: - devfs_add_partition("disk0", 0x00000, SZ_512K, DEVFS_PARTITION_FIXED, "self0"); - devfs_add_partition("disk0", SZ_512K, SZ_1M, DEVFS_PARTITION_FIXED, "env0"); + devfs_add_partition("mmc0", 0x00000, SZ_512K, + DEVFS_PARTITION_FIXED, "self0"); + devfs_add_partition("mmc0", SZ_512K, SZ_1M, + DEVFS_PARTITION_FIXED, "env0"); envdev = "MMC"; + flag_mmc |= BBU_HANDLER_FLAG_DEFAULT; break; case BOOTSOURCE_NAND: default: - devfs_add_partition("nand0", 0x00000, 0x80000, DEVFS_PARTITION_FIXED, "self_raw"); + devfs_add_partition("nand0", 0x00000, 0x80000, + DEVFS_PARTITION_FIXED, "self_raw"); dev_add_bb_dev("self_raw", "self0"); - devfs_add_partition("nand0", 0x80000, 0x100000, DEVFS_PARTITION_FIXED, "env_raw"); + devfs_add_partition("nand0", 0x80000, 0x100000, + DEVFS_PARTITION_FIXED, "env_raw"); dev_add_bb_dev("env_raw", "env0"); envdev = "NAND"; + flag_nand |= BBU_HANDLER_FLAG_DEFAULT; break; } - printf("Using environment in %s\n", envdev); + armlinux_set_architecture(MACH_TYPE_TX53); - return 0; -} -late_initcall(tx53_part_init); + /* rev xx30 can boot from nand or USB */ + imx53_bbu_internal_nand_register_handler("nand-xx30", + flag_nand, SZ_512K); -static int tx53_console_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(tx53_pads, ARRAY_SIZE(tx53_pads)); + /* rev 1011 can boot from MMC/SD, other bootsource currently unknown */ + imx53_bbu_internal_mmc_register_handler("mmc-1011", + "/dev/mmc0", flag_mmc); - if (!IS_ENABLED(CONFIG_TX53_REV_XX30)) + if (of_machine_is_compatible("karo,tx53-1011")) imx53_init_lowlevel(1000); - barebox_set_model("Ka-Ro TX53"); - barebox_set_hostname("tx53"); + printf("Using environment in %s\n", envdev); - imx53_add_uart0(); return 0; } -console_initcall(tx53_console_init); +device_initcall(tx53_devices_init); diff --git a/arch/arm/boards/karo-tx53/flash-header-tx53-revxx30-samsung.imxcfg b/arch/arm/boards/karo-tx53/flash-header-tx53-revxx30-samsung.imxcfg new file mode 100644 index 0000000000..6962abd5e6 --- /dev/null +++ b/arch/arm/boards/karo-tx53/flash-header-tx53-revxx30-samsung.imxcfg @@ -0,0 +1,177 @@ +loadaddr 0x71000000 +soc imx53 +dcdofs 0x400 + +wm 32 0x53fa8004 0x00194005 /* set LDO to 1.3V */ + +/* "AXI/DDR FREQ" fuse seems programmed to 1, so the SDRAM runs at 333 MHz */ +/* "BT_Freq" fuse seems unprogrammed and 0, so the CPU core runs at 800 MHz */ + +/* re-program the PLL2 for the SDRAM clock prior signal calibration */ + +wm 32 0x63F84000 0x00001232 /* MX5_PLL_DP_CTL */ +wm 32 0x63F84004 0x00000002 /* MX5_PLL_DP_CONFIG */ +wm 32 0x63F84008 0x00000081 /* MX5_PLL_DP_OP */ +wm 32 0x63F8401c 0x00000081 /* MX5_PLL_DP_HFS_OP */ +wm 32 0x63F8400c 0x00000002 /* MX5_PLL_DP_MFD */ +wm 32 0x63F84020 0x00000002 /* MX5_PLL_DP_HFS_MFD */ +wm 32 0x63F84010 0x00000001 /* MX5_PLL_DP_MFN */ +wm 32 0x63F84024 0x00000001 /* MX5_PLL_DP_HFS_MFN */ +wm 32 0x63F84000 0x00001232 /* MX5_PLL_DP_CTL */ +/* wait until PLL has locked again */ +check 32 until_all_bits_set 0x63F84000 0x00000001 + +wm 32 0x53fa8340 0x00000011 /* GPIO_17 => RESET_OUT */ +wm 32 0x63fd800c 0x00000000 /* M4IF: MUX NFC signals on WEIM TODO */ +/* Setup clock tree */ +wm 32 0x53fd4014 0x00888944 /* CBCDR for SDRAM clock > 333 AXI_A: /1, AXI_B: /2 */ +wm 32 0x53fd4018 0x00016154 /* CBCMR SDRAM Controller uses AXI_A */ +/* peripherals */ +wm 32 0x53fd401c 0xa6a2a020 /* CSCMR1 */ +wm 32 0x53fd4020 0xb6b12f0a /* CSCMR2 */ +wm 32 0x53fd4024 0x00080b18 /* CSCDR1 */ + +wm 32 0x53fa8724 0x00000000 /* DDR_TYPE: DDR3 */ +wm 32 0x53fa86f4 0x00000000 /* DDRMODE_CTL */ +wm 32 0x53fa8714 0x00000000 /* GRP_DDRMODE */ +wm 32 0x53fa86fc 0x00000080 /* GRP_DDRPKE */ +wm 32 0x53fa8710 0x00000000 /* GRP_DDRHYS */ +wm 32 0x53fa8708 0x00000040 /* GRP_DDRPK */ + +wm 32 0x53fa8584 0x00300000 /* DQM0 */ +wm 32 0x53fa8594 0x00300000 /* DQM1 */ +wm 32 0x53fa8560 0x00300000 /* DQM2 */ +wm 32 0x53fa8554 0x00300000 /* DQM3 */ + +wm 32 0x53fa857c 0x00b00040 /* SDQS0 */ +wm 32 0x53fa8590 0x00b00040 /* SDQS1 */ +wm 32 0x53fa8568 0x00b00040 /* SDQS2 */ +wm 32 0x53fa8558 0x00b00040 /* SDQS3 */ + +wm 32 0x53fa8580 0x00300040 /* SDODT0 */ +wm 32 0x53fa8578 0x00300000 /* SDCLK0 */ + +wm 32 0x53fa8564 0x00300040 /* SDODT1 */ +wm 32 0x53fa8570 0x00300000 /* SDCLK1 */ + +wm 32 0x53fa858c 0x000000c0 /* SDCKE0 */ +wm 32 0x53fa855c 0x000000c0 /* SDCKE1 */ + +wm 32 0x53fa8574 0x00300000 /* DRAM_CAS */ +wm 32 0x53fa8588 0x00300000 /* DRAM_RAS */ + +wm 32 0x53fa86f0 0x00300000 /* GRP_ADDDS */ +wm 32 0x53fa8720 0x00300000 /* GRP_CTLDS */ +wm 32 0x53fa8718 0x00300000 /* GRP_B0DS */ +wm 32 0x53fa871c 0x00300000 /* GRP_B1DS */ +wm 32 0x53fa8728 0x00300000 /* GRP_B2DS */ +wm 32 0x53fa872c 0x00300000 /* GRP_B3DS */ + +/* calibration defaults */ +wm 32 0x63fd904c 0x001f001f +wm 32 0x63fd9050 0x001f001f +wm 32 0x63fd907c 0x011e011e +wm 32 0x63fd9080 0x011f0120 +wm 32 0x63fd9088 0x3a393d3b +wm 32 0x63fd9090 0x3f3f3f3f + +wm 32 0x63fd9018 0x00000740 +wm 32 0x63fd9000 0x83190000 +wm 32 0x63fd900c 0x3f435333 +wm 32 0x63fd9010 0x926e8a63 +wm 32 0x63fd9014 0x01ff00db + +wm 32 0x63fd902c 0x000026d2 +wm 32 0x63fd9030 0x00430f24 +wm 32 0x63fd9008 0x1b333030 +wm 32 0x63fd9004 0x0002006d + +/* use the SDRAM controller for specific accesses into the SDRAM */ +wm 32 0x63fd901c 0x00008000 /* CON_REQ -> aquire AXI bus */ +check 32 until_all_bits_set 0x63fd901c 0x00004000 /* wait for acknowledge */ + +/* Setup SDRAM's MR0..3 at CS0 */ +wm 32 0x63fd901c 0x004080b2 /* MRS: MR2 */ +wm 32 0x63fd901c 0x000080b3 /* MRS: MR3 */ +wm 32 0x63fd901c 0x000480b1 /* MRS: MR1 */ +wm 32 0x63fd901c 0x052080b0 /* MRS: MR0 */ + +/* no memory at CS1 */ + +wm 32 0x63fd9020 0x0000c000 /* disable refresh during calibration */ +wm 32 0x63fd9058 0x00022222 + +wm 32 0x63fd90d0 0x00000003 /* select default compare pattern for calibration */ + +/* ZQ calibration */ +wm 32 0x63fd901c 0x04008010 /* precharge all */ +wm 32 0x63fd901c 0x00008040 /* MRS: ZQ calibration */ +wm 32 0x63fd9040 0x0539002b /* Force ZQ calibration */ +check 32 until_all_bits_clear 0x63fd9040 0x00010000 /* wait until ZQ calibration is done */ + +/* DQS calibration */ +wm 32 0x63fd901c 0x04008010 /* precharge all */ +wm 32 0x63fd901c 0x000480b3 /* MRS: select MPR */ +wm 32 0x63fd907c 0x90000000 /* reset RD fifo and start DQS calib. */ + +check 32 until_all_bits_clear 0x63fd907c 0x90000000 /* wait until DQS calibration is done */ +wm 32 0x63fd901c 0x000080b3 /* MRS: select normal data path */ + +/* WR DL calibration */ +wm 32 0x63fd901c 0x00008000 +wm 32 0x63fd901c 0x04008010 /* precharge all */ +wm 32 0x63fd901c 0x000480b3 /* MRS: select MPR */ +wm 32 0x63fd90a4 0x00000010 /* start WR DL calibration */ + +check 32 until_all_bits_clear 0x63fd90a4 0x00000010 /* wait until WR DL calibration is done */ +wm 32 0x63fd901c 0x000080b3 /* MRS: select normal data path */ + +/* RD DL calibration */ +wm 32 0x63fd901c 0x04008010 /* precharge all */ +wm 32 0x63fd901c 0x000480b3 /* MRS: select MPR */ +wm 32 0x63fd90a0 0x00000010 /* start WR DL calibration */ + +check 32 until_all_bits_clear 0x63fd90a0 0x00000010 /* wait until RD DL calibration is done */ +wm 32 0x63fd901c 0x000080b3 /* MRS: select normal data path */ + +wm 32 0x63fd9020 0x00001800 /* refresh interval: 4 cycles every 64kHz period */ +wm 32 0x63fd9004 0x0002556d + +/* DDR calibration done */ +wm 32 0x63fd901c 0x00000000 + +/* setup NFC pads */ + +/* MUX_SEL */ +wm 32 0x53fa819c 0x00000000 /* EIM_DA0 */ +wm 32 0x53fa81a0 0x00000000 /* EIM_DA1 */ +wm 32 0x53fa81a4 0x00000000 /* EIM_DA2 */ +wm 32 0x53fa81a8 0x00000000 /* EIM_DA3 */ +wm 32 0x53fa81ac 0x00000000 /* EIM_DA4 */ +wm 32 0x53fa81b0 0x00000000 /* EIM_DA5 */ +wm 32 0x53fa81b4 0x00000000 /* EIM_DA6 */ +wm 32 0x53fa81b8 0x00000000 /* EIM_DA7 */ +wm 32 0x53fa81dc 0x00000000 /* WE_B */ +wm 32 0x53fa81e0 0x00000000 /* RE_B */ +wm 32 0x53fa8228 0x00000000 /* CLE */ +wm 32 0x53fa822c 0x00000000 /* ALE */ +wm 32 0x53fa8230 0x00000000 /* WP_B */ +wm 32 0x53fa8234 0x00000000 /* RB0 */ +wm 32 0x53fa8238 0x00000000 /* CS0 */ + +/* PAD_CTL */ +wm 32 0x53fa84ec 0x000000e4 /* EIM_DA0 */ +wm 32 0x53fa84f0 0x000000e4 /* EIM_DA1 */ +wm 32 0x53fa84f4 0x000000e4 /* EIM_DA2 */ +wm 32 0x53fa84f8 0x000000e4 /* EIM_DA3 */ +wm 32 0x53fa84fc 0x000000e4 /* EIM_DA4 */ +wm 32 0x53fa8500 0x000000e4 /* EIM_DA5 */ +wm 32 0x53fa8504 0x000000e4 /* EIM_DA6 */ +wm 32 0x53fa8508 0x000000e4 /* EIM_DA7 */ +wm 32 0x53fa852c 0x00000004 /* NANDF_WE_B */ +wm 32 0x53fa8530 0x00000004 /* NANDF_RE_B */ +wm 32 0x53fa85a0 0x00000004 /* NANDF_CLE_B */ +wm 32 0x53fa85a4 0x00000004 /* NANDF_ALE_B */ +wm 32 0x53fa85a8 0x000000e4 /* NANDF_WE_B */ +wm 32 0x53fa85ac 0x000000e4 /* NANDF_RB0 */ +wm 32 0x53fa85b0 0x00000004 /* NANDF_CS0 */ diff --git a/arch/arm/boards/karo-tx53/flash-header-tx53-revxx30.imxcfg b/arch/arm/boards/karo-tx53/flash-header-tx53-revxx30.imxcfg index aec88ad59b..2b47d63bd4 100644 --- a/arch/arm/boards/karo-tx53/flash-header-tx53-revxx30.imxcfg +++ b/arch/arm/boards/karo-tx53/flash-header-tx53-revxx30.imxcfg @@ -3,9 +3,9 @@ soc imx53 dcdofs 0x400 wm 32 0x53fd4068 0xffcc0fff wm 32 0x53fd406c 0x000fffc3 -wm 32 0x53fd4070 0x033c0000 +wm 32 0x53fd4070 0x0f3c0000 wm 32 0x53fd4074 0x00000000 -wm 32 0x53fd4078 0x00000000 +wm 32 0x53fd4078 0x00000c00 wm 32 0x53fd407c 0x00fff033 wm 32 0x53fd4080 0x0f00030f wm 32 0x53fd4084 0xfff00000 @@ -68,29 +68,29 @@ wm 32 0x63fd90d0 0x00000003 wm 32 0x63fd901c 0x04008010 wm 32 0x63fd901c 0x00008040 wm 32 0x63fd9040 0x0539002b -check 32 while_all_bits_set 0x63fd9040 0x00010000 +check 32 until_all_bits_clear 0x63fd9040 0x00010000 wm 32 0x63fd901c 0x00048033 wm 32 0x63fd901c 0x00848231 wm 32 0x63fd901c 0x00000000 wm 32 0x63fd9048 0x00000001 -check 32 while_all_bits_set 0x63fd9048 0x00000001 +check 32 until_all_bits_clear 0x63fd9048 0x00000001 wm 32 0x63fd901c 0x00048031 wm 32 0x63fd901c 0x00008033 wm 32 0x63fd901c 0x04008010 wm 32 0x63fd901c 0x00048033 wm 32 0x63fd907c 0x90000000 -check 32 while_all_bits_set 0x63fd907c 0x90000000 +check 32 until_all_bits_clear 0x63fd907c 0x90000000 wm 32 0x63fd901c 0x00008033 wm 32 0x63fd901c 0x00000000 wm 32 0x63fd901c 0x04008010 wm 32 0x63fd901c 0x00048033 wm 32 0x63fd90a4 0x00000010 -check 32 while_all_bits_set 0x63fd90a4 0x00000010 +check 32 until_all_bits_clear 0x63fd90a4 0x00000010 wm 32 0x63fd901c 0x00008033 wm 32 0x63fd901c 0x04008010 wm 32 0x63fd901c 0x00048033 wm 32 0x63fd90a0 0x00000010 -check 32 while_all_bits_set 0x63fd90a0 0x00000010 +check 32 until_all_bits_clear 0x63fd90a0 0x00000010 wm 32 0x63fd901c 0x00008033 wm 32 0x63fd901c 0x00000000 wm 32 0x53fa8004 0x00194005 diff --git a/arch/arm/boards/karo-tx53/lowlevel.c b/arch/arm/boards/karo-tx53/lowlevel.c index 9f584fa256..cb324b2007 100644 --- a/arch/arm/boards/karo-tx53/lowlevel.c +++ b/arch/arm/boards/karo-tx53/lowlevel.c @@ -1,23 +1,68 @@ #include <common.h> +#include <debug_ll.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> #include <mach/imx5.h> #include <mach/imx53-regs.h> #include <mach/esdctl.h> #include <mach/generic.h> +#include <asm/cache.h> -void __naked barebox_arm_reset_vector(void) +extern char __dtb_imx53_tx53_xx30_start[]; +extern char __dtb_imx53_tx53_1011_start[]; + +static inline void setup_uart(void) +{ + void __iomem *uart = IOMEM(MX53_UART1_BASE_ADDR); + + writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x270); + writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x274); + writel(0x3, MX53_IOMUXC_BASE_ADDR + 0x878); + + imx53_ungate_all_peripherals(); + imx53_uart_setup(uart); + pbl_set_putc(imx_uart_putc, uart); + + putc_ll('>'); +} + +static void __imx53_tx53_init(int is_xx30) { + void *fdt; + void *fdt_blob_fixed_offset = __dtb_imx53_tx53_1011_start; + + arm_early_mmu_cache_invalidate(); imx5_cpu_lowlevel_init(); + relocate_to_current_adr(); + setup_c(); + barrier(); + arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8); - /* - * For the TX53 rev 8030 the SDRAM setup is not stable without - * the proper PLL setup. It will crash once we enable the MMU, - * so do the PLL setup here. - */ - if (IS_ENABLED(CONFIG_TX53_REV_XX30)) + if (is_xx30) { imx53_init_lowlevel_early(800); + fdt_blob_fixed_offset = __dtb_imx53_tx53_xx30_start; + } + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); - imx53_barebox_entry(NULL); + fdt = fdt_blob_fixed_offset - get_runtime_offset(); + + imx53_barebox_entry(fdt); +} + +ENTRY_FUNCTION(start_imx53_tx53_xx30_samsung, r0, r1, r2) +{ + __imx53_tx53_init(1); +} + +ENTRY_FUNCTION(start_imx53_tx53_xx30, r0, r1, r2) +{ + __imx53_tx53_init(1); +} + +ENTRY_FUNCTION(start_imx53_tx53_1011, r0, r1, r2) +{ + __imx53_tx53_init(0); } diff --git a/arch/arm/boards/karo-tx6x/1600mhz_4x128mx16.imxcfg b/arch/arm/boards/karo-tx6x/1600mhz_4x128mx16.imxcfg index b5c59e3c3c..7e244edfd3 100644 --- a/arch/arm/boards/karo-tx6x/1600mhz_4x128mx16.imxcfg +++ b/arch/arm/boards/karo-tx6x/1600mhz_4x128mx16.imxcfg @@ -1,12 +1,12 @@ /* MDMISC mirroring interleaved (row/bank/col) */ wm 32 MX6_MMDC_P0_MDMISC 0x00000742 -check 32 while_all_bits_clear MX6_MMDC_P0_MDMISC 0x00000002 +check 32 until_all_bits_set MX6_MMDC_P0_MDMISC 0x00000002 wm 32 MX6_MMDC_P0_MDSCR 0x00008000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_any_bit_set MX6_MMDC_P0_MDSCR 0x00004000 wm 32 MX6_MMDC_P0_MDCTL 0x831a0000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDMISC 0x40000000 +check 32 until_any_bit_set MX6_MMDC_P0_MDMISC 0x40000000 wm 32 MX6_MMDC_P0_MDCFG0 0x3f435333 wm 32 MX6_MMDC_P0_MDCFG1 0x926e8a63 @@ -34,7 +34,7 @@ wm 32 MX6_MMDC_P0_MDSCR 0x04008010 wm 32 MX6_MMDC_P0_MDSCR 0x04008040 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xA1390001 -check 32 while_all_bits_clear MX6_MMDC_P0_MPZQHWCTRL 0x00010000 +check 32 until_all_bits_set MX6_MMDC_P0_MPZQHWCTRL 0x00010000 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xA1380000 wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x001e001e @@ -62,11 +62,11 @@ wm 32 MX6_MMDC_P1_MPWRDLCTL 0x40404040 wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 wm 32 MX6_MMDC_P0_MPDGCTRL0 0x80000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MPDGCTRL0 0x80000000 +check 32 until_all_bits_set MX6_MMDC_P0_MPDGCTRL0 0x80000000 wm 32 MX6_MMDC_P0_MPDGCTRL0 0x80000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MPDGCTRL0 0x80000000 +check 32 until_all_bits_set MX6_MMDC_P0_MPDGCTRL0 0x80000000 wm 32 MX6_MMDC_P0_MPDGCTRL0 0x50800000 -check 32 while_all_bits_clear MX6_MMDC_P0_MPDGCTRL0 0x10001000 +check 32 until_all_bits_set MX6_MMDC_P0_MPDGCTRL0 0x10001000 wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 wm 32 MX6_IOM_DRAM_SDQS1 0x00000030 @@ -81,16 +81,16 @@ wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPRDDLHWCTL 0x00000030 wm 32 MX6_MMDC_P1_MPRDDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f -check 32 while_all_bits_clear MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P1_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x00008033 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa138002b wm 32 MX6_MMDC_P0_MDREF 0x00001800 @@ -98,4 +98,4 @@ wm 32 MX6_MMDC_P0_MAPSR 0x00001006 wm 32 MX6_MMDC_P0_MDPDC 0x0002556d wm 32 MX6_MMDC_P1_MDPDC 0x0002556d wm 32 MX6_MMDC_P0_MDSCR 0x00000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_all_bits_set MX6_MMDC_P0_MDSCR 0x00004000 diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg index c58ef4e35a..3f6578e19c 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg @@ -92,11 +92,11 @@ wm 32 MX6_MMDC_P0_MPRDDQBY2DL 0x33333333 wm 32 MX6_MMDC_P0_MPRDDQBY3DL 0x33333333 wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 wm 32 MX6_MMDC_P0_MDMISC 0x00000742 -check 32 while_all_bits_clear MX6_MMDC_P0_MDMISC 0x00000002 +check 32 until_all_bits_set MX6_MMDC_P0_MDMISC 0x00000002 wm 32 MX6_MMDC_P0_MDSCR 0x00008000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_any_bit_set MX6_MMDC_P0_MDSCR 0x00004000 wm 32 MX6_MMDC_P0_MDCTL 0x83190000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDMISC 0x40000000 +check 32 until_any_bit_set MX6_MMDC_P0_MDMISC 0x40000000 wm 32 MX6_MMDC_P0_MDCFG0 0x3f435333 wm 32 MX6_MMDC_P0_MDCFG1 0xb66e8a63 wm 32 MX6_MMDC_P0_MDCFG2 0x01ff00db @@ -117,7 +117,7 @@ wm 32 MX6_MMDC_P0_MAPSR 0x00000001 wm 32 MX6_MMDC_P0_MDSCR 0x04008010 wm 32 MX6_MMDC_P0_MDSCR 0x04008040 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390001 -check 32 while_all_bits_clear MX6_MMDC_P0_MPZQHWCTRL 0x00010000 +check 32 until_all_bits_set MX6_MMDC_P0_MPZQHWCTRL 0x00010000 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1380000 wm 32 MX6_MMDC_P0_MDSCR 0x00048033 wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 @@ -126,14 +126,14 @@ wm 32 MX6_IOM_DRAM_SDQS2 0x00000030 wm 32 MX6_IOM_DRAM_SDQS3 0x00000030 wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPRDDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x00008033 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa138002b wm 32 MX6_MMDC_P0_MDREF 0x00001800 wm 32 MX6_MMDC_P0_MAPSR 0x00001000 wm 32 MX6_MMDC_P0_MDPDC 0x0002556d wm 32 MX6_MMDC_P0_MDSCR 0x00000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_all_bits_set MX6_MMDC_P0_MDSCR 0x00004000 diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg index 56cb3292a9..165b69fb19 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg @@ -119,11 +119,11 @@ wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333 wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 wm 32 MX6_MMDC_P1_MPMUR0 0x00000800 wm 32 MX6_MMDC_P0_MDMISC 0x00000742 -check 32 while_all_bits_clear MX6_MMDC_P0_MDMISC 0x00000002 +check 32 until_all_bits_set MX6_MMDC_P0_MDMISC 0x00000002 wm 32 MX6_MMDC_P0_MDSCR 0x00008000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_any_bit_set MX6_MMDC_P0_MDSCR 0x00004000 wm 32 MX6_MMDC_P0_MDCTL 0x831a0000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDMISC 0x40000000 +check 32 until_any_bit_set MX6_MMDC_P0_MDMISC 0x40000000 wm 32 MX6_MMDC_P0_MDCFG0 0x545a79a4 wm 32 MX6_MMDC_P0_MDCFG1 0xff538e64 wm 32 MX6_MMDC_P0_MDCFG2 0x01ff00dd @@ -145,7 +145,7 @@ wm 32 MX6_MMDC_P0_MAPSR 0x00000001 wm 32 MX6_MMDC_P0_MDSCR 0x04008010 wm 32 MX6_MMDC_P0_MDSCR 0x04008040 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390001 -check 32 while_all_bits_clear MX6_MMDC_P0_MPZQHWCTRL 0x00010000 +check 32 until_all_bits_set MX6_MMDC_P0_MPZQHWCTRL 0x00010000 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1380000 wm 32 MX6_MMDC_P0_MDSCR 0x00048033 wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 @@ -159,19 +159,19 @@ wm 32 MX6_IOM_DRAM_SDQS7 0x00000030 wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPRDDLHWCTL 0x00000030 wm 32 MX6_MMDC_P1_MPRDDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f -check 32 while_all_bits_clear MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P1_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x00008033 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa138002b wm 32 MX6_MMDC_P0_MDREF 0x00001800 wm 32 MX6_MMDC_P0_MAPSR 0x00001000 wm 32 MX6_MMDC_P0_MDPDC 0x00025576 wm 32 MX6_MMDC_P0_MDSCR 0x00000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_all_bits_set MX6_MMDC_P0_MDSCR 0x00004000 diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg index 4eaca00fc7..fc00de957c 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg @@ -128,11 +128,11 @@ wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333 wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 wm 32 MX6_MMDC_P1_MPMUR0 0x00000800 wm 32 MX6_MMDC_P0_MDMISC 0x00000742 -check 32 while_all_bits_clear MX6_MMDC_P0_MDMISC 0x00000002 +check 32 until_all_bits_set MX6_MMDC_P0_MDMISC 0x00000002 wm 32 MX6_MMDC_P0_MDSCR 0x00008000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_any_bit_set MX6_MMDC_P0_MDSCR 0x00004000 wm 32 MX6_MMDC_P0_MDCTL 0x841a0000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDMISC 0x40000000 +check 32 until_any_bit_set MX6_MMDC_P0_MDMISC 0x40000000 wm 32 MX6_MMDC_P0_MDCFG0 0x898f78f4 wm 32 MX6_MMDC_P0_MDCFG1 0xff328e64 wm 32 MX6_MMDC_P0_MDCFG2 0x01ff00db @@ -155,7 +155,7 @@ wm 32 MX6_MMDC_P0_MAPSR 0x00000001 wm 32 MX6_MMDC_P0_MDSCR 0x04008010 wm 32 MX6_MMDC_P0_MDSCR 0x04008040 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390001 -check 32 while_all_bits_clear MX6_MMDC_P0_MPZQHWCTRL 0x00010000 +check 32 until_all_bits_set MX6_MMDC_P0_MPZQHWCTRL 0x00010000 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1380000 wm 32 MX6_MMDC_P0_MDSCR 0x00048033 wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 @@ -169,18 +169,18 @@ wm 32 MX6_IOM_DRAM_SDQS7 0x00000030 wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPRDDLHWCTL 0x00000030 wm 32 MX6_MMDC_P1_MPRDDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f -check 32 while_all_bits_clear MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P1_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x00008033 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa138002b wm 32 MX6_MMDC_P0_MDREF 0x00001800 wm 32 MX6_MMDC_P0_MAPSR 0x00001000 wm 32 MX6_MMDC_P0_MDPDC 0x00025576 wm 32 MX6_MMDC_P0_MDSCR 0x00000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_all_bits_set MX6_MMDC_P0_MDSCR 0x00004000 diff --git a/arch/arm/boards/karo-tx6x/lowlevel.c b/arch/arm/boards/karo-tx6x/lowlevel.c index f2643efb05..7b58a496ef 100644 --- a/arch/arm/boards/karo-tx6x/lowlevel.c +++ b/arch/arm/boards/karo-tx6x/lowlevel.c @@ -53,7 +53,7 @@ ENTRY_FUNCTION(start_imx6dl_tx6x_512m, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = __dtb_imx6dl_tx6u_start - get_runtime_offset(); + fdt = __dtb_imx6dl_tx6u_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_512M, fdt); } @@ -73,7 +73,7 @@ ENTRY_FUNCTION(start_imx6dl_tx6x_1g, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = __dtb_imx6dl_tx6u_start - get_runtime_offset(); + fdt = __dtb_imx6dl_tx6u_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_1G, fdt); } @@ -93,7 +93,7 @@ ENTRY_FUNCTION(start_imx6q_tx6x_1g, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = __dtb_imx6q_tx6q_start - get_runtime_offset(); + fdt = __dtb_imx6q_tx6q_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -113,7 +113,7 @@ ENTRY_FUNCTION(start_imx6q_tx6x_2g, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = __dtb_imx6q_tx6q_start - get_runtime_offset(); + fdt = __dtb_imx6q_tx6q_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } diff --git a/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr1.imxcfg b/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr1.imxcfg index e6b6098973..fae10423c5 100644 --- a/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr1.imxcfg +++ b/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr1.imxcfg @@ -21,7 +21,7 @@ wm 32 0x63f8001c 0x00000080 wm 32 0x63f80020 0x00000002 wm 32 0x63f80024 0x00000001 wm 32 0x63f80000 0x00001232 -check 8 while_any_bit_clear 0x63f80000 0x01 +check 8 until_any_bit_set 0x63f80000 0x01 # Switch pll1_sw_clk to pll1 wm 32 0x53fd400c 0x00000000 @@ -38,7 +38,7 @@ wm 32 0x53FD4098 0x80000004 # CCM DDR div 4 / 200MHz wm 32 0x53fd4098 0x80000004 -check 32 while_all_bits_set 0x53fd408c 0x00000004 +check 32 until_all_bits_clear 0x53fd408c 0x00000004 # IOMUX wm 32 0x53fa8490 0x00180000 @@ -163,4 +163,4 @@ wm 32 0x1400025c 0x00102201 # start DDR wm 32 0x14000000 0x00000101 -check 32 while_any_bit_clear 0x140000a8 0x00000010 +check 32 until_any_bit_set 0x140000a8 0x00000010 diff --git a/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr2.imxcfg b/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr2.imxcfg index ffceac34b5..94436a7b54 100644 --- a/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr2.imxcfg +++ b/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr2.imxcfg @@ -22,7 +22,7 @@ wm 32 0x63f8001c 0x00000080 wm 32 0x63f80020 0x000000b3 wm 32 0x63f80024 0x000000b4 wm 32 0x63f80000 0x00001236 -check 8 while_any_bit_clear 0x63f80000 0x01 +check 8 until_any_bit_set 0x63f80000 0x01 # Switch pll1_sw_clk to pll1 wm 32 0x53fd400c 0x00000000 @@ -39,7 +39,7 @@ wm 32 0x53FD4098 0x80000004 # CCM DDR div 3 / 266MHz wm 32 0x53fd4098 0x80000003 -check 32 while_all_bits_set 0x53fd408c 0x00000004 +check 32 until_all_bits_clear 0x53fd408c 0x00000004 # IOMUX wm 32 0x53fa86ac 0x04000000 @@ -173,4 +173,4 @@ wm 32 0x1400025c 0x00100b01 # start DDR wm 32 0x14000000 0x00000501 -check 32 while_any_bit_clear 0x140000a8 0x00000010 +check 32 until_any_bit_set 0x140000a8 0x00000010 diff --git a/arch/arm/boards/kindle-mx50/lowlevel.c b/arch/arm/boards/kindle-mx50/lowlevel.c index dc321b533b..20f86c8fcb 100644 --- a/arch/arm/boards/kindle-mx50/lowlevel.c +++ b/arch/arm/boards/kindle-mx50/lowlevel.c @@ -20,7 +20,7 @@ ENTRY_FUNCTION(start_imx50_kindle_d01100, r0, r1, r2) imx5_cpu_lowlevel_init(); arm_setup_stack(MX50_IRAM_BASE_ADDR + MX50_IRAM_SIZE - 8); - fdt = __dtb_imx50_kindle_d01100_start - get_runtime_offset(); + fdt = __dtb_imx50_kindle_d01100_start + get_runtime_offset(); barebox_arm_entry(MX50_CSD0_BASE_ADDR, SZ_256M, fdt); } @@ -32,7 +32,7 @@ ENTRY_FUNCTION(start_imx50_kindle_d01200, r0, r1, r2) imx5_cpu_lowlevel_init(); arm_setup_stack(MX50_IRAM_BASE_ADDR + MX50_IRAM_SIZE - 8); - fdt = __dtb_imx50_kindle_d01200_start - get_runtime_offset(); + fdt = __dtb_imx50_kindle_d01200_start + get_runtime_offset(); barebox_arm_entry(MX50_CSD0_BASE_ADDR, SZ_256M, fdt); } @@ -44,7 +44,7 @@ ENTRY_FUNCTION(start_imx50_kindle_ey21, r0, r1, r2) imx5_cpu_lowlevel_init(); arm_setup_stack(MX50_IRAM_BASE_ADDR + MX50_IRAM_SIZE - 8); - fdt = __dtb_imx50_kindle_ey21_start - get_runtime_offset(); + fdt = __dtb_imx50_kindle_ey21_start + get_runtime_offset(); barebox_arm_entry(MX50_CSD0_BASE_ADDR, SZ_256M, fdt); } diff --git a/arch/arm/boards/kontron-samx6i/Makefile b/arch/arm/boards/kontron-samx6i/Makefile new file mode 100644 index 0000000000..816962241a --- /dev/null +++ b/arch/arm/boards/kontron-samx6i/Makefile @@ -0,0 +1,2 @@ +obj-y += board.o mem.o +lwl-y += lowlevel.o mem.o diff --git a/arch/arm/boards/kontron-samx6i/board.c b/arch/arm/boards/kontron-samx6i/board.c new file mode 100644 index 0000000000..01826b67d2 --- /dev/null +++ b/arch/arm/boards/kontron-samx6i/board.c @@ -0,0 +1,103 @@ +/* + * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#define pr_fmt(fmt) "samx6i: " fmt + +#include <malloc.h> +#include <envfs.h> +#include <environment.h> +#include <bootsource.h> +#include <common.h> +#include <init.h> +#include <of.h> +#include <mach/bbu.h> +#include <mach/esdctl.h> + +#include <asm/armlinux.h> + +resource_size_t samx6i_get_size(void); + +/* + * On this board the SDRAM size is always configured by pin selection. + */ +static int samx6i_sdram_fixup(void) +{ + if (!(of_machine_is_compatible("kontron,imx6q-samx6i") || + of_machine_is_compatible("kontron,imx6dl-samx6i"))) + return 0; + + imx_esdctl_disable(); + + return 0; +} +postcore_initcall(samx6i_sdram_fixup); + +static int samx6i_mem_init(void) +{ + resource_size_t size = 0; + + if (!(of_machine_is_compatible("kontron,imx6q-samx6i") || + of_machine_is_compatible("kontron,imx6dl-samx6i"))) + return 0; + + size = samx6i_get_size(); + if (size) + arm_add_mem_device("ram0", 0x10000000, size); + + return 0; +} +mem_initcall(samx6i_mem_init); + +static int samx6i_devices_init(void) +{ + int ret; + char *environment_path, *envdev; + int flag_spi = 0, flag_mmc = 0; + + if (!(of_machine_is_compatible("kontron,imx6q-samx6i") || + of_machine_is_compatible("kontron,imx6dl-samx6i"))) + return 0; + + barebox_set_hostname("samx6i"); + + switch (bootsource_get()) { + case BOOTSOURCE_MMC: + environment_path = basprintf("/chosen/environment-sd%d", + bootsource_get_instance() + 1); + envdev = "MMC"; + flag_mmc = BBU_HANDLER_FLAG_DEFAULT; + break; + default: + environment_path = basprintf("/chosen/environment-spinor"); + envdev = "SPI NOR flash"; + flag_spi = BBU_HANDLER_FLAG_DEFAULT; + break; + } + + ret = of_device_enable_path(environment_path); + if (ret < 0) + pr_warn("Failed to enable environment partition '%s' (%d)\n", + environment_path, ret); + free(environment_path); + + pr_notice("Using environment in %s\n", envdev); + + imx6_bbu_internal_spi_i2c_register_handler("m25p80", + "/dev/m25p0.bootloader", + flag_spi); + + imx6_bbu_internal_mmc_register_handler("mmc3", + "/dev/mmc3.bootloader", + flag_mmc); + + return 0; +} +device_initcall(samx6i_devices_init); diff --git a/arch/arm/boards/kontron-samx6i/flash-header-samx6i-duallite.imxcfg b/arch/arm/boards/kontron-samx6i/flash-header-samx6i-duallite.imxcfg new file mode 100644 index 0000000000..9906617083 --- /dev/null +++ b/arch/arm/boards/kontron-samx6i/flash-header-samx6i-duallite.imxcfg @@ -0,0 +1,102 @@ +soc imx6 +loadaddr 0x10000000 +dcdofs 0x400 + +wm 32 0x020e0774 0x000c0000 +wm 32 0x020e0754 0x00000000 + +wm 32 0x020e04ac 0x00000030 +wm 32 0x020e04b0 0x00000030 + +wm 32 0x020e0464 0x00000030 +wm 32 0x020e0490 0x00000030 +wm 32 0x020e074c 0x00000030 + +wm 32 0x020e0494 0x000c0030 +wm 32 0x020e04a4 0x00003000 +wm 32 0x020e04a8 0x00003000 +wm 32 0x020e04a0 0x00000000 +wm 32 0x020e04b4 0x00003030 +wm 32 0x020e04b8 0x00003030 +wm 32 0x020e076c 0x00000030 + +wm 32 0x020e0750 0x00020000 +wm 32 0x020e04bc 0x00000038 +wm 32 0x020e04c0 0x00000038 +wm 32 0x020e04c4 0x00000038 +wm 32 0x020e04c8 0x00000038 +wm 32 0x020e04cc 0x00000038 +wm 32 0x020e04d0 0x00000038 +wm 32 0x020e04d4 0x00000038 +wm 32 0x020e04d8 0x00000038 + +wm 32 0x020e0760 0x00020000 +wm 32 0x020e0764 0x00000030 +wm 32 0x020e0770 0x00000030 +wm 32 0x020e0778 0x00000030 +wm 32 0x020e077c 0x00000030 +wm 32 0x020e0780 0x00000030 +wm 32 0x020e0784 0x00000030 +wm 32 0x020e078c 0x00000030 +wm 32 0x020e0748 0x00000030 + +wm 32 0x020e0470 0x00000030 +wm 32 0x020e0474 0x00000030 +wm 32 0x020e0478 0x00000030 +wm 32 0x020e047c 0x00000030 +wm 32 0x020e0480 0x00000030 +wm 32 0x020e0484 0x00000030 +wm 32 0x020e0488 0x00000030 +wm 32 0x020e048c 0x000C0030 + +wm 32 0x021b0800 0xa1390003 +wm 32 0x021b4800 0xa1390003 + +wm 32 0x021b080c 0x0040003c +wm 32 0x021b0810 0x0032003e + +wm 32 0x021b083c 0x42350231 +wm 32 0x021b0840 0x021a0218 +wm 32 0x021b0848 0x4b4b4e49 +wm 32 0x021b0850 0x3f3f3035 + +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b481c 0x33333333 +wm 32 0x021b4820 0x33333333 +wm 32 0x021b4824 0x33333333 +wm 32 0x021b4828 0x33333333 + + +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 + +wm 32 0x021b0004 0x0002002d +wm 32 0x021b0008 0x00333030 +wm 32 0x021b000c 0x696d5323 +wm 32 0x021b0010 0xb66e8c63 +wm 32 0x021b0014 0x01ff00db +wm 32 0x021b0018 0x00001740 +wm 32 0x021b001c 0x00008000 +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x006d0e21 +wm 32 0x021b0040 0x00000027 +wm 32 0x021b0000 0x84190000 +wm 32 0x021b001c 0x04008032 +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x00048031 +wm 32 0x021b001c 0x07208030 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b0020 0x00005800 +wm 32 0x021b0818 0x00022227 +wm 32 0x021b4818 0x00022227 +wm 32 0x021b0004 0x0002556d +wm 32 0x021b4004 0x00011006 +wm 32 0x021b001c 0x00000000 + +wm 32 0x020e0010 0xf00000ff + +wm 32 0x020e0018 0x00070007 +wm 32 0x020e001c 0x00070007 diff --git a/arch/arm/boards/kontron-samx6i/flash-header-samx6i-quad.imxcfg b/arch/arm/boards/kontron-samx6i/flash-header-samx6i-quad.imxcfg new file mode 100644 index 0000000000..7e6ffd7983 --- /dev/null +++ b/arch/arm/boards/kontron-samx6i/flash-header-samx6i-quad.imxcfg @@ -0,0 +1,118 @@ +soc imx6 +loadaddr 0x10000000 +dcdofs 0x400 + +wm 32 0x020e05a8 0x00000030 +wm 32 0x020e05b0 0x00000030 +wm 32 0x020e0524 0x00000030 +wm 32 0x020e051c 0x00000030 + +wm 32 0x020e0518 0x00000030 +wm 32 0x020e050c 0x00000030 +wm 32 0x020e05b8 0x00000030 +wm 32 0x020e05c0 0x00000030 + +wm 32 0x020e05ac 0x00020030 +wm 32 0x020e05b4 0x00020030 +wm 32 0x020e0528 0x00020030 +wm 32 0x020e0520 0x00020030 + +wm 32 0x020e0514 0x00020030 +wm 32 0x020e0510 0x00020030 +wm 32 0x020e05bc 0x00020030 +wm 32 0x020e05c4 0x00020030 + +wm 32 0x020e056c 0x00020030 +wm 32 0x020e0578 0x00020030 +wm 32 0x020e0588 0x00020030 +wm 32 0x020e0594 0x00020030 + +wm 32 0x020e057c 0x00020030 +wm 32 0x020e0590 0x00003000 +wm 32 0x020e0598 0x00003000 +wm 32 0x020e058c 0x00000000 + +wm 32 0x020e059c 0x00003030 +wm 32 0x020e05a0 0x00003030 +wm 32 0x020e0784 0x00000030 +wm 32 0x020e0788 0x00000030 + +wm 32 0x020e0794 0x00000030 +wm 32 0x020e079c 0x00000030 +wm 32 0x020e07a0 0x00000030 +wm 32 0x020e07a4 0x00000030 + +wm 32 0x020e07a8 0x00000030 +wm 32 0x020e0748 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e0750 0x00020000 + +wm 32 0x020e0758 0x00000000 +wm 32 0x020e0774 0x00020000 +wm 32 0x020e078c 0x00000030 +wm 32 0x020e0798 0x000C0000 + +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 + +wm 32 0x021b481c 0x33333333 +wm 32 0x021b4820 0x33333333 +wm 32 0x021b4824 0x33333333 +wm 32 0x021b4828 0x33333333 + +wm 32 0x021b0018 0x00081740 + +wm 32 0x021b001c 0x00008000 +wm 32 0x021b000c 0x898E7975 +wm 32 0x021b0010 0xFF538E64 +wm 32 0x021b0014 0x01FF00DD +wm 32 0x021b002c 0x000026D2 + +wm 32 0x021b0030 0x005B0E21 +wm 32 0x021b0008 0x09444040 +wm 32 0x021b0004 0x00025576 +/* CS0_END = 4GB */ +wm 32 0x021b0040 0x0000007F + +wm 32 0x021b0000 0x841A0000 + +wm 32 0x021b001c 0x04088032 +wm 32 0x021b001c 0x00008033 +wm 32 0x021b001c 0x00428031 +wm 32 0x021b001c 0x09408030 + +wm 32 0x021b001c 0x04008040 +wm 32 0x021b0800 0xA1390003 +wm 32 0x021b4800 0xA1390003 +wm 32 0x021b0020 0x00007800 +wm 32 0x021b0818 0x00022227 +wm 32 0x021b4818 0x00022227 + +wm 32 0x021b083c 0x42740304 +wm 32 0x021b0840 0x026e0265 +wm 32 0x021b483c 0x02750306 +wm 32 0x021b4840 0x02720244 +wm 32 0x021b0848 0x463d4041 +wm 32 0x021b4848 0x42413c47 +wm 32 0x021b0850 0x37414441 +wm 32 0x021b4850 0x4633473b + +wm 32 0x021b080c 0x0025001f +wm 32 0x021b0810 0x00290027 + +wm 32 0x021b480c 0x001f002b +wm 32 0x021b4810 0x000f0029 + +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 + +wm 32 0x021b001c 0x00000000 +wm 32 0x021b0404 0x00011006 + +/* enable AXI cache for VDOA/VPU/IPU */ +wm 32 0x020e0010 0xF00000FF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +wm 32 0x020e0018 0x007F007F +wm 32 0x020e001c 0x007F007F diff --git a/arch/arm/boards/kontron-samx6i/lowlevel.c b/arch/arm/boards/kontron-samx6i/lowlevel.c new file mode 100644 index 0000000000..4113ddbb40 --- /dev/null +++ b/arch/arm/boards/kontron-samx6i/lowlevel.c @@ -0,0 +1,66 @@ +/* + * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <debug_ll.h> +#include <common.h> +#include <io.h> +#include <asm/barebox-arm-head.h> +#include <asm/barebox-arm.h> +#include <asm/sections.h> +#include <asm/cache.h> +#include <asm/mmu.h> +#include <mach/imx6.h> +#include <mach/esdctl.h> + +resource_size_t samx6i_get_size(void); + +static inline void setup_uart(void) +{ + void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR; + + writel(0x4, iomuxbase + 0x016c); + + imx6_ungate_all_peripherals(); + imx6_uart_setup_ll(); + + putc_ll('>'); +} + +static void __noreturn start_imx6_samx6i_common(void *fdt_blob_fixed_offset) +{ + void *fdt; + resource_size_t size = 0; + + size = samx6i_get_size(); + + imx6_cpu_lowlevel_init(); + arm_setup_stack(0x00920000 - 8); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + fdt = fdt_blob_fixed_offset - get_runtime_offset(); + + barebox_arm_entry(0x10000000, size, fdt); +} + +extern char __dtb_imx6dl_samx6i_start[]; +extern char __dtb_imx6q_samx6i_start[]; + +ENTRY_FUNCTION(start_imx6q_samx6i, r0, r1, r2) +{ + start_imx6_samx6i_common(__dtb_imx6q_samx6i_start); +} + +ENTRY_FUNCTION(start_imx6dl_samx6i, r0, r1, r2) +{ + start_imx6_samx6i_common(__dtb_imx6dl_samx6i_start); +} diff --git a/arch/arm/boards/kontron-samx6i/mem.c b/arch/arm/boards/kontron-samx6i/mem.c new file mode 100644 index 0000000000..ab9969e32c --- /dev/null +++ b/arch/arm/boards/kontron-samx6i/mem.c @@ -0,0 +1,85 @@ +/* + * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <linux/sizes.h> +#include <common.h> +#include <mach/iomux-mx6.h> +#include <mach/imx-gpio.h> +#include <mach/imx6.h> + +#define PCBVERSION_PIN IMX_GPIO_NR(2, 2) +#define PCBID0_PIN IMX_GPIO_NR(6, 7) +#define PCBID1_PIN IMX_GPIO_NR(6, 9) + +#define MX6S_PAD_NANDF_CLE__GPIO_6_7 \ + IOMUX_PAD(0x0658, 0x0270, 5, 0x0000, 0, 0) +#define MX6S_PAD_NANDF_WP_B__GPIO_6_9 \ + IOMUX_PAD(0x0690, 0x02A8, 5, 0x0000, 0, 0) +#define MX6S_PAD_NANDF_D2__GPIO_2_2 \ + IOMUX_PAD(0x028c, 0x0674, 5, 0x0000, 0, 0) + +resource_size_t samx6i_get_size(void) +{ + resource_size_t size = 0; + int ver, id0, id1; + int cpu_type = __imx6_cpu_type(); + void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR); + void __iomem *gpio6 = IOMEM(MX6_GPIO6_BASE_ADDR); + void __iomem *gpio2 = IOMEM(MX6_GPIO2_BASE_ADDR); + + if (cpu_type == IMX6_CPUTYPE_IMX6D || + cpu_type == IMX6_CPUTYPE_IMX6Q) { + imx_setup_pad(iomuxbase, MX6Q_PAD_NANDF_CLE__GPIO_6_7); + imx_setup_pad(iomuxbase, MX6Q_PAD_NANDF_WP_B__GPIO_6_9); + imx_setup_pad(iomuxbase, MX6Q_PAD_NANDF_D2__GPIO_2_2); + } else if (cpu_type == IMX6_CPUTYPE_IMX6S || + cpu_type == IMX6_CPUTYPE_IMX6DL) { + imx_setup_pad(iomuxbase, MX6S_PAD_NANDF_CLE__GPIO_6_7); + imx_setup_pad(iomuxbase, MX6S_PAD_NANDF_WP_B__GPIO_6_9); + imx_setup_pad(iomuxbase, MX6S_PAD_NANDF_D2__GPIO_2_2); + }; + + imx6_gpio_direction_input(gpio6, 6); + imx6_gpio_direction_input(gpio6, 9); + imx6_gpio_direction_input(gpio2, 2); + + ver = imx6_gpio_val(gpio2, 2); + id0 = imx6_gpio_val(gpio6, 7); + id1 = imx6_gpio_val(gpio6, 9); + + if (cpu_type == IMX6_CPUTYPE_IMX6D || + cpu_type == IMX6_CPUTYPE_IMX6Q) { + if (ver) + size = SZ_1G; + else if (id0 && id1) + size = SZ_2G; + else if (id0) + size = SZ_2G; + else if (id1) + size = SZ_1G; + else + size = SZ_512M; + } else if (cpu_type == IMX6_CPUTYPE_IMX6S || + cpu_type == IMX6_CPUTYPE_IMX6DL) { + if (ver) + size = SZ_512M; + if (id0 && id1) + size = SZ_2G; + else if (id0) + size = SZ_1G; + else if (id1) + size = SZ_512M; + else + size = SZ_128M; + } + + return size; +} diff --git a/arch/arm/boards/lenovo-ix4-300d/lowlevel.c b/arch/arm/boards/lenovo-ix4-300d/lowlevel.c index f8313cd210..40145b5cef 100644 --- a/arch/arm/boards/lenovo-ix4-300d/lowlevel.c +++ b/arch/arm/boards/lenovo-ix4-300d/lowlevel.c @@ -28,7 +28,7 @@ ENTRY_FUNCTION(start_lenovo_ix4_300d, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_armada_xp_lenovo_ix4_300d_bb_start - + fdt = __dtb_armada_xp_lenovo_ix4_300d_bb_start + get_runtime_offset(); armada_370_xp_barebox_entry(fdt); diff --git a/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c b/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c index da6d4aaf4e..e62627c324 100644 --- a/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c +++ b/arch/arm/boards/marvell-armada-xp-gp/lowlevel.c @@ -28,7 +28,7 @@ ENTRY_FUNCTION(start_marvell_armada_xp_gp, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_armada_xp_gp_bb_start - get_runtime_offset(); + fdt = __dtb_armada_xp_gp_bb_start + get_runtime_offset(); armada_370_xp_barebox_entry(fdt); } diff --git a/arch/arm/boards/netgear-rn104/lowlevel.c b/arch/arm/boards/netgear-rn104/lowlevel.c index 97590d8a6f..8a53615018 100644 --- a/arch/arm/boards/netgear-rn104/lowlevel.c +++ b/arch/arm/boards/netgear-rn104/lowlevel.c @@ -15,7 +15,7 @@ ENTRY_FUNCTION(start_netgear_rn104, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_armada_370_rn104_bb_start - + fdt = __dtb_armada_370_rn104_bb_start + get_runtime_offset(); armada_370_xp_barebox_entry(fdt); diff --git a/arch/arm/boards/netgear-rn2120/lowlevel.c b/arch/arm/boards/netgear-rn2120/lowlevel.c index 59b9985ca9..e05f2f4c17 100644 --- a/arch/arm/boards/netgear-rn2120/lowlevel.c +++ b/arch/arm/boards/netgear-rn2120/lowlevel.c @@ -51,7 +51,7 @@ ENTRY_FUNCTION(start_netgear_rn2120, r0, r1, r2) /* Win 0 Control Register: size=0x4000000, wincs=0, en=1 */ writel(0x3fffffe1, base + 0x20184); - fdt = __dtb_armada_xp_rn2120_bb_start - + fdt = __dtb_armada_xp_rn2120_bb_start + get_runtime_offset(); armada_370_xp_barebox_entry(fdt); diff --git a/arch/arm/boards/phytec-phycard-imx27/lowlevel.c b/arch/arm/boards/phytec-phycard-imx27/lowlevel.c index 7e4a9f02f0..e1132e0b54 100644 --- a/arch/arm/boards/phytec-phycard-imx27/lowlevel.c +++ b/arch/arm/boards/phytec-phycard-imx27/lowlevel.c @@ -109,7 +109,7 @@ ENTRY_FUNCTION(start_phytec_phycard_imx27, r0, r1, r2) arm_setup_stack(MX27_IRAM_BASE_ADDR + MX27_IRAM_SIZE - 12); - fdt = __dtb_imx27_phytec_phycard_s_rdk_bb_start - get_runtime_offset(); + fdt = __dtb_imx27_phytec_phycard_s_rdk_bb_start + get_runtime_offset(); phytec_phycard_imx27_common_init(fdt); } diff --git a/arch/arm/boards/phytec-phycore-imx27/lowlevel.c b/arch/arm/boards/phytec-phycore-imx27/lowlevel.c index b9b2ab5935..b858ff348b 100644 --- a/arch/arm/boards/phytec-phycore-imx27/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-imx27/lowlevel.c @@ -108,7 +108,7 @@ ENTRY_FUNCTION(start_phytec_phycore_imx27, r0, r1, r2) arm_setup_stack(MX27_IRAM_BASE_ADDR + MX27_IRAM_SIZE - 12); - fdt = __dtb_imx27_phytec_phycore_rdk_start - get_runtime_offset(); + fdt = __dtb_imx27_phytec_phycore_rdk_start + get_runtime_offset(); phytec_phycorce_imx27_common_init(fdt); } diff --git a/arch/arm/boards/phytec-phycore-imx7/flash-header-phytec-phycore-imx7.imxcfg b/arch/arm/boards/phytec-phycore-imx7/flash-header-phytec-phycore-imx7.imxcfg index 6c256e8fc5..6e08b6c1b1 100644 --- a/arch/arm/boards/phytec-phycore-imx7/flash-header-phytec-phycore-imx7.imxcfg +++ b/arch/arm/boards/phytec-phycore-imx7/flash-header-phytec-phycore-imx7.imxcfg @@ -65,7 +65,7 @@ wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e407304 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e447304 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e447306 -check 32 while_any_bit_clear MX7_DDR_PHY_ZQ_CON1 0x1 +check 32 until_any_bit_set MX7_DDR_PHY_ZQ_CON1 0x1 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e447304 wm 32 MX7_DDR_PHY_ZQ_CON0 0x0e407304 @@ -75,4 +75,4 @@ wm 32 0x30340020 0x00000178 wm 32 0x30384130 0x00000002 wm 32 MX7_DDR_PHY_LP_CON0 0x0000000f -check 32 while_any_bit_clear MX7_DDRC_STAT 0x1 +check 32 until_any_bit_set MX7_DDRC_STAT 0x1 diff --git a/arch/arm/boards/phytec-phycore-imx7/lowlevel.c b/arch/arm/boards/phytec-phycore-imx7/lowlevel.c index ee2d7ae553..3d2038e4a8 100644 --- a/arch/arm/boards/phytec-phycore-imx7/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-imx7/lowlevel.c @@ -29,7 +29,7 @@ static noinline void phytec_phycore_imx7_start(void) pr_debug("Phytec phyCORE i.MX7\n"); - fdt = __dtb_imx7d_phyboard_zeta_start - get_runtime_offset(); + fdt = __dtb_imx7d_phyboard_zeta_start + get_runtime_offset(); barebox_arm_entry(0x80000000, SZ_512M, fdt); } @@ -45,4 +45,4 @@ ENTRY_FUNCTION(start_phytec_phycore_imx7, r0, r1, r2) barrier(); phytec_phycore_imx7_start(); -}
\ No newline at end of file +} diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c index 338d13a391..a028449fc0 100644 --- a/arch/arm/boards/phytec-som-am335x/lowlevel.c +++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c @@ -210,7 +210,7 @@ static noinline void physom_board_entry(unsigned long bootinfo, int sdram, ENTRY_FUNCTION(name, bootinfo, r1, r2) \ { \ extern char __dtb_z_##fdt_name##_start[]; \ - void *fdt = __dtb_z_##fdt_name##_start - \ + void *fdt = __dtb_z_##fdt_name##_start + \ get_runtime_offset(); \ physom_board_entry(bootinfo, 0, fdt, module_family); \ } @@ -219,7 +219,7 @@ static noinline void physom_board_entry(unsigned long bootinfo, int sdram, ENTRY_FUNCTION(name, bootinfo, r1, r2) \ { \ extern char __dtb_z_##fdt_name##_start[]; \ - void *fdt = __dtb_z_##fdt_name##_start - \ + void *fdt = __dtb_z_##fdt_name##_start + \ get_runtime_offset(); \ physom_board_entry(bootinfo, sdram, fdt, NONE); \ } @@ -228,7 +228,7 @@ static noinline void physom_board_entry(unsigned long bootinfo, int sdram, ENTRY_FUNCTION(name, r0, r1, r2) \ { \ extern char __dtb_z_##fdt_name##_start[]; \ - void *fdt = __dtb_z_##fdt_name##_start - \ + void *fdt = __dtb_z_##fdt_name##_start + \ get_runtime_offset(); \ am335x_barebox_entry(fdt); \ } diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c index 29811d34ef..12c3cfa642 100644 --- a/arch/arm/boards/phytec-som-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c @@ -68,7 +68,7 @@ static void __noreturn start_imx6_phytec_common(uint32_t size, if (do_early_uart_config && IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = fdt_blob_fixed_offset - get_runtime_offset(); + fdt = fdt_blob_fixed_offset + get_runtime_offset(); if (cpu_type == IMX6_CPUTYPE_IMX6UL || cpu_type == IMX6_CPUTYPE_IMX6ULL) diff --git a/arch/arm/boards/phytec-som-rk3288/lowlevel.c b/arch/arm/boards/phytec-som-rk3288/lowlevel.c index 7649ef864a..9def80ddb8 100644 --- a/arch/arm/boards/phytec-som-rk3288/lowlevel.c +++ b/arch/arm/boards/phytec-som-rk3288/lowlevel.c @@ -37,7 +37,7 @@ ENTRY_FUNCTION(start_rk3288_phycore_som, r0, r1, r2) GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); INIT_LL(); } - fdt = __dtb_rk3288_phycore_som_start - get_runtime_offset(); + fdt = __dtb_rk3288_phycore_som_start + get_runtime_offset(); barebox_arm_entry(0x0, SZ_1G, fdt); } diff --git a/arch/arm/boards/plathome-openblocks-a6/lowlevel.c b/arch/arm/boards/plathome-openblocks-a6/lowlevel.c index 785ec210dc..31a28c8916 100644 --- a/arch/arm/boards/plathome-openblocks-a6/lowlevel.c +++ b/arch/arm/boards/plathome-openblocks-a6/lowlevel.c @@ -25,7 +25,7 @@ ENTRY_FUNCTION(start_plathome_openblocks_a6, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_kirkwood_openblocks_a6_bb_start - + fdt = __dtb_kirkwood_openblocks_a6_bb_start + get_runtime_offset(); kirkwood_barebox_entry(fdt); diff --git a/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c b/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c index ae3664defc..f029bd1ba6 100644 --- a/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c +++ b/arch/arm/boards/plathome-openblocks-ax3/lowlevel.c @@ -28,7 +28,7 @@ ENTRY_FUNCTION(start_plathome_openblocks_ax3, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_armada_xp_openblocks_ax3_4_bb_start - + fdt = __dtb_armada_xp_openblocks_ax3_4_bb_start + get_runtime_offset(); armada_370_xp_barebox_entry(fdt); diff --git a/arch/arm/boards/qemu-virt64/init.c b/arch/arm/boards/qemu-virt64/init.c index a85bd84db7..19cfcae1f0 100644 --- a/arch/arm/boards/qemu-virt64/init.c +++ b/arch/arm/boards/qemu-virt64/init.c @@ -8,6 +8,7 @@ #include <init.h> #include <asm/armlinux.h> #include <asm/system_info.h> +#include <asm/pgtable64.h> #include <mach/devices.h> #include <environment.h> #include <linux/sizes.h> @@ -61,16 +62,3 @@ static int virt_core_init(void) return 0; } postcore_initcall(virt_core_init); - -#ifdef CONFIG_MMU -static int virt_mmu_enable(void) -{ - /* Mapping all periph and flash range */ - arch_remap_range((void *)0x00000000, 0x40000000, DEV_MEM); - - mmu_enable(); - - return 0; -} -postmmu_initcall(virt_mmu_enable); -#endif diff --git a/arch/arm/boards/radxa-rock/lowlevel.c b/arch/arm/boards/radxa-rock/lowlevel.c index 1c07bc3377..611dc938cf 100644 --- a/arch/arm/boards/radxa-rock/lowlevel.c +++ b/arch/arm/boards/radxa-rock/lowlevel.c @@ -24,7 +24,7 @@ ENTRY_FUNCTION(start_radxa_rock, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_rk3188_radxarock_start - get_runtime_offset(); + fdt = __dtb_rk3188_radxarock_start + get_runtime_offset(); barebox_arm_entry(0x60000000, SZ_2G, fdt); } diff --git a/arch/arm/boards/raspberry-pi/lowlevel.c b/arch/arm/boards/raspberry-pi/lowlevel.c index 4e71e29e0c..cbc6caa4b9 100644 --- a/arch/arm/boards/raspberry-pi/lowlevel.c +++ b/arch/arm/boards/raspberry-pi/lowlevel.c @@ -7,7 +7,7 @@ extern char __dtb_bcm2835_rpi_start[]; ENTRY_FUNCTION(start_raspberry_pi1, r0, r1, r2) { - void *fdt = __dtb_bcm2835_rpi_start - get_runtime_offset(); + void *fdt = __dtb_bcm2835_rpi_start + get_runtime_offset(); arm_cpu_lowlevel_init(); @@ -17,7 +17,7 @@ ENTRY_FUNCTION(start_raspberry_pi1, r0, r1, r2) extern char __dtb_bcm2836_rpi_2_start[]; ENTRY_FUNCTION(start_raspberry_pi2, r0, r1, r2) { - void *fdt = __dtb_bcm2836_rpi_2_start - get_runtime_offset(); + void *fdt = __dtb_bcm2836_rpi_2_start + get_runtime_offset(); arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c b/arch/arm/boards/reflex-achilles/lowlevel.c index 12994177cc..25e7ad0f1c 100644 --- a/arch/arm/boards/reflex-achilles/lowlevel.c +++ b/arch/arm/boards/reflex-achilles/lowlevel.c @@ -33,7 +33,7 @@ static noinline void achilles_entry(void) puts_ll("SDRAM setup done\n"); - fdt = __dtb_socfpga_arria10_achilles_start - get_runtime_offset(); + fdt = __dtb_socfpga_arria10_achilles_start + get_runtime_offset(); barebox_arm_entry(0x0, SZ_2G + SZ_1G, fdt); } diff --git a/arch/arm/boards/solidrun-cubox/lowlevel.c b/arch/arm/boards/solidrun-cubox/lowlevel.c index 071309ee3d..ec63986b38 100644 --- a/arch/arm/boards/solidrun-cubox/lowlevel.c +++ b/arch/arm/boards/solidrun-cubox/lowlevel.c @@ -29,7 +29,7 @@ ENTRY_FUNCTION(start_solidrun_cubox, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_dove_cubox_bb_start - get_runtime_offset(); + fdt = __dtb_dove_cubox_bb_start + get_runtime_offset(); dove_barebox_entry(fdt); } diff --git a/arch/arm/boards/solidrun-microsom/lowlevel.c b/arch/arm/boards/solidrun-microsom/lowlevel.c index cc15958d64..ea204e15f3 100644 --- a/arch/arm/boards/solidrun-microsom/lowlevel.c +++ b/arch/arm/boards/solidrun-microsom/lowlevel.c @@ -15,7 +15,7 @@ ENTRY_FUNCTION(start_hummingboard_microsom_i1, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6dl_hummingboard_start - get_runtime_offset(); + fdt = __dtb_imx6dl_hummingboard_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -25,7 +25,7 @@ ENTRY_FUNCTION(start_hummingboard_microsom_i2, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6dl_hummingboard_start - get_runtime_offset(); + fdt = __dtb_imx6dl_hummingboard_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -35,7 +35,7 @@ ENTRY_FUNCTION(start_hummingboard_microsom_i2ex, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_hummingboard_start - get_runtime_offset(); + fdt = __dtb_imx6q_hummingboard_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -45,7 +45,7 @@ ENTRY_FUNCTION(start_hummingboard_microsom_i4, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_hummingboard_start - get_runtime_offset(); + fdt = __dtb_imx6q_hummingboard_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -55,7 +55,7 @@ ENTRY_FUNCTION(start_hummingboard2_microsom_i1, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6dl_hummingboard2_start - get_runtime_offset(); + fdt = __dtb_imx6dl_hummingboard2_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -65,7 +65,7 @@ ENTRY_FUNCTION(start_hummingboard2_microsom_i2, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6dl_hummingboard2_start - get_runtime_offset(); + fdt = __dtb_imx6dl_hummingboard2_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -75,7 +75,7 @@ ENTRY_FUNCTION(start_hummingboard2_microsom_i2ex, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_hummingboard2_start - get_runtime_offset(); + fdt = __dtb_imx6q_hummingboard2_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -85,7 +85,7 @@ ENTRY_FUNCTION(start_hummingboard2_microsom_i4, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_hummingboard2_start - get_runtime_offset(); + fdt = __dtb_imx6q_hummingboard2_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } @@ -95,6 +95,6 @@ ENTRY_FUNCTION(start_h100_microsom_i2ex, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_h100_start - get_runtime_offset(); + fdt = __dtb_imx6q_h100_start + get_runtime_offset(); imx6q_barebox_entry(fdt); } diff --git a/arch/arm/boards/technexion-pico-hobbit/lowlevel.c b/arch/arm/boards/technexion-pico-hobbit/lowlevel.c index f351e67dd7..77f48043da 100644 --- a/arch/arm/boards/technexion-pico-hobbit/lowlevel.c +++ b/arch/arm/boards/technexion-pico-hobbit/lowlevel.c @@ -55,7 +55,7 @@ static void __noreturn start_imx6_pico_hobbit_common(uint32_t size, writew(0x0, 0x020c0008); writew(0x0, 0x021e4008); - fdt = fdt_blob_fixed_offset - get_runtime_offset(); + fdt = fdt_blob_fixed_offset + get_runtime_offset(); imx6ul_barebox_entry(fdt); } diff --git a/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c b/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c index 1d5ea6b12a..dfb8271724 100644 --- a/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c +++ b/arch/arm/boards/terasic-de0-nano-soc/lowlevel.c @@ -26,7 +26,7 @@ ENTRY_FUNCTION(start_socfpga_de0_nano_soc, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_socfpga_cyclone5_de0_nano_soc_start - get_runtime_offset(); + fdt = __dtb_socfpga_cyclone5_de0_nano_soc_start + get_runtime_offset(); barebox_arm_entry(0x0, SZ_1G, fdt); } diff --git a/arch/arm/boards/terasic-sockit/lowlevel.c b/arch/arm/boards/terasic-sockit/lowlevel.c index 0a6eb21365..05b7d800a2 100644 --- a/arch/arm/boards/terasic-sockit/lowlevel.c +++ b/arch/arm/boards/terasic-sockit/lowlevel.c @@ -52,7 +52,7 @@ ENTRY_FUNCTION(start_socfpga_sockit, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_socfpga_cyclone5_sockit_start - get_runtime_offset(); + fdt = __dtb_socfpga_cyclone5_sockit_start + get_runtime_offset(); barebox_arm_entry(0x0, SZ_1G, fdt); } diff --git a/arch/arm/boards/tqma53/lowlevel.c b/arch/arm/boards/tqma53/lowlevel.c index 0cb5952608..0d0b16846c 100644 --- a/arch/arm/boards/tqma53/lowlevel.c +++ b/arch/arm/boards/tqma53/lowlevel.c @@ -51,7 +51,7 @@ ENTRY_FUNCTION(start_imx53_mba53_512mib, r0, r1, r2) imx53_init_lowlevel_early(800); - fdt = __dtb_imx53_mba53_start - get_runtime_offset(); + fdt = __dtb_imx53_mba53_start + get_runtime_offset(); start_imx53_tqma53_common(fdt); } @@ -70,7 +70,7 @@ ENTRY_FUNCTION(start_imx53_mba53_1gib, r0, r1, r2) imx53_init_lowlevel_early(800); - fdt = __dtb_imx53_mba53_start - get_runtime_offset(); + fdt = __dtb_imx53_mba53_start + get_runtime_offset(); start_imx53_tqma53_common(fdt); } diff --git a/arch/arm/boards/tqma6x/lowlevel.c b/arch/arm/boards/tqma6x/lowlevel.c index 52afee4b75..a90cd4007f 100644 --- a/arch/arm/boards/tqma6x/lowlevel.c +++ b/arch/arm/boards/tqma6x/lowlevel.c @@ -42,7 +42,7 @@ ENTRY_FUNCTION(start_imx6q_mba6x, r0, r1, r2) arm_early_mmu_cache_invalidate(); - fdt = __dtb_imx6q_mba6x_start - get_runtime_offset(); + fdt = __dtb_imx6q_mba6x_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_1G, fdt); } @@ -63,7 +63,7 @@ ENTRY_FUNCTION(start_imx6dl_mba6x, r0, r1, r2) arm_early_mmu_cache_invalidate(); - fdt = __dtb_imx6dl_mba6x_start - get_runtime_offset(); + fdt = __dtb_imx6dl_mba6x_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_512M, fdt); } diff --git a/arch/arm/boards/turris-omnia/lowlevel.c b/arch/arm/boards/turris-omnia/lowlevel.c index 3f20908ff7..7236211c40 100644 --- a/arch/arm/boards/turris-omnia/lowlevel.c +++ b/arch/arm/boards/turris-omnia/lowlevel.c @@ -26,7 +26,7 @@ ENTRY_FUNCTION(start_turris_omnia, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_armada_385_turris_omnia_bb_start - + fdt = __dtb_armada_385_turris_omnia_bb_start + get_runtime_offset(); armada_370_xp_barebox_entry(fdt); diff --git a/arch/arm/boards/udoo/lowlevel.c b/arch/arm/boards/udoo/lowlevel.c index 785ab16678..1f06f7e37f 100644 --- a/arch/arm/boards/udoo/lowlevel.c +++ b/arch/arm/boards/udoo/lowlevel.c @@ -12,7 +12,7 @@ ENTRY_FUNCTION(start_imx6_udoo, r0, r1, r2) imx6_cpu_lowlevel_init(); - fdt = __dtb_imx6q_udoo_start - get_runtime_offset(); + fdt = __dtb_imx6q_udoo_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_1G, fdt); } diff --git a/arch/arm/boards/usi-topkick/lowlevel.c b/arch/arm/boards/usi-topkick/lowlevel.c index 4c731e5621..4202138986 100644 --- a/arch/arm/boards/usi-topkick/lowlevel.c +++ b/arch/arm/boards/usi-topkick/lowlevel.c @@ -28,7 +28,7 @@ ENTRY_FUNCTION(start_usi_topkick, r0, r1, r2) arm_cpu_lowlevel_init(); - fdt = __dtb_kirkwood_topkick_bb_start - get_runtime_offset(); + fdt = __dtb_kirkwood_topkick_bb_start + get_runtime_offset(); kirkwood_barebox_entry(fdt); } diff --git a/arch/arm/boards/variscite-mx6/lowlevel.c b/arch/arm/boards/variscite-mx6/lowlevel.c index 5cb738acb2..337bc58c8d 100644 --- a/arch/arm/boards/variscite-mx6/lowlevel.c +++ b/arch/arm/boards/variscite-mx6/lowlevel.c @@ -50,7 +50,7 @@ ENTRY_FUNCTION(start_variscite_custom, r0, r1, r2) if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - fdt = __dtb_imx6q_var_custom_start - get_runtime_offset(); + fdt = __dtb_imx6q_var_custom_start + get_runtime_offset(); barebox_arm_entry(0x10000000, SZ_1G, fdt); } diff --git a/arch/arm/boards/vexpress/lowlevel.c b/arch/arm/boards/vexpress/lowlevel.c index 9fe7c836b7..ac27fbd7c6 100644 --- a/arch/arm/boards/vexpress/lowlevel.c +++ b/arch/arm/boards/vexpress/lowlevel.c @@ -14,7 +14,7 @@ static inline void start_vexpress_common(void *internal_dt) { - void *fdt = internal_dt - get_runtime_offset(); + void *fdt = internal_dt + get_runtime_offset(); unsigned long membase, memsize = SZ_512M; arm_cpu_lowlevel_init(); diff --git a/arch/arm/boards/vscom-baltos/lowlevel.c b/arch/arm/boards/vscom-baltos/lowlevel.c index c4e234196e..98bbbaae16 100644 --- a/arch/arm/boards/vscom-baltos/lowlevel.c +++ b/arch/arm/boards/vscom-baltos/lowlevel.c @@ -134,7 +134,7 @@ ENTRY_FUNCTION(start_am33xx_baltos_sdram, r0, r1, r2) fdt = __dtb_am335x_baltos_minimal_start; - fdt -= get_runtime_offset(); + fdt += get_runtime_offset(); am335x_barebox_entry(fdt); } diff --git a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c index fb5e961e09..22ffdf85ea 100644 --- a/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c +++ b/arch/arm/boards/zii-imx6q-rdu2/lowlevel.c @@ -308,9 +308,9 @@ ENTRY_FUNCTION(start_imx6_zii_rdu2, r0, r1, r2) rdu2_sram_setup(); if (__imx6_cpu_revision() == IMX_CHIP_REV_2_0) - imx6q_barebox_entry(__dtb_imx6qp_zii_rdu2_start - + imx6q_barebox_entry(__dtb_imx6qp_zii_rdu2_start + get_runtime_offset()); else - imx6q_barebox_entry(__dtb_imx6q_zii_rdu2_start - + imx6q_barebox_entry(__dtb_imx6q_zii_rdu2_start + get_runtime_offset()); } diff --git a/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg b/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg index 177f4e8bdc..bb858907a4 100644 --- a/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg +++ b/arch/arm/boards/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg @@ -45,7 +45,7 @@ CHECKPOINT(2) /* * Wait for PLLs to lock */ -check 32 while_any_bit_clear 0x40050030 0x80000000 +check 32 until_any_bit_set 0x40050030 0x80000000 CHECKPOINT(3) @@ -218,26 +218,26 @@ wm 32 0x400ae000 0x00000601 CHECKPOINT(7) -check 32 while_any_bit_clear 0x400ae140 0x100 -# check 32 while_any_bit_clear 0x400ae42c 0x1 -# check 32 while_any_bit_clear 0x400ae46c 0x1 -# check 32 while_any_bit_clear 0x400ae4ac 0x1 +check 32 until_any_bit_set 0x400ae140 0x100 +# check 32 until_any_bit_set 0x400ae42c 0x1 +# check 32 until_any_bit_set 0x400ae46c 0x1 +# check 32 until_any_bit_set 0x400ae4ac 0x1 CHECKPOINT(8) wm 32 0x80000000 0xa5a5a5a5 -check 32 while_any_bit_clear 0x80000000 0xa5a5a5a5 +check 32 until_any_bit_set 0x80000000 0xa5a5a5a5 wm 32 0x400ae000 0x00000600 wm 32 0x400ae000 0x00000601 -check 32 while_any_bit_clear 0x400ae140 0x100 -# check 32 while_any_bit_clear 0x400ae42c 0x1 -# check 32 while_any_bit_clear 0x400ae46c 0x1 -# check 32 while_any_bit_clear 0x400ae4ac 0x1 +check 32 until_any_bit_set 0x400ae140 0x100 +# check 32 until_any_bit_set 0x400ae42c 0x1 +# check 32 until_any_bit_set 0x400ae46c 0x1 +# check 32 until_any_bit_set 0x400ae4ac 0x1 /* wm 32 0x3f040000 0xf0 - check 32 while_any_bit_clear 0x3f040000 0x0f */ + check 32 until_any_bit_set 0x3f040000 0x0f */ CHECKPOINT(9) diff --git a/arch/arm/boards/zii-vf610-dev/lowlevel.c b/arch/arm/boards/zii-vf610-dev/lowlevel.c index 95b68d5dce..c6663c1415 100644 --- a/arch/arm/boards/zii-vf610-dev/lowlevel.c +++ b/arch/arm/boards/zii-vf610-dev/lowlevel.c @@ -133,5 +133,5 @@ ENTRY_FUNCTION(start_zii_vf610_dev, r0, r1, r2) break; } - barebox_arm_entry(0x80000000, SZ_512M, fdt - get_runtime_offset()); + barebox_arm_entry(0x80000000, SZ_512M, fdt + get_runtime_offset()); } diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig index 62d623806c..426bc04651 100644 --- a/arch/arm/configs/imx_v7_defconfig +++ b/arch/arm/configs/imx_v7_defconfig @@ -10,7 +10,9 @@ CONFIG_MACH_GUF_VINCELL=y CONFIG_MACH_GUF_VINCELL_XLOAD=y CONFIG_MACH_TQMA53=y CONFIG_MACH_FREESCALE_MX53_VMX53=y +CONFIG_MACH_TX53=y CONFIG_MACH_PHYTEC_SOM_IMX6=y +CONFIG_MACH_KONTRON_SAMX6I=y CONFIG_MACH_DFI_FS700_M60=y CONFIG_MACH_GUF_SANTARO=y CONFIG_MACH_REALQ7=y diff --git a/arch/arm/configs/qemu_virt64_defconfig b/arch/arm/configs/qemu_virt64_defconfig index f8128aac08..9b7e11ff73 100644 --- a/arch/arm/configs/qemu_virt64_defconfig +++ b/arch/arm/configs/qemu_virt64_defconfig @@ -1,11 +1,8 @@ +CONFIG_TEXT_BASE=0x41000000 CONFIG_ARCH_QEMU=y -CONFIG_BAREBOX_MAX_IMAGE_SIZE=0x05000000 -CONFIG_AEABI=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y CONFIG_MMU=y # CONFIG_MMU_EARLY is not set -CONFIG_TEXT_BASE=0x41000000 -CONFIG_BAREBOX_MAX_BARE_INIT_SIZE=0x01000000 CONFIG_PROMPT="qemu-virt64: " CONFIG_GLOB=y CONFIG_HUSH_FANCY_PROMPT=y diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile index 13fe12c31f..0316d251c0 100644 --- a/arch/arm/cpu/Makefile +++ b/arch/arm/cpu/Makefile @@ -1,26 +1,13 @@ obj-y += cpu.o -ifeq ($(CONFIG_CPU_64v8), y) -obj-$(CONFIG_ARM_EXCEPTIONS) += exceptions_64.o -obj-$(CONFIG_MMU) += mmu_64.o -lwl-y += lowlevel_64.o -else -obj-$(CONFIG_ARM_EXCEPTIONS) += exceptions.o -obj-$(CONFIG_MMU) += mmu.o mmu-early.o -pbl-$(CONFIG_MMU) += mmu-early.o -lwl-y += lowlevel.o -endif +obj-$(CONFIG_ARM_EXCEPTIONS) += exceptions$(S64).o interrupts$(S64).o +obj-$(CONFIG_MMU) += mmu$(S64).o +lwl-y += lowlevel$(S64).o +obj-pbl-$(CONFIG_MMU) += mmu-early$(S64).o -obj-$(CONFIG_ARM_EXCEPTIONS) += interrupts.o obj-y += start.o entry.o -ifeq ($(CONFIG_CPU_64v8), y) -obj-y += setupc_64.o -pbl-y += setupc_64.o -else -obj-y += setupc.o -pbl-y += setupc.o -endif +obj-pbl-y += setupc$(S64).o cache$(S64).o # # Any variants can be called as start-armxyz.S @@ -28,7 +15,6 @@ endif obj-$(CONFIG_CMD_ARM_CPUINFO) += cpuinfo.o obj-$(CONFIG_CMD_ARM_MMUINFO) += mmuinfo.o obj-$(CONFIG_OFDEVICE) += dtb.o -obj-$(CONFIG_MMU) += cache.o ifeq ($(CONFIG_MMU),) obj-y += no-mmu.o @@ -40,25 +26,19 @@ AFLAGS_smccc-call.o :=-Wa,-march=armv7-a obj-$(CONFIG_ARM_SECURE_MONITOR) += sm.o sm_as.o AFLAGS_sm_as.o :=-Wa,-march=armv7-a -obj-$(CONFIG_CPU_32v4T) += cache-armv4.o -pbl-$(CONFIG_CPU_32v4T) += cache-armv4.o -obj-$(CONFIG_CPU_32v5) += cache-armv5.o -pbl-$(CONFIG_CPU_32v5) += cache-armv5.o -obj-$(CONFIG_CPU_32v6) += cache-armv6.o -pbl-$(CONFIG_CPU_32v6) += cache-armv6.o +obj-pbl-$(CONFIG_CPU_32v4T) += cache-armv4.o +obj-pbl-$(CONFIG_CPU_32v5) += cache-armv5.o +obj-pbl-$(CONFIG_CPU_32v6) += cache-armv6.o AFLAGS_cache-armv7.o :=-Wa,-march=armv7-a -obj-$(CONFIG_CPU_32v7) += cache-armv7.o +obj-pbl-$(CONFIG_CPU_32v7) += cache-armv7.o AFLAGS_pbl-cache-armv7.o :=-Wa,-march=armv7-a -pbl-$(CONFIG_CPU_32v7) += cache-armv7.o obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o AFLAGS_cache-armv8.o :=-Wa,-march=armv8-a -obj-$(CONFIG_CPU_64v8) += cache-armv8.o +obj-pbl-$(CONFIG_CPU_64v8) += cache-armv8.o AFLAGS_pbl-cache-armv8.o :=-Wa,-march=armv8-a -pbl-$(CONFIG_CPU_64v8) += cache-armv8.o pbl-y += entry.o pbl-$(CONFIG_PBL_SINGLE_IMAGE) += start-pbl.o pbl-$(CONFIG_PBL_MULTI_IMAGES) += uncompress.o -obj-y += common.o cache.o -pbl-y += common.o cache.o +obj-pbl-y += common.o sections.o diff --git a/arch/arm/cpu/cache-armv4.S b/arch/arm/cpu/cache-armv4.S index 1d1a1e32bf..db87de17e9 100644 --- a/arch/arm/cpu/cache-armv4.S +++ b/arch/arm/cpu/cache-armv4.S @@ -3,7 +3,7 @@ #define CACHE_DLINESIZE 32 -.section .text.__mmu_cache_on +.section .text.v4_mmu_cache_on ENTRY(v4_mmu_cache_on) mov r12, lr #ifdef CONFIG_MMU diff --git a/arch/arm/cpu/cache-armv8.S b/arch/arm/cpu/cache-armv8.S index 82b2f81778..3e21b35913 100644 --- a/arch/arm/cpu/cache-armv8.S +++ b/arch/arm/cpu/cache-armv8.S @@ -148,6 +148,25 @@ ENTRY(v8_flush_dcache_range) ret ENDPROC(v8_flush_dcache_range) +.section .text.v8_inv_dcache_range +ENTRY(v8_inv_dcache_range) + mrs x3, ctr_el0 + lsr x3, x3, #16 + and x3, x3, #0xf + mov x2, #4 + lsl x2, x2, x3 /* cache line size */ + + /* x2 <- minimal cache line size in cache system */ + sub x3, x2, #1 + bic x0, x0, x3 +1: dc ivac, x0 /* invalidate data or unified cache */ + add x0, x0, x2 + cmp x0, x1 + b.lo 1b + dsb sy + ret +ENDPROC(v8_inv_dcache_range) + /* * void v8_invalidate_icache_all(void) * diff --git a/arch/arm/cpu/cache.c b/arch/arm/cpu/cache.c index 929c385df5..7047470f0c 100644 --- a/arch/arm/cpu/cache.c +++ b/arch/arm/cpu/cache.c @@ -102,11 +102,6 @@ int arm_set_cache_functions(void) cache_fns = &cache_fns_armv7; break; #endif -#ifdef CONFIG_CPU_64v8 - case CPU_ARCH_ARMv8: - cache_fns = &cache_fns_armv8; - break; -#endif default: while(1); } @@ -144,11 +139,6 @@ void arm_early_mmu_cache_flush(void) v7_mmu_cache_flush(); return; #endif -#ifdef CONFIG_CPU_64v8 - case CPU_ARCH_ARMv8: - v8_dcache_all(); - return; -#endif } } @@ -171,12 +161,6 @@ void arm_early_mmu_cache_invalidate(void) v7_mmu_cache_invalidate(); return; #endif -#else -#ifdef CONFIG_CPU_64v8 - case CPU_ARCH_ARMv8: - v8_invalidate_icache_all(); - return; -#endif #endif } } diff --git a/arch/arm/cpu/cache_64.c b/arch/arm/cpu/cache_64.c new file mode 100644 index 0000000000..45f01e8dc9 --- /dev/null +++ b/arch/arm/cpu/cache_64.c @@ -0,0 +1,35 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <common.h> +#include <init.h> +#include <asm/mmu.h> +#include <asm/cache.h> +#include <asm/system_info.h> + +int arm_set_cache_functions(void) +{ + return 0; +} + +/* + * Early function to flush the caches. This is for use when the + * C environment is not yet fully initialized. + */ +void arm_early_mmu_cache_flush(void) +{ + v8_flush_dcache_all(); +} + +void arm_early_mmu_cache_invalidate(void) +{ + v8_invalidate_icache_all(); +} diff --git a/arch/arm/cpu/common.c b/arch/arm/cpu/common.c index 7d749967e1..00ce3efb2f 100644 --- a/arch/arm/cpu/common.c +++ b/arch/arm/cpu/common.c @@ -17,50 +17,90 @@ #include <common.h> #include <init.h> +#include <elf.h> #include <linux/sizes.h> #include <asm/system_info.h> #include <asm/barebox-arm.h> #include <asm/barebox-arm-head.h> #include <asm-generic/memory_layout.h> #include <asm/sections.h> -#include <asm/pgtable.h> #include <asm/cache.h> +#include <debug_ll.h> + +#define R_ARM_RELATIVE 23 +#define R_AARCH64_RELATIVE 1027 /* * relocate binary to the currently running address */ void relocate_to_current_adr(void) { - uint32_t offset; - uint32_t *dstart, *dend, *dynsym, *dynend; + unsigned long offset, offset_var; + unsigned long __maybe_unused *dynsym, *dynend; + void *dstart, *dend; /* Get offset between linked address and runtime address */ offset = get_runtime_offset(); + offset_var = global_variable_offset(); - dstart = (void *)(ld_var(__rel_dyn_start) - offset); - dend = (void *)(ld_var(__rel_dyn_end) - offset); - - dynsym = (void *)(ld_var(__dynsym_start) - offset); - dynend = (void *)(ld_var(__dynsym_end) - offset); + dstart = (void *)__rel_dyn_start + offset_var; + dend = (void *)__rel_dyn_end + offset_var; +#if defined(CONFIG_CPU_64) while (dstart < dend) { - uint32_t *fixup = (uint32_t *)(*dstart - offset); - uint32_t type = *(dstart + 1); + struct elf64_rela *rel = dstart; - if ((type & 0xff) == 0x17) { - *fixup = *fixup - offset; + if (ELF64_R_TYPE(rel->r_info) == R_AARCH64_RELATIVE) { + unsigned long *fixup = (unsigned long *)(rel->r_offset + offset); + + *fixup = rel->r_addend + offset; } else { - int index = type >> 8; - uint32_t r = dynsym[index * 4 + 1]; + putc_ll('>'); + puthex_ll(rel->r_info); + putc_ll(' '); + puthex_ll(rel->r_offset); + putc_ll(' '); + puthex_ll(rel->r_addend); + putc_ll('\n'); + panic(""); + } + + dstart += sizeof(*rel); + } +#elif defined(CONFIG_CPU_32) + dynsym = (void *)__dynsym_start + offset_var; + dynend = (void *)__dynsym_end + offset_var; + + while (dstart < dend) { + struct elf32_rel *rel = dstart; + + if (ELF32_R_TYPE(rel->r_info) == R_ARM_RELATIVE) { + unsigned long *fixup = (unsigned long *)(rel->r_offset + offset); + + *fixup = *fixup + offset; + + rel->r_offset += offset; + } else if (ELF32_R_TYPE(rel->r_info) == R_ARM_ABS32) { + unsigned long r = dynsym[ELF32_R_SYM(rel->r_info) * 4 + 1]; + unsigned long *fixup = (unsigned long *)(rel->r_offset + offset); - *fixup = *fixup + r - offset; + *fixup = *fixup + r + offset; + } else { + putc_ll('>'); + puthex_ll(rel->r_info); + putc_ll(' '); + puthex_ll(rel->r_offset); + putc_ll('\n'); + panic(""); } - *dstart -= offset; - dstart += 2; + dstart += sizeof(*rel); } memset(dynsym, 0, (unsigned long)dynend - (unsigned long)dynsym); +#else +#error "Architecture not specified" +#endif arm_early_mmu_cache_flush(); icache_invalidate(); @@ -78,6 +118,3 @@ int __pure cpu_architecture(void) return __cpu_architecture; } #endif - -char __image_start[0] __attribute__((section(".__image_start"))); -char __image_end[0] __attribute__((section(".__image_end")));
\ No newline at end of file diff --git a/arch/arm/cpu/cpu.c b/arch/arm/cpu/cpu.c index bf604fd60d..c5daf6c60e 100644 --- a/arch/arm/cpu/cpu.c +++ b/arch/arm/cpu/cpu.c @@ -68,26 +68,27 @@ int icache_status(void) return (get_cr () & CR_I) != 0; } -#if __LINUX_ARM_ARCH__ <= 7 /* * SoC like the ux500 have the l2x0 always enable * with or without MMU enable */ struct outer_cache_fns outer_cache; -/* - * Clean and invalide caches, disable MMU - */ -void mmu_disable(void) +static void disable_interrupts(void) { - __mmu_cache_flush(); - if (outer_cache.disable) { - outer_cache.flush_all(); - outer_cache.disable(); - } - __mmu_cache_off(); -} +#if __LINUX_ARM_ARCH__ <= 7 + uint32_t r; + + /* + * barebox normally does not use interrupts, but some functionalities + * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are + * disabled before exiting. + */ + __asm__ __volatile__("mrs %0, cpsr" : "=r"(r)); + r |= PSR_I_BIT; + __asm__ __volatile__("msr cpsr, %0" : : "r"(r)); #endif +} /** * Disable MMU and D-cache, flush caches @@ -98,23 +99,13 @@ void mmu_disable(void) */ static void arch_shutdown(void) { - uint32_t r; #ifdef CONFIG_MMU mmu_disable(); #endif icache_invalidate(); -#if __LINUX_ARM_ARCH__ <= 7 - /* - * barebox normally does not use interrupts, but some functionalities - * (eg. OMAP4_USBBOOT) require them enabled. So be sure interrupts are - * disabled before exiting. - */ - __asm__ __volatile__("mrs %0, cpsr" : "=r"(r)); - r |= PSR_I_BIT; - __asm__ __volatile__("msr cpsr, %0" : : "r"(r)); -#endif + disable_interrupts(); } archshutdown_exitcall(arch_shutdown); diff --git a/arch/arm/cpu/entry.c b/arch/arm/cpu/entry.c index 33b1429d4a..b48c1ca11d 100644 --- a/arch/arm/cpu/entry.c +++ b/arch/arm/cpu/entry.c @@ -24,7 +24,7 @@ * be fine. */ -void __naked __noreturn barebox_arm_entry(unsigned long membase, +void NAKED __noreturn barebox_arm_entry(unsigned long membase, unsigned long memsize, void *boarddata) { arm_setup_stack(arm_mem_stack_top(membase, membase + memsize) - 16); diff --git a/arch/arm/cpu/exceptions_64.S b/arch/arm/cpu/exceptions_64.S index 58120253a1..22034eaef9 100644 --- a/arch/arm/cpu/exceptions_64.S +++ b/arch/arm/cpu/exceptions_64.S @@ -7,6 +7,7 @@ #include <config.h> #include <asm/ptrace.h> +#include <asm/assembler64.h> #include <linux/linkage.h> /* @@ -31,22 +32,18 @@ stp x3, x4, [sp, #-16]! stp x1, x2, [sp, #-16]! - /* Could be running at EL3/EL2/EL1 */ - mrs x11, CurrentEL - cmp x11, #0xC /* Check EL3 state */ - b.eq 1f - cmp x11, #0x8 /* Check EL2 state */ - b.eq 2f - cmp x11, #0x4 /* Check EL1 state */ - b.eq 3f + switch_el x11, 3f, 2f, 1f 3: mrs x1, esr_el3 mrs x2, elr_el3 + mrs x3, far_el3 b 0f 2: mrs x1, esr_el2 mrs x2, elr_el2 + mrs x3, far_el2 b 0f 1: mrs x1, esr_el1 mrs x2, elr_el1 + mrs x3, far_el1 0: stp x2, x0, [sp, #-16]! mov x0, sp @@ -86,34 +83,69 @@ vectors: _do_bad_sync: exception_entry bl do_bad_sync + b exception_exit _do_bad_irq: exception_entry bl do_bad_irq + b exception_exit _do_bad_fiq: exception_entry bl do_bad_fiq + b exception_exit _do_bad_error: exception_entry bl do_bad_error + b exception_exit _do_sync: exception_entry + mov x2, x3 bl do_sync + b exception_exit _do_irq: exception_entry bl do_irq + b exception_exit _do_fiq: exception_entry bl do_fiq + b exception_exit _do_error: exception_entry bl do_error + b exception_exit + +exception_exit: + ldp x2, x0, [sp],#16 + switch_el x11, 3f, 2f, 1f +3: msr elr_el3, x2 + b 0f +2: msr elr_el2, x2 + b 0f +1: msr elr_el1, x2 +0: + ldp x1, x2, [sp],#16 + ldp x3, x4, [sp],#16 + ldp x5, x6, [sp],#16 + ldp x7, x8, [sp],#16 + ldp x9, x10, [sp],#16 + ldp x11, x12, [sp],#16 + ldp x13, x14, [sp],#16 + ldp x15, x16, [sp],#16 + ldp x17, x18, [sp],#16 + ldp x19, x20, [sp],#16 + ldp x21, x22, [sp],#16 + ldp x23, x24, [sp],#16 + ldp x25, x26, [sp],#16 + ldp x27, x28, [sp],#16 + ldp x29, x30, [sp],#16 + eret .section .data .align 4 diff --git a/arch/arm/cpu/interrupts.c b/arch/arm/cpu/interrupts.c index c34108a4f8..73f023bd71 100644 --- a/arch/arm/cpu/interrupts.c +++ b/arch/arm/cpu/interrupts.c @@ -26,9 +26,8 @@ #include <abort.h> #include <asm/ptrace.h> #include <asm/unwind.h> +#include <init.h> - -#if __LINUX_ARM_ARCH__ <= 7 /** * Display current register set content * @param[in] regs Guess what @@ -72,13 +71,10 @@ void show_regs (struct pt_regs *regs) unwind_backtrace(regs); #endif } -#endif static void __noreturn do_exception(struct pt_regs *pt_regs) { -#if __LINUX_ARM_ARCH__ <= 7 show_regs(pt_regs); -#endif panic(""); } @@ -126,8 +122,6 @@ void do_prefetch_abort (struct pt_regs *pt_regs) */ void do_data_abort (struct pt_regs *pt_regs) { - -#if __LINUX_ARM_ARCH__ <= 7 u32 far; asm volatile ("mrc p15, 0, %0, c6, c0, 0" : "=r" (far) : : "cc"); @@ -135,7 +129,6 @@ void do_data_abort (struct pt_regs *pt_regs) printf("unable to handle %s at address 0x%08x\n", far < PAGE_SIZE ? "NULL pointer dereference" : "paging request", far); -#endif do_exception(pt_regs); } @@ -164,45 +157,6 @@ void do_irq (struct pt_regs *pt_regs) do_exception(pt_regs); } -#ifdef CONFIG_CPU_64v8 -void do_bad_sync(struct pt_regs *pt_regs) -{ - printf("bad sync\n"); - do_exception(pt_regs); -} - -void do_bad_irq(struct pt_regs *pt_regs) -{ - printf("bad irq\n"); - do_exception(pt_regs); -} - -void do_bad_fiq(struct pt_regs *pt_regs) -{ - printf("bad fiq\n"); - do_exception(pt_regs); -} - -void do_bad_error(struct pt_regs *pt_regs) -{ - printf("bad error\n"); - do_exception(pt_regs); -} - -void do_sync(struct pt_regs *pt_regs) -{ - printf("sync exception\n"); - do_exception(pt_regs); -} - - -void do_error(struct pt_regs *pt_regs) -{ - printf("error exception\n"); - do_exception(pt_regs); -} -#endif - extern volatile int arm_ignore_data_abort; extern volatile int arm_data_abort_occurred; diff --git a/arch/arm/cpu/interrupts_64.c b/arch/arm/cpu/interrupts_64.c new file mode 100644 index 0000000000..32c8dfcb2d --- /dev/null +++ b/arch/arm/cpu/interrupts_64.c @@ -0,0 +1,198 @@ +/* + * interrupts_64.c - Interrupt Support Routines + * + * Copyright (c) 2018 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <abort.h> +#include <asm/ptrace.h> +#include <asm/unwind.h> +#include <init.h> +#include <asm/system.h> +#include <asm/esr.h> + +static const char *esr_class_str[] = { + [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC", + [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized", + [ESR_ELx_EC_WFx] = "WFI/WFE", + [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC", + [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC", + [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC", + [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC", + [ESR_ELx_EC_FP_ASIMD] = "ASIMD", + [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS", + [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC", + [ESR_ELx_EC_ILL] = "PSTATE.IL", + [ESR_ELx_EC_SVC32] = "SVC (AArch32)", + [ESR_ELx_EC_HVC32] = "HVC (AArch32)", + [ESR_ELx_EC_SMC32] = "SMC (AArch32)", + [ESR_ELx_EC_SVC64] = "SVC (AArch64)", + [ESR_ELx_EC_HVC64] = "HVC (AArch64)", + [ESR_ELx_EC_SMC64] = "SMC (AArch64)", + [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)", + [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF", + [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)", + [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)", + [ESR_ELx_EC_PC_ALIGN] = "PC Alignment", + [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)", + [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)", + [ESR_ELx_EC_SP_ALIGN] = "SP Alignment", + [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)", + [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)", + [ESR_ELx_EC_SERROR] = "SError", + [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)", + [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)", + [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)", + [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)", + [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)", + [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)", + [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)", + [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)", + [ESR_ELx_EC_BRK64] = "BRK (AArch64)", +}; + +const char *esr_get_class_string(u32 esr) +{ + return esr_class_str[esr >> ESR_ELx_EC_SHIFT]; +} + +/** + * Display current register set content + * @param[in] regs Guess what + */ +void show_regs(struct pt_regs *regs) +{ + int i; + + printf("elr: %016lx lr : %016lx\n", regs->elr, regs->regs[30]); + + for (i = 0; i < 29; i += 2) + printf("x%-2d: %016lx x%-2d: %016lx\n", + i, regs->regs[i], i + 1, regs->regs[i + 1]); + printf("\n"); +} + +static void __noreturn do_exception(struct pt_regs *pt_regs) +{ + show_regs(pt_regs); + + unwind_backtrace(pt_regs); + + panic("panic: unhandled exception"); +} + +/** + * The CPU catches a fast interrupt request. + * @param[in] pt_regs Register set content when the interrupt happens + * + * We never enable FIQs, so this should not happen + */ +void do_fiq(struct pt_regs *pt_regs) +{ + printf ("fast interrupt request\n"); + do_exception(pt_regs); +} + +/** + * The CPU catches a regular interrupt. + * @param[in] pt_regs Register set content when the interrupt happens + * + * We never enable interrupts, so this should not happen + */ +void do_irq(struct pt_regs *pt_regs) +{ + printf ("interrupt request\n"); + do_exception(pt_regs); +} + +void do_bad_sync(struct pt_regs *pt_regs) +{ + printf("bad sync\n"); + do_exception(pt_regs); +} + +void do_bad_irq(struct pt_regs *pt_regs) +{ + printf("bad irq\n"); + do_exception(pt_regs); +} + +void do_bad_fiq(struct pt_regs *pt_regs) +{ + printf("bad fiq\n"); + do_exception(pt_regs); +} + +void do_bad_error(struct pt_regs *pt_regs) +{ + printf("bad error\n"); + do_exception(pt_regs); +} + +extern volatile int arm_ignore_data_abort; +extern volatile int arm_data_abort_occurred; + +void do_sync(struct pt_regs *pt_regs, unsigned int esr, unsigned long far) +{ + if ((esr >> ESR_ELx_EC_SHIFT) == ESR_ELx_EC_DABT_CUR && + arm_ignore_data_abort) { + arm_data_abort_occurred = 1; + pt_regs->elr += 4; + return; + } + + printf("%s exception at 0x%016lx\n", esr_get_class_string(esr), far); + do_exception(pt_regs); +} + + +void do_error(struct pt_regs *pt_regs) +{ + printf("error exception\n"); + do_exception(pt_regs); +} + +void data_abort_mask(void) +{ + arm_data_abort_occurred = 0; + arm_ignore_data_abort = 1; +} + +int data_abort_unmask(void) +{ + arm_ignore_data_abort = 0; + + return arm_data_abort_occurred != 0; +} + +extern unsigned long vectors; + +static int aarch64_init_vectors(void) +{ + unsigned int el; + + el = current_el(); + if (el == 1) + asm volatile("msr vbar_el1, %0" : : "r" (&vectors) : "cc"); + else if (el == 2) + asm volatile("msr vbar_el2, %0" : : "r" (&vectors) : "cc"); + else + asm volatile("msr vbar_el3, %0" : : "r" (&vectors) : "cc"); + + return 0; +} +pure_initcall(aarch64_init_vectors); diff --git a/arch/arm/cpu/lowlevel_64.S b/arch/arm/cpu/lowlevel_64.S index 4850895169..af1cd8b5bc 100644 --- a/arch/arm/cpu/lowlevel_64.S +++ b/arch/arm/cpu/lowlevel_64.S @@ -1,20 +1,13 @@ #include <linux/linkage.h> #include <init.h> #include <asm/system.h> +#include <asm/assembler64.h> .section ".text_bare_init_","ax" ENTRY(arm_cpu_lowlevel_init) - adr x0, vectors - mrs x1, CurrentEL - cmp x1, #0xC /* Check EL3 state */ - b.eq 1f - cmp x1, #0x8 /* Check EL2 state */ - b.eq 2f - cmp x1, #0x4 /* Check EL1 state */ - b.eq 3f + switch_el x1, 3f, 2f, 1f -1: - msr vbar_el3, x0 +3: mov x0, #1 /* Non-Secure EL0/1 */ orr x0, x0, #(1 << 10) /* 64-bit EL2 */ msr scr_el3, x0 @@ -22,14 +15,12 @@ ENTRY(arm_cpu_lowlevel_init) b done 2: - msr vbar_el2, x0 mov x0, #0x33ff /* Enable FP/SIMD */ msr cptr_el2, x0 b done -3: - msr vbar_el1, x0 +1: mov x0, #(3 << 20) /* Enable FP/SIMD */ msr cpacr_el1, x0 b done diff --git a/arch/arm/cpu/mmu-early.c b/arch/arm/cpu/mmu-early.c index 2e4d316924..70cb5fe31b 100644 --- a/arch/arm/cpu/mmu-early.c +++ b/arch/arm/cpu/mmu-early.c @@ -5,6 +5,7 @@ #include <asm/memory.h> #include <asm/system.h> #include <asm/cache.h> +#include <asm/pgtable.h> #include "mmu.h" @@ -29,7 +30,8 @@ static void map_cachable(unsigned long start, unsigned long size) PMD_SECT_AP_READ | PMD_TYPE_SECT | PMD_SECT_WB); } -void mmu_early_enable(uint32_t membase, uint32_t memsize, uint32_t _ttb) +void mmu_early_enable(unsigned long membase, unsigned long memsize, + unsigned long _ttb) { int i; diff --git a/arch/arm/cpu/mmu-early.h b/arch/arm/cpu/mmu-early.h deleted file mode 100644 index af21f52131..0000000000 --- a/arch/arm/cpu/mmu-early.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARM_CPU_MMU_EARLY_H -#define __ARM_CPU_MMU_EARLY_H - -void mmu_early_enable(uint32_t membase, uint32_t memsize, uint32_t ttb); - -#endif /* __ARM_CPU_MMU_EARLY_H */ diff --git a/arch/arm/cpu/mmu-early_64.c b/arch/arm/cpu/mmu-early_64.c new file mode 100644 index 0000000000..f07d107e0d --- /dev/null +++ b/arch/arm/cpu/mmu-early_64.c @@ -0,0 +1,88 @@ +#include <common.h> +#include <dma-dir.h> +#include <init.h> +#include <mmu.h> +#include <errno.h> +#include <linux/sizes.h> +#include <asm/memory.h> +#include <asm/pgtable64.h> +#include <asm/barebox-arm.h> +#include <asm/system.h> +#include <asm/cache.h> +#include <memory.h> +#include <asm/system_info.h> + +#include "mmu_64.h" + +static void create_sections(void *ttb, uint64_t virt, uint64_t phys, + uint64_t size, uint64_t attr) +{ + uint64_t block_size; + uint64_t block_shift; + uint64_t *pte; + uint64_t idx; + uint64_t addr; + uint64_t *table; + + addr = virt; + + attr &= ~PTE_TYPE_MASK; + + table = ttb; + + while (1) { + block_shift = level2shift(1); + idx = (addr & level2mask(1)) >> block_shift; + block_size = (1ULL << block_shift); + + pte = table + idx; + + *pte = phys | attr | PTE_TYPE_BLOCK; + + if (size < block_size) + break; + + addr += block_size; + phys += block_size; + size -= block_size; + } +} + +void mmu_early_enable(unsigned long membase, unsigned long memsize, + unsigned long ttb) +{ + int el; + + /* + * For the early code we only create level 1 pagetables which only + * allow for a 1GiB granularity. If our membase is not aligned to that + * bail out without enabling the MMU. + */ + if (membase & ((1ULL << level2shift(1)) - 1)) + return; + + memset((void *)ttb, 0, GRANULE_SIZE); + + el = current_el(); + set_ttbr_tcr_mair(el, ttb, calc_tcr(el), MEMORY_ATTRIBUTES); + create_sections((void *)ttb, 0, 0, 1UL << (BITS_PER_VA - 1), UNCACHED_MEM); + create_sections((void *)ttb, membase, membase, memsize, CACHED_MEM); + tlb_invalidate(); + isb(); + set_cr(get_cr() | CR_M); +} + +void mmu_early_disable(void) +{ + unsigned int cr; + + cr = get_cr(); + cr &= ~(CR_M | CR_C); + + set_cr(cr); + v8_flush_dcache_all(); + tlb_invalidate(); + + dsb(); + isb(); +}
\ No newline at end of file diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index 459abe56ba..6ccd5893b4 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -27,11 +27,16 @@ #include <asm/barebox-arm.h> #include <asm/system.h> #include <asm/cache.h> +#include <asm/pgtable.h> #include <memory.h> #include <asm/system_info.h> +#include <asm/sections.h> #include "mmu.h" +#define PMD_SECT_DEF_UNCACHED (PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT) +#define PMD_SECT_DEF_CACHED (PMD_SECT_WB | PMD_SECT_DEF_UNCACHED) + static unsigned long *ttb; static void create_sections(unsigned long virt, unsigned long phys, int size_m, @@ -507,6 +512,19 @@ static int mmu_init(void) } mmu_initcall(mmu_init); +/* + * Clean and invalide caches, disable MMU + */ +void mmu_disable(void) +{ + __mmu_cache_flush(); + if (outer_cache.disable) { + outer_cache.flush_all(); + outer_cache.disable(); + } + __mmu_cache_off(); +} + void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle) { void *ret; @@ -557,7 +575,7 @@ void dma_free_coherent(void *mem, dma_addr_t dma_handle, size_t size) free(mem); } -void dma_sync_single_for_cpu(unsigned long address, size_t size, +void dma_sync_single_for_cpu(dma_addr_t address, size_t size, enum dma_data_direction dir) { if (dir != DMA_TO_DEVICE) { @@ -567,7 +585,7 @@ void dma_sync_single_for_cpu(unsigned long address, size_t size, } } -void dma_sync_single_for_device(unsigned long address, size_t size, +void dma_sync_single_for_device(dma_addr_t address, size_t size, enum dma_data_direction dir) { if (dir == DMA_FROM_DEVICE) { @@ -580,3 +598,19 @@ void dma_sync_single_for_device(unsigned long address, size_t size, outer_cache.clean_range(address, address + size); } } + +dma_addr_t dma_map_single(struct device_d *dev, void *ptr, size_t size, + enum dma_data_direction dir) +{ + unsigned long addr = (unsigned long)ptr; + + dma_sync_single_for_device(addr, size, dir); + + return addr; +} + +void dma_unmap_single(struct device_d *dev, dma_addr_t addr, size_t size, + enum dma_data_direction dir) +{ + dma_sync_single_for_cpu(addr, size, dir); +} diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu.h index 186d408ead..79ebc80d7d 100644 --- a/arch/arm/cpu/mmu.h +++ b/arch/arm/cpu/mmu.h @@ -1,60 +1,6 @@ #ifndef __ARM_MMU_H #define __ARM_MMU_H -#ifdef CONFIG_CPU_64v8 - -#define TCR_FLAGS (TCR_TG0_4K | \ - TCR_SHARED_OUTER | \ - TCR_SHARED_INNER | \ - TCR_IRGN_WBWA | \ - TCR_ORGN_WBWA | \ - TCR_T0SZ(BITS_PER_VA)) - -#ifndef __ASSEMBLY__ - -static inline void set_ttbr_tcr_mair(int el, uint64_t table, uint64_t tcr, uint64_t attr) -{ - asm volatile("dsb sy"); - if (el == 1) { - asm volatile("msr ttbr0_el1, %0" : : "r" (table) : "memory"); - asm volatile("msr tcr_el1, %0" : : "r" (tcr) : "memory"); - asm volatile("msr mair_el1, %0" : : "r" (attr) : "memory"); - } else if (el == 2) { - asm volatile("msr ttbr0_el2, %0" : : "r" (table) : "memory"); - asm volatile("msr tcr_el2, %0" : : "r" (tcr) : "memory"); - asm volatile("msr mair_el2, %0" : : "r" (attr) : "memory"); - } else if (el == 3) { - asm volatile("msr ttbr0_el3, %0" : : "r" (table) : "memory"); - asm volatile("msr tcr_el3, %0" : : "r" (tcr) : "memory"); - asm volatile("msr mair_el3, %0" : : "r" (attr) : "memory"); - } else { - hang(); - } - asm volatile("isb"); -} - -static inline uint64_t get_ttbr(int el) -{ - uint64_t val; - if (el == 1) { - asm volatile("mrs %0, ttbr0_el1" : "=r" (val)); - } else if (el == 2) { - asm volatile("mrs %0, ttbr0_el2" : "=r" (val)); - } else if (el == 3) { - asm volatile("mrs %0, ttbr0_el3" : "=r" (val)); - } else { - hang(); - } - - return val; -} - -void mmu_early_enable(uint64_t membase, uint64_t memsize, uint64_t _ttb); - -#endif - -#endif /* CONFIG_CPU_64v8 */ - #ifdef CONFIG_MMU void __mmu_cache_on(void); void __mmu_cache_off(void); diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c index bfd80c0913..8355a4c6e8 100644 --- a/arch/arm/cpu/mmu_64.c +++ b/arch/arm/cpu/mmu_64.c @@ -25,16 +25,16 @@ #include <errno.h> #include <linux/sizes.h> #include <asm/memory.h> +#include <asm/pgtable64.h> #include <asm/barebox-arm.h> #include <asm/system.h> #include <asm/cache.h> #include <memory.h> #include <asm/system_info.h> -#include "mmu.h" +#include "mmu_64.h" static uint64_t *ttb; -static int free_idx; static void arm_mmu_not_initialized_error(void) { @@ -47,86 +47,25 @@ static void arm_mmu_not_initialized_error(void) panic("MMU not initialized\n"); } - -/* - * Do it the simple way for now and invalidate the entire - * tlb - */ -static inline void tlb_invalidate(void) -{ - unsigned int el = current_el(); - - dsb(); - - if (el == 1) - __asm__ __volatile__("tlbi vmalle1\n\t" : : : "memory"); - else if (el == 2) - __asm__ __volatile__("tlbi alle2\n\t" : : : "memory"); - else if (el == 3) - __asm__ __volatile__("tlbi alle3\n\t" : : : "memory"); - - dsb(); - isb(); -} - -static int level2shift(int level) -{ - /* Page is 12 bits wide, every level translates 9 bits */ - return (12 + 9 * (3 - level)); -} - -static uint64_t level2mask(int level) -{ - uint64_t mask = -EINVAL; - - if (level == 1) - mask = L1_ADDR_MASK; - else if (level == 2) - mask = L2_ADDR_MASK; - else if (level == 3) - mask = L3_ADDR_MASK; - - return mask; -} - -static int pte_type(uint64_t *pte) -{ - return *pte & PMD_TYPE_MASK; -} - static void set_table(uint64_t *pt, uint64_t *table_addr) { uint64_t val; - val = PMD_TYPE_TABLE | (uint64_t)table_addr; + val = PTE_TYPE_TABLE | (uint64_t)table_addr; *pt = val; } static uint64_t *create_table(void) { - uint64_t *new_table = ttb + free_idx * GRANULE_SIZE; + uint64_t *new_table = xmemalign(GRANULE_SIZE, GRANULE_SIZE); /* Mark all entries as invalid */ memset(new_table, 0, GRANULE_SIZE); - free_idx++; - return new_table; } -static uint64_t *get_level_table(uint64_t *pte) -{ - uint64_t *table = (uint64_t *)(*pte & XLAT_ADDR_MASK); - - if (pte_type(pte) != PMD_TYPE_TABLE) { - table = create_table(); - set_table(pte, table); - } - - return table; -} - -static uint64_t *find_pte(uint64_t addr) +static __maybe_unused uint64_t *find_pte(uint64_t addr) { uint64_t *pte; uint64_t block_shift; @@ -140,7 +79,7 @@ static uint64_t *find_pte(uint64_t addr) idx = (addr & level2mask(i)) >> block_shift; pte += idx; - if ((pte_type(pte) != PMD_TYPE_TABLE) || (block_shift <= GRANULE_SIZE_SHIFT)) + if ((pte_type(pte) != PTE_TYPE_TABLE) || (block_shift <= GRANULE_SIZE_SHIFT)) break; else pte = (uint64_t *)(*pte & XLAT_ADDR_MASK); @@ -149,6 +88,36 @@ static uint64_t *find_pte(uint64_t addr) return pte; } +#define MAX_PTE_ENTRIES 512 + +/* Splits a block PTE into table with subpages spanning the old block */ +static void split_block(uint64_t *pte, int level) +{ + uint64_t old_pte = *pte; + uint64_t *new_table; + uint64_t i = 0; + int levelshift; + + if ((*pte & PTE_TYPE_MASK) == PTE_TYPE_TABLE) + return; + + /* level describes the parent level, we need the child ones */ + levelshift = level2shift(level + 1); + + new_table = create_table(); + + for (i = 0; i < MAX_PTE_ENTRIES; i++) { + new_table[i] = old_pte | (i << levelshift); + + /* Level 3 block PTEs have the table type */ + if ((level + 1) == 3) + new_table[i] |= PTE_TYPE_TABLE; + } + + /* Set the new table into effect */ + set_table(pte, new_table); +} + static void map_region(uint64_t virt, uint64_t phys, uint64_t size, uint64_t attr) { uint64_t block_size; @@ -164,29 +133,29 @@ static void map_region(uint64_t virt, uint64_t phys, uint64_t size, uint64_t att addr = virt; - attr &= ~(PMD_TYPE_SECT); + attr &= ~PTE_TYPE_MASK; while (size) { table = ttb; for (level = 1; level < 4; level++) { block_shift = level2shift(level); idx = (addr & level2mask(level)) >> block_shift; - block_size = (1 << block_shift); + block_size = (1ULL << block_shift); pte = table + idx; - if (level == 3) - attr |= PTE_TYPE_PAGE; - else - attr |= PMD_TYPE_SECT; - if (size >= block_size && IS_ALIGNED(addr, block_size)) { - *pte = phys | attr; + if (level == 3) + *pte = phys | attr | PTE_TYPE_PAGE; + else + *pte = phys | attr | PTE_TYPE_BLOCK; + addr += block_size; phys += block_size; size -= block_size; break; - + } else { + split_block(pte, level); } table = get_level_table(pte); @@ -195,23 +164,12 @@ static void map_region(uint64_t virt, uint64_t phys, uint64_t size, uint64_t att } } -static void create_sections(uint64_t virt, uint64_t phys, uint64_t size_m, uint64_t flags) +static void create_sections(uint64_t virt, uint64_t phys, uint64_t size, uint64_t flags) { - - map_region(virt, phys, size_m, flags); + map_region(virt, phys, size, flags); tlb_invalidate(); } -void *map_io_sections(unsigned long phys, void *_start, size_t size) -{ - - map_region((uint64_t)_start, phys, (uint64_t)size, UNCACHED_MEM); - - tlb_invalidate(); - return _start; -} - - int arch_remap_range(void *_start, size_t size, unsigned flags) { map_region((uint64_t)_start, (uint64_t)_start, (uint64_t)size, flags); @@ -220,12 +178,19 @@ int arch_remap_range(void *_start, size_t size, unsigned flags) return 0; } +static void mmu_enable(void) +{ + isb(); + set_cr(get_cr() | CR_M | CR_C | CR_I); +} + /* * Prepare MMU for usage enable it. */ static int mmu_init(void) { struct memory_bank *bank; + unsigned int el; if (list_empty(&memory_banks)) /* @@ -236,96 +201,109 @@ static int mmu_init(void) */ panic("MMU: No memory bank found! Cannot continue\n"); - if (get_cr() & CR_M) { - ttb = (uint64_t *)get_ttbr(current_el()); - if (!request_sdram_region("ttb", (unsigned long)ttb, SZ_16K)) - /* - * This can mean that: - * - the early MMU code has put the ttb into a place - * which we don't have inside our available memory - * - Somebody else has occupied the ttb region which means - * the ttb will get corrupted. - */ - pr_crit("Critical Error: Can't request SDRAM region for ttb at %p\n", - ttb); - } else { - ttb = memalign(GRANULE_SIZE, SZ_16K); - free_idx = 1; - - memset(ttb, 0, GRANULE_SIZE); - - set_ttbr_tcr_mair(current_el(), (uint64_t)ttb, TCR_FLAGS, UNCACHED_MEM); - } + if (get_cr() & CR_M) + mmu_disable(); + + ttb = xmemalign(GRANULE_SIZE, GRANULE_SIZE); + + memset(ttb, 0, GRANULE_SIZE); + + el = current_el(); + set_ttbr_tcr_mair(el, (uint64_t)ttb, calc_tcr(el), MEMORY_ATTRIBUTES); pr_debug("ttb: 0x%p\n", ttb); - /* create a flat mapping using 1MiB sections */ - create_sections(0, 0, GRANULE_SIZE, UNCACHED_MEM); + /* create a flat mapping */ + create_sections(0, 0, 1UL << (BITS_PER_VA - 1), UNCACHED_MEM); /* Map sdram cached. */ for_each_memory_bank(bank) create_sections(bank->start, bank->start, bank->size, CACHED_MEM); - return 0; -} -mmu_initcall(mmu_init); - -void mmu_enable(void) -{ - if (!ttb) - arm_mmu_not_initialized_error(); + create_sections(0x0, 0x0, 0x1000, 0x0); - if (!(get_cr() & CR_M)) { + mmu_enable(); - isb(); - set_cr(get_cr() | CR_M | CR_C | CR_I); - } + return 0; } +mmu_initcall(mmu_init); void mmu_disable(void) { unsigned int cr; - if (!ttb) - arm_mmu_not_initialized_error(); - cr = get_cr(); - cr &= ~(CR_M | CR_C | CR_I); + cr &= ~(CR_M | CR_C); + set_cr(cr); + v8_flush_dcache_all(); tlb_invalidate(); dsb(); isb(); +} - set_cr(cr); +unsigned long virt_to_phys(volatile void *virt) +{ + return (unsigned long)virt; +} - dsb(); - isb(); +void *phys_to_virt(unsigned long phys) +{ + return (void *)phys; } -void mmu_early_enable(uint64_t membase, uint64_t memsize, uint64_t _ttb) +void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle) { - ttb = (uint64_t *)_ttb; + void *ret; - memset(ttb, 0, GRANULE_SIZE); - free_idx = 1; + size = PAGE_ALIGN(size); + ret = xmemalign(PAGE_SIZE, size); + if (dma_handle) + *dma_handle = (dma_addr_t)ret; - set_ttbr_tcr_mair(current_el(), (uint64_t)ttb, TCR_FLAGS, UNCACHED_MEM); + map_region((unsigned long)ret, (unsigned long)ret, size, UNCACHED_MEM); + tlb_invalidate(); - create_sections(0, 0, 4096, UNCACHED_MEM); + return ret; +} - create_sections(membase, membase, memsize, CACHED_MEM); +void dma_free_coherent(void *mem, dma_addr_t dma_handle, size_t size) +{ + size = PAGE_ALIGN(size); - isb(); - set_cr(get_cr() | CR_M); + map_region((unsigned long)mem, (unsigned long)mem, size, CACHED_MEM); + + free(mem); } -unsigned long virt_to_phys(volatile void *virt) +void dma_sync_single_for_cpu(dma_addr_t address, size_t size, + enum dma_data_direction dir) { - return (unsigned long)virt; + if (dir != DMA_TO_DEVICE) + v8_inv_dcache_range(address, address + size - 1); } -void *phys_to_virt(unsigned long phys) +void dma_sync_single_for_device(dma_addr_t address, size_t size, + enum dma_data_direction dir) { - return (void *)phys; + if (dir == DMA_FROM_DEVICE) + v8_inv_dcache_range(address, address + size - 1); + v8_flush_dcache_range(address, address + size - 1); +} + +dma_addr_t dma_map_single(struct device_d *dev, void *ptr, size_t size, + enum dma_data_direction dir) +{ + unsigned long addr = (unsigned long)ptr; + + dma_sync_single_for_device(addr, size, dir); + + return addr; +} + +void dma_unmap_single(struct device_d *dev, dma_addr_t addr, size_t size, + enum dma_data_direction dir) +{ + dma_sync_single_for_cpu(addr, size, dir); } diff --git a/arch/arm/cpu/mmu_64.h b/arch/arm/cpu/mmu_64.h new file mode 100644 index 0000000000..c280d2ced2 --- /dev/null +++ b/arch/arm/cpu/mmu_64.h @@ -0,0 +1,121 @@ + +#define CACHED_MEM (PTE_BLOCK_MEMTYPE(MT_NORMAL) | \ + PTE_BLOCK_OUTER_SHARE | \ + PTE_BLOCK_AF) +#define UNCACHED_MEM (PTE_BLOCK_MEMTYPE(MT_DEVICE_nGnRnE) | \ + PTE_BLOCK_OUTER_SHARE | \ + PTE_BLOCK_AF) + +/* + * Do it the simple way for now and invalidate the entire tlb + */ +static inline void tlb_invalidate(void) +{ + unsigned int el = current_el(); + + dsb(); + + if (el == 1) + __asm__ __volatile__("tlbi vmalle1\n\t" : : : "memory"); + else if (el == 2) + __asm__ __volatile__("tlbi alle2\n\t" : : : "memory"); + else if (el == 3) + __asm__ __volatile__("tlbi alle3\n\t" : : : "memory"); + + dsb(); + isb(); +} + +static inline void set_ttbr_tcr_mair(int el, uint64_t table, uint64_t tcr, uint64_t attr) +{ + asm volatile("dsb sy"); + if (el == 1) { + asm volatile("msr ttbr0_el1, %0" : : "r" (table) : "memory"); + asm volatile("msr tcr_el1, %0" : : "r" (tcr) : "memory"); + asm volatile("msr mair_el1, %0" : : "r" (attr) : "memory"); + } else if (el == 2) { + asm volatile("msr ttbr0_el2, %0" : : "r" (table) : "memory"); + asm volatile("msr tcr_el2, %0" : : "r" (tcr) : "memory"); + asm volatile("msr mair_el2, %0" : : "r" (attr) : "memory"); + } else if (el == 3) { + asm volatile("msr ttbr0_el3, %0" : : "r" (table) : "memory"); + asm volatile("msr tcr_el3, %0" : : "r" (tcr) : "memory"); + asm volatile("msr mair_el3, %0" : : "r" (attr) : "memory"); + } else { + hang(); + } + asm volatile("isb"); +} + +static inline uint64_t get_ttbr(int el) +{ + uint64_t val; + if (el == 1) { + asm volatile("mrs %0, ttbr0_el1" : "=r" (val)); + } else if (el == 2) { + asm volatile("mrs %0, ttbr0_el2" : "=r" (val)); + } else if (el == 3) { + asm volatile("mrs %0, ttbr0_el3" : "=r" (val)); + } else { + hang(); + } + + return val; +} + +static inline int level2shift(int level) +{ + /* Page is 12 bits wide, every level translates 9 bits */ + return (12 + 9 * (3 - level)); +} + +static inline uint64_t level2mask(int level) +{ + uint64_t mask = -EINVAL; + + if (level == 1) + mask = L1_ADDR_MASK; + else if (level == 2) + mask = L2_ADDR_MASK; + else if (level == 3) + mask = L3_ADDR_MASK; + + return mask; +} + +static inline uint64_t calc_tcr(int el) +{ + u64 ips, va_bits; + u64 tcr; + + ips = 2; + va_bits = BITS_PER_VA; + + if (el == 1) + tcr = (ips << 32) | TCR_EPD1_DISABLE; + else if (el == 2) + tcr = (ips << 16); + else + tcr = (ips << 16); + + /* PTWs cacheable, inner/outer WBWA and inner shareable */ + tcr |= TCR_TG0_4K | TCR_SHARED_INNER | TCR_ORGN_WBWA | TCR_IRGN_WBWA; + tcr |= TCR_T0SZ(va_bits); + + return tcr; +} + +static inline int pte_type(uint64_t *pte) +{ + return *pte & PTE_TYPE_MASK; +} + +static inline uint64_t *get_level_table(uint64_t *pte) +{ + uint64_t *table = (uint64_t *)(*pte & XLAT_ADDR_MASK); + + if (pte_type(pte) != PTE_TYPE_TABLE) + BUG(); + + return table; +} diff --git a/arch/arm/cpu/no-mmu.c b/arch/arm/cpu/no-mmu.c index e227b457a1..7268fa9b9d 100644 --- a/arch/arm/cpu/no-mmu.c +++ b/arch/arm/cpu/no-mmu.c @@ -28,7 +28,7 @@ #include <memory.h> #include <asm/system_info.h> #include <debug_ll.h> - +#include <asm/sections.h> #define __exceptions_size (__exceptions_stop - __exceptions_start) diff --git a/arch/arm/cpu/sections.c b/arch/arm/cpu/sections.c new file mode 100644 index 0000000000..5874da2b82 --- /dev/null +++ b/arch/arm/cpu/sections.c @@ -0,0 +1,11 @@ +#include <asm/sections.h> + +char __rel_dyn_start[0] __attribute__((section(".__rel_dyn_start"))); +char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end"))); +char __dynsym_start[0] __attribute__((section(".__dynsym_start"))); +char __dynsym_end[0] __attribute__((section(".__dynsym_end"))); +char _text[0] __attribute__((section("._text"))); +char __bss_start[0] __attribute__((section(".__bss_start"))); +char __bss_stop[0] __attribute__((section(".__bss_stop"))); +char __image_start[0] __attribute__((section(".__image_start"))); +char __image_end[0] __attribute__((section(".__image_end"))); diff --git a/arch/arm/cpu/setupc.S b/arch/arm/cpu/setupc.S index c232b08d3b..717500cfff 100644 --- a/arch/arm/cpu/setupc.S +++ b/arch/arm/cpu/setupc.S @@ -15,7 +15,7 @@ ENTRY(setup_c) push {r4, r5} mov r5, lr bl get_runtime_offset - subs r4, r0, #0 + adds r4, r0, #0 beq 1f /* skip memcpy if already at correct address */ ldr r0,=_text ldr r2,=__bss_start @@ -55,21 +55,21 @@ ENTRY(relocate_to_adr) mov r5, r0 - ld_var _text, r0, r4 - mov r8, r0 + ldr r8, =_text - sub r1, r0, r5 /* r1: from address */ + add r1, r8, r5 /* r1: from address */ cmp r1, r6 /* already at correct address? */ beq 1f /* yes, skip copy to new address */ - ld_var __bss_start, r2, r4 + ldr r2, =__bss_start - sub r2, r2, r0 /* r2: size */ + sub r2, r2, r8 /* r2: size */ mov r0, r6 /* r0: target */ - add r7, r7, r0 /* adjust return address */ - sub r7, r7, r1 /* lr += offset */ + /* adjust return address */ + sub r7, r7, r1 /* sub address where we are actually running */ + add r7, r7, r0 /* add address where we are going to run */ bl memcpy /* copy binary */ diff --git a/arch/arm/cpu/setupc_64.S b/arch/arm/cpu/setupc_64.S index 3515854784..61e70850d7 100644 --- a/arch/arm/cpu/setupc_64.S +++ b/arch/arm/cpu/setupc_64.S @@ -16,3 +16,63 @@ ENTRY(setup_c) mov x30, x15 ret ENDPROC(setup_c) + +/* + * void relocate_to_adr(unsigned long targetadr) + * + * Copy binary to targetadr, relocate code and continue + * executing at new address. + */ +.section .text.relocate_to_adr +ENTRY(relocate_to_adr) + /* x0: target address */ + + stp x19, x20, [sp, #-16]! + stp x21, x22, [sp, #-16]! + + mov x19, x30 + + mov x21, x0 + + bl get_runtime_offset + mov x5, x0 + + ldr x0, =_text + mov x20, x0 + + add x1, x0, x5 /* x1: from address */ + + cmp x1, x21 /* already at correct address? */ + beq 1f /* yes, skip copy to new address */ + + ldr x2, =__bss_start + + sub x2, x2, x0 /* x2: size */ + mov x0, x21 /* x0: target */ + + /* adjust return address */ + sub x19, x19, x1 /* sub address where we are actually running */ + add x19, x19, x0 /* add address where we are going to run */ + + bl memcpy /* copy binary */ + +#ifdef CONFIG_MMU + bl arm_early_mmu_cache_flush +#endif + mov x0,#0 + ic ivau, x0 /* flush icache */ + + ldr x0,=1f + sub x0, x0, x20 + add x0, x0, x21 + br x0 /* jump to relocated address */ +1: + bl relocate_to_current_adr /* relocate binary */ + + mov x30, x19 + + ldp x21, x22, [sp], #16 + ldp x19, x20, [sp], #16 + ret + +ENDPROC(relocate_to_adr) diff --git a/arch/arm/cpu/start-pbl.c b/arch/arm/cpu/start-pbl.c index e851b4a2da..16159d7f9d 100644 --- a/arch/arm/cpu/start-pbl.c +++ b/arch/arm/cpu/start-pbl.c @@ -26,12 +26,10 @@ #include <asm/barebox-arm-head.h> #include <asm-generic/memory_layout.h> #include <asm/sections.h> -#include <asm/pgtable.h> #include <asm/cache.h> +#include <asm/mmu.h> #include <asm/unaligned.h> -#include "mmu-early.h" - unsigned long free_mem_ptr; unsigned long free_mem_end_ptr; @@ -49,10 +47,10 @@ extern void *input_data_end; __noreturn void barebox_single_pbl_start(unsigned long membase, unsigned long memsize, void *boarddata) { - uint32_t offset; - uint32_t pg_start, pg_end, pg_len, uncompressed_len; + unsigned long offset; + unsigned long pg_start, pg_end, pg_len, uncompressed_len; void __noreturn (*barebox)(unsigned long, unsigned long, void *); - uint32_t endmem = membase + memsize; + unsigned long endmem = membase + memsize; unsigned long barebox_base; if (IS_ENABLED(CONFIG_PBL_RELOCATABLE)) @@ -61,8 +59,8 @@ __noreturn void barebox_single_pbl_start(unsigned long membase, /* Get offset between linked address and runtime address */ offset = get_runtime_offset(); - pg_start = (uint32_t)&input_data - offset; - pg_end = (uint32_t)&input_data_end - offset; + pg_start = (unsigned long)&input_data + global_variable_offset(); + pg_end = (unsigned long)&input_data_end + global_variable_offset(); pg_len = pg_end - pg_start; uncompressed_len = get_unaligned((const u32 *)(pg_start + pg_len - 4)); diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index 171e6ad0eb..68fff892e8 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -26,12 +26,12 @@ #include <asm/sections.h> #include <asm/unaligned.h> #include <asm/cache.h> +#include <asm/mmu.h> #include <memory.h> #include <uncompress.h> #include <malloc.h> #include <debug_ll.h> -#include "mmu-early.h" unsigned long arm_stack_top; static unsigned long arm_barebox_size; @@ -229,7 +229,7 @@ __noreturn void barebox_non_pbl_start(unsigned long membase, #ifndef CONFIG_PBL_IMAGE -void __naked __section(.text_entry) start(void) +void NAKED __section(.text_entry) start(void) { barebox_arm_head(); } @@ -239,7 +239,7 @@ void __naked __section(.text_entry) start(void) * First function in the uncompressed image. We get here from * the pbl. The stack already has been set up by the pbl. */ -void __naked __section(.text_entry) start(unsigned long membase, +void NAKED __section(.text_entry) start(unsigned long membase, unsigned long memsize, void *boarddata) { barebox_non_pbl_start(membase, memsize, boarddata); diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c index 9d7fe0e921..b07087e4cf 100644 --- a/arch/arm/cpu/uncompress.c +++ b/arch/arm/cpu/uncompress.c @@ -27,33 +27,30 @@ #include <asm/barebox-arm-head.h> #include <asm-generic/memory_layout.h> #include <asm/sections.h> -#include <asm/pgtable.h> #include <asm/cache.h> +#include <asm/mmu.h> #include <asm/unaligned.h> #include <debug_ll.h> -#include "mmu-early.h" - unsigned long free_mem_ptr; unsigned long free_mem_end_ptr; -static int __attribute__((__used__)) - __attribute__((__section__(".image_end"))) - __image_end_dummy = 0xdeadbeef; +static int __attribute__((__section__(".image_end"))) + image_end_marker = 0xdeadbeef; void __noreturn barebox_multi_pbl_start(unsigned long membase, unsigned long memsize, void *boarddata) { uint32_t pg_len, uncompressed_len; void __noreturn (*barebox)(unsigned long, unsigned long, void *); - uint32_t endmem = membase + memsize; + unsigned long endmem = membase + memsize; unsigned long barebox_base; uint32_t *image_end; void *pg_start; unsigned long pc = get_pc(); - image_end = (void *)ld_var(__image_end) - get_runtime_offset(); + image_end = (void *)&image_end_marker + global_variable_offset(); if (IS_ENABLED(CONFIG_PBL_RELOCATABLE)) { /* @@ -68,11 +65,13 @@ void __noreturn barebox_multi_pbl_start(unsigned long membase, } /* - * image_end is the first location after the executable. It contains - * the size of the appended compressed binary followed by the binary. + * image_end is the image_end_marker defined above. It is the last location + * in the executable. Right after the executable the build process adds + * the size of the appended compressed binary followed by the compressed + * binary itself. */ - pg_start = image_end + 1; - pg_len = *(image_end); + pg_start = image_end + 2; + pg_len = *(image_end + 1); uncompressed_len = get_unaligned((const u32 *)(pg_start + pg_len - 4)); if (IS_ENABLED(CONFIG_RELOCATABLE)) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0526a6f407..e60e0ea0c6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -19,6 +19,7 @@ pbl-dtb-$(CONFIG_MACH_EMBEST_RIOTBOARD) += imx6s-riotboard.dtb.o pbl-dtb-$(CONFIG_MACH_EMBEDSKY_E9) += imx6q-embedsky-e9.dtb.o pbl-dtb-$(CONFIG_MACH_FREESCALE_MX51_PDK) += imx51-babbage.dtb.o pbl-dtb-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += imx53-qsb.dtb.o imx53-qsrb.dtb.o +pbl-dtb-$(CONFIG_MACH_TX53) += imx53-tx53-xx30.dtb.o imx53-tx53-1011.dtb.o pbl-dtb-$(CONFIG_MACH_CCMX53) += imx53-ccxmx53.dtb.o pbl-dtb-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += imx53-voipac-bsb.dtb.o pbl-dtb-$(CONFIG_MACH_FREESCALE_MX7_SABRESD) += imx7d-sdb.dtb.o @@ -28,6 +29,8 @@ pbl-dtb-$(CONFIG_MACH_GLOBALSCALE_MIRABOX) += armada-370-mirabox-bb.dtb.o pbl-dtb-$(CONFIG_MACH_GUF_SANTARO) += imx6q-guf-santaro.dtb.o pbl-dtb-$(CONFIG_MACH_GUF_VINCELL) += imx53-guf-vincell.dtb.o imx53-guf-vincell-lt.dtb.o pbl-dtb-$(CONFIG_MACH_GW_VENTANA) += imx6q-gw54xx.dtb.o +pbl-dtb-$(CONFIG_MACH_KONTRON_SAMX6I) += imx6q-samx6i.dtb.o \ + imx6dl-samx6i.dtb.o pbl-dtb-$(CONFIG_MACH_LENOVO_IX4_300D) += armada-xp-lenovo-ix4-300d-bb.dtb.o pbl-dtb-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += armada-xp-gp-bb.dtb.o pbl-dtb-$(CONFIG_MACH_NETGEAR_RN104) += armada-370-rn104-bb.dtb.o diff --git a/arch/arm/dts/imx53-tx53-1011.dts b/arch/arm/dts/imx53-tx53-1011.dts new file mode 100644 index 0000000000..e9b1b3a221 --- /dev/null +++ b/arch/arm/dts/imx53-tx53-1011.dts @@ -0,0 +1,13 @@ +/dts-v1/; +#include <arm/imx53-tx53.dtsi> + +/ { + model = "Ka-Ro electronics TX53 module"; + compatible = "karo,tx53-1011", "karo,tx53", "fsl,imx53"; + + chosen { + stdout-path = &uart1; + }; + + sgtl5000: dummy { }; +}; diff --git a/arch/arm/dts/imx53-tx53-xx30.dts b/arch/arm/dts/imx53-tx53-xx30.dts new file mode 100644 index 0000000000..b9d1c65a2a --- /dev/null +++ b/arch/arm/dts/imx53-tx53-xx30.dts @@ -0,0 +1,13 @@ +/dts-v1/; +#include <arm/imx53-tx53.dtsi> + +/ { + model = "Ka-Ro electronics TX53 module"; + compatible = "karo,tx53-xx30", "karo,tx53", "fsl,imx53"; + + chosen { + stdout-path = &uart1; + }; + + sgtl5000: dummy { }; +}; diff --git a/arch/arm/dts/imx6dl-samx6i.dts b/arch/arm/dts/imx6dl-samx6i.dts new file mode 100644 index 0000000000..d688b9c6ca --- /dev/null +++ b/arch/arm/dts/imx6dl-samx6i.dts @@ -0,0 +1,20 @@ +/* + * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include <arm/imx6dl.dtsi> +#include "imx6dl.dtsi" +#include "imx6qdl-smarc-samx6i.dtsi" + +/ { + model = "Kontron sAMX6i"; + compatible = "kontron,imx6dl-samx6i", "fsl,imx6dl"; +}; diff --git a/arch/arm/dts/imx6q-samx6i.dts b/arch/arm/dts/imx6q-samx6i.dts new file mode 100644 index 0000000000..83f19bcaf8 --- /dev/null +++ b/arch/arm/dts/imx6q-samx6i.dts @@ -0,0 +1,20 @@ +/* + * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include <arm/imx6q.dtsi> +#include "imx6q.dtsi" +#include "imx6qdl-smarc-samx6i.dtsi" + +/ { + model = "Kontron sAMX6i"; + compatible = "kontron,imx6q-samx6i", "fsl,imx6q"; +}; diff --git a/arch/arm/dts/imx6qdl-smarc-samx6i.dtsi b/arch/arm/dts/imx6qdl-smarc-samx6i.dtsi new file mode 100644 index 0000000000..31a12fe268 --- /dev/null +++ b/arch/arm/dts/imx6qdl-smarc-samx6i.dtsi @@ -0,0 +1,509 @@ +/* + * Copyright 2017 (C) Priit Laes <plaes@plaes.org> + * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de> + * + * Based on initial work by Nikita Yushchenko <nyushchenko at dev.rtsoft.ru> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include <dt-bindings/gpio/gpio.h> + +/ { + chosen { + linux,stdout-path = &uart2; + + environment-spinor { + compatible = "barebox,environment"; + device-path = &flash_bareboxenv; + status = "disabled"; + }; + + environment-sd4 { + compatible = "barebox,environment"; + device-path = &usdhc4_bareboxenv; + status = "disabled"; + }; + }; + + reg_3v3_s5: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "V_3V3_S5"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_1v8_s5: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "V_1V8_S5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3v3_s0: regulator@2 { + compatible = "regulator-fixed"; + regulator-name = "V_3V3_S0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_1v0_s0: regulator@3 { + compatible = "regulator-fixed"; + regulator-name = "V_1V0_S0"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-boot-on; + regulator-always-on; + }; + + i2c_pfuze: i2c-gpio-0 { + compatible = "i2c-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c_gpio_0>; + sda-gpios = <&gpio1 28 0>; + scl-gpios = <&gpio1 30 0>; + #address-cells = <1>; + #size-cells = <0>; + i2c-gpio,delay-us = <2>; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet_smarc>; + phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + phy-mode = "rgmii"; + status = "okay"; +}; + +&i2c_pfuze { + pfuze100@08 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + /* Looks unused by pfuze100 driver */ + interrupt-parent = <&gpio7>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; + + regulators { + reg_v_core_s0: sw1ab { + regulator-name = "V_CORE_S0"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_vddsoc_s0: sw1c { + regulator-name = "V_VDDSOC_S0"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3v15_s0: sw2 { + regulator-name = "V_3V15_S0"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + /* sw3a/b is used in dual mode, but driver does not + * support it? Although, there's no need to control + * DDR power - so just leaving dummy entries for sw3a + * and sw3b for now. + */ + sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_1v8_s0: sw4 { + regulator-name = "V_1V8_S0"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + /* Regulator for USB */ + reg_5v0_s0: swbst { + regulator-name = "V_5V0_S0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + regulator-boot-on; + }; + + reg_vsnvs: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_vrefddr: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + /* Per schematics, of all VGEN's, only VGEN5 has some + * usage ... but even that - over DNI resistor + */ + vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + reg_2v5_s0: vgen5 { + regulator-name = "V_2V5_S0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + }; + }; +}; + +&ecspi4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi4>; + fsl,spi-num-chipselects = <3>; + cs-gpios = <&gpio3 24 0>, <&gpio3 29 0>, <&gpio3 25 0>; + status = "okay"; + + flash: m25p80@0 { + compatible = "winbond,w25q16dw", "jedec,spi-nor"; + spi-max-frequency = <20000000>; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x000000 0x0c0000>; + }; + + flash_bareboxenv: partition@c0000 { + label = "environment"; + reg = <0x0c0000 0x010000>; + }; + + partition@d0000 { + label = "user"; + reg = <0x0d0000 0x130000>; + }; + }; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>; + reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_smarc>; + fsl,uart-has-rtscts; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2_smarc>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4_smarc>; + fsl,uart-has-rtscts; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5_smarc>; +}; + +&usbotg { + /* + * no 'imx6-usb-charger-detection' + * since USB_OTG_CHD_B pin is not wired + */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + status = "okay"; +}; + +&usbh1 { + vbus-supply = <®_5v0_s0>; + status = "okay"; +}; + +&usdhc4 { + /* Internal eMMC, optional on some boards */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + bus-width = <8>; + no-1-8-v; + non-removable; + status = "okay"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x0 0xe0000>; + }; + + usdhc4_bareboxenv: partition@e0000 { + label = "environment"; + reg = <0xe0000 0x20000>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_boot>; + + pinctrl_boot: boot { + fsl,pins = < + /* GPIOS for version and id detection */ + MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 + MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x80000000 + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 + >; + }; + + pinctrl_flexcan1: flexcan1-smarc { + fsl,pins = < + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000 + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x80000000 + >; + }; + + pinctrl_flexcan2: flexcan2-smarc { + fsl,pins = < + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000 + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000 + >; + }; + + pinctrl_enet_smarc: fecgrp-smarc { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000 + >; + }; + + pinctrl_i2c_gpio_0: i2c-gpio-0-smarc { + fsl,pins = < + /* SCL GPIO */ + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 + /* SDA GPIO */ + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 + >; + }; + + pinctrl_i2c3: i2c3-smarc { + fsl,pins = < + MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_ecspi4: ecspi4-smarc { + fsl,pins = < + MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x80000000 + MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x80000000 + MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x80000000 + MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x80000000 + + /* In hardware, ECSPI4's SS0,SS1,SS3 are wired. + But spi-imx driver support only continuous + numbering, and only can use GPIOs (and not + ECSPI's hardware SS) for CS. So linux view + of CS numbers differs from hw view, and + pins are configured as GPIOs */ + + /* physical - CS2, in linux - CS0, either internal flash or SMARC CS0 */ + MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x80000000 + /* physical - CS0, in linux - CS1, either SMARC CS0 or not-connected */ + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 + /* physical - CS3, in linux - CS2, SMARC CS1 */ + MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000 + >; + }; + + pinctrl_pcie: pcie-smarc { + fsl,pins = < + /* RST_PCIE_A# */ + MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x80000000 + /* PCIE_WAKE# */ + MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x80000000 + >; + }; + + pinctrl_uart1_smarc: uart1grp-smarc { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1 + >; + }; + + pinctrl_uart2_smarc: uart2grp-smarc { + fsl,pins = < + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart4_smarc: uart4grp-smarc { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 + MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 + >; + }; + + pinctrl_uart5_smarc: uart5grp-smarc { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotg-grp-smarc { + fsl,pins = < + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1f8b0 + /* TODO: Comment out power and OC gpio's for now, since + * these are not used by driver + */ + /* USB power */ + // MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x80000000 + /* USB OC */ + // MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x80000000 + >; + }; + + pinctrl_usdhc4: usdhc4grp-smarc { + fsl,pins = < + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059 + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 + >; + }; +}; diff --git a/arch/arm/include/asm/assembler64.h b/arch/arm/include/asm/assembler64.h new file mode 100644 index 0000000000..26182aa5f6 --- /dev/null +++ b/arch/arm/include/asm/assembler64.h @@ -0,0 +1,21 @@ +#ifndef __ASM_ARCH_ASSEMBLY_H +#define __ASM_ARCH_ASSEMBLY_H + +#ifndef __ASSEMBLY__ +#error "Only include this from assembly code" +#endif + +/* + * Branch according to exception level + */ +.macro switch_el, xreg, el3_label, el2_label, el1_label + mrs \xreg, CurrentEL + cmp \xreg, 0xc + b.eq \el3_label + cmp \xreg, 0x8 + b.eq \el2_label + cmp \xreg, 0x4 + b.eq \el1_label +.endm + +#endif /* __ASM_ARCH_ASSEMBLY_H */
\ No newline at end of file diff --git a/arch/arm/include/asm/barebox-arm-head.h b/arch/arm/include/asm/barebox-arm-head.h index bd9c9b1c4f..4d0da6c491 100644 --- a/arch/arm/include/asm/barebox-arm-head.h +++ b/arch/arm/include/asm/barebox-arm-head.h @@ -21,6 +21,7 @@ void cortex_a7_lowlevel_init(void); static inline void __barebox_arm_head(void) { __asm__ __volatile__ ( +#ifdef CONFIG_CPU_32 #ifdef CONFIG_THUMB2_BAREBOX ".arm\n" "adr r9, 1f + 1\n" @@ -41,10 +42,22 @@ static inline void __barebox_arm_head(void) "1: b 1b\n" "1: b 1b\n" #endif +#else + "b 2f\n" + "nop\n" + "nop\n" + "nop\n" + "nop\n" + "nop\n" +#endif ".asciz \"barebox\"\n" +#ifdef CONFIG_CPU_32 ".word _text\n" /* text base. If copied there, * barebox can skip relocation */ +#else + ".word 0xffffffff\n" +#endif ".word _barebox_image_size\n" /* image size to copy */ ".rept 8\n" ".word 0x55555555\n" diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h index 3aea2e070e..fa673a63a7 100644 --- a/arch/arm/include/asm/barebox-arm.h +++ b/arch/arm/include/asm/barebox-arm.h @@ -32,17 +32,21 @@ #include <linux/compiler.h> #include <asm/barebox-arm-head.h> -/* cpu/.../cpu.c */ -int cleanup_before_linux(void); +unsigned long get_runtime_offset(void); -/* arch/<arch>board(s)/.../... */ -int board_init(void); -int dram_init (void); - -extern char __exceptions_start[], __exceptions_stop[]; - -void board_init_lowlevel(void); -uint32_t get_runtime_offset(void); +/* global_variable_offset() - Access global variables when not running at link address + * + * Get the offset of global variables when not running at the address we are + * linked at. ARM uses absolute addresses, so we must add the runtime offset + * whereas aarch64 uses PC relative addresses, so nothing must be done here. + */ +static inline unsigned long global_variable_offset(void) +{ + if (IS_ENABLED(CONFIG_CPU_32)) + return get_runtime_offset(); + else + return 0; +} void setup_c(void); void relocate_to_current_adr(void); @@ -161,13 +165,13 @@ static inline unsigned long arm_mem_barebox_image(unsigned long membase, #define ENTRY_FUNCTION(name, arg0, arg1, arg2) \ static void __##name(uint32_t, uint32_t, uint32_t); \ \ - void __naked __section(.text_head_entry_##name) name \ + void NAKED __section(.text_head_entry_##name) name \ (uint32_t r0, uint32_t r1, uint32_t r2) \ { \ __barebox_arm_head(); \ __##name(r0, r1, r2); \ } \ - static void __naked noinline __##name \ + static void NAKED noinline __##name \ (uint32_t arg0, uint32_t arg1, uint32_t arg2) /* @@ -181,4 +185,17 @@ static inline unsigned long arm_mem_barebox_image(unsigned long membase, #define barebox_image_size (__image_end - __image_start) +#ifdef CONFIG_CPU_32 +#define NAKED __naked +#else +/* + * There is no naked support for aarch64, so do not rely on it. + * This basically means we must have a stack configured when a + * function with the naked attribute is entered. On nowadays hardware + * the ROM should have some basic stack already. If not, set one + * up before jumping into the barebox entry functions. + */ +#define NAKED +#endif + #endif /* _BAREBOX_ARM_H_ */ diff --git a/arch/arm/include/asm/barebox.h b/arch/arm/include/asm/barebox.h index 5a6622235b..4e89466593 100644 --- a/arch/arm/include/asm/barebox.h +++ b/arch/arm/include/asm/barebox.h @@ -2,9 +2,11 @@ #define _BAREBOX_H_ 1 #ifdef CONFIG_ARM_UNWIND -#ifndef CONFIG_CPU_V8 #define ARCH_HAS_STACK_DUMP #endif + +#ifdef CONFIG_CPU_V8 +#define ARCH_HAS_STACK_DUMP #endif #ifdef CONFIG_ARM_EXCEPTIONS diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index b51225efe5..348a76b2c1 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h @@ -115,7 +115,7 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset); #endif /* __ARMEB__ */ -#if defined(__LINUX_ARM_ARCH__) && (__LINUX_ARM_ARCH__ >= 5) +#if defined (CONFIG_CPU_32) && defined(__LINUX_ARM_ARCH__) && (__LINUX_ARM_ARCH__ >= 5) static inline int constant_fls(int x) { int r = 32; @@ -156,31 +156,13 @@ static inline int constant_fls(int x) #define __ffs(x) (ffs(x) - 1) #define ffz(x) __ffs(~(x)) #else /* ! __ARM__USE_GENERIC_FF */ -/* - * ffz = Find First Zero in word. Undefined if no zero exists, - * so code should check against ~0UL first.. - */ -static inline unsigned long ffz(unsigned long word) -{ - int k; - - word = ~word; - k = 31; - if (word & 0x0000ffff) { k -= 16; word <<= 16; } - if (word & 0x00ff0000) { k -= 8; word <<= 8; } - if (word & 0x0f000000) { k -= 4; word <<= 4; } - if (word & 0x30000000) { k -= 2; word <<= 2; } - if (word & 0x40000000) { k -= 1; } - return k; -} +#include <asm-generic/bitops/ffz.h> #include <asm-generic/bitops/__ffs.h> #include <asm-generic/bitops/ffs.h> #include <asm-generic/bitops/fls.h> #endif /* __ARM__USE_GENERIC_FF */ -#if __LINUX_ARM_ARCH__ == 8 #include <asm-generic/bitops/__fls.h> -#endif #include <asm-generic/bitops/fls64.h> diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index b5460a7876..0822cb78c3 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -1,10 +1,11 @@ #ifndef __ASM_CACHE_H #define __ASM_CACHE_H -#ifdef CONFIG_CPU_64v8 -extern void v8_invalidate_icache_all(void); -extern void v8_dcache_all(void); -#endif +void v8_invalidate_icache_all(void); +void v8_flush_dcache_all(void); +void v8_invalidate_dcache_all(void); +void v8_flush_dcache_range(unsigned long start, unsigned long end); +void v8_inv_dcache_range(unsigned long start, unsigned long end); static inline void icache_invalidate(void) { diff --git a/arch/arm/include/asm/common.h b/arch/arm/include/asm/common.h index 07ae619cea..97bfdc43f5 100644 --- a/arch/arm/include/asm/common.h +++ b/arch/arm/include/asm/common.h @@ -4,13 +4,19 @@ static inline unsigned long get_pc(void) { unsigned long pc; - +#ifdef CONFIG_CPU_32 __asm__ __volatile__( "mov %0, pc\n" : "=r" (pc) : : "memory"); - +#else + __asm__ __volatile__( + "adr %0, .\n" + : "=r" (pc) + : + : "memory"); +#endif return pc; } diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h index 1ba2edf012..a68886b162 100644 --- a/arch/arm/include/asm/dma.h +++ b/arch/arm/include/asm/dma.h @@ -34,12 +34,12 @@ static inline void dma_free_coherent(void *mem, dma_addr_t dma_handle, free(mem); } -static inline void dma_sync_single_for_cpu(unsigned long address, size_t size, +static inline void dma_sync_single_for_cpu(dma_addr_t address, size_t size, enum dma_data_direction dir) { } -static inline void dma_sync_single_for_device(unsigned long address, size_t size, +static inline void dma_sync_single_for_device(dma_addr_t address, size_t size, enum dma_data_direction dir) { } diff --git a/arch/arm/include/asm/esr.h b/arch/arm/include/asm/esr.h new file mode 100644 index 0000000000..77eeb2cc64 --- /dev/null +++ b/arch/arm/include/asm/esr.h @@ -0,0 +1,117 @@ +/* + * Copyright (C) 2013 - ARM Ltd + * Author: Marc Zyngier <marc.zyngier@arm.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __ASM_ESR_H +#define __ASM_ESR_H + +#include <asm/memory.h> + +#define ESR_ELx_EC_UNKNOWN (0x00) +#define ESR_ELx_EC_WFx (0x01) +/* Unallocated EC: 0x02 */ +#define ESR_ELx_EC_CP15_32 (0x03) +#define ESR_ELx_EC_CP15_64 (0x04) +#define ESR_ELx_EC_CP14_MR (0x05) +#define ESR_ELx_EC_CP14_LS (0x06) +#define ESR_ELx_EC_FP_ASIMD (0x07) +#define ESR_ELx_EC_CP10_ID (0x08) +/* Unallocated EC: 0x09 - 0x0B */ +#define ESR_ELx_EC_CP14_64 (0x0C) +/* Unallocated EC: 0x0d */ +#define ESR_ELx_EC_ILL (0x0E) +/* Unallocated EC: 0x0F - 0x10 */ +#define ESR_ELx_EC_SVC32 (0x11) +#define ESR_ELx_EC_HVC32 (0x12) +#define ESR_ELx_EC_SMC32 (0x13) +/* Unallocated EC: 0x14 */ +#define ESR_ELx_EC_SVC64 (0x15) +#define ESR_ELx_EC_HVC64 (0x16) +#define ESR_ELx_EC_SMC64 (0x17) +#define ESR_ELx_EC_SYS64 (0x18) +/* Unallocated EC: 0x19 - 0x1E */ +#define ESR_ELx_EC_IMP_DEF (0x1f) +#define ESR_ELx_EC_IABT_LOW (0x20) +#define ESR_ELx_EC_IABT_CUR (0x21) +#define ESR_ELx_EC_PC_ALIGN (0x22) +/* Unallocated EC: 0x23 */ +#define ESR_ELx_EC_DABT_LOW (0x24) +#define ESR_ELx_EC_DABT_CUR (0x25) +#define ESR_ELx_EC_SP_ALIGN (0x26) +/* Unallocated EC: 0x27 */ +#define ESR_ELx_EC_FP_EXC32 (0x28) +/* Unallocated EC: 0x29 - 0x2B */ +#define ESR_ELx_EC_FP_EXC64 (0x2C) +/* Unallocated EC: 0x2D - 0x2E */ +#define ESR_ELx_EC_SERROR (0x2F) +#define ESR_ELx_EC_BREAKPT_LOW (0x30) +#define ESR_ELx_EC_BREAKPT_CUR (0x31) +#define ESR_ELx_EC_SOFTSTP_LOW (0x32) +#define ESR_ELx_EC_SOFTSTP_CUR (0x33) +#define ESR_ELx_EC_WATCHPT_LOW (0x34) +#define ESR_ELx_EC_WATCHPT_CUR (0x35) +/* Unallocated EC: 0x36 - 0x37 */ +#define ESR_ELx_EC_BKPT32 (0x38) +/* Unallocated EC: 0x39 */ +#define ESR_ELx_EC_VECTOR32 (0x3A) +/* Unallocted EC: 0x3B */ +#define ESR_ELx_EC_BRK64 (0x3C) +/* Unallocated EC: 0x3D - 0x3F */ +#define ESR_ELx_EC_MAX (0x3F) + +#define ESR_ELx_EC_SHIFT (26) +#define ESR_ELx_EC_MASK (UL(0x3F) << ESR_ELx_EC_SHIFT) + +#define ESR_ELx_IL (UL(1) << 25) +#define ESR_ELx_ISS_MASK (ESR_ELx_IL - 1) +#define ESR_ELx_ISV (UL(1) << 24) +#define ESR_ELx_SAS_SHIFT (22) +#define ESR_ELx_SAS (UL(3) << ESR_ELx_SAS_SHIFT) +#define ESR_ELx_SSE (UL(1) << 21) +#define ESR_ELx_SRT_SHIFT (16) +#define ESR_ELx_SRT_MASK (UL(0x1F) << ESR_ELx_SRT_SHIFT) +#define ESR_ELx_SF (UL(1) << 15) +#define ESR_ELx_AR (UL(1) << 14) +#define ESR_ELx_EA (UL(1) << 9) +#define ESR_ELx_CM (UL(1) << 8) +#define ESR_ELx_S1PTW (UL(1) << 7) +#define ESR_ELx_WNR (UL(1) << 6) +#define ESR_ELx_FSC (0x3F) +#define ESR_ELx_FSC_TYPE (0x3C) +#define ESR_ELx_FSC_EXTABT (0x10) +#define ESR_ELx_FSC_ACCESS (0x08) +#define ESR_ELx_FSC_FAULT (0x04) +#define ESR_ELx_FSC_PERM (0x0C) +#define ESR_ELx_CV (UL(1) << 24) +#define ESR_ELx_COND_SHIFT (20) +#define ESR_ELx_COND_MASK (UL(0xF) << ESR_ELx_COND_SHIFT) +#define ESR_ELx_WFx_ISS_WFE (UL(1) << 0) +#define ESR_ELx_xVC_IMM_MASK ((1UL << 16) - 1) + +/* ESR value templates for specific events */ + +/* BRK instruction trap from AArch64 state */ +#define ESR_ELx_VAL_BRK64(imm) \ + ((ESR_ELx_EC_BRK64 << ESR_ELx_EC_SHIFT) | ESR_ELx_IL | \ + ((imm) & 0xffff)) + +#ifndef __ASSEMBLY__ +#include <asm/types.h> + +const char *esr_get_class_string(u32 esr); +#endif /* __ASSEMBLY */ + +#endif /* __ASM_ESR_H */ diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h index f68ab37143..99833ac5b4 100644 --- a/arch/arm/include/asm/mmu.h +++ b/arch/arm/include/asm/mmu.h @@ -6,24 +6,8 @@ #include <malloc.h> #include <xfuncs.h> -#ifdef CONFIG_CPU_64v8 -#include <asm/pgtable64.h> - -#define DEV_MEM (PMD_ATTRINDX(MT_DEVICE_nGnRnE) | PMD_SECT_AF | PMD_TYPE_SECT) -#define CACHED_MEM (PMD_ATTRINDX(MT_NORMAL) | PMD_SECT_S | PMD_SECT_AF | PMD_TYPE_SECT) -#define UNCACHED_MEM (PMD_ATTRINDX(MT_NORMAL_NC) | PMD_SECT_S | PMD_SECT_AF | PMD_TYPE_SECT) -#else -#include <asm/pgtable.h> - -#define PMD_SECT_DEF_UNCACHED (PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT) -#define PMD_SECT_DEF_CACHED (PMD_SECT_WB | PMD_SECT_DEF_UNCACHED) -#endif - - - struct arm_memory; -void mmu_enable(void); void mmu_disable(void); static inline void arm_create_section(unsigned long virt, unsigned long phys, int size_m, unsigned int flags) @@ -70,4 +54,7 @@ void __dma_clean_range(unsigned long, unsigned long); void __dma_flush_range(unsigned long, unsigned long); void __dma_inv_range(unsigned long, unsigned long); +void mmu_early_enable(unsigned long membase, unsigned long memsize, + unsigned long ttb); + #endif /* __ASM_MMU_H */ diff --git a/arch/arm/include/asm/pgtable64.h b/arch/arm/include/asm/pgtable64.h index 20bea5b28a..d8382505d0 100644 --- a/arch/arm/include/asm/pgtable64.h +++ b/arch/arm/include/asm/pgtable64.h @@ -21,7 +21,7 @@ #define UNUSED_DESC 0x6EbAAD0BBADbA6E0 #define VA_START 0x0 -#define BITS_PER_VA 33 +#define BITS_PER_VA 39 /* Granule size of 4KB is being used */ #define GRANULE_SIZE_SHIFT 12 @@ -47,51 +47,28 @@ #define GRANULE_MASK GRANULE_SIZE - -/* - * Level 2 descriptor (PMD). - */ -#define PMD_TYPE_MASK (3 << 0) -#define PMD_TYPE_FAULT (0 << 0) -#define PMD_TYPE_TABLE (3 << 0) -#define PMD_TYPE_SECT (1 << 0) -#define PMD_TABLE_BIT (1 << 1) - -/* - * Section - */ -#define PMD_SECT_VALID (1 << 0) -#define PMD_SECT_USER (1 << 6) /* AP[1] */ -#define PMD_SECT_RDONLY (1 << 7) /* AP[2] */ -#define PMD_SECT_S (3 << 8) -#define PMD_SECT_AF (1 << 10) -#define PMD_SECT_NG (1 << 11) -#define PMD_SECT_CONT (1 << 52) -#define PMD_SECT_PXN (1 << 53) -#define PMD_SECT_UXN (1 << 54) - -/* - * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). - */ -#define PMD_ATTRINDX(t) ((t) << 2) -#define PMD_ATTRINDX_MASK (7 << 2) - -/* - * Level 3 descriptor (PTE). - */ -#define PTE_TYPE_MASK (3 << 0) -#define PTE_TYPE_FAULT (0 << 0) -#define PTE_TYPE_PAGE (3 << 0) -#define PTE_TABLE_BIT (1 << 1) -#define PTE_USER (1 << 6) /* AP[1] */ -#define PTE_RDONLY (1 << 7) /* AP[2] */ -#define PTE_SHARED (3 << 8) /* SH[1:0], inner shareable */ -#define PTE_AF (1 << 10) /* Access Flag */ -#define PTE_NG (1 << 11) /* nG */ -#define PTE_DBM (1 << 51) /* Dirty Bit Management */ -#define PTE_CONT (1 << 52) /* Contiguous range */ -#define PTE_PXN (1 << 53) /* Privileged XN */ -#define PTE_UXN (1 << 54) /* User XN */ +/* Hardware page table definitions */ +#define PTE_TYPE_MASK (3 << 0) +#define PTE_TYPE_FAULT (0 << 0) +#define PTE_TYPE_TABLE (3 << 0) +#define PTE_TYPE_PAGE (3 << 0) +#define PTE_TYPE_BLOCK (1 << 0) + +#define PTE_TABLE_PXN (1UL << 59) +#define PTE_TABLE_XN (1UL << 60) +#define PTE_TABLE_AP (1UL << 61) +#define PTE_TABLE_NS (1UL << 63) + +/* Block */ +#define PTE_BLOCK_MEMTYPE(x) ((x) << 2) +#define PTE_BLOCK_NS (1 << 5) +#define PTE_BLOCK_NON_SHARE (0 << 8) +#define PTE_BLOCK_OUTER_SHARE (2 << 8) +#define PTE_BLOCK_INNER_SHARE (3 << 8) +#define PTE_BLOCK_AF (1 << 10) +#define PTE_BLOCK_NG (1 << 11) +#define PTE_BLOCK_PXN (UL(1) << 53) +#define PTE_BLOCK_UXN (UL(1) << 54) /* * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). @@ -109,6 +86,13 @@ #define MT_NORMAL 4 #define MT_NORMAL_WT 5 +#define MEMORY_ATTRIBUTES ((0x00 << (MT_DEVICE_nGnRnE * 8)) | \ + (0x04 << (MT_DEVICE_nGnRE * 8)) | \ + (0x0c << (MT_DEVICE_GRE * 8)) | \ + (0x44 << (MT_NORMAL_NC * 8)) | \ + (UL(0xff) << (MT_NORMAL * 8)) | \ + (UL(0xbb) << (MT_NORMAL_WT * 8))) + /* * TCR flags. */ @@ -132,6 +116,7 @@ #define TCR_EL1_IPS_BITS (UL(3) << 32) /* 42 bits physical address */ #define TCR_EL2_IPS_BITS (3 << 16) /* 42 bits physical address */ #define TCR_EL3_IPS_BITS (3 << 16) /* 42 bits physical address */ +#define TCR_EPD1_DISABLE (1 << 23) #define TCR_EL1_RSVD (1 << 31) #define TCR_EL2_RSVD (1 << 31 | 1 << 23) diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h index 6520a0a73a..7fbd8d9b6f 100644 --- a/arch/arm/include/asm/ptrace.h +++ b/arch/arm/include/asm/ptrace.h @@ -10,6 +10,23 @@ #ifndef __ASM_ARM_PTRACE_H #define __ASM_ARM_PTRACE_H +#ifdef CONFIG_CPU_64 + +#ifndef __ASSEMBLY__ + +/* + * This struct defines the way the registers are stored + * on the stack during an exception. + */ +struct pt_regs { + unsigned long elr; + unsigned long regs[31]; +}; + +#endif /* __ASSEMBLY__ */ + +#else /* CONFIG_CPU_64 */ + #define PTRACE_GETREGS 12 #define PTRACE_SETREGS 13 #define PTRACE_GETFPREGS 14 @@ -141,4 +158,6 @@ extern void show_regs(struct pt_regs *); #endif /* __ASSEMBLY__ */ +#endif /* CONFIG_CPU_64 */ + #endif diff --git a/arch/arm/include/asm/sections.h b/arch/arm/include/asm/sections.h index 8c7bc8cccc..6933c7032d 100644 --- a/arch/arm/include/asm/sections.h +++ b/arch/arm/include/asm/sections.h @@ -4,30 +4,12 @@ #ifndef __ASSEMBLY__ #include <asm-generic/sections.h> -/* - * Access a linker supplied variable. Use this if your code might not be running - * at the address it is linked at. - */ -#define ld_var(name) ({ \ - unsigned long __ld_var_##name(void); \ - __ld_var_##name(); \ -}) - -#else - -/* - * Access a linker supplied variable, assembler macro version - */ -.macro ld_var name, reg, scratch - 1000: - ldr \reg, 1001f - ldr \scratch, =1000b - add \reg, \reg, \scratch - b 1002f - 1001: - .word \name - 1000b - 1002: -.endm +extern char __rel_dyn_start[]; +extern char __rel_dyn_end[]; +extern char __dynsym_start[]; +extern char __dynsym_end[]; +extern char __exceptions_start[]; +extern char __exceptions_stop[]; #endif diff --git a/arch/arm/include/asm/stacktrace.h b/arch/arm/include/asm/stacktrace.h index 10f70e1675..602e79ced4 100644 --- a/arch/arm/include/asm/stacktrace.h +++ b/arch/arm/include/asm/stacktrace.h @@ -4,7 +4,9 @@ struct stackframe { unsigned long fp; unsigned long sp; +#ifdef CONFIG_CPU_32 unsigned long lr; +#endif unsigned long pc; }; diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S index 73baff0ca5..9df1800543 100644 --- a/arch/arm/lib/pbl.lds.S +++ b/arch/arm/lib/pbl.lds.S @@ -25,8 +25,13 @@ #define BASE (TEXT_BASE - SZ_2M) #endif +#ifdef CONFIG_CPU_32 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) +#else +OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64") +OUTPUT_ARCH(aarch64) +#endif SECTIONS { . = BASE; @@ -34,10 +39,10 @@ SECTIONS PRE_IMAGE . = ALIGN(4); + ._text : { *(._text) } .text : { _stext = .; - _text = .; *(.text_head_entry*) __bare_init_start = .; *(.text_bare_init*) @@ -61,22 +66,22 @@ SECTIONS . = ALIGN(4); .data : { *(.data*) } - .rel.dyn : { - __rel_dyn_start = .; - *(.rel*) - __rel_dyn_end = .; - } + .rel_dyn_start : { *(.__rel_dyn_start) } +#ifdef CONFIG_CPU_32 + .rel.dyn : { *(.rel*) } +#else + .rela.dyn : { *(.rela*) } +#endif + .rel_dyn_end : { *(.__rel_dyn_end) } - .dynsym : { - __dynsym_start = .; - *(.dynsym) - __dynsym_end = .; - } + .__dynsym_start : { *(.__dynsym_start) } + .dynsym : { *(.dynsym) } + .__dynsym_end : { *(.__dynsym_end) } . = ALIGN(4); - __bss_start = .; + .__bss_start : { *(.__bss_start) } .bss : { *(.bss*) } - __bss_stop = .; + .__bss_stop : { *(.__bss_stop) } _end = .; . = ALIGN(4); @@ -87,10 +92,9 @@ SECTIONS __piggydata_end = .; . = ALIGN(4); - .image_end : { - KEEP(*(.image_end)) - } + .image_end : { *(.image_end) } __image_end = .; + _barebox_image_size = __image_end - BASE; _barebox_pbl_size = __bss_start - BASE; } diff --git a/arch/arm/lib32/Makefile b/arch/arm/lib32/Makefile index cdd07322cf..3c02a0bf96 100644 --- a/arch/arm/lib32/Makefile +++ b/arch/arm/lib32/Makefile @@ -1,5 +1,7 @@ obj-$(CONFIG_ARM_LINUX) += armlinux.o obj-$(CONFIG_CMD_BOOTZ) += bootz.o +obj-$(CONFIG_BOOTM) += bootm.o +obj-$(CONFIG_CMD_BOOTU) += bootu.o obj-y += div0.o obj-y += findbit.o obj-y += io.o diff --git a/arch/arm/lib32/barebox.lds.S b/arch/arm/lib32/barebox.lds.S index 6fadc2a357..594bf56837 100644 --- a/arch/arm/lib32/barebox.lds.S +++ b/arch/arm/lib32/barebox.lds.S @@ -37,10 +37,11 @@ SECTIONS PRE_IMAGE #endif . = ALIGN(4); + + ._text : { *(._text) } .text : { _stext = .; - _text = .; *(.text_entry*) __bare_init_start = .; *(.text_bare_init*) @@ -109,25 +110,21 @@ SECTIONS .dtb : { BAREBOX_DTB() } - .rel.dyn : { - __rel_dyn_start = .; - *(.rel*) - __rel_dyn_end = .; - } + .rel_dyn_start : { *(.__rel_dyn_start) } + .rel.dyn : { *(.rel*) } + .rel_dyn_end : { *(.__rel_dyn_end) } - .dynsym : { - __dynsym_start = .; - *(.dynsym) - __dynsym_end = .; - } + .__dynsym_start : { *(.__dynsym_start) } + .dynsym : { *(.dynsym) } + .__dynsym_end : { *(.__dynsym_end) } _edata = .; .image_end : { *(.__image_end) } . = ALIGN(4); - __bss_start = .; + .__bss_start : { *(.__bss_start) } .bss : { *(.bss*) } - __bss_stop = .; + .__bss_stop : { *(.__bss_stop) } #ifdef CONFIG_ARM_SECURE_MONITOR . = ALIGN(16); diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib32/bootm.c index 25efb42541..c8bf72f0e0 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib32/bootm.c @@ -362,7 +362,7 @@ static int do_bootz_linux(struct image_data *data) data->os_res = request_sdram_region("zimage", load_address, image_size); if (!data->os_res) { - pr_err("bootm/zImage: failed to request memory at 0x%lx to 0x%lx (%d).\n", + pr_err("bootm/zImage: failed to request memory at 0x%lx to 0x%lx (%zu).\n", load_address, load_address + image_size, image_size); ret = -ENOMEM; goto err_out; @@ -522,7 +522,7 @@ static int do_bootm_aimage(struct image_data *data) linux_bootargs_overwrite(header->cmdline); if (!getenv("aimage_noverwrite_tags")) - armlinux_set_bootparams((void*)header->tags_addr); + armlinux_set_bootparams((void *)(unsigned long)header->tags_addr); cmp = &header->second_stage; if (cmp->size) { diff --git a/arch/arm/lib/bootu.c b/arch/arm/lib32/bootu.c index d811da39ce..d811da39ce 100644 --- a/arch/arm/lib/bootu.c +++ b/arch/arm/lib32/bootu.c diff --git a/arch/arm/lib32/runtime-offset.S b/arch/arm/lib32/runtime-offset.S index 7375cb961b..f86ca7865e 100644 --- a/arch/arm/lib32/runtime-offset.S +++ b/arch/arm/lib32/runtime-offset.S @@ -10,42 +10,10 @@ ENTRY(get_runtime_offset) 1: adr r0, 1b ldr r1, linkadr - subs r0, r1, r0 -THUMB( subs r0, r0, #1) + subs r0, r0, r1 +THUMB( adds r0, r0, #1) mov pc, lr linkadr: .word get_runtime_offset ENDPROC(get_runtime_offset) - -.globl __ld_var_base -__ld_var_base: - -/* - * Functions to calculate selected linker supplied variables during runtime. - * This is needed for relocatable binaries when the linker variables are - * needed before finxing up the relocations. - */ -.macro ld_var_entry name - ENTRY(__ld_var_\name) - ldr r0, __\name - b 1f - __\name: .word \name - __ld_var_base - ENDPROC(__ld_var_\name) -.endm - -ld_var_entry _text -ld_var_entry __rel_dyn_start -ld_var_entry __rel_dyn_end -ld_var_entry __dynsym_start -ld_var_entry __dynsym_end -ld_var_entry __bss_start -ld_var_entry __bss_stop -#ifdef __PBL__ -ld_var_entry __image_end -#endif - -1: - ldr r1, =__ld_var_base - adds r0, r0, r1 - mov pc, lr diff --git a/arch/arm/lib64/Makefile b/arch/arm/lib64/Makefile index 4b7b7e3cc5..77647128a5 100644 --- a/arch/arm/lib64/Makefile +++ b/arch/arm/lib64/Makefile @@ -1,7 +1,9 @@ +obj-y += stacktrace.o obj-$(CONFIG_ARM_LINUX) += armlinux.o obj-y += div0.o obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS) += memcpy.o obj-$(CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS) += memset.o extra-y += barebox.lds +obj-pbl-y += runtime-offset.o pbl-y += div0.o diff --git a/arch/arm/lib64/armlinux.c b/arch/arm/lib64/armlinux.c index 54ce6ca046..238e8b67a4 100644 --- a/arch/arm/lib64/armlinux.c +++ b/arch/arm/lib64/armlinux.c @@ -1,51 +1,127 @@ /* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> + * Copyright (C) 2018 Sascha Hauer <s.hauer@pengutronix.de> * - * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. */ #include <boot.h> #include <common.h> -#include <command.h> -#include <driver.h> #include <environment.h> #include <image.h> -#include <init.h> #include <fs.h> -#include <linux/list.h> #include <xfuncs.h> #include <malloc.h> #include <fcntl.h> #include <errno.h> #include <memory.h> #include <of.h> -#include <magicvar.h> - +#include <init.h> +#include <bootm.h> +#include <linux/list.h> #include <asm/byteorder.h> #include <asm/setup.h> #include <asm/barebox-arm.h> #include <asm/armlinux.h> #include <asm/system.h> -void start_linux(void *adr, int swap, unsigned long initrd_address, - unsigned long initrd_size, void *oftree, - enum arm_security_state bootm_secure_state) +static int do_bootm_linux(struct image_data *data) { - void (*kernel)(void *dtb) = adr; + void (*fn)(unsigned long dtb, unsigned long x1, unsigned long x2, + unsigned long x3); + resource_size_t start, end; + unsigned long text_offset, image_size, devicetree, kernel; + int ret; + + text_offset = le64_to_cpup(data->os_header + 8); + image_size = le64_to_cpup(data->os_header + 16); + + ret = memory_bank_first_find_space(&start, &end); + if (ret) + goto out; + + kernel = ALIGN(start, SZ_2M) + text_offset; + + ret = bootm_load_os(data, kernel); + if (ret) + goto out; + + devicetree = ALIGN(kernel + image_size, PAGE_SIZE); + + ret = bootm_load_devicetree(data, devicetree); + if (ret) + goto out; + + printf("Loaded kernel to 0x%08lx, devicetree at 0x%08lx\n", + kernel, devicetree); shutdown_barebox(); - kernel(oftree); + fn = (void *)kernel; + + fn(devicetree, 0, 0, 0); + + ret = -EINVAL; + +out: + return ret; +} + +static struct image_handler aarch64_linux_handler = { + .name = "ARM aarch64 Linux image", + .bootm = do_bootm_linux, + .filetype = filetype_arm64_linux_image, +}; + +static int do_bootm_barebox(struct image_data *data) +{ + void (*fn)(unsigned long x0, unsigned long x1, unsigned long x2, + unsigned long x3); + resource_size_t start, end; + unsigned long barebox; + int ret; + + ret = memory_bank_first_find_space(&start, &end); + if (ret) + goto out; + + barebox = start; + + ret = bootm_load_os(data, barebox); + if (ret) + goto out; + + printf("Loaded barebox image to 0x%08lx\n", barebox); + + shutdown_barebox(); + + fn = (void *)barebox; + + fn(0, 0, 0, 0); + + ret = -EINVAL; + +out: + return ret; +} + +static struct image_handler aarch64_barebox_handler = { + .name = "ARM aarch64 barebox image", + .bootm = do_bootm_barebox, + .filetype = filetype_arm_barebox, +}; + +static int aarch64_register_image_handler(void) +{ + register_image_handler(&aarch64_linux_handler); + register_image_handler(&aarch64_barebox_handler); + + return 0; } +late_initcall(aarch64_register_image_handler); diff --git a/arch/arm/lib64/barebox.lds.S b/arch/arm/lib64/barebox.lds.S index a53b933bba..08adc44e86 100644 --- a/arch/arm/lib64/barebox.lds.S +++ b/arch/arm/lib64/barebox.lds.S @@ -35,10 +35,10 @@ SECTIONS PRE_IMAGE #endif . = ALIGN(4); + ._text : { *(._text) } .text : { _stext = .; - _text = .; *(.text_entry*) __bare_init_start = .; *(.text_bare_init*) @@ -53,22 +53,6 @@ SECTIONS . = ALIGN(4); .rodata : { *(.rodata*) } -#ifdef CONFIG_ARM_UNWIND - /* - * Stack unwinding tables - */ - . = ALIGN(8); - .ARM.unwind_idx : { - __start_unwind_idx = .; - *(.ARM.exidx*) - __stop_unwind_idx = .; - } - .ARM.unwind_tab : { - __start_unwind_tab = .; - *(.ARM.extab*) - __stop_unwind_tab = .; - } -#endif _etext = .; /* End of text and rodata section */ _sdata = .; @@ -106,24 +90,20 @@ SECTIONS .dtb : { BAREBOX_DTB() } - .rel.dyn : { - __rel_dyn_start = .; - *(.rel*) - __rel_dyn_end = .; - } + .rel_dyn_start : { *(.__rel_dyn_start) } + .rela.dyn : { *(.rela*) } + .rel_dyn_end : { *(.__rel_dyn_end) } - .dynsym : { - __dynsym_start = .; - *(.dynsym) - __dynsym_end = .; - } + .__dynsym_start : { *(.__dynsym_start) } + .dynsym : { *(.dynsym) } + .__dynsym_end : { *(.__dynsym_end) } _edata = .; . = ALIGN(4); - __bss_start = .; + .__bss_start : { *(.__bss_start) } .bss : { *(.bss*) } - __bss_stop = .; + .__bss_stop : { *(.__bss_stop) } _end = .; _barebox_image_size = __bss_start - TEXT_BASE; } diff --git a/arch/arm/lib64/runtime-offset.S b/arch/arm/lib64/runtime-offset.S new file mode 100644 index 0000000000..177ca64784 --- /dev/null +++ b/arch/arm/lib64/runtime-offset.S @@ -0,0 +1,19 @@ +#include <linux/linkage.h> +#include <asm/assembler.h> + +.section ".text_bare_init","ax" + +/* + * Get the offset between the link address and the address + * we are currently running at. + */ +ENTRY(get_runtime_offset) +1: adr x0, 1b + ldr x1, linkadr + subs x0, x0, x1 + ret + +.align 3 +linkadr: +.quad get_runtime_offset +ENDPROC(get_runtime_offset) diff --git a/arch/arm/lib64/stacktrace.c b/arch/arm/lib64/stacktrace.c new file mode 100644 index 0000000000..b8352c1454 --- /dev/null +++ b/arch/arm/lib64/stacktrace.c @@ -0,0 +1,86 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include <common.h> +#include <asm/stacktrace.h> + +#define THREAD_SIZE 16384 + +/* + * AArch64 PCS assigns the frame pointer to x29. + * + * A simple function prologue looks like this: + * sub sp, sp, #0x10 + * stp x29, x30, [sp] + * mov x29, sp + * + * A simple function epilogue looks like this: + * mov sp, x29 + * ldp x29, x30, [sp] + * add sp, sp, #0x10 + */ +int unwind_frame(struct stackframe *frame) +{ + unsigned long high, low; + unsigned long fp = frame->fp; + + low = frame->sp; + high = ALIGN(low, THREAD_SIZE); + + if (fp < low || fp > high - 0x18 || fp & 0xf) + return -EINVAL; + + frame->sp = fp + 0x10; + frame->fp = *(unsigned long *)(fp); + frame->pc = *(unsigned long *)(fp + 8); + + return 0; +} + +void dump_backtrace_entry(unsigned long where, unsigned long from) +{ +#ifdef CONFIG_KALLSYMS + printf("[<%08lx>] (%pS) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from); +#else + printf("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); +#endif +} + +void unwind_backtrace(struct pt_regs *regs) +{ + struct stackframe frame = {}; + register unsigned long current_sp asm ("sp"); + + if (regs) { + frame.fp = regs->regs[29]; + frame.pc = regs->elr; + } else { + frame.fp = (unsigned long)__builtin_frame_address(0); + frame.sp = current_sp; + frame.pc = (unsigned long)unwind_backtrace; + } + + printf("Call trace:\n"); + while (1) { + unsigned long where = frame.pc; + int ret; + + ret = unwind_frame(&frame); + if (ret < 0) + break; + dump_backtrace_entry(where, frame.pc); + } +} + +void dump_stack(void) +{ + unwind_backtrace(NULL); +} diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index eb135c3f53..9052a94ea0 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -289,11 +289,21 @@ config MACH_FREESCALE_MX53_VMX53 Say Y here if you are using the Voipac Technologies X53-DMM-668 module equipped with a Freescale i.MX53 Processor +config MACH_TX53 + bool "Ka-Ro TX53" + select ARCH_IMX53 + help + Say Y here if you are using the Ka-Ro tx53 board + config MACH_PHYTEC_SOM_IMX6 bool "Phytec phyCARD-i.MX6 and phyFLEX-i.MX6" select ARCH_IMX6 select ARCH_IMX6UL +config MACH_KONTRON_SAMX6I + bool "Kontron sAMX6i" + select ARCH_IMX6 + config MACH_DFI_FS700_M60 bool "DFI i.MX6 FS700 M60 Q7 Board" select ARCH_IMX6 @@ -606,12 +616,6 @@ config MACH_FREESCALE_MX53_SMD bool "Freescale i.MX53 SMD" select ARCH_IMX53 -config MACH_TX53 - bool "Ka-Ro TX53" - select ARCH_IMX53 - help - Say Y here if you are using the Ka-Ro tx53 board - endchoice # ---------------------------------------------------------- @@ -685,19 +689,6 @@ endchoice endif -if MACH_TX53 - -choice - prompt "TX53 board revision" -config TX53_REV_1011 - bool "1011" -config TX53_REV_XX30 - bool "8030 / 1030" - -endchoice - -endif - endmenu menu "i.MX specific settings" diff --git a/arch/arm/mach-imx/include/mach/imx-gpio.h b/arch/arm/mach-imx/include/mach/imx-gpio.h index 5e673beef9..891c33a3f4 100644 --- a/arch/arm/mach-imx/include/mach/imx-gpio.h +++ b/arch/arm/mach-imx/include/mach/imx-gpio.h @@ -8,15 +8,21 @@ * regular gpio functions outside of lowlevel code! */ -static inline void imx_gpio_direction_output(void __iomem *gdir, void __iomem *dr, - int gpio, int value) +static inline void imx_gpio_direction(void __iomem *gdir, void __iomem *dr, + int gpio, int out, int value) { uint32_t val; val = readl(gdir); - val |= 1 << gpio; + if (out) + val |= 1 << gpio; + else + val &= ~(1 << gpio); writel(val, gdir); + if (!out) + return; + val = readl(dr); if (value) val |= 1 << gpio; @@ -28,7 +34,7 @@ static inline void imx_gpio_direction_output(void __iomem *gdir, void __iomem *d static inline void imx1_gpio_direction_output(void *base, int gpio, int value) { - imx_gpio_direction_output(base + 0x0, base + 0x1c, gpio, value); + imx_gpio_direction(base + 0x0, base + 0x1c, gpio, 1, value); } #define imx21_gpio_direction_output(base, gpio, value) imx1_gpio_direction_output(base, gpio,value) @@ -36,7 +42,7 @@ static inline void imx1_gpio_direction_output(void *base, int gpio, int value) static inline void imx31_gpio_direction_output(void *base, int gpio, int value) { - imx_gpio_direction_output(base + 0x4, base + 0x0, gpio, value); + imx_gpio_direction(base + 0x4, base + 0x0, gpio, 1, value); } #define imx25_gpio_direction_output(base, gpio, value) imx31_gpio_direction_output(base, gpio,value) @@ -45,4 +51,34 @@ static inline void imx31_gpio_direction_output(void *base, int gpio, int value) #define imx53_gpio_direction_output(base, gpio, value) imx31_gpio_direction_output(base, gpio,value) #define imx6_gpio_direction_output(base, gpio, value) imx31_gpio_direction_output(base, gpio,value) +static inline void imx1_gpio_direction_input(void *base, int gpio, int value) +{ + imx_gpio_direction(base + 0x0, base + 0x1c, gpio, 0, 0); +} + +#define imx21_gpio_direction_input(base, gpio, value) imx1_gpio_direction_input(base, gpio) +#define imx27_gpio_direction_input(base, gpio, value) imx1_gpio_direction_input(base, gpio) + +static inline void imx31_gpio_direction_input(void *base, int gpio) +{ + imx_gpio_direction(base + 0x4, base + 0x0, gpio, 0, 0); +} + +#define imx25_gpio_direction_input(base, gpio, value) imx31_gpio_direction_input(base, gpio) +#define imx35_gpio_direction_input(base, gpio, value) imx31_gpio_direction_input(base, gpio) +#define imx51_gpio_direction_input(base, gpio, value) imx31_gpio_direction_input(base, gpio) +#define imx53_gpio_direction_input(base, gpio, value) imx31_gpio_direction_input(base, gpio) +#define imx6_gpio_direction_input(base, gpio) imx31_gpio_direction_input(base, gpio) + +#define imx1_gpio_val(base, gpio) readl(base + 0x1c) & (1 << gpio) ? 1 : 0 +#define imx21_gpio_val(base, gpio) imx1_gpio_val(base, gpio) +#define imx27_gpio_val(base, gpio) imx1_gpio_val(base, gpio) + +#define imx31_gpio_val(base, gpio) readl(base) & (1 << gpio) ? 1 : 0 +#define imx25_gpio_val(base, gpio) imx31_gpio_val(base, gpio) +#define imx35_gpio_val(base, gpio) imx31_gpio_val(base, gpio) +#define imx51_gpio_val(base, gpio) imx31_gpio_val(base, gpio) +#define imx53_gpio_val(base, gpio) imx31_gpio_val(base, gpio) +#define imx6_gpio_val(base, gpio) imx31_gpio_val(base, gpio) + #endif /* __MACH_IMX_GPIO_H */ diff --git a/arch/arm/mach-imx/xload-common.c b/arch/arm/mach-imx/xload-common.c index 2644438f40..13cd612d3c 100644 --- a/arch/arm/mach-imx/xload-common.c +++ b/arch/arm/mach-imx/xload-common.c @@ -5,7 +5,7 @@ int imx_image_size(void) { - uint32_t *image_end = (void *)ld_var(__image_end); + uint32_t *image_end = (void *)__image_end; uint32_t payload_len, pbl_len, imx_header_len, sizep; void *pg_start; @@ -15,7 +15,7 @@ int imx_image_size(void) imx_header_len = SZ_4K; /* The length of the PBL image */ - pbl_len = ld_var(__image_end) - ld_var(_text); + pbl_len = __image_end - _text; sizep = 4; diff --git a/arch/arm/mach-mvebu/include/mach/common.h b/arch/arm/mach-mvebu/include/mach/common.h index 529eb61cfd..8e15723fbe 100644 --- a/arch/arm/mach-mvebu/include/mach/common.h +++ b/arch/arm/mach-mvebu/include/mach/common.h @@ -25,12 +25,12 @@ #define MVEBU_REMAP_INT_REG_BASE 0xf1000000 /* #including <asm/barebox-arm.h> yields a circle, so we need a forward decl */ -uint32_t get_runtime_offset(void); +unsigned long get_runtime_offset(void); static inline void __iomem *mvebu_get_initial_int_reg_base(void) { #ifdef __PBL__ - u32 base = __get_unaligned_le32(_text - get_runtime_offset() + 0x30); + u32 base = __get_unaligned_le32(_text + get_runtime_offset() + 0x30); return (void __force __iomem *)base; #else return (void __force __iomem *)MVEBU_REMAP_INT_REG_BASE; diff --git a/arch/arm/mach-mxs/ocotp.c b/arch/arm/mach-mxs/ocotp.c index 72f3e8240b..b41fde9919 100644 --- a/arch/arm/mach-mxs/ocotp.c +++ b/arch/arm/mach-mxs/ocotp.c @@ -172,7 +172,7 @@ free_mem: return ret; } -static struct file_operations mxs_ocotp_ops = { +static struct cdev_operations mxs_ocotp_ops = { .read = mxs_ocotp_cdev_read, .lseek = dev_lseek_default, }; diff --git a/arch/arm/mach-tegra/include/mach/lowlevel.h b/arch/arm/mach-tegra/include/mach/lowlevel.h index e9ba5ee393..c862778fc4 100644 --- a/arch/arm/mach-tegra/include/mach/lowlevel.h +++ b/arch/arm/mach-tegra/include/mach/lowlevel.h @@ -264,7 +264,7 @@ void tegra_cpu_lowlevel_setup(char *fdt) arm_setup_stack(TEGRA_IRAM_BASE + SZ_256K - 8); if (tegra_cpu_is_maincomplex()) - tegra_maincomplex_entry(fdt - get_runtime_offset()); + tegra_maincomplex_entry(fdt + get_runtime_offset()); tegra_ll_delay_setup(); } diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c index 16dc65be07..8a11e06c53 100644 --- a/arch/arm/mach-tegra/tegra_avp_init.c +++ b/arch/arm/mach-tegra/tegra_avp_init.c @@ -140,7 +140,7 @@ static void init_pllx(void) conf = &pllx_config_table[chiptype][osc_freq]; /* we are not relocated yet - globals are a bit more tricky here */ - conf = (struct pll_config *)((char *)conf - get_runtime_offset()); + conf = (struct pll_config *)((char *)conf + get_runtime_offset()); /* set PLL bypass and frequency parameters */ reg = CRC_PLLX_BASE_BYPASS; diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile index c45511261d..5d7e85b373 100644 --- a/arch/arm/pbl/Makefile +++ b/arch/arm/pbl/Makefile @@ -37,6 +37,9 @@ LDFLAGS_zbarebox += -pie else LDFLAGS_zbarebox += -static endif + +LDFLAGS_zbarebox += $(call ld-option, --no-dynamic-linker) + zbarebox-common := $(barebox-pbl-common) $(obj)/$(piggy_o) zbarebox-lds := $(obj)/zbarebox.lds diff --git a/arch/mips/lib/dma-default.c b/arch/mips/lib/dma-default.c index 9b2fe7d410..71c1e423b7 100644 --- a/arch/mips/lib/dma-default.c +++ b/arch/mips/lib/dma-default.c @@ -44,13 +44,13 @@ static inline void __dma_sync_mips(void *addr, size_t size, } #endif -void dma_sync_single_for_cpu(unsigned long address, size_t size, +void dma_sync_single_for_cpu(dma_addr_t address, size_t size, enum dma_data_direction dir) { __dma_sync_mips(address, size, dir); } -void dma_sync_single_for_device(unsigned long address, size_t size, +void dma_sync_single_for_device(dma_addr_t address, size_t size, enum dma_data_direction dir) { __dma_sync_mips(address, size, dir); diff --git a/arch/openrisc/cpu/cpu.c b/arch/openrisc/cpu/cpu.c index e7f944555e..cae42d41b8 100644 --- a/arch/openrisc/cpu/cpu.c +++ b/arch/openrisc/cpu/cpu.c @@ -23,11 +23,6 @@ #include <asm/system.h> #include <asm/openrisc_exc.h> -int cleanup_before_linux(void) -{ - return 0; -} - extern void __reset(void); static void __noreturn openrisc_restart_cpu(struct restart_handler *rst) diff --git a/arch/sandbox/board/hostfile.c b/arch/sandbox/board/hostfile.c index e7d92ea031..3fc1503799 100644 --- a/arch/sandbox/board/hostfile.c +++ b/arch/sandbox/board/hostfile.c @@ -64,7 +64,7 @@ static void hf_info(struct device_d *dev) printf("file: %s\n", priv->filename); } -static struct file_operations hf_fops = { +static struct cdev_operations hf_fops = { .read = hf_read, .write = hf_write, .lseek = dev_lseek_default, diff --git a/commands/Kconfig b/commands/Kconfig index 17bbe0f27a..951a86963e 100644 --- a/commands/Kconfig +++ b/commands/Kconfig @@ -348,7 +348,7 @@ config CMD_BOOTM config CMD_BOOTU tristate default y - depends on ARM + depends on ARM && !CPU_64v8 prompt "bootu" help Boot into already loaded Linux kernel, which must be raw (uncompressed). @@ -357,7 +357,7 @@ config CMD_BOOTU config CMD_BOOTZ tristate - depends on ARM + depends on ARM && !CPU_64v8 prompt "bootz" help Boot Linux zImage diff --git a/commands/loadenv.c b/commands/loadenv.c index 44e96c3b60..6469affadb 100644 --- a/commands/loadenv.c +++ b/commands/loadenv.c @@ -62,20 +62,16 @@ static int do_loadenv(int argc, char *argv[]) if (argc - optind < 1) { filename = default_environment_path_get(); } else { - char *str = normalise_path(argv[optind]); - /* * /dev/defaultenv use to contain the defaultenvironment. * we do not have this file anymore, but maintain compatibility * to the 'loadenv -s /dev/defaultenv' command to restore the * default environment for some time. */ - if (!strcmp(str, "/dev/defaultenv")) + if (!strcmp(argv[optind], "/dev/defaultenv")) defaultenv = 1; else filename = argv[optind]; - - free(str); } if (scrub) { diff --git a/commands/ls.c b/commands/ls.c index 771477b6e0..e54991862d 100644 --- a/commands/ls.c +++ b/commands/ls.c @@ -115,11 +115,8 @@ int ls(const char *path, ulong flags) continue; } - if (s.st_mode & S_IFDIR) { - char *norm = normalise_path(tmp); - ls(norm, flags); - free(norm); - } + if (s.st_mode & S_IFDIR) + ls(tmp, flags); } out: @@ -158,7 +155,7 @@ static int do_ls(int argc, char *argv[]) flags |= LS_SHOWARG; if (optind == argc) { - ret = ls(getcwd(), flags); + ret = ls(".", flags); return ret ? 1 : 0; } diff --git a/commands/mem.c b/commands/mem.c index 29eaa80b23..eb91ade05a 100644 --- a/commands/mem.c +++ b/commands/mem.c @@ -81,7 +81,7 @@ int mem_parse_options(int argc, char *argv[], char *optstr, int *mode, return 0; } -static struct file_operations memops = { +static struct cdev_operations memops = { .read = mem_read, .write = mem_write, .memmap = generic_memmap_rw, diff --git a/commands/stddev.c b/commands/stddev.c index 93da2c7398..4d1b6f5108 100644 --- a/commands/stddev.c +++ b/commands/stddev.c @@ -25,7 +25,7 @@ static ssize_t zero_read(struct cdev *cdev, void *buf, size_t count, loff_t offs return count; } -static struct file_operations zeroops = { +static struct cdev_operations zeroops = { .read = zero_read, .lseek = dev_lseek_default, }; @@ -53,7 +53,7 @@ static ssize_t full_read(struct cdev *cdev, void *buf, size_t count, loff_t offs return count; } -static struct file_operations fullops = { +static struct cdev_operations fullops = { .read = full_read, .lseek = dev_lseek_default, }; @@ -80,7 +80,7 @@ static ssize_t null_write(struct cdev *cdev, const void *buf, size_t count, loff return count; } -static struct file_operations nullops = { +static struct cdev_operations nullops = { .write = null_write, .lseek = dev_lseek_default, }; @@ -108,7 +108,7 @@ static ssize_t prng_read(struct cdev *cdev, void *buf, size_t count, loff_t offs return count; } -static struct file_operations prngops = { +static struct cdev_operations prngops = { .read = prng_read, .lseek = dev_lseek_default, }; diff --git a/common/Kconfig b/common/Kconfig index af71d6888a..b7000c4d73 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -344,7 +344,7 @@ config KALLSYMS This is useful to print a nice backtrace when an exception occurs. config RELOCATABLE - depends on PPC || (ARM && !CPU_V8) + depends on PPC || ARM bool "generate relocatable barebox binary" help A non relocatable barebox binary will run at it's compiled in diff --git a/common/block.c b/common/block.c index e2ba9d4296..55d8d1637e 100644 --- a/common/block.c +++ b/common/block.c @@ -332,7 +332,7 @@ static int block_op_flush(struct cdev *cdev) return writebuffer_flush(blk); } -static struct file_operations block_ops = { +static struct cdev_operations block_ops = { .read = block_op_read, #ifdef CONFIG_BLOCK_WRITE .write = block_op_write, diff --git a/common/bootm.c b/common/bootm.c index 3e48ca1d88..5ff6683fe7 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -529,6 +529,7 @@ int bootm_boot(struct bootm_data *bootm_data) struct image_handler *handler; int ret; enum filetype os_type; + size_t size; if (!bootm_data->os_file) { printf("no image given\n"); @@ -548,7 +549,13 @@ int bootm_boot(struct bootm_data *bootm_data) data->os_address = bootm_data->os_address; data->os_entry = bootm_data->os_entry; - os_type = file_name_detect_type(data->os_file); + ret = read_file_2(data->os_file, &size, &data->os_header, PAGE_SIZE); + if (ret < 0 && ret != -EFBIG) + goto err_out; + if (size < PAGE_SIZE) + goto err_out; + + os_type = file_detect_type(data->os_header, PAGE_SIZE); if ((int)os_type < 0) { printf("could not open %s: %s\n", data->os_file, strerror(-os_type)); @@ -674,6 +681,7 @@ err_out: of_delete_node(data->of_root_node); globalvar_remove("linux.bootargs.bootm.appendroot"); + free(data->os_header); free(data->os_file); free(data->oftree_file); free(data->initrd_file); diff --git a/common/filetype.c b/common/filetype.c index 71691fd813..444ec14cc4 100644 --- a/common/filetype.c +++ b/common/filetype.c @@ -67,6 +67,7 @@ static const struct filetype_str filetype_str[] = { [filetype_socfpga_xload] = { "SoCFPGA prebootloader image", "socfpga-xload" }, [filetype_kwbimage_v1] = { "MVEBU kwbimage (v1)", "kwb" }, [filetype_android_sparse] = { "Android sparse image", "sparse" }, + [filetype_arm64_linux_image] = { "ARM aarch64 Linux image", "aarch64-linux" }, }; const char *file_type_to_string(enum filetype f) @@ -296,6 +297,8 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize) return filetype_mips_barebox; if (buf[0] == be32_to_cpu(0x534F4659)) return filetype_bpk; + if (le32_to_cpu(buf[14]) == 0x644d5241) + return filetype_arm64_linux_image; if ((buf8[0] == 0x5a || buf8[0] == 0x69 || buf8[0] == 0x78 || buf8[0] == 0x8b || buf8[0] == 0x9c) && buf8[0x1] == 0 && buf8[0x2] == 0 && buf8[0x3] == 0 && diff --git a/common/firmware.c b/common/firmware.c index 664f9107d0..250fef5378 100644 --- a/common/firmware.c +++ b/common/firmware.c @@ -153,7 +153,7 @@ static int firmware_close(struct cdev *cdev) return 0; } -static struct file_operations firmware_ops = { +static struct cdev_operations firmware_ops = { .open = firmware_open, .write = firmware_write, .close = firmware_close, diff --git a/common/memory.c b/common/memory.c index ff5bdc14e2..00fa7c50ff 100644 --- a/common/memory.c +++ b/common/memory.c @@ -171,6 +171,57 @@ int release_sdram_region(struct resource *res) return release_region(res); } +void memory_bank_find_space(struct memory_bank *bank, resource_size_t *retstart, + resource_size_t *retend) +{ + resource_size_t freeptr, size, maxfree = 0; + struct resource *last, *child; + + if (list_empty(&bank->res->children)) { + /* No children - return the whole bank */ + *retstart = bank->res->start; + *retend = bank->res->end; + return; + } + + freeptr = bank->res->start; + + list_for_each_entry(child, &bank->res->children, sibling) { + /* Check gaps between child resources */ + size = child->start - freeptr; + if (size > maxfree) { + *retstart = freeptr; + *retend = child->start - 1; + maxfree = size; + } + freeptr = child->start + resource_size(child); + } + + last = list_last_entry(&bank->res->children, struct resource, sibling); + + /* Check gap between last child and end of memory bank */ + freeptr = last->start + resource_size(last); + size = bank->res->start + resource_size(bank->res) - freeptr; + + if (size > maxfree) { + *retstart = freeptr; + *retend = bank->res->end; + } +} + +int memory_bank_first_find_space(resource_size_t *retstart, + resource_size_t *retend) +{ + struct memory_bank *bank; + + for_each_memory_bank(bank) { + memory_bank_find_space(bank, retstart, retend); + return 0; + } + + return -ENOENT; +} + #ifdef CONFIG_OFTREE static int of_memory_fixup(struct device_node *node, void *unused) diff --git a/common/startup.c b/common/startup.c index 8940674528..8553849cb3 100644 --- a/common/startup.c +++ b/common/startup.c @@ -67,9 +67,6 @@ static int mount_root(void) mount("none", "pstore", "/pstore", NULL); } - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT)) - defaultenv_load("/env", 0); - return 0; } fs_initcall(mount_root); @@ -82,6 +79,9 @@ static int load_environment(void) default_environment_path = default_environment_path_get(); + if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT)) + defaultenv_load("/env", 0); + envfs_load(default_environment_path, "/env", 0); nvvar_load(); diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c index 67d95fe30a..8bbc2373fc 100644 --- a/drivers/base/regmap/regmap.c +++ b/drivers/base/regmap/regmap.c @@ -352,7 +352,7 @@ static ssize_t regmap_cdev_write(struct cdev *cdev, const void *buf, size_t coun return count; } -static struct file_operations regmap_fops = { +static struct cdev_operations regmap_fops = { .lseek = dev_lseek_default, .read = regmap_cdev_read, .write = regmap_cdev_write, diff --git a/drivers/clk/imx/clk-imx7.c b/drivers/clk/imx/clk-imx7.c index b79c8c3016..1025c9d173 100644 --- a/drivers/clk/imx/clk-imx7.c +++ b/drivers/clk/imx/clk-imx7.c @@ -676,7 +676,7 @@ static int imx7_ccm_probe(struct device_d *dev) clks[IMX7D_ENET2_TIME_ROOT_DIV] = imx_clk_divider2("enet2_time_post_div", "enet2_time_pre_div", base + 0xa880, 0, 6); clks[IMX7D_ENET_PHY_REF_ROOT_DIV] = imx_clk_divider2("enet_phy_ref_post_div", "enet_phy_ref_pre_div", base + 0xa900, 0, 6); clks[IMX7D_EIM_ROOT_DIV] = imx_clk_divider2("eim_post_div", "eim_pre_div", base + 0xa980, 0, 6); - clks[IMX7D_NAND_ROOT_DIV] = imx_clk_divider2("nand_post_div", "nand_pre_div", base + 0xaa00, 0, 6); + clks[IMX7D_NAND_ROOT_CLK] = imx_clk_divider2("nand_root_clk", "nand_pre_div", base + 0xaa00, 0, 6); clks[IMX7D_QSPI_ROOT_DIV] = imx_clk_divider2("qspi_post_div", "qspi_pre_div", base + 0xaa80, 0, 6); clks[IMX7D_USDHC1_ROOT_DIV] = imx_clk_divider2("usdhc1_post_div", "usdhc1_pre_div", base + 0xab00, 0, 6); clks[IMX7D_USDHC2_ROOT_DIV] = imx_clk_divider2("usdhc2_post_div", "usdhc2_pre_div", base + 0xab80, 0, 6); @@ -751,7 +751,8 @@ static int imx7_ccm_probe(struct device_d *dev) clks[IMX7D_ENET_PHY_REF_ROOT_CLK] = imx_clk_gate4("enet_phy_ref_root_clk", "enet_phy_ref_post_div", base + 0x4520, 0); clks[IMX7D_EIM_ROOT_CLK] = imx_clk_gate4("eim_root_clk", "eim_post_div", base + 0x4160, 0); - clks[IMX7D_NAND_ROOT_CLK] = imx_clk_gate4("nand_root_clk", "nand_post_div", base + 0x4140, 0); + clks[IMX7D_NAND_RAWNAND_CLK] = imx_clk_gate2_shared2("nand_rawnand_clk", "nand_root_clk", base + 0x4140, 0); + clks[IMX7D_NAND_USDHC_BUS_RAWNAND_CLK] = imx_clk_gate2_shared2("nand_usdhc_rawnand_clk", "nand_usdhc_root_clk", base + 0x4140, 0); clks[IMX7D_QSPI_ROOT_CLK] = imx_clk_gate4("qspi_root_clk", "qspi_post_div", base + 0x4150, 0); clks[IMX7D_USB_CTRL_CLK] = imx_clk_gate4("usb_ctrl_clk", "osc", base + 0x4680, 0); clks[IMX7D_USB_PHY1_CLK] = imx_clk_gate4("usbphy1_clk", "osc", base + 0x46a0, 0); diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index c46c2614d9..71c6f459ad 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -80,6 +80,13 @@ static inline struct clk *imx_clk_gate2(const char *name, const char *parent, return clk_gate2(name, parent, reg, shift, 0x3, 0); } +static inline struct clk *imx_clk_gate2_shared2(const char *name, const char *parent, + void __iomem *reg, u8 shift) +{ + return clk_gate2(name, parent, reg, shift, 0x3, + CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE); +} + static inline struct clk *imx_clk_gate2_cgr(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 cgr_val) { diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 23ad20afcf..3d63f7ff16 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -65,3 +65,8 @@ config CLOCKSOURCE_ROCKCHIP config CLOCKSOURCE_ATMEL_PIT bool depends on SOC_AT91SAM9 || SOC_SAMA5 + +config CLOCKSOURCE_ARMV8_TIMER + bool + default y + depends on ARM && CPU_64v8 diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index f774edee46..ea33fff502 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_CLOCKSOURCE_ORION) += orion.o obj-$(CONFIG_CLOCKSOURCE_UEMD) += uemd.o obj-$(CONFIG_CLOCKSOURCE_ROCKCHIP)+= rk_timer.o obj-$(CONFIG_CLOCKSOURCE_ATMEL_PIT) += timer-atmel-pit.o +obj-$(CONFIG_CLOCKSOURCE_ARMV8_TIMER) += armv8-timer.o diff --git a/drivers/clocksource/armv8-timer.c b/drivers/clocksource/armv8-timer.c new file mode 100644 index 0000000000..57b0b694c7 --- /dev/null +++ b/drivers/clocksource/armv8-timer.c @@ -0,0 +1,65 @@ +/* + * Copyright (C) 2018 Sascha Hauer <s.hauer@pengutronix.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <init.h> +#include <clock.h> +#include <linux/clk.h> +#include <io.h> +#include <asm/system.h> + +uint64_t armv8_clocksource_read(void) +{ + unsigned long cntpct; + + isb(); + asm volatile("mrs %0, cntpct_el0" : "=r" (cntpct)); + + return cntpct; +} + +static struct clocksource cs = { + .read = armv8_clocksource_read, + .mask = CLOCKSOURCE_MASK(64), + .shift = 0, +}; + +static int armv8_timer_probe(struct device_d *dev) +{ + unsigned long cntfrq; + + asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq)); + + cs.mult = clocksource_hz2mult(cntfrq, cs.shift); + + return init_clock(&cs); +} + +static struct of_device_id armv8_timer_dt_ids[] = { + { .compatible = "arm,armv8-timer", }, + { } +}; + +static struct driver_d armv8_timer_driver = { + .name = "armv8-timer", + .probe = armv8_timer_probe, + .of_compatible = DRV_OF_COMPAT(armv8_timer_dt_ids), +}; + +static int armv8_timer_init(void) +{ + return platform_driver_register(&armv8_timer_driver); +} +postcore_initcall(armv8_timer_init); diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c index b84c0f7985..79f25109f9 100644 --- a/drivers/dma/apbh_dma.c +++ b/drivers/dma/apbh_dma.c @@ -17,6 +17,7 @@ #include <dma/apbh-dma.h> #include <stmp-device.h> +#include <linux/clk.h> #include <linux/list.h> #include <linux/err.h> #include <common.h> @@ -55,6 +56,7 @@ enum mxs_dma_id { struct apbh_dma { void __iomem *regs; + struct clk *clk; enum mxs_dma_id id; }; @@ -606,6 +608,17 @@ static int apbh_dma_probe(struct device_d *dev) apbh->id = id; + apbh->clk = clk_get(dev, NULL); + if (IS_ERR(apbh->clk)) + return PTR_ERR(apbh->clk); + + ret = clk_enable(apbh->clk); + if (ret) { + dev_err(dev, "Failed to enable clock: %s\n", + strerror(ret)); + return ret; + } + ret = stmp_reset_block(apbh->regs, 0); if (ret) return ret; diff --git a/drivers/eeprom/at24.c b/drivers/eeprom/at24.c index 11f23319b6..4fae3a12e4 100644 --- a/drivers/eeprom/at24.c +++ b/drivers/eeprom/at24.c @@ -52,7 +52,7 @@ struct at24_data { struct at24_platform_data chip; struct cdev cdev; - struct file_operations fops; + struct cdev_operations fops; u8 *writebuf; unsigned write_max; diff --git a/drivers/eeprom/at25.c b/drivers/eeprom/at25.c index 9f16f964a8..a9050d6c16 100644 --- a/drivers/eeprom/at25.c +++ b/drivers/eeprom/at25.c @@ -232,7 +232,7 @@ static ssize_t at25_ee_write(struct cdev *cdev, return written ? written : status; } -static struct file_operations at25_fops = { +static struct cdev_operations at25_fops = { .read = at25_ee_read, .write = at25_ee_write, .lseek = dev_lseek_default, diff --git a/drivers/hw_random/core.c b/drivers/hw_random/core.c index ef2a988c76..1c68a379f7 100644 --- a/drivers/hw_random/core.c +++ b/drivers/hw_random/core.c @@ -61,7 +61,7 @@ static ssize_t rng_dev_read(struct cdev *cdev, void *buf, size_t size, return cur; } -static struct file_operations rng_chrdev_ops = { +static struct cdev_operations rng_chrdev_ops = { .read = rng_dev_read, .lseek = dev_lseek_default, }; diff --git a/drivers/mfd/act8846.c b/drivers/mfd/act8846.c index 60029acf76..dfca0498b1 100644 --- a/drivers/mfd/act8846.c +++ b/drivers/mfd/act8846.c @@ -117,7 +117,7 @@ static ssize_t act8846_write(struct cdev *cdev, const void *_buf, size_t count, return count; } -static struct file_operations act8846_fops = { +static struct cdev_operations act8846_fops = { .lseek = dev_lseek_default, .read = act8846_read, .write = act8846_write, diff --git a/drivers/mfd/lp3972.c b/drivers/mfd/lp3972.c index ee794df2d8..054713b942 100644 --- a/drivers/mfd/lp3972.c +++ b/drivers/mfd/lp3972.c @@ -70,7 +70,7 @@ static ssize_t lp_read(struct cdev *cdev, void *_buf, size_t count, loff_t offse return count; } -static struct file_operations lp_fops = { +static struct cdev_operations lp_fops = { .lseek = dev_lseek_default, .read = lp_read, }; diff --git a/drivers/mfd/mc34704.c b/drivers/mfd/mc34704.c index 3dc85f5474..bfda169aaa 100644 --- a/drivers/mfd/mc34704.c +++ b/drivers/mfd/mc34704.c @@ -100,7 +100,7 @@ static ssize_t mc34704_write(struct cdev *cdev, const void *_buf, size_t count, return count; } -static struct file_operations mc34704_fops = { +static struct cdev_operations mc34704_fops = { .lseek = dev_lseek_default, .read = mc34704_read, .write = mc34704_write, diff --git a/drivers/mfd/mc9sdz60.c b/drivers/mfd/mc9sdz60.c index 0d2c56b480..9993efc5de 100644 --- a/drivers/mfd/mc9sdz60.c +++ b/drivers/mfd/mc9sdz60.c @@ -112,7 +112,7 @@ static ssize_t mc_write(struct cdev *cdev, const void *_buf, size_t count, loff_ return count; } -static struct file_operations mc_fops = { +static struct cdev_operations mc_fops = { .lseek = dev_lseek_default, .read = mc_read, .write = mc_write, diff --git a/drivers/mfd/stmpe-i2c.c b/drivers/mfd/stmpe-i2c.c index fb91ffa008..51c56bbf56 100644 --- a/drivers/mfd/stmpe-i2c.c +++ b/drivers/mfd/stmpe-i2c.c @@ -101,7 +101,7 @@ static ssize_t stmpe_write(struct cdev *cdev, const void *_buf, size_t count, lo return count; } -static struct file_operations stmpe_fops = { +static struct cdev_operations stmpe_fops = { .lseek = dev_lseek_default, .read = stmpe_read, .write = stmpe_write, diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c index 20bde2cf89..fb435f510f 100644 --- a/drivers/mfd/twl-core.c +++ b/drivers/mfd/twl-core.c @@ -149,7 +149,7 @@ static ssize_t twl_write(struct cdev *cdev, const void *_buf, size_t count, return count; } -struct file_operations twl_fops = { +struct cdev_operations twl_fops = { .lseek = dev_lseek_default, .read = twl_read, .write = twl_write, diff --git a/drivers/misc/jtag.c b/drivers/misc/jtag.c index f5d0c72ed5..9accefa342 100644 --- a/drivers/misc/jtag.c +++ b/drivers/misc/jtag.c @@ -265,7 +265,7 @@ static int jtag_ioctl(struct cdev *inode, int cmd, void *arg) return ret; } -static struct file_operations jtag_operations = { +static struct cdev_operations jtag_operations = { .ioctl = jtag_ioctl, }; diff --git a/drivers/misc/sram.c b/drivers/misc/sram.c index 4fb6f801d2..27b4c681fd 100644 --- a/drivers/misc/sram.c +++ b/drivers/misc/sram.c @@ -25,7 +25,7 @@ struct sram { struct cdev cdev; }; -static struct file_operations memops = { +static struct cdev_operations memops = { .read = mem_read, .write = mem_write, .memmap = generic_memmap_rw, diff --git a/drivers/mtd/core.c b/drivers/mtd/core.c index 1950ee87ee..d2012b5f70 100644 --- a/drivers/mtd/core.c +++ b/drivers/mtd/core.c @@ -438,7 +438,7 @@ int mtd_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops) return ret_code >= mtd->bitflip_threshold ? -EUCLEAN : 0; } -static struct file_operations mtd_ops = { +static struct cdev_operations mtd_ops = { .read = mtd_op_read, #ifdef CONFIG_MTD_WRITE .write = mtd_op_write, diff --git a/drivers/mtd/mtdoob.c b/drivers/mtd/mtdoob.c index 86076f028d..ffaf9506f3 100644 --- a/drivers/mtd/mtdoob.c +++ b/drivers/mtd/mtdoob.c @@ -63,7 +63,7 @@ static ssize_t mtd_op_read_oob(struct cdev *cdev, void *buf, size_t count, return mtd->oobsize; } -static struct file_operations mtd_ops_oob = { +static struct cdev_operations mtd_ops_oob = { .read = mtd_op_read_oob, .ioctl = mtd_ioctl, .lseek = dev_lseek_default, diff --git a/drivers/mtd/mtdraw.c b/drivers/mtd/mtdraw.c index ab360b7862..4f7c3b836c 100644 --- a/drivers/mtd/mtdraw.c +++ b/drivers/mtd/mtdraw.c @@ -287,7 +287,7 @@ static ssize_t mtdraw_erase(struct cdev *cdev, loff_t count, loff_t offset) } #endif -static const struct file_operations mtd_raw_fops = { +static const struct cdev_operations mtd_raw_fops = { .read = mtdraw_read, .write = mtdraw_write, .erase = mtdraw_erase, @@ -305,7 +305,7 @@ static int add_mtdraw_device(struct mtd_info *mtd, const char *devname, void **p mtdraw->writebuf = xmalloc(RAW_WRITEBUF_SIZE); mtdraw->mtd = mtd; - mtdraw->cdev.ops = (struct file_operations *)&mtd_raw_fops; + mtdraw->cdev.ops = (struct cdev_operations *)&mtd_raw_fops; mtdraw->cdev.size = mtd_div_by_wb(mtd->size, mtd) * (mtd->writesize + mtd->oobsize); mtdraw->cdev.name = basprintf("%s.raw", mtd->cdev.name); diff --git a/drivers/mtd/nand/nand-bb.c b/drivers/mtd/nand/nand-bb.c index a1523c3c89..c1977381d4 100644 --- a/drivers/mtd/nand/nand-bb.c +++ b/drivers/mtd/nand/nand-bb.c @@ -264,7 +264,7 @@ static loff_t nand_bb_lseek(struct cdev *cdev, loff_t __offset) return -EINVAL; } -static struct file_operations nand_bb_ops = { +static struct cdev_operations nand_bb_ops = { .open = nand_bb_open, .close = nand_bb_close, .read = nand_bb_read, diff --git a/drivers/mtd/ubi/barebox.c b/drivers/mtd/ubi/barebox.c index d67e566db6..65f5456455 100644 --- a/drivers/mtd/ubi/barebox.c +++ b/drivers/mtd/ubi/barebox.c @@ -218,7 +218,7 @@ static int ubi_volume_cdev_ioctl(struct cdev *cdev, int cmd, void *buf) return err; } -static struct file_operations ubi_volume_fops = { +static struct cdev_operations ubi_volume_fops = { .open = ubi_volume_cdev_open, .close = ubi_volume_cdev_close, .read = ubi_volume_cdev_read, @@ -467,7 +467,7 @@ static int ubi_cdev_ioctl(struct cdev *cdev, int cmd, void *buf) return 0; } -static struct file_operations ubi_fops = { +static struct cdev_operations ubi_fops = { .ioctl = ubi_cdev_ioctl, }; diff --git a/drivers/net/e1000/eeprom.c b/drivers/net/e1000/eeprom.c index 319910103e..3f39db7164 100644 --- a/drivers/net/e1000/eeprom.c +++ b/drivers/net/e1000/eeprom.c @@ -1294,7 +1294,7 @@ exit: return ret; } -static struct file_operations e1000_invm_ops = { +static struct cdev_operations e1000_invm_ops = { .read = e1000_invm_cdev_read, .write = e1000_invm_cdev_write, .lseek = dev_lseek_default, @@ -1320,7 +1320,7 @@ static ssize_t e1000_eeprom_cdev_read(struct cdev *cdev, void *buf, return (count / 2) * 2; }; -static struct file_operations e1000_eeprom_ops = { +static struct cdev_operations e1000_eeprom_ops = { .read = e1000_eeprom_cdev_read, .lseek = dev_lseek_default, }; diff --git a/drivers/net/ksz8864rmn.c b/drivers/net/ksz8864rmn.c index 860af448ea..8b9d66019b 100644 --- a/drivers/net/ksz8864rmn.c +++ b/drivers/net/ksz8864rmn.c @@ -120,7 +120,7 @@ static ssize_t micel_switch_write(struct cdev *cdev, const void *_buf, size_t co return count; } -static struct file_operations micrel_switch_ops = { +static struct cdev_operations micrel_switch_ops = { .read = micel_switch_read, .write = micel_switch_write, .lseek = dev_lseek_default, diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c index d209716a14..5d4218f7c0 100644 --- a/drivers/net/phy/mdio_bus.c +++ b/drivers/net/phy/mdio_bus.c @@ -285,7 +285,7 @@ static ssize_t phydev_write(struct cdev *cdev, const void *_buf, size_t count, l return count; } -static struct file_operations phydev_ops = { +static struct cdev_operations phydev_ops = { .read = phydev_read, .write = phydev_write, .lseek = dev_lseek_default, diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 4e50a8843f..172fa8b720 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -82,7 +82,7 @@ static ssize_t nvmem_cdev_write(struct cdev *cdev, const void *buf, size_t count return retlen; } -static struct file_operations nvmem_chrdev_ops = { +static struct cdev_operations nvmem_chrdev_ops = { .read = nvmem_cdev_read, .write = nvmem_cdev_write, .lseek = dev_lseek_default, diff --git a/drivers/of/partition.c b/drivers/of/partition.c index 6f9651a9e4..aa6e601b7f 100644 --- a/drivers/of/partition.c +++ b/drivers/of/partition.c @@ -190,7 +190,7 @@ static int of_partition_fixup(struct device_node *root, void *ctx) if (ret) return ret; - of_property_write_u32(partnode, "#addres-cells", n_cells); + of_property_write_u32(partnode, "#address-cells", n_cells); if (ret) return ret; diff --git a/drivers/video/fb.c b/drivers/video/fb.c index 004df1e604..5e829e832d 100644 --- a/drivers/video/fb.c +++ b/drivers/video/fb.c @@ -221,7 +221,7 @@ static int fb_set_modename(struct param_d *param, void *priv) return 0; } -static struct file_operations fb_ops = { +static struct cdev_operations fb_ops = { .read = mem_read, .write = mem_write, .memmap = generic_memmap_rw, diff --git a/drivers/video/tc358767.c b/drivers/video/tc358767.c index 5ad5cb406e..d4749b15c7 100644 --- a/drivers/video/tc358767.c +++ b/drivers/video/tc358767.c @@ -1258,6 +1258,7 @@ static int tc_filter_videomodes(struct tc_data *tc, struct display_timings *timi } while (1); free(timings->modes); + timings->num_modes = 0; timings->modes = NULL; if (!num_modes) { diff --git a/drivers/w1/slaves/w1_ds2431.c b/drivers/w1/slaves/w1_ds2431.c index e3e929670d..13691d7bab 100644 --- a/drivers/w1/slaves/w1_ds2431.c +++ b/drivers/w1/slaves/w1_ds2431.c @@ -257,7 +257,7 @@ out_up: #define ds2431_cdev_write NULL #endif -static struct file_operations ds2431_ops = { +static struct cdev_operations ds2431_ops = { .read = ds2431_cdev_read, .write = ds2431_cdev_write, .lseek = dev_lseek_default, diff --git a/drivers/w1/slaves/w1_ds2433.c b/drivers/w1/slaves/w1_ds2433.c index a907c6bf3c..f521a46a75 100644 --- a/drivers/w1/slaves/w1_ds2433.c +++ b/drivers/w1/slaves/w1_ds2433.c @@ -156,7 +156,7 @@ out_up: #define ds2433_cdev_write NULL #endif -static struct file_operations ds2433_ops = { +static struct cdev_operations ds2433_ops = { .read = ds2433_cdev_read, .write = ds2433_cdev_write, .lseek = dev_lseek_default, diff --git a/dts/Bindings/misc/arm-charlcd.txt b/dts/Bindings/auxdisplay/arm-charlcd.txt index e28e2aac47..e28e2aac47 100644 --- a/dts/Bindings/misc/arm-charlcd.txt +++ b/dts/Bindings/auxdisplay/arm-charlcd.txt diff --git a/dts/Bindings/display/exynos/exynos_hdmi.txt b/dts/Bindings/display/exynos/exynos_hdmi.txt index 6394ea9e3b..58b12e25bb 100644 --- a/dts/Bindings/display/exynos/exynos_hdmi.txt +++ b/dts/Bindings/display/exynos/exynos_hdmi.txt @@ -16,6 +16,7 @@ Required properties: - ddc: phandle to the hdmi ddc node - phy: phandle to the hdmi phy node - samsung,syscon-phandle: phandle for system controller node for PMU. +- #sound-dai-cells: should be 0. Required properties for Exynos 4210, 4212, 5420 and 5433: - clocks: list of clock IDs from SoC clock driver. diff --git a/dts/Bindings/dma/mv-xor-v2.txt b/dts/Bindings/dma/mv-xor-v2.txt index 217a90eaab..9c38bbe7e6 100644 --- a/dts/Bindings/dma/mv-xor-v2.txt +++ b/dts/Bindings/dma/mv-xor-v2.txt @@ -11,7 +11,11 @@ Required properties: interrupts. Optional properties: -- clocks: Optional reference to the clock used by the XOR engine. +- clocks: Optional reference to the clocks used by the XOR engine. +- clock-names: mandatory if there is a second clock, in this case the + name must be "core" for the first clock and "reg" for the second + one + Example: diff --git a/dts/Bindings/eeprom/at24.txt b/dts/Bindings/eeprom/at24.txt index 1812c848e3..abfae1beca 100644 --- a/dts/Bindings/eeprom/at24.txt +++ b/dts/Bindings/eeprom/at24.txt @@ -38,9 +38,9 @@ Required properties: "catalyst", "microchip", + "nxp", "ramtron", "renesas", - "nxp", "st", Some vendors use different model names for chips which are just diff --git a/dts/Bindings/iio/adc/sigma-delta-modulator.txt b/dts/Bindings/iio/adc/sigma-delta-modulator.txt index e9ebb8a20e..ba24ca7ba9 100644 --- a/dts/Bindings/iio/adc/sigma-delta-modulator.txt +++ b/dts/Bindings/iio/adc/sigma-delta-modulator.txt @@ -3,11 +3,11 @@ Device-Tree bindings for sigma delta modulator Required properties: - compatible: should be "ads1201", "sd-modulator". "sd-modulator" can be use as a generic SD modulator if modulator not specified in compatible list. -- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers". +- #io-channel-cells = <0>: See the IIO bindings section "IIO consumers". Example node: ads1202: adc@0 { compatible = "sd-modulator"; - #io-channel-cells = <1>; + #io-channel-cells = <0>; }; diff --git a/dts/Bindings/interrupt-controller/renesas,irqc.txt b/dts/Bindings/interrupt-controller/renesas,irqc.txt index 33c9a10fdc..20f121daa9 100644 --- a/dts/Bindings/interrupt-controller/renesas,irqc.txt +++ b/dts/Bindings/interrupt-controller/renesas,irqc.txt @@ -14,6 +14,7 @@ Required properties: - "renesas,irqc-r8a7794" (R-Car E2) - "renesas,intc-ex-r8a7795" (R-Car H3) - "renesas,intc-ex-r8a7796" (R-Car M3-W) + - "renesas,intc-ex-r8a77965" (R-Car M3-N) - "renesas,intc-ex-r8a77970" (R-Car V3M) - "renesas,intc-ex-r8a77995" (R-Car D3) - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in diff --git a/dts/Bindings/net/dsa/marvell.txt b/dts/Bindings/net/dsa/marvell.txt index 1d4d0f49c9..8c033d48e2 100644 --- a/dts/Bindings/net/dsa/marvell.txt +++ b/dts/Bindings/net/dsa/marvell.txt @@ -50,14 +50,15 @@ Example: compatible = "marvell,mv88e6085"; reg = <0>; reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - }; - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + switch1phy0: switch1phy0@0 { + reg = <0>; + interrupt-parent = <&switch0>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; }; }; }; @@ -74,23 +75,24 @@ Example: compatible = "marvell,mv88e6390"; reg = <0>; reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - }; - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + switch1phy0: switch1phy0@0 { + reg = <0>; + interrupt-parent = <&switch0>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; }; - }; - mdio1 { - compatible = "marvell,mv88e6xxx-mdio-external"; - #address-cells = <1>; - #size-cells = <0>; - switch1phy9: switch1phy0@9 { - reg = <9>; + mdio1 { + compatible = "marvell,mv88e6xxx-mdio-external"; + #address-cells = <1>; + #size-cells = <0>; + switch1phy9: switch1phy0@9 { + reg = <9>; + }; }; }; }; diff --git a/dts/Bindings/net/renesas,ravb.txt b/dts/Bindings/net/renesas,ravb.txt index c902261893..b4dc455eb1 100644 --- a/dts/Bindings/net/renesas,ravb.txt +++ b/dts/Bindings/net/renesas,ravb.txt @@ -18,6 +18,7 @@ Required properties: - "renesas,etheravb-r8a7795" for the R8A7795 SoC. - "renesas,etheravb-r8a7796" for the R8A7796 SoC. - "renesas,etheravb-r8a77970" for the R8A77970 SoC. + - "renesas,etheravb-r8a77980" for the R8A77980 SoC. - "renesas,etheravb-r8a77995" for the R8A77995 SoC. - "renesas,etheravb-rcar-gen3" as a fallback for the above R-Car Gen3 devices. @@ -26,7 +27,11 @@ Required properties: SoC-specific version corresponding to the platform first followed by the generic version. -- reg: offset and length of (1) the register block and (2) the stream buffer. +- reg: Offset and length of (1) the register block and (2) the stream buffer. + The region for the register block is mandatory. + The region for the stream buffer is optional, as it is only present on + R-Car Gen2 and RZ/G1 SoCs, and on R-Car H3 (R8A7795), M3-W (R8A7796), + and M3-N (R8A77965). - interrupts: A list of interrupt-specifiers, one for each entry in interrupt-names. If interrupt-names is not present, an interrupt specifier diff --git a/dts/Bindings/power/wakeup-source.txt b/dts/Bindings/power/wakeup-source.txt index 3c81f78b5c..5d254ab13e 100644 --- a/dts/Bindings/power/wakeup-source.txt +++ b/dts/Bindings/power/wakeup-source.txt @@ -60,7 +60,7 @@ Examples #size-cells = <0>; button@1 { - debounce_interval = <50>; + debounce-interval = <50>; wakeup-source; linux,code = <116>; label = "POWER"; diff --git a/dts/Bindings/thermal/imx-thermal.txt b/dts/Bindings/thermal/imx-thermal.txt index 28be51afdb..379eb76307 100644 --- a/dts/Bindings/thermal/imx-thermal.txt +++ b/dts/Bindings/thermal/imx-thermal.txt @@ -22,7 +22,32 @@ Optional properties: - clocks : thermal sensor's clock source. Example: +ocotp: ocotp@21bc000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,imx6sx-ocotp", "syscon"; + reg = <0x021bc000 0x4000>; + clocks = <&clks IMX6SX_CLK_OCOTP>; + tempmon_calib: calib@38 { + reg = <0x38 4>; + }; + + tempmon_temp_grade: temp-grade@20 { + reg = <0x20 4>; + }; +}; + +tempmon: tempmon { + compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon"; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + fsl,tempmon = <&anatop>; + nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; + nvmem-cell-names = "calib", "temp_grade"; + clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>; +}; + +Legacy method (Deprecated): tempmon { compatible = "fsl,imx6q-tempmon"; fsl,tempmon = <&anatop>; diff --git a/dts/Bindings/usb/dwc2.txt b/dts/Bindings/usb/dwc2.txt index e64d903bcb..46da5f1844 100644 --- a/dts/Bindings/usb/dwc2.txt +++ b/dts/Bindings/usb/dwc2.txt @@ -19,7 +19,7 @@ Required properties: configured in FS mode; - "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs configured in HS mode; - - "st,stm32f7xx-hsotg": The DWC2 USB HS controller instance in STM32F7xx SoCs + - "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs configured in HS mode; - reg : Should contain 1 register range (address and length) - interrupts : Should contain 1 interrupt diff --git a/dts/Bindings/usb/renesas_usb3.txt b/dts/Bindings/usb/renesas_usb3.txt index 87a45e2f9b..2c071bb580 100644 --- a/dts/Bindings/usb/renesas_usb3.txt +++ b/dts/Bindings/usb/renesas_usb3.txt @@ -4,6 +4,7 @@ Required properties: - compatible: Must contain one of the following: - "renesas,r8a7795-usb3-peri" - "renesas,r8a7796-usb3-peri" + - "renesas,r8a77965-usb3-peri" - "renesas,rcar-gen3-usb3-peri" for a generic R-Car Gen3 compatible device diff --git a/dts/Bindings/usb/renesas_usbhs.txt b/dts/Bindings/usb/renesas_usbhs.txt index d060172f15..43960faf5a 100644 --- a/dts/Bindings/usb/renesas_usbhs.txt +++ b/dts/Bindings/usb/renesas_usbhs.txt @@ -12,6 +12,7 @@ Required properties: - "renesas,usbhs-r8a7794" for r8a7794 (R-Car E2) compatible device - "renesas,usbhs-r8a7795" for r8a7795 (R-Car H3) compatible device - "renesas,usbhs-r8a7796" for r8a7796 (R-Car M3-W) compatible device + - "renesas,usbhs-r8a77965" for r8a77965 (R-Car M3-N) compatible device - "renesas,usbhs-r8a77995" for r8a77995 (R-Car D3) compatible device - "renesas,usbhs-r7s72100" for r7s72100 (RZ/A1) compatible device - "renesas,rcar-gen2-usbhs" for R-Car Gen2 or RZ/G1 compatible devices diff --git a/dts/Bindings/usb/usb-xhci.txt b/dts/Bindings/usb/usb-xhci.txt index e2ea59bbca..1651483a70 100644 --- a/dts/Bindings/usb/usb-xhci.txt +++ b/dts/Bindings/usb/usb-xhci.txt @@ -13,6 +13,7 @@ Required properties: - "renesas,xhci-r8a7793" for r8a7793 SoC - "renesas,xhci-r8a7795" for r8a7795 SoC - "renesas,xhci-r8a7796" for r8a7796 SoC + - "renesas,xhci-r8a77965" for r8a77965 SoC - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible device - "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device diff --git a/dts/src/arc/axs101.dts b/dts/src/arc/axs101.dts index 70aec7d6ca..626b694c7b 100644 --- a/dts/src/arc/axs101.dts +++ b/dts/src/arc/axs101.dts @@ -17,6 +17,6 @@ compatible = "snps,axs101", "snps,arc-sdp"; chosen { - bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0 video=1280x720@60"; + bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0 video=1280x720@60 print-fatal-signals=1"; }; }; diff --git a/dts/src/arc/axs10x_mb.dtsi b/dts/src/arc/axs10x_mb.dtsi index 74d070cd3c..47b74fbc40 100644 --- a/dts/src/arc/axs10x_mb.dtsi +++ b/dts/src/arc/axs10x_mb.dtsi @@ -214,13 +214,13 @@ }; eeprom@0x54{ - compatible = "24c01"; + compatible = "atmel,24c01"; reg = <0x54>; pagesize = <0x8>; }; eeprom@0x57{ - compatible = "24c04"; + compatible = "atmel,24c04"; reg = <0x57>; pagesize = <0x8>; }; diff --git a/dts/src/arc/haps_hs_idu.dts b/dts/src/arc/haps_hs_idu.dts index 215cddd0b6..0c603308ae 100644 --- a/dts/src/arc/haps_hs_idu.dts +++ b/dts/src/arc/haps_hs_idu.dts @@ -22,7 +22,7 @@ }; chosen { - bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug"; + bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1"; }; aliases { diff --git a/dts/src/arc/nsim_700.dts b/dts/src/arc/nsim_700.dts index 5ee96b067c..ff2f2c70c5 100644 --- a/dts/src/arc/nsim_700.dts +++ b/dts/src/arc/nsim_700.dts @@ -17,7 +17,7 @@ interrupt-parent = <&core_intc>; chosen { - bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8"; + bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1"; }; aliases { diff --git a/dts/src/arc/nsim_hs.dts b/dts/src/arc/nsim_hs.dts index 8d787b251f..8e2489b16b 100644 --- a/dts/src/arc/nsim_hs.dts +++ b/dts/src/arc/nsim_hs.dts @@ -24,7 +24,7 @@ }; chosen { - bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8"; + bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1"; }; aliases { diff --git a/dts/src/arc/nsim_hs_idu.dts b/dts/src/arc/nsim_hs_idu.dts index 4f98ebf71f..ed12f49472 100644 --- a/dts/src/arc/nsim_hs_idu.dts +++ b/dts/src/arc/nsim_hs_idu.dts @@ -15,7 +15,7 @@ interrupt-parent = <&core_intc>; chosen { - bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8"; + bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1"; }; aliases { diff --git a/dts/src/arc/nsimosci.dts b/dts/src/arc/nsimosci.dts index 3c391ba565..7842e5eb4a 100644 --- a/dts/src/arc/nsimosci.dts +++ b/dts/src/arc/nsimosci.dts @@ -20,7 +20,7 @@ /* this is for console on PGU */ /* bootargs = "console=tty0 consoleblank=0"; */ /* this is for console on serial */ - bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24"; + bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24 print-fatal-signals=1"; }; aliases { diff --git a/dts/src/arc/nsimosci_hs.dts b/dts/src/arc/nsimosci_hs.dts index 14a727cbf4..b8838cf2b4 100644 --- a/dts/src/arc/nsimosci_hs.dts +++ b/dts/src/arc/nsimosci_hs.dts @@ -20,7 +20,7 @@ /* this is for console on PGU */ /* bootargs = "console=tty0 consoleblank=0"; */ /* this is for console on serial */ - bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24"; + bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24 print-fatal-signals=1"; }; aliases { diff --git a/dts/src/arc/nsimosci_hs_idu.dts b/dts/src/arc/nsimosci_hs_idu.dts index 5052917d4a..72a2c723f1 100644 --- a/dts/src/arc/nsimosci_hs_idu.dts +++ b/dts/src/arc/nsimosci_hs_idu.dts @@ -18,7 +18,7 @@ chosen { /* this is for console on serial */ - bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblan=0 debug video=640x480-24"; + bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblan=0 debug video=640x480-24 print-fatal-signals=1"; }; aliases { diff --git a/dts/src/arm/aspeed-g4.dtsi b/dts/src/arm/aspeed-g4.dtsi index b0d8431a37..ae2b8c952e 100644 --- a/dts/src/arm/aspeed-g4.dtsi +++ b/dts/src/arm/aspeed-g4.dtsi @@ -42,6 +42,11 @@ }; }; + memory@40000000 { + device_type = "memory"; + reg = <0x40000000 0>; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; diff --git a/dts/src/arm/aspeed-g5.dtsi b/dts/src/arm/aspeed-g5.dtsi index 40de3b66c3..2477ebc11d 100644 --- a/dts/src/arm/aspeed-g5.dtsi +++ b/dts/src/arm/aspeed-g5.dtsi @@ -42,6 +42,11 @@ }; }; + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0>; + }; + ahb { compatible = "simple-bus"; #address-cells = <1>; diff --git a/dts/src/arm/bcm11351.dtsi b/dts/src/arm/bcm11351.dtsi index 18045c38bc..db7cded1b7 100644 --- a/dts/src/arm/bcm11351.dtsi +++ b/dts/src/arm/bcm11351.dtsi @@ -55,7 +55,7 @@ <0x3ff00100 0x100>; }; - smc@0x3404c000 { + smc@3404c000 { compatible = "brcm,bcm11351-smc", "brcm,kona-smc"; reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */ }; diff --git a/dts/src/arm/bcm21664.dtsi b/dts/src/arm/bcm21664.dtsi index 6dde95f21c..266f2611dc 100644 --- a/dts/src/arm/bcm21664.dtsi +++ b/dts/src/arm/bcm21664.dtsi @@ -55,7 +55,7 @@ <0x3ff00100 0x100>; }; - smc@0x3404e000 { + smc@3404e000 { compatible = "brcm,bcm21664-smc", "brcm,kona-smc"; reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */ }; diff --git a/dts/src/arm/bcm2835.dtsi b/dts/src/arm/bcm2835.dtsi index 0e3d2a5ff2..a5c3824c80 100644 --- a/dts/src/arm/bcm2835.dtsi +++ b/dts/src/arm/bcm2835.dtsi @@ -18,10 +18,10 @@ soc { ranges = <0x7e000000 0x20000000 0x02000000>; dma-ranges = <0x40000000 0x00000000 0x20000000>; + }; - arm-pmu { - compatible = "arm,arm1176-pmu"; - }; + arm-pmu { + compatible = "arm,arm1176-pmu"; }; }; diff --git a/dts/src/arm/bcm2836.dtsi b/dts/src/arm/bcm2836.dtsi index 1dfd764427..c933e84138 100644 --- a/dts/src/arm/bcm2836.dtsi +++ b/dts/src/arm/bcm2836.dtsi @@ -9,19 +9,19 @@ <0x40000000 0x40000000 0x00001000>; dma-ranges = <0xc0000000 0x00000000 0x3f000000>; - local_intc: local_intc { + local_intc: local_intc@40000000 { compatible = "brcm,bcm2836-l1-intc"; reg = <0x40000000 0x100>; interrupt-controller; #interrupt-cells = <2>; interrupt-parent = <&local_intc>; }; + }; - arm-pmu { - compatible = "arm,cortex-a7-pmu"; - interrupt-parent = <&local_intc>; - interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; - }; + arm-pmu { + compatible = "arm,cortex-a7-pmu"; + interrupt-parent = <&local_intc>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; }; timer { diff --git a/dts/src/arm/bcm2837.dtsi b/dts/src/arm/bcm2837.dtsi index efa7d3387a..7704bb0296 100644 --- a/dts/src/arm/bcm2837.dtsi +++ b/dts/src/arm/bcm2837.dtsi @@ -8,7 +8,7 @@ <0x40000000 0x40000000 0x00001000>; dma-ranges = <0xc0000000 0x00000000 0x3f000000>; - local_intc: local_intc { + local_intc: local_intc@40000000 { compatible = "brcm,bcm2836-l1-intc"; reg = <0x40000000 0x100>; interrupt-controller; diff --git a/dts/src/arm/bcm283x.dtsi b/dts/src/arm/bcm283x.dtsi index 18db25a5a6..9d293decf8 100644 --- a/dts/src/arm/bcm283x.dtsi +++ b/dts/src/arm/bcm283x.dtsi @@ -465,7 +465,7 @@ status = "disabled"; }; - aux: aux@0x7e215000 { + aux: aux@7e215000 { compatible = "brcm,bcm2835-aux"; #clock-cells = <1>; reg = <0x7e215000 0x8>; diff --git a/dts/src/arm/bcm958625hr.dts b/dts/src/arm/bcm958625hr.dts index 6a44b80217..f0e2008f74 100644 --- a/dts/src/arm/bcm958625hr.dts +++ b/dts/src/arm/bcm958625hr.dts @@ -49,7 +49,7 @@ memory { device_type = "memory"; - reg = <0x60000000 0x80000000>; + reg = <0x60000000 0x20000000>; }; gpio-restart { diff --git a/dts/src/arm/gemini-dlink-dns-313.dts b/dts/src/arm/gemini-dlink-dns-313.dts index 08568ce24d..da8bb9d60f 100644 --- a/dts/src/arm/gemini-dlink-dns-313.dts +++ b/dts/src/arm/gemini-dlink-dns-313.dts @@ -269,7 +269,7 @@ sata: sata@46000000 { /* The ROM uses this muxmode */ - cortina,gemini-ata-muxmode = <3>; + cortina,gemini-ata-muxmode = <0>; cortina,gemini-enable-sata-bridge; status = "okay"; }; diff --git a/dts/src/arm/imx6dl-icore-rqs.dts b/dts/src/arm/imx6dl-icore-rqs.dts index cf42c2f5cd..1281bc39b7 100644 --- a/dts/src/arm/imx6dl-icore-rqs.dts +++ b/dts/src/arm/imx6dl-icore-rqs.dts @@ -42,7 +42,7 @@ /dts-v1/; -#include "imx6q.dtsi" +#include "imx6dl.dtsi" #include "imx6qdl-icore-rqs.dtsi" / { diff --git a/dts/src/arm/imx7d-sdb.dts b/dts/src/arm/imx7d-sdb.dts index a7a5dc7b27..e7d2db839d 100644 --- a/dts/src/arm/imx7d-sdb.dts +++ b/dts/src/arm/imx7d-sdb.dts @@ -82,7 +82,7 @@ enable-active-high; }; - reg_usb_otg2_vbus: regulator-usb-otg1-vbus { + reg_usb_otg2_vbus: regulator-usb-otg2-vbus { compatible = "regulator-fixed"; regulator-name = "usb_otg2_vbus"; regulator-min-microvolt = <5000000>; diff --git a/dts/src/arm/logicpd-som-lv.dtsi b/dts/src/arm/logicpd-som-lv.dtsi index c1aa7a4518..a30ee9fcb3 100644 --- a/dts/src/arm/logicpd-som-lv.dtsi +++ b/dts/src/arm/logicpd-som-lv.dtsi @@ -71,6 +71,8 @@ }; &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; clock-frequency = <2600000>; twl: twl@48 { @@ -189,7 +191,12 @@ >; }; - + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ + OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ + >; + }; }; &omap3_pmx_wkup { diff --git a/dts/src/arm/logicpd-torpedo-som.dtsi b/dts/src/arm/logicpd-torpedo-som.dtsi index b50b796e15..47915447a8 100644 --- a/dts/src/arm/logicpd-torpedo-som.dtsi +++ b/dts/src/arm/logicpd-torpedo-som.dtsi @@ -66,6 +66,8 @@ }; &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; clock-frequency = <2600000>; twl: twl@48 { @@ -136,6 +138,12 @@ OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ >; }; + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ + OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ + >; + }; }; &uart2 { diff --git a/dts/src/arm/omap5-uevm.dts b/dts/src/arm/omap5-uevm.dts index ec2c8baef6..592e17fd4e 100644 --- a/dts/src/arm/omap5-uevm.dts +++ b/dts/src/arm/omap5-uevm.dts @@ -47,7 +47,7 @@ gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; /* gpio3_83 */ wakeup-source; autorepeat; - debounce_interval = <50>; + debounce-interval = <50>; }; }; diff --git a/dts/src/arm/rk3036.dtsi b/dts/src/arm/rk3036.dtsi index 3b704cfed6..a97458112f 100644 --- a/dts/src/arm/rk3036.dtsi +++ b/dts/src/arm/rk3036.dtsi @@ -280,7 +280,7 @@ max-frequency = <37500000>; clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; resets = <&cru SRST_SDIO>; @@ -298,7 +298,7 @@ max-frequency = <37500000>; clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; default-sample-phase = <158>; disable-wp; dmas = <&pdma 12>; diff --git a/dts/src/arm/rk322x.dtsi b/dts/src/arm/rk322x.dtsi index 780ec3a99b..341deaf62f 100644 --- a/dts/src/arm/rk322x.dtsi +++ b/dts/src/arm/rk322x.dtsi @@ -621,7 +621,7 @@ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; pinctrl-names = "default"; pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>; @@ -634,7 +634,7 @@ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; pinctrl-names = "default"; pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>; @@ -649,7 +649,7 @@ max-frequency = <37500000>; clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; bus-width = <8>; default-sample-phase = <158>; fifo-depth = <0x100>; diff --git a/dts/src/arm/rk3288-phycore-som.dtsi b/dts/src/arm/rk3288-phycore-som.dtsi index 99cfae875e..5eae4776ff 100644 --- a/dts/src/arm/rk3288-phycore-som.dtsi +++ b/dts/src/arm/rk3288-phycore-som.dtsi @@ -110,26 +110,6 @@ }; }; -&cpu0 { - cpu0-supply = <&vdd_cpu>; - operating-points = < - /* KHz uV */ - 1800000 1400000 - 1608000 1350000 - 1512000 1300000 - 1416000 1200000 - 1200000 1100000 - 1008000 1050000 - 816000 1000000 - 696000 950000 - 600000 900000 - 408000 900000 - 312000 900000 - 216000 900000 - 126000 900000 - >; -}; - &emmc { status = "okay"; bus-width = <8>; diff --git a/dts/src/arm/rk3288.dtsi b/dts/src/arm/rk3288.dtsi index 6102e4e7f3..354aff45c1 100644 --- a/dts/src/arm/rk3288.dtsi +++ b/dts/src/arm/rk3288.dtsi @@ -927,6 +927,7 @@ i2s: i2s@ff890000 { compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s"; reg = <0x0 0xff890000 0x0 0x10000>; + #sound-dai-cells = <0>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; @@ -1176,6 +1177,7 @@ compatible = "rockchip,rk3288-dw-hdmi"; reg = <0x0 0xff980000 0x0 0x20000>; reg-io-width = <4>; + #sound-dai-cells = <0>; rockchip,grf = <&grf>; interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI_CEC>; diff --git a/dts/src/arm/sun6i-a31s-sinovoip-bpi-m2.dts b/dts/src/arm/sun6i-a31s-sinovoip-bpi-m2.dts index 51e6f1d21c..b2758dd8ce 100644 --- a/dts/src/arm/sun6i-a31s-sinovoip-bpi-m2.dts +++ b/dts/src/arm/sun6i-a31s-sinovoip-bpi-m2.dts @@ -42,7 +42,6 @@ /dts-v1/; #include "sun6i-a31s.dtsi" -#include "sunxi-common-regulators.dtsi" #include <dt-bindings/gpio/gpio.h> / { @@ -99,6 +98,7 @@ pinctrl-0 = <&gmac_pins_rgmii_a>, <&gmac_phy_reset_pin_bpi_m2>; phy = <&phy1>; phy-mode = "rgmii"; + phy-supply = <®_dldo1>; snps,reset-gpio = <&pio 0 21 GPIO_ACTIVE_HIGH>; /* PA21 */ snps,reset-active-low; snps,reset-delays-us = <0 10000 30000>; @@ -118,7 +118,7 @@ &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_bpi_m2>; - vmmc-supply = <®_vcc3v0>; + vmmc-supply = <®_dcdc1>; bus-width = <4>; cd-gpios = <&pio 0 4 GPIO_ACTIVE_HIGH>; /* PA4 */ cd-inverted; @@ -132,7 +132,7 @@ &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins_a>; - vmmc-supply = <®_vcc3v0>; + vmmc-supply = <®_aldo1>; mmc-pwrseq = <&mmc2_pwrseq>; bus-width = <4>; non-removable; @@ -163,6 +163,8 @@ reg = <0x68>; interrupt-parent = <&nmi_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + eldoin-supply = <®_dcdc1>; + x-powers,drive-vbus-en; }; }; @@ -193,7 +195,28 @@ #include "axp22x.dtsi" +®_aldo1 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-wifi"; +}; + +®_aldo2 { + regulator-always-on; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-name = "vcc-gmac"; +}; + +®_aldo3 { + regulator-always-on; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "avcc"; +}; + ®_dc5ldo { + regulator-always-on; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1320000>; regulator-name = "vdd-cpus"; @@ -233,6 +256,40 @@ regulator-name = "vcc-dram"; }; +®_dldo1 { + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-name = "vcc-mac"; +}; + +®_dldo2 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "avdd-csi"; +}; + +®_dldo3 { + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-pb"; +}; + +®_eldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vdd-csi"; + status = "okay"; +}; + +®_ldo_io1 { + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pm-cpus"; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/dts/src/arm/zx296702.dtsi b/dts/src/arm/zx296702.dtsi index 8a74efdb63..240e7a23d8 100644 --- a/dts/src/arm/zx296702.dtsi +++ b/dts/src/arm/zx296702.dtsi @@ -56,7 +56,7 @@ clocks = <&topclk ZX296702_A9_PERIPHCLK>; }; - l2cc: l2-cache-controller@0x00c00000 { + l2cc: l2-cache-controller@c00000 { compatible = "arm,pl310-cache"; reg = <0x00c00000 0x1000>; cache-unified; @@ -67,30 +67,30 @@ arm,double-linefill-incr = <0>; }; - pcu: pcu@0xa0008000 { + pcu: pcu@a0008000 { compatible = "zte,zx296702-pcu"; reg = <0xa0008000 0x1000>; }; - topclk: topclk@0x09800000 { + topclk: topclk@9800000 { compatible = "zte,zx296702-topcrm-clk"; reg = <0x09800000 0x1000>; #clock-cells = <1>; }; - lsp1clk: lsp1clk@0x09400000 { + lsp1clk: lsp1clk@9400000 { compatible = "zte,zx296702-lsp1crpm-clk"; reg = <0x09400000 0x1000>; #clock-cells = <1>; }; - lsp0clk: lsp0clk@0x0b000000 { + lsp0clk: lsp0clk@b000000 { compatible = "zte,zx296702-lsp0crpm-clk"; reg = <0x0b000000 0x1000>; #clock-cells = <1>; }; - uart0: serial@0x09405000 { + uart0: serial@9405000 { compatible = "zte,zx296702-uart"; reg = <0x09405000 0x1000>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; @@ -98,7 +98,7 @@ status = "disabled"; }; - uart1: serial@0x09406000 { + uart1: serial@9406000 { compatible = "zte,zx296702-uart"; reg = <0x09406000 0x1000>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; @@ -106,7 +106,7 @@ status = "disabled"; }; - mmc0: mmc@0x09408000 { + mmc0: mmc@9408000 { compatible = "snps,dw-mshc"; #address-cells = <1>; #size-cells = <0>; @@ -119,7 +119,7 @@ status = "disabled"; }; - mmc1: mmc@0x0b003000 { + mmc1: mmc@b003000 { compatible = "snps,dw-mshc"; #address-cells = <1>; #size-cells = <0>; @@ -132,7 +132,7 @@ status = "disabled"; }; - sysctrl: sysctrl@0xa0007000 { + sysctrl: sysctrl@a0007000 { compatible = "zte,sysctrl", "syscon"; reg = <0xa0007000 0x1000>; }; diff --git a/dts/src/arm64/amlogic/meson-axg.dtsi b/dts/src/arm64/amlogic/meson-axg.dtsi index a80632641b..70c776ef7a 100644 --- a/dts/src/arm64/amlogic/meson-axg.dtsi +++ b/dts/src/arm64/amlogic/meson-axg.dtsi @@ -165,14 +165,14 @@ uart_A: serial@24000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; - reg = <0x0 0x24000 0x0 0x14>; + reg = <0x0 0x24000 0x0 0x18>; interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; status = "disabled"; }; uart_B: serial@23000 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-uart"; - reg = <0x0 0x23000 0x0 0x14>; + reg = <0x0 0x23000 0x0 0x18>; interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; status = "disabled"; }; diff --git a/dts/src/arm64/amlogic/meson-gx.dtsi b/dts/src/arm64/amlogic/meson-gx.dtsi index 6cb3c2a52b..4ee2e79514 100644 --- a/dts/src/arm64/amlogic/meson-gx.dtsi +++ b/dts/src/arm64/amlogic/meson-gx.dtsi @@ -235,14 +235,14 @@ uart_A: serial@84c0 { compatible = "amlogic,meson-gx-uart"; - reg = <0x0 0x84c0 0x0 0x14>; + reg = <0x0 0x84c0 0x0 0x18>; interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; status = "disabled"; }; uart_B: serial@84dc { compatible = "amlogic,meson-gx-uart"; - reg = <0x0 0x84dc 0x0 0x14>; + reg = <0x0 0x84dc 0x0 0x18>; interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; status = "disabled"; }; @@ -287,7 +287,7 @@ uart_C: serial@8700 { compatible = "amlogic,meson-gx-uart"; - reg = <0x0 0x8700 0x0 0x14>; + reg = <0x0 0x8700 0x0 0x18>; interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>; status = "disabled"; }; @@ -404,14 +404,14 @@ uart_AO: serial@4c0 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; - reg = <0x0 0x004c0 0x0 0x14>; + reg = <0x0 0x004c0 0x0 0x18>; interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>; status = "disabled"; }; uart_AO_B: serial@4e0 { compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart"; - reg = <0x0 0x004e0 0x0 0x14>; + reg = <0x0 0x004e0 0x0 0x18>; interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; status = "disabled"; }; diff --git a/dts/src/arm64/amlogic/meson-gxl.dtsi b/dts/src/arm64/amlogic/meson-gxl.dtsi index 4f355f17ee..c8514110b9 100644 --- a/dts/src/arm64/amlogic/meson-gxl.dtsi +++ b/dts/src/arm64/amlogic/meson-gxl.dtsi @@ -631,6 +631,7 @@ internal_phy: ethernet-phy@8 { compatible = "ethernet-phy-id0181.4400", "ethernet-phy-ieee802.3-c22"; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; reg = <8>; max-speed = <100>; }; diff --git a/dts/src/arm64/cavium/thunder2-99xx.dtsi b/dts/src/arm64/cavium/thunder2-99xx.dtsi index 4220fbdcb2..ff5c4c47b2 100644 --- a/dts/src/arm64/cavium/thunder2-99xx.dtsi +++ b/dts/src/arm64/cavium/thunder2-99xx.dtsi @@ -98,7 +98,7 @@ clock-output-names = "clk125mhz"; }; - pci { + pcie@30000000 { compatible = "pci-host-ecam-generic"; device_type = "pci"; #interrupt-cells = <1>; @@ -118,6 +118,7 @@ ranges = <0x02000000 0 0x40000000 0 0x40000000 0 0x20000000 0x43000000 0x40 0x00000000 0x40 0x00000000 0x20 0x00000000>; + bus-range = <0 0xff>; interrupt-map-mask = <0 0 0 7>; interrupt-map = /* addr pin ic icaddr icintr */ diff --git a/dts/src/arm64/hisilicon/hi6220-hikey.dts b/dts/src/arm64/hisilicon/hi6220-hikey.dts index e94fa1a531..047641fe29 100644 --- a/dts/src/arm64/hisilicon/hi6220-hikey.dts +++ b/dts/src/arm64/hisilicon/hi6220-hikey.dts @@ -51,7 +51,7 @@ #size-cells = <2>; ranges; - ramoops@0x21f00000 { + ramoops@21f00000 { compatible = "ramoops"; reg = <0x0 0x21f00000 0x0 0x00100000>; record-size = <0x00020000>; diff --git a/dts/src/arm64/mediatek/mt8173.dtsi b/dts/src/arm64/mediatek/mt8173.dtsi index 9fbe4705ee..94597e33c8 100644 --- a/dts/src/arm64/mediatek/mt8173.dtsi +++ b/dts/src/arm64/mediatek/mt8173.dtsi @@ -341,7 +341,7 @@ reg = <0 0x10005000 0 0x1000>; }; - pio: pinctrl@0x10005000 { + pio: pinctrl@10005000 { compatible = "mediatek,mt8173-pinctrl"; reg = <0 0x1000b000 0 0x1000>; mediatek,pctl-regmap = <&syscfg_pctl_a>; diff --git a/dts/src/arm64/qcom/apq8096-db820c.dtsi b/dts/src/arm64/qcom/apq8096-db820c.dtsi index 492a011f14..1c8f1b8647 100644 --- a/dts/src/arm64/qcom/apq8096-db820c.dtsi +++ b/dts/src/arm64/qcom/apq8096-db820c.dtsi @@ -140,16 +140,16 @@ }; agnoc@0 { - qcom,pcie@00600000 { + qcom,pcie@600000 { perst-gpio = <&msmgpio 35 GPIO_ACTIVE_LOW>; }; - qcom,pcie@00608000 { + qcom,pcie@608000 { status = "okay"; perst-gpio = <&msmgpio 130 GPIO_ACTIVE_LOW>; }; - qcom,pcie@00610000 { + qcom,pcie@610000 { status = "okay"; perst-gpio = <&msmgpio 114 GPIO_ACTIVE_LOW>; }; diff --git a/dts/src/arm64/qcom/msm8996.dtsi b/dts/src/arm64/qcom/msm8996.dtsi index 4b2afcc4fd..0a6f7952bb 100644 --- a/dts/src/arm64/qcom/msm8996.dtsi +++ b/dts/src/arm64/qcom/msm8996.dtsi @@ -840,7 +840,7 @@ #size-cells = <1>; ranges; - pcie0: qcom,pcie@00600000 { + pcie0: qcom,pcie@600000 { compatible = "qcom,pcie-msm8996", "snps,dw-pcie"; status = "disabled"; power-domains = <&gcc PCIE0_GDSC>; @@ -893,7 +893,7 @@ }; - pcie1: qcom,pcie@00608000 { + pcie1: qcom,pcie@608000 { compatible = "qcom,pcie-msm8996", "snps,dw-pcie"; power-domains = <&gcc PCIE1_GDSC>; bus-range = <0x00 0xff>; @@ -946,7 +946,7 @@ "bus_slave"; }; - pcie2: qcom,pcie@00610000 { + pcie2: qcom,pcie@610000 { compatible = "qcom,pcie-msm8996", "snps,dw-pcie"; power-domains = <&gcc PCIE2_GDSC>; bus-range = <0x00 0xff>; diff --git a/dts/src/arm64/rockchip/rk3328-rock64.dts b/dts/src/arm64/rockchip/rk3328-rock64.dts index 3890468678..28257724a5 100644 --- a/dts/src/arm64/rockchip/rk3328-rock64.dts +++ b/dts/src/arm64/rockchip/rk3328-rock64.dts @@ -132,17 +132,16 @@ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; clock_in_out = "input"; - /* shows instability at 1GBit right now */ - max-speed = <100>; phy-supply = <&vcc_io>; phy-mode = "rgmii"; pinctrl-names = "default"; pinctrl-0 = <&rgmiim1_pins>; + snps,force_thresh_dma_mode; snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; snps,reset-active-low; snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x26>; - rx_delay = <0x11>; + tx_delay = <0x24>; + rx_delay = <0x18>; status = "okay"; }; diff --git a/dts/src/arm64/rockchip/rk3328.dtsi b/dts/src/arm64/rockchip/rk3328.dtsi index a037ee56fe..cae3415544 100644 --- a/dts/src/arm64/rockchip/rk3328.dtsi +++ b/dts/src/arm64/rockchip/rk3328.dtsi @@ -730,7 +730,7 @@ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; status = "disabled"; }; @@ -741,7 +741,7 @@ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; status = "disabled"; }; @@ -752,7 +752,7 @@ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; status = "disabled"; }; diff --git a/dts/src/arm64/rockchip/rk3368.dtsi b/dts/src/arm64/rockchip/rk3368.dtsi index aa4d07046a..03458ac442 100644 --- a/dts/src/arm64/rockchip/rk3368.dtsi +++ b/dts/src/arm64/rockchip/rk3368.dtsi @@ -257,7 +257,7 @@ max-frequency = <150000000>; clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>, <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>; - clock-names = "biu", "ciu", "ciu_drv", "ciu_sample"; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; resets = <&cru SRST_SDIO0>; diff --git a/dts/src/arm64/rockchip/rk3399-gru.dtsi b/dts/src/arm64/rockchip/rk3399-gru.dtsi index 03f1950253..204bdb9857 100644 --- a/dts/src/arm64/rockchip/rk3399-gru.dtsi +++ b/dts/src/arm64/rockchip/rk3399-gru.dtsi @@ -406,8 +406,9 @@ wlan_pd_n: wlan-pd-n { compatible = "regulator-fixed"; regulator-name = "wlan_pd_n"; + pinctrl-names = "default"; + pinctrl-0 = <&wlan_module_reset_l>; - /* Note the wlan_module_reset_l pinctrl */ enable-active-high; gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>; @@ -983,12 +984,6 @@ ap_i2c_audio: &i2c8 { pinctrl-0 = < &ap_pwroff /* AP will auto-assert this when in S3 */ &clk_32k /* This pin is always 32k on gru boards */ - - /* - * We want this driven low ASAP; firmware should help us, but - * we can help ourselves too. - */ - &wlan_module_reset_l >; pcfg_output_low: pcfg-output-low { @@ -1168,12 +1163,7 @@ ap_i2c_audio: &i2c8 { }; wlan_module_reset_l: wlan-module-reset-l { - /* - * We want this driven low ASAP (As {Soon,Strongly} As - * Possible), to avoid leakage through the powered-down - * WiFi. - */ - rockchip,pins = <1 11 RK_FUNC_GPIO &pcfg_output_low>; + rockchip,pins = <1 11 RK_FUNC_GPIO &pcfg_pull_none>; }; bt_host_wake_l: bt-host-wake-l { diff --git a/dts/src/arm64/rockchip/rk3399-sapphire.dtsi b/dts/src/arm64/rockchip/rk3399-sapphire.dtsi index 0f873c897d..ce592a4c0c 100644 --- a/dts/src/arm64/rockchip/rk3399-sapphire.dtsi +++ b/dts/src/arm64/rockchip/rk3399-sapphire.dtsi @@ -457,7 +457,7 @@ assigned-clocks = <&cru SCLK_PCIEPHY_REF>; assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; assigned-clock-rates = <100000000>; - ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>; + ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>; num-lanes = <4>; pinctrl-names = "default"; pinctrl-0 = <&pcie_clkreqn_cpm>; diff --git a/dts/src/arm64/rockchip/rk3399.dtsi b/dts/src/arm64/rockchip/rk3399.dtsi index 7aa2144e0d..0b81ca1d07 100644 --- a/dts/src/arm64/rockchip/rk3399.dtsi +++ b/dts/src/arm64/rockchip/rk3399.dtsi @@ -411,8 +411,8 @@ reg = <0x0 0xfe800000 0x0 0x100000>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>; dr_mode = "otg"; - phys = <&u2phy0_otg>, <&tcphy0_usb3>; - phy-names = "usb2-phy", "usb3-phy"; + phys = <&u2phy0_otg>; + phy-names = "usb2-phy"; phy_type = "utmi_wide"; snps,dis_enblslpm_quirk; snps,dis-u2-freeclk-exists-quirk; @@ -444,8 +444,8 @@ reg = <0x0 0xfe900000 0x0 0x100000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>; dr_mode = "otg"; - phys = <&u2phy1_otg>, <&tcphy1_usb3>; - phy-names = "usb2-phy", "usb3-phy"; + phys = <&u2phy1_otg>; + phy-names = "usb2-phy"; phy_type = "utmi_wide"; snps,dis_enblslpm_quirk; snps,dis-u2-freeclk-exists-quirk; @@ -1739,8 +1739,8 @@ compatible = "rockchip,rk3399-edp"; reg = <0x0 0xff970000 0x0 0x8000>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>; - clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>; - clock-names = "dp", "pclk"; + clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>, <&cru PCLK_VIO_GRF>; + clock-names = "dp", "pclk", "grf"; pinctrl-names = "default"; pinctrl-0 = <&edp_hpd>; power-domains = <&power RK3399_PD_EDP>; diff --git a/fs/devfs-core.c b/fs/devfs-core.c index ea5887c720..6b5e6da6a8 100644 --- a/fs/devfs-core.c +++ b/fs/devfs-core.c @@ -457,7 +457,7 @@ static ssize_t loop_write(struct cdev *cdev, const void *buf, size_t count, return write(priv->fd, buf, count); } -static const struct file_operations loop_ops = { +static const struct cdev_operations loop_ops = { .read = loop_read, .write = loop_write, .memmap = generic_memmap_rw, @@ -513,3 +513,71 @@ void cdev_remove_loop(struct cdev *cdev) free(cdev->name); free(cdev); } + +static void memcpy_sz(void *dst, const void *src, size_t count, int rwsize) +{ + /* no rwsize specification given. Do whatever memcpy likes best */ + if (!rwsize) { + memcpy(dst, src, count); + return; + } + + rwsize = rwsize >> O_RWSIZE_SHIFT; + + count /= rwsize; + + while (count-- > 0) { + switch (rwsize) { + case 1: + *((u8 *)dst) = *((u8 *)src); + break; + case 2: + *((u16 *)dst) = *((u16 *)src); + break; + case 4: + *((u32 *)dst) = *((u32 *)src); + break; + case 8: + *((u64 *)dst) = *((u64 *)src); + break; + } + dst += rwsize; + src += rwsize; + } +} + +ssize_t mem_read(struct cdev *cdev, void *buf, size_t count, loff_t offset, + unsigned long flags) +{ + unsigned long size; + struct device_d *dev; + + if (!cdev->dev || cdev->dev->num_resources < 1) + return -1; + dev = cdev->dev; + + size = min((resource_size_t)count, + resource_size(&dev->resource[0]) - + (resource_size_t)offset); + memcpy_sz(buf, dev_get_mem_region(dev, 0) + offset, size, flags & O_RWSIZE_MASK); + return size; +} +EXPORT_SYMBOL(mem_read); + +ssize_t mem_write(struct cdev *cdev, const void *buf, size_t count, loff_t offset, + unsigned long flags) +{ + unsigned long size; + struct device_d *dev; + + if (!cdev->dev || cdev->dev->num_resources < 1) + return -1; + dev = cdev->dev; + + size = min((resource_size_t)count, + resource_size(&dev->resource[0]) - + (resource_size_t)offset); + memcpy_sz(dev_get_mem_region(dev, 0) + offset, buf, size, flags & O_RWSIZE_MASK); + return size; +} +EXPORT_SYMBOL(mem_write); @@ -99,13 +99,13 @@ char *normalise_path(const char *pathname) slashes[0] = in = out = path; - while (*in) { - if(*in == '/') { + while (*in) { + if(*in == '/') { slashes[sl++] = out; - *out++ = *in++; - while(*in == '/') - in++; - } else { + *out++ = *in++; + while(*in == '/') + in++; + } else { if (*in == '.' && (*(in + 1) == '/' || !*(in + 1))) { sl--; if (sl < 0) @@ -123,16 +123,16 @@ char *normalise_path(const char *pathname) continue; } *out++ = *in++; - } - } + } + } *out-- = 0; - /* - * Remove trailing slash - */ - if (*out == '/') - *out = 0; + /* + * Remove trailing slash + */ + if (*out == '/') + *out = 0; if (!*path) { *path = '/'; @@ -191,7 +191,7 @@ static char *__canonicalize_path(const char *_pathname, int level) * with an additional stat() call. */ fsdev = get_fsdevice_by_path(outpath); - if (!fsdev->driver->readlink) + if (!fsdev || !fsdev->driver->readlink) continue; ret = __lstat(outpath, &s); @@ -1660,7 +1660,7 @@ int mkdir (const char *pathname, mode_t mode) { struct fs_driver_d *fsdrv; struct fs_device_d *fsdev; - char *p = normalise_path(pathname); + char *p = canonicalize_path(pathname); char *freep = p; int ret; struct stat s; @@ -1700,7 +1700,7 @@ int rmdir (const char *pathname) { struct fs_driver_d *fsdrv; struct fs_device_d *fsdev; - char *p = normalise_path(pathname); + char *p = canonicalize_path(pathname); char *freep = p; int ret; struct stat s; @@ -1739,72 +1739,6 @@ out: } EXPORT_SYMBOL(rmdir); -static void memcpy_sz(void *dst, const void *src, size_t count, int rwsize) -{ - /* no rwsize specification given. Do whatever memcpy likes best */ - if (!rwsize) { - memcpy(dst, src, count); - return; - } - - rwsize = rwsize >> O_RWSIZE_SHIFT; - - count /= rwsize; - - while (count-- > 0) { - switch (rwsize) { - case 1: - *((u8 *)dst) = *((u8 *)src); - break; - case 2: - *((u16 *)dst) = *((u16 *)src); - break; - case 4: - *((u32 *)dst) = *((u32 *)src); - break; - case 8: - *((u64 *)dst) = *((u64 *)src); - break; - } - dst += rwsize; - src += rwsize; - } -} - -ssize_t mem_read(struct cdev *cdev, void *buf, size_t count, loff_t offset, ulong flags) -{ - ulong size; - struct device_d *dev; - - if (!cdev->dev || cdev->dev->num_resources < 1) - return -1; - dev = cdev->dev; - - size = min((resource_size_t)count, - resource_size(&dev->resource[0]) - - (resource_size_t)offset); - memcpy_sz(buf, dev_get_mem_region(dev, 0) + offset, size, flags & O_RWSIZE_MASK); - return size; -} -EXPORT_SYMBOL(mem_read); - -ssize_t mem_write(struct cdev *cdev, const void *buf, size_t count, loff_t offset, ulong flags) -{ - ulong size; - struct device_d *dev; - - if (!cdev->dev || cdev->dev->num_resources < 1) - return -1; - dev = cdev->dev; - - size = min((resource_size_t)count, - resource_size(&dev->resource[0]) - - (resource_size_t)offset); - memcpy_sz(dev_get_mem_region(dev, 0) + offset, buf, size, flags & O_RWSIZE_MASK); - return size; -} -EXPORT_SYMBOL(mem_write); - /* * cdev_get_mount_path - return the path a cdev is mounted on * diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index ce6e95e373..b4eb76202b 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -556,7 +556,6 @@ out: done: clear_inode(inode); } -#endif static void ubifs_dirty_inode(struct inode *inode, int flags) { @@ -569,7 +568,6 @@ static void ubifs_dirty_inode(struct inode *inode, int flags) } } -#ifndef __BAREBOX__ static int ubifs_statfs(struct dentry *dentry, struct kstatfs *buf) { struct ubifs_info *c = dentry->d_sb->s_fs_info; @@ -2107,9 +2105,7 @@ const struct super_operations ubifs_super_operations = { .write_inode = ubifs_write_inode, .evict_inode = ubifs_evict_inode, .statfs = ubifs_statfs, -#endif .dirty_inode = ubifs_dirty_inode, -#ifndef __BAREBOX__ .remount_fs = ubifs_remount_fs, .show_options = ubifs_show_options, .sync_fs = ubifs_sync_fs, diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c index 0bb1c26d7d..a525b044b8 100644 --- a/fs/ubifs/ubifs.c +++ b/fs/ubifs/ubifs.c @@ -273,135 +273,6 @@ int __init ubifs_compressors_init(void) * ubifsls... */ -#ifndef __BAREBOX__ -static int filldir(struct ubifs_info *c, const char *name, int namlen, - u64 ino, unsigned int d_type) -{ - struct inode *inode; - char filetime[32]; - - switch (d_type) { - case UBIFS_ITYPE_REG: - printf("\t"); - break; - case UBIFS_ITYPE_DIR: - printf("<DIR>\t"); - break; - case UBIFS_ITYPE_LNK: - printf("<LNK>\t"); - break; - default: - printf("other\t"); - break; - } - - inode = ubifs_iget(c->vfs_sb, ino); - if (IS_ERR(inode)) { - printf("%s: Error in ubifs_iget(), ino=%lld ret=%p!\n", - __func__, ino, inode); - return -1; - } - ctime_r((time_t *)&inode->i_mtime, filetime); - printf("%9lld %24.24s ", inode->i_size, filetime); -#ifndef __BAREBOX__ - ubifs_iput(inode); -#endif - - printf("%s\n", name); - - return 0; -} - -static int ubifs_printdir(struct file *file, void *dirent) -{ - int err, over = 0; - struct qstr nm; - union ubifs_key key; - struct ubifs_dent_node *dent; - struct inode *dir = file->f_path.dentry->d_inode; - struct ubifs_info *c = dir->i_sb->s_fs_info; - - dbg_gen("dir ino %lu, f_pos %#llx", dir->i_ino, file->f_pos); - - if (file->f_pos > UBIFS_S_KEY_HASH_MASK || file->f_pos == 2) - /* - * The directory was seek'ed to a senseless position or there - * are no more entries. - */ - return 0; - - if (file->f_pos == 1) { - /* Find the first entry in TNC and save it */ - lowest_dent_key(c, &key, dir->i_ino); - nm.name = NULL; - dent = ubifs_tnc_next_ent(c, &key, &nm); - if (IS_ERR(dent)) { - err = PTR_ERR(dent); - goto out; - } - - file->f_pos = key_hash_flash(c, &dent->key); - file->private_data = dent; - } - - dent = file->private_data; - if (!dent) { - /* - * The directory was seek'ed to and is now readdir'ed. - * Find the entry corresponding to @file->f_pos or the - * closest one. - */ - dent_key_init_hash(c, &key, dir->i_ino, file->f_pos); - nm.name = NULL; - dent = ubifs_tnc_next_ent(c, &key, &nm); - if (IS_ERR(dent)) { - err = PTR_ERR(dent); - goto out; - } - file->f_pos = key_hash_flash(c, &dent->key); - file->private_data = dent; - } - - while (1) { - dbg_gen("feed '%s', ino %llu, new f_pos %#x", - dent->name, (unsigned long long)le64_to_cpu(dent->inum), - key_hash_flash(c, &dent->key)); - ubifs_assert(le64_to_cpu(dent->ch.sqnum) > ubifs_inode(dir)->creat_sqnum); - - nm.len = le16_to_cpu(dent->nlen); - over = filldir(c, (char *)dent->name, nm.len, - le64_to_cpu(dent->inum), dent->type); - if (over) - return 0; - - /* Switch to the next entry */ - key_read(c, &dent->key, &key); - nm.name = (char *)dent->name; - dent = ubifs_tnc_next_ent(c, &key, &nm); - if (IS_ERR(dent)) { - err = PTR_ERR(dent); - goto out; - } - - kfree(file->private_data); - file->f_pos = key_hash_flash(c, &dent->key); - file->private_data = dent; - cond_resched(); - } - -out: - if (err != -ENOENT) { - ubifs_err(c, "cannot find next direntry, error %d", err); - return err; - } - - kfree(file->private_data); - file->private_data = NULL; - file->f_pos = 2; - return 0; -} -#endif - static int ubifs_finddir(struct super_block *sb, char *dirname, unsigned long root_inum, unsigned long *inum) { @@ -549,117 +420,6 @@ static unsigned long ubifs_findfile(struct super_block *sb, const char *filename return 0; } -#ifndef __BAREBOX__ -int ubifs_set_blk_dev(block_dev_desc_t *rbdd, disk_partition_t *info) -{ - if (rbdd) { - debug("UBIFS cannot be used with normal block devices\n"); - return -1; - } - - /* - * Should never happen since get_device_and_partition() already checks - * this, but better safe then sorry. - */ - if (!ubifs_is_mounted()) { - debug("UBIFS not mounted, use ubifsmount to mount volume first!\n"); - return -1; - } - - return 0; -} - -int ubifs_ls(const char *filename) -{ - struct ubifs_info *c = ubifs_sb->s_fs_info; - struct file *file; - struct dentry *dentry; - struct inode *dir; - void *dirent = NULL; - unsigned long inum; - int ret = 0; - - c->ubi = ubi_open_volume(c->vi.ubi_num, c->vi.vol_id, UBI_READONLY); - inum = ubifs_findfile(ubifs_sb, (char *)filename); - if (!inum) { - ret = -1; - goto out; - } - - file = kzalloc(sizeof(struct file), 0); - dentry = kzalloc(sizeof(struct dentry), 0); - dir = kzalloc(sizeof(struct inode), 0); - if (!file || !dentry || !dir) { - printf("%s: Error, no memory for malloc!\n", __func__); - ret = -ENOMEM; - goto out_mem; - } - - dir->i_sb = ubifs_sb; - file->f_path.dentry = dentry; - file->f_path.dentry->d_parent = dentry; - file->f_path.dentry->d_inode = dir; - file->f_path.dentry->d_inode->i_ino = inum; - file->f_pos = 1; - file->private_data = NULL; - ubifs_printdir(file, dirent); - -out_mem: - if (file) - free(file); - if (dentry) - free(dentry); - if (dir) - free(dir); - -out: - ubi_close_volume(c->ubi); - return ret; -} - -int ubifs_exists(const char *filename) -{ - struct ubifs_info *c = ubifs_sb->s_fs_info; - unsigned long inum; - - c->ubi = ubi_open_volume(c->vi.ubi_num, c->vi.vol_id, UBI_READONLY); - inum = ubifs_findfile(ubifs_sb, (char *)filename); - ubi_close_volume(c->ubi); - - return inum != 0; -} - -int ubifs_size(const char *filename, loff_t *size) -{ - struct ubifs_info *c = ubifs_sb->s_fs_info; - unsigned long inum; - struct inode *inode; - int err = 0; - - c->ubi = ubi_open_volume(c->vi.ubi_num, c->vi.vol_id, UBI_READONLY); - - inum = ubifs_findfile(ubifs_sb, (char *)filename); - if (!inum) { - err = -1; - goto out; - } - - inode = ubifs_iget(ubifs_sb, inum); - if (IS_ERR(inode)) { - printf("%s: Error reading inode %ld!\n", __func__, inum); - err = PTR_ERR(inode); - goto out; - } - - *size = inode->i_size; - - ubifs_iput(inode); -out: - ubi_close_volume(c->ubi); - return err; -} -#endif - /* * ubifsload... */ @@ -718,241 +478,6 @@ dump: return -EINVAL; } -#ifndef __BAREBOX__ -static int do_readpage(struct ubifs_info *c, struct inode *inode, - struct page *page, int last_block_size) -{ - void *addr; - int err = 0, i; - unsigned int block, beyond; - struct ubifs_data_node *dn; - loff_t i_size = inode->i_size; - - dbg_gen("ino %lu, pg %lu, i_size %lld", - inode->i_ino, page->index, i_size); - - addr = kmap(page); - - block = page->index << UBIFS_BLOCKS_PER_PAGE_SHIFT; - beyond = (i_size + UBIFS_BLOCK_SIZE - 1) >> UBIFS_BLOCK_SHIFT; - if (block >= beyond) { - /* Reading beyond inode */ - memset(addr, 0, PAGE_CACHE_SIZE); - goto out; - } - - dn = kmalloc(UBIFS_MAX_DATA_NODE_SZ, GFP_NOFS); - if (!dn) - return -ENOMEM; - - i = 0; - while (1) { - int ret; - - if (block >= beyond) { - /* Reading beyond inode */ - err = -ENOENT; - memset(addr, 0, UBIFS_BLOCK_SIZE); - } else { - /* - * Reading last block? Make sure to not write beyond - * the requested size in the destination buffer. - */ - if (((block + 1) == beyond) || last_block_size) { - void *buff; - int dlen; - - /* - * We need to buffer the data locally for the - * last block. This is to not pad the - * destination area to a multiple of - * UBIFS_BLOCK_SIZE. - */ - buff = kzalloc(UBIFS_BLOCK_SIZE, 0); - if (!buff) { - printf("%s: Error, malloc fails!\n", - __func__); - err = -ENOMEM; - break; - } - - /* Read block-size into temp buffer */ - ret = read_block(inode, buff, block, dn); - if (ret) { - err = ret; - if (err != -ENOENT) { - free(buff); - break; - } - } - - if (last_block_size) - dlen = last_block_size; - else - dlen = le32_to_cpu(dn->size); - - /* Now copy required size back to dest */ - memcpy(addr, buff, dlen); - - free(buff); - } else { - ret = read_block(inode, addr, block, dn); - if (ret) { - err = ret; - if (err != -ENOENT) - break; - } - } - } - if (++i >= UBIFS_BLOCKS_PER_PAGE) - break; - block += 1; - addr += UBIFS_BLOCK_SIZE; - } - if (err) { - if (err == -ENOENT) { - /* Not found, so it must be a hole */ - dbg_gen("hole"); - goto out_free; - } - ubifs_err(c, "cannot read page %lu of inode %lu, error %d", - page->index, inode->i_ino, err); - goto error; - } - -out_free: - kfree(dn); -out: - return 0; - -error: - kfree(dn); - return err; -} - -int ubifs_read(const char *filename, void *buf, loff_t offset, - loff_t size, loff_t *actread) -{ - struct ubifs_info *c = ubifs_sb->s_fs_info; - unsigned long inum; - struct inode *inode; - struct page page; - int err = 0; - int i; - int count; - int last_block_size = 0; - - *actread = 0; - - if (offset & (PAGE_SIZE - 1)) { - printf("ubifs: Error offset must be a multple of %d\n", - PAGE_SIZE); - return -1; - } - - c->ubi = ubi_open_volume(c->vi.ubi_num, c->vi.vol_id, UBI_READONLY); - /* ubifs_findfile will resolve symlinks, so we know that we get - * the real file here */ - inum = ubifs_findfile(ubifs_sb, (char *)filename); - if (!inum) { - err = -1; - goto out; - } - - /* - * Read file inode - */ - inode = ubifs_iget(ubifs_sb, inum); - if (IS_ERR(inode)) { - printf("%s: Error reading inode %ld!\n", __func__, inum); - err = PTR_ERR(inode); - goto out; - } - - if (offset > inode->i_size) { - printf("ubifs: Error offset (%lld) > file-size (%lld)\n", - offset, size); - err = -1; - goto put_inode; - } - - /* - * If no size was specified or if size bigger than filesize - * set size to filesize - */ - if ((size == 0) || (size > (inode->i_size - offset))) - size = inode->i_size - offset; - - count = (size + UBIFS_BLOCK_SIZE - 1) >> UBIFS_BLOCK_SHIFT; - - page.addr = buf; - page.index = offset / PAGE_SIZE; - page.inode = inode; - for (i = 0; i < count; i++) { - /* - * Make sure to not read beyond the requested size - */ - if (((i + 1) == count) && (size < inode->i_size)) - last_block_size = size - (i * PAGE_SIZE); - - err = do_readpage(c, inode, &page, last_block_size); - if (err) - break; - - page.addr += PAGE_SIZE; - page.index++; - } - - if (err) { - printf("Error reading file '%s'\n", filename); - *actread = i * PAGE_SIZE; - } else { - *actread = size; - } - -put_inode: - ubifs_iput(inode); - -out: - ubi_close_volume(c->ubi); - return err; -} - -void ubifs_close(void) -{ -} - -/* Compat wrappers for common/cmd_ubifs.c */ -int ubifs_load(char *filename, u32 addr, u32 size) -{ - loff_t actread; - int err; - - printf("Loading file '%s' to addr 0x%08x...\n", filename, addr); - - err = ubifs_read(filename, (void *)addr, 0, size, &actread); - if (err == 0) { - setenv_hex("filesize", actread); - printf("Done\n"); - } - - return err; -} -#endif - -void uboot_ubifs_umount(void) -{ - if (ubifs_sb) { - printf("Unmounting UBIFS volume %s!\n", - ((struct ubifs_info *)(ubifs_sb->s_fs_info))->vi.name); - ubifs_umount(ubifs_sb->s_fs_info); - ubifs_sb = NULL; - } -} - - - - struct ubifs_file { struct inode *inode; void *buf; diff --git a/fs/ubifs/ubifs.h b/fs/ubifs/ubifs.h index 5c5a82637e..22b24a1161 100644 --- a/fs/ubifs/ubifs.h +++ b/fs/ubifs/ubifs.h @@ -42,6 +42,7 @@ #include <linux/math64.h> #include <linux/rbtree.h> #include <linux/mtd/ubi.h> +#include <linux/pagemap.h> #include <asm/atomic.h> #include <asm-generic/atomic-long.h> #include "ubifs-media.h" @@ -96,550 +97,11 @@ void *kmemdup(const void *src, size_t len, gfp_t gfp); /* uapi/linux/limits.h */ #define XATTR_LIST_MAX 65536 /* size of extended attribute namelist (64k) */ -#ifndef __BAREBOX__ -/* linux/include/time.h */ -#define NSEC_PER_SEC 1000000000L -#define get_seconds() 0 -#define CURRENT_TIME_SEC ((struct timespec) { get_seconds(), 0 }) - -struct timespec { - time_t tv_sec; /* seconds */ - long tv_nsec; /* nanoseconds */ -}; - -static struct timespec current_fs_time(struct super_block *sb) -{ - struct timespec now; - now.tv_sec = 0; - now.tv_nsec = 0; - return now; -}; - -/* linux/include/dcache.h */ - -/* - * "quick string" -- eases parameter passing, but more importantly - * saves "metadata" about the string (ie length and the hash). - * - * hash comes first so it snuggles against d_parent in the - * dentry. - */ -struct qstr { - unsigned int hash; - unsigned int len; -#ifndef __BAREBOX__ - const char *name; -#else - char *name; -#endif -}; - -/* include/linux/fs.h */ - -/* Possible states of 'frozen' field */ -enum { - SB_UNFROZEN = 0, /* FS is unfrozen */ - SB_FREEZE_WRITE = 1, /* Writes, dir ops, ioctls frozen */ - SB_FREEZE_PAGEFAULT = 2, /* Page faults stopped as well */ - SB_FREEZE_FS = 3, /* For internal FS use (e.g. to stop - * internal threads if needed) */ - SB_FREEZE_COMPLETE = 4, /* ->freeze_fs finished successfully */ -}; - -#define SB_FREEZE_LEVELS (SB_FREEZE_COMPLETE - 1) - -struct sb_writers { -#ifndef __BAREBOX__ - /* Counters for counting writers at each level */ - struct percpu_counter counter[SB_FREEZE_LEVELS]; -#endif - wait_queue_head_t wait; /* queue for waiting for - writers / faults to finish */ - int frozen; /* Is sb frozen? */ - wait_queue_head_t wait_unfrozen; /* queue for waiting for - sb to be thawed */ -#ifdef CONFIG_DEBUG_LOCK_ALLOC - struct lockdep_map lock_map[SB_FREEZE_LEVELS]; -#endif -}; - -struct address_space { - struct inode *host; /* owner: inode, block_device */ -#ifndef __BAREBOX__ - struct radix_tree_root page_tree; /* radix tree of all pages */ -#endif - spinlock_t tree_lock; /* and lock protecting it */ - unsigned int i_mmap_writable;/* count VM_SHARED mappings */ - struct rb_root i_mmap; /* tree of private and shared mappings */ - struct list_head i_mmap_nonlinear;/*list VM_NONLINEAR mappings */ - struct mutex i_mmap_mutex; /* protect tree, count, list */ - /* Protected by tree_lock together with the radix tree */ - unsigned long nrpages; /* number of total pages */ - pgoff_t writeback_index;/* writeback starts here */ - const struct address_space_operations *a_ops; /* methods */ - unsigned long flags; /* error bits/gfp mask */ -#ifndef __BAREBOX__ - struct backing_dev_info *backing_dev_info; /* device readahead, etc */ -#endif - spinlock_t private_lock; /* for use by the address_space */ - struct list_head private_list; /* ditto */ - void *private_data; /* ditto */ -} __attribute__((aligned(sizeof(long)))); - -/* - * Keep mostly read-only and often accessed (especially for - * the RCU path lookup and 'stat' data) fields at the beginning - * of the 'struct inode' - */ -struct inode { - umode_t i_mode; - unsigned short i_opflags; - kuid_t i_uid; - kgid_t i_gid; - unsigned int i_flags; - -#ifdef CONFIG_FS_POSIX_ACL - struct posix_acl *i_acl; - struct posix_acl *i_default_acl; -#endif - - const struct inode_operations *i_op; - struct super_block *i_sb; - struct address_space *i_mapping; - -#ifdef CONFIG_SECURITY - void *i_security; -#endif - - /* Stat data, not accessed from path walking */ - unsigned long i_ino; - /* - * Filesystems may only read i_nlink directly. They shall use the - * following functions for modification: - * - * (set|clear|inc|drop)_nlink - * inode_(inc|dec)_link_count - */ - union { - const unsigned int i_nlink; - unsigned int __i_nlink; - }; - dev_t i_rdev; - loff_t i_size; - struct timespec i_atime; - struct timespec i_mtime; - struct timespec i_ctime; - spinlock_t i_lock; /* i_blocks, i_bytes, maybe i_size */ - unsigned short i_bytes; - unsigned int i_blkbits; - blkcnt_t i_blocks; - -#ifdef __NEED_I_SIZE_ORDERED - seqcount_t i_size_seqcount; -#endif - - /* Misc */ - unsigned long i_state; - struct mutex i_mutex; - - unsigned long dirtied_when; /* jiffies of first dirtying */ - - struct hlist_node i_hash; - struct list_head i_wb_list; /* backing dev IO list */ - struct list_head i_lru; /* inode LRU list */ - struct list_head i_sb_list; - union { - struct hlist_head i_dentry; - struct rcu_head i_rcu; - }; - u64 i_version; - atomic_t i_count; - atomic_t i_dio_count; - atomic_t i_writecount; - const struct file_operations *i_fop; /* former ->i_op->default_file_ops */ - struct file_lock *i_flock; - struct address_space i_data; -#ifdef CONFIG_QUOTA - struct dquot *i_dquot[MAXQUOTAS]; -#endif - struct list_head i_devices; - union { - struct pipe_inode_info *i_pipe; - struct block_device *i_bdev; - struct cdev *i_cdev; - }; - - __u32 i_generation; - -#ifdef CONFIG_FSNOTIFY - __u32 i_fsnotify_mask; /* all events this inode cares about */ - struct hlist_head i_fsnotify_marks; -#endif - -#ifdef CONFIG_IMA - atomic_t i_readcount; /* struct files open RO */ -#endif - void *i_private; /* fs or device private pointer */ -}; -#endif - -struct super_operations { - struct inode *(*alloc_inode)(struct super_block *sb); - void (*destroy_inode)(struct inode *); - - void (*dirty_inode) (struct inode *, int flags); -#ifndef __BAREBOX__ - int (*write_inode) (struct inode *, struct writeback_control *wbc); -#endif - int (*drop_inode) (struct inode *); - void (*evict_inode) (struct inode *); - void (*put_super) (struct super_block *); - int (*sync_fs)(struct super_block *sb, int wait); - int (*freeze_fs) (struct super_block *); - int (*unfreeze_fs) (struct super_block *); -#ifndef __BAREBOX__ - int (*statfs) (struct dentry *, struct kstatfs *); -#endif - int (*remount_fs) (struct super_block *, int *, char *); - void (*umount_begin) (struct super_block *); - -#ifndef __BAREBOX__ - int (*show_options)(struct seq_file *, struct dentry *); - int (*show_devname)(struct seq_file *, struct dentry *); - int (*show_path)(struct seq_file *, struct dentry *); - int (*show_stats)(struct seq_file *, struct dentry *); -#endif -#ifdef CONFIG_QUOTA - ssize_t (*quota_read)(struct super_block *, int, char *, size_t, loff_t); - ssize_t (*quota_write)(struct super_block *, int, const char *, size_t, loff_t); -#endif - int (*bdev_try_to_free_page)(struct super_block*, struct page*, gfp_t); - long (*nr_cached_objects)(struct super_block *, int); - long (*free_cached_objects)(struct super_block *, long, int); -}; - -#ifndef __BAREBOX__ -struct super_block { - struct list_head s_list; /* Keep this first */ - dev_t s_dev; /* search index; _not_ kdev_t */ - unsigned char s_blocksize_bits; - unsigned long s_blocksize; - loff_t s_maxbytes; /* Max file size */ - struct file_system_type *s_type; - const struct super_operations *s_op; - const struct dquot_operations *dq_op; - const struct quotactl_ops *s_qcop; - const struct export_operations *s_export_op; - unsigned long s_flags; - unsigned long s_magic; - struct dentry *s_root; - struct rw_semaphore s_umount; - int s_count; - atomic_t s_active; -#ifdef CONFIG_SECURITY - void *s_security; -#endif - const struct xattr_handler **s_xattr; - - struct list_head s_inodes; /* all inodes */ -#ifndef __BAREBOX__ - struct hlist_bl_head s_anon; /* anonymous dentries for (nfs) exporting */ -#endif - struct list_head s_mounts; /* list of mounts; _not_ for fs use */ - struct block_device *s_bdev; -#ifndef __BAREBOX__ - struct backing_dev_info *s_bdi; -#endif - struct mtd_info *s_mtd; - struct hlist_node s_instances; -#ifndef __BAREBOX__ - struct quota_info s_dquot; /* Diskquota specific options */ -#endif - - struct sb_writers s_writers; - - char s_id[32]; /* Informational name */ - u8 s_uuid[16]; /* UUID */ - - void *s_fs_info; /* Filesystem private info */ - unsigned int s_max_links; -#ifndef __BAREBOX__ - fmode_t s_mode; -#endif - - /* Granularity of c/m/atime in ns. - Cannot be worse than a second */ - u32 s_time_gran; - - /* - * The next field is for VFS *only*. No filesystems have any business - * even looking at it. You had been warned. - */ - struct mutex s_vfs_rename_mutex; /* Kludge */ - - /* - * Filesystem subtype. If non-empty the filesystem type field - * in /proc/mounts will be "type.subtype" - */ - char *s_subtype; - -#ifndef __BAREBOX__ - /* - * Saved mount options for lazy filesystems using - * generic_show_options() - */ - char __rcu *s_options; -#endif - const struct dentry_operations *s_d_op; /* default d_op for dentries */ - - /* - * Saved pool identifier for cleancache (-1 means none) - */ - int cleancache_poolid; - -#ifndef __BAREBOX__ - struct shrinker s_shrink; /* per-sb shrinker handle */ -#endif - - /* Number of inodes with nlink == 0 but still referenced */ - atomic_long_t s_remove_count; - - /* Being remounted read-only */ - int s_readonly_remount; - - /* AIO completions deferred from interrupt context */ - struct workqueue_struct *s_dio_done_wq; - -#ifndef __BAREBOX__ - /* - * Keep the lru lists last in the structure so they always sit on their - * own individual cachelines. - */ - struct list_lru s_dentry_lru ____cacheline_aligned_in_smp; - struct list_lru s_inode_lru ____cacheline_aligned_in_smp; -#endif - struct rcu_head rcu; -}; - -struct file_system_type { - const char *name; - int fs_flags; -#define FS_REQUIRES_DEV 1 -#define FS_BINARY_MOUNTDATA 2 -#define FS_HAS_SUBTYPE 4 -#define FS_USERNS_MOUNT 8 /* Can be mounted by userns root */ -#define FS_USERNS_DEV_MOUNT 16 /* A userns mount does not imply MNT_NODEV */ -#define FS_RENAME_DOES_D_MOVE 32768 /* FS will handle d_move() during rename() internally. */ - struct dentry *(*mount) (struct file_system_type *, int, - const char *, void *); - void (*kill_sb) (struct super_block *); - struct module *owner; - struct file_system_type * next; - struct hlist_head fs_supers; - -#ifndef __BAREBOX__ - struct lock_class_key s_lock_key; - struct lock_class_key s_umount_key; - struct lock_class_key s_vfs_rename_key; - struct lock_class_key s_writers_key[SB_FREEZE_LEVELS]; - - struct lock_class_key i_lock_key; - struct lock_class_key i_mutex_key; - struct lock_class_key i_mutex_dir_key; -#endif -}; - -/* include/linux/mount.h */ -struct vfsmount { - struct dentry *mnt_root; /* root of the mounted tree */ - struct super_block *mnt_sb; /* pointer to superblock */ - int mnt_flags; -}; - -struct path { - struct vfsmount *mnt; - struct dentry *dentry; -}; - -struct file { - struct path f_path; -#define f_dentry f_path.dentry -#define f_vfsmnt f_path.mnt - const struct file_operations *f_op; - unsigned int f_flags; - loff_t f_pos; - unsigned int f_uid, f_gid; - - u64 f_version; -#ifdef CONFIG_SECURITY - void *f_security; -#endif - /* needed for tty driver, and maybe others */ - void *private_data; - -#ifdef CONFIG_EPOLL - /* Used by fs/eventpoll.c to link all the hooks to this file */ - struct list_head f_ep_links; - spinlock_t f_ep_lock; -#endif /* #ifdef CONFIG_EPOLL */ -#ifdef CONFIG_DEBUG_WRITECOUNT - unsigned long f_mnt_write_state; -#endif -}; -#endif - /* * get_seconds() not really needed in the read-only implmentation */ #define get_seconds() 0 -/* 4k page size */ -#define PAGE_CACHE_SHIFT 12 -#define PAGE_CACHE_SIZE (1 << PAGE_CACHE_SHIFT) - -#ifndef __BAREBOX__ -/* Page cache limit. The filesystems should put that into their s_maxbytes - limits, otherwise bad things can happen in VM. */ -#if BITS_PER_LONG==32 -#define MAX_LFS_FILESIZE (((u64)PAGE_CACHE_SIZE << (BITS_PER_LONG-1))-1) -#elif BITS_PER_LONG==64 -#define MAX_LFS_FILESIZE 0x7fffffffffffffffUL -#endif - -/* - * These are the fs-independent mount-flags: up to 32 flags are supported - */ -#define MS_RDONLY 1 /* Mount read-only */ -#define MS_NOSUID 2 /* Ignore suid and sgid bits */ -#define MS_NODEV 4 /* Disallow access to device special files */ -#define MS_NOEXEC 8 /* Disallow program execution */ -#define MS_SYNCHRONOUS 16 /* Writes are synced at once */ -#define MS_REMOUNT 32 /* Alter flags of a mounted FS */ -#define MS_MANDLOCK 64 /* Allow mandatory locks on an FS */ -#define MS_DIRSYNC 128 /* Directory modifications are synchronous */ -#define MS_NOATIME 1024 /* Do not update access times. */ -#define MS_NODIRATIME 2048 /* Do not update directory access times */ -#define MS_BIND 4096 -#define MS_MOVE 8192 -#define MS_REC 16384 -#define MS_VERBOSE 32768 /* War is peace. Verbosity is silence. - MS_VERBOSE is deprecated. */ -#define MS_SILENT 32768 -#define MS_POSIXACL (1<<16) /* VFS does not apply the umask */ -#define MS_UNBINDABLE (1<<17) /* change to unbindable */ -#define MS_PRIVATE (1<<18) /* change to private */ -#define MS_SLAVE (1<<19) /* change to slave */ -#define MS_SHARED (1<<20) /* change to shared */ -#define MS_RELATIME (1<<21) /* Update atime relative to mtime/ctime. */ -#define MS_KERNMOUNT (1<<22) /* this is a kern_mount call */ -#define MS_I_VERSION (1<<23) /* Update inode I_version field */ -#define MS_ACTIVE (1<<30) -#define MS_NOUSER (1<<31) - -#define I_NEW 8 - -/* Inode flags - they have nothing to superblock flags now */ - -#define S_SYNC 1 /* Writes are synced at once */ -#define S_NOATIME 2 /* Do not update access times */ -#define S_APPEND 4 /* Append-only file */ -#define S_IMMUTABLE 8 /* Immutable file */ -#define S_DEAD 16 /* removed, but still open directory */ -#define S_NOQUOTA 32 /* Inode is not counted to quota */ -#define S_DIRSYNC 64 /* Directory modifications are synchronous */ -#define S_NOCMTIME 128 /* Do not update file c/mtime */ -#define S_SWAPFILE 256 /* Do not truncate: swapon got its bmaps */ -#define S_PRIVATE 512 /* Inode is fs-internal */ - -/* include/linux/stat.h */ - -#define S_IFMT 00170000 -#define S_IFSOCK 0140000 -#define S_IFLNK 0120000 -#define S_IFREG 0100000 -#define S_IFBLK 0060000 -#define S_IFDIR 0040000 -#define S_IFCHR 0020000 -#define S_IFIFO 0010000 -#define S_ISUID 0004000 -#define S_ISGID 0002000 -#define S_ISVTX 0001000 - -/* include/linux/fs.h */ - -/* - * File types - * - * NOTE! These match bits 12..15 of stat.st_mode - * (ie "(i_mode >> 12) & 15"). - */ -#define DT_UNKNOWN 0 -#define DT_FIFO 1 -#define DT_CHR 2 -#define DT_DIR 4 -#define DT_BLK 6 -#define DT_REG 8 -#define DT_LNK 10 -#define DT_SOCK 12 -#define DT_WHT 14 - -#define I_DIRTY_SYNC 1 -#define I_DIRTY_DATASYNC 2 -#define I_DIRTY_PAGES 4 -#define I_NEW 8 -#define I_WILL_FREE 16 -#define I_FREEING 32 -#define I_CLEAR 64 -#define __I_LOCK 7 -#define I_LOCK (1 << __I_LOCK) -#define __I_SYNC 8 -#define I_SYNC (1 << __I_SYNC) - -#define I_DIRTY (I_DIRTY_SYNC | I_DIRTY_DATASYNC | I_DIRTY_PAGES) - -/* linux/include/dcache.h */ - -#define DNAME_INLINE_LEN_MIN 36 - -struct dentry { - unsigned int d_flags; /* protected by d_lock */ - spinlock_t d_lock; /* per dentry lock */ - struct inode *d_inode; /* Where the name belongs to - NULL is - * negative */ - /* - * The next three fields are touched by __d_lookup. Place them here - * so they all fit in a cache line. - */ - struct hlist_node d_hash; /* lookup hash list */ - struct dentry *d_parent; /* parent directory */ - struct qstr d_name; - - struct list_head d_lru; /* LRU list */ - /* - * d_child and d_rcu can share memory - */ - struct list_head d_subdirs; /* our children */ - struct list_head d_alias; /* inode alias list */ - unsigned long d_time; /* used by d_revalidate */ - struct super_block *d_sb; /* The root of the dentry tree */ - void *d_fsdata; /* fs-specific data */ -#ifdef CONFIG_PROFILING - struct dcookie_struct *d_cookie; /* cookie, if any */ -#endif - int d_mounted; - unsigned char d_iname[DNAME_INLINE_LEN_MIN]; /* small names */ -}; -#endif -static inline ino_t parent_ino(struct dentry *dentry) -{ - ino_t res; - - spin_lock(&dentry->d_lock); - res = dentry->d_parent->d_inode->i_ino; - spin_unlock(&dentry->d_lock); - return res; -} - /* debug.c */ #define module_param_named(...) diff --git a/images/Makefile.imx b/images/Makefile.imx index 5e0043f1f0..ac46d51c59 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -139,6 +139,21 @@ CFG_start_imx53_mba53_1gib.pblx.imximg = $(board)/tqma53/flash-header-tq-tqma53- FILE_barebox-tq-mba53-1gib.img = start_imx53_mba53_1gib.pblx.imximg image-$(CONFIG_MACH_TQMA53) += barebox-tq-mba53-1gib.img +pblx-$(CONFIG_MACH_TX53) += start_imx53_imx53_tx53_xx30_samsung +CFG_start_imx53_tx53_xx30_samsung.pblx.imximg = $(board)/karo-tx53/flash-header-tx53-revxx30-samsung.imxcfg +FILE_barebox-tx53-xx30-samsung.img = start_imx53_tx53_xx30_samsung.pblx.imximg +image-$(CONFIG_MACH_TX53) += barebox-tx53-xx30-samsung.img + +pblx-$(CONFIG_MACH_TX53) += start_imx53_imx53_tx53_xx30 +CFG_start_imx53_tx53_xx30.pblx.imximg = $(board)/karo-tx53/flash-header-tx53-revxx30.imxcfg +FILE_barebox-tx53-xx30.img = start_imx53_tx53_xx30.pblx.imximg +image-$(CONFIG_MACH_TX53) += barebox-tx53-xx30.img + +pblx-$(CONFIG_MACH_TX53) += start_imx53_imx53_tx53_1011 +CFG_start_imx53_tx53_1011.pblx.imximg = $(board)/karo-tx53/flash-header-tx53-rev1011.imxcfg +FILE_barebox-tx53-1011.img = start_imx53_tx53_1011.pblx.imximg +image-$(CONFIG_MACH_TX53) += barebox-tx53-1011.img + # ----------------------- i.MX6 based boards --------------------------- pblx-$(CONFIG_MACH_REALQ7) += start_imx6_realq7 CFG_start_imx6_realq7.pblx.imximg = $(board)/datamodul-edm-qmx6/flash-header.imxcfg @@ -455,6 +470,16 @@ CFG_start_phytec_phycore_imx6ull_som_256mb.pblx.imximg = $(board)/phytec-som-imx FILE_barebox-phytec-phycore-imx6ull-256mb.img = start_phytec_phycore_imx6ull_som_256mb.pblx.imximg image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6ull-256mb.img +pblx-$(CONFIG_MACH_KONTRON_SAMX6I) += start_imx6q_samx6i +CFG_start_imx6q_samx6i.pblx.imximg = $(board)/kontron-samx6i/flash-header-samx6i-quad.imxcfg +FILE_barebox-imx6q-samx6i.img = start_imx6q_samx6i.pblx.imximg +image-$(CONFIG_MACH_KONTRON_SAMX6I) += barebox-imx6q-samx6i.img + +pblx-$(CONFIG_MACH_KONTRON_SAMX6I) += start_imx6dl_samx6i +CFG_start_imx6dl_samx6i.pblx.imximg = $(board)/kontron-samx6i/flash-header-samx6i-duallite.imxcfg +FILE_barebox-imx6dl-samx6i.img = start_imx6dl_samx6i.pblx.imximg +image-$(CONFIG_MACH_KONTRON_SAMX6I) += barebox-imx6dl-samx6i.img + pblx-$(CONFIG_MACH_GW_VENTANA) += start_imx6q_gw54xx_1gx64 CFG_start_imx6q_gw54xx_1gx64.pblx.imximg = $(board)/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg FILE_barebox-gateworks-imx6q-ventana-1gx64.img = start_imx6q_gw54xx_1gx64.pblx.imximg diff --git a/include/bootm.h b/include/bootm.h index 35c18dc276..62951d6058 100644 --- a/include/bootm.h +++ b/include/bootm.h @@ -81,6 +81,13 @@ struct image_data { struct fdt_header *oftree; struct resource *oftree_res; + /* + * The first PAGE_SIZE bytes of the OS image. Can be used by the image + * handlers to analyze the OS image before actually loading the bulk of + * it. + */ + void *os_header; + enum bootm_verify verify; int verbose; int force; diff --git a/include/console.h b/include/console.h index a8b2663a4c..3c14e35935 100644 --- a/include/console.h +++ b/include/console.h @@ -63,7 +63,7 @@ struct console_device { const char *linux_console_name; struct cdev devfs; - struct file_operations fops; + struct cdev_operations fops; }; int console_register(struct console_device *cdev); diff --git a/include/debug_ll.h b/include/debug_ll.h index b0eb7cd7d9..5047516399 100644 --- a/include/debug_ll.h +++ b/include/debug_ll.h @@ -42,7 +42,7 @@ static inline void puthex_ll(unsigned long value) { int i; unsigned char ch; - for (i = 8; i--; ) { + for (i = sizeof(unsigned long) * 2; i--; ) { ch = ((value >> (i * 4)) & 0xf); ch += (ch >= 10) ? 'a' - 10 : '0'; putc_ll(ch); diff --git a/include/dma.h b/include/dma.h index 4d31797968..5fdcb1733c 100644 --- a/include/dma.h +++ b/include/dma.h @@ -30,11 +30,23 @@ static inline void dma_free(void *mem) } #endif +dma_addr_t dma_map_single(struct device_d *dev, void *ptr, size_t size, + enum dma_data_direction dir); +void dma_unmap_single(struct device_d *dev, dma_addr_t addr, size_t size, + enum dma_data_direction dir); + +#define DMA_ERROR_CODE (~(dma_addr_t)0) + +static inline int dma_mapping_error(struct device_d *dev, dma_addr_t dma_addr) +{ + return dma_addr == DMA_ERROR_CODE; +} + /* streaming DMA - implement the below calls to support HAS_DMA */ -void dma_sync_single_for_cpu(unsigned long address, size_t size, +void dma_sync_single_for_cpu(dma_addr_t address, size_t size, enum dma_data_direction dir); -void dma_sync_single_for_device(unsigned long address, size_t size, +void dma_sync_single_for_device(dma_addr_t address, size_t size, enum dma_data_direction dir); void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle); diff --git a/include/driver.h b/include/driver.h index f37805db17..91653b7946 100644 --- a/include/driver.h +++ b/include/driver.h @@ -420,7 +420,7 @@ int platform_driver_register(struct driver_d *drv); int platform_device_register(struct device_d *new_device); -struct file_operations { +struct cdev_operations { /*! Called in response of reading from this device. Required */ ssize_t (*read)(struct cdev*, void* buf, size_t count, loff_t offset, ulong flags); @@ -441,7 +441,7 @@ struct file_operations { #define MAX_PARTUUID_STR sizeof("00112233-4455-6677-8899-AABBCCDDEEFF") struct cdev { - const struct file_operations *ops; + const struct cdev_operations *ops; void *priv; struct device_d *dev; struct device_node *device_node; diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h deleted file mode 100644 index e40fae8f9a..0000000000 --- a/include/dt-bindings/clock/tegra30-car.h +++ /dev/null @@ -1,265 +0,0 @@ -/* - * This header provides constants for binding nvidia,tegra30-car. - * - * The first 130 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB - * registers. These IDs often match those in the CAR's RST_DEVICES registers, - * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In - * this case, those clocks are assigned IDs above 160 in order to highlight - * this issue. Implementations that interpret these clock IDs as bit values - * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to - * explicitly handle these special cases. - * - * The balance of the clocks controlled by the CAR are assigned IDs of 160 and - * above. - */ - -#ifndef _DT_BINDINGS_CLOCK_TEGRA30_CAR_H -#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H - -#define TEGRA30_CLK_CPU 0 -/* 1 */ -/* 2 */ -/* 3 */ -#define TEGRA30_CLK_RTC 4 -#define TEGRA30_CLK_TIMER 5 -#define TEGRA30_CLK_UARTA 6 -/* 7 (register bit affects uartb and vfir) */ -#define TEGRA30_CLK_GPIO 8 -#define TEGRA30_CLK_SDMMC2 9 -/* 10 (register bit affects spdif_in and spdif_out) */ -#define TEGRA30_CLK_I2S1 11 -#define TEGRA30_CLK_I2C1 12 -#define TEGRA30_CLK_NDFLASH 13 -#define TEGRA30_CLK_SDMMC1 14 -#define TEGRA30_CLK_SDMMC4 15 -/* 16 */ -#define TEGRA30_CLK_PWM 17 -#define TEGRA30_CLK_I2S2 18 -#define TEGRA30_CLK_EPP 19 -/* 20 (register bit affects vi and vi_sensor) */ -#define TEGRA30_CLK_GR2D 21 -#define TEGRA30_CLK_USBD 22 -#define TEGRA30_CLK_ISP 23 -#define TEGRA30_CLK_GR3D 24 -/* 25 */ -#define TEGRA30_CLK_DISP2 26 -#define TEGRA30_CLK_DISP1 27 -#define TEGRA30_CLK_HOST1X 28 -#define TEGRA30_CLK_VCP 29 -#define TEGRA30_CLK_I2S0 30 -#define TEGRA30_CLK_COP_CACHE 31 - -#define TEGRA30_CLK_MC 32 -#define TEGRA30_CLK_AHBDMA 33 -#define TEGRA30_CLK_APBDMA 34 -/* 35 */ -#define TEGRA30_CLK_KBC 36 -#define TEGRA30_CLK_STATMON 37 -#define TEGRA30_CLK_PMC 38 -/* 39 (register bit affects fuse and fuse_burn) */ -#define TEGRA30_CLK_KFUSE 40 -#define TEGRA30_CLK_SBC1 41 -#define TEGRA30_CLK_NOR 42 -/* 43 */ -#define TEGRA30_CLK_SBC2 44 -/* 45 */ -#define TEGRA30_CLK_SBC3 46 -#define TEGRA30_CLK_I2C5 47 -#define TEGRA30_CLK_DSIA 48 -/* 49 (register bit affects cve and tvo) */ -#define TEGRA30_CLK_MIPI 50 -#define TEGRA30_CLK_HDMI 51 -#define TEGRA30_CLK_CSI 52 -#define TEGRA30_CLK_TVDAC 53 -#define TEGRA30_CLK_I2C2 54 -#define TEGRA30_CLK_UARTC 55 -/* 56 */ -#define TEGRA30_CLK_EMC 57 -#define TEGRA30_CLK_USB2 58 -#define TEGRA30_CLK_USB3 59 -#define TEGRA30_CLK_MPE 60 -#define TEGRA30_CLK_VDE 61 -#define TEGRA30_CLK_BSEA 62 -#define TEGRA30_CLK_BSEV 63 - -#define TEGRA30_CLK_SPEEDO 64 -#define TEGRA30_CLK_UARTD 65 -#define TEGRA30_CLK_UARTE 66 -#define TEGRA30_CLK_I2C3 67 -#define TEGRA30_CLK_SBC4 68 -#define TEGRA30_CLK_SDMMC3 69 -#define TEGRA30_CLK_PCIE 70 -#define TEGRA30_CLK_OWR 71 -#define TEGRA30_CLK_AFI 72 -#define TEGRA30_CLK_CSITE 73 -#define TEGRA30_CLK_PCIEX 74 -#define TEGRA30_CLK_AVPUCQ 75 -#define TEGRA30_CLK_LA 76 -/* 77 */ -/* 78 */ -#define TEGRA30_CLK_DTV 79 -#define TEGRA30_CLK_NDSPEED 80 -#define TEGRA30_CLK_I2CSLOW 81 -#define TEGRA30_CLK_DSIB 82 -/* 83 */ -#define TEGRA30_CLK_IRAMA 84 -#define TEGRA30_CLK_IRAMB 85 -#define TEGRA30_CLK_IRAMC 86 -#define TEGRA30_CLK_IRAMD 87 -#define TEGRA30_CLK_CRAM2 88 -/* 89 */ -#define TEGRA30_CLK_AUDIO_2X 90 /* a/k/a audio_2x_sync_clk */ -/* 91 */ -#define TEGRA30_CLK_CSUS 92 -#define TEGRA30_CLK_CDEV2 93 -#define TEGRA30_CLK_CDEV1 94 -/* 95 */ - -#define TEGRA30_CLK_CPU_G 96 -#define TEGRA30_CLK_CPU_LP 97 -#define TEGRA30_CLK_GR3D2 98 -#define TEGRA30_CLK_MSELECT 99 -#define TEGRA30_CLK_TSENSOR 100 -#define TEGRA30_CLK_I2S3 101 -#define TEGRA30_CLK_I2S4 102 -#define TEGRA30_CLK_I2C4 103 -#define TEGRA30_CLK_SBC5 104 -#define TEGRA30_CLK_SBC6 105 -#define TEGRA30_CLK_D_AUDIO 106 -#define TEGRA30_CLK_APBIF 107 -#define TEGRA30_CLK_DAM0 108 -#define TEGRA30_CLK_DAM1 109 -#define TEGRA30_CLK_DAM2 110 -#define TEGRA30_CLK_HDA2CODEC_2X 111 -#define TEGRA30_CLK_ATOMICS 112 -#define TEGRA30_CLK_AUDIO0_2X 113 -#define TEGRA30_CLK_AUDIO1_2X 114 -#define TEGRA30_CLK_AUDIO2_2X 115 -#define TEGRA30_CLK_AUDIO3_2X 116 -#define TEGRA30_CLK_AUDIO4_2X 117 -#define TEGRA30_CLK_SPDIF_2X 118 -#define TEGRA30_CLK_ACTMON 119 -#define TEGRA30_CLK_EXTERN1 120 -#define TEGRA30_CLK_EXTERN2 121 -#define TEGRA30_CLK_EXTERN3 122 -#define TEGRA30_CLK_SATA_OOB 123 -#define TEGRA30_CLK_SATA 124 -#define TEGRA30_CLK_HDA 125 -/* 126 */ -#define TEGRA30_CLK_SE 127 - -#define TEGRA30_CLK_HDA2HDMI 128 -#define TEGRA30_CLK_SATA_COLD 129 -/* 130 */ -/* 131 */ -/* 132 */ -/* 133 */ -/* 134 */ -/* 135 */ -/* 136 */ -/* 137 */ -/* 138 */ -/* 139 */ -/* 140 */ -/* 141 */ -/* 142 */ -/* 143 */ -/* 144 */ -/* 145 */ -/* 146 */ -/* 147 */ -/* 148 */ -/* 149 */ -/* 150 */ -/* 151 */ -/* 152 */ -/* 153 */ -/* 154 */ -/* 155 */ -/* 156 */ -/* 157 */ -/* 158 */ -/* 159 */ - -#define TEGRA30_CLK_UARTB 160 -#define TEGRA30_CLK_VFIR 161 -#define TEGRA30_CLK_SPDIF_IN 162 -#define TEGRA30_CLK_SPDIF_OUT 163 -#define TEGRA30_CLK_VI 164 -#define TEGRA30_CLK_VI_SENSOR 165 -#define TEGRA30_CLK_FUSE 166 -#define TEGRA30_CLK_FUSE_BURN 167 -#define TEGRA30_CLK_CVE 168 -#define TEGRA30_CLK_TVO 169 -#define TEGRA30_CLK_CLK_32K 170 -#define TEGRA30_CLK_CLK_M 171 -#define TEGRA30_CLK_CLK_M_DIV2 172 -#define TEGRA30_CLK_CLK_M_DIV4 173 -#define TEGRA30_CLK_PLL_REF 174 -#define TEGRA30_CLK_PLL_C 175 -#define TEGRA30_CLK_PLL_C_OUT1 176 -#define TEGRA30_CLK_PLL_M 177 -#define TEGRA30_CLK_PLL_M_OUT1 178 -#define TEGRA30_CLK_PLL_P 179 -#define TEGRA30_CLK_PLL_P_OUT1 180 -#define TEGRA30_CLK_PLL_P_OUT2 181 -#define TEGRA30_CLK_PLL_P_OUT3 182 -#define TEGRA30_CLK_PLL_P_OUT4 183 -#define TEGRA30_CLK_PLL_A 184 -#define TEGRA30_CLK_PLL_A_OUT0 185 -#define TEGRA30_CLK_PLL_D 186 -#define TEGRA30_CLK_PLL_D_OUT0 187 -#define TEGRA30_CLK_PLL_D2 188 -#define TEGRA30_CLK_PLL_D2_OUT0 189 -#define TEGRA30_CLK_PLL_U 190 -#define TEGRA30_CLK_PLL_X 191 - -#define TEGRA30_CLK_PLL_X_OUT0 192 -#define TEGRA30_CLK_PLL_E 193 -#define TEGRA30_CLK_SPDIF_IN_SYNC 194 -#define TEGRA30_CLK_I2S0_SYNC 195 -#define TEGRA30_CLK_I2S1_SYNC 196 -#define TEGRA30_CLK_I2S2_SYNC 197 -#define TEGRA30_CLK_I2S3_SYNC 198 -#define TEGRA30_CLK_I2S4_SYNC 199 -#define TEGRA30_CLK_VIMCLK_SYNC 200 -#define TEGRA30_CLK_AUDIO0 201 -#define TEGRA30_CLK_AUDIO1 202 -#define TEGRA30_CLK_AUDIO2 203 -#define TEGRA30_CLK_AUDIO3 204 -#define TEGRA30_CLK_AUDIO4 205 -#define TEGRA30_CLK_SPDIF 206 -#define TEGRA30_CLK_CLK_OUT_1 207 /* (extern1) */ -#define TEGRA30_CLK_CLK_OUT_2 208 /* (extern2) */ -#define TEGRA30_CLK_CLK_OUT_3 209 /* (extern3) */ -#define TEGRA30_CLK_SCLK 210 -#define TEGRA30_CLK_BLINK 211 -#define TEGRA30_CLK_CCLK_G 212 -#define TEGRA30_CLK_CCLK_LP 213 -#define TEGRA30_CLK_TWD 214 -#define TEGRA30_CLK_CML0 215 -#define TEGRA30_CLK_CML1 216 -#define TEGRA30_CLK_HCLK 217 -#define TEGRA30_CLK_PCLK 218 -/* 219 */ -/* 220 */ -/* 221 */ -/* 222 */ -/* 223 */ - -/* 288 */ -/* 289 */ -/* 290 */ -/* 291 */ -/* 292 */ -/* 293 */ -/* 294 */ -/* 295 */ -/* 296 */ -/* 297 */ -/* 298 */ -/* 299 */ -#define TEGRA30_CLK_CLK_OUT_1_MUX 300 -#define TEGRA30_CLK_CLK_MAX 301 - -#endif /* _DT_BINDINGS_CLOCK_TEGRA30_CAR_H */ diff --git a/include/dt-bindings/pinctrl/pinctrl-tegra.h b/include/dt-bindings/pinctrl/pinctrl-tegra.h deleted file mode 100644 index ebafa498be..0000000000 --- a/include/dt-bindings/pinctrl/pinctrl-tegra.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This header provides constants for Tegra pinctrl bindings. - * - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. - * - * Author: Laxman Dewangan <ldewangan@nvidia.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - */ - -#ifndef _DT_BINDINGS_PINCTRL_TEGRA_H -#define _DT_BINDINGS_PINCTRL_TEGRA_H - -/* - * Enable/disable for diffeent dt properties. This is applicable for - * properties nvidia,enable-input, nvidia,tristate, nvidia,open-drain, - * nvidia,lock, nvidia,rcv-sel, nvidia,high-speed-mode, nvidia,schmitt. - */ -#define TEGRA_PIN_DISABLE 0 -#define TEGRA_PIN_ENABLE 1 - -#define TEGRA_PIN_PULL_NONE 0 -#define TEGRA_PIN_PULL_DOWN 1 -#define TEGRA_PIN_PULL_UP 2 - -/* Low power mode driver */ -#define TEGRA_PIN_LP_DRIVE_DIV_8 0 -#define TEGRA_PIN_LP_DRIVE_DIV_4 1 -#define TEGRA_PIN_LP_DRIVE_DIV_2 2 -#define TEGRA_PIN_LP_DRIVE_DIV_1 3 - -/* Rising/Falling slew rate */ -#define TEGRA_PIN_SLEW_RATE_FASTEST 0 -#define TEGRA_PIN_SLEW_RATE_FAST 1 -#define TEGRA_PIN_SLEW_RATE_SLOW 2 -#define TEGRA_PIN_SLEW_RATE_SLOWEST 3 - -#endif diff --git a/include/dt-bindings/pinctrl/rockchip.h b/include/dt-bindings/pinctrl/rockchip.h deleted file mode 100644 index cd5788be82..0000000000 --- a/include/dt-bindings/pinctrl/rockchip.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Header providing constants for Rockchip pinctrl bindings. - * - * Copyright (c) 2013 MundoReader S.L. - * Author: Heiko Stuebner <heiko@sntech.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __DT_BINDINGS_ROCKCHIP_PINCTRL_H__ -#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__ - -#define RK_GPIO0 0 -#define RK_GPIO1 1 -#define RK_GPIO2 2 -#define RK_GPIO3 3 -#define RK_GPIO4 4 -#define RK_GPIO6 6 - -#define RK_FUNC_GPIO 0 -#define RK_FUNC_1 1 -#define RK_FUNC_2 2 - -#endif diff --git a/include/filetype.h b/include/filetype.h index ec5aea2635..9986938ddb 100644 --- a/include/filetype.h +++ b/include/filetype.h @@ -40,6 +40,7 @@ enum filetype { filetype_socfpga_xload, filetype_kwbimage_v1, filetype_android_sparse, + filetype_arm64_linux_image, filetype_max, }; diff --git a/include/linux/clk.h b/include/linux/clk.h index 081a859729..c6465b1c90 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -323,6 +323,7 @@ struct clk *clk_register_composite(const char *name, struct device_node; struct of_phandle_args; +struct of_device_id; #if defined(CONFIG_COMMON_CLK_OF_PROVIDER) diff --git a/include/linux/fs.h b/include/linux/fs.h index c1a5802eea..153c464470 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -252,6 +252,11 @@ struct file { #endif }; +struct super_operations { + struct inode *(*alloc_inode)(struct super_block *sb); + void (*destroy_inode)(struct inode *); +}; + /* * Inode flags - they have no relation to superblock flags now */ diff --git a/include/memory.h b/include/memory.h index 165d2dc52a..56d16d20c8 100644 --- a/include/memory.h +++ b/include/memory.h @@ -27,4 +27,9 @@ struct resource *request_sdram_region(const char *name, resource_size_t start, resource_size_t size); int release_sdram_region(struct resource *res); +void memory_bank_find_space(struct memory_bank *bank, resource_size_t *retstart, + resource_size_t *retend); +int memory_bank_first_find_space(resource_size_t *retstart, + resource_size_t *retend); + #endif diff --git a/include/mfd/twl-core.h b/include/mfd/twl-core.h index f090032b3f..88d29f019b 100644 --- a/include/mfd/twl-core.h +++ b/include/mfd/twl-core.h @@ -21,7 +21,7 @@ struct twlcore { struct i2c_client *client; }; -extern struct file_operations twl_fops; +extern struct cdev_operations twl_fops; extern int twlcore_reg_read(struct twlcore *twlcore, u16 reg, u8 *val); extern int twlcore_reg_write(struct twlcore *twlcore, u16 reg, u8 val); diff --git a/lib/glob.c b/lib/glob.c index 5a997ca092..32f7afdce8 100644 --- a/lib/glob.c +++ b/lib/glob.c @@ -313,7 +313,7 @@ static int prefix_array(const char *dirname, char **array, size_t n, static int glob_in_dir(const char *pattern, const char *directory, int flags, int (*errfunc) __P((const char *, int)), glob_t *pglob) { - __ptr_t stream; + __ptr_t stream = NULL; struct globlink { struct globlink *next; @@ -323,7 +323,13 @@ static int glob_in_dir(const char *pattern, const char *directory, size_t nfound = 0; int meta; - stream = opendir(directory); + meta = glob_pattern_p(pattern, !(flags & GLOB_NOESCAPE)); + + if (meta) + flags |= GLOB_MAGCHAR; + + if (meta) + stream = opendir(directory); if (stream == NULL) { if ((errfunc != NULL && (*errfunc) (directory, errno)) || @@ -331,11 +337,6 @@ static int glob_in_dir(const char *pattern, const char *directory, return GLOB_ABORTED; } - meta = glob_pattern_p(pattern, !(flags & GLOB_NOESCAPE)); - - if (meta) - flags |= GLOB_MAGCHAR; - while (1) { const char *name; size_t len; diff --git a/scripts/imx/README b/scripts/imx/README index b5cdb487a0..d573d3a6be 100644 --- a/scripts/imx/README +++ b/scripts/imx/README @@ -7,34 +7,12 @@ The imx-usb-loader tool is used to upload and start i.MX images. These are images containing a DCD (Device Configuration Data) table. To generate these images from raw binaries use the imx-image tool. -imx-image ---------- +Refer the i.MX related documentation about the DCD source files and their +content. -The imx-image tool can be used to generate imximages from raw binaries. -It requires an configuration file describing how to setup the SDRAM on -a particular board. This mainly consists of a poke table. The recognized -options in this file are: +Example for a DCD source file: -soc <soctype> soctype can be one of imx35, imx51, imx53, imx6 -loadaddr <adr> The address the binary is uploaded to -dcdofs <ofs> The offset of the image header in the image. This should be: - 0x400 - MMC/SD, NAND, serial ROM, PATA, SATA - 0x1000 - NOR Flash - 0x100 - OneNAND -wm 8 <adr> <value> do a byte memory write -wm 16 <adr> <value> do a short memory write -wm 32 <adr> <value> do a word memory write -check <width> <cond> <addr> <mask> Poll until condition becomes true. - with <cond> being one of: - while_all_bits_clear, - while_all_bits_set, - while_any_bit_clear, - while_any_bit_set -set_bits <width> <addr> <bits> set <bits> in register <addr> -clear_bits <width> <addr> <bits> clear <bits> in register <addr> -nop do nothing - -the i.MX SoCs support a wide range of fancy things doing with the flash header. +The i.MX SoCs support a wide range of fancy things doing with the flash header. We limit ourselves to a very simple case, that is the flash header has a fixed size of 0x1000 bytes. The application is expected right thereafter, so if you specify a loadaddr of 0x80000000 in the config file, the first 0x1000 bytes diff --git a/scripts/imx/imx-usb-loader.c b/scripts/imx/imx-usb-loader.c index 6052343e00..43dde8b7f2 100644 --- a/scripts/imx/imx-usb-loader.c +++ b/scripts/imx/imx-usb-loader.c @@ -935,10 +935,10 @@ static int do_dcd_v2_cmd_check(const unsigned char *dcd) } switch ((check->param & 0xf8) >> 3) { - case check_all_bits_clear: - case check_all_bits_set: - case check_any_bit_clear: - case check_any_bit_set: + case until_all_bits_clear: + case until_all_bits_set: + case until_any_bit_clear: + case until_any_bit_set: cond = (check->param & 0xf8) >> 3; break; default: @@ -966,20 +966,20 @@ static int do_dcd_v2_cmd_check(const unsigned char *dcd) data &= mask; switch (cond) { - case check_all_bits_clear: - if (data != 0) + case until_all_bits_clear: + if (data == 0) return 0; break; - case check_all_bits_set: - if (data != mask) + case until_all_bits_set: + if (data == mask) return 0; break; - case check_any_bit_clear: - if (data == mask) + case until_any_bit_clear: + if (data != mask) return 0; break; - case check_any_bit_set: - if (data == 0) + case until_any_bit_set: + if (data != 0) return 0; break; } diff --git a/scripts/imx/imx.c b/scripts/imx/imx.c index 809d8a7f71..fb6ac001e2 100644 --- a/scripts/imx/imx.c +++ b/scripts/imx/imx.c @@ -69,10 +69,10 @@ struct command { }; static const char *check_cmds[] = { - "while_all_bits_clear", /* while ((*address & mask) == 0); */ - "while_all_bits_set" , /* while ((*address & mask) == mask); */ - "while_any_bit_clear", /* while ((*address & mask) != mask); */ - "while_any_bit_set", /* while ((*address & mask) != 0); */ + "until_all_bits_clear", /* until ((*address & mask) == 0) { }; */ + "until_any_bit_clear", /* until ((*address & mask) != mask) { }; */ + "until_all_bits_set", /* until ((*address & mask) == mask) { }; */ + "until_any_bit_set", /* until ((*address & mask) != 0) { }; */ }; static void do_cmd_check_usage(void) @@ -81,10 +81,10 @@ static void do_cmd_check_usage(void) "usage: check <width> <cmd> <addr> <mask>\n" "<width> access width in bytes [1|2|4]\n" "with <cmd> one of:\n" - "while_all_bits_clear: while ((*addr & mask) == 0)\n" - "while_all_bits_set: while ((*addr & mask) == mask)\n" - "while_any_bit_clear: while ((*addr & mask) != mask)\n" - "while_any_bit_set: while ((*addr & mask) != 0)\n"); + "until_all_bits_clear: while ((*addr & mask) == 0)\n" + "until_all_bits_set: while ((*addr & mask) == mask)\n" + "until_any_bit_clear: while ((*addr & mask) != mask)\n" + "until_any_bit_set: while ((*addr & mask) != 0)\n"); } static int do_cmd_check(struct config_data *data, int argc, char *argv[]) diff --git a/scripts/imx/imx.h b/scripts/imx/imx.h index f32ae52abf..c7677f81a4 100644 --- a/scripts/imx/imx.h +++ b/scripts/imx/imx.h @@ -105,10 +105,10 @@ struct imx_dcd_v2_check { } __attribute__((packed)); enum imx_dcd_v2_check_cond { - check_all_bits_clear = 0, - check_all_bits_set = 1, - check_any_bit_clear = 2, - check_any_bit_set = 3, + until_all_bits_clear = 0, /* until ((*address & mask) == 0) { ...} */ + until_any_bit_clear = 1, /* until ((*address & mask) != mask) { ...} */ + until_all_bits_set = 2, /* until ((*address & mask) == mask) { ...} */ + until_any_bit_set = 3, /* until ((*address & mask) != 0) { ...} */ } __attribute__((packed)); int parse_config(struct config_data *data, const char *filename); |