diff options
| -rw-r--r-- | Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/boards/at91sam9m10g45ek/init.c | 1 | ||||
| -rw-r--r-- | arch/arm/boards/at91sam9n12ek/init.c | 2 | ||||
| -rw-r--r-- | arch/arm/boards/at91sam9x5ek/init.c | 4 | ||||
| -rw-r--r-- | arch/arm/boards/dss11/init.c | 1 | ||||
| -rw-r--r-- | arch/arm/boards/pm9263/init.c | 2 | ||||
| -rw-r--r-- | arch/arm/configs/eukrea_cpuimx51_defconfig | 1 | ||||
| -rw-r--r-- | arch/arm/configs/pcm027_defconfig | 1 | ||||
| -rw-r--r-- | arch/arm/cpu/cache-armv7.S | 2 | ||||
| -rw-r--r-- | arch/arm/mach-at91/Kconfig | 3 | ||||
| -rw-r--r-- | arch/arm/mach-at91/include/mach/board.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-bcm2835/core.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-omap/include/mach/debug_ll.h | 4 | ||||
| -rw-r--r-- | drivers/input/gpio_keys.c | 2 | ||||
| -rw-r--r-- | drivers/mci/at91_mci.h | 121 | ||||
| -rw-r--r-- | drivers/mci/atmel-mci-regs.h | 166 | ||||
| -rw-r--r-- | drivers/mci/atmel_mci.c | 391 | ||||
| -rw-r--r-- | drivers/mtd/nand/nand_write.c | 10 | ||||
| -rw-r--r-- | drivers/of/base.c | 4 | ||||
| -rw-r--r-- | drivers/video/atmel_lcdfb.c | 4 | ||||
| -rw-r--r-- | include/spi/spi.h | 2 | ||||
| -rw-r--r-- | pbl/string.c | 10 |
22 files changed, 448 insertions, 288 deletions
@@ -1,5 +1,5 @@ VERSION = 2013 -PATCHLEVEL = 01 +PATCHLEVEL = 02 SUBLEVEL = 0 EXTRAVERSION = NAME = Amissive Actinocutious Kiwi diff --git a/arch/arm/boards/at91sam9m10g45ek/init.c b/arch/arm/boards/at91sam9m10g45ek/init.c index 1d06708424..5b5e31b554 100644 --- a/arch/arm/boards/at91sam9m10g45ek/init.c +++ b/arch/arm/boards/at91sam9m10g45ek/init.c @@ -113,7 +113,6 @@ static struct at91_ether_platform_data macb_pdata = { #if defined(CONFIG_MCI_ATMEL) static struct atmel_mci_platform_data ek_mci_data = { .bus_width = 4, - .host_caps = MMC_MODE_HS, .detect_pin = AT91_PIN_PD10, }; diff --git a/arch/arm/boards/at91sam9n12ek/init.c b/arch/arm/boards/at91sam9n12ek/init.c index f9f7ce93dc..a1816664f1 100644 --- a/arch/arm/boards/at91sam9n12ek/init.c +++ b/arch/arm/boards/at91sam9n12ek/init.c @@ -200,7 +200,7 @@ static void ek_add_device_lcdc(void) {} static struct atmel_mci_platform_data mci0_data = { .bus_width = 4, .detect_pin = AT91_PIN_PA7, - .wp_pin = 0, + .wp_pin = -EINVAL, }; static void ek_add_device_mci(void) diff --git a/arch/arm/boards/at91sam9x5ek/init.c b/arch/arm/boards/at91sam9x5ek/init.c index e7a8f0f980..4e1e069564 100644 --- a/arch/arm/boards/at91sam9x5ek/init.c +++ b/arch/arm/boards/at91sam9x5ek/init.c @@ -168,13 +168,13 @@ static void ek_add_device_lcdc(void) {} static struct atmel_mci_platform_data mci0_data = { .bus_width = 4, .detect_pin = AT91_PIN_PD15, - .wp_pin = 0, + .wp_pin = -EINVAL, }; static void ek_add_device_mci(void) { if (at91sam9x5ek_cm_is_vendor(VENDOR_COGENT)) - mci0_data.detect_pin = 0; + mci0_data.detect_pin = -EINVAL; /* MMC0 */ at91_add_device_mci(0, &mci0_data); diff --git a/arch/arm/boards/dss11/init.c b/arch/arm/boards/dss11/init.c index a2e98259c1..2920d5e80a 100644 --- a/arch/arm/boards/dss11/init.c +++ b/arch/arm/boards/dss11/init.c @@ -113,7 +113,6 @@ static void dss11_phy_reset(void) static struct atmel_mci_platform_data dss11_mci_data = { .slot_b = 1, .bus_width = 4, - .host_caps = MMC_MODE_HS, }; static struct at91_usbh_data dss11_usbh_data = { diff --git a/arch/arm/boards/pm9263/init.c b/arch/arm/boards/pm9263/init.c index 933ba11dc7..4afa09536d 100644 --- a/arch/arm/boards/pm9263/init.c +++ b/arch/arm/boards/pm9263/init.c @@ -90,7 +90,7 @@ static void pm_add_device_nand(void) static struct at91_ether_platform_data macb_pdata = { .phy_interface = PHY_INTERFACE_MODE_RMII, - .phy_addr = 0, + .phy_addr = -1, }; static void pm9263_phy_init(void) diff --git a/arch/arm/configs/eukrea_cpuimx51_defconfig b/arch/arm/configs/eukrea_cpuimx51_defconfig index e4ec7b0a7d..3f5d817625 100644 --- a/arch/arm/configs/eukrea_cpuimx51_defconfig +++ b/arch/arm/configs/eukrea_cpuimx51_defconfig @@ -50,7 +50,6 @@ CONFIG_NET_DHCP=y CONFIG_NET_NFS=y CONFIG_NET_PING=y CONFIG_CMD_TFTP=y -CONFIG_FS_TFTP=y CONFIG_NET_NETCONSOLE=y CONFIG_NET_RESOLV=y CONFIG_DRIVER_NET_FEC_IMX=y diff --git a/arch/arm/configs/pcm027_defconfig b/arch/arm/configs/pcm027_defconfig index e08955b52b..ac9269d3c7 100644 --- a/arch/arm/configs/pcm027_defconfig +++ b/arch/arm/configs/pcm027_defconfig @@ -57,5 +57,4 @@ CONFIG_DRIVER_NET_SMC91111=y CONFIG_DRIVER_CFI=y CONFIG_VIDEO=y CONFIG_DRIVER_VIDEO_PXA=y -CONFIG_FS_TFTP=y CONFIG_LZO_DECOMPRESS=y diff --git a/arch/arm/cpu/cache-armv7.S b/arch/arm/cpu/cache-armv7.S index 2d68f27eeb..13542d9d0a 100644 --- a/arch/arm/cpu/cache-armv7.S +++ b/arch/arm/cpu/cache-armv7.S @@ -34,6 +34,7 @@ ENDPROC(v7_mmu_cache_on) .section .text.v7_mmu_cache_off ENTRY(v7_mmu_cache_off) + stmfd sp!, {r0-r7, r9-r11} mrc p15, 0, r0, c1, c0 #ifdef CONFIG_MMU bic r0, r0, #0x000d @@ -50,6 +51,7 @@ ENTRY(v7_mmu_cache_off) mcr p15, 0, r0, c7, c5, 6 @ invalidate BTC mcr p15, 0, r0, c7, c10, 4 @ DSB mcr p15, 0, r0, c7, c5, 4 @ ISB + ldmfd sp!, {r0-r7, r9-r11} mov pc, r12 ENDPROC(v7_mmu_cache_off) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 2656e5cf9f..14bab550c3 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -28,6 +28,7 @@ config ARCH_TEXT_BASE hex default 0x73f00000 if ARCH_AT91SAM9G45 default 0x26f00000 if ARCH_AT91SAM9X5 + default 0x20f00000 if ARCH_AT91RM9200 default 0x21f00000 if MACH_ANIMEO_IP default 0x23f00000 @@ -198,7 +199,7 @@ endchoice config ARCH_BAREBOX_MAX_BARE_INIT_SIZE hex default 0x1000 if ARCH_AT91SAM9260 - default 0x270000 if ARCH_AT91SAM9261 + default 0x27000 if ARCH_AT91SAM9261 default 0x12000 if ARCH_AT91SAM9263 default 0x4000 if ARCH_AT91SAM9G20 default 0x3000 if ARCH_AT91SAM9G10 diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index 56d5942551..71267e11e6 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h @@ -153,7 +153,6 @@ static inline struct device_d * at91_register_uart(unsigned id, unsigned pins) struct atmel_mci_platform_data { unsigned slot_b; unsigned bus_width; - unsigned host_caps; /* MCI_MODE_* from mci.h */ int detect_pin; int wp_pin; }; diff --git a/arch/arm/mach-bcm2835/core.c b/arch/arm/mach-bcm2835/core.c index b0fec8b008..f44ecd5bf3 100644 --- a/arch/arm/mach-bcm2835/core.c +++ b/arch/arm/mach-bcm2835/core.c @@ -97,5 +97,7 @@ void __noreturn reset_cpu (unsigned long addr) rstc |= PM_RSTC_WRCFG_FULL_RESET; writel(PM_PASSWORD | RESET_TIMEOUT, PM_WDOG); writel(PM_PASSWORD | rstc, PM_RSTC); + + while (1); } EXPORT_SYMBOL(reset_cpu); diff --git a/arch/arm/mach-omap/include/mach/debug_ll.h b/arch/arm/mach-omap/include/mach/debug_ll.h index 142f01a81e..ed1777b55b 100644 --- a/arch/arm/mach-omap/include/mach/debug_ll.h +++ b/arch/arm/mach-omap/include/mach/debug_ll.h @@ -23,9 +23,9 @@ #include <mach/omap3-silicon.h> #ifdef CONFIG_OMAP3EVM_UART1 -#define UART_BASE OMAP_UART1_BASE +#define UART_BASE OMAP3_UART1_BASE #else -#define UART_BASE OMAP_UART3_BASE +#define UART_BASE OMAP3_UART3_BASE #endif #endif diff --git a/drivers/input/gpio_keys.c b/drivers/input/gpio_keys.c index 6f3c912924..543ad1a470 100644 --- a/drivers/input/gpio_keys.c +++ b/drivers/input/gpio_keys.c @@ -79,7 +79,7 @@ static int __init gpio_keys_probe(struct device_d *dev) pdata->recv_fifo = kfifo_alloc(pdata->fifo_size); for (i = 0; i < pdata->nbuttons; i++) { - gpio = pdata->buttons->gpio; + gpio = pdata->buttons[i].gpio; ret = gpio_request(gpio, "gpio_keys"); if (ret) { pr_err("gpio_keys: (%d) can not be requested\n", gpio); diff --git a/drivers/mci/at91_mci.h b/drivers/mci/at91_mci.h deleted file mode 100644 index 4025aeb14f..0000000000 --- a/drivers/mci/at91_mci.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * [origin: Linux kernel arch/arm/mach-at91/include/mach/at91_mci.h] - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * MultiMedia Card Interface (MCI) registers. - * Based on AT91RM9200 datasheet revision F. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_MCI_H -#define AT91_MCI_H - -#define AT91_MCI_CR 0x00 /* Control Register */ -#define AT91_MCI_MCIEN (1 << 0) /* Multi-Media Interface Enable */ -#define AT91_MCI_MCIDIS (1 << 1) /* Multi-Media Interface Disable */ -#define AT91_MCI_PWSEN (1 << 2) /* Power Save Mode Enable */ -#define AT91_MCI_PWSDIS (1 << 3) /* Power Save Mode Disable */ -#define AT91_MCI_SWRST (1 << 7) /* Software Reset */ - -#define AT91_MCI_MR 0x04 /* Mode Register */ -#define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */ -#define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */ -#define AT91_MCI_RDPROOF (1 << 11) /* Read Proof Enable [SAM926[03] only] */ -#define AT91_MCI_WRPROOF (1 << 12) /* Write Proof Enable [SAM926[03] only] */ -#define AT91_MCI_PDCFBYTE (1 << 13) /* PDC Force Byte Transfer [SAM926[03] only] */ -#define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */ -#define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */ -#define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */ - -#define AT91_MCI_DTOR 0x08 /* Data Timeout Register */ -#define AT91_MCI_DTOCYC (0xf << 0) /* Data Timeout Cycle Number */ -#define AT91_MCI_DTOMUL (7 << 4) /* Data Timeout Multiplier */ -#define AT91_MCI_DTOMUL_1 (0 << 4) -#define AT91_MCI_DTOMUL_16 (1 << 4) -#define AT91_MCI_DTOMUL_128 (2 << 4) -#define AT91_MCI_DTOMUL_256 (3 << 4) -#define AT91_MCI_DTOMUL_1K (4 << 4) -#define AT91_MCI_DTOMUL_4K (5 << 4) -#define AT91_MCI_DTOMUL_64K (6 << 4) -#define AT91_MCI_DTOMUL_1M (7 << 4) - -#define AT91_MCI_SDCR 0x0c /* SD Card Register */ -#define AT91_MCI_SDCSEL (3 << 0) /* SD Card Selector */ -#define AT91_MCI_SDCBUS (3 << 6) /* 1-bit, 4-bit, or 8-bit bus */ -#define AT91_MCI_SDCBUS_1BIT (0 << 6) /* 1-bit bus */ -#define AT91_MCI_SDCBUS_4BIT (2 << 6) /* 4-bit bus */ -#define AT91_MCI_SDCBUS_8BIT (3 << 6) /* 8-bit bus */ - -#define AT91_MCI_ARGR 0x10 /* Argument Register */ - -#define AT91_MCI_CMDR 0x14 /* Command Register */ -#define AT91_MCI_CMDNB (0x3f << 0) /* Command Number */ -#define AT91_MCI_RSPTYP (3 << 6) /* Response Type */ -#define AT91_MCI_RSPTYP_NONE (0 << 6) -#define AT91_MCI_RSPTYP_48 (1 << 6) -#define AT91_MCI_RSPTYP_136 (2 << 6) -#define AT91_MCI_RSPTYP_R1B (3 << 6) -#define AT91_MCI_SPCMD (7 << 8) /* Special Command */ -#define AT91_MCI_SPCMD_NONE (0 << 8) -#define AT91_MCI_SPCMD_INIT (1 << 8) -#define AT91_MCI_SPCMD_SYNC (2 << 8) -#define AT91_MCI_SPCMD_ICMD (4 << 8) -#define AT91_MCI_SPCMD_IRESP (5 << 8) -#define AT91_MCI_OPDCMD (1 << 11) /* Open Drain Command */ -#define AT91_MCI_MAXLAT (1 << 12) /* Max Latency for Command to Response */ -#define AT91_MCI_TRCMD (3 << 16) /* Transfer Command */ -#define AT91_MCI_TRCMD_NONE (0 << 16) -#define AT91_MCI_TRCMD_START (1 << 16) -#define AT91_MCI_TRCMD_STOP (2 << 16) -#define AT91_MCI_TRDIR (1 << 18) /* Transfer Direction */ -#define AT91_MCI_TRDIR_RX (1 << 18) /* Read Transfer Direction */ -#define AT91_MCI_TRDIR_TX (0 << 18) /* Write Transfer Direction */ -#define AT91_MCI_TRTYP (3 << 19) /* Transfer Type */ -#define AT91_MCI_TRTYP_BLOCK (0 << 19) -#define AT91_MCI_TRTYP_MULTIPLE (1 << 19) -#define AT91_MCI_TRTYP_STREAM (2 << 19) -#define AT91_MCI_TRTYP_SDIO_BYTE (4 << 19) -#define AT91_MCI_TRTYP_SDIO_BLOCK (5 << 19) - -#define AT91_MCI_BLKR 0x18 /* Block Register */ -#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */ -#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block length */ - -#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */ -#define AT91_MCI_RDR 0x30 /* Receive Data Register */ -#define AT91_MCI_TDR 0x34 /* Transmit Data Register */ - -#define AT91_MCI_SR 0x40 /* Status Register */ -#define AT91_MCI_CMDRDY (1 << 0) /* Command Ready */ -#define AT91_MCI_RXRDY (1 << 1) /* Receiver Ready */ -#define AT91_MCI_TXRDY (1 << 2) /* Transmit Ready */ -#define AT91_MCI_BLKE (1 << 3) /* Data Block Ended */ -#define AT91_MCI_DTIP (1 << 4) /* Data Transfer in Progress */ -#define AT91_MCI_NOTBUSY (1 << 5) /* Data Not Busy */ -#define AT91_MCI_ENDRX (1 << 6) /* End of RX Buffer */ -#define AT91_MCI_ENDTX (1 << 7) /* End fo TX Buffer */ -#define AT91_MCI_SDIOIRQA (1 << 8) /* SDIO Interrupt for Slot A */ -#define AT91_MCI_SDIOIRQB (1 << 9) /* SDIO Interrupt for Slot B */ -#define AT91_MCI_RXBUFF (1 << 14) /* RX Buffer Full */ -#define AT91_MCI_TXBUFE (1 << 15) /* TX Buffer Empty */ -#define AT91_MCI_RINDE (1 << 16) /* Response Index Error */ -#define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */ -#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */ -#define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */ -#define AT91_MCI_RTOE (1 << 20) /* Response Time-out Error */ -#define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */ -#define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */ -#define AT91_MCI_OVRE (1 << 30) /* Overrun */ -#define AT91_MCI_UNRE (1 << 31) /* Underrun */ - -#define AT91_MCI_IER 0x44 /* Interrupt Enable Register */ -#define AT91_MCI_IDR 0x48 /* Interrupt Disable Register */ -#define AT91_MCI_IMR 0x4c /* Interrupt Mask Register */ - -#endif diff --git a/drivers/mci/atmel-mci-regs.h b/drivers/mci/atmel-mci-regs.h new file mode 100644 index 0000000000..af1dba00f9 --- /dev/null +++ b/drivers/mci/atmel-mci-regs.h @@ -0,0 +1,166 @@ +/* + * Atmel MultiMedia Card Interface driver + * + * Copyright (C) 2004-2006 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * Superset of MCI IP registers integrated in Atmel AVR32 and AT91 Processors + * Registers and bitfields marked with [2] are only available in MCI2 + */ + +#ifndef __DRIVERS_MMC_ATMEL_MCI_H__ +#define __DRIVERS_MMC_ATMEL_MCI_H__ + +/* MCI Register Definitions */ +#define ATMCI_CR 0x0000 /* Control */ +# define ATMCI_CR_MCIEN ( 1 << 0) /* MCI Enable */ +# define ATMCI_CR_MCIDIS ( 1 << 1) /* MCI Disable */ +# define ATMCI_CR_PWSEN ( 1 << 2) /* Power Save Enable */ +# define ATMCI_CR_PWSDIS ( 1 << 3) /* Power Save Disable */ +# define ATMCI_CR_SWRST ( 1 << 7) /* Software Reset */ +#define ATMCI_MR 0x0004 /* Mode */ +# define ATMCI_MR_CLKDIV(x) ((x) << 0) /* Clock Divider */ +# define ATMCI_MR_PWSDIV(x) ((x) << 8) /* Power Saving Divider */ +# define ATMCI_MR_RDPROOF ( 1 << 11) /* Read Proof */ +# define ATMCI_MR_WRPROOF ( 1 << 12) /* Write Proof */ +# define ATMCI_MR_PDCFBYTE ( 1 << 13) /* Force Byte Transfer */ +# define ATMCI_MR_PDCPADV ( 1 << 14) /* Padding Value */ +# define ATMCI_MR_PDCMODE ( 1 << 15) /* PDC-oriented Mode */ +# define ATMCI_MR_CLKODD(x) ((x) << 16) /* LSB of Clock Divider */ +#define ATMCI_DTOR 0x0008 /* Data Timeout */ +# define ATMCI_DTOCYC(x) ((x) << 0) /* Data Timeout Cycles */ +# define ATMCI_DTOMUL(x) ((x) << 4) /* Data Timeout Multiplier */ +#define ATMCI_SDCR 0x000c /* SD Card / SDIO */ +# define ATMCI_SDCSEL_SLOT_A ( 0 << 0) /* Select SD slot A */ +# define ATMCI_SDCSEL_SLOT_B ( 1 << 0) /* Select SD slot A */ +# define ATMCI_SDCSEL_MASK ( 3 << 0) +# define ATMCI_SDCBUS_1BIT ( 0 << 6) /* 1-bit data bus */ +# define ATMCI_SDCBUS_4BIT ( 2 << 6) /* 4-bit data bus */ +# define ATMCI_SDCBUS_8BIT ( 3 << 6) /* 8-bit data bus[2] */ +# define ATMCI_SDCBUS_MASK ( 3 << 6) +#define ATMCI_ARGR 0x0010 /* Command Argument */ +#define ATMCI_CMDR 0x0014 /* Command */ +# define ATMCI_CMDR_CMDNB_MASK (0x3f << 0) /* Command Opcode MASK */ +# define ATMCI_CMDR_CMDNB(x) ((x) << 0) /* Command Opcode */ +# define ATMCI_CMDR_RSPTYP ( 3 << 6) /* response mask */ +# define ATMCI_CMDR_RSPTYP_NONE ( 0 << 6) /* No response */ +# define ATMCI_CMDR_RSPTYP_48BIT ( 1 << 6) /* 48-bit response */ +# define ATMCI_CMDR_RSPTYP_136BIT ( 2 << 6) /* 136-bit response */ +# define ATMCI_CMDR_SPCMD_INIT ( 1 << 8) /* Initialization command */ +# define ATMCI_CMDR_SPCMD_SYNC ( 2 << 8) /* Synchronized command */ +# define ATMCI_CMDR_SPCMD_INT ( 4 << 8) /* Interrupt command */ +# define ATMCI_CMDR_SPCMD_INTRESP ( 5 << 8) /* Interrupt response */ +# define ATMCI_CMDR_OPDCMD ( 1 << 11) /* Open Drain */ +# define ATMCI_CMDR_MAXLAT_5CYC ( 0 << 12) /* Max latency 5 cycles */ +# define ATMCI_CMDR_MAXLAT_64CYC ( 1 << 12) /* Max latency 64 cycles */ +# define ATMCI_CMDR_START_XFER ( 1 << 16) /* Start data transfer */ +# define ATMCI_CMDR_STOP_XFER ( 2 << 16) /* Stop data transfer */ +# define ATMCI_CMDR_TRDIR_WRITE ( 0 << 18) /* Write data */ +# define ATMCI_CMDR_TRDIR_READ ( 1 << 18) /* Read data */ +# define ATMCI_CMDR_BLOCK ( 0 << 19) /* Single-block transfer */ +# define ATMCI_CMDR_MULTI_BLOCK ( 1 << 19) /* Multi-block transfer */ +# define ATMCI_CMDR_STREAM ( 2 << 19) /* MMC Stream transfer */ +# define ATMCI_CMDR_SDIO_BYTE ( 4 << 19) /* SDIO Byte transfer */ +# define ATMCI_CMDR_SDIO_BLOCK ( 5 << 19) /* SDIO Block transfer */ +# define ATMCI_CMDR_SDIO_SUSPEND ( 1 << 24) /* SDIO Suspend Command */ +# define ATMCI_CMDR_SDIO_RESUME ( 2 << 24) /* SDIO Resume Command */ +#define ATMCI_BLKR 0x0018 /* Block */ +# define ATMCI_BCNT(x) ((x) << 0) /* Data Block Count */ +# define ATMCI_BLKLEN(x) ((x) << 16) /* Data Block Length */ +#define ATMCI_CSTOR 0x001c /* Completion Signal Timeout[2] */ +# define ATMCI_CSTOCYC(x) ((x) << 0) /* CST cycles */ +# define ATMCI_CSTOMUL(x) ((x) << 4) /* CST multiplier */ +#define ATMCI_RSPR 0x0020 /* Response 0 */ +#define ATMCI_RSPR1 0x0024 /* Response 1 */ +#define ATMCI_RSPR2 0x0028 /* Response 2 */ +#define ATMCI_RSPR3 0x002c /* Response 3 */ +#define ATMCI_RDR 0x0030 /* Receive Data */ +#define ATMCI_TDR 0x0034 /* Transmit Data */ +#define ATMCI_SR 0x0040 /* Status */ +#define ATMCI_IER 0x0044 /* Interrupt Enable */ +#define ATMCI_IDR 0x0048 /* Interrupt Disable */ +#define ATMCI_IMR 0x004c /* Interrupt Mask */ +# define ATMCI_CMDRDY ( 1 << 0) /* Command Ready */ +# define ATMCI_RXRDY ( 1 << 1) /* Receiver Ready */ +# define ATMCI_TXRDY ( 1 << 2) /* Transmitter Ready */ +# define ATMCI_BLKE ( 1 << 3) /* Data Block Ended */ +# define ATMCI_DTIP ( 1 << 4) /* Data Transfer In Progress */ +# define ATMCI_NOTBUSY ( 1 << 5) /* Data Not Busy */ +# define ATMCI_ENDRX ( 1 << 6) /* End of RX Buffer */ +# define ATMCI_ENDTX ( 1 << 7) /* End of TX Buffer */ +# define ATMCI_SDIOIRQA ( 1 << 8) /* SDIO IRQ in slot A */ +# define ATMCI_SDIOIRQB ( 1 << 9) /* SDIO IRQ in slot B */ +# define ATMCI_SDIOWAIT ( 1 << 12) /* SDIO Read Wait Operation Status */ +# define ATMCI_CSRCV ( 1 << 13) /* CE-ATA Completion Signal Received */ +# define ATMCI_RXBUFF ( 1 << 14) /* RX Buffer Full */ +# define ATMCI_TXBUFE ( 1 << 15) /* TX Buffer Empty */ +# define ATMCI_RINDE ( 1 << 16) /* Response Index Error */ +# define ATMCI_RDIRE ( 1 << 17) /* Response Direction Error */ +# define ATMCI_RCRCE ( 1 << 18) /* Response CRC Error */ +# define ATMCI_RENDE ( 1 << 19) /* Response End Bit Error */ +# define ATMCI_RTOE ( 1 << 20) /* Response Time-Out Error */ +# define ATMCI_DCRCE ( 1 << 21) /* Data CRC Error */ +# define ATMCI_DTOE ( 1 << 22) /* Data Time-Out Error */ +# define ATMCI_CSTOE ( 1 << 23) /* Completion Signal Time-out Error */ +# define ATMCI_BLKOVRE ( 1 << 24) /* DMA Block Overrun Error */ +# define ATMCI_DMADONE ( 1 << 25) /* DMA Transfer Done */ +# define ATMCI_FIFOEMPTY ( 1 << 26) /* FIFO Empty Flag */ +# define ATMCI_XFRDONE ( 1 << 27) /* Transfer Done Flag */ +# define ATMCI_ACKRCV ( 1 << 28) /* Boot Operation Acknowledge Received */ +# define ATMCI_ACKRCVE ( 1 << 29) /* Boot Operation Acknowledge Error */ +# define ATMCI_OVRE ( 1 << 30) /* RX Overrun Error */ +# define ATMCI_UNRE ( 1 << 31) /* TX Underrun Error */ +#define ATMCI_DMA 0x0050 /* DMA Configuration[2] */ +# define ATMCI_DMA_OFFSET(x) ((x) << 0) /* DMA Write Buffer Offset */ +# define ATMCI_DMA_CHKSIZE(x) ((x) << 4) /* DMA Channel Read and Write Chunk Size */ +# define ATMCI_DMAEN ( 1 << 8) /* DMA Hardware Handshaking Enable */ +#define ATMCI_CFG 0x0054 /* Configuration[2] */ +# define ATMCI_CFG_FIFOMODE_1DATA ( 1 << 0) /* MCI Internal FIFO control mode */ +# define ATMCI_CFG_FERRCTRL_COR ( 1 << 4) /* Flow Error flag reset control mode */ +# define ATMCI_CFG_HSMODE ( 1 << 8) /* High Speed Mode */ +# define ATMCI_CFG_LSYNC ( 1 << 12) /* Synchronize on the last block */ +#define ATMCI_WPMR 0x00e4 /* Write Protection Mode[2] */ +# define ATMCI_WP_EN ( 1 << 0) /* WP Enable */ +# define ATMCI_WP_KEY (0x4d4349 << 8) /* WP Key */ +#define ATMCI_WPSR 0x00e8 /* Write Protection Status[2] */ +# define ATMCI_GET_WP_VS(x) ((x) & 0x0f) +# define ATMCI_GET_WP_VSRC(x) (((x) >> 8) & 0xffff) +#define ATMCI_VERSION 0x00FC /* Version */ +#define ATMCI_FIFO_APERTURE 0x0200 /* FIFO Aperture[2] */ + +/* This is not including the FIFO Aperture on MCI2 */ +#define ATMCI_REGS_SIZE 0x100 + +/* Register access macros */ +#define atmci_readl(port,reg) \ + __raw_readl((port)->regs + reg) +#define atmci_writel(port,reg,value) \ + __raw_writel((value), (port)->regs + reg) + +/* On AVR chips the Peripheral DMA Controller is not connected to MCI. */ +#ifdef CONFIG_AVR32 +# define ATMCI_PDC_CONNECTED 0 +#else +# define ATMCI_PDC_CONNECTED 1 +#endif + +/* + * Fix sconfig's burst size according to atmel MCI. We need to convert them as: + * 1 -> 0, 4 -> 1, 8 -> 2, 16 -> 3. + * + * This can be done by finding most significant bit set. + */ +static inline unsigned int atmci_convert_chksize(unsigned int maxburst) +{ + if (maxburst > 1) + return fls(maxburst) - 2; + else + return 0; +} + +#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */ diff --git a/drivers/mci/atmel_mci.c b/drivers/mci/atmel_mci.c index 4065355be5..9de079d31d 100644 --- a/drivers/mci/atmel_mci.c +++ b/drivers/mci/atmel_mci.c @@ -1,5 +1,5 @@ /* - * Atmel AT91 MCI driver + * Atmel MCI driver * * Copyright (C) 2011 Hubert Feurstein <h.feurstein@gmail.com> * @@ -25,11 +25,19 @@ #include <linux/clk.h> #include <linux/err.h> -#include "at91_mci.h" +#include "atmel-mci-regs.h" -struct atmel_mci_host { +struct atmel_mci_caps { + bool has_cfg_reg; + bool has_highspeed; + bool has_rwproof; + bool has_odd_clk_div; + bool need_reset_after_xfer; +}; + +struct atmel_mci { struct mci_host mci; - void __iomem *base; + void __iomem *regs; struct device_d *hw_dev; struct clk *clk; @@ -37,89 +45,105 @@ struct atmel_mci_host { struct mci_cmd *cmd; struct mci_data *data; unsigned slot_b; + int version; + struct atmel_mci_caps caps; + + unsigned long bus_hz; + u32 mode_reg; + u32 cfg_reg; + u32 sdc_reg; + bool need_reset; }; -#define to_mci_host(mci) container_of(mci, struct atmel_mci_host, mci) - -#define STATUS_ERROR_MASK (AT91_MCI_RINDE \ - | AT91_MCI_RDIRE \ - | AT91_MCI_RCRCE \ - | AT91_MCI_RENDE \ - | AT91_MCI_RTOE \ - | AT91_MCI_DCRCE \ - | AT91_MCI_DTOE \ - | AT91_MCI_OVRE \ - | AT91_MCI_UNRE) +#define to_mci_host(mci) container_of(mci, struct atmel_mci, mci) -static inline u32 atmel_mci_readl(struct atmel_mci_host *host, u32 offset) -{ - return readl(host->base + offset); -} +#define STATUS_ERROR_MASK (ATMCI_RINDE \ + | ATMCI_RDIRE \ + | ATMCI_RCRCE \ + | ATMCI_RENDE \ + | ATMCI_RTOE \ + | ATMCI_DCRCE \ + | ATMCI_DTOE \ + | ATMCI_OVRE \ + | ATMCI_UNRE) -static inline void atmel_mci_writel(struct atmel_mci_host *host, u32 offset, - u32 value) +static void atmci_set_clk_rate(struct atmel_mci *host, + unsigned int clock_min) { - writel(value, host->base + offset); -} + unsigned int clkdiv; -static void atmel_mci_reset(struct atmel_mci_host *host) -{ - atmel_mci_writel(host, AT91_MCI_CR, AT91_MCI_SWRST | AT91_MCI_MCIDIS); - atmel_mci_writel(host, AT91_MCI_DTOR, 0x7f); - atmel_mci_writel(host, AT91_MCI_IDR, ~0UL); -} - -static void atmel_set_clk_rate(struct atmel_mci_host *host, - unsigned int clk_ios) -{ - unsigned int divider; - unsigned int clk_in = clk_get_rate(host->clk); + if (!host->mode_reg) { + clk_enable(host->clk); + atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); + if (host->caps.has_cfg_reg) + atmci_writel(host, ATMCI_CFG, host->cfg_reg); + } - if (clk_ios > 0) { - divider = (clk_in / clk_ios) / 2; - if (divider > 0) - divider -= 1; + if (host->caps.has_odd_clk_div) { + clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2; + if (clkdiv > 511) { + dev_dbg(host->hw_dev, + "clock %u too slow; using %lu\n", + clock_min, host->bus_hz / (511 + 2)); + clkdiv = 511; + } + host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1) + | ATMCI_MR_CLKODD(clkdiv & 1); + } else { + clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1; + if (clkdiv > 255) { + dev_dbg(host->hw_dev, + "clock %u too slow; using %lu\n", + clock_min, host->bus_hz / (2 * 256)); + clkdiv = 255; + } + host->mode_reg = ATMCI_MR_CLKDIV(clkdiv); } - if (clk_ios == 0 || divider > 255) - divider = 255; + dev_dbg(host->hw_dev, "atmel_set_clk_rate: clkIn=%ld clkIos=%d divider=%d\n", + host->bus_hz, clock_min, clkdiv); - dev_dbg(host->hw_dev, "atmel_set_clk_rate: clkIn=%d clkIos=%d divider=%d\n", - clk_in, clk_ios, divider); + /* + * WRPROOF and RDPROOF prevent overruns/underruns by + * stopping the clock when the FIFO is full/empty. + * This state is not expected to last for long. + */ + if (host->caps.has_rwproof) + host->mode_reg |= ATMCI_MR_RDPROOF | ATMCI_MR_WRPROOF; - atmel_mci_writel(host, AT91_MCI_MR, (AT91_MCI_CLKDIV & divider) - | AT91_MCI_RDPROOF | AT91_MCI_WRPROOF); + atmci_writel(host, ATMCI_MR, host->mode_reg); } -static int atmel_poll_status(struct atmel_mci_host *host, u32 mask) +static int atmci_poll_status(struct atmel_mci *host, u32 mask) { u32 stat; uint64_t start = get_time_ns(); do { - stat = atmel_mci_readl(host, AT91_MCI_SR); + stat = atmci_readl(host, ATMCI_SR); if (stat & STATUS_ERROR_MASK) return stat; if (is_timeout(start, SECOND)) { dev_err(host->hw_dev, "timeout\n"); - return AT91_MCI_RTOE | stat; + host->need_reset = true; + return ATMCI_RTOE | stat; } if (stat & mask) return 0; } while (1); } -static int atmel_pull(struct atmel_mci_host *host, void *_buf, int bytes) +static int atmci_pull(struct atmel_mci *host, void *_buf, int bytes) { unsigned int stat; u32 *buf = _buf; while (bytes > 3) { - stat = atmel_poll_status(host, AT91_MCI_RXRDY); + stat = atmci_poll_status(host, ATMCI_RXRDY); if (stat) return stat; - *buf++ = atmel_mci_readl(host, AT91_MCI_RDR); + *buf++ = atmci_readl(host, ATMCI_RDR); bytes -= 4; } @@ -130,21 +154,21 @@ static int atmel_pull(struct atmel_mci_host *host, void *_buf, int bytes) } #ifdef CONFIG_MCI_WRITE -static int atmel_push(struct atmel_mci_host *host, const void *_buf, int bytes) +static int atmci_push(struct atmel_mci *host, const void *_buf, int bytes) { unsigned int stat; const u32 *buf = _buf; while (bytes > 3) { - stat = atmel_poll_status(host, AT91_MCI_TXRDY); + stat = atmci_poll_status(host, ATMCI_TXRDY); if (stat) return stat; - atmel_mci_writel(host, AT91_MCI_TDR, *buf++); + atmci_writel(host, ATMCI_TDR, *buf++); bytes -= 4; } - stat = atmel_poll_status(host, AT91_MCI_TXRDY); + stat = atmci_poll_status(host, ATMCI_TXRDY); if (stat) return stat; @@ -155,7 +179,7 @@ static int atmel_push(struct atmel_mci_host *host, const void *_buf, int bytes) } #endif /* CONFIG_MCI_WRITE */ -static int atmel_transfer_data(struct atmel_mci_host *host) +static int atmci_transfer_data(struct atmel_mci *host) { struct mci_data *data = host->data; int stat; @@ -165,23 +189,23 @@ static int atmel_transfer_data(struct atmel_mci_host *host) host->datasize = 0; if (data->flags & MMC_DATA_READ) { - stat = atmel_pull(host, data->dest, length); + stat = atmci_pull(host, data->dest, length); if (stat) return stat; - stat = atmel_poll_status(host, AT91_MCI_NOTBUSY); + stat = atmci_poll_status(host, ATMCI_NOTBUSY); if (stat) return stat; host->datasize += length; } else { #ifdef CONFIG_MCI_WRITE - stat = atmel_push(host, (const void *)(data->src), length); + stat = atmci_push(host, (const void *)(data->src), length); if (stat) return stat; host->datasize += length; - stat = atmel_poll_status(host, AT91_MCI_NOTBUSY); + stat = atmci_poll_status(host, ATMCI_NOTBUSY); if (stat) return stat; #endif /* CONFIG_MCI_WRITE */ @@ -189,21 +213,21 @@ static int atmel_transfer_data(struct atmel_mci_host *host) return 0; } -static void atmel_finish_request(struct atmel_mci_host *host) +static void atmci_finish_request(struct atmel_mci *host) { host->cmd = NULL; host->data = NULL; } -static int atmel_finish_data(struct atmel_mci_host *host, unsigned int stat) +static int atmci_finish_data(struct atmel_mci *host, unsigned int stat) { int data_error = 0; if (stat & STATUS_ERROR_MASK) { dev_err(host->hw_dev, "request failed (status=0x%08x)\n", stat); - if (stat & AT91_MCI_DCRCE) + if (stat & ATMCI_DCRCE) data_error = -EILSEQ; - else if (stat & (AT91_MCI_RTOE | AT91_MCI_DTOE)) + else if (stat & (ATMCI_RTOE | ATMCI_DTOE)) data_error = -ETIMEDOUT; else data_error = -EIO; @@ -214,7 +238,7 @@ static int atmel_finish_data(struct atmel_mci_host *host, unsigned int stat) return data_error; } -static void atmel_setup_data(struct atmel_mci_host *host, struct mci_data *data) +static void atmci_setup_data(struct atmel_mci *host, struct mci_data *data) { unsigned int nob = data->blocks; unsigned int blksz = data->blocksize; @@ -228,13 +252,13 @@ static void atmel_setup_data(struct atmel_mci_host *host, struct mci_data *data) dev_dbg(host->hw_dev, "atmel_setup_data: nob=%d blksz=%d\n", nob, blksz); - atmel_mci_writel(host, AT91_MCI_BLKR, AT91_MCI_BLKR_BCNT(nob) - | AT91_MCI_BLKR_BLKLEN(blksz)); + atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(nob) + | ATMCI_BLKLEN(blksz)); host->datasize = datasize; } -static int atmel_read_response(struct atmel_mci_host *host, unsigned int stat) +static int atmci_read_response(struct atmel_mci *host, unsigned int stat) { struct mci_cmd *cmd = host->cmd; int i; @@ -243,10 +267,10 @@ static int atmel_read_response(struct atmel_mci_host *host, unsigned int stat) if (!cmd) return 0; - if (stat & (AT91_MCI_RTOE | AT91_MCI_DTOE)) { + if (stat & (ATMCI_RTOE | ATMCI_DTOE)) { dev_err(host->hw_dev, "command/data timeout\n"); return -ETIMEDOUT; - } else if ((stat & AT91_MCI_RCRCE) && (cmd->resp_type & MMC_RSP_CRC)) { + } else if ((stat & ATMCI_RCRCE) && (cmd->resp_type & MMC_RSP_CRC)) { dev_err(host->hw_dev, "cmd crc error\n"); return -EILSEQ; } @@ -254,39 +278,39 @@ static int atmel_read_response(struct atmel_mci_host *host, unsigned int stat) if (cmd->resp_type & MMC_RSP_PRESENT) { if (cmd->resp_type & MMC_RSP_136) { for (i = 0; i < 4; i++) - resp[i] = atmel_mci_readl(host, AT91_MCI_RSPR(0)); + resp[i] = atmci_readl(host, ATMCI_RSPR); } else { - resp[0] = atmel_mci_readl(host, AT91_MCI_RSPR(0)); + resp[0] = atmci_readl(host, ATMCI_RSPR); } } return 0; } -static int atmel_cmd_done(struct atmel_mci_host *host, unsigned int stat) +static int atmci_cmd_done(struct atmel_mci *host, unsigned int stat) { int datastat; int ret; - ret = atmel_read_response(host, stat); + ret = atmci_read_response(host, stat); if (ret) { - atmel_finish_request(host); + atmci_finish_request(host); return ret; } if (!host->data) { - atmel_finish_request(host); + atmci_finish_request(host); return 0; } - datastat = atmel_transfer_data(host); - ret = atmel_finish_data(host, datastat); - atmel_finish_request(host); + datastat = atmci_transfer_data(host); + ret = atmci_finish_data(host, datastat); + atmci_finish_request(host); return ret; } -static int atmel_start_cmd(struct atmel_mci_host *host, struct mci_cmd *cmd, +static int atmci_start_cmd(struct atmel_mci *host, struct mci_cmd *cmd, unsigned int cmdat) { unsigned flags = 0; @@ -295,47 +319,47 @@ static int atmel_start_cmd(struct atmel_mci_host *host, struct mci_cmd *cmd, if (host->cmd != NULL) dev_err(host->hw_dev, "error!\n"); - if ((atmel_mci_readl(host, AT91_MCI_SR) & AT91_MCI_CMDRDY) == 0) { + if ((atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY) == 0) { dev_err(host->hw_dev, "mci not ready!\n"); return -EBUSY; } host->cmd = cmd; - cmdval = AT91_MCI_CMDNB & cmd->cmdidx; + cmdval = ATMCI_CMDR_CMDNB_MASK & cmd->cmdidx; switch (cmd->resp_type) { case MMC_RSP_R1: /* short CRC, OPCODE */ case MMC_RSP_R1b:/* short CRC, OPCODE, BUSY */ - flags |= AT91_MCI_RSPTYP_48; + flags |= ATMCI_CMDR_RSPTYP_48BIT; break; case MMC_RSP_R2: /* long 136 bit + CRC */ - flags |= AT91_MCI_RSPTYP_136; + flags |= ATMCI_CMDR_RSPTYP_136BIT; break; case MMC_RSP_R3: /* short */ - flags |= AT91_MCI_RSPTYP_48; + flags |= ATMCI_CMDR_RSPTYP_48BIT; break; case MMC_RSP_NONE: - flags |= AT91_MCI_RSPTYP_NONE; + flags |= ATMCI_CMDR_RSPTYP_NONE; break; default: dev_err(host->hw_dev, "unhandled response type 0x%x\n", cmd->resp_type); return -EINVAL; } - cmdval |= AT91_MCI_RSPTYP & flags; - cmdval |= cmdat & ~(AT91_MCI_CMDNB | AT91_MCI_RSPTYP); + cmdval |= ATMCI_CMDR_RSPTYP & flags; + cmdval |= cmdat & ~(ATMCI_CMDR_CMDNB_MASK | ATMCI_CMDR_RSPTYP); - atmel_mci_writel(host, AT91_MCI_ARGR, cmd->cmdarg); - atmel_mci_writel(host, AT91_MCI_CMDR, cmdval); + atmci_writel(host, ATMCI_ARGR, cmd->cmdarg); + atmci_writel(host, ATMCI_CMDR, cmdval); return 0; } /** init the host interface */ -static int mci_reset(struct mci_host *mci, struct device_d *mci_dev) +static int atmci_reset(struct mci_host *mci, struct device_d *mci_dev) { int ret; - struct atmel_mci_host *host = to_mci_host(mci); + struct atmel_mci *host = to_mci_host(mci); struct atmel_mci_platform_data *pd = host->hw_dev->platform_data; ret = gpio_get_value(pd->detect_pin); @@ -345,79 +369,102 @@ static int mci_reset(struct mci_host *mci, struct device_d *mci_dev) return -ENODEV; clk_enable(host->clk); - atmel_mci_reset(host); + atmci_writel(host, ATMCI_DTOR, 0x7f); + clk_disable(host->clk); return 0; } /** change host interface settings */ -static void mci_set_ios(struct mci_host *mci, struct mci_ios *ios) +static void atmci_set_ios(struct mci_host *mci, struct mci_ios *ios) { - struct atmel_mci_host *host = to_mci_host(mci); + struct atmel_mci *host = to_mci_host(mci); dev_dbg(host->hw_dev, "atmel_mci_set_ios: bus_width=%d clk=%d\n", ios->bus_width, ios->clock); + host->sdc_reg &= ~ATMCI_SDCBUS_MASK; switch (ios->bus_width) { case MMC_BUS_WIDTH_4: - atmel_mci_writel(host, AT91_MCI_SDCR, AT91_MCI_SDCBUS_4BIT); + host->sdc_reg |= ATMCI_SDCBUS_4BIT; break; case MMC_BUS_WIDTH_8: - atmel_mci_writel(host, AT91_MCI_SDCR, AT91_MCI_SDCBUS_8BIT); + host->sdc_reg |= ATMCI_SDCBUS_8BIT; break; case MMC_BUS_WIDTH_1: - atmel_mci_writel(host, AT91_MCI_SDCR, AT91_MCI_SDCBUS_1BIT); + host->sdc_reg |= ATMCI_SDCBUS_1BIT; break; default: return; } - atmel_mci_writel(host, AT91_MCI_SDCR, atmel_mci_readl(host, AT91_MCI_SDCR) - | host->slot_b); if (ios->clock) { - atmel_set_clk_rate(host, ios->clock); - atmel_mci_writel(host, AT91_MCI_CR, AT91_MCI_MCIEN - ); + atmci_set_clk_rate(host, ios->clock); + + if (host->caps.has_cfg_reg) { + /* setup High Speed mode in relation with card capacity */ + if (ios->timing == MMC_TIMING_SD_HS) + host->cfg_reg |= ATMCI_CFG_HSMODE; + else + host->cfg_reg &= ~ATMCI_CFG_HSMODE; + + atmci_writel(host, ATMCI_CFG, host->cfg_reg); + } } else { - atmel_mci_writel(host, AT91_MCI_CR, AT91_MCI_MCIDIS); + atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); + if (host->mode_reg) { + atmci_readl(host, ATMCI_MR); + clk_disable(host->clk); + } + host->mode_reg = 0; } return; } /** handle a command */ -static int mci_request(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data) +static int atmci_request(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data) { - struct atmel_mci_host *host = to_mci_host(mci); + struct atmel_mci *host = to_mci_host(mci); u32 stat, cmdat = 0; int ret; + if (host->need_reset || host->caps.need_reset_after_xfer) { + atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); + atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); + atmci_writel(host, ATMCI_MR, host->mode_reg); + if (host->caps.has_cfg_reg) + atmci_writel(host, ATMCI_CFG, host->cfg_reg); + host->need_reset = false; + } + atmci_writel(host, ATMCI_SDCR, host->sdc_reg); + if (cmd->resp_type != MMC_RSP_NONE) - cmdat |= AT91_MCI_MAXLAT; + cmdat |= ATMCI_CMDR_MAXLAT_64CYC; if (data) { - atmel_setup_data(host, data); + atmci_setup_data(host, data); - cmdat |= AT91_MCI_TRCMD_START | AT91_MCI_TRTYP_MULTIPLE; + cmdat |= ATMCI_CMDR_START_XFER | ATMCI_CMDR_MULTI_BLOCK; if (data->flags & MMC_DATA_READ) - cmdat |= AT91_MCI_TRDIR_RX; + cmdat |= ATMCI_CMDR_TRDIR_READ; } - ret = atmel_start_cmd(host, cmd, cmdat); + ret = atmci_start_cmd(host, cmd, cmdat); if (ret) { - atmel_finish_request(host); + atmci_finish_request(host); return ret; } - stat = atmel_poll_status(host, AT91_MCI_CMDRDY); - return atmel_cmd_done(host, stat); + stat = atmci_poll_status(host, ATMCI_CMDRDY); + return atmci_cmd_done(host, stat); } #ifdef CONFIG_MCI_INFO -static void mci_info(struct device_d *mci_dev) +static void atmci_info(struct device_d *mci_dev) { - struct atmel_mci_host *host = mci_dev->priv; + struct atmel_mci *host = mci_dev->priv; struct atmel_mci_platform_data *pd = host->hw_dev->platform_data; printf(" Bus data width: %d bit\n", host->mci.bus_width); @@ -434,68 +481,140 @@ static void mci_info(struct device_d *mci_dev) printf("- %u Hz upper limit", host->mci.f_max); printf("\n Card detection support: %s\n", - pd->detect_pin != 0 ? "yes" : "no"); + gpio_is_valid(pd->detect_pin) ? "yes" : "no"); } #endif /* CONFIG_MCI_INFO */ +/* + * HSMCI (High Speed MCI) module is not fully compatible with MCI module. + * HSMCI provides DMA support and a new config register but no more supports + * PDC. + */ +static void atmci_get_cap(struct atmel_mci *host) +{ + unsigned int version; + + version = atmci_readl(host, ATMCI_VERSION) & 0x00000fff; + host->version = version; + + dev_info(host->hw_dev, "version: 0x%x\n", version); + + host->caps.has_cfg_reg = 0; + host->caps.has_highspeed = 0; + host->caps.need_reset_after_xfer = 1; + + switch (version & 0xf00) { + case 0x500: + host->caps.has_odd_clk_div = 1; + case 0x400: + case 0x300: + host->caps.has_cfg_reg = 1; + host->caps.has_highspeed = 1; + case 0x200: + host->caps.has_rwproof = 1; + case 0x100: + host->caps.need_reset_after_xfer = 0; + case 0x0: + break; + default: + dev_warn(host->hw_dev, + "Unmanaged mci version, set minimum capabilities\n"); + break; + } +} -static int mci_probe(struct device_d *hw_dev) +static int atmci_probe(struct device_d *hw_dev) { - unsigned long clk_rate; - struct atmel_mci_host *host; + struct atmel_mci *host; struct atmel_mci_platform_data *pd = hw_dev->platform_data; + int ret; if (!pd) { dev_err(hw_dev, "missing platform data\n"); return -EINVAL; } + if (gpio_is_valid(pd->detect_pin)) { + ret = gpio_request(pd->detect_pin, "mci_cd"); + if (ret) { + dev_err(hw_dev, "Impossible to request CD gpio %d (%d)\n", + ret, pd->detect_pin); + return ret; + } + + ret = gpio_direction_input(pd->detect_pin); + if (ret) { + dev_err(hw_dev, "Impossible to configure CD gpio %d as input (%d)\n", + ret, pd->detect_pin); + goto err_gpio_cd_request; + } + } + host = xzalloc(sizeof(*host)); - host->mci.send_cmd = mci_request; - host->mci.set_ios = mci_set_ios; - host->mci.init = mci_reset; + host->mci.send_cmd = atmci_request; + host->mci.set_ios = atmci_set_ios; + host->mci.init = atmci_reset; host->mci.hw_dev = hw_dev; - host->mci.host_caps = pd->host_caps; if (pd->bus_width >= 4) host->mci.host_caps |= MMC_MODE_4BIT; if (pd->bus_width == 8) host->mci.host_caps |= MMC_MODE_8BIT; host->slot_b = pd->slot_b; - host->base = dev_request_mem_region(hw_dev, 0); + host->regs = dev_request_mem_region(hw_dev, 0); host->hw_dev = hw_dev; hw_dev->priv = host; host->clk = clk_get(hw_dev, "mci_clk"); if (IS_ERR(host->clk)) { dev_err(hw_dev, "no mci_clk\n"); - return PTR_ERR(host->clk); + ret = PTR_ERR(host->clk); + goto err_gpio_cd_request; } - clk_rate = clk_get_rate(host->clk); + clk_enable(host->clk); + atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); + atmci_writel(host, ATMCI_IDR, ~0UL); + host->bus_hz = clk_get_rate(host->clk); + clk_disable(host->clk); host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; - host->mci.f_min = clk_rate >> 9; - host->mci.f_max = clk_rate >> 1; + host->mci.f_min = DIV_ROUND_UP(host->bus_hz, 512); + host->mci.f_max = host->bus_hz >> 1; + + atmci_get_cap(host); + + if (host->caps.has_highspeed) + host->mci.host_caps |= MMC_MODE_HS; + + if (host->slot_b) + host->sdc_reg = ATMCI_SDCSEL_SLOT_B; + else + host->sdc_reg = ATMCI_SDCSEL_SLOT_A; mci_register(&host->mci); return 0; + +err_gpio_cd_request: + if (gpio_is_valid(pd->detect_pin)) + gpio_free(pd->detect_pin); + + return ret; } -static struct driver_d atmel_mci_driver = { +static struct driver_d atmci_driver = { .name = "atmel_mci", - .probe = mci_probe, + .probe = atmci_probe, #ifdef CONFIG_MCI_INFO - .info = mci_info, + .info = atmci_info, #endif }; -static int atmel_mci_init_driver(void) +static int atmci_init_driver(void) { - platform_driver_register(&atmel_mci_driver); + platform_driver_register(&atmci_driver); return 0; } - -device_initcall(atmel_mci_init_driver); +device_initcall(atmci_init_driver); diff --git a/drivers/mtd/nand/nand_write.c b/drivers/mtd/nand/nand_write.c index 999712795c..276728cff1 100644 --- a/drivers/mtd/nand/nand_write.c +++ b/drivers/mtd/nand/nand_write.c @@ -296,10 +296,6 @@ int nand_do_write_ops(struct mtd_info *mtd, loff_t to, (chip->pagebuf << chip->page_shift) < (to + ops->len)) chip->pagebuf = -1; - /* Initialize to all 0xFF, to avoid the possibility of - left over OOB data from a previous OOB read. */ - memset(chip->oob_poi, 0xff, mtd->oobsize); - while(1) { int bytes = mtd->writesize; int cached = writelen > bytes && page != blockmask; @@ -315,8 +311,12 @@ int nand_do_write_ops(struct mtd_info *mtd, loff_t to, wbuf = chip->buffers->databuf; } - if (unlikely(oob)) + if (unlikely(oob)) { oob = nand_fill_oob(chip, oob, ops); + } else { + /* We still need to erase leftover OOB data */ + memset(chip->oob_poi, 0xff, mtd->oobsize); + } ret = chip->write_page(mtd, chip, wbuf, page, cached, (ops->mode == MTD_OOB_RAW)); diff --git a/drivers/of/base.c b/drivers/of/base.c index 7a41618ecd..576841db7d 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -487,9 +487,9 @@ struct device_node *of_find_node_by_path(const char *path) list_for_each_entry(np, &allnodes, list) { if (np->full_name && (strcmp(np->full_name, path) == 0)) - break; + return np; } - return np; + return NULL; } EXPORT_SYMBOL(of_find_node_by_path); diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 2ed70f1fba..08888cc9ba 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c @@ -75,7 +75,7 @@ static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo, u32 flags) mdelay(10); lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); - + if (flags & ATMEL_LCDC_STOP_NOWAIT) return; @@ -241,7 +241,7 @@ struct atmel_lcdfb_devdata atmel_lcdfb_data = { .start = atmel_lcdfb_start, .stop = atmel_lcdfb_stop, .update_dma = atmel_lcdfb_update_dma, - .setup_core = atmel_lcdfb_setup_core, + .setup_core = atmel_lcdfb_setup_core, .init_contrast = atmel_lcdfb_init_contrast, .limit_screeninfo = atmel_lcdfb_limit_screeninfo, }; diff --git a/include/spi/spi.h b/include/spi/spi.h index d6570a402c..fa76e9b59f 100644 --- a/include/spi/spi.h +++ b/include/spi/spi.h @@ -342,6 +342,8 @@ spi_transfer_del(struct spi_transfer *t) int spi_sync(struct spi_device *spi, struct spi_message *message); +struct spi_device *spi_new_device(struct spi_master *master, + struct spi_board_info *chip); int spi_register_master(struct spi_master *master); #ifdef CONFIG_SPI diff --git a/pbl/string.c b/pbl/string.c index 6787e82c9b..b773f5cf7c 100644 --- a/pbl/string.c +++ b/pbl/string.c @@ -5,6 +5,7 @@ */ #include <linux/types.h> +#include <linux/string.h> void *memcpy(void *__dest, __const void *__src, size_t __n) { @@ -103,7 +104,7 @@ void *memchr(const void *s, int c, size_t count) return NULL; } -char *strchr(const char *s, int c) +char *_strchr(const char *s, int c) { while (*s != (char)c) if (*s++ == '\0') @@ -111,8 +112,6 @@ char *strchr(const char *s, int c) return (char *)s; } -#undef memset - void *memset(void *s, int c, size_t count) { char *xs = s; @@ -120,8 +119,3 @@ void *memset(void *s, int c, size_t count) *xs++ = c; return s; } - -void __memzero(void *s, size_t count) -{ - memset(s, 0, count); -} |