diff options
276 files changed, 3279 insertions, 1175 deletions
diff --git a/Documentation/boards/efi.rst b/Documentation/boards/efi.rst index f04b1d3237..b12433014e 100644 --- a/Documentation/boards/efi.rst +++ b/Documentation/boards/efi.rst @@ -294,18 +294,19 @@ HOWTOs in the net, for example on http://tianocore.sourceforge.net/wiki/Using_ED git clone git://github.com/tianocore/edk2.git cd edk2 + git submodule update --init make -C BaseTools . edksetup.sh At least the following lines in ``Conf/target.txt`` should be edited:: - ACTIVE_PLATFORM = MdeModulePkg/MdeModulePkg.dsc + ACTIVE_PLATFORM = NetworkPkg/NetworkPkg.dsc TARGET_ARCH = X64 TOOL_CHAIN_TAG = GCC48 MAX_CONCURRENT_THREAD_NUMBER = 4 The actual build is started with invoking ``build``. After building -``Build/MdeModule/DEBUG_GCC48/X64/SnpDxe.efi`` should exist. +``Build/NetworkPkg/DEBUG_GCC48/X64/SnpDxe.efi`` should exist. **NOTE** As of this writing (July 2014) the following patch was needed to compile EDK2. diff --git a/Documentation/boards/stm32mp.rst b/Documentation/boards/stm32mp.rst index b235c39927..a06578602d 100644 --- a/Documentation/boards/stm32mp.rst +++ b/Documentation/boards/stm32mp.rst @@ -29,7 +29,7 @@ The resulting images will be placed under ``images/``: :: - barebox-stm32mp157c-dk2.img + barebox-stm32mp15xx-dkx.img # both DK1 and DK2 barebox-stm32mp157c-lxa-mc1.img barebox-stm32mp157c-seeed-odyssey.img @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 VERSION = 2020 -PATCHLEVEL = 09 +PATCHLEVEL = 10 SUBLEVEL = 0 EXTRAVERSION = NAME = None @@ -311,7 +311,8 @@ include scripts/Kbuild.include # Read KERNELRELEASE from include/config/kernel.release (if it exists) KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null) KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) -export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION +BUILDSYSTEM_VERSION = +export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION BUILDSYSTEM_VERSION # Cross compiling and selecting different set of gcc/bin-utils # --------------------------------------------------------------------------- @@ -1003,6 +1004,22 @@ include/generated/utsrelease.h: include/config/kernel.release FORCE $(call filechk,utsrelease.h) # --------------------------------------------------------------------------- +# Devicetree files + +ifneq ($(wildcard $(srctree)/arch/$(SRCARCH)/dts/),) +dtstree := arch/$(SRCARCH)/dts +endif + +ifneq ($(dtstree),) + +PHONY += dtbs +all_dtbs += $(patsubst $(srctree)/%.dts,$(objtree)/%.dtb,$(wildcard $(srctree)/$(dtstree)/*.dts)) +targets += $(all_dtbs) +dtbs: $(all_dtbs) + +endif + +# --------------------------------------------------------------------------- # Modules ifdef CONFIG_MODULES @@ -1177,6 +1194,10 @@ help: @$(if $(archhelp),$(archhelp),\ echo ' No architecture specific help defined for $(SRCARCH)') @echo '' + @$(if $(dtstree), \ + echo ' Devicetree:'; \ + echo ' * dtbs - Build device tree blobs for all boards'; \ + echo '') @$(if $(boards), \ $(foreach b, $(boards), \ printf " %-24s - Build for %s\\n" $(b) $(subst _defconfig,,$(b));) \ diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 986ea7a983..a02d80d2da 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -132,7 +132,7 @@ obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += terasic-de0-nano-soc/ obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += terasic-sockit/ obj-$(CONFIG_MACH_SOLIDRUN_CUBOX) += solidrun-cubox/ obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += solidrun-microsom/ -obj-$(CONFIG_MACH_STM32MP157C_DK2) += stm32mp157c-dk2/ +obj-$(CONFIG_MACH_STM32MP15XX_DKX) += stm32mp15xx-dkx/ obj-$(CONFIG_MACH_LXA_MC1) += lxa-mc1/ obj-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += technexion-pico-hobbit/ obj-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += technexion-wandboard/ @@ -165,6 +165,7 @@ obj-$(CONFIG_MACH_VARISCITE_MX6) += variscite-mx6/ obj-$(CONFIG_MACH_VSCOM_BALTOS) += vscom-baltos/ obj-$(CONFIG_MACH_QEMU_VIRT64) += qemu-virt64/ obj-$(CONFIG_MACH_WARP7) += element14-warp7/ +obj-$(CONFIG_MACH_WEBASTO_CCBV2) += webasto-ccbv2/ obj-$(CONFIG_MACH_VF610_TWR) += freescale-vf610-twr/ obj-$(CONFIG_MACH_XILINX_ZCU104) += xilinx-zcu104/ obj-$(CONFIG_MACH_ZII_COMMON) += zii-common/ diff --git a/arch/arm/boards/crystalfontz-cfa10036/hwdetect.c b/arch/arm/boards/crystalfontz-cfa10036/hwdetect.c index 83c77feb89..fc39f0849a 100644 --- a/arch/arm/boards/crystalfontz-cfa10036/hwdetect.c +++ b/arch/arm/boards/crystalfontz-cfa10036/hwdetect.c @@ -99,4 +99,4 @@ void cfa10036_detect_hw(void) pr_info("Booting on a CFA10036 with %s\n", board_name); } -BAREBOX_MAGICVAR_NAMED(global_board_variant, global.board.variant, "The board variant"); +BAREBOX_MAGICVAR(global.board.variant, "The board variant"); diff --git a/arch/arm/boards/freescale-mx6-sabrelite/board.c b/arch/arm/boards/freescale-mx6-sabrelite/board.c index f4f2994a51..1b39ef82c6 100644 --- a/arch/arm/boards/freescale-mx6-sabrelite/board.c +++ b/arch/arm/boards/freescale-mx6-sabrelite/board.c @@ -39,18 +39,6 @@ static iomux_v3_cfg_t sabrelite_enet_gpio_pads[] = { MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24, }; -static int sabrelite_mem_init(void) -{ - if (!of_machine_is_compatible("fsl,imx6q-sabrelite") && - !of_machine_is_compatible("fsl,imx6dl-sabrelite")) - return 0; - - arm_add_mem_device("ram0", 0x10000000, SZ_1G); - - return 0; -} -mem_initcall(sabrelite_mem_init); - static int ksz9021rn_phy_fixup(struct phy_device *dev) { phy_write(dev, 0x09, 0x0f00); @@ -70,37 +58,37 @@ static int ksz9021rn_phy_fixup(struct phy_device *dev) static struct gpio fec_gpios[] = { { - .gpio = 87, + .gpio = IMX_GPIO_NR(3, 23), .flags = GPIOF_OUT_INIT_LOW, .label = "phy-rst", }, { - .gpio = 190, + .gpio = IMX_GPIO_NR(6, 30), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-addr2", }, { - .gpio = 23, + .gpio = IMX_GPIO_NR(1, 23), .flags = GPIOF_OUT_INIT_LOW, .label = "phy-led-mode", }, { /* MODE strap-in pins: advertise all capabilities */ - .gpio = 185, + .gpio = IMX_GPIO_NR(6, 25), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-adv1", }, { - .gpio = 187, + .gpio = IMX_GPIO_NR(6, 27), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-adv1", }, { - .gpio = 188, + .gpio = IMX_GPIO_NR(6, 28), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-adv1", }, { - .gpio = 189, + .gpio = IMX_GPIO_NR(6, 29), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-adv1", }, { /* Enable 125 MHz clock output */ - .gpio = 184, + .gpio = IMX_GPIO_NR(6, 24), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-125MHz", }, @@ -139,9 +127,9 @@ fs_initcall(sabrelite_ksz9021rn_setup); static void sabrelite_ehci_init(void) { /* hub reset */ - gpio_direction_output(204, 0); + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); udelay(2000); - gpio_set_value(204, 1); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); } static int sabrelite_devices_init(void) diff --git a/arch/arm/boards/kindle-mx50/board.c b/arch/arm/boards/kindle-mx50/board.c index a8d733c6ba..8fc5af8320 100644 --- a/arch/arm/boards/kindle-mx50/board.c +++ b/arch/arm/boards/kindle-mx50/board.c @@ -60,9 +60,9 @@ static const char *get_env_16char_tag(const char *tag) return value; } -BAREBOX_MAGICVAR_NAMED(global_atags_serial16, global.board.serial16, +BAREBOX_MAGICVAR(global.board.serial16, "Pass the kindle Serial as vendor-specific ATAG to linux"); -BAREBOX_MAGICVAR_NAMED(global_atags_revision16, global.board.revision16, +BAREBOX_MAGICVAR(global.board.revision16, "Pass the kindle BoardId as vendor-specific ATAG to linux"); /* The Kindle Kernel expects two custom ATAGs, ATAG_REVISION16 describing diff --git a/arch/arm/boards/kindle3/kindle3.c b/arch/arm/boards/kindle3/kindle3.c index 14e04deb94..a593dc424d 100644 --- a/arch/arm/boards/kindle3/kindle3.c +++ b/arch/arm/boards/kindle3/kindle3.c @@ -64,9 +64,9 @@ static const char *get_env_16char_tag(const char *tag) return value; } -BAREBOX_MAGICVAR_NAMED(global_atags_serial16, global.board.serial16, +BAREBOX_MAGICVAR(global.board.serial16, "Pass the kindle Serial as vendor-specific ATAG to linux"); -BAREBOX_MAGICVAR_NAMED(global_atags_revision16, global.board.revision16, +BAREBOX_MAGICVAR(global.board.revision16, "Pass the kindle BoardId as vendor-specific ATAG to linux"); /* The Kindle3 Kernel expects two custom ATAGs, ATAG_REVISION16 describing diff --git a/arch/arm/boards/lxa-mc1/board.c b/arch/arm/boards/lxa-mc1/board.c index 7f1f3ccd7e..9126973dcb 100644 --- a/arch/arm/boards/lxa-mc1/board.c +++ b/arch/arm/boards/lxa-mc1/board.c @@ -28,11 +28,9 @@ static int of_fixup_regulator_supply_disable(struct device_node *root, void *pat return 0; } -static int mc1_device_init(void) +static int mc1_probe(struct device_d *dev) { int flags; - if (!of_machine_is_compatible("lxa,stm32mp157c-mc1")) - return 0; flags = bootsource_get_instance() == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0; stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", flags); @@ -55,4 +53,15 @@ static int mc1_device_init(void) */ return of_register_fixup(of_fixup_regulator_supply_disable, "/regulator_3v3"); } -device_initcall(mc1_device_init); + +static const struct of_device_id mc1_of_match[] = { + { .compatible = "lxa,stm32mp157c-mc1" }, + { /* sentinel */ }, +}; + +static struct driver_d mc1_board_driver = { + .name = "board-lxa-mc1", + .probe = mc1_probe, + .of_compatible = mc1_of_match, +}; +device_platform_driver(mc1_board_driver); diff --git a/arch/arm/boards/nxp-imx8mm-evk/board.c b/arch/arm/boards/nxp-imx8mm-evk/board.c index 8f5d851a88..4350abd157 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/board.c +++ b/arch/arm/boards/nxp-imx8mm-evk/board.c @@ -55,7 +55,7 @@ static int nxp_imx8mm_evk_init(void) imx8mq_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", emmc_sd_flag); - imx8mq_bbu_internal_mmc_register_handler("eMMC", "/dev/mmc2", + imx8mq_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, diff --git a/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c b/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c index b164bdec07..8d6cc389ba 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c +++ b/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c @@ -118,7 +118,7 @@ static struct dram_cfg_param lpddr4_ddrc_cfg[] = { { DDRC_FREQ2_INIT7(0), 0x0006004a }, /* boot start point */ - { DDRC_MSTR2(0), 0x2 }, //DDRC_MSTR2 + { DDRC_MSTR2(0), 0x0 }, }; /* PHY Initialize Configuration */ @@ -1941,12 +1941,6 @@ static struct dram_fsp_msg lpddr4_dram_fsp_msg[] = { .fsp_cfg = lpddr4_fsp0_cfg, .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_cfg), }, { - /* P0 3000mts 2D */ - .drate = 3000, - .fw_type = FW_2D_IMAGE, - .fsp_cfg = lpddr4_fsp0_2d_cfg, - .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_2d_cfg), - }, { /* P1 400mts 1D */ .drate = 400, .fw_type = FW_1D_IMAGE, @@ -1958,6 +1952,12 @@ static struct dram_fsp_msg lpddr4_dram_fsp_msg[] = { .fw_type = FW_1D_IMAGE, .fsp_cfg = lpddr4_fsp2_cfg, .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp2_cfg), + }, { + /* P0 3000mts 2D */ + .drate = 3000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = lpddr4_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_2d_cfg), }, }; diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c index 407115c2a6..62a1c8de73 100644 --- a/arch/arm/boards/phytec-som-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c @@ -110,6 +110,7 @@ PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_so PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true); PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_2gib, imx6q_phytec_phycore_som_emmc, SZ_2G, true); +PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_emmc_512mb, imx6ul_phytec_phycore_som_emmc, SZ_512M, false); PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_nand_512mb, imx6ul_phytec_phycore_som_nand, SZ_512M, false); PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_lc_nand_256mb, imx6ull_phytec_phycore_som_lc_nand, SZ_256M, false); PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_nand_512mb, imx6ull_phytec_phycore_som_nand, SZ_512M, false); diff --git a/arch/arm/boards/protonic-imx6/flash-header-prti6q.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-prti6q.imxcfg index 68b7909f82..029edc248a 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-prti6q.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-prti6q.imxcfg @@ -120,4 +120,3 @@ wm 32 0x020e0614 0x000130b0 /* RGMII config */ wm 32 0x020e0790 0x00080000 /* 1V2 DDR IO */ -wm 32 0x020e07ac 0x00000200 /* 60 Ohm ODT */ diff --git a/arch/arm/boards/protonic-imx6/flash-header-vicut1q.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-vicut1q.imxcfg index a73a2c6fd0..f7e75b47bf 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-vicut1q.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-vicut1q.imxcfg @@ -124,4 +124,3 @@ wm 32 0x020e0614 0x000130b0 /* RGMII config */ wm 32 0x020e0790 0x00080000 /* 1V2 DDR IO */ -wm 32 0x020e07ac 0x00000200 /* 60 Ohm ODT */ diff --git a/arch/arm/boards/protonic-imx6/flash-header-vicutp.imxcfg b/arch/arm/boards/protonic-imx6/flash-header-vicutp.imxcfg index 13887ade0b..e218279239 100644 --- a/arch/arm/boards/protonic-imx6/flash-header-vicutp.imxcfg +++ b/arch/arm/boards/protonic-imx6/flash-header-vicutp.imxcfg @@ -171,4 +171,3 @@ wm 32 0x020e0614 0x000130b0 /* RGMII config */ wm 32 0x020e0790 0x00080000 /* 1V2 DDR IO */ -wm 32 0x020e07ac 0x00000200 /* 60 Ohm ODT */ diff --git a/arch/arm/boards/seeed-odyssey/board.c b/arch/arm/boards/seeed-odyssey/board.c index e3fe536873..8c011898a3 100644 --- a/arch/arm/boards/seeed-odyssey/board.c +++ b/arch/arm/boards/seeed-odyssey/board.c @@ -7,14 +7,11 @@ #include <bootsource.h> #include <of.h> -static int odyssey_device_init(void) +static int odyssey_som_probe(struct device_d *dev) { int flags; int instance = bootsource_get_instance(); - if (!of_machine_is_compatible("seeed,stm32mp157c-odyssey-som")) - return 0; - flags = instance == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0; stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", flags); @@ -29,4 +26,15 @@ static int odyssey_device_init(void) return 0; } -device_initcall(odyssey_device_init); + +static const struct of_device_id odyssey_som_of_match[] = { + { .compatible = "seeed,stm32mp157c-odyssey-som" }, + { /* sentinel */ }, +}; + +static struct driver_d odyssey_som_driver = { + .name = "odyssey-som", + .probe = odyssey_som_probe, + .of_compatible = odyssey_som_of_match, +}; +device_platform_driver(odyssey_som_driver); diff --git a/arch/arm/boards/stm32mp157c-dk2/board.c b/arch/arm/boards/stm32mp157c-dk2/board.c deleted file mode 100644 index 4636603121..0000000000 --- a/arch/arm/boards/stm32mp157c-dk2/board.c +++ /dev/null @@ -1,18 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -#include <common.h> -#include <init.h> -#include <mach/bbu.h> - -static int dk2_postcore_init(void) -{ - if (!of_machine_is_compatible("st,stm32mp157c-dk2")) - return 0; - - stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", - BBU_HANDLER_FLAG_DEFAULT); - - barebox_set_model("STM32MP157C-DK2"); - - return 0; -} -postcore_initcall(dk2_postcore_init); diff --git a/arch/arm/boards/stm32mp157c-dk2/lowlevel.c b/arch/arm/boards/stm32mp157c-dk2/lowlevel.c deleted file mode 100644 index 7261d7a8bc..0000000000 --- a/arch/arm/boards/stm32mp157c-dk2/lowlevel.c +++ /dev/null @@ -1,26 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -#include <common.h> -#include <mach/entry.h> -#include <debug_ll.h> - -extern char __dtb_z_stm32mp157c_dk2_start[]; - -static void setup_uart(void) -{ - /* first stage has set up the UART, so nothing to do here */ - putc_ll('>'); -} - -ENTRY_FUNCTION(start_stm32mp157c_dk2, r0, r1, r2) -{ - void *fdt; - - stm32mp_cpu_lowlevel_init(); - - if (IS_ENABLED(CONFIG_DEBUG_LL)) - setup_uart(); - - fdt = __dtb_z_stm32mp157c_dk2_start + get_runtime_offset(); - - stm32mp1_barebox_entry(fdt); -} diff --git a/arch/arm/boards/stm32mp157c-dk2/Makefile b/arch/arm/boards/stm32mp15xx-dkx/Makefile index 092c31d6b2..092c31d6b2 100644 --- a/arch/arm/boards/stm32mp157c-dk2/Makefile +++ b/arch/arm/boards/stm32mp15xx-dkx/Makefile diff --git a/arch/arm/boards/stm32mp15xx-dkx/board.c b/arch/arm/boards/stm32mp15xx-dkx/board.c new file mode 100644 index 0000000000..1ddfee698d --- /dev/null +++ b/arch/arm/boards/stm32mp15xx-dkx/board.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include <common.h> +#include <init.h> +#include <mach/bbu.h> + +static int dkx_probe(struct device_d *dev) +{ + const void *model; + + stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", + BBU_HANDLER_FLAG_DEFAULT); + + if (dev_get_drvdata(dev, &model) == 0) + barebox_set_model(model); + + barebox_set_hostname("stm32mp15xx-dkx"); + + return 0; +} + +static const struct of_device_id dkx_of_match[] = { + { .compatible = "st,stm32mp157a-dk1", .data = "STM32MP157A-DK1" }, + { .compatible = "st,stm32mp157c-dk2", .data = "STM32MP157C-DK2" }, + { /* sentinel */ }, +}; + +static struct driver_d dkx_board_driver = { + .name = "board-stm32mp15xx-dkx", + .probe = dkx_probe, + .of_compatible = dkx_of_match, +}; +postcore_platform_driver(dkx_board_driver); diff --git a/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c b/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c new file mode 100644 index 0000000000..65f4bbb4da --- /dev/null +++ b/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include <common.h> +#include <mach/entry.h> +#include <debug_ll.h> +#include <mach/revision.h> + +extern char __dtb_z_stm32mp157c_dk2_start[]; +extern char __dtb_z_stm32mp157a_dk1_start[]; + +static void setup_uart(void) +{ + /* first stage has set up the UART, so nothing to do here */ + putc_ll('>'); +} + +ENTRY_FUNCTION(start_stm32mp15xx_dkx, r0, r1, r2) +{ + void *fdt; + u32 cputype; + int err; + + stm32mp_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + err = __stm32mp_get_cpu_type(&cputype); + if (!err && cputype == CPU_STM32MP157Axx) + fdt = __dtb_z_stm32mp157a_dk1_start; + else + fdt = __dtb_z_stm32mp157c_dk2_start; + + stm32mp1_barebox_entry(fdt + get_runtime_offset()); +} diff --git a/arch/arm/boards/webasto-ccbv2/Makefile b/arch/arm/boards/webasto-ccbv2/Makefile new file mode 100644 index 0000000000..01c7a259e9 --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/Makefile @@ -0,0 +1,2 @@ +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/webasto-ccbv2/board.c b/arch/arm/boards/webasto-ccbv2/board.c new file mode 100644 index 0000000000..a78258ea6a --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/board.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Rouven Czerwinski, Pengutronix + */ + +#include <common.h> +#include <init.h> +#include <mach/generic.h> +#include <mach/bbu.h> +#include <of.h> +#include <string.h> + +#include "ccbv2.h" + +static int ccbv2_probe(struct device_d *dev) +{ + struct device_node *overlay; + struct fdt_header *fdt; + int ret; + + /* the bootloader is stored in one of the two boot partitions */ + imx6_bbu_internal_mmcboot_register_handler("emmc", "/dev/mmc1", + BBU_HANDLER_FLAG_DEFAULT); + + barebox_set_hostname("weabsto-ccbv2"); + + if(!IS_ENABLED(CONFIG_FIRMWARE_CCBV2_OPTEE)) + return 0; + + fdt = (void*)OPTEE_OVERLAY_LOCATION; + overlay = of_unflatten_dtb(fdt); + + if (IS_ERR(overlay)) + return PTR_ERR(overlay); + + ret = of_register_overlay(overlay); + if (ret) { + printf("cannot apply oftree overlay: %s\n", strerror(-ret)); + goto err; + } + + return 0; +err: + of_delete_node(overlay); + return ret; + +} + +static const struct of_device_id ccbv2_of_match[] = { + { .compatible = "webasto,imx6ul-ccbv2" }, + { /* sentinel */ }, +}; + +static struct driver_d ccbv2_board_driver = { + .name = "board-imx6ul-ccbv2", + .probe = ccbv2_probe, + .of_compatible = ccbv2_of_match, +}; +postcore_platform_driver(ccbv2_board_driver); diff --git a/arch/arm/boards/webasto-ccbv2/ccbv2.h b/arch/arm/boards/webasto-ccbv2/ccbv2.h new file mode 100644 index 0000000000..bf43fe8410 --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/ccbv2.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * ccbv2.h - common defines between OP-TEE and barebox + * + * Copyright (c) 2019 Rouven Czerwinski <r.czerwinski@pengutronix.de>, Pengutronix + * + */ +#ifndef __CCBV2_H_ +#define __CCBV2_H_ + +/* MX6UL_MMDC_PORT0_BASE_ADDR + SZ_64M */ +#define OPTEE_OVERLAY_LOCATION 0x84000000 + + +#endif // __CCBV2_H_ diff --git a/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2.imxcfg b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2.imxcfg new file mode 100644 index 0000000000..ea327b2630 --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2.imxcfg @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +loadaddr 0x80000000 +soc imx6 +ivtofs 0x400 + +/* Enable all clocks */ +wm 32 0x020c4068 0xffffffff +wm 32 0x020c406c 0xffffffff +wm 32 0x020c4070 0xffffffff +wm 32 0x020c4074 0xffffffff +wm 32 0x020c4078 0xffffffff +wm 32 0x020c407c 0xffffffff +wm 32 0x020c4080 0xffffffff + +/* IOMUX */ +/* DDR IO type */ +wm 32 0x020E04B4 0x000C0000 +wm 32 0x020E04AC 0x00000000 +/* Clock */ +wm 32 0x020E027C 0x00000028 +/* Control */ +wm 32 0x020E0250 0x00000028 +wm 32 0x020E024C 0x00000028 +wm 32 0x020E0490 0x00000028 +wm 32 0x020E0288 0x00000028 +wm 32 0x020E0270 0x00000000 +wm 32 0x020E0260 0x00000028 +wm 32 0x020E0264 0x00000028 +wm 32 0x020E04A0 0x00000028 +/* Data strobe */ +wm 32 0x020E0494 0x00020000 +wm 32 0x020E0280 0x00000028 +wm 32 0x020E0284 0x00000028 +/* Data */ +wm 32 0x020E04B0 0x00020000 +wm 32 0x020E0498 0x00000028 +wm 32 0x020E04A4 0x00000028 +wm 32 0x020E0244 0x00000028 +wm 32 0x020E0248 0x00000028 + +/* DDR Controller registers */ +wm 32 0x021B001C 0x00008000 +wm 32 0x021B0800 0xA1390003 +/* Calibration values */ +wm 32 0x021B080C 0x000C0000 +wm 32 0x021B083C 0x01610162 +wm 32 0x021B0848 0x40405050 +wm 32 0x021B0850 0x4040544C +wm 32 0x021B081C 0x33333333 +wm 32 0x021B0820 0x33333333 +wm 32 0x021B082C 0xf3333333 +wm 32 0x021B0830 0xf3333333 +/* END of calibration values */ +wm 32 0x021B08C0 0x00921012 +wm 32 0x021B08b8 0x00000800 + +/* MMDC init */ +wm 32 0x021B0004 0x0002002D +wm 32 0x021B0008 0x1b333030 +wm 32 0x021B000C 0x3F4352F3 +wm 32 0x021B0010 0xB66D0B63 +wm 32 0x021B0014 0x01FF00DB +/* Consider reducing RALAT (currently set to 5) */ +wm 32 0x021B0018 0x00211740 +wm 32 0x021B001C 0x00008000 +wm 32 0x021B002C 0x000026D2 +wm 32 0x021B0030 0x00431023 +wm 32 0x021B0040 0x00000047 +wm 32 0x021B0000 0x83180000 + +/* Mode registers writes for CS0 */ +wm 32 0x021B001C 0x02008032 +wm 32 0x021B001C 0x00008033 +wm 32 0x021B001C 0x00048031 +wm 32 0x021B001C 0x15208030 +wm 32 0x021B001C 0x04008040 + +/* Final DDR setup */ +wm 32 0x021B0020 0x00007800 +wm 32 0x021B0818 0x00000227 +wm 32 0x021B0004 0x0002556D +wm 32 0x021B0404 0x00011006 +wm 32 0x021B001C 0x00000000 + +/* Disable TZASC bypass */ +wm 32 0x020E4024 0x00000001 + +#include <mach/habv4-imx6-gencsf.h> diff --git a/arch/arm/boards/webasto-ccbv2/lowlevel.c b/arch/arm/boards/webasto-ccbv2/lowlevel.c new file mode 100644 index 0000000000..8529ea3735 --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/lowlevel.c @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Rouven Czerwinski, Pengutronix + */ + +#include <common.h> +#include <debug_ll.h> +#include <firmware.h> +#include <mach/generic.h> +#include <asm/barebox-arm.h> +#include <mach/esdctl.h> +#include <mach/iomux-mx6ul.h> +#include <asm/cache.h> +#include <tee/optee.h> + +#include "ccbv2.h" + +extern char __dtb_z_imx6ul_webasto_ccbv2_start[]; + +static void configure_uart(void) +{ + void __iomem *iomuxbase = (void *)MX6_IOMUXC_BASE_ADDR; + + imx6_ungate_all_peripherals(); + + imx_setup_pad(iomuxbase, MX6_PAD_LCD_DATA16__UART7_DCE_TX); + imx_setup_pad(iomuxbase, MX6_PAD_LCD_DATA17__UART7_DCE_RX); + + imx6_uart_setup((void *)MX6_UART7_BASE_ADDR); + + putc_ll('>'); + +} + +static void noinline start_ccbv2(u32 r0) +{ + int tee_size; + void *tee; + + /* Enable normal/secure r/w for TZC380 region0 */ + writel(0xf0000000, 0x021D0108); + + configure_uart(); + + /* + * Chainloading barebox will pass a device tree within the RAM in r0, + * skip OP-TEE early loading in this case + */ + if(IS_ENABLED(CONFIG_FIRMWARE_CCBV2_OPTEE) + && !(r0 > MX6_MMDC_P0_BASE_ADDR + && r0 < MX6_MMDC_P0_BASE_ADDR + SZ_256M)) { + get_builtin_firmware(ccbv2_optee_bin, &tee, &tee_size); + + memset((void *)OPTEE_OVERLAY_LOCATION, 0, 0x1000); + + start_optee_early(NULL, tee); + } + + imx6ul_barebox_entry(__dtb_z_imx6ul_webasto_ccbv2_start); +} + +ENTRY_FUNCTION(start_imx6ul_ccbv2, r0, r1, r2) +{ + + imx6ul_cpu_lowlevel_init(); + + arm_setup_stack(0x00910000); + + relocate_to_current_adr(); + setup_c(); + barrier(); + + start_ccbv2(r0); +} diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig index 5dcdff0638..16e109464b 100644 --- a/arch/arm/configs/imx_v7_defconfig +++ b/arch/arm/configs/imx_v7_defconfig @@ -37,6 +37,7 @@ CONFIG_MACH_GW_VENTANA=y CONFIG_MACH_CM_FX6=y CONFIG_MACH_ADVANTECH_ROM_742X=y CONFIG_MACH_WARP7=y +CONFIG_MACH_WEBASTO_CCBV2=y CONFIG_MACH_VF610_TWR=y CONFIG_MACH_ZII_RDU1=y CONFIG_MACH_ZII_RDU2=y diff --git a/arch/arm/configs/stm32mp_defconfig b/arch/arm/configs/stm32mp_defconfig index 92bdf5b040..e9f89e69d9 100644 --- a/arch/arm/configs/stm32mp_defconfig +++ b/arch/arm/configs/stm32mp_defconfig @@ -1,5 +1,5 @@ CONFIG_ARCH_STM32MP=y -CONFIG_MACH_STM32MP157C_DK2=y +CONFIG_MACH_STM32MP15XX_DKX=y CONFIG_MACH_LXA_MC1=y CONFIG_MACH_SEEED_ODYSSEY=y CONFIG_THUMB2_BAREBOX=y @@ -12,7 +12,6 @@ CONFIG_MALLOC_TLSF=y CONFIG_KALLSYMS=y CONFIG_RELOCATABLE=y CONFIG_HUSH_FANCY_PROMPT=y -CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y CONFIG_BOOTM_SHOW_TYPE=y @@ -24,10 +23,14 @@ CONFIG_BLSPEC=y CONFIG_CONSOLE_ACTIVATE_NONE=y CONFIG_CONSOLE_ALLOW_COLOR=y CONFIG_PBL_CONSOLE=y +CONFIG_CONSOLE_RATP=y +CONFIG_RATP_CMD_I2C=y +CONFIG_RATP_CMD_GPIO=y CONFIG_PARTITION_DISK_EFI=y # CONFIG_PARTITION_DISK_EFI_GPT_NO_FORCE is not set # CONFIG_PARTITION_DISK_EFI_GPT_COMPARE is not set CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y +CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW_REBOOT_MODE=y CONFIG_RESET_SOURCE=y CONFIG_CMD_DMESG=y CONFIG_LONGHELP=y @@ -83,10 +86,12 @@ CONFIG_CMD_BAREBOX_UPDATE=y CONFIG_CMD_OF_DIFF=y CONFIG_CMD_OF_NODE=y CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OF_OVERLAY=y CONFIG_CMD_OFTREE=y CONFIG_CMD_TIME=y CONFIG_NET=y CONFIG_NET_NETCONSOLE=y +CONFIG_NET_FASTBOOT=y CONFIG_OFDEVICE=y CONFIG_OF_BAREBOX_DRIVERS=y CONFIG_DRIVER_SERIAL_STM32=y @@ -111,6 +116,7 @@ CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_LED_PWM=y CONFIG_LED_GPIO_OF=y +CONFIG_LED_TRIGGERS=y CONFIG_EEPROM_AT24=y CONFIG_KEYBOARD_GPIO=y CONFIG_INPUT_SPECIALKEYS=y @@ -132,11 +138,17 @@ CONFIG_STM32_REMOTEPROC=y CONFIG_RESET_STM32=y CONFIG_GENERIC_PHY=y CONFIG_PHY_STM32_USBPHYC=y +CONFIG_SYSCON_REBOOT_MODE=y CONFIG_FS_EXT4=y CONFIG_FS_TFTP=y CONFIG_FS_NFS=y CONFIG_FS_FAT=y CONFIG_FS_FAT_WRITE=y CONFIG_FS_FAT_LFN=y +CONFIG_FS_PSTORE=y +CONFIG_FS_PSTORE_CONSOLE=y +CONFIG_FS_PSTORE_RAMOOPS=y +CONFIG_FS_SQUASHFS=y +CONFIG_FS_RATP=y CONFIG_ZLIB=y CONFIG_CRC8=y diff --git a/arch/arm/cpu/psci.c b/arch/arm/cpu/psci.c index 436561f864..d1056e0659 100644 --- a/arch/arm/cpu/psci.c +++ b/arch/arm/cpu/psci.c @@ -89,7 +89,7 @@ static unsigned long psci_cpu_suspend(u32 power_state, unsigned long entry, { psci_printf("%s\n", __func__); - if (psci_ops->cpu_off) + if (psci_ops->cpu_suspend) return psci_ops->cpu_suspend(power_state, entry, context_id); return ARM_PSCI_RET_NOT_SUPPORTED; diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index af061bd292..a1e0bb6a41 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -67,6 +67,7 @@ lwl-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-phycard.dtb.o \ imx6dl-phytec-phycore-som-emmc.dtb.o \ imx6dl-phytec-phycore-som-lc-emmc.dtb.o \ imx6ul-phytec-phycore-som-nand.dtb.o \ + imx6ul-phytec-phycore-som-emmc.dtb.o \ imx6ull-phytec-phycore-som-lc-nand.dtb.o \ imx6ull-phytec-phycore-som-nand.dtb.o \ imx6ull-phytec-phycore-som-emmc.dtb.o @@ -110,7 +111,7 @@ lwl-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingb imx6dl-hummingboard2.dtb.o imx6q-hummingboard2.dtb.o \ imx6q-h100.dtb.o lwl-$(CONFIG_MACH_SEEED_ODYSSEY) += stm32mp157c-odyssey.dtb.o -lwl-$(CONFIG_MACH_STM32MP157C_DK2) += stm32mp157c-dk2.dtb.o +lwl-$(CONFIG_MACH_STM32MP15XX_DKX) += stm32mp157c-dk2.dtb.o stm32mp157a-dk1.dtb.o lwl-$(CONFIG_MACH_LXA_MC1) += stm32mp157c-lxa-mc1.dtb.o lwl-$(CONFIG_MACH_SCB9328) += imx1-scb9328.dtb.o lwl-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += imx6q-wandboard.dtb.o imx6dl-wandboard.dtb.o @@ -138,6 +139,7 @@ lwl-$(CONFIG_MACH_VIRT2REAL) += virt2real.dtb.o lwl-$(CONFIG_MACH_VSCOM_BALTOS) += am335x-baltos-minimal.dtb.o lwl-$(CONFIG_MACH_WARP7) += imx7s-warp.dtb.o lwl-$(CONFIG_MACH_VF610_TWR) += vf610-twr.dtb.o +lwl-$(CONFIG_MACH_WEBASTO_CCBV2) += imx6ul-webasto-ccbv2.dtb.o lwl-$(CONFIG_MACH_ZII_RDU1) += \ imx51-zii-rdu1.dtb.o \ imx51-zii-scu2-mezz.dtb.o \ diff --git a/arch/arm/dts/am335x-boneblack.dts b/arch/arm/dts/am335x-boneblack.dts index 80d710b924..c06a532e48 100644 --- a/arch/arm/dts/am335x-boneblack.dts +++ b/arch/arm/dts/am335x-boneblack.dts @@ -85,3 +85,13 @@ status = "okay"; }; }; + +&tscadc { + status = "okay"; + adc { + /* Ch 0-6 are on connector P9. Ch 7 measures the 3.3V rail + * divided by 2 (e.g., it should read 1650). + */ + ti,adc-channels = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>; + }; +}; diff --git a/arch/arm/dts/imx6q-prti6q.dts b/arch/arm/dts/imx6q-prti6q.dts index acdb7b22d9..21e24222a0 100644 --- a/arch/arm/dts/imx6q-prti6q.dts +++ b/arch/arm/dts/imx6q-prti6q.dts @@ -204,7 +204,7 @@ /* Microchip KSZ9031RNX PHY */ rgmii_phy: ethernet-phy@4 { - reg = <4>; + reg = <0>; interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>; reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; diff --git a/arch/arm/dts/imx6q-vicut1.dts b/arch/arm/dts/imx6q-vicut1.dts index 9747b3c62e..9d1d6fa550 100644 --- a/arch/arm/dts/imx6q-vicut1.dts +++ b/arch/arm/dts/imx6q-vicut1.dts @@ -29,7 +29,7 @@ /* Microchip KSZ9031RNX PHY */ rgmii_phy: ethernet-phy@4 { - reg = <4>; + reg = <0>; interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>; reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; diff --git a/arch/arm/dts/imx6qdl-prti6q.dtsi b/arch/arm/dts/imx6qdl-prti6q.dtsi index f2b36553d4..bfc059e34f 100644 --- a/arch/arm/dts/imx6qdl-prti6q.dtsi +++ b/arch/arm/dts/imx6qdl-prti6q.dtsi @@ -27,6 +27,17 @@ }; }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Address will be determined by the bootloader */ + ramoops { + compatible = "ramoops"; + }; + }; + reg_1v8: regulator-1v8 { compatible = "regulator-fixed"; regulator-name = "1v8"; diff --git a/arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts new file mode 100644 index 0000000000..50ce75f12b --- /dev/null +++ b/arch/arm/dts/imx6ul-phytec-phycore-som-emmc.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (C) 2020 PHYTEC Messtechnik GmbH + * Author: Yunus Bas <y.bas@phytec.de> + */ + +/dts-v1/; +#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY +#include CONFIG_BOOTM_FITIMAGE_PUBKEY +#endif +#include <arm/imx6ul.dtsi> +#include "imx6ul-phytec-phycore-som.dtsi" +#include "imx6ul-phytec-state.dtsi" + +/ { + model = "PHYTEC phyCORE-i.MX6 Ultra Light SOM with eMMC"; + compatible = "phytec,imx6ul-pcl063-emmc", "fsl,imx6ul"; +}; + +&fec1 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; +}; + +&state { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&usdhc1 { + status = "okay"; +}; + +&usdhc2 { + status = "okay"; +}; + +&usbotg1 { + status = "okay"; +}; + +&usbotg2 { + status = "okay"; +}; diff --git a/arch/arm/dts/imx6ul-webasto-ccbv2.dts b/arch/arm/dts/imx6ul-webasto-ccbv2.dts new file mode 100644 index 0000000000..93e9445b48 --- /dev/null +++ b/arch/arm/dts/imx6ul-webasto-ccbv2.dts @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2019, Webasto SE + * Author: Johannes Eigner <johannes.eigner@webasto.com> + */ + +/dts-v1/; + +#include "imx6ul-webasto-ccbv2.dtsi" + +/ { + chosen { + environment { + compatible = "barebox,environment"; + device-path = &environment_emmc; + }; + }; + + aliases { + state = &state_emmc; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dt-overlay@84000000 { + reg = <0x84000000 0x100000>; + no-map; + }; + }; + + state_emmc: state { + #address-cells = <1>; + #size-cells = <1>; + compatible = "barebox,state"; + magic = <0x290cf8c6>; + backend-type = "raw"; + backend = <&backend_state_emmc>; + backend-stridesize = <0x200>; + + bootstate { + #address-cells = <1>; + #size-cells = <1>; + + system0 { + #address-cells = <1>; + #size-cells = <1>; + + remaining_attempts@0 { + reg = <0x0 0x4>; + type = "uint32"; + default = <3>; + }; + + priority@4 { + reg = <0x4 0x4>; + type = "uint32"; + default = <20>; + }; + }; + + system1 { + #address-cells = <1>; + #size-cells = <1>; + + remaining_attempts@8 { + reg = <0x8 0x4>; + type = "uint32"; + default = <3>; + }; + + priority@c { + reg = <0xc 0x4>; + type = "uint32"; + default = <21>; + }; + }; + + last_chosen@10 { + reg = <0x10 0x4>; + type = "uint32"; + }; + }; + }; +}; + +&usdhc2 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x100000>; + }; + + environment_emmc: partition@100000 { + label = "barebox-environment"; + reg = <0x100000 0x100000>; + }; + + backend_state_emmc: partition@200000 { + label = "barebox-state"; + reg = <0x200000 0x100000>; + }; + }; +}; + + +&ocotp { + barebox,provide-mac-address = <&fec1 0x620>; +}; + +/* include the FIT public key for verifying on demand */ +#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY +#include CONFIG_BOOTM_FITIMAGE_PUBKEY +#endif diff --git a/arch/arm/dts/imx6ul-webasto-ccbv2.dtsi b/arch/arm/dts/imx6ul-webasto-ccbv2.dtsi new file mode 100644 index 0000000000..829485de32 --- /dev/null +++ b/arch/arm/dts/imx6ul-webasto-ccbv2.dtsi @@ -0,0 +1,469 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Copyright (C) 2019, Webasto SE +// +// Author: Johannes Eigner <johannes.eigner@webasto.com> + +/dts-v1/; + +#include <arm/imx6ul.dtsi> + +/ { + model = "Webasto common communication board version 2"; + compatible = "webasto,imx6ul-ccbv2", "fsl,imx6ul"; + + chosen { + stdout-path = &uart7; + }; + + reg_4v: regulator-4v { + compatible = "regulator-fixed"; + regulator-name = "V_+4V"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <4000000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_wl18xx_vmmc: regulator-wl18xx { + compatible = "regulator-fixed"; + regulator-name = "wl1837"; + vin-supply = <®_4v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio4 22 GPIO_ACTIVE_HIGH>; + startup-delay-us = <70000>; + enable-active-high; + }; + + reg_dp83822_en: regulator-dp83822 { + compatible = "regulator-fixed"; + regulator-name = "dp83822"; + vin-supply = <&vcc_eth>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-supply = <®_dp83822_en>; + phy-handle = <&dp83822i>; + phy-reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + dp83822i: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <100000>; + status = "okay"; + + pmic: mc34pf3000@8 { + compatible = "fsl,pfuze3000"; + reg = <0x08>; + regulators { + sw1a_reg: sw1a { + regulator-name = "V_+3V3_SW1A"; + vin-supply = <®_4v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + vdd_soc_in: sw1b { + regulator-name = "V_+1V4_SW1B"; + vin-supply = <®_4v>; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1475000>; + regulator-ramp-delay = <6250>; + regulator-boot-on; + regulator-always-on; + }; + sw2_reg: sw2 { + regulator-name = "V_+3V3_SW2"; + vin-supply = <®_4v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + vcc_ddr3: sw3 { + regulator-name = "V_+1V35_SW3"; + vin-supply = <®_4v>; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-boot-on; + regulator-always-on; + }; + swbst_reg: swbst { + regulator-name = "V_+5V0_SWBST"; + vin-supply = <®_4v>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + vdd_snvs: vsnvs { + regulator-name = "V_+3V0_SNVS"; + vin-supply = <®_4v>; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + vrefddr: vrefddr { + regulator-name = "V_+0V675_VREFDDR"; + vin-supply = <&vcc_ddr3>; + regulator-boot-on; + regulator-always-on; + }; + /* 3V3 Supply: i.MX6 modules */ + vgen1_reg: vldo1 { + regulator-name = "V_+3V3_LDO1"; + vin-supply = <®_4v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + vgen2_reg: vldo2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + vgen3_reg: vccsd { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3300000>; + }; + vdd_high_in: v33 { + regulator-name = "V_+3V3_V33"; + vin-supply = <®_4v>; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + vcc_eth: vldo3 { + regulator-name = "V_+1V8_LDO3"; + vin-supply = <®_4v>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + vgen6_reg: vldo4 { + regulator-name = "V_+1V8_LDO4"; + vin-supply = <®_4v>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi1>; + cs-gpios = < + &gpio3 26 GPIO_ACTIVE_LOW + &gpio3 10 GPIO_ACTIVE_LOW + &gpio3 12 GPIO_ACTIVE_LOW + >; + status = "okay"; + + cc2520: spi@0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cc2520>; + compatible = "ti,cc2520"; + reg = <0>; + spi-max-frequency = <4000000>; + fifo-gpio = <&gpio3 15 0>; + fifop-gpio = <&gpio3 16 0>; + sfd-gpio = <&gpio3 24 0>; + cca-gpio = <&gpio3 20 0>; + vreg-gpio = <&gpio3 19 0>; + reset-gpio = <&gpio3 23 0>; + vin-supply = <&sw2_reg>; + }; + qca7000: spi@1 { + compatible = "qca,qca7000"; + reg = <1>; + spi-max-frequency = <8000000>; + interrupt-parent = <&gpio4>; + interrupts = <16 0x1>; + spi-cpha; + spi-cpol; + }; + tfr7970: spi@2 { + compatible = "ti,trf7970a"; + reg = <2>; + spi-max-frequency = <2000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_trf7970>; + interrupt-parent = <&gpio3>; + interrupts = <14 0>; + ti,enable-gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>, <&gpio3 17 GPIO_ACTIVE_HIGH>; + vin-supply = <®_4v>; + vdd-io-supply = <&sw2_reg>; + autosuspend-delay = <30000>; + clock-frequency = <27120000>; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&uart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart6>; + uart-has-rtscts; + status = "okay"; + bluetooth { + compatible = "ti,wl1835-st"; + enable-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; + vin-supply = <®_4v>; + }; +}; + +&uart7 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart7>; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + bus-width = <4>; + vmmc-supply = <®_wl18xx_vmmc>; + non-removable; + keep-power-in-suspend; + cap-power-off-card; + max-frequency = <25000000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + wlcore: wlcore@2 { + compatible = "ti,wl1837"; + reg = <2>; + interrupt-parent = <&gpio4>; + interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; + tcxo-clock-frequency = <26000000>; + }; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <8>; + vmmc-supply = <&sw1a_reg>; + no-1-8-v; + non-removable; + no-sd; + no-sdio; + keep-power-in-suspend; + status = "okay"; +}; + +&usbotg1 { + dr_mode = "otg"; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_minipcie>; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +®_arm { + vin-supply = <&vdd_soc_in>; + regulator-allow-bypass; +}; + +®_soc { + vin-supply = <&vdd_soc_in>; + regulator-allow-bypass; +}; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x13030 + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x13030 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x10000 + >; + }; + + pinctrl_minipcie: minipciegrp { + fsl,pins = < + /* HYS=1, 100k PullDown, 50MHz, R0/6 */ + MX6UL_PAD_LCD_HSYNC__GPIO3_IO02 0x13030 + MX6UL_PAD_LCD_VSYNC__GPIO3_IO03 0x13030 + MX6UL_PAD_LCD_RESET__GPIO3_IO04 0x13030 + MX6UL_PAD_LCD_DATA03__GPIO3_IO08 0x13030 + MX6UL_PAD_LCD_DATA04__GPIO3_IO09 0x13030 + >; + }; + + pinctrl_spi1: spi1grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x1b0b0 + MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x1b0b0 + MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x1b0b0 + MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0x17030 + MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x17030 + MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0x17030 + MX6UL_PAD_LCD_DATA13__GPIO3_IO18 0x10030 + >; + }; + + pinctrl_cc2520: cc2520grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA10__GPIO3_IO15 0x13030 + MX6UL_PAD_LCD_DATA11__GPIO3_IO16 0x13030 + MX6UL_PAD_LCD_DATA14__GPIO3_IO19 0x13030 + MX6UL_PAD_LCD_DATA15__GPIO3_IO20 0x13030 + MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x13030 + MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x13030 + MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x17030 + + >; + }; + + pinctrl_trf7970: trf7970grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA07__GPIO3_IO12 0x17030 + MX6UL_PAD_LCD_DATA02__GPIO3_IO07 0x10030 + MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0x10030 + MX6UL_PAD_LCD_DATA09__GPIO3_IO14 0x17000 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6UL_PAD_NAND_READY_B__UART3_DCE_TX 0x1b0b0 + MX6UL_PAD_NAND_CE0_B__UART3_DCE_RX 0x1b0b0 + MX6UL_PAD_NAND_CE1_B__UART3_DCE_CTS 0x1b0b0 + MX6UL_PAD_NAND_CLE__UART3_DCE_RTS 0x1b0b0 + MX6UL_PAD_LCD_DATA08__GPIO3_IO13 0x13030 + MX6UL_PAD_NAND_WP_B__GPIO4_IO11 0x13030 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__UART4_DCE_TX 0x1b0b0 + MX6UL_PAD_LCD_ENABLE__UART4_DCE_RX 0x1b0b0 + >; + }; + + pinctrl_uart6: uart6grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b0 + MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b0 + MX6UL_PAD_CSI_VSYNC__UART6_DCE_RTS 0x1b0b0 + MX6UL_PAD_CSI_HSYNC__UART6_DCE_CTS 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x10030 + MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x00010 + >; + }; + + pinctrl_uart7: uart7grp { + fsl,pins = < + MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x1b0b0 + MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x1b0b0 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x10059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x10059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x10059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x10059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x10059 + MX6UL_PAD_CSI_DATA00__GPIO4_IO21 0x17000 + MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x10030 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100e9 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x100e9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x100e9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x100e9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x100e9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x100e9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x100e9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x100e9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x100e9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x100e9 + MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x10030 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__WDOG1_WDOG_B 0x00b0 + >; + }; +}; diff --git a/arch/arm/dts/imx6ull-phytec-phycore-som-emmc.dts b/arch/arm/dts/imx6ull-phytec-phycore-som-emmc.dts index 2201b4c1b2..afd99a3fd9 100644 --- a/arch/arm/dts/imx6ull-phytec-phycore-som-emmc.dts +++ b/arch/arm/dts/imx6ull-phytec-phycore-som-emmc.dts @@ -10,6 +10,7 @@ #endif #include <arm/imx6ull.dtsi> #include "imx6ul-phytec-phycore-som.dtsi" +#include "imx6ul-phytec-state.dtsi" / { model = "PHYTEC phyCORE-i.MX6 ULL SOM with eMMC"; @@ -24,6 +25,10 @@ status = "okay"; }; +&state { + status = "okay"; +}; + &uart1 { status = "okay"; }; diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts index f2cafae66b..7a907cc314 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dts +++ b/arch/arm/dts/stm32mp157a-dk1.dts @@ -5,4 +5,4 @@ */ #include <arm/stm32mp157a-dk1.dts> -#include "stm32mp157a-dk1.dtsi" +#include "stm32mp15xx-dkx.dtsi" diff --git a/arch/arm/dts/stm32mp157c-dk2.dts b/arch/arm/dts/stm32mp157c-dk2.dts index 6e73162ea4..98525abd71 100644 --- a/arch/arm/dts/stm32mp157c-dk2.dts +++ b/arch/arm/dts/stm32mp157c-dk2.dts @@ -5,4 +5,4 @@ */ #include <arm/stm32mp157c-dk2.dts> -#include "stm32mp157a-dk1.dtsi" +#include "stm32mp15xx-dkx.dtsi" diff --git a/arch/arm/dts/stm32mp157a-dk1.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi index 173e64e04c..173e64e04c 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dtsi +++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi diff --git a/arch/arm/lib32/bootm.c b/arch/arm/lib32/bootm.c index c33ecc2ad8..ad807fb1d6 100644 --- a/arch/arm/lib32/bootm.c +++ b/arch/arm/lib32/bootm.c @@ -745,8 +745,8 @@ static struct binfmt_hook binfmt_barebox_hook = { .exec = "bootm", }; -BAREBOX_MAGICVAR_NAMED(global_bootm_boot_atag, global.bootm.boot_atag, - "If true, ignore device tree and boot using ATAGs"); +BAREBOX_MAGICVAR(global.bootm.boot_atag, + "If true, ignore device tree and boot using ATAGs"); static int armlinux_register_image_handler(void) { diff --git a/arch/arm/mach-at91/at91_pmc_ll.c b/arch/arm/mach-at91/at91_pmc_ll.c index 9205322db9..e561f20755 100644 --- a/arch/arm/mach-at91/at91_pmc_ll.c +++ b/arch/arm/mach-at91/at91_pmc_ll.c @@ -88,6 +88,8 @@ void at91_pmc_init(void __iomem *pmc_base, unsigned int flags) tmp &= ~AT91_PMC_OSCBYPASS; tmp &= ~AT91_PMC_KEY_MASK; tmp |= AT91_PMC_KEY; + if (flags & AT91_PMC_LL_FLAG_MCK_BYPASS) + tmp |= AT91_PMC_OSCBYPASS; at91_pmc_write(AT91_CKGR_MOR, tmp); tmp = at91_pmc_read(AT91_CKGR_MOR); diff --git a/arch/arm/mach-at91/ddramc.c b/arch/arm/mach-at91/ddramc.c index a241ea9f0a..c3ef6b0090 100644 --- a/arch/arm/mach-at91/ddramc.c +++ b/arch/arm/mach-at91/ddramc.c @@ -52,8 +52,4 @@ static struct driver_d sama5_ddr_driver = { .of_compatible = sama5_ddr_dt_ids, }; -static int sama5_ddr_init(void) -{ - return platform_driver_register(&sama5_ddr_driver); -} -mem_initcall(sama5_ddr_init); +mem_platform_driver(sama5_ddr_driver); diff --git a/arch/arm/mach-at91/include/mach/at91_pmc_ll.h b/arch/arm/mach-at91/include/mach/at91_pmc_ll.h index 6ec3ae0852..85896a01d5 100644 --- a/arch/arm/mach-at91/include/mach/at91_pmc_ll.h +++ b/arch/arm/mach-at91/include/mach/at91_pmc_ll.h @@ -16,6 +16,7 @@ #define AT91_PMC_LL_FLAG_H32MXDIV (1 << 3) #define AT91_PMC_LL_FLAG_PMC_UTMI (1 << 4) #define AT91_PMC_LL_FLAG_GCSR (1 << 5) +#define AT91_PMC_LL_FLAG_MCK_BYPASS (1 << 6) #define AT91_PMC_LL_AT91RM9200 (0) #define AT91_PMC_LL_AT91SAM9260 (0) @@ -30,6 +31,10 @@ #define AT91_PMC_LL_SAMA5D2 (AT91_PMC_LL_FLAG_SAM9X5_PMC | \ AT91_PMC_LL_FLAG_MEASURE_XTAL | \ AT91_PMC_LL_FLAG_PMC_UTMI) +/* This assumes a crystal on both XIN and XOUT. If your board + * instead has an extenal oscillator on XIN only, + * AT91_PMC_LL_FLAG_MCK_BYPASS needs to be OR`ed in as well + */ #define AT91_PMC_LL_SAMA5D3 (AT91_PMC_LL_FLAG_SAM9X5_PMC | \ AT91_PMC_LL_FLAG_DISABLE_RC | \ AT91_PMC_LL_FLAG_PMC_UTMI) diff --git a/arch/arm/mach-at91/include/mach/at91_wdt.h b/arch/arm/mach-at91/include/mach/at91_wdt.h index d295d35d1b..04924742a5 100644 --- a/arch/arm/mach-at91/include/mach/at91_wdt.h +++ b/arch/arm/mach-at91/include/mach/at91_wdt.h @@ -41,7 +41,7 @@ * Copyright (c) 2006, Atmel Corporation */ -#include <asm-generic/io.h> +#include <asm/io.h> static inline void at91_wdt_disable(void __iomem *wdt_base) { diff --git a/arch/arm/mach-at91/sam9_smc.c b/arch/arm/mach-at91/sam9_smc.c index 05584c0711..813c2a0d94 100644 --- a/arch/arm/mach-at91/sam9_smc.c +++ b/arch/arm/mach-at91/sam9_smc.c @@ -200,8 +200,4 @@ static struct driver_d at91sam9_smc_driver = { .probe = at91sam9_smc_probe, }; -static int at91sam9_smc_init(void) -{ - return platform_driver_register(&at91sam9_smc_driver); -} -coredevice_initcall(at91sam9_smc_init); +coredevice_platform_driver(at91sam9_smc_driver); diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c index 22abbb0ca5..9839683d03 100644 --- a/arch/arm/mach-bcm283x/mbox.c +++ b/arch/arm/mach-bcm283x/mbox.c @@ -179,8 +179,4 @@ static struct driver_d bcm2835_mbox_driver = { .probe = bcm2835_mbox_probe, }; -static int __init bcm2835_mbox_init(void) -{ - return platform_driver_register(&bcm2835_mbox_driver); -} -core_initcall(bcm2835_mbox_init); +core_platform_driver(bcm2835_mbox_driver); diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 0fffde46eb..dd49537fd5 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -146,7 +146,7 @@ config ARCH_IMX6 select ARCH_HAS_IMX_GPT select CPU_V7 select PINCTRL_IMX_IOMUX_V3 - select OFTREE + select OFDEVICE select COMMON_CLK_OF_PROVIDER select HW_HAS_PCI @@ -157,8 +157,6 @@ config ARCH_IMX6SL config ARCH_IMX6SX bool select ARCH_IMX6 - select OFTREE - select COMMON_CLK_OF_PROVIDER config ARCH_IMX6UL bool @@ -340,6 +338,8 @@ config MACH_PHYTEC_SOM_IMX6 bool "Phytec phyCARD-i.MX6 and phyFLEX-i.MX6" select ARCH_IMX6 select ARCH_IMX6UL + select I2C + select I2C_IMX config MACH_PROTONIC_IMX6 bool "Protonic-Holland i.MX6 based boards" @@ -449,6 +449,7 @@ config MACH_GW_VENTANA config MACH_CM_FX6 bool "CM FX6" select ARCH_IMX6 + select MCI_IMX_ESDHC_PBL config MACH_ADVANTECH_ROM_742X bool "Advantech ROM 742X" @@ -577,6 +578,11 @@ config MACH_DIGI_CCIMX6ULSBCPRO select ARCH_IMX6UL select ARM_USE_COMPRESSED_DTB +config MACH_WEBASTO_CCBV2 + bool "Webasto Common Communication Board V2" + select ARCH_IMX6UL + select ARM_USE_COMPRESSED_DTB + endif # ---------------------------------------------------------- diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c index cc5d3a8359..426a96a3c4 100644 --- a/arch/arm/mach-imx/esdctl.c +++ b/arch/arm/mach-imx/esdctl.c @@ -703,12 +703,7 @@ static struct driver_d imx_esdctl_driver = { .of_compatible = DRV_OF_COMPAT(imx_esdctl_dt_ids), }; -static int imx_esdctl_init(void) -{ - return platform_driver_register(&imx_esdctl_driver); -} - -mem_initcall(imx_esdctl_init); +mem_platform_driver(imx_esdctl_driver); /* * The i.MX SoCs usually have two SDRAM chipselects. The following diff --git a/arch/arm/mach-imx/iim.c b/arch/arm/mach-imx/iim.c index 2f9ffbd271..b60c5de7e1 100644 --- a/arch/arm/mach-imx/iim.c +++ b/arch/arm/mach-imx/iim.c @@ -586,10 +586,4 @@ static struct driver_d imx_iim_driver = { .of_compatible = DRV_OF_COMPAT(imx_iim_dt_ids), }; -static int imx_iim_init(void) -{ - platform_driver_register(&imx_iim_driver); - - return 0; -} -coredevice_initcall(imx_iim_init); +coredevice_platform_driver(imx_iim_driver); diff --git a/arch/arm/mach-imx/include/mach/imx6-regs.h b/arch/arm/mach-imx/include/mach/imx6-regs.h index 1ba22b5bc6..7350ffd16f 100644 --- a/arch/arm/mach-imx/include/mach/imx6-regs.h +++ b/arch/arm/mach-imx/include/mach/imx6-regs.h @@ -115,6 +115,7 @@ #define MX6_IP2APB_USBPHY1_BASE_ADDR (MX6_AIPS2_OFF_BASE_ADDR + 0x78000) #define MX6_IP2APB_USBPHY2_BASE_ADDR (MX6_AIPS2_OFF_BASE_ADDR + 0x7C000) +#define MX6_UART7_BASE_ADDR 0x02018000 #define MX6_SATA_BASE_ADDR 0x02200000 #define MX6_MMDC_PORT01_BASE_ADDR 0x10000000 diff --git a/arch/arm/mach-imx/include/mach/iomux-mx6ul.h b/arch/arm/mach-imx/include/mach/iomux-mx6ul.h new file mode 100644 index 0000000000..b7727191c2 --- /dev/null +++ b/arch/arm/mach-imx/include/mach/iomux-mx6ul.h @@ -0,0 +1,1064 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + */ + +#ifndef __ASM_ARCH_IMX6UL_PINS_H__ +#define __ASM_ARCH_IMX6UL_PINS_H__ + +#include <mach/iomux-v3.h> + +enum { + + MX6_PAD_BOOT_MODE0__GPIO5_IO10 = IOMUX_PAD(0x02A0, 0x0014, 5, 0x0000, 0, 0), + MX6_PAD_BOOT_MODE1__GPIO5_IO11 = IOMUX_PAD(0x02A4, 0x0018, 5, 0x0000, 0, 0), + /* + * The TAMPER Pin can be used for GPIO, which depends on + * fusemap TAMPER_PIN_DISABLE[1:0] settings. + */ + MX6_PAD_SNVS_TAMPER0__GPIO5_IO00 = IOMUX_PAD(0x02A8, 0x001C, 5, 0x0000, 0, 0), + MX6_PAD_SNVS_TAMPER1__GPIO5_IO01 = IOMUX_PAD(0x02AC, 0x0020, 5, 0x0000, 0, 0), + MX6_PAD_SNVS_TAMPER2__GPIO5_IO02 = IOMUX_PAD(0x02B0, 0x0024, 5, 0x0000, 0, 0), + MX6_PAD_SNVS_TAMPER3__GPIO5_IO03 = IOMUX_PAD(0x02B4, 0x0028, 5, 0x0000, 0, 0), + MX6_PAD_SNVS_TAMPER4__GPIO5_IO04 = IOMUX_PAD(0x02B8, 0x002C, 5, 0x0000, 0, 0), + MX6_PAD_SNVS_TAMPER5__GPIO5_IO05 = IOMUX_PAD(0x02BC, 0x0030, 5, 0x0000, 0, 0), + MX6_PAD_SNVS_TAMPER6__GPIO5_IO06 = IOMUX_PAD(0x02C0, 0x0034, 5, 0x0000, 0, 0), + MX6_PAD_SNVS_TAMPER7__GPIO5_IO07 = IOMUX_PAD(0x02C4, 0x0038, 5, 0x0000, 0, 0), + MX6_PAD_SNVS_TAMPER8__GPIO5_IO08 = IOMUX_PAD(0x02C8, 0x003C, 5, 0x0000, 0, 0), + MX6_PAD_SNVS_TAMPER9__GPIO5_IO09 = IOMUX_PAD(0x02CC, 0x0040, 5, 0x0000, 0, 0), + + MX6_PAD_JTAG_MOD__SJC_MOD = IOMUX_PAD(0x02D0, 0x0044, 0, 0x0000, 0, 0), + MX6_PAD_JTAG_MOD__GPT2_CLK = IOMUX_PAD(0x02D0, 0x0044, 1, 0x05A0, 0, 0), + MX6_PAD_JTAG_MOD__SPDIF_OUT = IOMUX_PAD(0x02D0, 0x0044, 2, 0x0000, 0, 0), + MX6_PAD_JTAG_MOD__ENET1_REF_CLK_25M = IOMUX_PAD(0x02D0, 0x0044, 3, 0x0000, 0, 0), + MX6_PAD_JTAG_MOD__CCM_PMIC_RDY = IOMUX_PAD(0x02D0, 0x0044, 4, 0x04C0, 0, 0), + MX6_PAD_JTAG_MOD__GPIO1_IO10 = IOMUX_PAD(0x02D0, 0x0044, 5, 0x0000, 0, 0), + MX6_PAD_JTAG_MOD__SDMA_EXT_EVENT00 = IOMUX_PAD(0x02D0, 0x0044, 6, 0x0610, 0, 0), + + MX6_PAD_JTAG_TMS__SJC_TMS = IOMUX_PAD(0x02D4, 0x0048, 0, 0x0000, 0, 0), + MX6_PAD_JTAG_TMS__GPT2_CAPTURE1 = IOMUX_PAD(0x02D4, 0x0048, 1, 0x0598, 0, 0), + MX6_PAD_JTAG_TMS__SAI2_MCLK = IOMUX_PAD(0x02D4, 0x0048, 2, 0x05F0, 0, 0), + MX6_PAD_JTAG_TMS__CCM_CLKO1 = IOMUX_PAD(0x02D4, 0x0048, 3, 0x0000, 0, 0), + MX6_PAD_JTAG_TMS__CCM_WAIT = IOMUX_PAD(0x02D4, 0x0048, 4, 0x0000, 0, 0), + MX6_PAD_JTAG_TMS__GPIO1_IO11 = IOMUX_PAD(0x02D4, 0x0048, 5, 0x0000, 0, 0), + MX6_PAD_JTAG_TMS__SDMA_EXT_EVENT01 = IOMUX_PAD(0x02D4, 0x0048, 6, 0x0614, 0, 0), + MX6_PAD_JTAG_TMS__EPIT1_OUT = IOMUX_PAD(0x02D4, 0x0048, 8, 0x0000, 0, 0), + + MX6_PAD_JTAG_TDO__SJC_TDO = IOMUX_PAD(0x02D8, 0x004C, 0, 0x0000, 0, 0), + MX6_PAD_JTAG_TDO__GPT2_CAPTURE2 = IOMUX_PAD(0x02D8, 0x004C, 1, 0x059C, 0, 0), + MX6_PAD_JTAG_TDO__SAI2_TX_SYNC = IOMUX_PAD(0x02D8, 0x004C, 2, 0x05FC, 0, 0), + MX6_PAD_JTAG_TDO__CCM_CLKO2 = IOMUX_PAD(0x02D8, 0x004C, 3, 0x0000, 0, 0), + MX6_PAD_JTAG_TDO__CCM_STOP = IOMUX_PAD(0x02D8, 0x004C, 4, 0x0000, 0, 0), + MX6_PAD_JTAG_TDO__GPIO1_IO12 = IOMUX_PAD(0x02D8, 0x004C, 5, 0x0000, 0, 0), + MX6_PAD_JTAG_TDO__MQS_RIGHT = IOMUX_PAD(0x02D8, 0x004C, 6, 0x0000, 0, 0), + MX6_PAD_JTAG_TDO__EPIT2_OUT = IOMUX_PAD(0x02D8, 0x004C, 8, 0x0000, 0, 0), + + MX6_PAD_JTAG_TDI__SJC_TDI = IOMUX_PAD(0x02DC, 0x0050, 0, 0x0000, 0, 0), + MX6_PAD_JTAG_TDI__GPT2_COMPARE1 = IOMUX_PAD(0x02DC, 0x0050, 1, 0x0000, 0, 0), + MX6_PAD_JTAG_TDI__SAI2_TX_BCLK = IOMUX_PAD(0x02DC, 0x0050, 2, 0x05F8, 0, 0), + MX6_PAD_JTAG_TDI__PWM6_OUT = IOMUX_PAD(0x02DC, 0x0050, 4, 0x0000, 0, 0), + MX6_PAD_JTAG_TDI__GPIO1_IO13 = IOMUX_PAD(0x02DC, 0x0050, 5, 0x0000, 0, 0), + MX6_PAD_JTAG_TDI__MQS_LEFT = IOMUX_PAD(0x02DC, 0x0050, 6, 0x0000, 0, 0), + MX6_PAD_JTAG_TDI__SIM1_POWER_FAIL = IOMUX_PAD(0x02DC, 0x0050, 8, 0x0000, 0, 0), + + MX6_PAD_JTAG_TCK__SJC_TCK = IOMUX_PAD(0x02E0, 0x0054, 0, 0x0000, 0, 0), + MX6_PAD_JTAG_TCK__GPT2_COMPARE2 = IOMUX_PAD(0x02E0, 0x0054, 1, 0x0000, 0, 0), + MX6_PAD_JTAG_TCK__SAI2_RX_DATA = IOMUX_PAD(0x02E0, 0x0054, 2, 0x05F4, 0, 0), + MX6_PAD_JTAG_TCK__PWM7_OUT = IOMUX_PAD(0x02E0, 0x0054, 4, 0x0000, 0, 0), + MX6_PAD_JTAG_TCK__GPIO1_IO14 = IOMUX_PAD(0x02E0, 0x0054, 5, 0x0000, 0, 0), + MX6_PAD_JTAG_TCK__SIM2_POWER_FAIL = IOMUX_PAD(0x02E0, 0x0054, 8, 0x0000, 0, 0), + + MX6_PAD_JTAG_TRST_B__SJC_TRSTB = IOMUX_PAD(0x02E4, 0x0058, 0, 0x0000, 0, 0), + MX6_PAD_JTAG_TRST_B__GPT2_COMPARE3 = IOMUX_PAD(0x02E4, 0x0058, 1, 0x0000, 0, 0), + MX6_PAD_JTAG_TRST_B__SAI2_TX_DATA = IOMUX_PAD(0x02E4, 0x0058, 2, 0x0000, 0, 0), + MX6_PAD_JTAG_TRST_B__PWM8_OUT = IOMUX_PAD(0x02E4, 0x0058, 4, 0x0000, 0, 0), + MX6_PAD_JTAG_TRST_B__GPIO1_IO15 = IOMUX_PAD(0x02E4, 0x0058, 5, 0x0000, 0, 0), + MX6_PAD_JTAG_TRST_B__CAAM_RNG_OSC_OBS = IOMUX_PAD(0x02E4, 0x0058, 8, 0x0000, 0, 0), + + MX6_PAD_GPIO1_IO00__I2C2_SCL = IOMUX_PAD(0x02E8, 0x005C, IOMUX_CONFIG_SION | 0, 0x05AC, 1, 0), + MX6_PAD_GPIO1_IO00__GPT1_CAPTURE1 = IOMUX_PAD(0x02E8, 0x005C, 1, 0x058C, 0, 0), + MX6_PAD_GPIO1_IO00__ANATOP_OTG1_ID = IOMUX_PAD(0x02E8, 0x005C, 2, 0x04B8, 0, 0), + MX6_PAD_GPIO1_IO00__ENET1_REF_CLK1 = IOMUX_PAD(0x02E8, 0x005C, 3, 0x0574, 0, 0), + MX6_PAD_GPIO1_IO00__MQS_RIGHT = IOMUX_PAD(0x02E8, 0x005C, 4, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO00__GPIO1_IO00 = IOMUX_PAD(0x02E8, 0x005C, 5, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO00__ENET1_1588_EVENT0_IN = IOMUX_PAD(0x02E8, 0x005C, 6, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO00__SRC_SYSTEM_RESET = IOMUX_PAD(0x02E8, 0x005C, 7, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO00__WDOG3_WDOG_B = IOMUX_PAD(0x02E8, 0x005C, 8, 0x0000, 0, 0), + + MX6_PAD_GPIO1_IO01__I2C2_SDA = IOMUX_PAD(0x02EC, 0x0060, IOMUX_CONFIG_SION | 0, 0x05B0, 1, 0), + MX6_PAD_GPIO1_IO01__GPT1_COMPARE1 = IOMUX_PAD(0x02EC, 0x0060, 1, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO01__USB_OTG1_OC = IOMUX_PAD(0x02EC, 0x0060, 2, 0x0664, 0, 0), + MX6_PAD_GPIO1_IO01__ENET2_REF_CLK2 = IOMUX_PAD(0x02EC, 0x0060, 3, 0x057C, 0, 0), + MX6_PAD_GPIO1_IO01__MQS_LEFT = IOMUX_PAD(0x02EC, 0x0060, 4, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO01__GPIO1_IO01 = IOMUX_PAD(0x02EC, 0x0060, 5, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO01__ENET1_1588_EVENT0_OUT = IOMUX_PAD(0x02EC, 0x0060, 6, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO01__SRC_EARLY_RESET = IOMUX_PAD(0x02EC, 0x0060, 7, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO01__WDOG1_WDOG_B = IOMUX_PAD(0x02EC, 0x0060, 8, 0x0000, 0, 0), + + MX6_PAD_GPIO1_IO02__I2C1_SCL = IOMUX_PAD(0x02F0, 0x0064, IOMUX_CONFIG_SION | 0, 0x05A4, 0, 0), + MX6_PAD_GPIO1_IO02__GPT1_COMPARE2 = IOMUX_PAD(0x02F0, 0x0064, 1, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO02__USB_OTG2_PWR = IOMUX_PAD(0x02F0, 0x0064, 2, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO02__ENET1_REF_CLK_25M = IOMUX_PAD(0x02F0, 0x0064, 3, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO02__USDHC1_WP = IOMUX_PAD(0x02F0, 0x0064, 4, 0x066C, 0, 0), + MX6_PAD_GPIO1_IO02__GPIO1_IO02 = IOMUX_PAD(0x02F0, 0x0064, 5, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO02__SDMA_EXT_EVENT00 = IOMUX_PAD(0x02F0, 0x0064, 6, 0x0610, 1, 0), + MX6_PAD_GPIO1_IO02__SRC_ANY_PU_RESET = IOMUX_PAD(0x02F0, 0x0064, 7, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO02__UART1_DCE_TX = IOMUX_PAD(0x02F0, 0x0064, 8, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO02__UART1_DTE_RX = IOMUX_PAD(0x02F0, 0x0064, 8, 0x0624, 0, 0), + + MX6_PAD_GPIO1_IO03__I2C1_SDA = IOMUX_PAD(0x02F4, 0x0068, IOMUX_CONFIG_SION | 0, 0x05A8, 1, 0), + MX6_PAD_GPIO1_IO03__GPT1_COMPARE3 = IOMUX_PAD(0x02F4, 0x0068, 1, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO03__USB_OTG2_OC = IOMUX_PAD(0x02F4, 0x0068, 2, 0x0660, 0, 0), + MX6_PAD_GPIO1_IO03__USDHC1_CD_B = IOMUX_PAD(0x02F4, 0x0068, 4, 0x0668, 0, 0), + MX6_PAD_GPIO1_IO03__GPIO1_IO03 = IOMUX_PAD(0x02F4, 0x0068, 5, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO03__CCM_DI0_EXT_CLK = IOMUX_PAD(0x02F4, 0x0068, 6, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO03__SRC_TESTER_ACK = IOMUX_PAD(0x02F4, 0x0068, 7, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO03__UART1_DCE_RX = IOMUX_PAD(0x02F4, 0x0068, 8, 0x0624, 1, 0), + MX6_PAD_GPIO1_IO03__UART1_DTE_TX = IOMUX_PAD(0x02F4, 0x0068, 8, 0x0000, 0, 0), + + MX6_PAD_GPIO1_IO04__ENET1_REF_CLK1 = IOMUX_PAD(0x02F8, 0x006C, 0, 0x0574, 1, 0), + MX6_PAD_GPIO1_IO04__PWM3_OUT = IOMUX_PAD(0x02F8, 0x006C, 1, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO04__USB_OTG1_PWR = IOMUX_PAD(0x02F8, 0x006C, 2, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO04__USDHC1_RESET_B = IOMUX_PAD(0x02F8, 0x006C, 4, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO04__GPIO1_IO04 = IOMUX_PAD(0x02F8, 0x006C, 5, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO04__ENET2_1588_EVENT0_IN = IOMUX_PAD(0x02F8, 0x006C, 6, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO04__UART5_DCE_TX = IOMUX_PAD(0x02F8, 0x006C, 8, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO04__UART5_DTE_RX = IOMUX_PAD(0x02F8, 0x006C, 8, 0x0644, 2, 0), + + MX6_PAD_GPIO1_IO05__ENET2_REF_CLK2 = IOMUX_PAD(0x02FC, 0x0070, 0, 0x057C, 1, 0), + MX6_PAD_GPIO1_IO05__PWM4_OUT = IOMUX_PAD(0x02FC, 0x0070, 1, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO05__ANATOP_OTG2_ID = IOMUX_PAD(0x02FC, 0x0070, 2, 0x04BC, 0, 0), + MX6_PAD_GPIO1_IO05__CSI_FIELD = IOMUX_PAD(0x02FC, 0x0070, 3, 0x0530, 0, 0), + MX6_PAD_GPIO1_IO05__USDHC1_VSELECT = IOMUX_PAD(0x02FC, 0x0070, 4, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO05__GPIO1_IO05 = IOMUX_PAD(0x02FC, 0x0070, 5, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO05__ENET2_1588_EVENT0_OUT = IOMUX_PAD(0x02FC, 0x0070, 6, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO05__UART5_DCE_RX = IOMUX_PAD(0x02FC, 0x0070, 8, 0x0644, 3, 0), + MX6_PAD_GPIO1_IO05__UART5_DTE_TX = IOMUX_PAD(0x02FC, 0x0070, 8, 0x0000, 0, 0), + + MX6_PAD_GPIO1_IO06__ENET1_MDIO = IOMUX_PAD(0x0300, 0x0074, 0, 0x0578, 0, 0), + MX6_PAD_GPIO1_IO06__ENET2_MDIO = IOMUX_PAD(0x0300, 0x0074, 1, 0x0580, 0, 0), + MX6_PAD_GPIO1_IO06__USB_OTG_PWR_WAKE = IOMUX_PAD(0x0300, 0x0074, 2, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO06__CSI_MCLK = IOMUX_PAD(0x0300, 0x0074, 3, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO06__USDHC2_WP = IOMUX_PAD(0x0300, 0x0074, 4, 0x069C, 0, 0), + MX6_PAD_GPIO1_IO06__GPIO1_IO06 = IOMUX_PAD(0x0300, 0x0074, 5, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO06__CCM_WAIT = IOMUX_PAD(0x0300, 0x0074, 6, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO06__CCM_REF_EN_B = IOMUX_PAD(0x0300, 0x0074, 7, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO06__UART1_DCE_CTS = IOMUX_PAD(0x0300, 0x0074, 8, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO06__UART1_DTE_RTS = IOMUX_PAD(0x0300, 0x0074, 8, 0x0620, 0, 0), + + MX6_PAD_GPIO1_IO07__ENET1_MDC = IOMUX_PAD(0x0304, 0x0078, 0, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO07__ENET2_MDC = IOMUX_PAD(0x0304, 0x0078, 1, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO07__USB_OTG_HOST_MODE = IOMUX_PAD(0x0304, 0x0078, 2, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO07__CSI_PIXCLK = IOMUX_PAD(0x0304, 0x0078, 3, 0x0528, 0, 0), + MX6_PAD_GPIO1_IO07__USDHC2_CD_B = IOMUX_PAD(0x0304, 0x0078, 4, 0x0674, 1, 0), + MX6_PAD_GPIO1_IO07__GPIO1_IO07 = IOMUX_PAD(0x0304, 0x0078, 5, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO07__CCM_STOP = IOMUX_PAD(0x0304, 0x0078, 6, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO07__UART1_DCE_RTS = IOMUX_PAD(0x0304, 0x0078, 8, 0x0620, 1, 0), + MX6_PAD_GPIO1_IO07__UART1_DTE_CTS = IOMUX_PAD(0x0304, 0x0078, 8, 0x0000, 0, 0), + + MX6_PAD_GPIO1_IO08__PWM1_OUT = IOMUX_PAD(0x0308, 0x007C, 0, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO08__WDOG1_WDOG_B = IOMUX_PAD(0x0308, 0x007C, 1, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO08__SPDIF_OUT = IOMUX_PAD(0x0308, 0x007C, 2, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO08__CSI_VSYNC = IOMUX_PAD(0x0308, 0x007C, 3, 0x052C, 1, 0), + MX6_PAD_GPIO1_IO08__USDHC2_VSELECT = IOMUX_PAD(0x0308, 0x007C, 4, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO08__GPIO1_IO08 = IOMUX_PAD(0x0308, 0x007C, 5, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO08__CCM_PMIC_RDY = IOMUX_PAD(0x0308, 0x007C, 6, 0x04C0, 1, 0), + MX6_PAD_GPIO1_IO08__UART5_DCE_RTS = IOMUX_PAD(0x0308, 0x007C, 8, 0x0640, 1, 0), + MX6_PAD_GPIO1_IO08__UART5_DTE_CTS = IOMUX_PAD(0x0308, 0x007C, 8, 0x0000, 0, 0), + + MX6_PAD_GPIO1_IO09__PWM2_OUT = IOMUX_PAD(0x030C, 0x0080, 0, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO09__WDOG1_WDOG_ANY = IOMUX_PAD(0x030C, 0x0080, 1, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO09__SPDIF_IN = IOMUX_PAD(0x030C, 0x0080, 2, 0x0618, 0, 0), + MX6_PAD_GPIO1_IO09__CSI_HSYNC = IOMUX_PAD(0x030C, 0x0080, 3, 0x0524, 1, 0), + MX6_PAD_GPIO1_IO09__USDHC2_RESET_B = IOMUX_PAD(0x030C, 0x0080, 4, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO09__GPIO1_IO09 = IOMUX_PAD(0x030C, 0x0080, 5, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO09__USDHC1_RESET_B = IOMUX_PAD(0x030C, 0x0080, 6, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO09__UART5_DCE_CTS = IOMUX_PAD(0x030C, 0x0080, 8, 0x0000, 0, 0), + MX6_PAD_GPIO1_IO09__UART5_DTE_RTS = IOMUX_PAD(0x030C, 0x0080, 8, 0x0640, 2, 0), + + MX6_PAD_UART1_TX_DATA__UART1_DCE_TX = IOMUX_PAD(0x0310, 0x0084, 0, 0x0000, 0, 0), + + MX6_PAD_UART1_TX_DATA__UART1_DTE_RX = IOMUX_PAD(0x0310, 0x0084, 0, 0x0624, 2, 0), + MX6_PAD_UART1_TX_DATA__ENET1_RDATA02 = IOMUX_PAD(0x0310, 0x0084, 1, 0x0000, 0, 0), + MX6_PAD_UART1_TX_DATA__I2C3_SCL = IOMUX_PAD(0x0310, 0x0084, IOMUX_CONFIG_SION | 2, 0x05B4, 0, 0), + MX6_PAD_UART1_TX_DATA__CSI_DATA02 = IOMUX_PAD(0x0310, 0x0084, 3, 0x04C4, 1, 0), + MX6_PAD_UART1_TX_DATA__GPT1_COMPARE1 = IOMUX_PAD(0x0310, 0x0084, 4, 0x0000, 0, 0), + MX6_PAD_UART1_TX_DATA__GPIO1_IO16 = IOMUX_PAD(0x0310, 0x0084, 5, 0x0000, 0, 0), + MX6_PAD_UART1_TX_DATA__SPDIF_OUT = IOMUX_PAD(0x0310, 0x0084, 8, 0x0000, 0, 0), + + MX6_PAD_UART1_RX_DATA__UART1_DCE_RX = IOMUX_PAD(0x0314, 0x0088, 0, 0x0624, 3, 0), + + MX6_PAD_UART1_RX_DATA__UART1_DTE_TX = IOMUX_PAD(0x0314, 0x0088, 0, 0x0000, 0, 0), + MX6_PAD_UART1_RX_DATA__ENET1_RDATA03 = IOMUX_PAD(0x0314, 0x0088, 1, 0x0000, 0, 0), + MX6_PAD_UART1_RX_DATA__I2C3_SDA = IOMUX_PAD(0x0314, 0x0088, IOMUX_CONFIG_SION | 2, 0x05B8, 0, 0), + MX6_PAD_UART1_RX_DATA__CSI_DATA03 = IOMUX_PAD(0x0314, 0x0088, 3, 0x04C8, 1, 0), + MX6_PAD_UART1_RX_DATA__GPT1_CLK = IOMUX_PAD(0x0314, 0x0088, 4, 0x0594, 0, 0), + MX6_PAD_UART1_RX_DATA__GPIO1_IO17 = IOMUX_PAD(0x0314, 0x0088, 5, 0x0000, 0, 0), + MX6_PAD_UART1_RX_DATA__SPDIF_IN = IOMUX_PAD(0x0314, 0x0088, 8, 0x0618, 1, 0), + + MX6_PAD_UART1_CTS_B__UART1_DCE_CTS = IOMUX_PAD(0x0318, 0x008C, 0, 0x0000, 0, 0), + + MX6_PAD_UART1_CTS_B__UART1_DTE_RTS = IOMUX_PAD(0x0318, 0x008C, 0, 0x0620, 2, 0), + MX6_PAD_UART1_CTS_B__ENET1_RX_CLK = IOMUX_PAD(0x0318, 0x008C, 1, 0x0000, 0, 0), + MX6_PAD_UART1_CTS_B__USDHC1_WP = IOMUX_PAD(0x0318, 0x008C, 2, 0x066C, 1, 0), + MX6_PAD_UART1_CTS_B__CSI_DATA04 = IOMUX_PAD(0x0318, 0x008C, 3, 0x04D8, 0, 0), + MX6_PAD_UART1_CTS_B__ENET2_1588_EVENT1_IN = IOMUX_PAD(0x0318, 0x008C, 4, 0x0000, 0, 0), + MX6_PAD_UART1_CTS_B__GPIO1_IO18 = IOMUX_PAD(0x0318, 0x008C, 5, 0x0000, 0, 0), + MX6_PAD_UART1_CTS_B__USDHC2_WP = IOMUX_PAD(0x0318, 0x008C, 8, 0x069C, 1, 0), + + MX6_PAD_UART1_RTS_B__UART1_DCE_RTS = IOMUX_PAD(0x031C, 0x0090, 0, 0x0620, 3, 0), + + MX6_PAD_UART1_RTS_B__UART1_DTE_CTS = IOMUX_PAD(0x031C, 0x0090, 0, 0x0000, 0, 0), + MX6_PAD_UART1_RTS_B__ENET1_TX_ER = IOMUX_PAD(0x031C, 0x0090, 1, 0x0000, 0, 0), + MX6_PAD_UART1_RTS_B__USDHC1_CD_B = IOMUX_PAD(0x031C, 0x0090, 2, 0x0668, 1, 0), + MX6_PAD_UART1_RTS_B__CSI_DATA05 = IOMUX_PAD(0x031C, 0x0090, 3, 0x04CC, 1, 0), + MX6_PAD_UART1_RTS_B__ENET2_1588_EVENT1_OUT = IOMUX_PAD(0x031C, 0x0090, 4, 0x0000, 0, 0), + MX6_PAD_UART1_RTS_B__GPIO1_IO19 = IOMUX_PAD(0x031C, 0x0090, 5, 0x0000, 0, 0), + MX6_PAD_UART1_RTS_B__USDHC2_CD_B = IOMUX_PAD(0x031C, 0x0090, 8, 0x0674, 2, 0), + + MX6_PAD_UART2_TX_DATA__UART2_DCE_TX = IOMUX_PAD(0x0320, 0x0094, 0, 0x0000, 0, 0), + + MX6_PAD_UART2_TX_DATA__UART2_DTE_RX = IOMUX_PAD(0x0320, 0x0094, 0, 0x062C, 0, 0), + MX6_PAD_UART2_TX_DATA__ENET1_TDATA02 = IOMUX_PAD(0x0320, 0x0094, 1, 0x0000, 0, 0), + MX6_PAD_UART2_TX_DATA__I2C4_SCL = IOMUX_PAD(0x0320, 0x0094, IOMUX_CONFIG_SION | 2, 0x05BC, 0, 0), + MX6_PAD_UART2_TX_DATA__CSI_DATA06 = IOMUX_PAD(0x0320, 0x0094, 3, 0x04DC, 0, 0), + MX6_PAD_UART2_TX_DATA__GPT1_CAPTURE1 = IOMUX_PAD(0x0320, 0x0094, 4, 0x058C, 1, 0), + MX6_PAD_UART2_TX_DATA__GPIO1_IO20 = IOMUX_PAD(0x0320, 0x0094, 5, 0x0000, 0, 0), + MX6_PAD_UART2_TX_DATA__ECSPI3_SS0 = IOMUX_PAD(0x0320, 0x0094, 8, 0x0560, 0, 0), + + MX6_PAD_UART2_RX_DATA__UART2_DCE_RX = IOMUX_PAD(0x0324, 0x0098, 0, 0x062C, 1, 0), + + MX6_PAD_UART2_RX_DATA__UART2_DTE_TX = IOMUX_PAD(0x0324, 0x0098, 0, 0x0000, 0, 0), + MX6_PAD_UART2_RX_DATA__ENET1_TDATA03 = IOMUX_PAD(0x0324, 0x0098, 1, 0x0000, 0, 0), + MX6_PAD_UART2_RX_DATA__I2C4_SDA = IOMUX_PAD(0x0324, 0x0098, IOMUX_CONFIG_SION | 2, 0x05C0, 0, 0), + MX6_PAD_UART2_RX_DATA__CSI_DATA07 = IOMUX_PAD(0x0324, 0x0098, 3, 0x04E0, 0, 0), + MX6_PAD_UART2_RX_DATA__GPT1_CAPTURE2 = IOMUX_PAD(0x0324, 0x0098, 4, 0x0590, 0, 0), + MX6_PAD_UART2_RX_DATA__GPIO1_IO21 = IOMUX_PAD(0x0324, 0x0098, 5, 0x0000, 0, 0), + MX6_PAD_UART2_RX_DATA__SJC_DONE = IOMUX_PAD(0x0324, 0x0098, 7, 0x0000, 0, 0), + MX6_PAD_UART2_RX_DATA__ECSPI3_SCLK = IOMUX_PAD(0x0324, 0x0098, 8, 0x0554, 0, 0), + + MX6_PAD_UART2_CTS_B__UART2_DCE_CTS = IOMUX_PAD(0x0328, 0x009C, 0, 0x0000, 0, 0), + + MX6_PAD_UART2_CTS_B__UART2_DTE_RTS = IOMUX_PAD(0x0328, 0x009C, 0, 0x0628, 0, 0), + MX6_PAD_UART2_CTS_B__ENET1_CRS = IOMUX_PAD(0x0328, 0x009C, 1, 0x0000, 0, 0), + MX6_PAD_UART2_CTS_B__FLEXCAN2_TX = IOMUX_PAD(0x0328, 0x009C, 2, 0x0000, 0, 0), + MX6_PAD_UART2_CTS_B__CSI_DATA08 = IOMUX_PAD(0x0328, 0x009C, 3, 0x04E4, 0, 0), + MX6_PAD_UART2_CTS_B__GPT1_COMPARE2 = IOMUX_PAD(0x0328, 0x009C, 4, 0x0000, 0, 0), + MX6_PAD_UART2_CTS_B__GPIO1_IO22 = IOMUX_PAD(0x0328, 0x009C, 5, 0x0000, 0, 0), + MX6_PAD_UART2_CTS_B__SJC_DE_B = IOMUX_PAD(0x0328, 0x009C, 7, 0x0000, 0, 0), + MX6_PAD_UART2_CTS_B__ECSPI3_MOSI = IOMUX_PAD(0x0328, 0x009C, 8, 0x055C, 0, 0), + + MX6_PAD_UART2_RTS_B__UART2_DCE_RTS = IOMUX_PAD(0x032C, 0x00A0, 0, 0x0628, 1, 0), + + MX6_PAD_UART2_RTS_B__UART2_DTE_CTS = IOMUX_PAD(0x032C, 0x00A0, 0, 0x0000, 0, 0), + MX6_PAD_UART2_RTS_B__ENET1_COL = IOMUX_PAD(0x032C, 0x00A0, 1, 0x0000, 0, 0), + MX6_PAD_UART2_RTS_B__FLEXCAN2_RX = IOMUX_PAD(0x032C, 0x00A0, 2, 0x0588, 0, 0), + MX6_PAD_UART2_RTS_B__CSI_DATA09 = IOMUX_PAD(0x032C, 0x00A0, 3, 0x04E8, 0, 0), + MX6_PAD_UART2_RTS_B__GPT1_COMPARE3 = IOMUX_PAD(0x032C, 0x00A0, 4, 0x0000, 0, 0), + MX6_PAD_UART2_RTS_B__GPIO1_IO23 = IOMUX_PAD(0x032C, 0x00A0, 5, 0x0000, 0, 0), + MX6_PAD_UART2_RTS_B__SJC_FAIL = IOMUX_PAD(0x032C, 0x00A0, 7, 0x0000, 0, 0), + MX6_PAD_UART2_RTS_B__ECSPI3_MISO = IOMUX_PAD(0x032C, 0x00A0, 8, 0x0558, 0, 0), + + MX6_PAD_UART3_TX_DATA__UART3_DCE_TX = IOMUX_PAD(0x0330, 0x00A4, 0, 0x0000, 0, 0), + + MX6_PAD_UART3_TX_DATA__UART3_DTE_RX = IOMUX_PAD(0x0330, 0x00A4, 0, 0x0634, 0, 0), + MX6_PAD_UART3_TX_DATA__ENET2_RDATA02 = IOMUX_PAD(0x0330, 0x00A4, 1, 0x0000, 0, 0), + MX6_PAD_UART3_TX_DATA__SIM1_PORT0_PD = IOMUX_PAD(0x0330, 0x00A4, 2, 0x0000, 0, 0), + MX6_PAD_UART3_TX_DATA__CSI_DATA01 = IOMUX_PAD(0x0330, 0x00A4, 3, 0x04D4, 0, 0), + MX6_PAD_UART3_TX_DATA__UART2_DCE_CTS = IOMUX_PAD(0x0330, 0x00A4, 4, 0x0000, 0, 0), + MX6_PAD_UART3_TX_DATA__UART2_DTE_RTS = IOMUX_PAD(0x0330, 0x00A4, 4, 0x0628, 2, 0), + MX6_PAD_UART3_TX_DATA__GPIO1_IO24 = IOMUX_PAD(0x0330, 0x00A4, 5, 0x0000, 0, 0), + MX6_PAD_UART3_TX_DATA__SJC_JTAG_ACT = IOMUX_PAD(0x0330, 0x00A4, 7, 0x0000, 0, 0), + MX6_PAD_UART3_TX_DATA__ANATOP_OTG1_ID = IOMUX_PAD(0x0330, 0x00A4, 8, 0x04B8, 1, 0), + + MX6_PAD_UART3_RX_DATA__UART3_DCE_RX = IOMUX_PAD(0x0334, 0x00A8, 0, 0x0634, 1, 0), + + MX6_PAD_UART3_RX_DATA__UART3_DTE_TX = IOMUX_PAD(0x0334, 0x00A8, 0, 0x0000, 0, 0), + MX6_PAD_UART3_RX_DATA__ENET2_RDATA03 = IOMUX_PAD(0x0334, 0x00A8, 1, 0x0000, 0, 0), + MX6_PAD_UART3_RX_DATA__SIM2_PORT0_PD = IOMUX_PAD(0x0334, 0x00A8, 2, 0x0000, 0, 0), + MX6_PAD_UART3_RX_DATA__CSI_DATA00 = IOMUX_PAD(0x0334, 0x00A8, 3, 0x04D0, 0, 0), + MX6_PAD_UART3_RX_DATA__UART2_DCE_RTS = IOMUX_PAD(0x0334, 0x00A8, 4, 0x0628, 3, 0), + MX6_PAD_UART3_RX_DATA__UART2_DTE_CTS = IOMUX_PAD(0x0334, 0x00A8, 4, 0x0000, 0, 0), + MX6_PAD_UART3_RX_DATA__GPIO1_IO25 = IOMUX_PAD(0x0334, 0x00A8, 5, 0x0000, 0, 0), + MX6_PAD_UART3_RX_DATA__EPIT1_OUT = IOMUX_PAD(0x0334, 0x00A8, 8, 0x0000, 0, 0), + + MX6_PAD_UART3_CTS_B__UART3_DCE_CTS = IOMUX_PAD(0x0338, 0x00AC, 0, 0x0000, 0, 0), + + MX6_PAD_UART3_CTS_B__UART3_DTE_RTS = IOMUX_PAD(0x0338, 0x00AC, 0, 0x0630, 0, 0), + MX6_PAD_UART3_CTS_B__ENET2_RX_CLK = IOMUX_PAD(0x0338, 0x00AC, IOMUX_CONFIG_SION | 1, 0x0000, 0, 0), + MX6_PAD_UART3_CTS_B__FLEXCAN1_TX = IOMUX_PAD(0x0338, 0x00AC, 2, 0x0000, 0, 0), + MX6_PAD_UART3_CTS_B__CSI_DATA10 = IOMUX_PAD(0x0338, 0x00AC, 3, 0x04EC, 0, 0), + MX6_PAD_UART3_CTS_B__ENET1_1588_EVENT1_IN = IOMUX_PAD(0x0338, 0x00AC, 4, 0x0000, 0, 0), + MX6_PAD_UART3_CTS_B__GPIO1_IO26 = IOMUX_PAD(0x0338, 0x00AC, 5, 0x0000, 0, 0), + MX6_PAD_UART3_CTS_B__EPIT2_OUT = IOMUX_PAD(0x0338, 0x00AC, 8, 0x0000, 0, 0), + + MX6_PAD_UART3_RTS_B__UART3_DCE_RTS = IOMUX_PAD(0x033C, 0x00B0, 0, 0x0630, 1, 0), + + MX6_PAD_UART3_RTS_B__UART3_DTE_CTS = IOMUX_PAD(0x033C, 0x00B0, 0, 0x0000, 0, 0), + MX6_PAD_UART3_RTS_B__ENET2_TX_ER = IOMUX_PAD(0x033C, 0x00B0, 1, 0x0000, 0, 0), + MX6_PAD_UART3_RTS_B__FLEXCAN1_RX = IOMUX_PAD(0x033C, 0x00B0, 2, 0x0584, 0, 0), + MX6_PAD_UART3_RTS_B__CSI_DATA11 = IOMUX_PAD(0x033C, 0x00B0, 3, 0x04F0, 0, 0), + MX6_PAD_UART3_RTS_B__ENET1_1588_EVENT1_OUT = IOMUX_PAD(0x033C, 0x00B0, 4, 0x0000, 0, 0), + MX6_PAD_UART3_RTS_B__GPIO1_IO27 = IOMUX_PAD(0x033C, 0x00B0, 5, 0x0000, 0, 0), + MX6_PAD_UART3_RTS_B__WDOG1_WDOG_B = IOMUX_PAD(0x033C, 0x00B0, 8, 0x0000, 0, 0), + + MX6_PAD_UART4_TX_DATA__UART4_DCE_TX = IOMUX_PAD(0x0340, 0x00B4, 0, 0x0000, 0, 0), + + MX6_PAD_UART4_TX_DATA__UART4_DTE_RX = IOMUX_PAD(0x0340, 0x00B4, 0, 0x063C, 0, 0), + MX6_PAD_UART4_TX_DATA__ENET2_TDATA02 = IOMUX_PAD(0x0340, 0x00B4, 1, 0x0000, 0, 0), + MX6_PAD_UART4_TX_DATA__I2C1_SCL = IOMUX_PAD(0x0340, 0x00B4, IOMUX_CONFIG_SION | 2, 0x05A4, 1, 0), + MX6_PAD_UART4_TX_DATA__CSI_DATA12 = IOMUX_PAD(0x0340, 0x00B4, 3, 0x04F4, 0, 0), + MX6_PAD_UART4_TX_DATA__CSU_CSU_ALARM_AUT02 = IOMUX_PAD(0x0340, 0x00B4, 4, 0x0000, 0, 0), + MX6_PAD_UART4_TX_DATA__GPIO1_IO28 = IOMUX_PAD(0x0340, 0x00B4, 5, 0x0000, 0, 0), + MX6_PAD_UART4_TX_DATA__ECSPI2_SCLK = IOMUX_PAD(0x0340, 0x00B4, 8, 0x0544, 1, 0), + + MX6_PAD_UART4_RX_DATA__UART4_DCE_RX = IOMUX_PAD(0x0344, 0x00B8, 0, 0x063C, 1, 0), + + MX6_PAD_UART4_RX_DATA__UART4_DTE_TX = IOMUX_PAD(0x0344, 0x00B8, 0, 0x0000, 0, 0), + MX6_PAD_UART4_RX_DATA__ENET2_TDATA03 = IOMUX_PAD(0x0344, 0x00B8, 1, 0x0000, 0, 0), + MX6_PAD_UART4_RX_DATA__I2C1_SDA = IOMUX_PAD(0x0344, 0x00B8, IOMUX_CONFIG_SION | 2, 0x05A8, 2, 0), + MX6_PAD_UART4_RX_DATA__CSI_DATA13 = IOMUX_PAD(0x0344, 0x00B8, 3, 0x04F8, 0, 0), + MX6_PAD_UART4_RX_DATA__CSU_CSU_ALARM_AUT01 = IOMUX_PAD(0x0344, 0x00B8, 4, 0x0000, 0, 0), + MX6_PAD_UART4_RX_DATA__GPIO1_IO29 = IOMUX_PAD(0x0344, 0x00B8, 5, 0x0000, 0, 0), + MX6_PAD_UART4_RX_DATA__ECSPI2_SS0 = IOMUX_PAD(0x0344, 0x00B8, 8, 0x0550, 1, 0), + MX6_PAD_UART5_TX_DATA__GPIO1_IO30 = IOMUX_PAD(0x0348, 0x00BC, 5, 0x0000, 0, 0), + MX6_PAD_UART5_TX_DATA__ECSPI2_MOSI = IOMUX_PAD(0x0348, 0x00BC, 8, 0x054C, 0, 0), + + MX6_PAD_UART5_TX_DATA__UART5_DCE_TX = IOMUX_PAD(0x0348, 0x00BC, 0, 0x0000, 0, 0), + + MX6_PAD_UART5_TX_DATA__UART5_DTE_RX = IOMUX_PAD(0x0348, 0x00BC, 0, 0x0644, 4, 0), + MX6_PAD_UART5_TX_DATA__ENET2_CRS = IOMUX_PAD(0x0348, 0x00BC, 1, 0x0000, 0, 0), + MX6_PAD_UART5_TX_DATA__I2C2_SCL = IOMUX_PAD(0x0348, 0x00BC, IOMUX_CONFIG_SION | 2, 0x05AC, 2, 0), + MX6_PAD_UART5_TX_DATA__CSI_DATA14 = IOMUX_PAD(0x0348, 0x00BC, 3, 0x04FC, 0, 0), + MX6_PAD_UART5_TX_DATA__CSU_CSU_ALARM_AUT00 = IOMUX_PAD(0x0348, 0x00BC, 4, 0x0000, 0, 0), + + MX6_PAD_UART5_RX_DATA__UART5_DCE_RX = IOMUX_PAD(0x034C, 0x00C0, 0, 0x0644, 5, 0), + + MX6_PAD_UART5_RX_DATA__UART5_DTE_TX = IOMUX_PAD(0x034C, 0x00C0, 0, 0x0000, 0, 0), + MX6_PAD_UART5_RX_DATA__ENET2_COL = IOMUX_PAD(0x034C, 0x00C0, 1, 0x0000, 0, 0), + MX6_PAD_UART5_RX_DATA__I2C2_SDA = IOMUX_PAD(0x034C, 0x00C0, IOMUX_CONFIG_SION | 2, 0x05B0, 2, 0), + MX6_PAD_UART5_RX_DATA__CSI_DATA15 = IOMUX_PAD(0x034C, 0x00C0, 3, 0x0500, 0, 0), + MX6_PAD_UART5_RX_DATA__CSU_CSU_INT_DEB = IOMUX_PAD(0x034C, 0x00C0, 4, 0x0000, 0, 0), + MX6_PAD_UART5_RX_DATA__GPIO1_IO31 = IOMUX_PAD(0x034C, 0x00C0, 5, 0x0000, 0, 0), + MX6_PAD_UART5_RX_DATA__ECSPI2_MISO = IOMUX_PAD(0x034C, 0x00C0, 8, 0x0548, 1, 0), + + MX6_PAD_ENET1_RX_DATA0__ENET1_RDATA00 = IOMUX_PAD(0x0350, 0x00C4, 0, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_DATA0__UART4_DCE_RTS = IOMUX_PAD(0x0350, 0x00C4, 1, 0x0638, 0, 0), + MX6_PAD_ENET1_RX_DATA0__UART4_DTE_CTS = IOMUX_PAD(0x0350, 0x00C4, 1, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_DATA0__PWM1_OUT = IOMUX_PAD(0x0350, 0x00C4, 2, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_DATA0__CSI_DATA16 = IOMUX_PAD(0x0350, 0x00C4, 3, 0x0504, 0, 0), + MX6_PAD_ENET1_RX_DATA0__FLEXCAN1_TX = IOMUX_PAD(0x0350, 0x00C4, 4, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_DATA0__GPIO2_IO00 = IOMUX_PAD(0x0350, 0x00C4, 5, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_DATA0__KPP_ROW00 = IOMUX_PAD(0x0350, 0x00C4, 6, 0x05D0, 0, 0), + MX6_PAD_ENET1_RX_DATA0__USDHC1_LCTL = IOMUX_PAD(0x0350, 0x00C4, 8, 0x0000, 0, 0), + + MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01 = IOMUX_PAD(0x0354, 0x00C8, 0, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_DATA1__UART4_DCE_CTS = IOMUX_PAD(0x0354, 0x00C8, 1, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_DATA1__UART4_DTE_RTS = IOMUX_PAD(0x0354, 0x00C8, 1, 0x0638, 1, 0), + MX6_PAD_ENET1_RX_DATA1__PWM2_OUT = IOMUX_PAD(0x0354, 0x00C8, 2, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_DATA1__CSI_DATA17 = IOMUX_PAD(0x0354, 0x00C8, 3, 0x0508, 0, 0), + MX6_PAD_ENET1_RX_DATA1__FLEXCAN1_RX = IOMUX_PAD(0x0354, 0x00C8, 4, 0x0584, 1, 0), + MX6_PAD_ENET1_RX_DATA1__GPIO2_IO01 = IOMUX_PAD(0x0354, 0x00C8, 5, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_DATA1__KPP_COL00 = IOMUX_PAD(0x0354, 0x00C8, 6, 0x05C4, 0, 0), + MX6_PAD_ENET1_RX_DATA1__USDHC2_LCTL = IOMUX_PAD(0x0354, 0x00C8, 8, 0x0000, 0, 0), + + MX6_PAD_ENET1_RX_EN__ENET1_RX_EN = IOMUX_PAD(0x0358, 0x00CC, 0, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_EN__UART5_DCE_RTS = IOMUX_PAD(0x0358, 0x00CC, 1, 0x0640, 3, 0), + MX6_PAD_ENET1_RX_EN__UART5_DTE_CTS = IOMUX_PAD(0x0358, 0x00CC, 1, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_EN__CSI_DATA18 = IOMUX_PAD(0x0358, 0x00CC, 3, 0x050C, 0, 0), + MX6_PAD_ENET1_RX_EN__FLEXCAN2_TX = IOMUX_PAD(0x0358, 0x00CC, 4, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_EN__GPIO2_IO02 = IOMUX_PAD(0x0358, 0x00CC, 5, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_EN__KPP_ROW01 = IOMUX_PAD(0x0358, 0x00CC, 6, 0x05D4, 0, 0), + MX6_PAD_ENET1_RX_EN__USDHC1_VSELECT = IOMUX_PAD(0x0358, 0x00CC, 8, 0x0000, 0, 0), + + MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00 = IOMUX_PAD(0x035C, 0x00D0, 0, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_DATA0__UART5_DCE_CTS = IOMUX_PAD(0x035C, 0x00D0, 1, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_DATA0__UART5_DTE_RTS = IOMUX_PAD(0x035C, 0x00D0, 1, 0x0640, 4, 0), + MX6_PAD_ENET1_TX_DATA0__CSI_DATA19 = IOMUX_PAD(0x035C, 0x00D0, 3, 0x0510, 0, 0), + MX6_PAD_ENET1_TX_DATA0__FLEXCAN2_RX = IOMUX_PAD(0x035C, 0x00D0, 4, 0x0588, 1, 0), + MX6_PAD_ENET1_TX_DATA0__GPIO2_IO03 = IOMUX_PAD(0x035C, 0x00D0, 5, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_DATA0__KPP_COL01 = IOMUX_PAD(0x035C, 0x00D0, 6, 0x05C8, 0, 0), + MX6_PAD_ENET1_TX_DATA0__USDHC2_VSELECT = IOMUX_PAD(0x035C, 0x00D0, 8, 0x0000, 0, 0), + + MX6_PAD_ENET1_TX_DATA1__ENET1_TDATA01 = IOMUX_PAD(0x0360, 0x00D4, 0, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_DATA1__UART6_DCE_CTS = IOMUX_PAD(0x0360, 0x00D4, 1, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_DATA1__UART6_DTE_RTS = IOMUX_PAD(0x0360, 0x00D4, 1, 0x0648, 2, 0), + MX6_PAD_ENET1_TX_DATA1__PWM5_OUT = IOMUX_PAD(0x0360, 0x00D4, 2, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_DATA1__CSI_DATA20 = IOMUX_PAD(0x0360, 0x00D4, 3, 0x0514, 0, 0), + MX6_PAD_ENET1_TX_DATA1__ENET2_MDIO = IOMUX_PAD(0x0360, 0x00D4, 4, 0x0580, 1, 0), + MX6_PAD_ENET1_TX_DATA1__GPIO2_IO04 = IOMUX_PAD(0x0360, 0x00D4, 5, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_DATA1__KPP_ROW02 = IOMUX_PAD(0x0360, 0x00D4, 6, 0x05D8, 0, 0), + MX6_PAD_ENET1_TX_DATA1__WDOG1_WDOG_RST_B_DEB = IOMUX_PAD(0x0360, 0x00D4, 8, 0x0000, 0, 0), + + MX6_PAD_ENET1_TX_EN__ENET1_TX_EN = IOMUX_PAD(0x0364, 0x00D8, 0, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_EN__UART6_DCE_RTS = IOMUX_PAD(0x0364, 0x00D8, 1, 0x0648, 3, 0), + MX6_PAD_ENET1_TX_EN__UART6_DTE_CTS = IOMUX_PAD(0x0364, 0x00D8, 1, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_EN__PWM6_OUT = IOMUX_PAD(0x0364, 0x00D8, 2, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_EN__CSI_DATA21 = IOMUX_PAD(0x0364, 0x00D8, 3, 0x0518, 0, 0), + MX6_PAD_ENET1_TX_EN__ENET2_MDC = IOMUX_PAD(0x0364, 0x00D8, 4, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_EN__GPIO2_IO05 = IOMUX_PAD(0x0364, 0x00D8, 5, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_EN__KPP_COL02 = IOMUX_PAD(0x0364, 0x00D8, 6, 0x05CC, 0, 0), + MX6_PAD_ENET1_TX_EN__WDOG2_WDOG_RST_B_DEB = IOMUX_PAD(0x0364, 0x00D8, 8, 0x0000, 0, 0), + + MX6_PAD_ENET1_TX_CLK__ENET1_TX_CLK = IOMUX_PAD(0x0368, 0x00DC, 0, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_CLK__UART7_DCE_CTS = IOMUX_PAD(0x0368, 0x00DC, 1, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_CLK__UART7_DTE_RTS = IOMUX_PAD(0x0368, 0x00DC, 1, 0x0650, 0, 0), + MX6_PAD_ENET1_TX_CLK__PWM7_OUT = IOMUX_PAD(0x0368, 0x00DC, 2, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_CLK__CSI_DATA22 = IOMUX_PAD(0x0368, 0x00DC, 3, 0x051C, 0, 0), + MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 = IOMUX_PAD(0x0368, 0x00DC, IOMUX_CONFIG_SION | 4, 0x0574, 2, 0), + MX6_PAD_ENET1_TX_CLK__GPIO2_IO06 = IOMUX_PAD(0x0368, 0x00DC, 5, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_CLK__KPP_ROW03 = IOMUX_PAD(0x0368, 0x00DC, 6, 0x0000, 0, 0), + MX6_PAD_ENET1_TX_CLK__GPT1_CLK = IOMUX_PAD(0x0368, 0x00DC, 8, 0x0594, 1, 0), + + MX6_PAD_ENET1_RX_ER__ENET1_RX_ER = IOMUX_PAD(0x036C, 0x00E0, 0, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_ER__UART7_DCE_RTS = IOMUX_PAD(0x036C, 0x00E0, 1, 0x0650, 1, 0), + MX6_PAD_ENET1_RX_ER__UART7_DTE_CTS = IOMUX_PAD(0x036C, 0x00E0, 1, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_ER__PWM8_OUT = IOMUX_PAD(0x036C, 0x00E0, 2, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_ER__CSI_DATA23 = IOMUX_PAD(0x036C, 0x00E0, 3, 0x0520, 0, 0), + MX6_PAD_ENET1_RX_ER__EIM_CRE = IOMUX_PAD(0x036C, 0x00E0, 4, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_ER__GPIO2_IO07 = IOMUX_PAD(0x036C, 0x00E0, 5, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_ER__KPP_COL03 = IOMUX_PAD(0x036C, 0x00E0, 6, 0x0000, 0, 0), + MX6_PAD_ENET1_RX_ER__GPT1_CAPTURE2 = IOMUX_PAD(0x036C, 0x00E0, 8, 0x0590, 1, 0), + + MX6_PAD_ENET2_RX_DATA0__ENET2_RDATA00 = IOMUX_PAD(0x0370, 0x00E4, 0, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA0__UART6_DCE_TX = IOMUX_PAD(0x0370, 0x00E4, 1, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA0__UART6_DTE_RX = IOMUX_PAD(0x0370, 0x00E4, 1, 0x064C, 1, 0), + MX6_PAD_ENET2_RX_DATA0__SIM1_PORT0_TRXD = IOMUX_PAD(0x0370, 0x00E4, 2, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA0__I2C3_SCL = IOMUX_PAD(0x0370, 0x00E4, IOMUX_CONFIG_SION | 3, 0x05B4, 1, 0), + MX6_PAD_ENET2_RX_DATA0__ENET1_MDIO = IOMUX_PAD(0x0370, 0x00E4, 4, 0x0578, 1, 0), + MX6_PAD_ENET2_RX_DATA0__GPIO2_IO08 = IOMUX_PAD(0x0370, 0x00E4, 5, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA0__KPP_ROW04 = IOMUX_PAD(0x0370, 0x00E4, 6, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA0__USB_OTG1_PWR = IOMUX_PAD(0x0370, 0x00E4, 8, 0x0000, 0, 0), + + MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01 = IOMUX_PAD(0x0374, 0x00E8, 0, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA1__UART6_DCE_RX = IOMUX_PAD(0x0374, 0x00E8, 1, 0x064C, 2, 0), + MX6_PAD_ENET2_RX_DATA1__UART6_DTE_TX = IOMUX_PAD(0x0374, 0x00E8, 1, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA1__SIM1_PORT0_CLK = IOMUX_PAD(0x0374, 0x00E8, 2, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA1__I2C3_SDA = IOMUX_PAD(0x0374, 0x00E8, IOMUX_CONFIG_SION | 3, 0x05B8, 1, 0), + MX6_PAD_ENET2_RX_DATA1__ENET1_MDC = IOMUX_PAD(0x0374, 0x00E8, 4, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA1__GPIO2_IO09 = IOMUX_PAD(0x0374, 0x00E8, 5, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA1__KPP_COL04 = IOMUX_PAD(0x0374, 0x00E8, 6, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_DATA1__USB_OTG1_OC = IOMUX_PAD(0x0374, 0x00E8, 8, 0x0664, 1, 0), + + MX6_PAD_ENET2_RX_EN__ENET2_RX_EN = IOMUX_PAD(0x0378, 0x00EC, 0, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_EN__UART7_DCE_TX = IOMUX_PAD(0x0378, 0x00EC, 1, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_EN__UART7_DTE_RX = IOMUX_PAD(0x0378, 0x00EC, 1, 0x0654, 0, 0), + MX6_PAD_ENET2_RX_EN__SIM1_PORT0_RST_B = IOMUX_PAD(0x0378, 0x00EC, 2, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_EN__I2C4_SCL = IOMUX_PAD(0x0378, 0x00EC, IOMUX_CONFIG_SION | 3, 0x05BC, 1, 0), + MX6_PAD_ENET2_RX_EN__EIM_ADDR26 = IOMUX_PAD(0x0378, 0x00EC, 4, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_EN__GPIO2_IO10 = IOMUX_PAD(0x0378, 0x00EC, 5, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_EN__KPP_ROW05 = IOMUX_PAD(0x0378, 0x00EC, 6, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_EN__ENET1_REF_CLK_25M = IOMUX_PAD(0x0378, 0x00EC, 8, 0x0000, 0, 0), + + MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00 = IOMUX_PAD(0x037C, 0x00F0, 0, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA0__UART7_DCE_RX = IOMUX_PAD(0x037C, 0x00F0, 1, 0x0654, 1, 0), + MX6_PAD_ENET2_TX_DATA0__UART7_DTE_TX = IOMUX_PAD(0x037C, 0x00F0, 1, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA0__SIM1_PORT0_SVEN = IOMUX_PAD(0x037C, 0x00F0, 2, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA0__I2C4_SDA = IOMUX_PAD(0x037C, 0x00F0, IOMUX_CONFIG_SION | 3, 0x05C0, 1, 0), + MX6_PAD_ENET2_TX_DATA0__EIM_EB_B02 = IOMUX_PAD(0x037C, 0x00F0, 4, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA0__GPIO2_IO11 = IOMUX_PAD(0x037C, 0x00F0, 5, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA0__KPP_COL05 = IOMUX_PAD(0x037C, 0x00F0, 6, 0x0000, 0, 0), + + MX6_PAD_ENET2_TX_DATA1__ENET2_TDATA01 = IOMUX_PAD(0x0380, 0x00F4, 0, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA1__UART8_DCE_TX = IOMUX_PAD(0x0380, 0x00F4, 1, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA1__UART8_DTE_RX = IOMUX_PAD(0x0380, 0x00F4, 1, 0x065C, 0, 0), + MX6_PAD_ENET2_TX_DATA1__SIM2_PORT0_TRXD = IOMUX_PAD(0x0380, 0x00F4, 2, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA1__ECSPI4_SCLK = IOMUX_PAD(0x0380, 0x00F4, 3, 0x0564, 0, 0), + MX6_PAD_ENET2_TX_DATA1__EIM_EB_B03 = IOMUX_PAD(0x0380, 0x00F4, 4, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA1__GPIO2_IO12 = IOMUX_PAD(0x0380, 0x00F4, 5, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA1__KPP_ROW06 = IOMUX_PAD(0x0380, 0x00F4, 6, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_DATA1__USB_OTG2_PWR = IOMUX_PAD(0x0380, 0x00F4, 8, 0x0000, 0, 0), + + MX6_PAD_ENET2_TX_EN__ENET2_TX_EN = IOMUX_PAD(0x0384, 0x00F8, 0, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_EN__UART8_DCE_RX = IOMUX_PAD(0x0384, 0x00F8, 1, 0x065C, 1, 0), + MX6_PAD_ENET2_TX_EN__UART8_DTE_TX = IOMUX_PAD(0x0384, 0x00F8, 1, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_EN__SIM2_PORT0_CLK = IOMUX_PAD(0x0384, 0x00F8, 2, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_EN__ECSPI4_MOSI = IOMUX_PAD(0x0384, 0x00F8, 3, 0x056C, 0, 0), + MX6_PAD_ENET2_TX_EN__EIM_ACLK_FREERUN = IOMUX_PAD(0x0384, 0x00F8, 4, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_EN__GPIO2_IO13 = IOMUX_PAD(0x0384, 0x00F8, 5, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_EN__KPP_COL06 = IOMUX_PAD(0x0384, 0x00F8, 6, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_EN__USB_OTG2_OC = IOMUX_PAD(0x0384, 0x00F8, 8, 0x0660, 1, 0), + + MX6_PAD_ENET2_TX_CLK__ENET2_TX_CLK = IOMUX_PAD(0x0388, 0x00FC, IOMUX_CONFIG_SION | 0, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_CLK__UART8_DCE_CTS = IOMUX_PAD(0x0388, 0x00FC, 1, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_CLK__UART8_DTE_RTS = IOMUX_PAD(0x0388, 0x00FC, 1, 0x0658, 0, 0), + MX6_PAD_ENET2_TX_CLK__SIM2_PORT0_RST_B = IOMUX_PAD(0x0388, 0x00FC, 2, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_CLK__ECSPI4_MISO = IOMUX_PAD(0x0388, 0x00FC, 3, 0x0568, 0, 0), + MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 = IOMUX_PAD(0x0388, 0x00FC, IOMUX_CONFIG_SION | 4, 0x057C, 2, 0), + MX6_PAD_ENET2_TX_CLK__GPIO2_IO14 = IOMUX_PAD(0x0388, 0x00FC, 5, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_CLK__KPP_ROW07 = IOMUX_PAD(0x0388, 0x00FC, 6, 0x0000, 0, 0), + MX6_PAD_ENET2_TX_CLK__ANATOP_OTG2_ID = IOMUX_PAD(0x0388, 0x00FC, 8, 0x04BC, 1, 0), + + MX6_PAD_ENET2_RX_ER__ENET2_RX_ER = IOMUX_PAD(0x038C, 0x0100, 0, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_ER__UART8_DCE_RTS = IOMUX_PAD(0x038C, 0x0100, 1, 0x0658, 1, 0), + MX6_PAD_ENET2_RX_ER__UART8_DTE_CTS = IOMUX_PAD(0x038C, 0x0100, 1, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_ER__SIM2_PORT0_SVEN = IOMUX_PAD(0x038C, 0x0100, 2, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_ER__ECSPI4_SS0 = IOMUX_PAD(0x038C, 0x0100, 3, 0x0570, 0, 0), + MX6_PAD_ENET2_RX_ER__EIM_ADDR25 = IOMUX_PAD(0x038C, 0x0100, 4, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_ER__GPIO2_IO15 = IOMUX_PAD(0x038C, 0x0100, 5, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_ER__KPP_COL07 = IOMUX_PAD(0x038C, 0x0100, 6, 0x0000, 0, 0), + MX6_PAD_ENET2_RX_ER__WDOG1_WDOG_ANY = IOMUX_PAD(0x038C, 0x0100, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_CLK__LCDIF_CLK = IOMUX_PAD(0x0390, 0x0104, 0, 0x0000, 0, 0), + MX6_PAD_LCD_CLK__LCDIF_WR_RWN = IOMUX_PAD(0x0390, 0x0104, 1, 0x0000, 0, 0), + MX6_PAD_LCD_CLK__UART4_DCE_TX = IOMUX_PAD(0x0390, 0x0104, 2, 0x0000, 0, 0), + MX6_PAD_LCD_CLK__UART4_DTE_RX = IOMUX_PAD(0x0390, 0x0104, 2, 0x063C, 2, 0), + MX6_PAD_LCD_CLK__SAI3_MCLK = IOMUX_PAD(0x0390, 0x0104, 3, 0x0600, 0, 0), + MX6_PAD_LCD_CLK__EIM_CS2_B = IOMUX_PAD(0x0390, 0x0104, 4, 0x0000, 0, 0), + MX6_PAD_LCD_CLK__GPIO3_IO00 = IOMUX_PAD(0x0390, 0x0104, 5, 0x0000, 0, 0), + MX6_PAD_LCD_CLK__WDOG1_WDOG_RST_B_DEB = IOMUX_PAD(0x0390, 0x0104, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_ENABLE__LCDIF_ENABLE = IOMUX_PAD(0x0394, 0x0108, 0, 0x0000, 0, 0), + MX6_PAD_LCD_ENABLE__LCDIF_RD_E = IOMUX_PAD(0x0394, 0x0108, 1, 0x0000, 0, 0), + MX6_PAD_LCD_ENABLE__UART4_DCE_RX = IOMUX_PAD(0x0394, 0x0108, 2, 0x063C, 3, 0), + MX6_PAD_LCD_ENABLE__UART4_DTE_TX = IOMUX_PAD(0x0394, 0x0108, 2, 0x0000, 0, 0), + MX6_PAD_LCD_ENABLE__SAI3_TX_SYNC = IOMUX_PAD(0x0394, 0x0108, 3, 0x060C, 0, 0), + MX6_PAD_LCD_ENABLE__EIM_CS3_B = IOMUX_PAD(0x0394, 0x0108, 4, 0x0000, 0, 0), + MX6_PAD_LCD_ENABLE__GPIO3_IO01 = IOMUX_PAD(0x0394, 0x0108, 5, 0x0000, 0, 0), + MX6_PAD_LCD_ENABLE__ECSPI2_RDY = IOMUX_PAD(0x0394, 0x0108, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_HSYNC__LCDIF_HSYNC = IOMUX_PAD(0x0398, 0x010C, 0, 0x05DC, 0, 0), + MX6_PAD_LCD_HSYNC__LCDIF_RS = IOMUX_PAD(0x0398, 0x010C, 1, 0x0000, 0, 0), + MX6_PAD_LCD_HSYNC__UART4_DCE_CTS = IOMUX_PAD(0x0398, 0x010C, 2, 0x0000, 0, 0), + MX6_PAD_LCD_HSYNC__UART4_DTE_RTS = IOMUX_PAD(0x0398, 0x010C, 2, 0x0638, 2, 0), + MX6_PAD_LCD_HSYNC__SAI3_TX_BCLK = IOMUX_PAD(0x0398, 0x010C, 3, 0x0608, 0, 0), + MX6_PAD_LCD_HSYNC__WDOG3_WDOG_RST_B_DEB = IOMUX_PAD(0x0398, 0x010C, 4, 0x0000, 0, 0), + MX6_PAD_LCD_HSYNC__GPIO3_IO02 = IOMUX_PAD(0x0398, 0x010C, 5, 0x0000, 0, 0), + MX6_PAD_LCD_HSYNC__ECSPI2_SS1 = IOMUX_PAD(0x0398, 0x010C, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_VSYNC__LCDIF_VSYNC = IOMUX_PAD(0x039C, 0x0110, 0, 0x0000, 0, 0), + MX6_PAD_LCD_VSYNC__LCDIF_BUSY = IOMUX_PAD(0x039C, 0x0110, 1, 0x05DC, 1, 0), + MX6_PAD_LCD_VSYNC__UART4_DCE_RTS = IOMUX_PAD(0x039C, 0x0110, 2, 0x0638, 3, 0), + MX6_PAD_LCD_VSYNC__UART4_DTE_CTS = IOMUX_PAD(0x039C, 0x0110, 2, 0x0000, 0, 0), + MX6_PAD_LCD_VSYNC__SAI3_RX_DATA = IOMUX_PAD(0x039C, 0x0110, 3, 0x0604, 0, 0), + MX6_PAD_LCD_VSYNC__WDOG2_WDOG_B = IOMUX_PAD(0x039C, 0x0110, 4, 0x0000, 0, 0), + MX6_PAD_LCD_VSYNC__GPIO3_IO03 = IOMUX_PAD(0x039C, 0x0110, 5, 0x0000, 0, 0), + MX6_PAD_LCD_VSYNC__ECSPI2_SS2 = IOMUX_PAD(0x039C, 0x0110, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_RESET__LCDIF_RESET = IOMUX_PAD(0x03A0, 0x0114, 0, 0x0000, 0, 0), + MX6_PAD_LCD_RESET__LCDIF_CS = IOMUX_PAD(0x03A0, 0x0114, 1, 0x0000, 0, 0), + MX6_PAD_LCD_RESET__CA7_MX6UL_EVENTI = IOMUX_PAD(0x03A0, 0x0114, 2, 0x0000, 0, 0), + MX6_PAD_LCD_RESET__SAI3_TX_DATA = IOMUX_PAD(0x03A0, 0x0114, 3, 0x0000, 0, 0), + MX6_PAD_LCD_RESET__WDOG1_WDOG_ANY = IOMUX_PAD(0x03A0, 0x0114, 4, 0x0000, 0, 0), + MX6_PAD_LCD_RESET__GPIO3_IO04 = IOMUX_PAD(0x03A0, 0x0114, 5, 0x0000, 0, 0), + MX6_PAD_LCD_RESET__ECSPI2_SS3 = IOMUX_PAD(0x03A0, 0x0114, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_DATA00__LCDIF_DATA00 = IOMUX_PAD(0x03A4, 0x0118, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA00__PWM1_OUT = IOMUX_PAD(0x03A4, 0x0118, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA00__ENET1_1588_EVENT2_IN = IOMUX_PAD(0x03A4, 0x0118, 3, 0x0000, 0, 0), + MX6_PAD_LCD_DATA00__I2C3_SDA = IOMUX_PAD(0x03A4, 0x0118, IOMUX_CONFIG_SION | 4, 0x05B8, 2, 0), + MX6_PAD_LCD_DATA00__GPIO3_IO05 = IOMUX_PAD(0x03A4, 0x0118, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA00__SRC_BT_CFG00 = IOMUX_PAD(0x03A4, 0x0118, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA00__SAI1_MCLK = IOMUX_PAD(0x03A4, 0x0118, 8, 0x05E0, 1, 0), + + MX6_PAD_LCD_DATA01__LCDIF_DATA01 = IOMUX_PAD(0x03A8, 0x011C, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA01__PWM2_OUT = IOMUX_PAD(0x03A8, 0x011C, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA01__ENET1_1588_EVENT2_OUT = IOMUX_PAD(0x03A8, 0x011C, 3, 0x0000, 0, 0), + MX6_PAD_LCD_DATA01__I2C3_SCL = IOMUX_PAD(0x03A8, 0x011C, IOMUX_CONFIG_SION | 4, 0x05B4, 2, 0), + MX6_PAD_LCD_DATA01__GPIO3_IO06 = IOMUX_PAD(0x03A8, 0x011C, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA01__SRC_BT_CFG01 = IOMUX_PAD(0x03A8, 0x011C, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA01__SAI1_TX_SYNC = IOMUX_PAD(0x03A8, 0x011C, 8, 0x05EC, 0, 0), + + MX6_PAD_LCD_DATA02__LCDIF_DATA02 = IOMUX_PAD(0x03AC, 0x0120, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA02__PWM3_OUT = IOMUX_PAD(0x03AC, 0x0120, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA02__ENET1_1588_EVENT3_IN = IOMUX_PAD(0x03AC, 0x0120, 3, 0x0000, 0, 0), + MX6_PAD_LCD_DATA02__I2C4_SDA = IOMUX_PAD(0x03AC, 0x0120, IOMUX_CONFIG_SION | 4, 0x05C0, 2, 0), + MX6_PAD_LCD_DATA02__GPIO3_IO07 = IOMUX_PAD(0x03AC, 0x0120, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA02__SRC_BT_CFG02 = IOMUX_PAD(0x03AC, 0x0120, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA02__SAI1_TX_BCLK = IOMUX_PAD(0x03AC, 0x0120, 8, 0x05E8, 0, 0), + + MX6_PAD_LCD_DATA03__LCDIF_DATA03 = IOMUX_PAD(0x03B0, 0x0124, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA03__PWM4_OUT = IOMUX_PAD(0x03B0, 0x0124, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA03__ENET1_1588_EVENT3_OUT = IOMUX_PAD(0x03B0, 0x0124, 3, 0x0000, 0, 0), + MX6_PAD_LCD_DATA03__I2C4_SCL = IOMUX_PAD(0x03B0, 0x0124, IOMUX_CONFIG_SION | 4, 0x05BC, 2, 0), + MX6_PAD_LCD_DATA03__GPIO3_IO08 = IOMUX_PAD(0x03B0, 0x0124, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA03__SRC_BT_CFG03 = IOMUX_PAD(0x03B0, 0x0124, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA03__SAI1_RX_DATA = IOMUX_PAD(0x03B0, 0x0124, 8, 0x05E4, 0, 0), + + MX6_PAD_LCD_DATA04__LCDIF_DATA04 = IOMUX_PAD(0x03B4, 0x0128, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA04__UART8_DCE_CTS = IOMUX_PAD(0x03B4, 0x0128, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA04__UART8_DTE_RTS = IOMUX_PAD(0x03B4, 0x0128, 1, 0x0658, 2, 0), + MX6_PAD_LCD_DATA04__ENET2_1588_EVENT2_IN = IOMUX_PAD(0x03B4, 0x0128, 3, 0x0000, 0, 0), + MX6_PAD_LCD_DATA04__SPDIF_SR_CLK = IOMUX_PAD(0x03B4, 0x0128, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA04__GPIO3_IO09 = IOMUX_PAD(0x03B4, 0x0128, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA04__SRC_BT_CFG04 = IOMUX_PAD(0x03B4, 0x0128, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA04__SAI1_TX_DATA = IOMUX_PAD(0x03B4, 0x0128, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_DATA05__LCDIF_DATA05 = IOMUX_PAD(0x03B8, 0x012C, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA05__UART8_DCE_RTS = IOMUX_PAD(0x03B8, 0x012C, 1, 0x0658, 3, 0), + MX6_PAD_LCD_DATA05__UART8_DTE_CTS = IOMUX_PAD(0x03B8, 0x012C, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA05__ENET2_1588_EVENT2_OUT = IOMUX_PAD(0x03B8, 0x012C, 3, 0x0000, 0, 0), + MX6_PAD_LCD_DATA05__SPDIF_OUT = IOMUX_PAD(0x03B8, 0x012C, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA05__GPIO3_IO10 = IOMUX_PAD(0x03B8, 0x012C, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA05__SRC_BT_CFG05 = IOMUX_PAD(0x03B8, 0x012C, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA05__ECSPI1_SS1 = IOMUX_PAD(0x03B8, 0x012C, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_DATA06__LCDIF_DATA06 = IOMUX_PAD(0x03BC, 0x0130, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA06__UART7_DCE_CTS = IOMUX_PAD(0x03BC, 0x0130, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA06__UART7_DTE_RTS = IOMUX_PAD(0x03BC, 0x0130, 1, 0x0650, 2, 0), + MX6_PAD_LCD_DATA06__ENET2_1588_EVENT3_IN = IOMUX_PAD(0x03BC, 0x0130, 3, 0x0000, 0, 0), + MX6_PAD_LCD_DATA06__SPDIF_LOCK = IOMUX_PAD(0x03BC, 0x0130, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA06__GPIO3_IO11 = IOMUX_PAD(0x03BC, 0x0130, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA06__SRC_BT_CFG06 = IOMUX_PAD(0x03BC, 0x0130, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA06__ECSPI1_SS2 = IOMUX_PAD(0x03BC, 0x0130, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_DATA07__LCDIF_DATA07 = IOMUX_PAD(0x03C0, 0x0134, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA07__UART7_DCE_RTS = IOMUX_PAD(0x03C0, 0x0134, 1, 0x0650, 3, 0), + MX6_PAD_LCD_DATA07__UART7_DTE_CTS = IOMUX_PAD(0x03C0, 0x0134, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA07__ENET2_1588_EVENT3_OUT = IOMUX_PAD(0x03C0, 0x0134, 3, 0x0000, 0, 0), + MX6_PAD_LCD_DATA07__SPDIF_EXT_CLK = IOMUX_PAD(0x03C0, 0x0134, 4, 0x061C, 0, 0), + MX6_PAD_LCD_DATA07__GPIO3_IO12 = IOMUX_PAD(0x03C0, 0x0134, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA07__SRC_BT_CFG07 = IOMUX_PAD(0x03C0, 0x0134, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA07__ECSPI1_SS3 = IOMUX_PAD(0x03C0, 0x0134, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_DATA08__LCDIF_DATA08 = IOMUX_PAD(0x03C4, 0x0138, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA08__SPDIF_IN = IOMUX_PAD(0x03C4, 0x0138, 1, 0x0618, 2, 0), + MX6_PAD_LCD_DATA08__CSI_DATA16 = IOMUX_PAD(0x03C4, 0x0138, 3, 0x0504, 1, 0), + MX6_PAD_LCD_DATA08__EIM_DATA00 = IOMUX_PAD(0x03C4, 0x0138, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA08__GPIO3_IO13 = IOMUX_PAD(0x03C4, 0x0138, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA08__SRC_BT_CFG08 = IOMUX_PAD(0x03C4, 0x0138, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA08__FLEXCAN1_TX = IOMUX_PAD(0x03C4, 0x0138, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_DATA09__LCDIF_DATA09 = IOMUX_PAD(0x03C8, 0x013C, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA09__SAI3_MCLK = IOMUX_PAD(0x03C8, 0x013C, 1, 0x0600, 1, 0), + MX6_PAD_LCD_DATA09__CSI_DATA17 = IOMUX_PAD(0x03C8, 0x013C, 3, 0x0508, 1, 0), + MX6_PAD_LCD_DATA09__EIM_DATA01 = IOMUX_PAD(0x03C8, 0x013C, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA09__GPIO3_IO14 = IOMUX_PAD(0x03C8, 0x013C, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA09__SRC_BT_CFG09 = IOMUX_PAD(0x03C8, 0x013C, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA09__FLEXCAN1_RX = IOMUX_PAD(0x03C8, 0x013C, 8, 0x0584, 2, 0), + + MX6_PAD_LCD_DATA10__LCDIF_DATA10 = IOMUX_PAD(0x03CC, 0x0140, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA10__SAI3_RX_SYNC = IOMUX_PAD(0x03CC, 0x0140, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA10__CSI_DATA18 = IOMUX_PAD(0x03CC, 0x0140, 3, 0x050C, 1, 0), + MX6_PAD_LCD_DATA10__EIM_DATA02 = IOMUX_PAD(0x03CC, 0x0140, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA10__GPIO3_IO15 = IOMUX_PAD(0x03CC, 0x0140, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA10__SRC_BT_CFG10 = IOMUX_PAD(0x03CC, 0x0140, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA10__FLEXCAN2_TX = IOMUX_PAD(0x03CC, 0x0140, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_DATA11__LCDIF_DATA11 = IOMUX_PAD(0x03D0, 0x0144, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA11__SAI3_RX_BCLK = IOMUX_PAD(0x03D0, 0x0144, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA11__CSI_DATA19 = IOMUX_PAD(0x03D0, 0x0144, 3, 0x0510, 1, 0), + MX6_PAD_LCD_DATA11__EIM_DATA03 = IOMUX_PAD(0x03D0, 0x0144, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA11__GPIO3_IO16 = IOMUX_PAD(0x03D0, 0x0144, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA11__SRC_BT_CFG11 = IOMUX_PAD(0x03D0, 0x0144, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA11__FLEXCAN2_RX = IOMUX_PAD(0x03D0, 0x0144, 8, 0x0588, 2, 0), + + MX6_PAD_LCD_DATA12__LCDIF_DATA12 = IOMUX_PAD(0x03D4, 0x0148, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA12__SAI3_TX_SYNC = IOMUX_PAD(0x03D4, 0x0148, 1, 0x060C, 1, 0), + MX6_PAD_LCD_DATA12__CSI_DATA20 = IOMUX_PAD(0x03D4, 0x0148, 3, 0x0514, 1, 0), + MX6_PAD_LCD_DATA12__EIM_DATA04 = IOMUX_PAD(0x03D4, 0x0148, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA12__GPIO3_IO17 = IOMUX_PAD(0x03D4, 0x0148, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA12__SRC_BT_CFG12 = IOMUX_PAD(0x03D4, 0x0148, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA12__ECSPI1_RDY = IOMUX_PAD(0x03D4, 0x0148, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_DATA13__LCDIF_DATA13 = IOMUX_PAD(0x03D8, 0x014C, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA13__SAI3_TX_BCLK = IOMUX_PAD(0x03D8, 0x014C, 1, 0x0608, 1, 0), + MX6_PAD_LCD_DATA13__CSI_DATA21 = IOMUX_PAD(0x03D8, 0x014C, 3, 0x0518, 1, 0), + MX6_PAD_LCD_DATA13__EIM_DATA05 = IOMUX_PAD(0x03D8, 0x014C, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA13__GPIO3_IO18 = IOMUX_PAD(0x03D8, 0x014C, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA13__SRC_BT_CFG13 = IOMUX_PAD(0x03D8, 0x014C, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA13__USDHC2_RESET_B = IOMUX_PAD(0x03D8, 0x014C, 8, 0x0000, 0, 0), + + MX6_PAD_LCD_DATA14__LCDIF_DATA14 = IOMUX_PAD(0x03DC, 0x0150, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA14__SAI3_RX_DATA = IOMUX_PAD(0x03DC, 0x0150, 1, 0x0604, 1, 0), + MX6_PAD_LCD_DATA14__CSI_DATA22 = IOMUX_PAD(0x03DC, 0x0150, 3, 0x051C, 1, 0), + MX6_PAD_LCD_DATA14__EIM_DATA06 = IOMUX_PAD(0x03DC, 0x0150, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA14__GPIO3_IO19 = IOMUX_PAD(0x03DC, 0x0150, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA14__SRC_BT_CFG14 = IOMUX_PAD(0x03DC, 0x0150, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA14__USDHC2_DATA4 = IOMUX_PAD(0x03DC, 0x0150, 8, 0x068C, 0, 0), + + MX6_PAD_LCD_DATA15__LCDIF_DATA15 = IOMUX_PAD(0x03E0, 0x0154, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA15__SAI3_TX_DATA = IOMUX_PAD(0x03E0, 0x0154, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA15__CSI_DATA23 = IOMUX_PAD(0x03E0, 0x0154, 3, 0x0520, 1, 0), + MX6_PAD_LCD_DATA15__EIM_DATA07 = IOMUX_PAD(0x03E0, 0x0154, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA15__GPIO3_IO20 = IOMUX_PAD(0x03E0, 0x0154, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA15__SRC_BT_CFG15 = IOMUX_PAD(0x03E0, 0x0154, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA15__USDHC2_DATA5 = IOMUX_PAD(0x03E0, 0x0154, 8, 0x0690, 0, 0), + + MX6_PAD_LCD_DATA16__LCDIF_DATA16 = IOMUX_PAD(0x03E4, 0x0158, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA16__UART7_DCE_TX = IOMUX_PAD(0x03E4, 0x0158, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA16__UART7_DTE_RX = IOMUX_PAD(0x03E4, 0x0158, 1, 0x0654, 2, 0), + MX6_PAD_LCD_DATA16__CSI_DATA01 = IOMUX_PAD(0x03E4, 0x0158, 3, 0x04D4, 1, 0), + MX6_PAD_LCD_DATA16__EIM_DATA08 = IOMUX_PAD(0x03E4, 0x0158, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA16__GPIO3_IO21 = IOMUX_PAD(0x03E4, 0x0158, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA16__SRC_BT_CFG24 = IOMUX_PAD(0x03E4, 0x0158, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA16__USDHC2_DATA6 = IOMUX_PAD(0x03E4, 0x0158, 8, 0x0694, 0, 0), + + MX6_PAD_LCD_DATA17__LCDIF_DATA17 = IOMUX_PAD(0x03E8, 0x015C, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA17__UART7_DCE_RX = IOMUX_PAD(0x03E8, 0x015C, 1, 0x0654, 3, 0), + MX6_PAD_LCD_DATA17__UART7_DTE_TX = IOMUX_PAD(0x03E8, 0x015C, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA17__CSI_DATA00 = IOMUX_PAD(0x03E8, 0x015C, 3, 0x04D0, 1, 0), + MX6_PAD_LCD_DATA17__EIM_DATA09 = IOMUX_PAD(0x03E8, 0x015C, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA17__GPIO3_IO22 = IOMUX_PAD(0x03E8, 0x015C, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA17__SRC_BT_CFG25 = IOMUX_PAD(0x03E8, 0x015C, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA17__USDHC2_DATA7 = IOMUX_PAD(0x03E8, 0x015C, 8, 0x0698, 0, 0), + + MX6_PAD_LCD_DATA18__LCDIF_DATA18 = IOMUX_PAD(0x03EC, 0x0160, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA18__PWM5_OUT = IOMUX_PAD(0x03EC, 0x0160, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA18__CA7_MX6UL_EVENTO = IOMUX_PAD(0x03EC, 0x0160, 2, 0x0000, 0, 0), + MX6_PAD_LCD_DATA18__CSI_DATA10 = IOMUX_PAD(0x03EC, 0x0160, 3, 0x04EC, 1, 0), + MX6_PAD_LCD_DATA18__EIM_DATA10 = IOMUX_PAD(0x03EC, 0x0160, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA18__GPIO3_IO23 = IOMUX_PAD(0x03EC, 0x0160, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA18__SRC_BT_CFG26 = IOMUX_PAD(0x03EC, 0x0160, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA18__USDHC2_CMD = IOMUX_PAD(0x03EC, 0x0160, 8, 0x0678, 1, 0), + MX6_PAD_LCD_DATA19__EIM_DATA11 = IOMUX_PAD(0x03F0, 0x0164, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA19__GPIO3_IO24 = IOMUX_PAD(0x03F0, 0x0164, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA19__SRC_BT_CFG27 = IOMUX_PAD(0x03F0, 0x0164, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA19__USDHC2_CLK = IOMUX_PAD(0x03F0, 0x0164, 8, 0x0670, 1, 0), + + MX6_PAD_LCD_DATA19__LCDIF_DATA19 = IOMUX_PAD(0x03F0, 0x0164, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA19__PWM6_OUT = IOMUX_PAD(0x03F0, 0x0164, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA19__WDOG1_WDOG_ANY = IOMUX_PAD(0x03F0, 0x0164, 2, 0x0000, 0, 0), + MX6_PAD_LCD_DATA19__CSI_DATA11 = IOMUX_PAD(0x03F0, 0x0164, 3, 0x04F0, 1, 0), + MX6_PAD_LCD_DATA20__EIM_DATA12 = IOMUX_PAD(0x03F4, 0x0168, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA20__GPIO3_IO25 = IOMUX_PAD(0x03F4, 0x0168, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA20__SRC_BT_CFG28 = IOMUX_PAD(0x03F4, 0x0168, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA20__USDHC2_DATA0 = IOMUX_PAD(0x03F4, 0x0168, 8, 0x067C, 1, 0), + + MX6_PAD_LCD_DATA20__LCDIF_DATA20 = IOMUX_PAD(0x03F4, 0x0168, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA20__UART8_DCE_TX = IOMUX_PAD(0x03F4, 0x0168, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA20__UART8_DTE_RX = IOMUX_PAD(0x03F4, 0x0168, 1, 0x065C, 2, 0), + MX6_PAD_LCD_DATA20__ECSPI1_SCLK = IOMUX_PAD(0x03F4, 0x0168, 2, 0x0534, 0, 0), + MX6_PAD_LCD_DATA20__CSI_DATA12 = IOMUX_PAD(0x03F4, 0x0168, 3, 0x04F4, 1, 0), + + MX6_PAD_LCD_DATA21__LCDIF_DATA21 = IOMUX_PAD(0x03F8, 0x016C, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA21__UART8_DCE_RX = IOMUX_PAD(0x03F8, 0x016C, 1, 0x065C, 3, 0), + MX6_PAD_LCD_DATA21__UART8_DTE_TX = IOMUX_PAD(0x03F8, 0x016C, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA21__ECSPI1_SS0 = IOMUX_PAD(0x03F8, 0x016C, 2, 0x0540, 0, 0), + MX6_PAD_LCD_DATA21__CSI_DATA13 = IOMUX_PAD(0x03F8, 0x016C, 3, 0x04F8, 1, 0), + MX6_PAD_LCD_DATA21__EIM_DATA13 = IOMUX_PAD(0x03F8, 0x016C, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA21__GPIO3_IO26 = IOMUX_PAD(0x03F8, 0x016C, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA21__SRC_BT_CFG29 = IOMUX_PAD(0x03F8, 0x016C, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA21__USDHC2_DATA1 = IOMUX_PAD(0x03F8, 0x016C, 8, 0x0680, 1, 0), + + MX6_PAD_LCD_DATA22__LCDIF_DATA22 = IOMUX_PAD(0x03FC, 0x0170, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA22__MQS_RIGHT = IOMUX_PAD(0x03FC, 0x0170, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA22__ECSPI1_MOSI = IOMUX_PAD(0x03FC, 0x0170, 2, 0x053C, 0, 0), + MX6_PAD_LCD_DATA22__CSI_DATA14 = IOMUX_PAD(0x03FC, 0x0170, 3, 0x04FC, 1, 0), + MX6_PAD_LCD_DATA22__EIM_DATA14 = IOMUX_PAD(0x03FC, 0x0170, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA22__GPIO3_IO27 = IOMUX_PAD(0x03FC, 0x0170, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA22__SRC_BT_CFG30 = IOMUX_PAD(0x03FC, 0x0170, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA22__USDHC2_DATA2 = IOMUX_PAD(0x03FC, 0x0170, 8, 0x0684, 0, 0), + + MX6_PAD_LCD_DATA23__LCDIF_DATA23 = IOMUX_PAD(0x0400, 0x0174, 0, 0x0000, 0, 0), + MX6_PAD_LCD_DATA23__MQS_LEFT = IOMUX_PAD(0x0400, 0x0174, 1, 0x0000, 0, 0), + MX6_PAD_LCD_DATA23__ECSPI1_MISO = IOMUX_PAD(0x0400, 0x0174, 2, 0x0538, 0, 0), + MX6_PAD_LCD_DATA23__CSI_DATA15 = IOMUX_PAD(0x0400, 0x0174, 3, 0x0500, 1, 0), + MX6_PAD_LCD_DATA23__EIM_DATA15 = IOMUX_PAD(0x0400, 0x0174, 4, 0x0000, 0, 0), + MX6_PAD_LCD_DATA23__GPIO3_IO28 = IOMUX_PAD(0x0400, 0x0174, 5, 0x0000, 0, 0), + MX6_PAD_LCD_DATA23__SRC_BT_CFG31 = IOMUX_PAD(0x0400, 0x0174, 6, 0x0000, 0, 0), + MX6_PAD_LCD_DATA23__USDHC2_DATA3 = IOMUX_PAD(0x0400, 0x0174, 8, 0x0688, 1, 0), + + MX6_PAD_NAND_RE_B__RAWNAND_RE_B = IOMUX_PAD(0x0404, 0x0178, 0, 0x0000, 0, 0), + MX6_PAD_NAND_RE_B__USDHC2_CLK = IOMUX_PAD(0x0404, 0x0178, 1, 0x0670, 2, 0), + MX6_PAD_NAND_RE_B__QSPI_B_SCLK = IOMUX_PAD(0x0404, 0x0178, 2, 0x0000, 0, 0), + MX6_PAD_NAND_RE_B__KPP_ROW00 = IOMUX_PAD(0x0404, 0x0178, 3, 0x05D0, 1, 0), + MX6_PAD_NAND_RE_B__EIM_EB_B00 = IOMUX_PAD(0x0404, 0x0178, 4, 0x0000, 0, 0), + MX6_PAD_NAND_RE_B__GPIO4_IO00 = IOMUX_PAD(0x0404, 0x0178, 5, 0x0000, 0, 0), + MX6_PAD_NAND_RE_B__ECSPI3_SS2 = IOMUX_PAD(0x0404, 0x0178, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_WE_B__RAWNAND_WE_B = IOMUX_PAD(0x0408, 0x017C, 0, 0x0000, 0, 0), + MX6_PAD_NAND_WE_B__USDHC2_CMD = IOMUX_PAD(0x0408, 0x017C, 1, 0x0678, 2, 0), + MX6_PAD_NAND_WE_B__QSPI_B_SS0_B = IOMUX_PAD(0x0408, 0x017C, 2, 0x0000, 0, 0), + MX6_PAD_NAND_WE_B__KPP_COL00 = IOMUX_PAD(0x0408, 0x017C, 3, 0x05C4, 1, 0), + MX6_PAD_NAND_WE_B__EIM_EB_B01 = IOMUX_PAD(0x0408, 0x017C, 4, 0x0000, 0, 0), + MX6_PAD_NAND_WE_B__GPIO4_IO01 = IOMUX_PAD(0x0408, 0x017C, 5, 0x0000, 0, 0), + MX6_PAD_NAND_WE_B__ECSPI3_SS3 = IOMUX_PAD(0x0408, 0x017C, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_DATA00__RAWNAND_DATA00 = IOMUX_PAD(0x040C, 0x0180, 0, 0x0000, 0, 0), + MX6_PAD_NAND_DATA00__USDHC2_DATA0 = IOMUX_PAD(0x040C, 0x0180, 1, 0x067C, 2, 0), + MX6_PAD_NAND_DATA00__QSPI_B_SS1_B = IOMUX_PAD(0x040C, 0x0180, 2, 0x0000, 0, 0), + MX6_PAD_NAND_DATA00__KPP_ROW01 = IOMUX_PAD(0x040C, 0x0180, 3, 0x05D4, 1, 0), + MX6_PAD_NAND_DATA00__EIM_AD08 = IOMUX_PAD(0x040C, 0x0180, 4, 0x0000, 0, 0), + MX6_PAD_NAND_DATA00__GPIO4_IO02 = IOMUX_PAD(0x040C, 0x0180, 5, 0x0000, 0, 0), + MX6_PAD_NAND_DATA00__ECSPI4_RDY = IOMUX_PAD(0x040C, 0x0180, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_DATA01__RAWNAND_DATA01 = IOMUX_PAD(0x0410, 0x0184, 0, 0x0000, 0, 0), + MX6_PAD_NAND_DATA01__USDHC2_DATA1 = IOMUX_PAD(0x0410, 0x0184, 1, 0x0680, 2, 0), + MX6_PAD_NAND_DATA01__QSPI_B_DQS = IOMUX_PAD(0x0410, 0x0184, 2, 0x0000, 0, 0), + MX6_PAD_NAND_DATA01__KPP_COL01 = IOMUX_PAD(0x0410, 0x0184, 3, 0x05C8, 1, 0), + MX6_PAD_NAND_DATA01__EIM_AD09 = IOMUX_PAD(0x0410, 0x0184, 4, 0x0000, 0, 0), + MX6_PAD_NAND_DATA01__GPIO4_IO03 = IOMUX_PAD(0x0410, 0x0184, 5, 0x0000, 0, 0), + MX6_PAD_NAND_DATA01__ECSPI4_SS1 = IOMUX_PAD(0x0410, 0x0184, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_DATA02__RAWNAND_DATA02 = IOMUX_PAD(0x0414, 0x0188, 0, 0x0000, 0, 0), + MX6_PAD_NAND_DATA02__USDHC2_DATA2 = IOMUX_PAD(0x0414, 0x0188, 1, 0x0684, 1, 0), + MX6_PAD_NAND_DATA02__QSPI_B_DATA00 = IOMUX_PAD(0x0414, 0x0188, 2, 0x0000, 0, 0), + MX6_PAD_NAND_DATA02__KPP_ROW02 = IOMUX_PAD(0x0414, 0x0188, 3, 0x05D8, 1, 0), + MX6_PAD_NAND_DATA02__EIM_AD10 = IOMUX_PAD(0x0414, 0x0188, 4, 0x0000, 0, 0), + MX6_PAD_NAND_DATA02__GPIO4_IO04 = IOMUX_PAD(0x0414, 0x0188, 5, 0x0000, 0, 0), + MX6_PAD_NAND_DATA02__ECSPI4_SS2 = IOMUX_PAD(0x0414, 0x0188, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_DATA03__RAWNAND_DATA03 = IOMUX_PAD(0x0418, 0x018C, 0, 0x0000, 0, 0), + MX6_PAD_NAND_DATA03__USDHC2_DATA3 = IOMUX_PAD(0x0418, 0x018C, 1, 0x0688, 2, 0), + MX6_PAD_NAND_DATA03__QSPI_B_DATA01 = IOMUX_PAD(0x0418, 0x018C, 2, 0x0000, 0, 0), + MX6_PAD_NAND_DATA03__KPP_COL02 = IOMUX_PAD(0x0418, 0x018C, 3, 0x05CC, 1, 0), + MX6_PAD_NAND_DATA03__EIM_AD11 = IOMUX_PAD(0x0418, 0x018C, 4, 0x0000, 0, 0), + MX6_PAD_NAND_DATA03__GPIO4_IO05 = IOMUX_PAD(0x0418, 0x018C, 5, 0x0000, 0, 0), + MX6_PAD_NAND_DATA03__ECSPI4_SS3 = IOMUX_PAD(0x0418, 0x018C, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_DATA04__RAWNAND_DATA04 = IOMUX_PAD(0x041C, 0x0190, 0, 0x0000, 0, 0), + MX6_PAD_NAND_DATA04__USDHC2_DATA4 = IOMUX_PAD(0x041C, 0x0190, 1, 0x068C, 1, 0), + MX6_PAD_NAND_DATA04__QSPI_B_DATA02 = IOMUX_PAD(0x041C, 0x0190, 2, 0x0000, 0, 0), + MX6_PAD_NAND_DATA04__ECSPI4_SCLK = IOMUX_PAD(0x041C, 0x0190, 3, 0x0564, 1, 0), + MX6_PAD_NAND_DATA04__EIM_AD12 = IOMUX_PAD(0x041C, 0x0190, 4, 0x0000, 0, 0), + MX6_PAD_NAND_DATA04__GPIO4_IO06 = IOMUX_PAD(0x041C, 0x0190, 5, 0x0000, 0, 0), + MX6_PAD_NAND_DATA04__UART2_DCE_TX = IOMUX_PAD(0x041C, 0x0190, 8, 0x0000, 0, 0), + MX6_PAD_NAND_DATA04__UART2_DTE_RX = IOMUX_PAD(0x041C, 0x0190, 8, 0x062C, 2, 0), + + MX6_PAD_NAND_DATA05__RAWNAND_DATA05 = IOMUX_PAD(0x0420, 0x0194, 0, 0x0000, 0, 0), + MX6_PAD_NAND_DATA05__USDHC2_DATA5 = IOMUX_PAD(0x0420, 0x0194, 1, 0x0690, 1, 0), + MX6_PAD_NAND_DATA05__QSPI_B_DATA03 = IOMUX_PAD(0x0420, 0x0194, 2, 0x0000, 0, 0), + MX6_PAD_NAND_DATA05__ECSPI4_MOSI = IOMUX_PAD(0x0420, 0x0194, 3, 0x056C, 1, 0), + MX6_PAD_NAND_DATA05__EIM_AD13 = IOMUX_PAD(0x0420, 0x0194, 4, 0x0000, 0, 0), + MX6_PAD_NAND_DATA05__GPIO4_IO07 = IOMUX_PAD(0x0420, 0x0194, 5, 0x0000, 0, 0), + MX6_PAD_NAND_DATA05__UART2_DCE_RX = IOMUX_PAD(0x0420, 0x0194, 8, 0x062C, 3, 0), + MX6_PAD_NAND_DATA05__UART2_DTE_TX = IOMUX_PAD(0x0420, 0x0194, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_DATA06__RAWNAND_DATA06 = IOMUX_PAD(0x0424, 0x0198, 0, 0x0000, 0, 0), + MX6_PAD_NAND_DATA06__USDHC2_DATA6 = IOMUX_PAD(0x0424, 0x0198, 1, 0x0694, 1, 0), + MX6_PAD_NAND_DATA06__SAI2_RX_BCLK = IOMUX_PAD(0x0424, 0x0198, 2, 0x0000, 0, 0), + MX6_PAD_NAND_DATA06__ECSPI4_MISO = IOMUX_PAD(0x0424, 0x0198, 3, 0x0568, 1, 0), + MX6_PAD_NAND_DATA06__EIM_AD14 = IOMUX_PAD(0x0424, 0x0198, 4, 0x0000, 0, 0), + MX6_PAD_NAND_DATA06__GPIO4_IO08 = IOMUX_PAD(0x0424, 0x0198, 5, 0x0000, 0, 0), + MX6_PAD_NAND_DATA06__UART2_DCE_CTS = IOMUX_PAD(0x0424, 0x0198, 8, 0x0000, 0, 0), + MX6_PAD_NAND_DATA06__UART2_DTE_RTS = IOMUX_PAD(0x0424, 0x0198, 8, 0x0628, 4, 0), + + MX6_PAD_NAND_DATA07__RAWNAND_DATA07 = IOMUX_PAD(0x0428, 0x019C, 0, 0x0000, 0, 0), + MX6_PAD_NAND_DATA07__USDHC2_DATA7 = IOMUX_PAD(0x0428, 0x019C, 1, 0x0698, 1, 0), + MX6_PAD_NAND_DATA07__QSPI_A_SS1_B = IOMUX_PAD(0x0428, 0x019C, 2, 0x0000, 0, 0), + MX6_PAD_NAND_DATA07__ECSPI4_SS0 = IOMUX_PAD(0x0428, 0x019C, 3, 0x0570, 1, 0), + MX6_PAD_NAND_DATA07__EIM_AD15 = IOMUX_PAD(0x0428, 0x019C, 4, 0x0000, 0, 0), + MX6_PAD_NAND_DATA07__GPIO4_IO09 = IOMUX_PAD(0x0428, 0x019C, 5, 0x0000, 0, 0), + MX6_PAD_NAND_DATA07__UART2_DCE_RTS = IOMUX_PAD(0x0428, 0x019C, 8, 0x0628, 5, 0), + MX6_PAD_NAND_DATA07__UART2_DTE_CTS = IOMUX_PAD(0x0428, 0x019C, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_ALE__RAWNAND_ALE = IOMUX_PAD(0x042C, 0x01A0, 0, 0x0000, 0, 0), + MX6_PAD_NAND_ALE__USDHC2_RESET_B = IOMUX_PAD(0x042C, 0x01A0, 1, 0x0000, 0, 0), + MX6_PAD_NAND_ALE__QSPI_A_DQS = IOMUX_PAD(0x042C, 0x01A0, 2, 0x0000, 0, 0), + MX6_PAD_NAND_ALE__PWM3_OUT = IOMUX_PAD(0x042C, 0x01A0, 3, 0x0000, 0, 0), + MX6_PAD_NAND_ALE__EIM_ADDR17 = IOMUX_PAD(0x042C, 0x01A0, 4, 0x0000, 0, 0), + MX6_PAD_NAND_ALE__GPIO4_IO10 = IOMUX_PAD(0x042C, 0x01A0, 5, 0x0000, 0, 0), + MX6_PAD_NAND_ALE__ECSPI3_SS1 = IOMUX_PAD(0x042C, 0x01A0, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_WP_B__RAWNAND_WP_B = IOMUX_PAD(0x0430, 0x01A4, 0, 0x0000, 0, 0), + MX6_PAD_NAND_WP_B__USDHC1_RESET_B = IOMUX_PAD(0x0430, 0x01A4, 1, 0x0000, 0, 0), + MX6_PAD_NAND_WP_B__QSPI_A_SCLK = IOMUX_PAD(0x0430, 0x01A4, 2, 0x0000, 0, 0), + MX6_PAD_NAND_WP_B__PWM4_OUT = IOMUX_PAD(0x0430, 0x01A4, 3, 0x0000, 0, 0), + MX6_PAD_NAND_WP_B__EIM_BCLK = IOMUX_PAD(0x0430, 0x01A4, 4, 0x0000, 0, 0), + MX6_PAD_NAND_WP_B__GPIO4_IO11 = IOMUX_PAD(0x0430, 0x01A4, 5, 0x0000, 0, 0), + MX6_PAD_NAND_WP_B__ECSPI3_RDY = IOMUX_PAD(0x0430, 0x01A4, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_READY_B__RAWNAND_READY_B = IOMUX_PAD(0x0434, 0x01A8, 0, 0x0000, 0, 0), + MX6_PAD_NAND_READY_B__USDHC1_DATA4 = IOMUX_PAD(0x0434, 0x01A8, 1, 0x0000, 0, 0), + MX6_PAD_NAND_READY_B__QSPI_A_DATA00 = IOMUX_PAD(0x0434, 0x01A8, 2, 0x0000, 0, 0), + MX6_PAD_NAND_READY_B__ECSPI3_SS0 = IOMUX_PAD(0x0434, 0x01A8, 3, 0x0560, 1, 0), + MX6_PAD_NAND_READY_B__EIM_CS1_B = IOMUX_PAD(0x0434, 0x01A8, 4, 0x0000, 0, 0), + MX6_PAD_NAND_READY_B__GPIO4_IO12 = IOMUX_PAD(0x0434, 0x01A8, 5, 0x0000, 0, 0), + MX6_PAD_NAND_READY_B__UART3_DCE_TX = IOMUX_PAD(0x0434, 0x01A8, 8, 0x0000, 0, 0), + MX6_PAD_NAND_READY_B__UART3_DTE_RX = IOMUX_PAD(0x0434, 0x01A8, 8, 0x0634, 2, 0), + + MX6_PAD_NAND_CE0_B__RAWNAND_CE0_B = IOMUX_PAD(0x0438, 0x01AC, 0, 0x0000, 0, 0), + MX6_PAD_NAND_CE0_B__USDHC1_DATA5 = IOMUX_PAD(0x0438, 0x01AC, 1, 0x0000, 0, 0), + MX6_PAD_NAND_CE0_B__QSPI_A_DATA01 = IOMUX_PAD(0x0438, 0x01AC, 2, 0x0000, 0, 0), + MX6_PAD_NAND_CE0_B__ECSPI3_SCLK = IOMUX_PAD(0x0438, 0x01AC, 3, 0x0554, 1, 0), + MX6_PAD_NAND_CE0_B__EIM_DTACK_B = IOMUX_PAD(0x0438, 0x01AC, 4, 0x0000, 0, 0), + MX6_PAD_NAND_CE0_B__GPIO4_IO13 = IOMUX_PAD(0x0438, 0x01AC, 5, 0x0000, 0, 0), + MX6_PAD_NAND_CE0_B__UART3_DCE_RX = IOMUX_PAD(0x0438, 0x01AC, 8, 0x0634, 3, 0), + MX6_PAD_NAND_CE0_B__UART3_DTE_TX = IOMUX_PAD(0x0438, 0x01AC, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_CE1_B__RAWNAND_CE1_B = IOMUX_PAD(0x043C, 0x01B0, 0, 0x0000, 0, 0), + MX6_PAD_NAND_CE1_B__USDHC1_DATA6 = IOMUX_PAD(0x043C, 0x01B0, 1, 0x0000, 0, 0), + MX6_PAD_NAND_CE1_B__QSPI_A_DATA02 = IOMUX_PAD(0x043C, 0x01B0, 2, 0x0000, 0, 0), + MX6_PAD_NAND_CE1_B__ECSPI3_MOSI = IOMUX_PAD(0x043C, 0x01B0, 3, 0x055C, 1, 0), + MX6_PAD_NAND_CE1_B__EIM_ADDR18 = IOMUX_PAD(0x043C, 0x01B0, 4, 0x0000, 0, 0), + MX6_PAD_NAND_CE1_B__GPIO4_IO14 = IOMUX_PAD(0x043C, 0x01B0, 5, 0x0000, 0, 0), + MX6_PAD_NAND_CE1_B__UART3_DCE_CTS = IOMUX_PAD(0x043C, 0x01B0, 8, 0x0000, 0, 0), + MX6_PAD_NAND_CE1_B__UART3_DTE_RTS = IOMUX_PAD(0x043C, 0x01B0, 8, 0x0630, 2, 0), + + MX6_PAD_NAND_CLE__RAWNAND_CLE = IOMUX_PAD(0x0440, 0x01B4, 0, 0x0000, 0, 0), + MX6_PAD_NAND_CLE__USDHC1_DATA7 = IOMUX_PAD(0x0440, 0x01B4, 1, 0x0000, 0, 0), + MX6_PAD_NAND_CLE__QSPI_A_DATA03 = IOMUX_PAD(0x0440, 0x01B4, 2, 0x0000, 0, 0), + MX6_PAD_NAND_CLE__ECSPI3_MISO = IOMUX_PAD(0x0440, 0x01B4, 3, 0x0558, 1, 0), + MX6_PAD_NAND_CLE__EIM_ADDR16 = IOMUX_PAD(0x0440, 0x01B4, 4, 0x0000, 0, 0), + MX6_PAD_NAND_CLE__GPIO4_IO15 = IOMUX_PAD(0x0440, 0x01B4, 5, 0x0000, 0, 0), + MX6_PAD_NAND_CLE__UART3_DCE_RTS = IOMUX_PAD(0x0440, 0x01B4, 8, 0x0630, 3, 0), + MX6_PAD_NAND_CLE__UART3_DTE_CTS = IOMUX_PAD(0x0440, 0x01B4, 8, 0x0000, 0, 0), + + MX6_PAD_NAND_DQS__RAWNAND_DQS = IOMUX_PAD(0x0444, 0x01B8, 0, 0x0000, 0, 0), + MX6_PAD_NAND_DQS__CSI_FIELD = IOMUX_PAD(0x0444, 0x01B8, 1, 0x0530, 1, 0), + MX6_PAD_NAND_DQS__QSPI_A_SS0_B = IOMUX_PAD(0x0444, 0x01B8, 2, 0x0000, 0, 0), + MX6_PAD_NAND_DQS__PWM5_OUT = IOMUX_PAD(0x0444, 0x01B8, 3, 0x0000, 0, 0), + MX6_PAD_NAND_DQS__EIM_WAIT = IOMUX_PAD(0x0444, 0x01B8, 4, 0x0000, 0, 0), + MX6_PAD_NAND_DQS__GPIO4_IO16 = IOMUX_PAD(0x0444, 0x01B8, 5, 0x0000, 0, 0), + MX6_PAD_NAND_DQS__SDMA_EXT_EVENT01 = IOMUX_PAD(0x0444, 0x01B8, 6, 0x0614, 1, 0), + MX6_PAD_NAND_DQS__SPDIF_EXT_CLK = IOMUX_PAD(0x0444, 0x01B8, 8, 0x061C, 1, 0), + + MX6_PAD_SD1_CMD__USDHC1_CMD = IOMUX_PAD(0x0448, 0x01BC, 0, 0x0000, 0, 0), + MX6_PAD_SD1_CMD__GPT2_COMPARE1 = IOMUX_PAD(0x0448, 0x01BC, 1, 0x0000, 0, 0), + MX6_PAD_SD1_CMD__SAI2_RX_SYNC = IOMUX_PAD(0x0448, 0x01BC, 2, 0x0000, 0, 0), + MX6_PAD_SD1_CMD__SPDIF_OUT = IOMUX_PAD(0x0448, 0x01BC, 3, 0x0000, 0, 0), + MX6_PAD_SD1_CMD__EIM_ADDR19 = IOMUX_PAD(0x0448, 0x01BC, 4, 0x0000, 0, 0), + MX6_PAD_SD1_CMD__GPIO2_IO16 = IOMUX_PAD(0x0448, 0x01BC, 5, 0x0000, 0, 0), + MX6_PAD_SD1_CMD__SDMA_EXT_EVENT00 = IOMUX_PAD(0x0448, 0x01BC, 6, 0x0610, 2, 0), + MX6_PAD_SD1_CMD__USB_OTG1_PWR = IOMUX_PAD(0x0448, 0x01BC, 8, 0x0000, 0, 0), + + MX6_PAD_SD1_CLK__USDHC1_CLK = IOMUX_PAD(0x044C, 0x01C0, 0, 0x0000, 0, 0), + MX6_PAD_SD1_CLK__GPT2_COMPARE2 = IOMUX_PAD(0x044C, 0x01C0, 1, 0x0000, 0, 0), + MX6_PAD_SD1_CLK__SAI2_MCLK = IOMUX_PAD(0x044C, 0x01C0, 2, 0x05F0, 1, 0), + MX6_PAD_SD1_CLK__SPDIF_IN = IOMUX_PAD(0x044C, 0x01C0, 3, 0x0618, 3, 0), + MX6_PAD_SD1_CLK__EIM_ADDR20 = IOMUX_PAD(0x044C, 0x01C0, 4, 0x0000, 0, 0), + MX6_PAD_SD1_CLK__GPIO2_IO17 = IOMUX_PAD(0x044C, 0x01C0, 5, 0x0000, 0, 0), + MX6_PAD_SD1_CLK__USB_OTG1_OC = IOMUX_PAD(0x044C, 0x01C0, 8, 0x0664, 2, 0), + + MX6_PAD_SD1_DATA0__USDHC1_DATA0 = IOMUX_PAD(0x0450, 0x01C4, 0, 0x0000, 0, 0), + MX6_PAD_SD1_DATA0__GPT2_COMPARE3 = IOMUX_PAD(0x0450, 0x01C4, 1, 0x0000, 0, 0), + MX6_PAD_SD1_DATA0__SAI2_TX_SYNC = IOMUX_PAD(0x0450, 0x01C4, 2, 0x05FC, 1, 0), + MX6_PAD_SD1_DATA0__FLEXCAN1_TX = IOMUX_PAD(0x0450, 0x01C4, 3, 0x0000, 0, 0), + MX6_PAD_SD1_DATA0__EIM_ADDR21 = IOMUX_PAD(0x0450, 0x01C4, 4, 0x0000, 0, 0), + MX6_PAD_SD1_DATA0__GPIO2_IO18 = IOMUX_PAD(0x0450, 0x01C4, 5, 0x0000, 0, 0), + MX6_PAD_SD1_DATA0__ANATOP_OTG1_ID = IOMUX_PAD(0x0450, 0x01C4, 8, 0x04B8, 2, 0), + + MX6_PAD_SD1_DATA1__USDHC1_DATA1 = IOMUX_PAD(0x0454, 0x01C8, 0, 0x0000, 0, 0), + MX6_PAD_SD1_DATA1__GPT2_CLK = IOMUX_PAD(0x0454, 0x01C8, 1, 0x05A0, 1, 0), + MX6_PAD_SD1_DATA1__SAI2_TX_BCLK = IOMUX_PAD(0x0454, 0x01C8, 2, 0x05F8, 1, 0), + MX6_PAD_SD1_DATA1__FLEXCAN1_RX = IOMUX_PAD(0x0454, 0x01C8, 3, 0x0584, 3, 0), + MX6_PAD_SD1_DATA1__EIM_ADDR22 = IOMUX_PAD(0x0454, 0x01C8, 4, 0x0000, 0, 0), + MX6_PAD_SD1_DATA1__GPIO2_IO19 = IOMUX_PAD(0x0454, 0x01C8, 5, 0x0000, 0, 0), + MX6_PAD_SD1_DATA1__USB_OTG2_PWR = IOMUX_PAD(0x0454, 0x01C8, 8, 0x0000, 0, 0), + + MX6_PAD_SD1_DATA2__USDHC1_DATA2 = IOMUX_PAD(0x0458, 0x01CC, 0, 0x0000, 0, 0), + MX6_PAD_SD1_DATA2__GPT2_CAPTURE1 = IOMUX_PAD(0x0458, 0x01CC, 1, 0x0598, 1, 0), + MX6_PAD_SD1_DATA2__SAI2_RX_DATA = IOMUX_PAD(0x0458, 0x01CC, 2, 0x05F4, 1, 0), + MX6_PAD_SD1_DATA2__FLEXCAN2_TX = IOMUX_PAD(0x0458, 0x01CC, 3, 0x0000, 0, 0), + MX6_PAD_SD1_DATA2__EIM_ADDR23 = IOMUX_PAD(0x0458, 0x01CC, 4, 0x0000, 0, 0), + MX6_PAD_SD1_DATA2__GPIO2_IO20 = IOMUX_PAD(0x0458, 0x01CC, 5, 0x0000, 0, 0), + MX6_PAD_SD1_DATA2__CCM_CLKO1 = IOMUX_PAD(0x0458, 0x01CC, 6, 0x0000, 0, 0), + MX6_PAD_SD1_DATA2__USB_OTG2_OC = IOMUX_PAD(0x0458, 0x01CC, 8, 0x0660, 2, 0), + + MX6_PAD_SD1_DATA3__USDHC1_DATA3 = IOMUX_PAD(0x045C, 0x01D0, 0, 0x0000, 0, 0), + MX6_PAD_SD1_DATA3__GPT2_CAPTURE2 = IOMUX_PAD(0x045C, 0x01D0, 1, 0x059C, 1, 0), + MX6_PAD_SD1_DATA3__SAI2_TX_DATA = IOMUX_PAD(0x045C, 0x01D0, 2, 0x0000, 0, 0), + MX6_PAD_SD1_DATA3__FLEXCAN2_RX = IOMUX_PAD(0x045C, 0x01D0, 3, 0x0588, 3, 0), + MX6_PAD_SD1_DATA3__EIM_ADDR24 = IOMUX_PAD(0x045C, 0x01D0, 4, 0x0000, 0, 0), + MX6_PAD_SD1_DATA3__GPIO2_IO21 = IOMUX_PAD(0x045C, 0x01D0, 5, 0x0000, 0, 0), + MX6_PAD_SD1_DATA3__CCM_CLKO2 = IOMUX_PAD(0x045C, 0x01D0, 6, 0x0000, 0, 0), + MX6_PAD_SD1_DATA3__ANATOP_OTG2_ID = IOMUX_PAD(0x045C, 0x01D0, 8, 0x04BC, 2, 0), + + MX6_PAD_CSI_MCLK__CSI_MCLK = IOMUX_PAD(0x0460, 0x01D4, 0, 0x0000, 0, 0), + MX6_PAD_CSI_MCLK__USDHC2_CD_B = IOMUX_PAD(0x0460, 0x01D4, 1, 0x0674, 0, 0), + MX6_PAD_CSI_MCLK__RAWNAND_CE2_B = IOMUX_PAD(0x0460, 0x01D4, 2, 0x0000, 0, 0), + MX6_PAD_CSI_MCLK__I2C1_SDA = IOMUX_PAD(0x0460, 0x01D4, IOMUX_CONFIG_SION | 3, 0x05A8, 0, 0), + MX6_PAD_CSI_MCLK__EIM_CS0_B = IOMUX_PAD(0x0460, 0x01D4, 4, 0x0000, 0, 0), + MX6_PAD_CSI_MCLK__GPIO4_IO17 = IOMUX_PAD(0x0460, 0x01D4, 5, 0x0000, 0, 0), + MX6_PAD_CSI_MCLK__SNVS_HP_VIO_5_CTL = IOMUX_PAD(0x0460, 0x01D4, 6, 0x0000, 0, 0), + MX6_PAD_CSI_MCLK__UART6_DCE_TX = IOMUX_PAD(0x0460, 0x01D4, 8, 0x0000, 0, 0), + MX6_PAD_CSI_MCLK__UART6_DTE_RX = IOMUX_PAD(0x0460, 0x01D4, 8, 0x064C, 0, 0), + + MX6_PAD_CSI_PIXCLK__CSI_PIXCLK = IOMUX_PAD(0x0464, 0x01D8, 0, 0x0528, 1, 0), + MX6_PAD_CSI_PIXCLK__USDHC2_WP = IOMUX_PAD(0x0464, 0x01D8, 1, 0x069C, 2, 0), + MX6_PAD_CSI_PIXCLK__RAWNAND_CE3_B = IOMUX_PAD(0x0464, 0x01D8, 2, 0x0000, 0, 0), + MX6_PAD_CSI_PIXCLK__I2C1_SCL = IOMUX_PAD(0x0464, 0x01D8, IOMUX_CONFIG_SION | 3, 0x05A4, 2, 0), + MX6_PAD_CSI_PIXCLK__EIM_OE = IOMUX_PAD(0x0464, 0x01D8, 4, 0x0000, 0, 0), + MX6_PAD_CSI_PIXCLK__GPIO4_IO18 = IOMUX_PAD(0x0464, 0x01D8, 5, 0x0000, 0, 0), + MX6_PAD_CSI_PIXCLK__SNVS_HP_VIO_5 = IOMUX_PAD(0x0464, 0x01D8, 6, 0x0000, 0, 0), + MX6_PAD_CSI_PIXCLK__UART6_DCE_RX = IOMUX_PAD(0x0464, 0x01D8, 8, 0x064C, 3, 0), + MX6_PAD_CSI_PIXCLK__UART6_DTE_TX = IOMUX_PAD(0x0464, 0x01D8, 8, 0x0000, 0, 0), + + MX6_PAD_CSI_VSYNC__CSI_VSYNC = IOMUX_PAD(0x0468, 0x01DC, 0, 0x052C, 0, 0), + MX6_PAD_CSI_VSYNC__USDHC2_CLK = IOMUX_PAD(0x0468, 0x01DC, 1, 0x0670, 0, 0), + MX6_PAD_CSI_VSYNC__SIM1_PORT1_CLK = IOMUX_PAD(0x0468, 0x01DC, 2, 0x0000, 0, 0), + MX6_PAD_CSI_VSYNC__I2C2_SDA = IOMUX_PAD(0x0468, 0x01DC, IOMUX_CONFIG_SION | 3, 0x05B0, 0, 0), + MX6_PAD_CSI_VSYNC__EIM_RW = IOMUX_PAD(0x0468, 0x01DC, 4, 0x0000, 0, 0), + MX6_PAD_CSI_VSYNC__GPIO4_IO19 = IOMUX_PAD(0x0468, 0x01DC, 5, 0x0000, 0, 0), + MX6_PAD_CSI_VSYNC__PWM7_OUT = IOMUX_PAD(0x0468, 0x01DC, 6, 0x0000, 0, 0), + MX6_PAD_CSI_VSYNC__UART6_DCE_RTS = IOMUX_PAD(0x0468, 0x01DC, 8, 0x0648, 0, 0), + MX6_PAD_CSI_VSYNC__UART6_DTE_CTS = IOMUX_PAD(0x0468, 0x01DC, 8, 0x0000, 0, 0), + + MX6_PAD_CSI_HSYNC__CSI_HSYNC = IOMUX_PAD(0x046C, 0x01E0, 0, 0x0524, 0, 0), + MX6_PAD_CSI_HSYNC__USDHC2_CMD = IOMUX_PAD(0x046C, 0x01E0, 1, 0x0678, 0, 0), + MX6_PAD_CSI_HSYNC__SIM1_PORT1_PD = IOMUX_PAD(0x046C, 0x01E0, 2, 0x0000, 0, 0), + MX6_PAD_CSI_HSYNC__I2C2_SCL = IOMUX_PAD(0x046C, 0x01E0, IOMUX_CONFIG_SION | 3, 0x05AC, 0, 0), + MX6_PAD_CSI_HSYNC__EIM_LBA_B = IOMUX_PAD(0x046C, 0x01E0, 4, 0x0000, 0, 0), + MX6_PAD_CSI_HSYNC__GPIO4_IO20 = IOMUX_PAD(0x046C, 0x01E0, 5, 0x0000, 0, 0), + MX6_PAD_CSI_HSYNC__PWM8_OUT = IOMUX_PAD(0x046C, 0x01E0, 6, 0x0000, 0, 0), + MX6_PAD_CSI_HSYNC__UART6_DCE_CTS = IOMUX_PAD(0x046C, 0x01E0, 8, 0x0000, 0, 0), + MX6_PAD_CSI_HSYNC__UART6_DTE_RTS = IOMUX_PAD(0x046C, 0x01E0, 8, 0x0648, 1, 0), + + MX6_PAD_CSI_DATA00__CSI_DATA02 = IOMUX_PAD(0x0470, 0x01E4, 0, 0x04C4, 0, 0), + MX6_PAD_CSI_DATA00__USDHC2_DATA0 = IOMUX_PAD(0x0470, 0x01E4, 1, 0x067C, 0, 0), + MX6_PAD_CSI_DATA00__SIM1_PORT1_RST_B = IOMUX_PAD(0x0470, 0x01E4, 2, 0x0000, 0, 0), + MX6_PAD_CSI_DATA00__ECSPI2_SCLK = IOMUX_PAD(0x0470, 0x01E4, 3, 0x0544, 0, 0), + MX6_PAD_CSI_DATA00__EIM_AD00 = IOMUX_PAD(0x0470, 0x01E4, 4, 0x0000, 0, 0), + MX6_PAD_CSI_DATA00__GPIO4_IO21 = IOMUX_PAD(0x0470, 0x01E4, 5, 0x0000, 0, 0), + MX6_PAD_CSI_DATA00__SRC_INT_BOOT = IOMUX_PAD(0x0470, 0x01E4, 6, 0x0000, 0, 0), + MX6_PAD_CSI_DATA00__UART5_DCE_TX = IOMUX_PAD(0x0470, 0x01E4, 8, 0x0000, 0, 0), + MX6_PAD_CSI_DATA00__UART5_DTE_RX = IOMUX_PAD(0x0470, 0x01E4, 8, 0x0644, 0, 0), + + MX6_PAD_CSI_DATA01__CSI_DATA03 = IOMUX_PAD(0x0474, 0x01E8, 0, 0x04C8, 0, 0), + MX6_PAD_CSI_DATA01__USDHC2_DATA1 = IOMUX_PAD(0x0474, 0x01E8, 1, 0x0680, 0, 0), + MX6_PAD_CSI_DATA01__SIM1_PORT1_SVEN = IOMUX_PAD(0x0474, 0x01E8, 2, 0x0000, 0, 0), + MX6_PAD_CSI_DATA01__ECSPI2_SS0 = IOMUX_PAD(0x0474, 0x01E8, 3, 0x0550, 0, 0), + MX6_PAD_CSI_DATA01__EIM_AD01 = IOMUX_PAD(0x0474, 0x01E8, 4, 0x0000, 0, 0), + MX6_PAD_CSI_DATA01__GPIO4_IO22 = IOMUX_PAD(0x0474, 0x01E8, 5, 0x0000, 0, 0), + MX6_PAD_CSI_DATA01__SAI1_MCLK = IOMUX_PAD(0x0474, 0x01E8, 6, 0x05E0, 0, 0), + MX6_PAD_CSI_DATA01__UART5_DCE_RX = IOMUX_PAD(0x0474, 0x01E8, 8, 0x0644, 1, 0), + MX6_PAD_CSI_DATA01__UART5_DTE_TX = IOMUX_PAD(0x0474, 0x01E8, 8, 0x0000, 0, 0), + + MX6_PAD_CSI_DATA02__CSI_DATA04 = IOMUX_PAD(0x0478, 0x01EC, 0, 0x04D8, 1, 0), + MX6_PAD_CSI_DATA02__USDHC2_DATA2 = IOMUX_PAD(0x0478, 0x01EC, 1, 0x0684, 2, 0), + MX6_PAD_CSI_DATA02__SIM1_PORT1_TRXD = IOMUX_PAD(0x0478, 0x01EC, 2, 0x0000, 0, 0), + MX6_PAD_CSI_DATA02__ECSPI2_MOSI = IOMUX_PAD(0x0478, 0x01EC, 3, 0x054C, 1, 0), + MX6_PAD_CSI_DATA02__EIM_AD02 = IOMUX_PAD(0x0478, 0x01EC, 4, 0x0000, 0, 0), + MX6_PAD_CSI_DATA02__GPIO4_IO23 = IOMUX_PAD(0x0478, 0x01EC, 5, 0x0000, 0, 0), + MX6_PAD_CSI_DATA02__SAI1_RX_SYNC = IOMUX_PAD(0x0478, 0x01EC, 6, 0x0000, 0, 0), + MX6_PAD_CSI_DATA02__UART5_DCE_RTS = IOMUX_PAD(0x0478, 0x01EC, 8, 0x0640, 5, 0), + MX6_PAD_CSI_DATA02__UART5_DTE_CTS = IOMUX_PAD(0x0478, 0x01EC, 8, 0x0000, 0, 0), + + MX6_PAD_CSI_DATA03__CSI_DATA05 = IOMUX_PAD(0x047C, 0x01F0, 0, 0x04CC, 0, 0), + MX6_PAD_CSI_DATA03__USDHC2_DATA3 = IOMUX_PAD(0x047C, 0x01F0, 1, 0x0688, 0, 0), + MX6_PAD_CSI_DATA03__SIM2_PORT1_PD = IOMUX_PAD(0x047C, 0x01F0, 2, 0x0000, 0, 0), + MX6_PAD_CSI_DATA03__ECSPI2_MISO = IOMUX_PAD(0x047C, 0x01F0, 3, 0x0548, 0, 0), + MX6_PAD_CSI_DATA03__EIM_AD03 = IOMUX_PAD(0x047C, 0x01F0, 4, 0x0000, 0, 0), + MX6_PAD_CSI_DATA03__GPIO4_IO24 = IOMUX_PAD(0x047C, 0x01F0, 5, 0x0000, 0, 0), + MX6_PAD_CSI_DATA03__SAI1_RX_BCLK = IOMUX_PAD(0x047C, 0x01F0, 6, 0x0000, 0, 0), + MX6_PAD_CSI_DATA03__UART5_DCE_CTS = IOMUX_PAD(0x047C, 0x01F0, 8, 0x0000, 0, 0), + MX6_PAD_CSI_DATA03__UART5_DTE_RTS = IOMUX_PAD(0x047C, 0x01F0, 8, 0x0640, 0, 0), + + MX6_PAD_CSI_DATA04__CSI_DATA06 = IOMUX_PAD(0x0480, 0x01F4, 0, 0x04DC, 1, 0), + MX6_PAD_CSI_DATA04__USDHC2_DATA4 = IOMUX_PAD(0x0480, 0x01F4, 1, 0x068C, 2, 0), + MX6_PAD_CSI_DATA04__SIM2_PORT1_CLK = IOMUX_PAD(0x0480, 0x01F4, 2, 0x0000, 0, 0), + MX6_PAD_CSI_DATA04__ECSPI1_SCLK = IOMUX_PAD(0x0480, 0x01F4, 3, 0x0534, 1, 0), + MX6_PAD_CSI_DATA04__EIM_AD04 = IOMUX_PAD(0x0480, 0x01F4, 4, 0x0000, 0, 0), + MX6_PAD_CSI_DATA04__GPIO4_IO25 = IOMUX_PAD(0x0480, 0x01F4, 5, 0x0000, 0, 0), + MX6_PAD_CSI_DATA04__SAI1_TX_SYNC = IOMUX_PAD(0x0480, 0x01F4, 6, 0x05EC, 1, 0), + MX6_PAD_CSI_DATA04__USDHC1_WP = IOMUX_PAD(0x0480, 0x01F4, 8, 0x066C, 2, 0), + + MX6_PAD_CSI_DATA05__CSI_DATA07 = IOMUX_PAD(0x0484, 0x01F8, 0, 0x04E0, 1, 0), + MX6_PAD_CSI_DATA05__USDHC2_DATA5 = IOMUX_PAD(0x0484, 0x01F8, 1, 0x0690, 2, 0), + MX6_PAD_CSI_DATA05__SIM2_PORT1_RST_B = IOMUX_PAD(0x0484, 0x01F8, 2, 0x0000, 0, 0), + MX6_PAD_CSI_DATA05__ECSPI1_SS0 = IOMUX_PAD(0x0484, 0x01F8, 3, 0x0540, 1, 0), + MX6_PAD_CSI_DATA05__EIM_AD05 = IOMUX_PAD(0x0484, 0x01F8, 4, 0x0000, 0, 0), + MX6_PAD_CSI_DATA05__GPIO4_IO26 = IOMUX_PAD(0x0484, 0x01F8, 5, 0x0000, 0, 0), + MX6_PAD_CSI_DATA05__SAI1_TX_BCLK = IOMUX_PAD(0x0484, 0x01F8, 6, 0x05E8, 1, 0), + MX6_PAD_CSI_DATA05__USDHC1_CD_B = IOMUX_PAD(0x0484, 0x01F8, 8, 0x0668, 2, 0), + + MX6_PAD_CSI_DATA06__CSI_DATA08 = IOMUX_PAD(0x0488, 0x01FC, 0, 0x04E4, 1, 0), + MX6_PAD_CSI_DATA06__USDHC2_DATA6 = IOMUX_PAD(0x0488, 0x01FC, 1, 0x0694, 2, 0), + MX6_PAD_CSI_DATA06__SIM2_PORT1_SVEN = IOMUX_PAD(0x0488, 0x01FC, 2, 0x0000, 0, 0), + MX6_PAD_CSI_DATA06__ECSPI1_MOSI = IOMUX_PAD(0x0488, 0x01FC, 3, 0x053C, 1, 0), + MX6_PAD_CSI_DATA06__EIM_AD06 = IOMUX_PAD(0x0488, 0x01FC, 4, 0x0000, 0, 0), + MX6_PAD_CSI_DATA06__GPIO4_IO27 = IOMUX_PAD(0x0488, 0x01FC, 5, 0x0000, 0, 0), + MX6_PAD_CSI_DATA06__SAI1_RX_DATA = IOMUX_PAD(0x0488, 0x01FC, 6, 0x05E4, 1, 0), + MX6_PAD_CSI_DATA06__USDHC1_RESET_B = IOMUX_PAD(0x0488, 0x01FC, 8, 0x0000, 0, 0), + + MX6_PAD_CSI_DATA07__CSI_DATA09 = IOMUX_PAD(0x048C, 0x0200, 0, 0x04E8, 1, 0), + MX6_PAD_CSI_DATA07__USDHC2_DATA7 = IOMUX_PAD(0x048C, 0x0200, 1, 0x0698, 2, 0), + MX6_PAD_CSI_DATA07__SIM2_PORT1_TRXD = IOMUX_PAD(0x048C, 0x0200, 2, 0x0000, 0, 0), + MX6_PAD_CSI_DATA07__ECSPI1_MISO = IOMUX_PAD(0x048C, 0x0200, 3, 0x0538, 1, 0), + MX6_PAD_CSI_DATA07__EIM_AD07 = IOMUX_PAD(0x048C, 0x0200, 4, 0x0000, 0, 0), + MX6_PAD_CSI_DATA07__GPIO4_IO28 = IOMUX_PAD(0x048C, 0x0200, 5, 0x0000, 0, 0), + MX6_PAD_CSI_DATA07__SAI1_TX_DATA = IOMUX_PAD(0x048C, 0x0200, 6, 0x0000, 0, 0), + MX6_PAD_CSI_DATA07__USDHC1_VSELECT = IOMUX_PAD(0x048C, 0x0200, 8, 0x0000, 0, 0), +}; +#endif /* __ASM_ARCH_IMX6UL_PINS_H__ */ diff --git a/arch/arm/mach-layerscape/ppa.c b/arch/arm/mach-layerscape/ppa.c index f38220dbc1..53e73f6a58 100644 --- a/arch/arm/mach-layerscape/ppa.c +++ b/arch/arm/mach-layerscape/ppa.c @@ -76,7 +76,7 @@ static int ppa_init(void *ppa, size_t ppa_size, void *sec_firmware_addr) conf = fit_open_configuration(fit, NULL); if (IS_ERR(conf)) { pr_err("Cannot open default config in ppa FIT image: %pe\n", conf); - ret = PTR_ERR(fit); + ret = PTR_ERR(conf); goto err; } diff --git a/arch/arm/mach-mxs/ocotp.c b/arch/arm/mach-mxs/ocotp.c index f230d9ad89..a4df39c2e9 100644 --- a/arch/arm/mach-mxs/ocotp.c +++ b/arch/arm/mach-mxs/ocotp.c @@ -229,13 +229,7 @@ static struct driver_d mxs_ocotp_driver = { .of_compatible = DRV_OF_COMPAT(mxs_ocotp_compatible), }; -static int mxs_ocotp_init(void) -{ - platform_driver_register(&mxs_ocotp_driver); - - return 0; -} -coredevice_initcall(mxs_ocotp_init); +coredevice_platform_driver(mxs_ocotp_driver); int mxs_ocotp_read(void *buf, int count, int offset) { diff --git a/arch/arm/mach-omap/am33xx_clock.c b/arch/arm/mach-omap/am33xx_clock.c index 0a49038270..8fa2c70aa2 100644 --- a/arch/arm/mach-omap/am33xx_clock.c +++ b/arch/arm/mach-omap/am33xx_clock.c @@ -165,6 +165,10 @@ void am33xx_enable_per_clocks(void) __raw_writel(PRCM_MOD_EN, CM_PER_USB0_CLKCTRL); while ((__raw_readl(CM_PER_USB0_CLKCTRL) & 0x30000) != 0x0); + /* TSC & ADC */ + __raw_writel(PRCM_MOD_EN, CM_WKUP_ADC_TSC_CLKCTRL); + while (__raw_readl(CM_WKUP_ADC_TSC_CLKCTRL) != PRCM_MOD_EN); + clkdcoldo = __raw_readl(CM_CLKDCOLDO_DPLL_PER); clkdcoldo = clkdcoldo | 0x100; __raw_writel(clkdcoldo, CM_CLKDCOLDO_DPLL_PER); diff --git a/arch/arm/mach-omap/am33xx_scrm.c b/arch/arm/mach-omap/am33xx_scrm.c index f03fb2bf6a..80510cf5b4 100644 --- a/arch/arm/mach-omap/am33xx_scrm.c +++ b/arch/arm/mach-omap/am33xx_scrm.c @@ -43,9 +43,4 @@ static struct driver_d am33xx_scrm_driver = { .of_compatible = DRV_OF_COMPAT(am33xx_scrm_dt_ids), }; -static int am33xx_scrm_init(void) -{ - return platform_driver_register(&am33xx_scrm_driver); -} - -mem_initcall(am33xx_scrm_init); +mem_platform_driver(am33xx_scrm_driver); diff --git a/arch/arm/mach-omap/boot_order.c b/arch/arm/mach-omap/boot_order.c index db22513bde..4b74fdba66 100644 --- a/arch/arm/mach-omap/boot_order.c +++ b/arch/arm/mach-omap/boot_order.c @@ -70,13 +70,13 @@ static int cmd_boot_order(int argc, char *argv[]) } BAREBOX_CMD_HELP_START(boot_order) -BAREBOX_CMD_HELP_TEXT("Set warm boot order of up to four devices. Each device can be one of:") +BAREBOX_CMD_HELP_TEXT("Set OMAP warm boot order of up to four devices. Each device can be one of:") BAREBOX_CMD_HELP_TEXT("xip xipwait nand onenand mmc1 mmc2_1 mmc2_2 uart usb_1 usb_ulpi usb_2") BAREBOX_CMD_HELP_END BAREBOX_CMD_START(boot_order) .cmd = cmd_boot_order, - BAREBOX_CMD_DESC("set warm boot order") + BAREBOX_CMD_DESC("set OMAP warm boot order") BAREBOX_CMD_OPTS("DEVICE...") BAREBOX_CMD_GROUP(CMD_GRP_BOOT) BAREBOX_CMD_HELP(cmd_boot_order_help) diff --git a/arch/arm/mach-omap/include/mach/am33xx-clock.h b/arch/arm/mach-omap/include/mach/am33xx-clock.h index 284d5f8cf6..e71ecbcd24 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-clock.h +++ b/arch/arm/mach-omap/include/mach/am33xx-clock.h @@ -138,6 +138,7 @@ #define CM_PER_I2C1_CLKCTRL (CM_PER + 0x48) /* I2C1 */ #define CM_PER_I2C2_CLKCTRL (CM_PER + 0x44) /* I2C2 */ #define CM_WKUP_GPIO0_CLKCTRL (CM_WKUP + 0x8) /* GPIO0 */ +#define CM_WKUP_ADC_TSC_CLKCTRL (CM_WKUP + 0xbc)/* TSCADC */ #define CM_PER_MMC0_CLKCTRL (CM_PER + 0x3C) #define CM_PER_MMC1_CLKCTRL (CM_PER + 0xF4) diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index f064a38088..b8ccbaab67 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -8,9 +8,12 @@ config ARCH_STM32MP157 select ARM_PSCI_CLIENT bool -config MACH_STM32MP157C_DK2 +config MACH_STM32MP15XX_DKX select ARCH_STM32MP157 - bool "STM32MP157C-DK2 board" + bool "STM32MP157 DK1 and DK2 boards" + help + builds a single barebox-stm32mp15xx-dkx.img that can be deployed + as SSBL on both the stm32mp157a-dk1 and stm32mp157c-dk2 config MACH_LXA_MC1 select ARCH_STM32MP157 diff --git a/arch/arm/mach-stm32mp/ddrctrl.c b/arch/arm/mach-stm32mp/ddrctrl.c index 962d4c0d52..646fe4401a 100644 --- a/arch/arm/mach-stm32mp/ddrctrl.c +++ b/arch/arm/mach-stm32mp/ddrctrl.c @@ -148,8 +148,4 @@ static struct driver_d stm32mp1_ddr_driver = { .of_compatible = DRV_OF_COMPAT(stm32mp1_ddr_dt_ids), }; -static int stm32mp1_ddr_init(void) -{ - return platform_driver_register(&stm32mp1_ddr_driver); -} -mem_initcall(stm32mp1_ddr_init); +mem_platform_driver(stm32mp1_ddr_driver); diff --git a/arch/arm/mach-stm32mp/include/mach/revision.h b/arch/arm/mach-stm32mp/include/mach/revision.h index 2eb4d44b33..2ef8ef30c3 100644 --- a/arch/arm/mach-stm32mp/include/mach/revision.h +++ b/arch/arm/mach-stm32mp/include/mach/revision.h @@ -6,6 +6,9 @@ #ifndef __MACH_CPUTYPE_H__ #define __MACH_CPUTYPE_H__ +#include <mach/bsec.h> +#include <asm/io.h> +#include <mach/stm32.h> /* ID = Device Version (bit31:16) + Device Part Number (RPN) (bit7:0) * 157X: 2x Cortex-A7, Cortex-M4, CAN FD, GPU, DSI @@ -45,4 +48,52 @@ int stm32mp_package(void); #define cpu_is_stm32mp151c() (stm32mp_cputype() == CPU_STM32MP151Cxx) #define cpu_is_stm32mp151a() (stm32mp_cputype() == CPU_STM32MP151Axx) +/* DBGMCU register */ +#define DBGMCU_APB4FZ1 (STM32_DBGMCU_BASE + 0x2C) +#define DBGMCU_IDC (STM32_DBGMCU_BASE + 0x00) +#define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0) +#define DBGMCU_IDC_DEV_ID_SHIFT 0 +#define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16) +#define DBGMCU_IDC_REV_ID_SHIFT 16 + +#define RCC_DBGCFGR (STM32_RCC_BASE + 0x080C) +#define RCC_DBGCFGR_DBGCKEN BIT(8) + +/* BSEC OTP index */ +#define BSEC_OTP_RPN 1 +#define BSEC_OTP_PKG 16 + +/* Device Part Number (RPN) = OTP_DATA1 lower 8 bits */ +#define RPN_SHIFT 0 +#define RPN_MASK GENMASK(7, 0) + +static inline u32 stm32mp_read_idc(void) +{ + setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); + return readl(IOMEM(DBGMCU_IDC)); +} + +/* Get Device Part Number (RPN) from OTP */ +static inline int __stm32mp_get_cpu_rpn(u32 *rpn) +{ + int ret = bsec_read_field(BSEC_OTP_RPN, rpn); + if (ret) + return ret; + + *rpn = (*rpn >> RPN_SHIFT) & RPN_MASK; + return 0; +} + +static inline int __stm32mp_get_cpu_type(u32 *type) +{ + u32 id; + int ret = __stm32mp_get_cpu_rpn(type); + if (ret) + return ret; + + id = (stm32mp_read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT; + *type |= id << 16; + return 0; +} + #endif /* __MACH_CPUTYPE_H__ */ diff --git a/arch/arm/mach-stm32mp/init.c b/arch/arm/mach-stm32mp/init.c index 7f687fa4f2..e77e99f8fa 100644 --- a/arch/arm/mach-stm32mp/init.c +++ b/arch/arm/mach-stm32mp/init.c @@ -15,26 +15,6 @@ #include <bootsource.h> #include <dt-bindings/pinctrl/stm32-pinfunc.h> -/* DBGMCU register */ -#define DBGMCU_IDC (STM32_DBGMCU_BASE + 0x00) -#define DBGMCU_APB4FZ1 (STM32_DBGMCU_BASE + 0x2C) -#define DBGMCU_APB4FZ1_IWDG2 BIT(2) -#define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0) -#define DBGMCU_IDC_DEV_ID_SHIFT 0 -#define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16) -#define DBGMCU_IDC_REV_ID_SHIFT 16 - -#define RCC_DBGCFGR (STM32_RCC_BASE + 0x080C) -#define RCC_DBGCFGR_DBGCKEN BIT(8) - -/* BSEC OTP index */ -#define BSEC_OTP_RPN 1 -#define BSEC_OTP_PKG 16 - -/* Device Part Number (RPN) = OTP_DATA1 lower 8 bits */ -#define RPN_SHIFT 0 -#define RPN_MASK GENMASK(7, 0) - /* Package = bit 27:29 of OTP16 * - 100: LBGA448 (FFI) => AA = LFBGA 18x18mm 448 balls p. 0.8mm * - 011: LBGA354 (LCI) => AB = LFBGA 16x16mm 359 balls p. 0.8mm @@ -152,38 +132,9 @@ int stm32mp_package(void) return __stm32mp_package; } -static inline u32 read_idc(void) -{ - setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); - return readl(IOMEM(DBGMCU_IDC)); -} - -/* Get Device Part Number (RPN) from OTP */ -static int get_cpu_rpn(u32 *rpn) -{ - int ret = bsec_read_field(BSEC_OTP_RPN, rpn); - if (ret) - return ret; - - *rpn = (*rpn >> RPN_SHIFT) & RPN_MASK; - return 0; -} - static u32 get_cpu_revision(void) { - return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT; -} - -static int get_cpu_type(u32 *type) -{ - u32 id; - int ret = get_cpu_rpn(type); - if (ret) - return ret; - - id = (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT; - *type |= id << 16; - return 0; + return (stm32mp_read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT; } static int get_cpu_package(u32 *pkg) @@ -250,7 +201,7 @@ static int setup_cpu_type(void) u32 pkg; int ret; - get_cpu_type(&__stm32mp_cputype); + __stm32mp_get_cpu_type(&__stm32mp_cputype); switch (__stm32mp_cputype) { case CPU_STM32MP157Fxx: cputypestr = "157F"; @@ -366,4 +317,4 @@ static int stm32mp_init(void) return 0; } -postcore_initcall(stm32mp_init); +core_initcall(stm32mp_init); diff --git a/arch/arm/mach-stm32mp/stm32image.c b/arch/arm/mach-stm32mp/stm32image.c index 84975c5c3b..207df6894d 100644 --- a/arch/arm/mach-stm32mp/stm32image.c +++ b/arch/arm/mach-stm32mp/stm32image.c @@ -43,8 +43,6 @@ static struct image_handler image_handler_stm32_image_v1_handler = { static int stm32mp_register_stm32image_image_handler(void) { - register_image_handler(&image_handler_stm32_image_v1_handler); - - return 0; + return register_image_handler(&image_handler_stm32_image_v1_handler); } late_initcall(stm32mp_register_stm32image_image_handler); diff --git a/arch/arm/mach-tegra/tegra20-timer.c b/arch/arm/mach-tegra/tegra20-timer.c index 2ba58bd65e..34d34f7723 100644 --- a/arch/arm/mach-tegra/tegra20-timer.c +++ b/arch/arm/mach-tegra/tegra20-timer.c @@ -104,8 +104,4 @@ static struct driver_d tegra20_timer_driver = { .of_compatible = DRV_OF_COMPAT(tegra20_timer_dt_ids), }; -static int tegra20_timer_init(void) -{ - return platform_driver_register(&tegra20_timer_driver); -} -core_initcall(tegra20_timer_init); +core_platform_driver(tegra20_timer_driver); diff --git a/arch/arm/mach-zynq/bootm-zynqimg.c b/arch/arm/mach-zynq/bootm-zynqimg.c index e903ab6679..77ed6880e4 100644 --- a/arch/arm/mach-zynq/bootm-zynqimg.c +++ b/arch/arm/mach-zynq/bootm-zynqimg.c @@ -42,8 +42,6 @@ static struct image_handler zynq_image_handler = { static int zynq_register_image_handler(void) { - register_image_handler(&zynq_image_handler); - - return 0; + return register_image_handler(&zynq_image_handler); } late_initcall(zynq_register_image_handler); diff --git a/arch/arm/mach-zynqmp/firmware-zynqmp.c b/arch/arm/mach-zynqmp/firmware-zynqmp.c index 6123aa1ea4..c23b434031 100644 --- a/arch/arm/mach-zynqmp/firmware-zynqmp.c +++ b/arch/arm/mach-zynqmp/firmware-zynqmp.c @@ -637,8 +637,4 @@ static struct driver_d zynqmp_firmware_driver = { .of_compatible = DRV_OF_COMPAT(zynqmp_firmware_id_table), }; -static int zynqmp_firmware_init(void) -{ - return platform_driver_register(&zynqmp_firmware_driver); -} -core_initcall(zynqmp_firmware_init); +core_platform_driver(zynqmp_firmware_driver); diff --git a/arch/mips/include/asm/debug_ll_ns16550.h b/arch/mips/include/asm/debug_ll_ns16550.h index df58c4cf0d..703bfaee77 100644 --- a/arch/mips/include/asm/debug_ll_ns16550.h +++ b/arch/mips/include/asm/debug_ll_ns16550.h @@ -58,14 +58,14 @@ static inline void PUTC_LL(char ch) * Macros for use in assembly language code */ -.macro debug_ll_ns16550_init +.macro debug_ll_ns16550_init divisor=DEBUG_LL_UART_DIVISOR #ifdef CONFIG_DEBUG_LL la t0, DEBUG_LL_UART_ADDR li t1, UART_LCR_DLAB /* DLAB on */ sb t1, UART_LCR(t0) /* Write it out */ - li t1, DEBUG_LL_UART_DIVISOR + li t1, \divisor sb t1, UART_DLL(t0) /* write low order byte */ srl t1, t1, 8 sb t1, UART_DLM(t0) /* write high order byte */ diff --git a/arch/mips/mach-ath79/art.c b/arch/mips/mach-ath79/art.c index 44118c19e9..d119ca6d1a 100644 --- a/arch/mips/mach-ath79/art.c +++ b/arch/mips/mach-ath79/art.c @@ -103,10 +103,4 @@ static struct driver_d art_driver = { .of_compatible = art_dt_ids, }; -static int art_of_driver_init(void) -{ - platform_driver_register(&art_driver); - - return 0; -} -late_initcall(art_of_driver_init); +late_platform_driver(art_driver); diff --git a/arch/riscv/include/asm/debug_ll_ns16550.h b/arch/riscv/include/asm/debug_ll_ns16550.h index e891cbda25..f1c2ccbd0a 100644 --- a/arch/riscv/include/asm/debug_ll_ns16550.h +++ b/arch/riscv/include/asm/debug_ll_ns16550.h @@ -88,14 +88,14 @@ static inline void debug_ll_ns16550_init(void) * Macros for use in assembly language code */ -.macro debug_ll_ns16550_init +.macro debug_ll_ns16550_init divisor=DEBUG_LL_UART_DIVISOR #ifdef CONFIG_DEBUG_LL li t0, DEBUG_LL_UART_ADDR li t1, UART_LCR_DLAB /* DLAB on */ UART_REG_S t1, UART_LCR(t0) /* Write it out */ - li t1, DEBUG_LL_UART_DIVISOR + li t1, \divisor UART_REG_S t1, UART_DLL(t0) /* write low order byte */ srl t1, t1, 8 UART_REG_S t1, UART_DLM(t0) /* write high order byte */ diff --git a/arch/sandbox/board/devices.c b/arch/sandbox/board/devices.c index 72e62552a3..1fd1913ae6 100644 --- a/arch/sandbox/board/devices.c +++ b/arch/sandbox/board/devices.c @@ -9,6 +9,9 @@ #include <mach/linux.h> #include <init.h> #include <mach/linux.h> +#include <asm/io.h> + +unsigned char __pci_iobase[IO_SPACE_LIMIT]; static LIST_HEAD(sandbox_device_list); diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h index 6a0e77aead..9f9cd3a42a 100644 --- a/arch/sandbox/include/asm/io.h +++ b/arch/sandbox/include/asm/io.h @@ -1,7 +1,11 @@ #ifndef __ASM_SANDBOX_IO_H #define __ASM_SANDBOX_IO_H -#define IO_SPACE_LIMIT 0 +#define IO_SPACE_LIMIT 0xffff +/* pacify static analyzers */ +#define PCI_IOBASE ((void __iomem *)__pci_iobase) + +extern unsigned char __pci_iobase[IO_SPACE_LIMIT]; #include <asm-generic/io.h> #include <asm-generic/bitio.h> diff --git a/commands/Kconfig b/commands/Kconfig index 9114d3cb31..df18715f20 100644 --- a/commands/Kconfig +++ b/commands/Kconfig @@ -285,9 +285,9 @@ config CMD_AT91_BOOT_TEST config CMD_BOOT_ORDER tristate depends on ARCH_OMAP4 - prompt "boot_order" + prompt "OMAP boot_order" help - Set warm boot order (the next boot device on a warm reset). + Set OMAP warm boot order (the next boot device on a warm reset). Usage: boot_order DEVICE... diff --git a/commands/uimage.c b/commands/uimage.c index 982da7101a..fb4df780bd 100644 --- a/commands/uimage.c +++ b/commands/uimage.c @@ -19,7 +19,7 @@ static int uimage_flush(void *buf, unsigned int len) static int do_uimage(int argc, char *argv[]) { struct uimage_handle *handle; - int ret; + int ret = 0; int verify = 0; int fd; int opt; @@ -84,7 +84,7 @@ static int do_uimage(int argc, char *argv[]) err: uimage_close(handle); - return ret ? 1 : 0; + return ret ? COMMAND_ERROR : COMMAND_SUCCESS; } BAREBOX_CMD_HELP_START(uimage) diff --git a/common/Kconfig b/common/Kconfig index 1a5bb53182..8c9fe8e788 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -1292,7 +1292,6 @@ config DEBUG_IMX_UART_PORT DEBUG_IMX51_UART || \ DEBUG_IMX53_UART || \ DEBUG_IMX6Q_UART || \ - DEBUG_IMX6SL_UART || \ DEBUG_IMX7D_UART || \ DEBUG_IMX8M_UART || \ DEBUG_VF610_UART diff --git a/common/blspec.c b/common/blspec.c index 9499d32477..a07343f427 100644 --- a/common/blspec.c +++ b/common/blspec.c @@ -766,7 +766,7 @@ int blspec_scan_devices(struct bootentries *bootentries) device_detect(dev); for_each_block_device(bdev) { - struct cdev *cdev = &bdev->cdev; + struct cdev *cdev; list_for_each_entry(cdev, &bdev->dev->cdevs, devices_list) { ret = blspec_scan_cdev(bootentries, cdev); diff --git a/common/boot.c b/common/boot.c index f546fce62c..90d504e3c3 100644 --- a/common/boot.c +++ b/common/boot.c @@ -136,7 +136,7 @@ static int init_boot(void) } late_initcall(init_boot); -BAREBOX_MAGICVAR_NAMED(global_watchdog_timeout, global.boot.watchdog_timeout, +BAREBOX_MAGICVAR(global.boot.watchdog_timeout, "Watchdog enable timeout in seconds before booting"); int boot_entry(struct bootentry *be, int verbose, int dryrun) @@ -361,4 +361,4 @@ void bootsources_list(struct bootentries *bootentries) printf("%-20s %s\n", entry->title, entry->description); } -BAREBOX_MAGICVAR_NAMED(global_boot_default, global.boot.default, "default boot order"); +BAREBOX_MAGICVAR(global.boot.default, "default boot order"); diff --git a/common/bootargs.c b/common/bootargs.c index 97d0e15eaf..fc345560ec 100644 --- a/common/bootargs.c +++ b/common/bootargs.c @@ -84,6 +84,6 @@ int linux_bootargs_overwrite(const char *bootargs) return 0; } -BAREBOX_MAGICVAR_NAMED(global_linux_bootargs_, global.linux.bootargs.*, "Linux bootargs variables"); -BAREBOX_MAGICVAR_NAMED(global_linux_mtdparts_, global.linux.mtdparts.*, "Linux mtdparts variables"); -BAREBOX_MAGICVAR_NAMED(global_linux_blkdevparts_, global.linux.blkdevparts.*, "Linux blkdevparts variables"); +BAREBOX_MAGICVAR(global.linux.bootargs.*, "Linux bootargs variables"); +BAREBOX_MAGICVAR(global.linux.mtdparts.*, "Linux mtdparts variables"); +BAREBOX_MAGICVAR(global.linux.blkdevparts.*, "Linux blkdevparts variables"); diff --git a/common/bootchooser.c b/common/bootchooser.c index c08db03eba..7aa59d8a82 100644 --- a/common/bootchooser.c +++ b/common/bootchooser.c @@ -954,21 +954,15 @@ static int bootchooser_init(void) } device_initcall(bootchooser_init); -BAREBOX_MAGICVAR_NAMED(global_bootchooser_disable_on_zero_attempts, - global.bootchooser.disable_on_zero_attempts, - "bootchooser: Disable target when remaining attempts counter reaches 0"); -BAREBOX_MAGICVAR_NAMED(global_bootchooser_retry, - global.bootchooser.retry, - "bootchooser: Try again when booting a target fails"); -BAREBOX_MAGICVAR_NAMED(global_bootchooser_targets, - global.bootchooser.targets, - "bootchooser: Space separated list of target names"); -BAREBOX_MAGICVAR_NAMED(global_bootchooser_default_attempts, - global.bootchooser.default_attempts, - "bootchooser: Default number of attempts for a target"); -BAREBOX_MAGICVAR_NAMED(global_bootchooser_default_priority, - global.bootchooser.default_priority, - "bootchooser: Default priority for a target"); -BAREBOX_MAGICVAR_NAMED(global_bootchooser_state_prefix, - global.bootchooser.state_prefix, - "bootchooser: state name prefix, empty for nv backend"); +BAREBOX_MAGICVAR(global.bootchooser.disable_on_zero_attempts, + "bootchooser: Disable target when remaining attempts counter reaches 0"); +BAREBOX_MAGICVAR(global.bootchooser.retry, + "bootchooser: Try again when booting a target fails"); +BAREBOX_MAGICVAR(global.bootchooser.targets, + "bootchooser: Space separated list of target names"); +BAREBOX_MAGICVAR(global.bootchooser.default_attempts, + "bootchooser: Default number of attempts for a target"); +BAREBOX_MAGICVAR(global.bootchooser.default_priority, + "bootchooser: Default priority for a target"); +BAREBOX_MAGICVAR(global.bootchooser.state_prefix, + "bootchooser: state name prefix, empty for nv backend"); diff --git a/common/bootm.c b/common/bootm.c index 5da78ce379..f70ef10100 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -846,14 +846,14 @@ static int bootm_init(void) late_initcall(bootm_init); BAREBOX_MAGICVAR(bootargs, "Linux kernel parameters"); -BAREBOX_MAGICVAR_NAMED(global_bootm_image, global.bootm.image, "bootm default boot image"); -BAREBOX_MAGICVAR_NAMED(global_bootm_image_loadaddr, global.bootm.image.loadaddr, "bootm default boot image loadaddr"); -BAREBOX_MAGICVAR_NAMED(global_bootm_initrd, global.bootm.initrd, "bootm default initrd"); -BAREBOX_MAGICVAR_NAMED(global_bootm_initrd_loadaddr, global.bootm.initrd.loadaddr, "bootm default initrd loadaddr"); -BAREBOX_MAGICVAR_NAMED(global_bootm_oftree, global.bootm.oftree, "bootm default oftree"); -BAREBOX_MAGICVAR_NAMED(global_bootm_tee, global.bootm.tee, "bootm default tee image"); -BAREBOX_MAGICVAR_NAMED(global_bootm_verify, global.bootm.verify, "bootm default verify level"); -BAREBOX_MAGICVAR_NAMED(global_bootm_verbose, global.bootm.verbose, "bootm default verbosity level (0=quiet)"); -BAREBOX_MAGICVAR_NAMED(global_bootm_appendroot, global.bootm.appendroot, "Add root= option to Kernel to mount rootfs from the device the Kernel comes from (default, device can be overridden via global.bootm.root_dev)"); -BAREBOX_MAGICVAR_NAMED(global_bootm_root_dev, global.bootm.root_dev, "bootm default root device (overrides default device in global.bootm.appendroot)"); -BAREBOX_MAGICVAR_NAMED(global_bootm_provide_machine_id, global.bootm.provide_machine_id, "If true, add systemd.machine_id= with value of global.machine_id to Kernel"); +BAREBOX_MAGICVAR(global.bootm.image, "bootm default boot image"); +BAREBOX_MAGICVAR(global.bootm.image.loadaddr, "bootm default boot image loadaddr"); +BAREBOX_MAGICVAR(global.bootm.initrd, "bootm default initrd"); +BAREBOX_MAGICVAR(global.bootm.initrd.loadaddr, "bootm default initrd loadaddr"); +BAREBOX_MAGICVAR(global.bootm.oftree, "bootm default oftree"); +BAREBOX_MAGICVAR(global.bootm.tee, "bootm default tee image"); +BAREBOX_MAGICVAR(global.bootm.verify, "bootm default verify level"); +BAREBOX_MAGICVAR(global.bootm.verbose, "bootm default verbosity level (0=quiet)"); +BAREBOX_MAGICVAR(global.bootm.appendroot, "Add root= option to Kernel to mount rootfs from the device the Kernel comes from (default, device can be overridden via global.bootm.root_dev)"); +BAREBOX_MAGICVAR(global.bootm.root_dev, "bootm default root device (overrides default device in global.bootm.appendroot)"); +BAREBOX_MAGICVAR(global.bootm.provide_machine_id, "If true, add systemd.machine_id= with value of global.machine_id to Kernel"); diff --git a/common/console.c b/common/console.c index 3375ecb7e5..ffb5c0f75f 100644 --- a/common/console.c +++ b/common/console.c @@ -628,8 +628,8 @@ void console_ctrlc_forbid(void) ctrlc_allowed = 0; } -BAREBOX_MAGICVAR_NAMED(global_console_ctrlc_allowed, global.console.ctrlc_allowed, +BAREBOX_MAGICVAR(global.console.ctrlc_allowed, "If true, scripts can be aborted with ctrl-c"); -BAREBOX_MAGICVAR_NAMED(global_linux_bootargs_console, global.linux.bootargs.console, +BAREBOX_MAGICVAR(global.linux.bootargs.console, "console= argument for Linux from the stdout-path property in /chosen node"); diff --git a/common/fastboot.c b/common/fastboot.c index bcfadfad3d..1b6dc28d8e 100644 --- a/common/fastboot.c +++ b/common/fastboot.c @@ -959,12 +959,9 @@ static int fastboot_globalvars_init(void) device_initcall(fastboot_globalvars_init); -BAREBOX_MAGICVAR_NAMED(global_fastboot_max_download_size, - global.fastboot.max_download_size, - "Fastboot maximum download size"); -BAREBOX_MAGICVAR_NAMED(global_fastboot_partitions, - global.fastboot.partitions, +BAREBOX_MAGICVAR(global.fastboot.max_download_size, + "Fastboot maximum download size"); +BAREBOX_MAGICVAR(global.fastboot.partitions, "Partitions exported for update via fastboot"); -BAREBOX_MAGICVAR_NAMED(global_fastboot_bbu, - global.fastboot.bbu, +BAREBOX_MAGICVAR(global.fastboot.bbu, "Export barebox update handlers via fastboot"); diff --git a/common/globalvar.c b/common/globalvar.c index 5bde86aad0..60793d7a30 100644 --- a/common/globalvar.c +++ b/common/globalvar.c @@ -652,11 +652,16 @@ static int globalvar_init(void) globalvar_add_simple("version", UTS_RELEASE); + if (strlen(buildsystem_version_string) > 0) + globalvar_add_simple("buildsystem.version", buildsystem_version_string); + return 0; } pure_initcall(globalvar_init); -BAREBOX_MAGICVAR_NAMED(global_version, global.version, "The barebox version"); +BAREBOX_MAGICVAR(global.version, "The barebox version"); +BAREBOX_MAGICVAR(global.buildsystem.version, + "version of buildsystem barebox was built with"); /** * nvvar_save - save NV variables to persistent environment @@ -668,7 +673,7 @@ int nvvar_save(void) { struct param_d *param; const char *env = default_environment_path_get(); - int ret; + int ret = 0; #define TMPDIR "/.env.tmp" if (!nv_dirty || !env) return 0; diff --git a/common/imd-barebox.c b/common/imd-barebox.c index e5cdfd1aed..06731d0600 100644 --- a/common/imd-barebox.c +++ b/common/imd-barebox.c @@ -23,4 +23,5 @@ __BAREBOX_IMD_SECTION(.barebox_imd_end) = { BAREBOX_IMD_TAG_STRING(imd_build_tag, IMD_TYPE_BUILD, UTS_VERSION, 1); BAREBOX_IMD_TAG_STRING(imd_release_tag, IMD_TYPE_RELEASE, UTS_RELEASE, 1); +BAREBOX_IMD_TAG_STRING(imd_buildsystem_version_tag, IMD_TYPE_BUILDSYSTEM, BUILDSYSTEM_VERSION, 1); BAREBOX_IMD_CRC(imd_crc32, 0x0, 1); diff --git a/common/imd.c b/common/imd.c index 0644e6d3bf..4fd4431aa9 100644 --- a/common/imd.c +++ b/common/imd.c @@ -168,6 +168,9 @@ static struct imd_type_names imd_types[] = { }, { .type = IMD_TYPE_CRC32, .name = "crc32", + }, { + .type = IMD_TYPE_BUILDSYSTEM, + .name = "buildsystem version", }, }; diff --git a/common/kallsyms.c b/common/kallsyms.c index 2c16ab2884..f641903147 100644 --- a/common/kallsyms.c +++ b/common/kallsyms.c @@ -15,8 +15,8 @@ extern const unsigned long kallsyms_markers[] __attribute__((weak)); static inline int is_kernel_text(unsigned long addr) { - if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end) - return 1; + if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end) + return 1; return 0; } diff --git a/common/machine_id.c b/common/machine_id.c index e678bb7fe8..c1309ccafd 100644 --- a/common/machine_id.c +++ b/common/machine_id.c @@ -66,4 +66,4 @@ out: } late_initcall(machine_id_set_bootarg); -BAREBOX_MAGICVAR_NAMED(global_machine_id, global.machine_id, "Persistent device-specific, hexadecimal, 32-character id"); +BAREBOX_MAGICVAR(global.machine_id, "Persistent device-specific, hexadecimal, 32-character id"); diff --git a/common/memsize.c b/common/memsize.c index 915ab87b34..2fd2b71457 100644 --- a/common/memsize.c +++ b/common/memsize.c @@ -58,7 +58,7 @@ long get_ram_size(volatile long *base, long maxsize) *addr = 0; sync (); - if ((val = *addr) != 0) { + if (*addr != 0) { /* Restore the original data before leaving the function. */ sync (); diff --git a/common/misc.c b/common/misc.c index 1c7f937608..323500dfa8 100644 --- a/common/misc.c +++ b/common/misc.c @@ -22,6 +22,7 @@ #include <led.h> #include <of.h> #include <restart.h> +#include <linux/stringify.h> int errno; EXPORT_SYMBOL(errno); @@ -29,7 +30,7 @@ EXPORT_SYMBOL(errno); const char *strerror(int errnum) { - static char errno_string[10]; + static char errno_string[sizeof("error -2147483648")]; #ifdef CONFIG_ERRNO_MESSAGES char *str; @@ -154,7 +155,7 @@ const char *barebox_get_model(void) } EXPORT_SYMBOL(barebox_get_model); -BAREBOX_MAGICVAR_NAMED(global_model, global.model, "Product name of this hardware"); +BAREBOX_MAGICVAR(global.model, "Product name of this hardware"); static char *hostname; @@ -184,7 +185,7 @@ void barebox_set_hostname_no_overwrite(const char *__hostname) } EXPORT_SYMBOL(barebox_set_hostname_no_overwrite); -BAREBOX_MAGICVAR_NAMED(global_hostname, global.hostname, +BAREBOX_MAGICVAR(global.hostname, "shortname of the board. Also used as hostname for DHCP requests"); void __noreturn panic(const char *fmt, ...) diff --git a/common/password.c b/common/password.c index 3c08ab782e..a119717400 100644 --- a/common/password.c +++ b/common/password.c @@ -449,7 +449,7 @@ static int login_global_init(void) } late_initcall(login_global_init); -BAREBOX_MAGICVAR_NAMED(global_login_fail_command, global.login.fail_command, +BAREBOX_MAGICVAR(global.login.fail_command, "command to run when password entry failed"); -BAREBOX_MAGICVAR_NAMED(global_login_timeout, global.login.timeout, +BAREBOX_MAGICVAR(global.login.timeout, "timeout to type the password"); diff --git a/common/startup.c b/common/startup.c index ea7ce6b8da..d9d79aef89 100644 --- a/common/startup.c +++ b/common/startup.c @@ -436,14 +436,13 @@ void shutdown_barebox(void) pr_debug("exitcall-> %pS\n", *exitcall); (*exitcall)(); } + + console_flush(); } -BAREBOX_MAGICVAR_NAMED(autoboot_state, - global.autoboot, - "Autoboot state. Possible values: countdown (default), abort, menu, boot"); -BAREBOX_MAGICVAR_NAMED(global_autoboot_abort_key, - global.autoboot_abort_key, - "Which key allows to interrupt autoboot. Possible values: any, ctrl-c"); -BAREBOX_MAGICVAR_NAMED(global_autoboot_timeout, - global.autoboot_timeout, - "Timeout before autoboot starts in seconds"); +BAREBOX_MAGICVAR(global.autoboot, + "Autoboot state. Possible values: countdown (default), abort, menu, boot"); +BAREBOX_MAGICVAR(global.autoboot_abort_key, + "Which key allows to interrupt autoboot. Possible values: any, ctrl-c"); +BAREBOX_MAGICVAR(global.autoboot_timeout, + "Timeout before autoboot starts in seconds"); diff --git a/common/usbgadget.c b/common/usbgadget.c index 042fbb8f6d..1790310f79 100644 --- a/common/usbgadget.c +++ b/common/usbgadget.c @@ -123,12 +123,9 @@ static int usbgadget_globalvars_init(void) } device_initcall(usbgadget_globalvars_init); -BAREBOX_MAGICVAR_NAMED(global_usbgadget_autostart, - global.usbgadget.autostart, - "usbgadget: Automatically start usbgadget on boot"); -BAREBOX_MAGICVAR_NAMED(global_usbgadget_acm, - global.usbgadget.acm, - "usbgadget: Create CDC ACM function"); -BAREBOX_MAGICVAR_NAMED(global_usbgadget_dfu_function, - global.usbgadget.dfu_function, - "usbgadget: Create DFU function"); +BAREBOX_MAGICVAR(global.usbgadget.autostart, + "usbgadget: Automatically start usbgadget on boot"); +BAREBOX_MAGICVAR(global.usbgadget.acm, + "usbgadget: Create CDC ACM function"); +BAREBOX_MAGICVAR(global.usbgadget.dfu_function, + "usbgadget: Create DFU function"); diff --git a/common/version.c b/common/version.c index 8b1fd4dbe7..54cec5335d 100644 --- a/common/version.c +++ b/common/version.c @@ -10,11 +10,17 @@ const char release_string[] = "barebox-" UTS_RELEASE; EXPORT_SYMBOL(release_string); +const char buildsystem_version_string[] = + BUILDSYSTEM_VERSION; +EXPORT_SYMBOL(buildsystem_version_string); + #ifdef CONFIG_BANNER void barebox_banner (void) { printf("\n\n"); pr_info("%s", version_string); + if (strlen(buildsystem_version_string) > 0) + pr_info("Buildsystem version: %s", buildsystem_version_string); printf("\n\n"); pr_info("Board: %s\n", barebox_get_model()); } diff --git a/crypto/rsa.c b/crypto/rsa.c index 64241854c8..1aea738e52 100644 --- a/crypto/rsa.c +++ b/crypto/rsa.c @@ -317,7 +317,7 @@ int rsa_verify(const struct rsa_public_key *key, const uint8_t *sig, return -EOPNOTSUPP; if (sig_len != (key->len * sizeof(uint32_t))) { - debug("Signature is of incorrect length %d, should be %d\n", sig_len, + debug("Signature is of incorrect length %u, should be %zu\n", sig_len, key->len * sizeof(uint32_t)); ret = -EINVAL; goto out_free_digest; diff --git a/crypto/sha2.c b/crypto/sha2.c index 3947a09f41..013f5bb3b2 100644 --- a/crypto/sha2.c +++ b/crypto/sha2.c @@ -211,10 +211,6 @@ static void sha256_transform(u32 *state, const u8 *input) state[0] += a; state[1] += b; state[2] += c; state[3] += d; state[4] += e; state[5] += f; state[6] += g; state[7] += h; - - /* clear any sensitive info... */ - a = b = c = d = e = f = g = h = t1 = t2 = 0; - memset(W, 0, 64 * sizeof(u32)); } static int sha224_init(struct digest *desc) diff --git a/crypto/sha4.c b/crypto/sha4.c index aad8081fa5..a2e90c0a2c 100644 --- a/crypto/sha4.c +++ b/crypto/sha4.c @@ -124,9 +124,6 @@ sha512_transform(u64 *state, const u8 *input) state[0] += a; state[1] += b; state[2] += c; state[3] += d; state[4] += e; state[5] += f; state[6] += g; state[7] += h; - - /* erase our data */ - a = b = c = d = e = f = g = h = t1 = t2 = 0; } static int diff --git a/drivers/aiodev/Kconfig b/drivers/aiodev/Kconfig index a4909d8ecd..5fb445c096 100644 --- a/drivers/aiodev/Kconfig +++ b/drivers/aiodev/Kconfig @@ -35,4 +35,12 @@ config MC13XXX_ADC help Support for MC13783, MC13892, MC34708 ADC +config AM335X_ADC + tristate "AM335X ADC driver" + depends on ARCH_AM33XX + help + Support for ADC on TI AM335X SoCs. Supports simple one-shot readings + rather than continuous sampling with DMA, etc. ADC channels should be + configured via device tree, using the kernel bindings. + endif diff --git a/drivers/aiodev/Makefile b/drivers/aiodev/Makefile index d5318deeb0..5f48b2022a 100644 --- a/drivers/aiodev/Makefile +++ b/drivers/aiodev/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o obj-$(CONFIG_LM75) += lm75.o obj-$(CONFIG_MC13XXX_ADC) += mc13xxx_adc.o obj-$(CONFIG_QORIQ_THERMAL) += qoriq_thermal.o +obj-$(CONFIG_AM335X_ADC) += am335x_adc.o diff --git a/drivers/aiodev/am335x_adc.c b/drivers/aiodev/am335x_adc.c new file mode 100644 index 0000000000..0d6cc426eb --- /dev/null +++ b/drivers/aiodev/am335x_adc.c @@ -0,0 +1,183 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* am335x_adc.c + * + * Copyright © 2019 Synapse Product Development + * + * Author: Trent Piepho <trent.piepho@synapse.com> + * + * This is a simple driver for the ADC in TI's AM335x SoCs. It's designed to + * produce one-shot readings and doesn't use the more advanced features, like + * the FIFO, triggering, DMA, multi-channel scan programs, etc. + */ + +#include <common.h> +#include <init.h> +#include <malloc.h> +#include <driver.h> +#include <xfuncs.h> +#include <errno.h> +#include <io.h> +#include <linux/log2.h> +#include <aiodev.h> +#include <mach/am33xx-clock.h> +#include "ti_am335x_tscadc.h" + +struct am335x_adc_data { + struct aiodevice aiodev; + void __iomem *base; + struct aiochannel *channels; +}; + +static inline void tiadc_write(const struct am335x_adc_data *data, u32 value, + u32 reg) +{ + writel(value, data->base + reg); +} + +static inline u32 tiadc_read(const struct am335x_adc_data *data, u32 reg) +{ + return readl(data->base + reg); +} + +static int am335x_adc_read(struct aiochannel *chan, int *val) +{ + struct am335x_adc_data *data = + container_of(chan->aiodev, struct am335x_adc_data, aiodev); + int timeout = IDLE_TIMEOUT; + /* This assumes VREFN = 0V and VREFP = 1.8V */ + const u32 vrefp = 1800; /* ceil(log2(vrefp)) = 11 */ + /* Left shift vrefp/4095 by as much as possible without overflowing 32 bits */ + const u32 shift = 32 - (const_ilog2(vrefp) + 1); + const u32 factor = (vrefp << shift) / 4095u; + u32 counts; + + /* Make sure FIFO is empty before we start, so we don't get old data */ + while ((tiadc_read(data, REG_FIFO1CNT) & 0x7f) > 0) + tiadc_read(data, REG_FIFO1); + + tiadc_write(data, ENB(chan->index + 1), REG_SE); /* ENB(1) is 1st channel */ + tiadc_write(data, CNTRLREG_TSCSSENB, REG_CTRL); + + while ((tiadc_read(data, REG_FIFO1CNT) & 0x7f) == 0) { + if (--timeout == 0) + return -ETIMEDOUT; + mdelay(1); + } + + counts = tiadc_read(data, REG_FIFO1) & FIFOREAD_DATA_MASK; + *val = (counts * factor) >> shift; + + tiadc_write(data, 0, REG_CTRL); + + return 0; +} + +static int am335x_adc_probe(struct device_d *dev) +{ + struct device_node *node; + struct am335x_adc_data *data; + int i, ret; + + data = xzalloc(sizeof(*data)); + data->aiodev.hwdev = dev; + data->aiodev.read = am335x_adc_read; + data->base = dev_request_mem_region(dev, 0); + if (IS_ERR(data->base)) { + ret = PTR_ERR(data->base); + goto fail_data; + } + + node = of_find_compatible_node(dev->device_node, NULL, "ti,am3359-adc"); + if (!node) { + ret = -EINVAL; + goto fail_data; + } + + if (!of_find_property(node, "ti,adc-channels", + &data->aiodev.num_channels)) + return -EINVAL; + data->aiodev.num_channels /= sizeof(u32); + + data->channels = xzalloc(sizeof(*data->channels) * + data->aiodev.num_channels); + data->aiodev.channels = xmalloc(sizeof(*data->aiodev.channels) * + data->aiodev.num_channels); + + /* Max ADC clock is 24 MHz or 3 MHz, depending on if one looks at the + * reference manual or data sheet. + */ + tiadc_write(data, DIV_ROUND_UP(am33xx_get_osc_clock(), ADC_CLK) - 1, + REG_CLKDIV); + tiadc_write(data, ~0, REG_IRQCLR); + tiadc_write(data, ~0, REG_IRQSTATUS); + tiadc_write(data, 0x3, REG_DMAENABLE_CLEAR); + tiadc_write(data, CNTRLREG_STEPCONFIGWRT, REG_CTRL); + tiadc_write(data, + STEPCONFIG_RFP_VREFP | STEPCONFIG_RFM_VREFN | + STEPCONFIG_INM_ADCREFM | STEPCONFIG_INP_ADCREFM, + REG_IDLECONFIG); + + + for (i = 0; i < data->aiodev.num_channels; i++) { + u32 config, delay, ain, odelay, sdelay, avg; + + data->aiodev.channels[i] = &data->channels[i]; + data->channels[i].unit = "mV"; + ret = of_property_read_u32_index(node, "ti,adc-channels", + i, &ain); + if (ret) + goto fail_channels; + + ret = of_property_read_u32_index(node, "ti,chan-step-opendelay", + i, &odelay); + odelay = ret ? STEPCONFIG_OPENDLY : STEPDELAY_OPEN(odelay); + + ret = of_property_read_u32_index(node, "ti,chan-step-sampledelay", + i, &sdelay); + sdelay = ret ? STEPCONFIG_SAMPLEDLY : STEPDELAY_SAMPLE(sdelay); + + ret = of_property_read_u32_index(node, "ti,chan-step-avg", + i, &avg); + avg = ret ? STEPCONFIG_AVG_16 : STEPCONFIG_AVG(ilog2(avg ? : 1)); + + /* We program each step with one of the channels in the DT */ + config = STEPCONFIG_RFP_VREFP | STEPCONFIG_RFM_VREFN | /* External refs */ + /* Internal reference, use STEPCONFIG_RFP(0) | STEPCONFIG_RFM(0) */ + STEPCONFIG_INM_ADCREFM | /* Not important, SE rather than diff */ + STEPCONFIG_MODE(0) | STEPCONFIG_FIFO1 | /* One-shot and data to FIFO1 */ + avg | STEPCONFIG_INP(ain); + delay = odelay | sdelay; + + tiadc_write(data, config, REG_STEPCONFIG(i)); + tiadc_write(data, delay, REG_STEPDELAY(i)); + } + tiadc_write(data, 0, REG_CTRL); + + ret = aiodevice_register(&data->aiodev); + if (ret) + goto fail_channels; + + dev_info(dev, "TI AM335x ADC (%d ch) registered as %s\n", + data->aiodev.num_channels, dev_name(&data->aiodev.dev)); + return 0; + + fail_channels: + kfree(data->channels); + kfree(data->aiodev.channels); + + fail_data: + kfree(data); + return ret; +} + +static const struct of_device_id of_am335x_adc_match[] = { + { .compatible = "ti,am3359-tscadc", }, + { /* end */ } +}; + +static struct driver_d am335x_adc_driver = { + .name = "am335x_adc", + .probe = am335x_adc_probe, + .of_compatible = DRV_OF_COMPAT(of_am335x_adc_match), +}; +device_platform_driver(am335x_adc_driver); diff --git a/drivers/aiodev/core.c b/drivers/aiodev/core.c index b8428346a3..7240de2c40 100644 --- a/drivers/aiodev/core.c +++ b/drivers/aiodev/core.c @@ -24,7 +24,7 @@ LIST_HEAD(aiodevices); EXPORT_SYMBOL(aiodevices); -struct aiochannel *aiochannel_get_by_name(const char *name) +struct aiochannel *aiochannel_by_name(const char *name) { struct aiodevice *aiodev; int i; @@ -131,7 +131,7 @@ int aiodevice_register(struct aiodevice *aiodev) aiochannel_param_get_value, &aiochan->value, "%d", aiochan); - aiochan->name = xasprintf("%s.%s", aiodev->name, name); + aiochan->name = xasprintf("%s.%s", dev_name(&aiodev->dev), name); free(name); } diff --git a/drivers/aiodev/lm75.c b/drivers/aiodev/lm75.c index 8186fd2c2b..8e5948f468 100644 --- a/drivers/aiodev/lm75.c +++ b/drivers/aiodev/lm75.c @@ -22,6 +22,7 @@ #define LM75_SHUTDOWN 0x01 enum lm75_type { /* keep sorted in alphabetical order */ + unknown, adt75, ds1775, ds75, @@ -109,9 +110,9 @@ static int lm75_probe(struct device_d *dev) int new, ret; enum lm75_type kind; - ret = dev_get_drvdata(dev, (const void **)&kind); - if (ret) - return ret; + kind = (enum lm75_type)device_get_match_data(dev); + if (kind == unknown) + return -ENODEV; data = xzalloc(sizeof(*data)); diff --git a/drivers/aiodev/ti_am335x_tscadc.h b/drivers/aiodev/ti_am335x_tscadc.h new file mode 100644 index 0000000000..36f3c17ac0 --- /dev/null +++ b/drivers/aiodev/ti_am335x_tscadc.h @@ -0,0 +1,163 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __LINUX_TI_AM335X_TSCADC_MFD_H +#define __LINUX_TI_AM335X_TSCADC_MFD_H + +/* + * TI Touch Screen / ADC MFD driver + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define REG_RAWIRQSTATUS 0x024 +#define REG_IRQSTATUS 0x028 +#define REG_IRQENABLE 0x02C +#define REG_IRQCLR 0x030 +#define REG_IRQWAKEUP 0x034 +#define REG_DMAENABLE_SET 0x038 +#define REG_DMAENABLE_CLEAR 0x03c +#define REG_CTRL 0x040 +#define REG_ADCFSM 0x044 +#define REG_CLKDIV 0x04C +#define REG_SE 0x054 +#define REG_IDLECONFIG 0x058 +#define REG_CHARGECONFIG 0x05C +#define REG_CHARGEDELAY 0x060 +#define REG_STEPCONFIG(n) (0x64 + ((n) * 8)) +#define REG_STEPDELAY(n) (0x68 + ((n) * 8)) +#define REG_FIFO0CNT 0xE4 +#define REG_FIFO0THR 0xE8 +#define REG_FIFO1CNT 0xF0 +#define REG_FIFO1THR 0xF4 +#define REG_DMA1REQ 0xF8 +#define REG_FIFO0 0x100 +#define REG_FIFO1 0x200 + +/* Register Bitfields */ +/* IRQ wakeup enable */ +#define IRQWKUP_ENB BIT(0) + +/* Step Enable */ +#define STEPENB_MASK (0x1FFFF << 0) +#define STEPENB(val) ((val) << 0) +#define ENB(val) (1 << (val)) +#define STPENB_STEPENB STEPENB(0x1FFFF) +#define STPENB_STEPENB_TC STEPENB(0x1FFF) + +/* IRQ enable */ +#define IRQENB_HW_PEN BIT(0) +#define IRQENB_EOS BIT(1) +#define IRQENB_FIFO0THRES BIT(2) +#define IRQENB_FIFO0OVRRUN BIT(3) +#define IRQENB_FIFO0UNDRFLW BIT(4) +#define IRQENB_FIFO1THRES BIT(5) +#define IRQENB_FIFO1OVRRUN BIT(6) +#define IRQENB_FIFO1UNDRFLW BIT(7) +#define IRQENB_PENUP BIT(9) + +/* Step Configuration */ +#define STEPCONFIG_MODE_MASK (3 << 0) +#define STEPCONFIG_MODE(val) ((val) << 0) +#define STEPCONFIG_MODE_SWCNT STEPCONFIG_MODE(1) +#define STEPCONFIG_MODE_HWSYNC STEPCONFIG_MODE(2) +#define STEPCONFIG_AVG_MASK (7 << 2) +#define STEPCONFIG_AVG(val) ((val) << 2) +#define STEPCONFIG_AVG_16 STEPCONFIG_AVG(4) +#define STEPCONFIG_XPP BIT(5) +#define STEPCONFIG_XNN BIT(6) +#define STEPCONFIG_YPP BIT(7) +#define STEPCONFIG_YNN BIT(8) +#define STEPCONFIG_XNP BIT(9) +#define STEPCONFIG_YPN BIT(10) +#define STEPCONFIG_RFP(val) ((val) << 12) +#define STEPCONFIG_RFP_VREFP (0x3 << 12) +#define STEPCONFIG_INM_MASK (0xF << 15) +#define STEPCONFIG_INM(val) ((val) << 15) +#define STEPCONFIG_INM_ADCREFM STEPCONFIG_INM(8) +#define STEPCONFIG_INP_MASK (0xF << 19) +#define STEPCONFIG_INP(val) ((val) << 19) +#define STEPCONFIG_INP_AN4 STEPCONFIG_INP(4) +#define STEPCONFIG_INP_ADCREFM STEPCONFIG_INP(8) +#define STEPCONFIG_FIFO1 BIT(26) +#define STEPCONFIG_RFM(val) ((val) << 23) +#define STEPCONFIG_RFM_VREFN (0x3 << 23) + +/* Delay register */ +#define STEPDELAY_OPEN_MASK (0x3FFFF << 0) +#define STEPDELAY_OPEN(val) ((val) << 0) +#define STEPCONFIG_OPENDLY STEPDELAY_OPEN(0x098) +#define STEPDELAY_SAMPLE_MASK (0xFF << 24) +#define STEPDELAY_SAMPLE(val) ((val) << 24) +#define STEPCONFIG_SAMPLEDLY STEPDELAY_SAMPLE(0) + +/* Charge Config */ +#define STEPCHARGE_RFP_MASK (7 << 12) +#define STEPCHARGE_RFP(val) ((val) << 12) +#define STEPCHARGE_RFP_XPUL STEPCHARGE_RFP(1) +#define STEPCHARGE_INM_MASK (0xF << 15) +#define STEPCHARGE_INM(val) ((val) << 15) +#define STEPCHARGE_INM_AN1 STEPCHARGE_INM(1) +#define STEPCHARGE_INP_MASK (0xF << 19) +#define STEPCHARGE_INP(val) ((val) << 19) +#define STEPCHARGE_RFM_MASK (3 << 23) +#define STEPCHARGE_RFM(val) ((val) << 23) +#define STEPCHARGE_RFM_XNUR STEPCHARGE_RFM(1) + +/* Charge delay */ +#define CHARGEDLY_OPEN_MASK (0x3FFFF << 0) +#define CHARGEDLY_OPEN(val) ((val) << 0) +#define CHARGEDLY_OPENDLY CHARGEDLY_OPEN(0x400) + +/* Control register */ +#define CNTRLREG_TSCSSENB BIT(0) +#define CNTRLREG_STEPID BIT(1) +#define CNTRLREG_STEPCONFIGWRT BIT(2) +#define CNTRLREG_POWERDOWN BIT(4) +#define CNTRLREG_AFE_CTRL_MASK (3 << 5) +#define CNTRLREG_AFE_CTRL(val) ((val) << 5) +#define CNTRLREG_4WIRE CNTRLREG_AFE_CTRL(1) +#define CNTRLREG_5WIRE CNTRLREG_AFE_CTRL(2) +#define CNTRLREG_8WIRE CNTRLREG_AFE_CTRL(3) +#define CNTRLREG_TSCENB BIT(7) + +/* FIFO READ Register */ +#define FIFOREAD_DATA_BITS 12 +#define FIFOREAD_DATA_MASK (BIT(FIFOREAD_DATA_BITS) - 1) +#define FIFOREAD_CHNLID_MASK (0xf << 16) + +/* DMA ENABLE/CLEAR Register */ +#define DMA_FIFO0 BIT(0) +#define DMA_FIFO1 BIT(1) + +/* Sequencer Status */ +#define SEQ_STATUS BIT(5) +#define CHARGE_STEP 0x11 + +#define ADC_CLK 3000000 +#define TOTAL_STEPS 16 +#define TOTAL_CHANNELS 8 +#define FIFO1_THRESHOLD 19 + +/* + * time in us for processing a single channel, calculated as follows: + * + * max num cycles = open delay + (sample delay + conv time) * averaging + * + * max num cycles: 262143 + (255 + 13) * 16 = 266431 + * + * clock frequency: 26MHz / 8 = 3.25MHz + * clock period: 1 / 3.25MHz = 308ns + * + * max processing time: 266431 * 308ns = 83ms(approx) + */ +#define IDLE_TIMEOUT 83 /* milliseconds */ + +#endif diff --git a/drivers/base/driver.c b/drivers/base/driver.c index 412db6c406..3205bbc3c3 100644 --- a/drivers/base/driver.c +++ b/drivers/base/driver.c @@ -500,3 +500,14 @@ int dev_get_drvdata(struct device_d *dev, const void **data) return -ENODEV; } + +const void *device_get_match_data(struct device_d *dev) +{ + if (dev->of_id_entry) + return dev->of_id_entry->data; + + if (dev->id_entry) + return (void *)dev->id_entry->driver_data; + + return NULL; +} diff --git a/drivers/clk/clk-ar933x.c b/drivers/clk/clk-ar933x.c index 875e9f506f..0e7f2d6a67 100644 --- a/drivers/clk/clk-ar933x.c +++ b/drivers/clk/clk-ar933x.c @@ -138,8 +138,4 @@ static struct driver_d ar933x_clk_driver = { .of_compatible = DRV_OF_COMPAT(ar933x_clk_dt_ids), }; -static int ar933x_clk_init(void) -{ - return platform_driver_register(&ar933x_clk_driver); -} -postcore_initcall(ar933x_clk_init); +postcore_platform_driver(ar933x_clk_driver); diff --git a/drivers/clk/clk-ar9344.c b/drivers/clk/clk-ar9344.c index ad0e5c10e9..829d4b1f91 100644 --- a/drivers/clk/clk-ar9344.c +++ b/drivers/clk/clk-ar9344.c @@ -133,8 +133,4 @@ static struct driver_d ar9344_clk_driver = { .of_compatible = DRV_OF_COMPAT(ar9344_clk_dt_ids), }; -static int ar9344_clk_init(void) -{ - return platform_driver_register(&ar9344_clk_driver); -} -postcore_initcall(ar9344_clk_init); +postcore_platform_driver(ar9344_clk_driver); diff --git a/drivers/clk/imx/clk-imx1.c b/drivers/clk/imx/clk-imx1.c index 258b9dd582..cff32c0f99 100644 --- a/drivers/clk/imx/clk-imx1.c +++ b/drivers/clk/imx/clk-imx1.c @@ -102,8 +102,4 @@ static struct driver_d imx1_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx1_ccm_dt_ids), }; -static int imx1_ccm_init(void) -{ - return platform_driver_register(&imx1_ccm_driver); -} -core_initcall(imx1_ccm_init); +core_platform_driver(imx1_ccm_driver); diff --git a/drivers/clk/imx/clk-imx21.c b/drivers/clk/imx/clk-imx21.c index 0026a55f86..7abd82eeb1 100644 --- a/drivers/clk/imx/clk-imx21.c +++ b/drivers/clk/imx/clk-imx21.c @@ -176,8 +176,4 @@ static struct driver_d imx21_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx21_ccm_dt_ids), }; -static int imx21_ccm_init(void) -{ - return platform_driver_register(&imx21_ccm_driver); -} -core_initcall(imx21_ccm_init); +core_platform_driver(imx21_ccm_driver); diff --git a/drivers/clk/imx/clk-imx25.c b/drivers/clk/imx/clk-imx25.c index 7c2140c215..8aa87a5200 100644 --- a/drivers/clk/imx/clk-imx25.c +++ b/drivers/clk/imx/clk-imx25.c @@ -186,8 +186,4 @@ static struct driver_d imx25_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx25_ccm_dt_ids), }; -static int imx25_ccm_init(void) -{ - return platform_driver_register(&imx25_ccm_driver); -} -core_initcall(imx25_ccm_init); +core_platform_driver(imx25_ccm_driver); diff --git a/drivers/clk/imx/clk-imx27.c b/drivers/clk/imx/clk-imx27.c index cba655c6fe..54894d1032 100644 --- a/drivers/clk/imx/clk-imx27.c +++ b/drivers/clk/imx/clk-imx27.c @@ -264,8 +264,4 @@ static struct driver_d imx27_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx27_ccm_dt_ids), }; -static int imx27_ccm_init(void) -{ - return platform_driver_register(&imx27_ccm_driver); -} -core_initcall(imx27_ccm_init); +core_platform_driver(imx27_ccm_driver); diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c index 5fded58b11..fe241cba5f 100644 --- a/drivers/clk/imx/clk-imx31.c +++ b/drivers/clk/imx/clk-imx31.c @@ -145,8 +145,4 @@ static struct driver_d imx31_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx31_ccm_dt_ids), }; -static int imx31_ccm_init(void) -{ - return platform_driver_register(&imx31_ccm_driver); -} -core_initcall(imx31_ccm_init); +core_platform_driver(imx31_ccm_driver); diff --git a/drivers/clk/imx/clk-imx35.c b/drivers/clk/imx/clk-imx35.c index 17e2ae5e69..9af149f68e 100644 --- a/drivers/clk/imx/clk-imx35.c +++ b/drivers/clk/imx/clk-imx35.c @@ -208,8 +208,4 @@ static struct driver_d imx35_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx35_ccm_dt_ids), }; -static int imx35_ccm_init(void) -{ - return platform_driver_register(&imx35_ccm_driver); -} -core_initcall(imx35_ccm_init); +core_platform_driver(imx35_ccm_driver); diff --git a/drivers/clk/imx/clk-imx5.c b/drivers/clk/imx/clk-imx5.c index 6a07816427..c7a1818bd7 100644 --- a/drivers/clk/imx/clk-imx5.c +++ b/drivers/clk/imx/clk-imx5.c @@ -339,7 +339,7 @@ static __maybe_unused struct of_device_id imx50_ccm_dt_ids[] = { } }; -static struct driver_d imx50_ccm_driver = { +static __maybe_unused struct driver_d imx50_ccm_driver = { .probe = imx50_ccm_probe, .name = "imx50-ccm", .of_compatible = DRV_OF_COMPAT(imx50_ccm_dt_ids), @@ -426,7 +426,7 @@ static __maybe_unused struct of_device_id imx51_ccm_dt_ids[] = { } }; -static struct driver_d imx51_ccm_driver = { +static __maybe_unused struct driver_d imx51_ccm_driver = { .probe = imx51_ccm_probe, .name = "imx51-ccm", .of_compatible = DRV_OF_COMPAT(imx51_ccm_dt_ids), @@ -522,21 +522,18 @@ static __maybe_unused struct of_device_id imx53_ccm_dt_ids[] = { } }; -static struct driver_d imx53_ccm_driver = { +static __maybe_unused struct driver_d imx53_ccm_driver = { .probe = imx53_ccm_probe, .name = "imx53-ccm", .of_compatible = DRV_OF_COMPAT(imx53_ccm_dt_ids), }; -static int imx5_ccm_init(void) -{ - if (IS_ENABLED(CONFIG_ARCH_IMX50)) - platform_driver_register(&imx50_ccm_driver); - if (IS_ENABLED(CONFIG_ARCH_IMX51)) - platform_driver_register(&imx51_ccm_driver); - if (IS_ENABLED(CONFIG_ARCH_IMX53)) - platform_driver_register(&imx53_ccm_driver); - - return 0; -} -core_initcall(imx5_ccm_init); +#if IS_ENABLED(CONFIG_ARCH_IMX50) +core_platform_driver(imx50_ccm_driver); +#endif +#if IS_ENABLED(CONFIG_ARCH_IMX51) +core_platform_driver(imx51_ccm_driver); +#endif +#if IS_ENABLED(CONFIG_ARCH_IMX53) +core_platform_driver(imx53_ccm_driver); +#endif diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c index b8b37a0c68..cb03024458 100644 --- a/drivers/clk/imx/clk-imx6.c +++ b/drivers/clk/imx/clk-imx6.c @@ -837,8 +837,4 @@ static struct driver_d imx6_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx6_ccm_dt_ids), }; -static int imx6_ccm_init(void) -{ - return platform_driver_register(&imx6_ccm_driver); -} -core_initcall(imx6_ccm_init); +core_platform_driver(imx6_ccm_driver); diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c index 6ccc36e3b9..8d0766c055 100644 --- a/drivers/clk/imx/clk-imx6sl.c +++ b/drivers/clk/imx/clk-imx6sl.c @@ -316,8 +316,4 @@ static struct driver_d imx6sl_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx6sl_ccm_dt_ids), }; -static int imx6sl_ccm_init(void) -{ - return platform_driver_register(&imx6sl_ccm_driver); -} -core_initcall(imx6sl_ccm_init); +core_platform_driver(imx6sl_ccm_driver); diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c index d682e41e7c..bacde8b893 100644 --- a/drivers/clk/imx/clk-imx6sx.c +++ b/drivers/clk/imx/clk-imx6sx.c @@ -470,8 +470,4 @@ static struct driver_d imx6sx_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx6sx_ccm_dt_ids), }; -static int imx6sx_ccm_init(void) -{ - return platform_driver_register(&imx6sx_ccm_driver); -} -core_initcall(imx6sx_ccm_init); +core_platform_driver(imx6sx_ccm_driver); diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c index 79b52b7ce9..6668146860 100644 --- a/drivers/clk/imx/clk-imx6ul.c +++ b/drivers/clk/imx/clk-imx6ul.c @@ -466,8 +466,4 @@ static struct driver_d imx6_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx6_ccm_dt_ids), }; -static int imx6_ccm_init(void) -{ - return platform_driver_register(&imx6_ccm_driver); -} -core_initcall(imx6_ccm_init); +core_platform_driver(imx6_ccm_driver); diff --git a/drivers/clk/imx/clk-imx7.c b/drivers/clk/imx/clk-imx7.c index b6c7c2c3a8..ffa39d17b0 100644 --- a/drivers/clk/imx/clk-imx7.c +++ b/drivers/clk/imx/clk-imx7.c @@ -858,8 +858,4 @@ static struct driver_d imx7_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx7_ccm_dt_ids), }; -static int imx7_ccm_init(void) -{ - return platform_driver_register(&imx7_ccm_driver); -} -core_initcall(imx7_ccm_init); +core_platform_driver(imx7_ccm_driver); diff --git a/drivers/clk/mvebu/common.c b/drivers/clk/mvebu/common.c index c7de00ac77..3d924ccf4d 100644 --- a/drivers/clk/mvebu/common.c +++ b/drivers/clk/mvebu/common.c @@ -102,11 +102,7 @@ static struct driver_d mvebu_coreclk_driver = { .of_compatible = DRV_OF_COMPAT(mvebu_coreclk_ids), }; -static int mvebu_coreclk_init(void) -{ - return platform_driver_register(&mvebu_coreclk_driver); -} -core_initcall(mvebu_coreclk_init); +core_platform_driver(mvebu_coreclk_driver); /* * Clock Gating Control @@ -207,8 +203,4 @@ static struct driver_d mvebu_clk_gating_driver = { .of_compatible = DRV_OF_COMPAT(mvebu_clk_gating_ids), }; -static int mvebu_clk_gating_init(void) -{ - return platform_driver_register(&mvebu_clk_gating_driver); -} -postcore_initcall(mvebu_clk_gating_init); +postcore_platform_driver(mvebu_clk_gating_driver); diff --git a/drivers/clk/mvebu/corediv.c b/drivers/clk/mvebu/corediv.c index f740161e45..1577a2149c 100644 --- a/drivers/clk/mvebu/corediv.c +++ b/drivers/clk/mvebu/corediv.c @@ -254,8 +254,4 @@ static struct driver_d mvebu_corediv_clk_driver = { .of_compatible = DRV_OF_COMPAT(mvebu_corediv_clk_ids), }; -static int mvebu_corediv_clk_init(void) -{ - return platform_driver_register(&mvebu_corediv_clk_driver); -} -postcore_initcall(mvebu_corediv_clk_init); +postcore_platform_driver(mvebu_corediv_clk_driver); diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index dae8e348e2..a211b64f2c 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -141,8 +141,4 @@ static struct driver_d imx23_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx23_ccm_dt_ids), }; -static int imx23_ccm_init(void) -{ - return platform_driver_register(&imx23_ccm_driver); -} -postcore_initcall(imx23_ccm_init); +postcore_platform_driver(imx23_ccm_driver); diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index bf65a4a3b8..aa4ba99cd7 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -202,8 +202,4 @@ static struct driver_d imx28_ccm_driver = { .of_compatible = DRV_OF_COMPAT(imx28_ccm_dt_ids), }; -static int imx28_ccm_init(void) -{ - return platform_driver_register(&imx28_ccm_driver); -} -postcore_initcall(imx28_ccm_init); +postcore_platform_driver(imx28_ccm_driver); diff --git a/drivers/clk/socfpga/clk.c b/drivers/clk/socfpga/clk.c index 1d34b15caf..09e2039bd5 100644 --- a/drivers/clk/socfpga/clk.c +++ b/drivers/clk/socfpga/clk.c @@ -428,8 +428,4 @@ static struct driver_d socfpga_ccm_driver = { .of_compatible = DRV_OF_COMPAT(socfpga_ccm_dt_ids), }; -static int socfpga_ccm_init(void) -{ - return platform_driver_register(&socfpga_ccm_driver); -} -core_initcall(socfpga_ccm_init); +core_platform_driver(socfpga_ccm_driver); diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index f5704b83c5..bdd822e296 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -368,8 +368,4 @@ static struct driver_d tegra124_car_driver = { .of_compatible = DRV_OF_COMPAT(tegra124_car_dt_ids), }; -static int tegra124_car_init(void) -{ - return platform_driver_register(&tegra124_car_driver); -} -postcore_initcall(tegra124_car_init); +postcore_platform_driver(tegra124_car_driver); diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index 9fccff6136..6e5fa144e4 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -371,8 +371,4 @@ static struct driver_d tegra20_car_driver = { .of_compatible = DRV_OF_COMPAT(tegra20_car_dt_ids), }; -static int tegra20_car_init(void) -{ - return platform_driver_register(&tegra20_car_driver); -} -postcore_initcall(tegra20_car_init); +postcore_platform_driver(tegra20_car_driver); diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 3d3a7854ff..505851f8f5 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -399,8 +399,4 @@ static struct driver_d tegra30_car_driver = { .of_compatible = DRV_OF_COMPAT(tegra30_car_dt_ids), }; -static int tegra30_car_init(void) -{ - return platform_driver_register(&tegra30_car_driver); -} -postcore_initcall(tegra30_car_init); +postcore_platform_driver(tegra30_car_driver); diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c index 1d9d28ea14..23259a5324 100644 --- a/drivers/clk/zynq/clkc.c +++ b/drivers/clk/zynq/clkc.c @@ -490,8 +490,4 @@ static struct driver_d zynq_clock_driver = { .of_compatible = DRV_OF_COMPAT(zynq_clock_dt_ids), }; -static int zynq_clock_init(void) -{ - return platform_driver_register(&zynq_clock_driver); -} -postcore_initcall(zynq_clock_init); +postcore_platform_driver(zynq_clock_driver); diff --git a/drivers/clocksource/amba-sp804.c b/drivers/clocksource/amba-sp804.c index 66e3988b4c..8ed5ae4be0 100644 --- a/drivers/clocksource/amba-sp804.c +++ b/drivers/clocksource/amba-sp804.c @@ -85,8 +85,4 @@ struct amba_driver sp804_driver = { .id_table = sp804_ids, }; -static int sp804_init(void) -{ - return amba_driver_register(&sp804_driver); -} -coredevice_initcall(sp804_init); +coredevice_platform_driver(sp804_driver); diff --git a/drivers/clocksource/arm_smp_twd.c b/drivers/clocksource/arm_smp_twd.c index 226150aa42..5a1e5a7921 100644 --- a/drivers/clocksource/arm_smp_twd.c +++ b/drivers/clocksource/arm_smp_twd.c @@ -105,8 +105,4 @@ static struct driver_d smp_twd_driver = { .of_compatible = DRV_OF_COMPAT(smp_twd_compatible), }; -static int smp_twd_init(void) -{ - return platform_driver_register(&smp_twd_driver); -} -coredevice_initcall(smp_twd_init); +coredevice_platform_driver(smp_twd_driver); diff --git a/drivers/clocksource/bcm2835.c b/drivers/clocksource/bcm2835.c index 9130a4b14f..179109aee2 100644 --- a/drivers/clocksource/bcm2835.c +++ b/drivers/clocksource/bcm2835.c @@ -95,8 +95,4 @@ static struct driver_d bcm2835_cs_driver = { .of_compatible = DRV_OF_COMPAT(bcm2835_cs_dt_ids), }; -static int bcm2835_cs_init(void) -{ - return platform_driver_register(&bcm2835_cs_driver); -} -core_initcall(bcm2835_cs_init); +core_platform_driver(bcm2835_cs_driver); diff --git a/drivers/clocksource/digic.c b/drivers/clocksource/digic.c index 23e0d5b76b..9079733eba 100644 --- a/drivers/clocksource/digic.c +++ b/drivers/clocksource/digic.c @@ -88,8 +88,4 @@ static struct driver_d digic_timer_driver = { .of_compatible = DRV_OF_COMPAT(digic_timer_dt_ids), }; -static int digic_timer_init(void) -{ - return platform_driver_register(&digic_timer_driver); -} -coredevice_initcall(digic_timer_init); +coredevice_platform_driver(digic_timer_driver); diff --git a/drivers/clocksource/efi.c b/drivers/clocksource/efi.c index fb5b7ca63d..658d146fb5 100644 --- a/drivers/clocksource/efi.c +++ b/drivers/clocksource/efi.c @@ -106,9 +106,4 @@ static struct driver_d efi_cs_driver = { .probe = efi_cs_probe, }; -static int efi_cs_initcall(void) -{ - return platform_driver_register(&efi_cs_driver); -} -/* for efi the time must be init at core initcall level */ -core_initcall(efi_cs_initcall); +core_platform_driver(efi_cs_driver); diff --git a/drivers/clocksource/efi_x86.c b/drivers/clocksource/efi_x86.c index f8d3ff8a43..364e1ef8e1 100644 --- a/drivers/clocksource/efi_x86.c +++ b/drivers/clocksource/efi_x86.c @@ -71,9 +71,4 @@ static struct driver_d efi_x86_cs_driver = { .probe = efi_x86_cs_probe, }; -static int efi_x86_cs_initcall(void) -{ - return platform_driver_register(&efi_x86_cs_driver); -} -/* for efi the time must be init at core initcall level */ -core_initcall(efi_x86_cs_initcall); +core_platform_driver(efi_x86_cs_driver); diff --git a/drivers/clocksource/mvebu.c b/drivers/clocksource/mvebu.c index b55d72a343..5a47d6f217 100644 --- a/drivers/clocksource/mvebu.c +++ b/drivers/clocksource/mvebu.c @@ -105,8 +105,4 @@ static struct driver_d mvebu_timer_driver = { .of_compatible = DRV_OF_COMPAT(mvebu_timer_dt_ids), }; -static int mvebu_timer_init(void) -{ - return platform_driver_register(&mvebu_timer_driver); -} -postcore_initcall(mvebu_timer_init); +postcore_platform_driver(mvebu_timer_driver); diff --git a/drivers/clocksource/nomadik.c b/drivers/clocksource/nomadik.c index 9b20cbc946..7d5d9f9f77 100644 --- a/drivers/clocksource/nomadik.c +++ b/drivers/clocksource/nomadik.c @@ -142,8 +142,4 @@ static struct driver_d nmdk_mtu_driver = { .probe = nmdk_mtu_probe, }; -static int nmdk_mtu_init(void) -{ - return platform_driver_register(&nmdk_mtu_driver); -} -coredevice_initcall(nmdk_mtu_init); +coredevice_platform_driver(nmdk_mtu_driver); diff --git a/drivers/clocksource/orion.c b/drivers/clocksource/orion.c index 97008dabab..c9f50b729e 100644 --- a/drivers/clocksource/orion.c +++ b/drivers/clocksource/orion.c @@ -79,8 +79,4 @@ static struct driver_d orion_timer_driver = { .of_compatible = DRV_OF_COMPAT(orion_timer_dt_ids), }; -static int orion_timer_init(void) -{ - return platform_driver_register(&orion_timer_driver); -} -postcore_initcall(orion_timer_init); +postcore_platform_driver(orion_timer_driver); diff --git a/drivers/clocksource/rk_timer.c b/drivers/clocksource/rk_timer.c index baa517c62f..5cc8d32b60 100644 --- a/drivers/clocksource/rk_timer.c +++ b/drivers/clocksource/rk_timer.c @@ -66,8 +66,4 @@ static struct driver_d rktimer_driver = { .of_compatible = DRV_OF_COMPAT(rktimer_dt_ids), }; -static int rktimer_init(void) -{ - return platform_driver_register(&rktimer_driver); -} -core_initcall(rktimer_init); +core_platform_driver(rktimer_driver); diff --git a/drivers/clocksource/timer-atmel-pit.c b/drivers/clocksource/timer-atmel-pit.c index 50572ff5f8..368aae2450 100644 --- a/drivers/clocksource/timer-atmel-pit.c +++ b/drivers/clocksource/timer-atmel-pit.c @@ -112,8 +112,4 @@ static struct driver_d at91_pit_driver = { .of_compatible = DRV_OF_COMPAT(at91_pit_dt_ids), }; -static int at91_pit_init(void) -{ - return platform_driver_register(&at91_pit_driver); -} -postcore_initcall(at91_pit_init); +postcore_platform_driver(at91_pit_driver); diff --git a/drivers/clocksource/timer-imx-gpt.c b/drivers/clocksource/timer-imx-gpt.c index 881065bf9f..6be0afed4d 100644 --- a/drivers/clocksource/timer-imx-gpt.c +++ b/drivers/clocksource/timer-imx-gpt.c @@ -182,8 +182,4 @@ static struct driver_d imx_gpt_driver = { .id_table = imx_gpt_ids, }; -static int imx_gpt_init(void) -{ - return platform_driver_register(&imx_gpt_driver); -} -postcore_initcall(imx_gpt_init); +postcore_platform_driver(imx_gpt_driver); diff --git a/drivers/clocksource/timer-ti-32k.c b/drivers/clocksource/timer-ti-32k.c index f93ab5bcff..755c78095f 100644 --- a/drivers/clocksource/timer-ti-32k.c +++ b/drivers/clocksource/timer-ti-32k.c @@ -99,8 +99,4 @@ static struct driver_d omap_32ktimer_driver = { .of_compatible = DRV_OF_COMPAT(omap_32ktimer_dt_ids), }; -static int omap_32ktimer_init(void) -{ - return platform_driver_register(&omap_32ktimer_driver); -} -postcore_initcall(omap_32ktimer_init); +postcore_platform_driver(omap_32ktimer_driver); diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index f41f0bb423..86882fcaf5 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -112,8 +112,4 @@ static struct driver_d omap_dmtimer_driver = { .of_compatible = DRV_OF_COMPAT(omap_dmtimer_dt_ids), }; -static int omap_dmtimer_init(void) -{ - return platform_driver_register(&omap_dmtimer_driver); -} -postcore_initcall(omap_dmtimer_init); +postcore_platform_driver(omap_dmtimer_driver); diff --git a/drivers/clocksource/uemd.c b/drivers/clocksource/uemd.c index 5eacfdaf1b..02fa8a1c5b 100644 --- a/drivers/clocksource/uemd.c +++ b/drivers/clocksource/uemd.c @@ -123,8 +123,4 @@ static struct driver_d uemd_timer_driver = { .of_compatible = DRV_OF_COMPAT(uemd_timer_dt_ids), }; -static int uemd_timer_init(void) -{ - return platform_driver_register(&uemd_timer_driver); -} -coredevice_initcall(uemd_timer_init); +coredevice_platform_driver(uemd_timer_driver); diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c index 3bee89f78b..0e4961f6cb 100644 --- a/drivers/dma/apbh_dma.c +++ b/drivers/dma/apbh_dma.c @@ -50,6 +50,7 @@ static struct mxs_dma_chan mxs_dma_channels[MXS_MAX_DMA_CHANNELS]; enum mxs_dma_id { + UNKNOWN_DMA_ID, IMX23_DMA, IMX28_DMA, }; @@ -596,9 +597,9 @@ static int apbh_dma_probe(struct device_d *dev) enum mxs_dma_id id; int ret, channel; - ret = dev_get_drvdata(dev, (const void **)&id); - if (ret) - return ret; + id = (enum mxs_dma_id)device_get_match_data(dev); + if (id == UNKNOWN_DMA_ID) + return -ENODEV; apbh_dma = apbh = xzalloc(sizeof(*apbh)); iores = dev_request_mem_resource(dev, 0); diff --git a/drivers/firmware/socfpga.c b/drivers/firmware/socfpga.c index 6d11da32a5..234fb2d094 100644 --- a/drivers/firmware/socfpga.c +++ b/drivers/firmware/socfpga.c @@ -471,6 +471,7 @@ static struct of_device_id fpgamgr_id_table[] = { { .compatible = "altr,socfpga-fpga-mgr", }, + { /* sentinel */ } }; static struct driver_d fpgamgr_driver = { diff --git a/drivers/firmware/zynqmp-fpga.c b/drivers/firmware/zynqmp-fpga.c index e02667355f..ab70d99933 100644 --- a/drivers/firmware/zynqmp-fpga.c +++ b/drivers/firmware/zynqmp-fpga.c @@ -403,6 +403,7 @@ static struct of_device_id zynqmpp_fpga_id_table[] = { { .compatible = "xlnx,zynqmp-pcap-fpga", }, + { /* sentinel */ } }; static struct driver_d zynqmp_fpga_driver = { diff --git a/drivers/gpio/gpio-ath79.c b/drivers/gpio/gpio-ath79.c index d08d743b54..1e66107c84 100644 --- a/drivers/gpio/gpio-ath79.c +++ b/drivers/gpio/gpio-ath79.c @@ -151,8 +151,4 @@ static struct driver_d ath79_gpio_driver = { .of_compatible = DRV_OF_COMPAT(ath79_gpio_of_match), }; -static int ath79_gpio_init(void) -{ - return platform_driver_register(&ath79_gpio_driver); -} -coredevice_initcall(ath79_gpio_init); +coredevice_platform_driver(ath79_gpio_driver); diff --git a/drivers/gpio/gpio-davinci.c b/drivers/gpio/gpio-davinci.c index 7c060a09b1..3346209f76 100644 --- a/drivers/gpio/gpio-davinci.c +++ b/drivers/gpio/gpio-davinci.c @@ -206,8 +206,4 @@ static struct driver_d davinci_gpio_driver = { .of_compatible = DRV_OF_COMPAT(davinci_gpio_ids), }; -static int davinci_gpio_drv_reg(void) -{ - return platform_driver_register(&davinci_gpio_driver); -} -coredevice_initcall(davinci_gpio_drv_reg); +coredevice_platform_driver(davinci_gpio_driver); diff --git a/drivers/gpio/gpio-digic.c b/drivers/gpio/gpio-digic.c index f7a68d09fc..9faa27c183 100644 --- a/drivers/gpio/gpio-digic.c +++ b/drivers/gpio/gpio-digic.c @@ -176,8 +176,4 @@ static struct driver_d digic_gpio_driver = { .of_compatible = DRV_OF_COMPAT(digic_gpio_dt_ids), }; -static int digic_gpio_init(void) -{ - return platform_driver_register(&digic_gpio_driver); -} -coredevice_initcall(digic_gpio_init); +coredevice_platform_driver(digic_gpio_driver); diff --git a/drivers/gpio/gpio-dw.c b/drivers/gpio/gpio-dw.c index b81e6a75c5..b7a61a8d90 100644 --- a/drivers/gpio/gpio-dw.c +++ b/drivers/gpio/gpio-dw.c @@ -195,8 +195,4 @@ static struct driver_d dwgpio_driver = { .of_compatible = DRV_OF_COMPAT(dwgpio_match), }; -static int __init dwgpio_init(void) -{ - return platform_driver_register(&dwgpio_driver); -} -postcore_initcall(dwgpio_init); +postcore_platform_driver(dwgpio_driver); diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-generic.c index 2e0dad9974..a9ddf26fa4 100644 --- a/drivers/gpio/gpio-generic.c +++ b/drivers/gpio/gpio-generic.c @@ -424,11 +424,7 @@ static struct driver_d bgpio_driver = { .remove = bgpio_dev_remove, }; -static int bgpio_register(void) -{ - return platform_driver_register(&bgpio_driver); -} -coredevice_initcall(bgpio_register); +coredevice_platform_driver(bgpio_driver); #endif diff --git a/drivers/gpio/gpio-imx.c b/drivers/gpio/gpio-imx.c index 2827e11e73..c7ebce0b86 100644 --- a/drivers/gpio/gpio-imx.c +++ b/drivers/gpio/gpio-imx.c @@ -217,9 +217,4 @@ static struct driver_d imx_gpio_driver = { .id_table = imx_gpio_ids, }; -static int imx_gpio_add(void) -{ - platform_driver_register(&imx_gpio_driver); - return 0; -} -postcore_initcall(imx_gpio_add); +postcore_platform_driver(imx_gpio_driver); diff --git a/drivers/gpio/gpio-jz4740.c b/drivers/gpio/gpio-jz4740.c index 87e0716b06..bf99b718e8 100644 --- a/drivers/gpio/gpio-jz4740.c +++ b/drivers/gpio/gpio-jz4740.c @@ -136,8 +136,4 @@ static struct driver_d jz4740_gpio_driver = { .of_compatible = DRV_OF_COMPAT(jz4740_gpio_dt_ids), }; -static int jz4740_gpio_init(void) -{ - return platform_driver_register(&jz4740_gpio_driver); -} -coredevice_initcall(jz4740_gpio_init); +coredevice_platform_driver(jz4740_gpio_driver); diff --git a/drivers/gpio/gpio-malta-fpga-i2c.c b/drivers/gpio/gpio-malta-fpga-i2c.c index 9142248571..8002f7b73a 100644 --- a/drivers/gpio/gpio-malta-fpga-i2c.c +++ b/drivers/gpio/gpio-malta-fpga-i2c.c @@ -180,8 +180,4 @@ static struct driver_d malta_i2c_gpio_driver = { .of_compatible = DRV_OF_COMPAT(malta_i2c_gpio_dt_ids), }; -static int malta_i2c_gpio_driver_init(void) -{ - return platform_driver_register(&malta_i2c_gpio_driver); -} -coredevice_initcall(malta_i2c_gpio_driver_init); +coredevice_platform_driver(malta_i2c_gpio_driver); diff --git a/drivers/gpio/gpio-mpc8xxx.c b/drivers/gpio/gpio-mpc8xxx.c index 979f92ad30..710e5d1176 100644 --- a/drivers/gpio/gpio-mpc8xxx.c +++ b/drivers/gpio/gpio-mpc8xxx.c @@ -115,8 +115,4 @@ static struct driver_d mpc8xxx_driver = { .of_compatible = DRV_OF_COMPAT(mpc8xxx_gpio_ids), }; -static int __init mpc8xxx_init(void) -{ - return platform_driver_register(&mpc8xxx_driver); -} -postcore_initcall(mpc8xxx_init); +postcore_platform_driver(mpc8xxx_driver); diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c index ef78873ad2..aca93f5b27 100644 --- a/drivers/gpio/gpio-mxs.c +++ b/drivers/gpio/gpio-mxs.c @@ -178,9 +178,4 @@ static struct driver_d mxs_gpio_driver = { .id_table = mxs_gpio_ids, }; -static int mxs_gpio_add(void) -{ - platform_driver_register(&mxs_gpio_driver); - return 0; -} -postcore_initcall(mxs_gpio_add); +postcore_platform_driver(mxs_gpio_driver); diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index b00766a6aa..88fca4f68a 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -192,8 +192,4 @@ static struct driver_d omap_gpio_driver = { .of_compatible = DRV_OF_COMPAT(omap_gpio_dt_ids), }; -static int omap_gpio_add(void) -{ - return platform_driver_register(&omap_gpio_driver); -} -coredevice_initcall(omap_gpio_add); +coredevice_platform_driver(omap_gpio_driver); diff --git a/drivers/gpio/gpio-pl061.c b/drivers/gpio/gpio-pl061.c index f34aba9da9..c17c265440 100644 --- a/drivers/gpio/gpio-pl061.c +++ b/drivers/gpio/gpio-pl061.c @@ -147,11 +147,7 @@ static struct amba_driver pl061_gpio_driver = { .probe = pl061_probe, }; -static int __init pl061_gpio_init(void) -{ - return amba_driver_register(&pl061_gpio_driver); -} -coredevice_initcall(pl061_gpio_init); +coredevice_platform_driver(pl061_gpio_driver); MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); MODULE_DESCRIPTION("PL061 GPIO driver"); diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c index d7e64045b4..ef37fe0dcf 100644 --- a/drivers/gpio/gpio-stmpe.c +++ b/drivers/gpio/gpio-stmpe.c @@ -154,8 +154,4 @@ static struct driver_d stmpe_gpio_driver = { .probe = stmpe_gpio_probe, }; -static int stmpe_gpio_add(void) -{ - return platform_driver_register(&stmpe_gpio_driver); -} -coredevice_initcall(stmpe_gpio_add); +coredevice_platform_driver(stmpe_gpio_driver); diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index 56808b57e4..2348ce664a 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c @@ -201,8 +201,4 @@ static struct driver_d tegra_gpio_driver = { .probe = tegra_gpio_probe, }; -static int __init tegra_gpio_init(void) -{ - return platform_driver_register(&tegra_gpio_driver); -} -coredevice_initcall(tegra_gpio_init); +coredevice_platform_driver(tegra_gpio_driver); diff --git a/drivers/gpio/gpio-vf610.c b/drivers/gpio/gpio-vf610.c index ab35310fbe..b08b396a6e 100644 --- a/drivers/gpio/gpio-vf610.c +++ b/drivers/gpio/gpio-vf610.c @@ -156,8 +156,4 @@ static struct driver_d vf610_gpio_driver = { .of_compatible = DRV_OF_COMPAT(vf610_gpio_dt_ids), }; -static int __init gpio_vf610_init(void) -{ - return platform_driver_register(&vf610_gpio_driver); -} -postcore_initcall(gpio_vf610_init); +postcore_platform_driver(vf610_gpio_driver); diff --git a/drivers/hw_random/mxc-rngc.c b/drivers/hw_random/mxc-rngc.c index 3ed25aa61d..075c20e437 100644 --- a/drivers/hw_random/mxc-rngc.c +++ b/drivers/hw_random/mxc-rngc.c @@ -133,7 +133,7 @@ static int mxc_rngc_data_present(struct hwrng *rng) static int mxc_rngc_read(struct hwrng *rng, void *buf, size_t max, bool wait) { struct mxc_rngc *rngc = container_of(rng, struct mxc_rngc, rng); - unsigned int err; + unsigned int err = 0; int count = 0; u32 *data = buf; diff --git a/drivers/led/led-pca955x.c b/drivers/led/led-pca955x.c index 27fefce8d5..07bc26a50b 100644 --- a/drivers/led/led-pca955x.c +++ b/drivers/led/led-pca955x.c @@ -72,53 +72,47 @@ enum led_brightness { LED_FULL = 255, }; -enum pca955x_type { - pca9550, - pca9551, - pca9552, - pca9553, -}; - struct pca955x_chipdef { int bits; u8 slv_addr; /* 7-bit slave address mask */ int slv_addr_shift; /* Number of bits to ignore */ }; -static struct pca955x_chipdef pca955x_chipdefs[] = { - [pca9550] = { - .bits = 2, - .slv_addr = /* 110000x */ 0x60, - .slv_addr_shift = 1, - }, - [pca9551] = { - .bits = 8, - .slv_addr = /* 1100xxx */ 0x60, - .slv_addr_shift = 3, - }, - [pca9552] = { - .bits = 16, - .slv_addr = /* 1100xxx */ 0x60, - .slv_addr_shift = 3, - }, - [pca9553] = { - .bits = 4, - .slv_addr = /* 110001x */ 0x62, - .slv_addr_shift = 1, - }, +static const struct pca955x_chipdef pca9550_chipdef = { + .bits = 2, + .slv_addr = /* 110000x */ 0x60, + .slv_addr_shift = 1, +}; + +static const struct pca955x_chipdef pca9551_chipdef = { + .bits = 8, + .slv_addr = /* 1100xxx */ 0x60, + .slv_addr_shift = 3, +}; + +static const struct pca955x_chipdef pca9552_chipdef = { + .bits = 16, + .slv_addr = /* 1100xxx */ 0x60, + .slv_addr_shift = 3, +}; + +static const struct pca955x_chipdef pca9553_chipdef = { + .bits = 4, + .slv_addr = /* 110001x */ 0x62, + .slv_addr_shift = 1, }; static const struct platform_device_id led_pca955x_id[] = { - { "pca9550", pca9550 }, - { "pca9551", pca9551 }, - { "pca9552", pca9552 }, - { "pca9553", pca9553 }, + { "pca9550", (unsigned long) &pca9550_chipdef }, + { "pca9551", (unsigned long) &pca9551_chipdef }, + { "pca9552", (unsigned long) &pca9552_chipdef }, + { "pca9553", (unsigned long) &pca9553_chipdef }, { } }; struct pca955x { struct pca955x_led *leds; - struct pca955x_chipdef *chipdef; + const struct pca955x_chipdef *chipdef; struct i2c_client *client; }; @@ -278,7 +272,7 @@ static struct pca955x_platform_data * led_pca955x_pdata_of_init(struct device_node *np, struct pca955x *pca955x) { struct device_node *child; - struct pca955x_chipdef *chip = pca955x->chipdef; + const struct pca955x_chipdef *chip = pca955x->chipdef; struct pca955x_platform_data *pdata; int count, err; @@ -334,10 +328,10 @@ led_pca955x_pdata_of_init(struct device_node *np, struct pca955x *pca955x) } static const struct of_device_id of_pca955x_match[] = { - { .compatible = "nxp,pca9550", .data = (void *)pca9550 }, - { .compatible = "nxp,pca9551", .data = (void *)pca9551 }, - { .compatible = "nxp,pca9552", .data = (void *)pca9552 }, - { .compatible = "nxp,pca9553", .data = (void *)pca9553 }, + { .compatible = "nxp,pca9550", .data = &pca9550_chipdef }, + { .compatible = "nxp,pca9551", .data = &pca9551_chipdef }, + { .compatible = "nxp,pca9552", .data = &pca9552_chipdef }, + { .compatible = "nxp,pca9553", .data = &pca9553_chipdef }, {}, }; @@ -345,12 +339,15 @@ static int led_pca955x_probe(struct device_d *dev) { struct pca955x *pca955x; struct pca955x_led *pca955x_led; - struct pca955x_chipdef *chip; + const struct pca955x_chipdef *chip; struct i2c_client *client; int err; struct pca955x_platform_data *pdata; - chip = &pca955x_chipdefs[dev->id_entry->driver_data]; + chip = device_get_match_data(dev); + if (!chip) + return -ENODEV; + client = to_i2c_client(dev); /* Make sure the slave address / chip type combo given is possible */ @@ -413,8 +410,4 @@ static struct driver_d led_pca955x_driver = { .of_compatible = DRV_OF_COMPAT(of_pca955x_match), }; -static int __init led_pca955x_init(void) -{ - return i2c_driver_register(&led_pca955x_driver); -} -device_initcall(led_pca955x_init); +device_i2c_driver(led_pca955x_driver); diff --git a/drivers/mci/mci-bcm2835.c b/drivers/mci/mci-bcm2835.c index c463c623e7..91027857be 100644 --- a/drivers/mci/mci-bcm2835.c +++ b/drivers/mci/mci-bcm2835.c @@ -447,8 +447,4 @@ static struct driver_d bcm2835_mci_driver = { .of_compatible = DRV_OF_COMPAT(bcm2835_mci_compatible), }; -static int bcm2835_mci_add(void) -{ - return platform_driver_register(&bcm2835_mci_driver); -} -device_initcall(bcm2835_mci_add); +device_platform_driver(bcm2835_mci_driver); diff --git a/drivers/memory/mc-tegra124.c b/drivers/memory/mc-tegra124.c index a8d16094c6..09d9d89a49 100644 --- a/drivers/memory/mc-tegra124.c +++ b/drivers/memory/mc-tegra124.c @@ -68,8 +68,4 @@ static struct driver_d tegra124_mc_driver = { .probe = tegra124_mc_probe, }; -static int __init tegra124_mc_init(void) -{ - return platform_driver_register(&tegra124_mc_driver); -} -device_initcall(tegra124_mc_init); +device_platform_driver(tegra124_mc_driver); diff --git a/drivers/mfd/da9063.c b/drivers/mfd/da9063.c index e48c38affa..31359cf8b8 100644 --- a/drivers/mfd/da9063.c +++ b/drivers/mfd/da9063.c @@ -370,11 +370,9 @@ static int da9063_probe(struct device_d *dev) { struct da9063 *priv = NULL; struct da906x_device_data const *dev_data; - void const *dev_data_tmp; int ret; - ret = dev_get_drvdata(dev, &dev_data_tmp); - dev_data = ret < 0 ? NULL : dev_data_tmp; + dev_data = device_get_match_data(dev); priv = xzalloc(sizeof(struct da9063)); priv->wd.set_timeout = da9063_watchdog_set_timeout; diff --git a/drivers/mfd/mc13xxx.c b/drivers/mfd/mc13xxx.c index a5877dbda1..1f321a3272 100644 --- a/drivers/mfd/mc13xxx.c +++ b/drivers/mfd/mc13xxx.c @@ -399,37 +399,24 @@ static __maybe_unused struct of_device_id mc13xxx_dt_ids[] = { { } }; -static struct driver_d mc13xxx_i2c_driver = { +static __maybe_unused struct driver_d mc13xxx_i2c_driver = { .name = "mc13xxx-i2c", .probe = mc13xxx_probe, .id_table = mc13xxx_ids, .of_compatible = DRV_OF_COMPAT(mc13xxx_dt_ids), }; -static struct driver_d mc13xxx_spi_driver = { +#if IS_ENABLED(CONFIG_I2C) +coredevice_i2c_driver(mc13xxx_i2c_driver); +#endif + +static __maybe_unused struct driver_d mc13xxx_spi_driver = { .name = "mc13xxx-spi", .probe = mc13xxx_probe, .id_table = mc13xxx_ids, .of_compatible = DRV_OF_COMPAT(mc13xxx_dt_ids), }; -static int __init mc13xxx_init(void) -{ - int err_spi = 0, err_i2c = 0; - - if (IS_ENABLED(CONFIG_I2C)) - err_spi = i2c_driver_register(&mc13xxx_i2c_driver); - - if (IS_ENABLED(CONFIG_SPI)) - err_i2c = spi_driver_register(&mc13xxx_spi_driver); - - if (err_spi) - return err_spi; - - if (err_i2c) - return err_i2c; - - return 0; - -} -coredevice_initcall(mc13xxx_init); +#if IS_ENABLED(CONFIG_SPI) +coredevice_spi_driver(mc13xxx_spi_driver); +#endif diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c index a464dfc506..25e308b2d6 100644 --- a/drivers/mfd/syscon.c +++ b/drivers/mfd/syscon.c @@ -267,11 +267,7 @@ static struct driver_d syscon_driver = { .id_table = syscon_ids, }; -static int __init syscon_init(void) -{ - return platform_driver_register(&syscon_driver); -} -core_initcall(syscon_init); +core_platform_driver(syscon_driver); MODULE_AUTHOR("Dong Aisheng <dong.aisheng@linaro.org>"); MODULE_DESCRIPTION("System Control driver"); diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c index 36b6e7ac22..e2b6e21620 100644 --- a/drivers/mtd/nand/nand_mxs.c +++ b/drivers/mtd/nand/nand_mxs.c @@ -2145,9 +2145,7 @@ static int mxs_nand_probe(struct device_d *dev) if (mxs_nand_mtd) return -EBUSY; - err = dev_get_drvdata(dev, (const void **)&type); - if (err) - type = GPMI_MXS; + type = (enum gpmi_type)device_get_match_data(dev); nand_info = kzalloc(sizeof(struct mxs_nand_info), GFP_KERNEL); if (!nand_info) { diff --git a/drivers/mtd/peb.c b/drivers/mtd/peb.c index d10a8a024d..b47d04b4c0 100644 --- a/drivers/mtd/peb.c +++ b/drivers/mtd/peb.c @@ -88,18 +88,14 @@ static int mtd_peb_debug_init(void) } device_initcall(mtd_peb_debug_init); -BAREBOX_MAGICVAR_NAMED(global_mtd_peb_emulate_bitflip, - global.mtd_peb.emulate_bitflip, - "random bitflips, on average every #nth access returns -EUCLEAN"); -BAREBOX_MAGICVAR_NAMED(global_mtd_peb_emulate_write_failure, - global.mtd_peb.emulate_write_failure, - "random write failures, on average every #nth access returns write failure"); -BAREBOX_MAGICVAR_NAMED(global_mtd_peb_emulate_erase_failures, - global.mtd_peb.emulate_erase_failures, - "random erase failures, on average every #nth access returns erase failure"); -BAREBOX_MAGICVAR_NAMED(global_mtd_peb_chk_io, - global.mtd_peb.chk_io, - "If true, written data will be verified"); +BAREBOX_MAGICVAR(global.mtd_peb.emulate_bitflip, + "random bitflips, on average every #nth access returns -EUCLEAN"); +BAREBOX_MAGICVAR(global.mtd_peb.emulate_write_failure, + "random write failures, on average every #nth access returns write failure"); +BAREBOX_MAGICVAR(global.mtd_peb.emulate_erase_failures, + "random erase failures, on average every #nth access returns erase failure"); +BAREBOX_MAGICVAR(global.mtd_peb.chk_io, + "If true, written data will be verified"); #endif diff --git a/drivers/net/ar231x.c b/drivers/net/ar231x.c index 48d41b8cb2..6d1a90684c 100644 --- a/drivers/net/ar231x.c +++ b/drivers/net/ar231x.c @@ -424,8 +424,4 @@ static struct driver_d ar231x_eth_driver = { .probe = ar231x_eth_probe, }; -static int ar231x_eth_driver_init(void) -{ - return platform_driver_register(&ar231x_eth_driver); -} -device_initcall(ar231x_eth_driver_init); +device_platform_driver(ar231x_eth_driver); diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 4850e60c49..e3e039f679 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -731,7 +731,7 @@ static int macb_probe(struct device_d *dev) if (hclk_name) { macb->hclk = clk_get(dev, pclk_name); - if (IS_ERR(macb->pclk)) { + if (IS_ERR(macb->hclk)) { dev_err(dev, "no hclk\n"); return PTR_ERR(macb->hclk); } diff --git a/drivers/net/phy/ar8327.c b/drivers/net/phy/ar8327.c index 5f3a2e2cf2..f13d574b30 100644 --- a/drivers/net/phy/ar8327.c +++ b/drivers/net/phy/ar8327.c @@ -268,9 +268,4 @@ static struct phy_driver ar8327n_driver[] = { .aneg_done = &ar8327n_aneg_done, }}; -static int atheros_phy_init(void) -{ - return phy_drivers_register(ar8327n_driver, - ARRAY_SIZE(ar8327n_driver)); -} -fs_initcall(atheros_phy_init); +device_phy_drivers(ar8327n_driver); diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index de053a36fb..016ed97020 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -243,9 +243,4 @@ static struct phy_driver at803x_driver[] = { .read_status = &genphy_read_status, } }; -static int atheros_phy_init(void) -{ - return phy_drivers_register(at803x_driver, - ARRAY_SIZE(at803x_driver)); -} -fs_initcall(atheros_phy_init); +device_phy_drivers(at803x_driver); diff --git a/drivers/net/phy/davicom.c b/drivers/net/phy/davicom.c index febaffa52c..794e5f2c96 100644 --- a/drivers/net/phy/davicom.c +++ b/drivers/net/phy/davicom.c @@ -127,9 +127,4 @@ static struct phy_driver dm91xx_driver[] = { .features = PHY_BASIC_FEATURES, } }; -static int dm9161_init(void) -{ - return phy_drivers_register(dm91xx_driver, - ARRAY_SIZE(dm91xx_driver)); -} -fs_initcall(dm9161_init); +device_phy_drivers(dm91xx_driver); diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 929a407b09..8131e8c9d6 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -311,8 +311,4 @@ static struct phy_driver dp83867_driver[] = { }, }; -static int dp83867_phy_init(void) -{ - return phy_drivers_register(dp83867_driver, ARRAY_SIZE(dp83867_driver)); -} -fs_initcall(dp83867_phy_init); +device_phy_drivers(dp83867_driver); diff --git a/drivers/net/phy/lxt.c b/drivers/net/phy/lxt.c index b661ae7316..9b023c8c40 100644 --- a/drivers/net/phy/lxt.c +++ b/drivers/net/phy/lxt.c @@ -19,9 +19,4 @@ static struct phy_driver lxt97x_driver[] = { .features = PHY_BASIC_FEATURES, } }; -static int lxt97x_phy_init(void) -{ - return phy_drivers_register(lxt97x_driver, - ARRAY_SIZE(lxt97x_driver)); -} -fs_initcall(lxt97x_phy_init); +device_phy_drivers(lxt97x_driver); diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index af39ed68fd..3bf0fef34b 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -733,9 +733,4 @@ static struct phy_driver marvell_drivers[] = { }, }; -static int __init marvell_phy_init(void) -{ - return phy_drivers_register(marvell_drivers, - ARRAY_SIZE(marvell_drivers)); -} -fs_initcall(marvell_phy_init); +device_phy_drivers(marvell_drivers); diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index 4655430573..4e46370241 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -537,9 +537,4 @@ static struct phy_driver ksphy_driver[] = { .read_status = ksz8873mll_read_status, } }; -static int ksphy_init(void) -{ - return phy_drivers_register(ksphy_driver, - ARRAY_SIZE(ksphy_driver)); -} -fs_initcall(ksphy_init); +device_phy_drivers(ksphy_driver); diff --git a/drivers/net/phy/mv88e6xxx/port.c b/drivers/net/phy/mv88e6xxx/port.c index 52f95d622c..3f10719d9a 100644 --- a/drivers/net/phy/mv88e6xxx/port.c +++ b/drivers/net/phy/mv88e6xxx/port.c @@ -547,11 +547,7 @@ static struct phy_driver mv88e6xxx_port_driver = { .read_status = mv88e6xxx_port_read_status, }; -static int __init mv88e6xxx_port_driver_register(void) -{ - return phy_driver_register(&mv88e6xxx_port_driver); -} -fs_initcall(mv88e6xxx_port_driver_register); +device_phy_driver(mv88e6xxx_port_driver); int mv88e6xxx_port_probe(struct mv88e6xxx_chip *chip) { @@ -660,4 +656,4 @@ int mv88e6xxx_port_probe(struct mv88e6xxx_chip *chip) } return 0; -}
\ No newline at end of file +} diff --git a/drivers/net/phy/national.c b/drivers/net/phy/national.c index 83390b99ab..d74cd81933 100644 --- a/drivers/net/phy/national.c +++ b/drivers/net/phy/national.c @@ -84,8 +84,4 @@ static struct phy_driver dp83865_driver = { .config_init = ns_config_init, }; -static int ns_phy_init(void) -{ - return phy_driver_register(&dp83865_driver); -} -fs_initcall(ns_phy_init); +device_phy_driver(dp83865_driver); diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 57c2f8044f..622acbe40d 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -981,8 +981,4 @@ static struct phy_driver genphy_driver = { SUPPORTED_BNC, }; -static int generic_phy_register(void) -{ - return phy_driver_register(&genphy_driver); -} -device_initcall(generic_phy_register); +device_phy_driver(genphy_driver); diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 695a6c384d..9ba0495d41 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -196,9 +196,4 @@ static struct phy_driver realtek_drvs[] = { }, }; -static int __init realtek_phy_init(void) -{ - return phy_drivers_register(realtek_drvs, - ARRAY_SIZE(realtek_drvs)); -} -fs_initcall(realtek_phy_init); +device_phy_drivers(realtek_drvs); diff --git a/drivers/net/phy/smsc.c b/drivers/net/phy/smsc.c index d6705e4fe2..1e1f3d5274 100644 --- a/drivers/net/phy/smsc.c +++ b/drivers/net/phy/smsc.c @@ -135,8 +135,4 @@ static struct phy_driver smsc_phy_driver[] = { .config_init = lan87xx_config_init, } }; -static int __init smsc_init(void) -{ - return phy_drivers_register(smsc_phy_driver, ARRAY_SIZE(smsc_phy_driver)); -} -fs_initcall(smsc_init); +device_phy_drivers(smsc_phy_driver); diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c index 3ca27ff027..1140be9d16 100644 --- a/drivers/net/usb/asix.c +++ b/drivers/net/usb/asix.c @@ -252,11 +252,19 @@ static int asix_mdio_read(struct mii_bus *bus, int phy_id, int loc) { struct usbnet *dev = bus->priv; __le16 res; + int ret; - asix_set_sw_mii(dev); - asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, - (__u16)loc, 2, &res); - asix_set_hw_mii(dev); + ret = asix_set_sw_mii(dev); + if (ret < 0) + return ret; + + ret = asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, (__u16)loc, 2, &res); + if (ret < 0) + return ret; + + ret = asix_set_hw_mii(dev); + if (ret < 0) + return ret; dev_dbg(&dev->edev.dev, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", phy_id, loc, le16_to_cpu(res)); @@ -268,13 +276,22 @@ static int asix_mdio_write(struct mii_bus *bus, int phy_id, int loc, u16 val) { struct usbnet *dev = bus->priv; __le16 res = cpu_to_le16(val); + int ret; dev_dbg(&dev->edev.dev, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", phy_id, loc, val); - asix_set_sw_mii(dev); - asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res); - asix_set_hw_mii(dev); + ret = asix_set_sw_mii(dev); + if (ret < 0) + return ret; + + ret = asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res); + if (ret < 0) + return ret; + + ret = asix_set_hw_mii(dev); + if (ret < 0) + return ret; return 0; } diff --git a/drivers/of/base.c b/drivers/of/base.c index 0a2632f963..63cc2e586c 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -23,6 +23,7 @@ #include <memory.h> #include <linux/sizes.h> #include <of_graph.h> +#include <string.h> #include <linux/ctype.h> #include <linux/amba/bus.h> #include <linux/err.h> @@ -1183,6 +1184,53 @@ int of_property_write_u64_array(struct device_node *np, } /** + * of_property_write_strings - Write strings to a property. If + * the property does not exist, it will be created and appended to the given + * device node. + * + * @np: device node to which the property value is to be written. + * @propname: name of the property to be written. + * @...: pointers to strings to write + * + * Search for a property in a device node and write a string to + * it. If the property does not exist, it will be created and appended to + * the device node. Returns 0 on success, -ENOMEM if the property or array + * of elements cannot be created, -EINVAL if no strings specified. + */ +int of_property_write_strings(struct device_node *np, + const char *propname, ...) +{ + const char *val; + char *buf = NULL, *next; + size_t len = 0; + va_list ap; + int ret = 0; + + va_start(ap, propname); + for (val = va_arg(ap, char *); val; val = va_arg(ap, char *)) + len += strlen(val) + 1; + va_end(ap); + + if (!len) + return -EINVAL; + + buf = malloc(len); + if (!buf) + return -ENOMEM; + + next = buf; + + va_start(ap, propname); + for (val = va_arg(ap, char *); val; val = va_arg(ap, char *)) + next = stpcpy(next, val) + 1; + va_end(ap); + + ret = of_set_property(np, propname, buf, len, 1); + free(buf); + return ret; +} + +/** * of_property_write_string - Write a string to a property. If * the property does not exist, it will be created and appended to the given * device node. diff --git a/drivers/of/platform.c b/drivers/of/platform.c index ca84cede23..21c7cce1a5 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -282,7 +282,7 @@ amba_err_free: return NULL; } #else /* CONFIG_ARM_AMBA */ -static inline struct amba_device *of_amba_device_create(struct device_node *np) +static inline struct device_d *of_amba_device_create(struct device_node *np) { return NULL; } diff --git a/drivers/pci/pci-layerscape.c b/drivers/pci/pci-layerscape.c index 53be43b28f..d8f03fa599 100644 --- a/drivers/pci/pci-layerscape.c +++ b/drivers/pci/pci-layerscape.c @@ -363,9 +363,8 @@ static phandle ls_pcie_get_iommu_handle(struct device_node *np, phandle *handle) */ static int ls_pcie_share_stream_id; -BAREBOX_MAGICVAR_NAMED(global_ls_pcie_share_stream_id, - global.layerscape_pcie.share_stream_ids, - "If true, use a stream_id per host controller and not per device"); +BAREBOX_MAGICVAR(global.layerscape_pcie.share_stream_ids, + "If true, use a stream_id per host controller and not per device"); static int ls_pcie_of_fixup(struct device_node *root, void *ctx) { diff --git a/drivers/phy/usb-nop-xceiv.c b/drivers/phy/usb-nop-xceiv.c index a9031fa7f8..7ea7d28a21 100644 --- a/drivers/phy/usb-nop-xceiv.c +++ b/drivers/phy/usb-nop-xceiv.c @@ -146,8 +146,4 @@ static struct driver_d nop_usbphy_driver = { .of_compatible = DRV_OF_COMPAT(nop_usbphy_dt_ids), }; -static int nop_usbphy_driver_init(void) -{ - return platform_driver_register(&nop_usbphy_driver); -} -fs_initcall(nop_usbphy_driver_init); +fs_platform_driver(nop_usbphy_driver); diff --git a/drivers/pinctrl/imx-iomux-v1.c b/drivers/pinctrl/imx-iomux-v1.c index 81925f2fd4..d48707db7d 100644 --- a/drivers/pinctrl/imx-iomux-v1.c +++ b/drivers/pinctrl/imx-iomux-v1.c @@ -302,10 +302,6 @@ static struct driver_d imx_iomux_v1_driver = { .of_compatible = DRV_OF_COMPAT(imx_iomux_v1_dt_ids), }; -static int imx_iomux_v1_init(void) -{ - return platform_driver_register(&imx_iomux_v1_driver); -} -core_initcall(imx_iomux_v1_init); +core_platform_driver(imx_iomux_v1_driver); -#endif
\ No newline at end of file +#endif diff --git a/drivers/pinctrl/imx-iomux-v2.c b/drivers/pinctrl/imx-iomux-v2.c index 60b635a8a8..b6ffb7508a 100644 --- a/drivers/pinctrl/imx-iomux-v2.c +++ b/drivers/pinctrl/imx-iomux-v2.c @@ -150,8 +150,4 @@ static struct driver_d imx_iomux_driver = { .id_table = imx_iomux_ids, }; -static int imx_iomux_init(void) -{ - return platform_driver_register(&imx_iomux_driver); -} -core_initcall(imx_iomux_init); +core_platform_driver(imx_iomux_driver); diff --git a/drivers/pinctrl/imx-iomux-v3.c b/drivers/pinctrl/imx-iomux-v3.c index fd05274512..cec2414a03 100644 --- a/drivers/pinctrl/imx-iomux-v3.c +++ b/drivers/pinctrl/imx-iomux-v3.c @@ -168,10 +168,10 @@ static struct pinctrl_ops imx_iomux_v3_ops = { static int imx_pinctrl_dt(struct device_d *dev, void __iomem *base) { struct imx_iomux_v3 *iomux; - struct imx_iomux_v3_data *drvdata = NULL; + const struct imx_iomux_v3_data *drvdata; int ret; - dev_get_drvdata(dev, (const void **)&drvdata); + drvdata = device_get_match_data(dev); iomux = xzalloc(sizeof(*iomux)); iomux->base = base; @@ -265,8 +265,4 @@ static struct driver_d imx_iomux_v3_driver = { .of_compatible = DRV_OF_COMPAT(imx_iomux_v3_dt_ids), }; -static int imx_iomux_v3_init(void) -{ - return platform_driver_register(&imx_iomux_v3_driver); -} -core_initcall(imx_iomux_v3_init); +core_platform_driver(imx_iomux_v3_driver); diff --git a/drivers/pinctrl/mvebu/armada-370.c b/drivers/pinctrl/mvebu/armada-370.c index 4fde16ab5d..24ad7f5860 100644 --- a/drivers/pinctrl/mvebu/armada-370.c +++ b/drivers/pinctrl/mvebu/armada-370.c @@ -411,8 +411,4 @@ static struct driver_d armada_370_pinctrl_driver = { .of_compatible = armada_370_pinctrl_of_match, }; -static int armada_370_pinctrl_init(void) -{ - return platform_driver_register(&armada_370_pinctrl_driver); -} -core_initcall(armada_370_pinctrl_init); +core_platform_driver(armada_370_pinctrl_driver); diff --git a/drivers/pinctrl/mvebu/armada-xp.c b/drivers/pinctrl/mvebu/armada-xp.c index 089942d696..25faabdf05 100644 --- a/drivers/pinctrl/mvebu/armada-xp.c +++ b/drivers/pinctrl/mvebu/armada-xp.c @@ -400,9 +400,4 @@ static struct driver_d armada_xp_pinctrl_driver = { .probe = armada_xp_pinctrl_probe, .of_compatible = armada_xp_pinctrl_of_match, }; - -static int armada_xp_pinctrl_init(void) -{ - return platform_driver_register(&armada_xp_pinctrl_driver); -} -core_initcall(armada_xp_pinctrl_init); +core_platform_driver(armada_xp_pinctrl_driver); diff --git a/drivers/pinctrl/mvebu/dove.c b/drivers/pinctrl/mvebu/dove.c index 2d9d8094f8..e02501d744 100644 --- a/drivers/pinctrl/mvebu/dove.c +++ b/drivers/pinctrl/mvebu/dove.c @@ -738,8 +738,4 @@ static struct driver_d dove_pinctrl_driver = { .of_compatible = dove_pinctrl_of_match, }; -static int dove_pinctrl_init(void) -{ - return platform_driver_register(&dove_pinctrl_driver); -} -core_initcall(dove_pinctrl_init); +core_platform_driver(dove_pinctrl_driver); diff --git a/drivers/pinctrl/mvebu/kirkwood.c b/drivers/pinctrl/mvebu/kirkwood.c index a347239028..91bef76270 100644 --- a/drivers/pinctrl/mvebu/kirkwood.c +++ b/drivers/pinctrl/mvebu/kirkwood.c @@ -452,8 +452,4 @@ static struct driver_d kirkwood_pinctrl_driver = { .of_compatible = kirkwood_pinctrl_of_match, }; -static int kirkwood_pinctrl_init(void) -{ - return platform_driver_register(&kirkwood_pinctrl_driver); -} -core_initcall(kirkwood_pinctrl_init); +core_platform_driver(kirkwood_pinctrl_driver); diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c index b527114f1b..40bc573e31 100644 --- a/drivers/pinctrl/pinctrl-at91-pio4.c +++ b/drivers/pinctrl/pinctrl-at91-pio4.c @@ -229,7 +229,7 @@ static struct gpio_ops at91_gpio4_ops = { static int pinctrl_at91_pio4_gpiochip_add(struct device_d *dev, struct pinctrl_at91_pio4 *pinctrl) { - struct at91_pinctrl_data *drvdata; + const struct at91_pinctrl_data *drvdata; struct clk *clk; int ret; @@ -247,7 +247,7 @@ static int pinctrl_at91_pio4_gpiochip_add(struct device_d *dev, return ret; } - dev_get_drvdata(dev, (const void **)&drvdata); + drvdata = device_get_match_data(dev); pinctrl->gpiochip.ops = &at91_gpio4_ops; pinctrl->gpiochip.base = 0; @@ -313,8 +313,4 @@ static struct driver_d pinctrl_at91_pio4_driver = { .of_compatible = DRV_OF_COMPAT(pinctrl_at91_pio4_dt_ids), }; -static int pinctrl_at91_pio4_init(void) -{ - return platform_driver_register(&pinctrl_at91_pio4_driver); -} -core_initcall(pinctrl_at91_pio4_init); +core_platform_driver(pinctrl_at91_pio4_driver); diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index 13add1ffee..ad64f7da6d 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c @@ -526,11 +526,7 @@ static struct driver_d at91_pinctrl_driver = { .of_compatible = DRV_OF_COMPAT(at91_pinctrl_dt_ids), }; -static int at91_pinctrl_init(void) -{ - return platform_driver_register(&at91_pinctrl_driver); -} -core_initcall(at91_pinctrl_init); +core_platform_driver(at91_pinctrl_driver); static int at91_gpio_get(struct gpio_chip *chip, unsigned offset) { @@ -706,8 +702,4 @@ static struct driver_d at91_gpio_driver = { .of_compatible = DRV_OF_COMPAT(at91_gpio_dt_ids), }; -static int at91_gpio_init(void) -{ - return platform_driver_register(&at91_gpio_driver); -} -core_initcall(at91_gpio_init); +core_platform_driver(at91_gpio_driver); diff --git a/drivers/pinctrl/pinctrl-bcm2835.c b/drivers/pinctrl/pinctrl-bcm2835.c index b8e9b60372..d62c735181 100644 --- a/drivers/pinctrl/pinctrl-bcm2835.c +++ b/drivers/pinctrl/pinctrl-bcm2835.c @@ -205,8 +205,4 @@ static struct driver_d bcm2835_gpio_driver = { .of_compatible = DRV_OF_COMPAT(bcm2835_gpio_dt_ids), }; -static int bcm2835_gpio_add(void) -{ - return platform_driver_register(&bcm2835_gpio_driver); -} -coredevice_initcall(bcm2835_gpio_add); +coredevice_platform_driver(bcm2835_gpio_driver); diff --git a/drivers/pinctrl/pinctrl-mxs.c b/drivers/pinctrl/pinctrl-mxs.c index 96f30bf95b..7c5d54c9ac 100644 --- a/drivers/pinctrl/pinctrl-mxs.c +++ b/drivers/pinctrl/pinctrl-mxs.c @@ -161,8 +161,4 @@ static struct driver_d mxs_pinctrl_driver = { .of_compatible = DRV_OF_COMPAT(mxs_pinctrl_dt_ids), }; -static int mxs_pinctrl_init(void) -{ - return platform_driver_register(&mxs_pinctrl_driver); -} -core_initcall(mxs_pinctrl_init); +core_platform_driver(mxs_pinctrl_driver); diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c index c31b7e0365..c774660232 100644 --- a/drivers/pinctrl/pinctrl-single.c +++ b/drivers/pinctrl/pinctrl-single.c @@ -219,8 +219,4 @@ static struct driver_d pcs_driver = { .of_compatible = DRV_OF_COMPAT(pcs_dt_ids), }; -static int pcs_init(void) -{ - return platform_driver_register(&pcs_driver); -} -core_initcall(pcs_init); +core_platform_driver(pcs_driver); diff --git a/drivers/pinctrl/pinctrl-stm32.c b/drivers/pinctrl/pinctrl-stm32.c index cdaed510c5..09b62309f6 100644 --- a/drivers/pinctrl/pinctrl-stm32.c +++ b/drivers/pinctrl/pinctrl-stm32.c @@ -440,8 +440,4 @@ static struct driver_d stm32_pinctrl_driver = { .of_compatible = DRV_OF_COMPAT(stm32_pinctrl_dt_ids), }; -static int stm32_pinctrl_init(void) -{ - return platform_driver_register(&stm32_pinctrl_driver); -} -core_initcall(stm32_pinctrl_init); +core_platform_driver(stm32_pinctrl_driver); diff --git a/drivers/pinctrl/pinctrl-tegra-xusb.c b/drivers/pinctrl/pinctrl-tegra-xusb.c index c4d3bbe8d4..37d77e5ef6 100644 --- a/drivers/pinctrl/pinctrl-tegra-xusb.c +++ b/drivers/pinctrl/pinctrl-tegra-xusb.c @@ -388,7 +388,7 @@ static int pinctrl_tegra_xusb_probe(struct device_d *dev) dev->priv = padctl; padctl->dev = dev; - dev_get_drvdata(dev, (const void **)&padctl->soc); + padctl->soc = device_get_match_data(dev); iores = dev_request_mem_resource(dev, 0); if (IS_ERR(iores)) { @@ -514,8 +514,4 @@ static struct driver_d pinctrl_tegra_xusb_driver = { .of_compatible = DRV_OF_COMPAT(pinctrl_tegra_xusb_dt_ids), }; -static int pinctrl_tegra_xusb_init(void) -{ - return platform_driver_register(&pinctrl_tegra_xusb_driver); -} -core_initcall(pinctrl_tegra_xusb_init); +core_platform_driver(pinctrl_tegra_xusb_driver); diff --git a/drivers/pinctrl/pinctrl-tegra20.c b/drivers/pinctrl/pinctrl-tegra20.c index 337992c21f..256aea1860 100644 --- a/drivers/pinctrl/pinctrl-tegra20.c +++ b/drivers/pinctrl/pinctrl-tegra20.c @@ -346,8 +346,4 @@ static struct driver_d pinctrl_tegra20_driver = { .of_compatible = DRV_OF_COMPAT(pinctrl_tegra20_dt_ids), }; -static int pinctrl_tegra20_init(void) -{ - return platform_driver_register(&pinctrl_tegra20_driver); -} -core_initcall(pinctrl_tegra20_init); +core_platform_driver(pinctrl_tegra20_driver); diff --git a/drivers/pinctrl/pinctrl-tegra30.c b/drivers/pinctrl/pinctrl-tegra30.c index 278ea8c4a0..e9f35e0c9d 100644 --- a/drivers/pinctrl/pinctrl-tegra30.c +++ b/drivers/pinctrl/pinctrl-tegra30.c @@ -32,7 +32,7 @@ struct pinctrl_tegra30 { u32 __iomem *mux; } regs; struct pinctrl_device pinctrl; - struct pinctrl_tegra30_drvdata *drvdata; + const struct pinctrl_tegra30_drvdata *drvdata; }; struct tegra_pingroup { @@ -893,7 +893,7 @@ static int pinctrl_tegra30_probe(struct device_d *dev) regs[i] = IOMEM(iores->start); } - dev_get_drvdata(dev, (const void **)&ctrl->drvdata); + ctrl->drvdata = device_get_match_data(dev); ctrl->pinctrl.dev = dev; ctrl->pinctrl.ops = &pinctrl_tegra30_ops; @@ -931,8 +931,4 @@ static struct driver_d pinctrl_tegra30_driver = { .of_compatible = DRV_OF_COMPAT(pinctrl_tegra30_dt_ids), }; -static int pinctrl_tegra30_init(void) -{ - return platform_driver_register(&pinctrl_tegra30_driver); -} -core_initcall(pinctrl_tegra30_init); +core_platform_driver(pinctrl_tegra30_driver); diff --git a/drivers/pinctrl/pinctrl-vf610.c b/drivers/pinctrl/pinctrl-vf610.c index 9a8ce0caa2..02dea60ac2 100644 --- a/drivers/pinctrl/pinctrl-vf610.c +++ b/drivers/pinctrl/pinctrl-vf610.c @@ -158,8 +158,4 @@ static struct driver_d pinctrl_vf610_driver = { .of_compatible = DRV_OF_COMPAT(pinctrl_vf610_dt_ids), }; -static int pinctrl_vf610_init(void) -{ - return platform_driver_register(&pinctrl_vf610_driver); -} -core_initcall(pinctrl_vf610_init); +core_platform_driver(pinctrl_vf610_driver); diff --git a/drivers/regulator/anatop-regulator.c b/drivers/regulator/anatop-regulator.c index 7ec9446a0a..917f7e8fdd 100644 --- a/drivers/regulator/anatop-regulator.c +++ b/drivers/regulator/anatop-regulator.c @@ -67,6 +67,7 @@ static int anatop_regulator_probe(struct device_d *dev) rdev->desc = rdesc; rdev->regmap = syscon_node_to_regmap(anatop_np); + rdev->dev = dev; if (IS_ERR(rdev->regmap)) return PTR_ERR(rdev->regmap); diff --git a/drivers/regulator/bcm2835.c b/drivers/regulator/bcm2835.c index ea7cf7fe1e..6423b8a834 100644 --- a/drivers/regulator/bcm2835.c +++ b/drivers/regulator/bcm2835.c @@ -14,7 +14,7 @@ #define REG_DEV(_id, _name) \ { \ - .id = _id, \ + .id = _id, \ .devname = _name,\ } @@ -22,7 +22,6 @@ static struct regulator_bcm2835 { int id; char *devname; - struct device_d *dev; struct regulator_dev rdev; struct regulator_desc rdesc; } regs[] = { @@ -43,8 +42,9 @@ struct msg_set_power_state { u32 end_tag; }; -static int regulator_bcm2835_set(struct regulator_bcm2835 *rb, int state) +static int regulator_bcm2835_set(struct regulator_dev *rdev, int state) { + struct regulator_bcm2835 *rb = container_of(rdev, struct regulator_bcm2835, rdev); BCM2835_MBOX_STACK_ALIGN(struct msg_set_power_state, msg_pwr); int ret; @@ -59,8 +59,8 @@ static int regulator_bcm2835_set(struct regulator_bcm2835 *rb, int state) ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_pwr->hdr); if (ret) { - dev_err(rb->dev ,"bcm2835: Could not set module %u power state\n", - rb->id); + dev_err(rdev->dev, "bcm2835: Could not set module %u power state\n", + rb->id); return ret; } @@ -69,16 +69,12 @@ static int regulator_bcm2835_set(struct regulator_bcm2835 *rb, int state) static int regulator_bcm2835_enable(struct regulator_dev *rdev) { - struct regulator_bcm2835 *rb = container_of(rdev, struct regulator_bcm2835, rdev); - - return regulator_bcm2835_set(rb, BCM2835_MBOX_SET_POWER_STATE_REQ_ON); + return regulator_bcm2835_set(rdev, BCM2835_MBOX_SET_POWER_STATE_REQ_ON); } static int regulator_bcm2835_disable(struct regulator_dev *rdev) { - struct regulator_bcm2835 *rb = container_of(rdev, struct regulator_bcm2835, rdev); - - return regulator_bcm2835_set(rb, BCM2835_MBOX_SET_POWER_STATE_REQ_OFF); + return regulator_bcm2835_set(rdev, BCM2835_MBOX_SET_POWER_STATE_REQ_OFF); } struct msg_get_power_state { @@ -101,8 +97,8 @@ static int regulator_bcm2835_is_enabled(struct regulator_dev *rdev) ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_pwr->hdr); if (ret) { - dev_err(rb->dev ,"bcm2835: Could not get module %u power state\n", - rb->id); + dev_err(rdev->dev, "bcm2835: Could not get module %u power state\n", + rb->id); return ret; } @@ -125,7 +121,7 @@ static int regulator_bcm2835_probe(struct device_d *dev) rb->rdesc.ops = &bcm2835_ops; rb->rdev.desc = &rb->rdesc; - rb->dev = dev; + rb->rdev.dev = dev; ret = dev_regulator_register(&rb->rdev, rb->devname, NULL); if (ret) diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index 74e00d7791..6ea21a4609 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c @@ -163,11 +163,17 @@ int of_regulator_register(struct regulator_dev *rd, struct device_node *node) struct regulator_internal *ri; const char *name; + if (!rd || !node) + return -EINVAL; + rd->boot_on = of_property_read_bool(node, "regulator-boot-on"); name = of_get_property(node, "regulator-name", NULL); ri = __regulator_register(rd, name); + if (IS_ERR(ri)) + return PTR_ERR(ri); + ri->node = node; of_property_read_u32(node, "regulator-enable-ramp-delay", diff --git a/drivers/regulator/fixed.c b/drivers/regulator/fixed.c index 0b1c752493..160a55163f 100644 --- a/drivers/regulator/fixed.c +++ b/drivers/regulator/fixed.c @@ -82,6 +82,7 @@ static int regulator_fixed_probe(struct device_d *dev) fix->rdesc.ops = &fixed_ops; fix->rdev.desc = &fix->rdesc; + fix->rdev.dev = dev; if (of_find_property(dev->device_node, "regulator-always-on", NULL) || of_find_property(dev->device_node, "regulator-boot-on", NULL)) { diff --git a/drivers/regulator/pfuze.c b/drivers/regulator/pfuze.c index 91aaec0e7e..1983ec91f6 100644 --- a/drivers/regulator/pfuze.c +++ b/drivers/regulator/pfuze.c @@ -206,15 +206,4 @@ static struct driver_d pfuze_i2c_driver = { .of_compatible = DRV_OF_COMPAT(pfuze_dt_ids), }; -static int __init pfuze_init(void) -{ - int ret; - - ret = i2c_driver_register(&pfuze_i2c_driver); - if (ret) - return ret; - - return 0; - -} -late_initcall(pfuze_init); +device_i2c_driver(pfuze_i2c_driver); diff --git a/drivers/regulator/stm32-pwr.c b/drivers/regulator/stm32-pwr.c index 296f95bc4c..54ba716a8f 100644 --- a/drivers/regulator/stm32-pwr.c +++ b/drivers/regulator/stm32-pwr.c @@ -44,7 +44,6 @@ static u32 ready_mask_table[STM32PWR_REG_NUM_REGS] = { struct stm32_pwr_reg { void __iomem *base; - struct device_d *dev; u32 ready_mask; struct regulator_dev rdev; struct regulator *supply; @@ -97,7 +96,7 @@ static int stm32_pwr_reg_enable(struct regulator_dev *rdev) ret = readx_poll_timeout(stm32_pwr_reg_is_ready, rdev, val, val, 20 * USEC_PER_MSEC); if (ret) - dev_err(priv->dev, "%s: regulator enable timed out!\n", + dev_err(rdev->dev, "%s: regulator enable timed out!\n", desc->name); return ret; @@ -118,7 +117,7 @@ static int stm32_pwr_reg_disable(struct regulator_dev *rdev) ret = readx_poll_timeout(stm32_pwr_reg_is_ready, rdev, val, !val, 20 * USEC_PER_MSEC); if (ret) - dev_err(priv->dev, "%s: regulator disable timed out!\n", + dev_err(rdev->dev, "%s: regulator disable timed out!\n", desc->name); regulator_disable(priv->supply); @@ -179,9 +178,9 @@ static int stm32_pwr_regulator_probe(struct device_d *dev) priv = xzalloc(sizeof(*priv)); priv->base = IOMEM(iores->start); priv->ready_mask = ready_mask_table[i]; - priv->dev = dev; priv->rdev.desc = &desc->desc; + priv->rdev.dev = dev; priv->supply = regulator_get(dev, desc->supply_name); if (IS_ERR(priv->supply)) diff --git a/drivers/regulator/stpmic1_regulator.c b/drivers/regulator/stpmic1_regulator.c index 71a4ae80c3..61227e0855 100644 --- a/drivers/regulator/stpmic1_regulator.c +++ b/drivers/regulator/stpmic1_regulator.c @@ -21,7 +21,6 @@ * @icc_mask: icc register mask */ struct stpmic1_regulator_cfg { - struct device_d *dev; struct regulator_dev rdev; struct regulator_desc desc; u8 mask_reset_reg; @@ -383,8 +382,13 @@ static int stpmic1_regulator_register(struct device_d *dev, int id, { int ret; - cfg->dev = dev; + if (!match->of_node) { + dev_dbg(dev, "Skip missing DTB regulator %s", match->name); + return 0; + } + cfg->rdev.desc = &cfg->desc; + cfg->rdev.dev = dev; cfg->rdev.regmap = dev_get_regmap(dev->parent, NULL); if (IS_ERR(cfg->rdev.regmap)) return PTR_ERR(cfg->rdev.regmap); diff --git a/drivers/reset/core.c b/drivers/reset/core.c index 99b9c80655..26a54f21df 100644 --- a/drivers/reset/core.c +++ b/drivers/reset/core.c @@ -150,7 +150,7 @@ EXPORT_SYMBOL_GPL(reset_control_deassert); static struct reset_control *of_reset_control_get(struct device_node *node, const char *id) { - struct reset_control *rstc = ERR_PTR(-ENODEV); + struct reset_control *rstc; struct reset_controller_dev *r, *rcdev; struct of_phandle_args args; int index = 0; diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c index 9b499f23c5..073f8faea8 100644 --- a/drivers/reset/reset-socfpga.c +++ b/drivers/reset/reset-socfpga.c @@ -118,8 +118,4 @@ static struct driver_d socfpga_reset_driver = { .of_compatible = DRV_OF_COMPAT(socfpga_reset_dt_ids), }; -static int socfpga_reset_init(void) -{ - return platform_driver_register(&socfpga_reset_driver); -} -postcore_initcall(socfpga_reset_init); +postcore_platform_driver(socfpga_reset_driver); diff --git a/drivers/reset/reset-stm32.c b/drivers/reset/reset-stm32.c index 6c62633563..a4498f573b 100644 --- a/drivers/reset/reset-stm32.c +++ b/drivers/reset/reset-stm32.c @@ -211,8 +211,4 @@ static struct driver_d stm32_rcc_reset_driver = { .of_compatible = DRV_OF_COMPAT(stm32_rcc_reset_dt_ids), }; -static int stm32_rcc_reset_init(void) -{ - return platform_driver_register(&stm32_rcc_reset_driver); -} -postcore_initcall(stm32_rcc_reset_init); +postcore_platform_driver(stm32_rcc_reset_driver); diff --git a/drivers/serial/serial_cadence.c b/drivers/serial/serial_cadence.c index 416800b847..e86dccbbc1 100644 --- a/drivers/serial/serial_cadence.c +++ b/drivers/serial/serial_cadence.c @@ -261,8 +261,4 @@ static struct driver_d cadence_serial_driver = { .id_table = cadence_serial_ids, }; -static int cadence_serial_init(void) -{ - return platform_driver_register(&cadence_serial_driver); -} -console_initcall(cadence_serial_init); +console_platform_driver(cadence_serial_driver); diff --git a/drivers/serial/serial_clps711x.c b/drivers/serial/serial_clps711x.c index 7a7d595dff..294c88b92f 100644 --- a/drivers/serial/serial_clps711x.c +++ b/drivers/serial/serial_clps711x.c @@ -184,6 +184,7 @@ out_err: static struct of_device_id __maybe_unused clps711x_uart_dt_ids[] = { { .compatible = "cirrus,ep7209-uart", }, + { /* sentinel */ } }; static struct driver_d clps711x_driver = { diff --git a/drivers/serial/serial_ns16550.c b/drivers/serial/serial_ns16550.c index f117ab9dc1..fc6fa7dc3e 100644 --- a/drivers/serial/serial_ns16550.c +++ b/drivers/serial/serial_ns16550.c @@ -468,12 +468,10 @@ static int ns16550_probe(struct device_d *dev) struct ns16550_priv *priv; struct console_device *cdev; struct NS16550_plat *plat = (struct NS16550_plat *)dev->platform_data; - struct ns16550_drvdata *devtype; + const struct ns16550_drvdata *devtype; int ret; - ret = dev_get_drvdata(dev, (const void **)&devtype); - if (ret) - devtype = &ns16550_drvdata; + devtype = device_get_match_data(dev) ?: &ns16550_drvdata; priv = xzalloc(sizeof(*priv)); diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 0694f14c39..8421d9d7c1 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -103,7 +103,9 @@ struct spi_device *spi_new_device(struct spi_controller *ctrl, goto fail; } - register_device(&proxy->dev); + status = register_device(&proxy->dev); + if (status) + goto fail; return proxy; fail: diff --git a/drivers/usb/dwc2/dwc2.c b/drivers/usb/dwc2/dwc2.c index 908d624794..282e6754b0 100644 --- a/drivers/usb/dwc2/dwc2.c +++ b/drivers/usb/dwc2/dwc2.c @@ -15,19 +15,6 @@ #include "dwc2.h" -static void dwc2_uninit_common(struct dwc2 *dwc2) -{ - uint32_t hprt0; - - hprt0 = dwc2_readl(dwc2, HPRT0); - - /* Put everything in reset. */ - hprt0 &= ~(HPRT0_ENA | HPRT0_ENACHG | HPRT0_CONNDET | HPRT0_OVRCURRCHG); - hprt0 |= HPRT0_RST; - - dwc2_writel(dwc2, hprt0, HPRT0); -} - static int dwc2_set_mode(void *ctx, enum usb_dr_mode mode) { struct dwc2 *dwc2 = ctx; @@ -98,7 +85,8 @@ static void dwc2_remove(struct device_d *dev) { struct dwc2 *dwc2 = dev->priv; - dwc2_uninit_common(dwc2); + dwc2_host_uninit(dwc2); + dwc2_gadget_uninit(dwc2); } static const struct of_device_id dwc2_platform_dt_ids[] = { diff --git a/drivers/usb/dwc2/dwc2.h b/drivers/usb/dwc2/dwc2.h index 5e845f3491..30ad906656 100644 --- a/drivers/usb/dwc2/dwc2.h +++ b/drivers/usb/dwc2/dwc2.h @@ -34,13 +34,17 @@ int dwc2_submit_roothub(struct dwc2 *dwc2, struct usb_device *dev, unsigned long pipe, void *buf, int len, struct devrequest *setup); int dwc2_register_host(struct dwc2 *dwc2); +void dwc2_host_uninit(struct dwc2 *dwc2); #else static inline int dwc2_register_host(struct dwc2 *dwc2) { return -ENODEV; } +static inline void dwc2_host_uninit(struct dwc2 *dwc2) {}; #endif /* Gadget functions */ #ifdef CONFIG_USB_DWC2_GADGET int dwc2_gadget_init(struct dwc2 *dwc2); +void dwc2_gadget_uninit(struct dwc2 *dwc2); #else static inline int dwc2_gadget_init(struct dwc2 *dwc2) { return -ENODEV; } +static inline void dwc2_gadget_uninit(struct dwc2 *dwc2) {}; #endif diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c index 6a65b9b117..aa7447c9b4 100644 --- a/drivers/usb/dwc2/gadget.c +++ b/drivers/usb/dwc2/gadget.c @@ -2734,3 +2734,9 @@ int dwc2_gadget_init(struct dwc2 *dwc2) return 0; } + +void dwc2_gadget_uninit(struct dwc2 *dwc2) +{ + dwc2_core_disconnect(dwc2); + dwc2_gadget_disconnect(dwc2); +} diff --git a/drivers/usb/dwc2/host.c b/drivers/usb/dwc2/host.c index 13cb3472d7..510a07dfb9 100644 --- a/drivers/usb/dwc2/host.c +++ b/drivers/usb/dwc2/host.c @@ -788,3 +788,16 @@ int dwc2_register_host(struct dwc2 *dwc2) return usb_register_host(host); } + +void dwc2_host_uninit(struct dwc2 *dwc2) +{ + uint32_t hprt0; + + hprt0 = dwc2_readl(dwc2, HPRT0); + + /* Put everything in reset. */ + hprt0 &= ~(HPRT0_ENA | HPRT0_ENACHG | HPRT0_CONNDET | HPRT0_OVRCURRCHG); + hprt0 |= HPRT0_RST; + + dwc2_writel(dwc2, hprt0, HPRT0); +} diff --git a/drivers/usb/imx/imx-usb-misc.c b/drivers/usb/imx/imx-usb-misc.c index aa4485ccba..3a5ec236e5 100644 --- a/drivers/usb/imx/imx-usb-misc.c +++ b/drivers/usb/imx/imx-usb-misc.c @@ -673,10 +673,4 @@ static struct driver_d imx_usbmisc_driver = { .of_compatible = DRV_OF_COMPAT(imx_usbmisc_dt_ids), }; -static int imx_usbmisc_init(void) -{ - platform_driver_register(&imx_usbmisc_driver); - return 0; -} - -coredevice_initcall(imx_usbmisc_init); +coredevice_platform_driver(imx_usbmisc_driver); diff --git a/drivers/usb/imx/imx-usb-phy.c b/drivers/usb/imx/imx-usb-phy.c index e3f3bb3612..32098ef248 100644 --- a/drivers/usb/imx/imx-usb-phy.c +++ b/drivers/usb/imx/imx-usb-phy.c @@ -216,8 +216,4 @@ static struct driver_d imx_usbphy_driver = { .of_compatible = DRV_OF_COMPAT(imx_usbphy_dt_ids), }; -static int imx_usbphy_init(void) -{ - return platform_driver_register(&imx_usbphy_driver); -} -fs_initcall(imx_usbphy_init); +fs_platform_driver(imx_usbphy_driver); diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 9fdef8679b..266663a9b0 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c @@ -330,7 +330,6 @@ void musb_load_testpacket(struct musb *musb) static void musb_generic_disable(struct musb *musb) { void __iomem *mbase = musb->mregs; - u16 temp; /* disable interrupts */ musb_writeb(mbase, MUSB_INTRUSBE, 0); @@ -343,9 +342,9 @@ static void musb_generic_disable(struct musb *musb) musb_writeb(mbase, MUSB_DEVCTL, 0); /* flush pending interrupts */ - temp = musb_readb(mbase, MUSB_INTRUSB); - temp = musb_readw(mbase, MUSB_INTRTX); - temp = musb_readw(mbase, MUSB_INTRRX); + (void)musb_readb(mbase, MUSB_INTRUSB); + (void)musb_readw(mbase, MUSB_INTRTX); + (void)musb_readw(mbase, MUSB_INTRRX); } diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c index 68d819af2c..be9651b049 100644 --- a/drivers/usb/musb/musb_host.c +++ b/drivers/usb/musb/musb_host.c @@ -1189,8 +1189,8 @@ void musb_host_rx(struct musb *musb, u8 epnum) pipe = urb->pipe; - dev_dbg(musb->controller, "<== hw %d rxcsr %04x, urb actual %d (+dma %zu)\n", - epnum, rx_csr, urb->actual_length, 0); + dev_dbg(musb->controller, "<== hw %d rxcsr %04x, urb actual %d (+dma 0)\n", + epnum, rx_csr, urb->actual_length); /* check for errors, concurrent stall & unlink is not really * handled yet! */ diff --git a/drivers/usb/musb/phy-am335x.c b/drivers/usb/musb/phy-am335x.c index f2e870d7ee..b0b4bebbff 100644 --- a/drivers/usb/musb/phy-am335x.c +++ b/drivers/usb/musb/phy-am335x.c @@ -78,8 +78,4 @@ static struct driver_d am335x_phy_driver = { .of_compatible = DRV_OF_COMPAT(am335x_phy_dt_ids), }; -static int am335x_phy_init(void) -{ - return platform_driver_register(&am335x_phy_driver); -} -fs_initcall(am335x_phy_init); +fs_platform_driver(am335x_phy_driver); diff --git a/drivers/video/imx-ipu-v3/imx-hdmi.c b/drivers/video/imx-ipu-v3/imx-hdmi.c index 17b6e4cc25..1e55c97d24 100644 --- a/drivers/video/imx-ipu-v3/imx-hdmi.c +++ b/drivers/video/imx-ipu-v3/imx-hdmi.c @@ -1083,19 +1083,18 @@ static void dw_hdmi_enable_video_path(struct dw_hdmi *hdmi) /* Workaround to clear the overflow condition */ static void dw_hdmi_clear_overflow(struct dw_hdmi *hdmi) { - int count; + int count = 4; u8 val; /* TMDS software reset */ hdmi_writeb(hdmi, (u8)~HDMI_MC_SWRSTZ_TMDSSWRST_REQ, HDMI_MC_SWRSTZ); val = hdmi_readb(hdmi, HDMI_FC_INVIDCONF); - if (hdmi->dev_type == IMX6DL_HDMI) { - hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF); - return; - } - for (count = 0; count < 4; count++) + if (hdmi->dev_type == IMX6DL_HDMI) + count = 1; + + while (count--) hdmi_writeb(hdmi, val, HDMI_FC_INVIDCONF); } @@ -1193,28 +1192,13 @@ static void initialize_hdmi_ih_mutes(struct dw_hdmi *hdmi) hdmi_writeb(hdmi, ih_mute, HDMI_IH_MUTE); } -struct dw_hdmi_data { - unsigned ipu_mask; - enum dw_hdmi_devtype devtype; -}; - -static struct dw_hdmi_data imx6q_hdmi_data = { - .ipu_mask = 0xf, - .devtype = IMX6Q_HDMI, -}; - -static struct dw_hdmi_data imx6dl_hdmi_data = { - .ipu_mask = 0x3, - .devtype = IMX6DL_HDMI, -}; - static struct of_device_id dw_hdmi_dt_ids[] = { { .compatible = "fsl,imx6q-hdmi", - .data = &imx6q_hdmi_data, + .data = (void *)IMX6Q_HDMI, }, { .compatible = "fsl,imx6dl-hdmi", - .data = &imx6dl_hdmi_data, + .data = (void *)IMX6DL_HDMI, }, { /* sentinel */ } @@ -1276,11 +1260,6 @@ static int dw_hdmi_probe(struct device_d *dev) struct device_node *np = dev->device_node; struct dw_hdmi *hdmi; int ret; - const struct dw_hdmi_data *devtype; - - ret = dev_get_drvdata(dev, (const void **)&devtype); - if (ret) - return ret; hdmi = xzalloc(sizeof(*hdmi)); @@ -1289,9 +1268,7 @@ static int dw_hdmi_probe(struct device_d *dev) hdmi->sample_rate = 48000; hdmi->ratio = 100; - ret = dev_get_drvdata(dev, (const void **)&hdmi->dev_type); - if (ret) - return ret; + hdmi->dev_type = (enum dw_hdmi_devtype)device_get_match_data(dev); hdmi->ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0); diff --git a/drivers/video/imx-ipu-v3/ipufb.c b/drivers/video/imx-ipu-v3/ipufb.c index 683f298e76..dd54d9df31 100644 --- a/drivers/video/imx-ipu-v3/ipufb.c +++ b/drivers/video/imx-ipu-v3/ipufb.c @@ -356,8 +356,4 @@ static struct driver_d ipufb_driver = { .remove = ipufb_remove, }; -static int ipufb_register(void) -{ - return platform_driver_register(&ipufb_driver); -} -late_initcall(ipufb_register); +late_platform_driver(ipufb_driver); diff --git a/drivers/video/omap.c b/drivers/video/omap.c index 67b31522ae..009626fefc 100644 --- a/drivers/video/omap.c +++ b/drivers/video/omap.c @@ -514,9 +514,4 @@ static struct driver_d omapfb_driver = { .probe = omapfb_probe, }; -static int omapfb_init(void) -{ - return platform_driver_register(&omapfb_driver); -} - -device_initcall(omapfb_init); +device_platform_driver(omapfb_driver); diff --git a/drivers/video/ssd1307fb.c b/drivers/video/ssd1307fb.c index 0709399358..994f43dc5c 100644 --- a/drivers/video/ssd1307fb.c +++ b/drivers/video/ssd1307fb.c @@ -421,7 +421,7 @@ static int ssd1307fb_probe(struct device_d *dev) goto fb_alloc_error; } - par->vbat = regulator_get(&client->dev, "vbat-supply"); + par->vbat = regulator_get(&client->dev, "vbat"); if (IS_ERR(par->vbat)) { dev_info(&client->dev, "Will not use VBAT"); par->vbat = NULL; diff --git a/drivers/watchdog/ar9344_wdt.c b/drivers/watchdog/ar9344_wdt.c index 4615288631..c7cd552dc7 100644 --- a/drivers/watchdog/ar9344_wdt.c +++ b/drivers/watchdog/ar9344_wdt.c @@ -34,8 +34,8 @@ struct ar9344_wd { struct watchdog wd; void __iomem *base; - struct clk *clk; struct device_d *dev; + unsigned int rate; }; static int ar9344_watchdog_set_timeout(struct watchdog *wd, unsigned timeout) @@ -45,7 +45,7 @@ static int ar9344_watchdog_set_timeout(struct watchdog *wd, unsigned timeout) if (timeout) { ctrl = AR9344_WD_CTRL_ACTION_FCR; - val = timeout * clk_get_rate(priv->clk); + val = timeout * priv->rate; } else { ctrl = AR9344_WD_CTRL_ACTION_NONE; val = U32_MAX; @@ -74,6 +74,7 @@ static int ar9344_wdt_probe(struct device_d *dev) { struct resource *iores; struct ar9344_wd *priv; + struct clk *clk; int ret; priv = xzalloc(sizeof(struct ar9344_wd)); @@ -93,16 +94,22 @@ static int ar9344_wdt_probe(struct device_d *dev) ar9344_watchdog_detect_reset_source(priv); - priv->clk = clk_get(dev, NULL); - if (IS_ERR(priv->clk)) { + clk = clk_get(dev, NULL); + if (IS_ERR(clk)) { dev_err(dev, "could not get clk\n"); - ret = PTR_ERR(priv->clk); + ret = PTR_ERR(clk); goto on_error; } - clk_enable(priv->clk); + clk_enable(clk); - priv->wd.timeout_max = U32_MAX / clk_get_rate(priv->clk); + priv->rate = clk_get_rate(clk); + if (priv->rate == 0) { + ret = -EINVAL; + goto on_error; + } + + priv->wd.timeout_max = U32_MAX / priv->rate; ret = watchdog_register(&priv->wd); if (ret) diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c index 3f554bf47b..fe6f2e0408 100644 --- a/drivers/watchdog/at91sam9_wdt.c +++ b/drivers/watchdog/at91sam9_wdt.c @@ -102,8 +102,4 @@ static struct driver_d at91sam9x_wdt_driver = { .probe = at91sam9x_wdt_probe, }; -static int __init at91sam9x_wdt_init(void) -{ - return platform_driver_register(&at91sam9x_wdt_driver); -} -device_initcall(at91sam9x_wdt_init); +device_platform_driver(at91sam9x_wdt_driver); diff --git a/drivers/watchdog/bcm2835_wdt.c b/drivers/watchdog/bcm2835_wdt.c index 781626fa0f..233eaa85c1 100644 --- a/drivers/watchdog/bcm2835_wdt.c +++ b/drivers/watchdog/bcm2835_wdt.c @@ -139,8 +139,4 @@ static struct driver_d bcm2835_wd_driver = { .probe = bcm2835_wd_probe, }; -static int __init bcm2835_wd_init(void) -{ - return platform_driver_register(&bcm2835_wd_driver); -} -device_initcall(bcm2835_wd_init); +device_platform_driver(bcm2835_wd_driver); diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c index cb0d17e361..17771c7126 100644 --- a/drivers/watchdog/dw_wdt.c +++ b/drivers/watchdog/dw_wdt.c @@ -41,10 +41,10 @@ struct dw_wdt { void __iomem *regs; - struct clk *clk; struct restart_handler restart; struct watchdog wdd; struct reset_control *rst; + unsigned int rate; }; #define to_dw_wdt(wdd) container_of(wdd, struct dw_wdt, wdd) @@ -55,7 +55,7 @@ static inline int dw_wdt_top_in_seconds(struct dw_wdt *dw_wdt, unsigned top) * There are 16 possible timeout values in 0..15 where the number of * cycles is 2 ^ (16 + i) and the watchdog counts down. */ - return (1U << (16 + top)) / clk_get_rate(dw_wdt->clk); + return (1U << (16 + top)) / dw_wdt->rate; } static int dw_wdt_start(struct watchdog *wdd) @@ -134,6 +134,7 @@ static int dw_wdt_drv_probe(struct device_d *dev) struct watchdog *wdd; struct dw_wdt *dw_wdt; struct resource *mem; + struct clk *clk; int ret; dw_wdt = xzalloc(sizeof(*dw_wdt)); @@ -143,11 +144,11 @@ static int dw_wdt_drv_probe(struct device_d *dev) if (IS_ERR(dw_wdt->regs)) return PTR_ERR(dw_wdt->regs); - dw_wdt->clk = clk_get(dev, NULL); - if (IS_ERR(dw_wdt->clk)) - return PTR_ERR(dw_wdt->clk); + clk = clk_get(dev, NULL); + if (IS_ERR(clk)) + return PTR_ERR(clk); - ret = clk_enable(dw_wdt->clk); + ret = clk_enable(clk); if (ret) return ret; @@ -160,6 +161,10 @@ static int dw_wdt_drv_probe(struct device_d *dev) wdd->hwdev = dev; wdd->set_timeout = dw_wdt_set_timeout; + dw_wdt->rate = clk_get_rate(clk); + if (dw_wdt->rate == 0) + return -EINVAL; + ret = watchdog_register(wdd); if (ret) goto out_disable_clk; @@ -179,7 +184,7 @@ static int dw_wdt_drv_probe(struct device_d *dev) return 0; out_disable_clk: - clk_disable(dw_wdt->clk); + clk_disable(clk); return ret; } diff --git a/drivers/watchdog/stm32_iwdg.c b/drivers/watchdog/stm32_iwdg.c index 9e38f1a669..4d7a263b7e 100644 --- a/drivers/watchdog/stm32_iwdg.c +++ b/drivers/watchdog/stm32_iwdg.c @@ -157,6 +157,8 @@ static int stm32_iwdg_probe(struct device_d *dev) return ret; wd->rate = clk_get_rate(clk); + if (wd->rate == 0) + return -EINVAL; if (data->has_pclk) { clk = clk_get(dev, "pclk"); diff --git a/dts/Bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/dts/Bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml index 17e4f20c8d..6834f5e8df 100644 --- a/dts/Bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml +++ b/dts/Bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml @@ -23,7 +23,7 @@ properties: compatible: items: - const: raspberrypi,bcm2835-firmware - - const: simple-bus + - const: simple-mfd mboxes: $ref: '/schemas/types.yaml#/definitions/phandle' @@ -57,7 +57,7 @@ required: examples: - | firmware { - compatible = "raspberrypi,bcm2835-firmware", "simple-bus"; + compatible = "raspberrypi,bcm2835-firmware", "simple-mfd"; mboxes = <&mailbox>; firmware_clocks: clocks { diff --git a/dts/Bindings/crypto/ti,sa2ul.yaml b/dts/Bindings/crypto/ti,sa2ul.yaml index 85ef69ffeb..1465c9ebaf 100644 --- a/dts/Bindings/crypto/ti,sa2ul.yaml +++ b/dts/Bindings/crypto/ti,sa2ul.yaml @@ -67,7 +67,7 @@ examples: main_crypto: crypto@4e00000 { compatible = "ti,j721-sa2ul"; - reg = <0x0 0x4e00000 0x0 0x1200>; + reg = <0x4e00000 0x1200>; power-domains = <&k3_pds 264 TI_SCI_PD_EXCLUSIVE>; dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>, <&main_udmap 0x4001>; diff --git a/dts/Bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml b/dts/Bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml index 52a939cade..7b9d468c3e 100644 --- a/dts/Bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml +++ b/dts/Bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml @@ -145,10 +145,10 @@ examples: display@fd4a0000 { compatible = "xlnx,zynqmp-dpsub-1.7"; - reg = <0x0 0xfd4a0000 0x0 0x1000>, - <0x0 0xfd4aa000 0x0 0x1000>, - <0x0 0xfd4ab000 0x0 0x1000>, - <0x0 0xfd4ac000 0x0 0x1000>; + reg = <0xfd4a0000 0x1000>, + <0xfd4aa000 0x1000>, + <0xfd4ab000 0x1000>, + <0xfd4ac000 0x1000>; reg-names = "dp", "blend", "av_buf", "aud"; interrupts = <0 119 4>; interrupt-parent = <&gic>; diff --git a/dts/Bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml b/dts/Bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml index 5de510f8c8..2a595b18ff 100644 --- a/dts/Bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml +++ b/dts/Bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml @@ -57,7 +57,7 @@ examples: dma: dma-controller@fd4c0000 { compatible = "xlnx,zynqmp-dpdma"; - reg = <0x0 0xfd4c0000 0x0 0x1000>; + reg = <0xfd4c0000 0x1000>; interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; interrupt-parent = <&gic>; clocks = <&dpdma_clk>; diff --git a/dts/Bindings/gpio/sgpio-aspeed.txt b/dts/Bindings/gpio/sgpio-aspeed.txt index d4d83916c0..be329ea479 100644 --- a/dts/Bindings/gpio/sgpio-aspeed.txt +++ b/dts/Bindings/gpio/sgpio-aspeed.txt @@ -20,8 +20,9 @@ Required properties: - gpio-controller : Marks the device node as a GPIO controller - interrupts : Interrupt specifier, see interrupt-controller/interrupts.txt - interrupt-controller : Mark the GPIO controller as an interrupt-controller -- ngpios : number of GPIO lines, see gpio.txt - (should be multiple of 8, up to 80 pins) +- ngpios : number of *hardware* GPIO lines, see gpio.txt. This will expose + 2 software GPIOs per hardware GPIO: one for hardware input, one for hardware + output. Up to 80 pins, must be a multiple of 8. - clocks : A phandle to the APB clock for SGPM clock division - bus-frequency : SGPM CLK frequency diff --git a/dts/Bindings/leds/cznic,turris-omnia-leds.yaml b/dts/Bindings/leds/cznic,turris-omnia-leds.yaml index 24ad144644..fe7fa25877 100644 --- a/dts/Bindings/leds/cznic,turris-omnia-leds.yaml +++ b/dts/Bindings/leds/cznic,turris-omnia-leds.yaml @@ -30,7 +30,7 @@ properties: const: 0 patternProperties: - "^multi-led[0-9a-f]$": + "^multi-led@[0-9a-b]$": type: object allOf: - $ref: leds-class-multicolor.yaml# diff --git a/dts/Bindings/media/i2c/imx274.txt b/dts/Bindings/media/i2c/imx274.txt deleted file mode 100644 index 0727079d24..0000000000 --- a/dts/Bindings/media/i2c/imx274.txt +++ /dev/null @@ -1,38 +0,0 @@ -* Sony 1/2.5-Inch 8.51Mp CMOS Digital Image Sensor - -The Sony imx274 is a 1/2.5-inch CMOS active pixel digital image sensor with -an active array size of 3864H x 2202V. It is programmable through I2C -interface. The I2C address is fixed to 0x1a as per sensor data sheet. -Image data is sent through MIPI CSI-2, which is configured as 4 lanes -at 1440 Mbps. - - -Required Properties: -- compatible: value should be "sony,imx274" for imx274 sensor -- reg: I2C bus address of the device - -Optional Properties: -- reset-gpios: Sensor reset GPIO -- clocks: Reference to the input clock. -- clock-names: Should be "inck". -- VANA-supply: Sensor 2.8v analog supply. -- VDIG-supply: Sensor 1.8v digital core supply. -- VDDL-supply: Sensor digital IO 1.2v supply. - -The imx274 device node should contain one 'port' child node with -an 'endpoint' subnode. For further reading on port node refer to -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Example: - sensor@1a { - compatible = "sony,imx274"; - reg = <0x1a>; - #address-cells = <1>; - #size-cells = <0>; - reset-gpios = <&gpio_sensor 0 0>; - port { - sensor_out: endpoint { - remote-endpoint = <&csiss_in>; - }; - }; - }; diff --git a/dts/Bindings/media/i2c/sony,imx274.yaml b/dts/Bindings/media/i2c/sony,imx274.yaml new file mode 100644 index 0000000000..f697e1a20b --- /dev/null +++ b/dts/Bindings/media/i2c/sony,imx274.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/sony,imx274.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony 1/2.5-Inch 8.51MP CMOS Digital Image Sensor + +maintainers: + - Leon Luo <leonl@leopardimaging.com> + +description: | + The Sony IMX274 is a 1/2.5-inch CMOS active pixel digital image sensor with an + active array size of 3864H x 2202V. It is programmable through I2C interface. + Image data is sent through MIPI CSI-2, which is configured as 4 lanes at 1440 + Mbps. + +properties: + compatible: + const: sony,imx274 + + reg: + const: 0x1a + + reset-gpios: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: inck + + vana-supply: + description: Sensor 2.8 V analog supply. + maxItems: 1 + + vdig-supply: + description: Sensor 1.8 V digital core supply. + maxItems: 1 + + vddl-supply: + description: Sensor digital IO 1.2 V supply. + maxItems: 1 + + port: + type: object + description: Output video port. See ../video-interfaces.txt. + +required: + - compatible + - reg + - port + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + imx274: camera-sensor@1a { + compatible = "sony,imx274"; + reg = <0x1a>; + reset-gpios = <&gpio_sensor 0 0>; + + port { + sensor_out: endpoint { + remote-endpoint = <&csiss_in>; + }; + }; + }; + }; + +... diff --git a/dts/Bindings/net/renesas,ravb.txt b/dts/Bindings/net/renesas,ravb.txt index 032b76f14f..9119f1caf3 100644 --- a/dts/Bindings/net/renesas,ravb.txt +++ b/dts/Bindings/net/renesas,ravb.txt @@ -21,6 +21,7 @@ Required properties: - "renesas,etheravb-r8a774a1" for the R8A774A1 SoC. - "renesas,etheravb-r8a774b1" for the R8A774B1 SoC. - "renesas,etheravb-r8a774c0" for the R8A774C0 SoC. + - "renesas,etheravb-r8a774e1" for the R8A774E1 SoC. - "renesas,etheravb-r8a7795" for the R8A7795 SoC. - "renesas,etheravb-r8a7796" for the R8A77960 SoC. - "renesas,etheravb-r8a77961" for the R8A77961 SoC. diff --git a/dts/src/arm/at91-sama5d2_icp.dts b/dts/src/arm/at91-sama5d2_icp.dts index 8d19925fc0..6783cf16ff 100644 --- a/dts/src/arm/at91-sama5d2_icp.dts +++ b/dts/src/arm/at91-sama5d2_icp.dts @@ -116,7 +116,6 @@ switch0: ksz8563@0 { compatible = "microchip,ksz8563"; reg = <0>; - phy-mode = "mii"; reset-gpios = <&pioA PIN_PD4 GPIO_ACTIVE_LOW>; spi-max-frequency = <500000>; @@ -140,6 +139,7 @@ reg = <2>; label = "cpu"; ethernet = <&macb0>; + phy-mode = "mii"; fixed-link { speed = <100>; full-duplex; diff --git a/dts/src/arm/bcm2835-rpi.dtsi b/dts/src/arm/bcm2835-rpi.dtsi index f7ae5a4530..d94357b21f 100644 --- a/dts/src/arm/bcm2835-rpi.dtsi +++ b/dts/src/arm/bcm2835-rpi.dtsi @@ -13,7 +13,7 @@ soc { firmware: firmware { - compatible = "raspberrypi,bcm2835-firmware", "simple-bus"; + compatible = "raspberrypi,bcm2835-firmware", "simple-mfd"; #address-cells = <1>; #size-cells = <1>; diff --git a/dts/src/riscv/kendryte/k210.dtsi b/dts/src/riscv/kendryte/k210.dtsi index c1df56ccb8..d2d0ff6456 100644 --- a/dts/src/riscv/kendryte/k210.dtsi +++ b/dts/src/riscv/kendryte/k210.dtsi @@ -95,10 +95,12 @@ #clock-cells = <1>; }; - clint0: interrupt-controller@2000000 { + clint0: clint@2000000 { + #interrupt-cells = <1>; compatible = "riscv,clint0"; reg = <0x2000000 0xC000>; - interrupts-extended = <&cpu0_intc 3>, <&cpu1_intc 3>; + interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7 + &cpu1_intc 3 &cpu1_intc 7>; clocks = <&sysctl K210_CLK_ACLK>; }; diff --git a/firmware/Kconfig b/firmware/Kconfig index 97b7b3c2ee..c2ff51b911 100644 --- a/firmware/Kconfig +++ b/firmware/Kconfig @@ -16,4 +16,9 @@ config FIRMWARE_IMX8MP_ATF config FIRMWARE_IMX8MQ_ATF bool +config FIRMWARE_CCBV2_OPTEE + bool + depends on MACH_WEBASTO_CCBV2 && PBL_OPTEE + default y + endmenu diff --git a/firmware/Makefile b/firmware/Makefile index 3d4b7fd935..0d1b445783 100644 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -17,6 +17,8 @@ firmware-$(CONFIG_DRIVER_NET_FSL_FMAN) += fsl_fman_ucode_ls1046_r1.0_106_4_18.bi firmware-$(CONFIG_ARCH_LAYERSCAPE_PPA) += ppa-ls1046a.bin +firmware-$(CONFIG_FIRMWARE_CCBV2_OPTEE) += ccbv2_optee.bin + # Create $(fwabs) from $(CONFIG_EXTRA_FIRMWARE_DIR) -- if it doesn't have a # leading /, it's relative to $(srctree). fwdir := $(subst $(quote),,$(CONFIG_EXTRA_FIRMWARE_DIR)) diff --git a/fs/squashfs/inode.c b/fs/squashfs/inode.c index 64155d47db..f702f6c0a2 100644 --- a/fs/squashfs/inode.c +++ b/fs/squashfs/inode.c @@ -108,7 +108,6 @@ int squashfs_read_inode(struct inode *inode, long long ino) int err, type, offset = SQUASHFS_INODE_OFFSET(ino); union squashfs_inode squashfs_ino; struct squashfs_base_inode *sqshb_ino = &squashfs_ino.base; - int xattr_id = SQUASHFS_INVALID_XATTR; TRACE("Entered squashfs_read_inode: %lld\n", ino); @@ -197,7 +196,6 @@ int squashfs_read_inode(struct inode *inode, long long ino) frag_offset = 0; } - xattr_id = le32_to_cpu(sqsh_ino->xattr); inode->i_size = le64_to_cpu(sqsh_ino->file_size); inode->i_op = &squashfs_inode_ops; inode->i_mode |= S_IFREG; @@ -249,7 +247,6 @@ int squashfs_read_inode(struct inode *inode, long long ino) if (err < 0) goto failed_read; - xattr_id = le32_to_cpu(sqsh_ino->xattr); inode->i_size = le32_to_cpu(sqsh_ino->file_size); inode->i_op = &squashfs_dir_inode_ops; inode->i_fop = &squashfs_dir_ops; @@ -294,7 +291,6 @@ int squashfs_read_inode(struct inode *inode, long long ino) &offset, sizeof(xattr)); if (err < 0) goto failed_read; - xattr_id = le32_to_cpu(xattr); } TRACE("Symbolic link inode %x:%x, start_block %llx, offset " @@ -338,7 +334,6 @@ int squashfs_read_inode(struct inode *inode, long long ino) inode->i_mode |= S_IFCHR; else inode->i_mode |= S_IFBLK; - xattr_id = le32_to_cpu(sqsh_ino->xattr); rdev = le32_to_cpu(sqsh_ino->rdev); TRACE("Device inode %x:%x, rdev %x\n", @@ -375,7 +370,6 @@ int squashfs_read_inode(struct inode *inode, long long ino) inode->i_mode |= S_IFIFO; else inode->i_mode |= S_IFSOCK; - xattr_id = le32_to_cpu(sqsh_ino->xattr); break; } default: diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c index 6434cc61c5..b373e31be6 100644 --- a/fs/ubifs/ubifs.c +++ b/fs/ubifs/ubifs.c @@ -516,8 +516,7 @@ static int ubifs_init(void) coredevice_initcall(ubifs_init); -BAREBOX_MAGICVAR_NAMED(global_ubifs_allow_encrypted, global.ubifs.allow_encrypted, - "If true, allow to mount UBIFS with encrypted files"); -BAREBOX_MAGICVAR_NAMED(global_ubifs_allow_authenticated_unauthenticated, - global.ubifs.allow_authenticated_unauthenticated, - "If true, allow to mount authenticated UBIFS images without doing authentication"); +BAREBOX_MAGICVAR(global.ubifs.allow_encrypted, + "If true, allow to mount UBIFS with encrypted files"); +BAREBOX_MAGICVAR(global.ubifs.allow_authenticated_unauthenticated, + "If true, allow to mount authenticated UBIFS images without doing authentication"); diff --git a/images/Makefile.imx b/images/Makefile.imx index 3434a10e7c..514db326bb 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -346,6 +346,8 @@ $(call build_imx_habv4img, CONFIG_MACH_GRINN_LITEBOARD, start_imx6ul_liteboard_5 $(call build_imx_habv4img, CONFIG_MACH_NXP_IMX6ULL_EVK, start_nxp_imx6ull_evk, nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk, nxp-imx6ull-evk) +$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ul_som_emmc_512mb, phytec-som-imx6/flash-header-phytec-pcl063ul-512mb, phytec-phycore-imx6ul-emmc-512mb) + $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ul_som_nand_512mb, phytec-som-imx6/flash-header-phytec-pcl063ul-512mb, phytec-phycore-imx6ul-nand-512mb) $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6ull_som_lc_nand_256mb, phytec-som-imx6/flash-header-phytec-pcl063ull-256mb, phytec-phycore-imx6ull-lc-nand-256mb) @@ -362,6 +364,8 @@ $(call build_imx_habv4img, CONFIG_MACH_TECHNEXION_PICO_HOBBIT, start_imx6ul_pico $(call build_imx_habv4img, CONFIG_MACH_DIGI_CCIMX6ULSBCPRO, start_imx6ul_ccimx6ulsbcpro, digi-ccimx6ulsom/flash-header-imx6ul-ccimx6ulsbcpro, imx6ul-ccimx6ulsbcpro) +$(call build_imx_habv4img, CONFIG_MACH_WEBASTO_CCBV2, start_imx6ul_ccbv2, webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2, imx6ul-webasto-ccbv2) + # ----------------------- vf6xx based boards --------------------------- pblb-$(CONFIG_MACH_VF610_TWR) += start_vf610_twr CFG_start_vf610_twr.pblb.imximg = $(board)/freescale-vf610-twr/flash-header-vf610-twr.imxcfg diff --git a/images/Makefile.stm32mp b/images/Makefile.stm32mp index 1330a7ef3d..eafe84a721 100644 --- a/images/Makefile.stm32mp +++ b/images/Makefile.stm32mp @@ -13,10 +13,10 @@ STM32MP1_OPTS = -a 0xc0100000 -e 0xc0100000 -v1 # -------------------------------------- -pblb-$(CONFIG_MACH_STM32MP157C_DK2) += start_stm32mp157c_dk2 -FILE_barebox-stm32mp157c-dk2.img = start_stm32mp157c_dk2.pblb.stm32 -OPTS_start_stm32mp157c_dk2.pblb.stm32 = $(STM32MP1_OPTS) -image-$(CONFIG_MACH_STM32MP157C_DK2) += barebox-stm32mp157c-dk2.img +pblb-$(CONFIG_MACH_STM32MP15XX_DKX) += start_stm32mp15xx_dkx +FILE_barebox-stm32mp15xx-dkx.img = start_stm32mp15xx_dkx.pblb.stm32 +OPTS_start_stm32mp15xx_dkx.pblb.stm32 = $(STM32MP1_OPTS) +image-$(CONFIG_MACH_STM32MP15XX_DKX) += barebox-stm32mp15xx-dkx.img pblb-$(CONFIG_MACH_LXA_MC1) += start_stm32mp157c_lxa_mc1 FILE_barebox-stm32mp157c-lxa-mc1.img = start_stm32mp157c_lxa_mc1.pblb.stm32 diff --git a/include/aiodev.h b/include/aiodev.h index 65d817f296..d557715671 100644 --- a/include/aiodev.h +++ b/include/aiodev.h @@ -31,7 +31,8 @@ struct aiodevice { int aiodevice_register(struct aiodevice *aiodev); struct aiochannel *aiochannel_get(struct device_d *dev, int index); -struct aiochannel *aiochannel_get_by_name(const char *name); +/* Find aiochannel by channel name, e.g. "aiodev0.in_value0_mV" */ +struct aiochannel *aiochannel_by_name(const char *name); int aiochannel_get_value(struct aiochannel *aiochan, int *value); int aiochannel_get_index(struct aiochannel *aiochan); diff --git a/include/asm-generic/bitio.h b/include/asm-generic/bitio.h index e88dbd7b85..99b85da59c 100644 --- a/include/asm-generic/bitio.h +++ b/include/asm-generic/bitio.h @@ -3,7 +3,7 @@ #ifndef __ASM_GENERIC_BITIO_H #define __ASM_GENERIC_BITIO_H -#include <asm-generic/io.h> +#include <asm/io.h> /* * Clear and set bits in one shot. These macros can be used to clear and diff --git a/include/common.h b/include/common.h index ceb0b358bd..693f5bf970 100644 --- a/include/common.h +++ b/include/common.h @@ -124,6 +124,7 @@ int memcpy_parse_options(int argc, char *argv[], int *sourcefd, extern const char version_string[]; extern const char release_string[]; +extern const char buildsystem_version_string[]; #ifdef CONFIG_BANNER void barebox_banner(void); #else diff --git a/include/driver.h b/include/driver.h index 154525e0fd..e2886d051d 100644 --- a/include/driver.h +++ b/include/driver.h @@ -401,6 +401,8 @@ int platform_driver_register(struct driver_d *drv); } \ level##_initcall(drv##_register) +#define core_platform_driver(drv) \ + register_driver_macro(core,platform,drv) #define postcore_platform_driver(drv) \ register_driver_macro(postcore,platform,drv) #define coredevice_platform_driver(drv) \ @@ -409,6 +411,10 @@ int platform_driver_register(struct driver_d *drv); register_driver_macro(device,platform,drv) #define console_platform_driver(drv) \ register_driver_macro(console,platform,drv) +#define mem_platform_driver(drv) \ + register_driver_macro(mem,platform,drv) +#define fs_platform_driver(drv) \ + register_driver_macro(fs,platform,drv) #define late_platform_driver(drv) \ register_driver_macro(late,platform,drv) @@ -534,8 +540,26 @@ int devfs_create_partitions(const char *devname, #define DRV_OF_COMPAT(compat) \ IS_ENABLED(CONFIG_OFDEVICE) ? (compat) : NULL +/** + * dev_get_drvdata - get driver match data associated with device + * @dev: device instance + * @data: pointer to void *, where match data is stored + * + * Returns 0 on success and error code otherwise. + * + * DEPRECATED: use device_get_match_data instead, which avoids + * common pitfalls due to explicit pointer casts + */ int dev_get_drvdata(struct device_d *dev, const void **data); +/** + * device_get_match_data - get driver match data associated with device + * @dev: device instance + * + * Returns match data on success and NULL otherwise + */ +const void *device_get_match_data(struct device_d *dev); + int device_match_of_modalias(struct device_d *dev, struct driver_d *drv); #endif /* DRIVER_H */ diff --git a/include/image-metadata.h b/include/image-metadata.h index 42ddf2fab0..a9cb9cfe8f 100644 --- a/include/image-metadata.h +++ b/include/image-metadata.h @@ -26,6 +26,7 @@ #define IMD_TYPE_MODEL 0x640c8004 /* The board name this image is for */ #define IMD_TYPE_OF_COMPATIBLE 0x640c8005 /* the device tree compatible string */ #define IMD_TYPE_PARAMETER 0x640c8006 /* A generic parameter. Use key=value as data */ +#define IMD_TYPE_BUILDSYSTEM 0x640c8007 /* The buildsystem version barebox was built with */ #define IMD_TYPE_CRC32 0x640c1007 /* the checksum of the barebox images */ #define IMD_TYPE_END 0x640c7fff #define IMD_TYPE_INVALID 0xffffffff diff --git a/include/linux/phy.h b/include/linux/phy.h index cdcb7c24f2..a4cda3e28d 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -284,6 +284,26 @@ struct phy_device *get_phy_device(struct mii_bus *bus, int addr); int phy_init(void); int phy_init_hw(struct phy_device *phydev); +#define phy_register_drivers_macro(level, drvs) \ + static int __init drvs##_register(void) \ + { \ + return phy_drivers_register(drvs, ARRAY_SIZE(drvs)); \ + } \ + level##_initcall(drvs##_register) + +#define device_phy_drivers(drvs) \ + phy_register_drivers_macro(device, drvs) + +#define phy_register_driver_macro(level, drv) \ + static int __init drv##_register(void) \ + { \ + return phy_driver_register(&drv); \ + } \ + level##_initcall(drv##_register) + +#define device_phy_driver(drv) \ + phy_register_driver_macro(device, drv) + int phy_save_page(struct phy_device *phydev); int phy_select_page(struct phy_device *phydev, int page); int phy_restore_page(struct phy_device *phydev, int oldpage, int ret); diff --git a/include/linux/string.h b/include/linux/string.h index 2b699957e8..85c3eb1de3 100644 --- a/include/linux/string.h +++ b/include/linux/string.h @@ -10,7 +10,6 @@ extern "C" { extern char * strpbrk(const char *,const char *); extern char * strsep(char **,const char *); -extern char * strsep_unescaped(char **,const char *); extern __kernel_size_t strspn(const char *,const char *); diff --git a/include/magicvar.h b/include/magicvar.h index 9fb89a84cc..31292611bb 100644 --- a/include/magicvar.h +++ b/include/magicvar.h @@ -19,18 +19,16 @@ extern struct magicvar __barebox_magicvar_end; #endif #ifdef CONFIG_CMD_MAGICVAR -#define BAREBOX_MAGICVAR_NAMED(_name, _varname, _description) \ -extern const struct magicvar __barebox_magicvar_##_name; \ -const struct magicvar __barebox_magicvar_##_name \ - __attribute__ ((unused,section (".barebox_magicvar_" __stringify(_name)))) = { \ +#define __BAREBOX_MAGICVAR_NAMED(_name, _varname, _description) \ +static const struct magicvar _name \ + __attribute__ ((used,section (".barebox_magicvar_" __stringify(_name)))) = { \ .name = #_varname, \ .description = MAGICVAR_DESCRIPTION(_description), \ }; #define BAREBOX_MAGICVAR(_name, _description) \ - BAREBOX_MAGICVAR_NAMED(_name, _name, _description) + __BAREBOX_MAGICVAR_NAMED(__UNIQUE_ID(magicvar), _name, _description) #else -#define BAREBOX_MAGICVAR_NAMED(_name, _varname, _description) #define BAREBOX_MAGICVAR(_name, _description) #endif diff --git a/include/of.h b/include/of.h index d548e51789..e60cb5307d 100644 --- a/include/of.h +++ b/include/of.h @@ -231,6 +231,8 @@ extern int of_property_write_u64_array(struct device_node *np, size_t sz); extern int of_property_write_string(struct device_node *np, const char *propname, const char *value); +extern int of_property_write_strings(struct device_node *np, const char *propname, + ...) __attribute__((__sentinel__)); extern struct device_node *of_parse_phandle(const struct device_node *np, const char *phandle_name, diff --git a/include/regulator.h b/include/regulator.h index a9cb6dedca..7c2a01b687 100644 --- a/include/regulator.h +++ b/include/regulator.h @@ -2,6 +2,8 @@ #ifndef __REGULATOR_H #define __REGULATOR_H +struct device_d; + /* struct regulator is an opaque object for consumers */ struct regulator; @@ -77,6 +79,8 @@ struct regulator_dev { const struct regulator_desc *desc; struct regmap *regmap; int boot_on; + /* the device this regulator device belongs to */ + struct device_d *dev; }; struct regulator_ops { diff --git a/include/string.h b/include/string.h index 727bc51934..b51566fd00 100644 --- a/include/string.h +++ b/include/string.h @@ -5,6 +5,8 @@ #include <linux/string.h> int strtobool(const char *str, int *val); +char *strsep_unescaped(char **, const char *); +char *stpcpy(char *dest, const char *src); void *__default_memset(void *, int, __kernel_size_t); void *__nokasan_default_memset(void *, int, __kernel_size_t); diff --git a/lib/Kconfig b/lib/Kconfig index 90552f3c27..887f50ff00 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -111,7 +111,7 @@ config LIBFDT config RATP select CRC_ITU_T - select COMPILE_MEMORY + select DEV_MEM select COMMAND_SUPPORT select POLLER depends on CONSOLE_FULL diff --git a/lib/logo/Makefile b/lib/logo/Makefile index bf700da89b..4149d4ff6c 100644 --- a/lib/logo/Makefile +++ b/lib/logo/Makefile @@ -21,7 +21,7 @@ extra-y += $(patsubst %,%.bblogo.o,$(bblogo-y)) obj-$(CONFIG_BAREBOX_LOGO) += logo.o -quiet_cmd_logo_S = LOGO.S $@ +quiet_cmd_logo_S = LOGO.S $@ cmd_logo_S = \ ( \ echo '\#include <asm-generic/barebox.lds.h>'; \ @@ -38,17 +38,15 @@ cmd_logo_S = \ %.bblogo.S: %.bblogo FORCE $(call if_changed,logo_S) -# Inkscape 0.92.4 supports -z but Inkscape 1.0 doesn't -INKSCAPEOPTS += $(call try-run, inkscape -z,-z,) -# Inkscape 0.92.4 uses -e but Inkscape 1.0 uses --export-type=png -INKSCAPEOPTS += $(call try-run, inkscape -e -,-e -,--export-type=png) +# Inkscape 0.92.4 supports -z -e but Inkscape 1.0 uses --export-type=png +INKSCAPEOPTS += $(call try-run, inkscape -z -e -,-z -e -,--export-type=png) # Inkscape 1.0 supports -o - INKSCAPEOPTS += $(call try-run, inkscape -o -,-o -,) -quiet_cmd_logo = LOGO.S $@ +quiet_cmd_logo = LOGO.S $@ cmd_logo = \ ( \ - DISPLAY="" inkscape $(OPTS_$(@F)) $(INKSCAPEOPTS) $< > $@; \ + inkscape $(OPTS_$(@F)) $(INKSCAPEOPTS) $< > $@; \ ) %.bblogo: $(srctree)/Documentation/barebox.svg FORCE diff --git a/lib/string.c b/lib/string.c index 003070fa53..d250e58643 100644 --- a/lib/string.c +++ b/lib/string.c @@ -100,6 +100,19 @@ char * strcpy(char * dest,const char *src) #endif EXPORT_SYMBOL(strcpy); +/** + * stpcpy - Copy a %NUL terminated string, but return pointer to %NUL + * @dest: Where to copy the string to + * @src: Where to copy the string from + */ +char *stpcpy(char *dest, const char *src) +{ + while ((*dest++ = *src++) != '\0') + /* nothing */; + return dest - 1; +} +EXPORT_SYMBOL(stpcpy); + #ifndef __HAVE_ARCH_STRNCPY /** * strncpy - Copy a length-limited, %NUL-terminated string diff --git a/net/dhcp.c b/net/dhcp.c index a27fa89996..e701a5f717 100644 --- a/net/dhcp.c +++ b/net/dhcp.c @@ -647,13 +647,13 @@ static int dhcp_global_init(void) late_initcall(dhcp_global_init); #endif -BAREBOX_MAGICVAR_NAMED(global_dhcp_bootfile, global.dhcp.bootfile, "bootfile returned from DHCP request"); -BAREBOX_MAGICVAR_NAMED(global_dhcp_rootpath, global.dhcp.rootpath, "rootpath returned from DHCP request"); -BAREBOX_MAGICVAR_NAMED(global_dhcp_vendor_id, global.dhcp.vendor_id, "vendor id to send to the DHCP server"); -BAREBOX_MAGICVAR_NAMED(global_dhcp_client_uuid, global.dhcp.client_uuid, "client uuid to send to the DHCP server"); -BAREBOX_MAGICVAR_NAMED(global_dhcp_client_id, global.dhcp.client_id, "client id to send to the DHCP server"); -BAREBOX_MAGICVAR_NAMED(global_dhcp_user_class, global.dhcp.user_class, "user class to send to the DHCP server"); -BAREBOX_MAGICVAR_NAMED(global_dhcp_tftp_server_name, global.dhcp.tftp_server_name, "TFTP server Name returned from DHCP request"); -BAREBOX_MAGICVAR_NAMED(global_dhcp_oftree_file, global.dhcp.oftree_file, "OF tree returned from DHCP request (option 224)"); -BAREBOX_MAGICVAR_NAMED(global_dhcp_retries, global.dhcp.retries, "retry limit"); -BAREBOX_MAGICVAR_NAMED(global_dhcp_option224, global.dhcp.option224, "private data to send to the DHCP server (option 224)"); +BAREBOX_MAGICVAR(global.dhcp.bootfile, "bootfile returned from DHCP request"); +BAREBOX_MAGICVAR(global.dhcp.rootpath, "rootpath returned from DHCP request"); +BAREBOX_MAGICVAR(global.dhcp.vendor_id, "vendor id to send to the DHCP server"); +BAREBOX_MAGICVAR(global.dhcp.client_uuid, "client uuid to send to the DHCP server"); +BAREBOX_MAGICVAR(global.dhcp.client_id, "client id to send to the DHCP server"); +BAREBOX_MAGICVAR(global.dhcp.user_class, "user class to send to the DHCP server"); +BAREBOX_MAGICVAR(global.dhcp.tftp_server_name, "TFTP server Name returned from DHCP request"); +BAREBOX_MAGICVAR(global.dhcp.oftree_file, "OF tree returned from DHCP request (option 224)"); +BAREBOX_MAGICVAR(global.dhcp.retries, "retry limit"); +BAREBOX_MAGICVAR(global.dhcp.option224, "private data to send to the DHCP server (option 224)"); diff --git a/net/fastboot.c b/net/fastboot.c index a664fc8163..9082aa48f6 100644 --- a/net/fastboot.c +++ b/net/fastboot.c @@ -578,6 +578,5 @@ static void fastboot_net_exit(void) postenvironment_initcall(fastboot_on_boot); predevshutdown_exitcall(fastboot_net_exit); -BAREBOX_MAGICVAR_NAMED(global_fastboot_net_autostart, - global.fastboot.net.autostart, - "If true, automatically start fastboot over UDP during startup"); +BAREBOX_MAGICVAR(global.fastboot.net.autostart, + "If true, automatically start fastboot over UDP during startup"); diff --git a/net/ifup.c b/net/ifup.c index 6b56c3a49b..4b69777c16 100644 --- a/net/ifup.c +++ b/net/ifup.c @@ -318,9 +318,8 @@ static int ifup_all_init(void) } late_initcall(ifup_all_init); -BAREBOX_MAGICVAR_NAMED(global_net_ifup_force_detect, - global.net.ifup_force_detect, - "net: force detection of devices on ifup -a"); +BAREBOX_MAGICVAR(global.net.ifup_force_detect, + "net: force detection of devices on ifup -a"); #if IS_ENABLED(CONFIG_NET_CMD_IFUP) @@ -753,6 +753,6 @@ static int net_init(void) postcore_initcall(net_init); -BAREBOX_MAGICVAR_NAMED(global_net_nameserver, global.net.nameserver, "The DNS server used for resolving host names"); -BAREBOX_MAGICVAR_NAMED(global_net_domainname, global.net.domainname, "Domain name used for DNS requests"); -BAREBOX_MAGICVAR_NAMED(global_net_server, global.net.server, "Standard server used for NFS/TFTP"); +BAREBOX_MAGICVAR(global.net.nameserver, "The DNS server used for resolving host names"); +BAREBOX_MAGICVAR(global.net.domainname, "Domain name used for DNS requests"); +BAREBOX_MAGICVAR(global.net.server, "Standard server used for NFS/TFTP"); diff --git a/scripts/dtc/Makefile b/scripts/dtc/Makefile index 06a265cf7b..721e8e2b8c 100644 --- a/scripts/dtc/Makefile +++ b/scripts/dtc/Makefile @@ -14,7 +14,7 @@ libfdt-objs := $(libfdt-objs:%.o=libfdt/%.o) fdtget-objs += fdtget.o $(libfdt-objs) util.o # Source files need to get at the userspace version of libfdt_env.h to compile -HOST_EXTRACFLAGS := -I$(src)/libfdt +HOST_EXTRACFLAGS += -I$(src)/libfdt ifeq ($(wildcard /usr/include/yaml.h),) ifneq ($(CHECK_DTBS),) diff --git a/scripts/kwbimage.c b/scripts/kwbimage.c index 26eb07fa81..75c9e9cda9 100644 --- a/scripts/kwbimage.c +++ b/scripts/kwbimage.c @@ -186,7 +186,7 @@ struct image_cfg_element { } type; union { unsigned int version; - unsigned int bootfrom; + int bootfrom; struct { char *file; unsigned int args[BINARY_MAX_ARGS]; @@ -197,7 +197,7 @@ struct image_cfg_element { unsigned int execaddr; unsigned int nandblksz; unsigned int nandbadblklocation; - unsigned int nandeccmode; + int nandeccmode; unsigned int nandpagesz; struct ext_hdr_v0_reg regdata; }; diff --git a/scripts/kwboot.c b/scripts/kwboot.c index 43b8b8cbcd..60e8a69d18 100644 --- a/scripts/kwboot.c +++ b/scripts/kwboot.c @@ -504,7 +504,7 @@ kwboot_term_pipe(int in, int out, char *quit, int *s) ssize_t nin, nout; char _buf[128], *buf = _buf; - nin = read(in, buf, sizeof(buf)); + nin = read(in, _buf, sizeof(_buf)); if (nin < 0) return -1; diff --git a/scripts/mkcompile_h b/scripts/mkcompile_h index 60b20cafc6..49aadc153d 100755 --- a/scripts/mkcompile_h +++ b/scripts/mkcompile_h @@ -54,6 +54,7 @@ fi UTS_VERSION="#$VERSION" CONFIG_FLAGS="" UTS_VERSION="$UTS_VERSION $CONFIG_FLAGS $TIMESTAMP" +BUILDSYSTEM_VERSION="$BUILDSYSTEM_VERSION" # Truncate to maximum length @@ -69,6 +70,8 @@ UTS_TRUNCATE="cut -b -$UTS_LEN" echo \#define UTS_VERSION \"`echo $UTS_VERSION | $UTS_TRUNCATE`\" + echo \#define BUILDSYSTEM_VERSION \"`echo $BUILDSYSTEM_VERSION`\" + echo \#define BAREBOX_COMPILE_BY \"`echo $BAREBOX_COMPILE_BY | $UTS_TRUNCATE`\" echo \#define BAREBOX_COMPILE_HOST \"`echo $BAREBOX_COMPILE_HOST | $UTS_TRUNCATE`\" |