diff options
1954 files changed, 56149 insertions, 16323 deletions
diff --git a/Documentation/boards/aarch64-qemu-virt.rst b/Documentation/boards/aarch64-qemu-virt.rst index e21791af16..5f6cd882d5 100644 --- a/Documentation/boards/aarch64-qemu-virt.rst +++ b/Documentation/boards/aarch64-qemu-virt.rst @@ -1,8 +1,8 @@ -Aarch64 -======= - Aarch64 Qemu virt ------------------ +================= + +Besides a number of physical ARM64 targets, barebox also supports a +``qemu-virt64`` board. Running barebox on QEMU aarch64 virt machine ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/Documentation/boards/at91.rst b/Documentation/boards/at91.rst index f25cb01bb1..e45feee947 100644 --- a/Documentation/boards/at91.rst +++ b/Documentation/boards/at91.rst @@ -21,7 +21,24 @@ processor and then load and execute barebox. AT91 boards ----------- -The majority of the supported boards have a short entry here. +Newer boards can be built with the ``at91_multi_defconfig``: + +.. code-block:: sh + + make ARCH=arm at91_multi_defconfig + +The resulting images will be placed under ``images/``: + +:: + + barebox-groboards-sama5d27-giantboard.img + barebox-groboards-sama5d27-giantboard-xload-mmc.img + barebox-microchip-ksz9477-evb.img + barebox-sama5d27-som1-ek.img + barebox-sama5d27-som1-ek-xload-mmc.img + +Older supported boards have yet to be migrated to multi-image and/or the +new defconfig. The majority of these have a short entry here. For each board defconfig file(s) are noted but barebox may include additional defconfig files and may also include boards not included in the following. @@ -35,17 +52,9 @@ TODO ---- This is a list of AT91 specific TODO items, listed in no particular order. -* fix prototype for barebox_arm_reset_vector. Introduce the prototype: - -.. code-block:: c - - void __naked __bare_init barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) - - -This will unify the prototype for the reset vector for multi image and standalone images - * Update remaining boards to DT * Update remaing boards to support multi image boot +* Include remaining boards in ``at91_multi_defconfig`` * Get bootstrap working in combination with multi image * Introduce defaultenv2 for all boards * Add pwm driver (required to support backlight) diff --git a/Documentation/boards/at91/microchip-ksz9477-evb.rst b/Documentation/boards/at91/microchip-ksz9477-evb.rst deleted file mode 100644 index 4c4c4aecbf..0000000000 --- a/Documentation/boards/at91/microchip-ksz9477-evb.rst +++ /dev/null @@ -1,11 +0,0 @@ -Microchip KSZ 9477 Evaluation board -=================================== - -This is an evaluation board for a switch that uses the at91sam9x5 CPU. -The board uses Device Tree and supports multi image. - -Building barebox: - -.. code-block:: sh - - make ARCH=arm microchip_ksz9477_evb_defconfig diff --git a/Documentation/boards/stm32mp.rst b/Documentation/boards/stm32mp.rst index b235c39927..87fff7d125 100644 --- a/Documentation/boards/stm32mp.rst +++ b/Documentation/boards/stm32mp.rst @@ -5,7 +5,7 @@ The STM32MP is a line of 32-bit ARM SoCs. They reuse peripherals of the STM32 line of microcontrollers and can have a STM32 MCU embedded as co-processor as well. -The boot process of the STM32MP SoC is a two step process. +The boot process of the STM32MP1 SoC is a two step process. The first stage boot loader (FSBL) is loaded by the ROM code into the built-in SYSRAM and executed. The FSBL sets up the SDRAM, install a secure monitor and then the second stage boot loader (SSBL) is loaded into DRAM. @@ -29,7 +29,7 @@ The resulting images will be placed under ``images/``: :: - barebox-stm32mp157c-dk2.img + barebox-stm32mp15xx-dkx.img # both DK1 and DK2 barebox-stm32mp157c-lxa-mc1.img barebox-stm32mp157c-seeed-odyssey.img diff --git a/Documentation/boards/x86.rst b/Documentation/boards/x86.rst index 4514a766a2..c0d5a64b9d 100644 --- a/Documentation/boards/x86.rst +++ b/Documentation/boards/x86.rst @@ -1,6 +1,11 @@ x86 === +.. note:: + This is about legacy x86 PC boot, which is not as well supported as booting + under UEFI. Refer to :doc:`boards/efi.rst` for documentation on the barebox + EFI support. + Features -------- diff --git a/Documentation/filesystems/smhfs.rst b/Documentation/filesystems/smhfs.rst index 8f8a0ec6b7..f70ca6015f 100644 --- a/Documentation/filesystems/smhfs.rst +++ b/Documentation/filesystems/smhfs.rst @@ -8,12 +8,12 @@ File I/O over ARM semihosting support Target Side Setup ----------------- -barebox can communicate with debug programms attached via SWD/JTAG by +barebox can communicate with debug programs attached via SWD/JTAG by means of ARM semihosting protocol. -Not all of the I/O primitives neccessary to implement a full +Not all of the I/O primitives necessary to implement a full filesystem are exposed in ARM semihosting API and because of that some -aspects of filesystem funcionality are missing. Implementation does +aspects of filesystem functionality are missing. Implementation does not have support for listing directories. This means a :ref:`command_ls` to a SMHFS-mounted path will show an empty directory. Nevertheless, the files are there. @@ -29,7 +29,7 @@ Host Side Setup --------------- FIXME: Currently OpenOCD does not work correctly if Barebox is built -with MMU enabled, so before using this featrue, please make sure that +with MMU enabled, so before using this feature, please make sure that MMU is disabled in your particular configuration To make semihosting work host machine connected to the target via diff --git a/Documentation/glossary.rst b/Documentation/glossary.rst index 106dce98a9..88d356fbab 100644 --- a/Documentation/glossary.rst +++ b/Documentation/glossary.rst @@ -5,17 +5,17 @@ Glossary .. glossary:: :sorted: - FDT - Flattened Device Tree + DTS + Device Tree Source DTB - Device Tree Blob (or Binary) + Device Tree Blob (or Binary). The result of compiling a DTS. - DTS - Device Tree Source + FDT + Flattened Device Tree. A DTB loaded into memory. PBL - Pre BootLoader image + Pre BootLoader image. The board-specific entry point attached in front of multi-image barebox binaries. ESP EFI System Partition diff --git a/Documentation/user/defaultenv-2.rst b/Documentation/user/defaultenv-2.rst index a79ae83d56..da766e4edc 100644 --- a/Documentation/user/defaultenv-2.rst +++ b/Documentation/user/defaultenv-2.rst @@ -19,10 +19,11 @@ All new boards should use defaultenv-2 exclusively. The default environment is composed from different directories during compilation:: - defaultenv/defaultenv-2-base -> base files - defaultenv/defaultenv-2-dfu -> overlay for DFU - defaultenv/defaultenv-2-menu -> overlay for menus - arch/$ARCH/boards/<board>/env -> board specific overlay + defaultenv/defaultenv-2-base -> base files + defaultenv/defaultenv-2-dfu -> overlay for DFU + defaultenv/defaultenv-2-reboot-mode -> overlay for reboot modes + defaultenv/defaultenv-2-menu -> overlay for menus + arch/$ARCH/boards/<board>/env -> board specific overlay The content of the above directories is applied one after another. If the same file exists in a later overlay, it will overwrite the preceding one. @@ -37,6 +38,7 @@ and their respective included directories in ``defaultenv/Makefile``: bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW) += defaultenv-2-base bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW_MENU) += defaultenv-2-menu bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW_DFU) += defaultenv-2-dfu + bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW_REBOOT_MODE) += defaultenv-2-reboot-mode bbenv-$(CONFIG_DEFAULT_ENVIRONMENT_GENERIC) += defaultenv-1 /env/bin/init @@ -138,3 +140,11 @@ there will be a file ``eth0`` with a content like this: # put code to discover eth0 (i.e. 'usb') to /env/network/eth0-discover exit 0 + +/env/bmode/ +----------- + +This contains the files to be sourced when barebox detects that the OS +had requested a specific reboot mode (via e.g. ``reboot bootloader`` +under Linux). After the ``/env/init`` scripts were executed, barebox will +``source /env/bmode/${global.system.reboot_mode.prev}`` if available. diff --git a/Documentation/user/reboot-mode.rst b/Documentation/user/reboot-mode.rst new file mode 100644 index 0000000000..9321d928f4 --- /dev/null +++ b/Documentation/user/reboot-mode.rst @@ -0,0 +1,95 @@ +.. _reboot_mode: + +Reboot Mode +----------- + +To simplify debugging, many BootROMs sample registers that survive +a warm reset to customize the boot. These registers can e.g. indicate +that boot should happen from a different boot medium. + +Likewise, many bootloaders reuse such registers, or if unavailable, +non-volatile memory to determine whether the OS requested a special +reboot mode, e.g. rebooting into an USB recovery mode. This is +common on Android systems. + +barebox implements the upstream device tree bindings for +`reboot-modes <https://www.kernel.org/doc/Documentation/devicetree/bindings/power/reset/reboot-mode.txt>`_ +to act upon reboot mode protocols specified in the device tree. + +The device tree nodes list a number of reboot modes along with a +magic value for each. On reboot, an OS implementing the binding +would take the reboot command's argument and match it against the +modes in the device tree. If a match is found the associated magic +is written to the location referenced in the device tree node. + +User API +~~~~~~~~ + +Devices registered with the reboot mode API gain two parameters: + + - ``$dev_of_reboot_mode.prev`` (read-only): The reboot mode that was + set previous to barebox startup + - ``$dev_of_reboot_mode.next``: The next reboot mode, for when the + system is reset + +The reboot mode driver core use the alias name if available to name +the device. By convention, this should end with ``.reboot_mode``, e.g.:: + + / { + aliases { + gpr.reboot_name = &reboot_name_gpr; + }; + }; + +Reboot mode providers have priorities. The provider with the highest +priority has its parameters aliased as ``$global.system.reboot_mode.prev`` +and ``$global.system.reboot_mode.next``. + +Reset +~~~~~ + +Reboot modes can be stored on a syscon wrapping general purpose registers +that survives warm resets. If the system instead did reset via an external +power management IC, the registers may lose their value. + +If such reboot mode storage is used, users must take care to use the correct +reset provider. In barebox, multiple reset providers may co-exist. They +``reset`` command allows listing and choosing a specific reboot mode. + +Disambiguation +~~~~~~~~~~~~~~ + +Some uses of reboot modes partially overlap with other barebox +functionality. They all ultimately serve different purposes, however. + +Comparison to reset reason +--------------------------- + +The reset reason ``$global.system.reset`` is populated by different drivers +to reflect the hardware cause of a reset, e.g. a watchdog. A reboot mode +describes the OS intention behind a reset, e.g. to fall into a recovery +mode. Reboot modes besides the default ``normal`` mode usually accompany +a reset reason of ``RST`` (because the OS intentionally triggered a reset +to activate the next reboot mode). + +Comparison to bootsource +------------------------ + +``$bootsource`` reflects the current boot's medium as indicated by the +SoC. In cases where the reboot mode is used to communicate with the BootROM, +``$bootsource`` and ``$bootsource_instance`` may describe the same device +as the reboot mode. + +For cases, where the communication instead happens between barebox and an OS, +they can be completely different, e.g. ``$bootsource`` may say barebox was +booted from ``spi-nor``, while the reboot mode describes that barebox should +boot the Kernel off an USB flash drive. + +Comparison to barebox state +--------------------------- + +barebox state also allows sharing information between barebox and the OS, +but it does so while providing atomic updates, redundant storage and +optionally wear leveling. In contrast to state, reboot mode is just that: +a mode for a single reboot. barebox clears the reboot mode after reading it, +so this can be reliably used across one reset only. @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 VERSION = 2020 -PATCHLEVEL = 10 +PATCHLEVEL = 11 SUBLEVEL = 0 EXTRAVERSION = NAME = None @@ -311,7 +311,8 @@ include scripts/Kbuild.include # Read KERNELRELEASE from include/config/kernel.release (if it exists) KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null) KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) -export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION +BUILDSYSTEM_VERSION = +export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION BUILDSYSTEM_VERSION # Cross compiling and selecting different set of gcc/bin-utils # --------------------------------------------------------------------------- @@ -1003,6 +1004,22 @@ include/generated/utsrelease.h: include/config/kernel.release FORCE $(call filechk,utsrelease.h) # --------------------------------------------------------------------------- +# Devicetree files + +ifneq ($(wildcard $(srctree)/arch/$(SRCARCH)/dts/),) +dtstree := arch/$(SRCARCH)/dts +endif + +ifneq ($(dtstree),) + +PHONY += dtbs +all_dtbs += $(patsubst $(srctree)/%.dts,$(objtree)/%.dtb,$(wildcard $(srctree)/$(dtstree)/*.dts)) +targets += $(all_dtbs) +dtbs: $(all_dtbs) + +endif + +# --------------------------------------------------------------------------- # Modules ifdef CONFIG_MODULES @@ -1177,6 +1194,10 @@ help: @$(if $(archhelp),$(archhelp),\ echo ' No architecture specific help defined for $(SRCARCH)') @echo '' + @$(if $(dtstree), \ + echo ' Devicetree:'; \ + echo ' * dtbs - Build device tree blobs for all boards'; \ + echo '') @$(if $(boards), \ $(foreach b, $(boards), \ printf " %-24s - Build for %s\\n" $(b) $(subst _defconfig,,$(b));) \ diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 986ea7a983..a02d80d2da 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -132,7 +132,7 @@ obj-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += terasic-de0-nano-soc/ obj-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += terasic-sockit/ obj-$(CONFIG_MACH_SOLIDRUN_CUBOX) += solidrun-cubox/ obj-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += solidrun-microsom/ -obj-$(CONFIG_MACH_STM32MP157C_DK2) += stm32mp157c-dk2/ +obj-$(CONFIG_MACH_STM32MP15XX_DKX) += stm32mp15xx-dkx/ obj-$(CONFIG_MACH_LXA_MC1) += lxa-mc1/ obj-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += technexion-pico-hobbit/ obj-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += technexion-wandboard/ @@ -165,6 +165,7 @@ obj-$(CONFIG_MACH_VARISCITE_MX6) += variscite-mx6/ obj-$(CONFIG_MACH_VSCOM_BALTOS) += vscom-baltos/ obj-$(CONFIG_MACH_QEMU_VIRT64) += qemu-virt64/ obj-$(CONFIG_MACH_WARP7) += element14-warp7/ +obj-$(CONFIG_MACH_WEBASTO_CCBV2) += webasto-ccbv2/ obj-$(CONFIG_MACH_VF610_TWR) += freescale-vf610-twr/ obj-$(CONFIG_MACH_XILINX_ZCU104) += xilinx-zcu104/ obj-$(CONFIG_MACH_ZII_COMMON) += zii-common/ diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c b/arch/arm/boards/ccxmx51/ccxmx51.c index 13fba51fec..09437b047f 100644 --- a/arch/arm/boards/ccxmx51/ccxmx51.c +++ b/arch/arm/boards/ccxmx51/ccxmx51.c @@ -31,7 +31,7 @@ static const struct ccxmx_ident { unsigned char eth1:1; unsigned char wless:1; unsigned char accel:1; -} *ccxmx_id, ccxmx51_ids[] = { +} ccxmx51_ids[] = { [0x00] = { NULL /* Unknown */, 0, 0, 0, 0, 0, 0 }, [0x01] = { NULL /* Not supported */, 0, 0, 0, 0, 0, 0 }, [0x02] = { "i.MX515@800MHz, Wireless, PHY, Ext. Eth, Accel", SZ_512M, 800, 1, 1, 1, 1 }, @@ -52,7 +52,9 @@ static const struct ccxmx_ident { [0x11] = { "i.MX515@800MHz, PHY, Accel", SZ_128M, 800, 1, 0, 0, 1 }, [0x12] = { "i.MX515@600MHz, Wireless, PHY, Accel", SZ_512M, 600, 1, 0, 1, 1 }, [0x13] = { "i.MX515@800MHz, PHY, Accel", SZ_512M, 800, 1, 0, 0, 1 }, -}; + [0x14] = { NULL, 0, 0, 0, 0, 0, 0 }, + [0x15] = { "i.MX515@600MHz, PHY, Accel", SZ_512M, 600, 1, 0, 0, 1 }, +}, *ccxmx_id = &ccxmx51_ids[0]; static u32 boardserial; @@ -228,13 +230,18 @@ static __init int ccxmx51_init(void) { char manloc = 'N'; u8 hwid[6]; + int ret; if (!ccxmx51_is_compatible()) return 0; - if ((imx_iim_read(1, 9, hwid, sizeof(hwid)) != sizeof(hwid)) || - (hwid[0] < 0x02) || (hwid[0] >= ARRAY_SIZE(ccxmx51_ids))) { - printf("Unknown board variant (0x%02x). System halted.\n", hwid[0]); + ret = imx_iim_read(1, 9, hwid, sizeof(hwid)); + if ((ret == sizeof(hwid)) && (hwid[0] < ARRAY_SIZE(ccxmx51_ids))) + ccxmx_id = &ccxmx51_ids[hwid[0]]; + + if (!ccxmx_id->mem_sz) { + printf("Unknown/unsupported board variant (0x%02x).\n" + "System halted.\n", hwid[0]); hang(); } diff --git a/arch/arm/boards/crystalfontz-cfa10036/hwdetect.c b/arch/arm/boards/crystalfontz-cfa10036/hwdetect.c index 83c77feb89..fc39f0849a 100644 --- a/arch/arm/boards/crystalfontz-cfa10036/hwdetect.c +++ b/arch/arm/boards/crystalfontz-cfa10036/hwdetect.c @@ -99,4 +99,4 @@ void cfa10036_detect_hw(void) pr_info("Booting on a CFA10036 with %s\n", board_name); } -BAREBOX_MAGICVAR_NAMED(global_board_variant, global.board.variant, "The board variant"); +BAREBOX_MAGICVAR(global.board.variant, "The board variant"); diff --git a/arch/arm/boards/freescale-mx6-sabrelite/board.c b/arch/arm/boards/freescale-mx6-sabrelite/board.c index f4f2994a51..1b39ef82c6 100644 --- a/arch/arm/boards/freescale-mx6-sabrelite/board.c +++ b/arch/arm/boards/freescale-mx6-sabrelite/board.c @@ -39,18 +39,6 @@ static iomux_v3_cfg_t sabrelite_enet_gpio_pads[] = { MX6Q_PAD_RGMII_RX_CTL__GPIO_6_24, }; -static int sabrelite_mem_init(void) -{ - if (!of_machine_is_compatible("fsl,imx6q-sabrelite") && - !of_machine_is_compatible("fsl,imx6dl-sabrelite")) - return 0; - - arm_add_mem_device("ram0", 0x10000000, SZ_1G); - - return 0; -} -mem_initcall(sabrelite_mem_init); - static int ksz9021rn_phy_fixup(struct phy_device *dev) { phy_write(dev, 0x09, 0x0f00); @@ -70,37 +58,37 @@ static int ksz9021rn_phy_fixup(struct phy_device *dev) static struct gpio fec_gpios[] = { { - .gpio = 87, + .gpio = IMX_GPIO_NR(3, 23), .flags = GPIOF_OUT_INIT_LOW, .label = "phy-rst", }, { - .gpio = 190, + .gpio = IMX_GPIO_NR(6, 30), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-addr2", }, { - .gpio = 23, + .gpio = IMX_GPIO_NR(1, 23), .flags = GPIOF_OUT_INIT_LOW, .label = "phy-led-mode", }, { /* MODE strap-in pins: advertise all capabilities */ - .gpio = 185, + .gpio = IMX_GPIO_NR(6, 25), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-adv1", }, { - .gpio = 187, + .gpio = IMX_GPIO_NR(6, 27), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-adv1", }, { - .gpio = 188, + .gpio = IMX_GPIO_NR(6, 28), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-adv1", }, { - .gpio = 189, + .gpio = IMX_GPIO_NR(6, 29), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-adv1", }, { /* Enable 125 MHz clock output */ - .gpio = 184, + .gpio = IMX_GPIO_NR(6, 24), .flags = GPIOF_OUT_INIT_HIGH, .label = "phy-125MHz", }, @@ -139,9 +127,9 @@ fs_initcall(sabrelite_ksz9021rn_setup); static void sabrelite_ehci_init(void) { /* hub reset */ - gpio_direction_output(204, 0); + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); udelay(2000); - gpio_set_value(204, 1); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); } static int sabrelite_devices_init(void) diff --git a/arch/arm/boards/kindle-mx50/board.c b/arch/arm/boards/kindle-mx50/board.c index a8d733c6ba..8fc5af8320 100644 --- a/arch/arm/boards/kindle-mx50/board.c +++ b/arch/arm/boards/kindle-mx50/board.c @@ -60,9 +60,9 @@ static const char *get_env_16char_tag(const char *tag) return value; } -BAREBOX_MAGICVAR_NAMED(global_atags_serial16, global.board.serial16, +BAREBOX_MAGICVAR(global.board.serial16, "Pass the kindle Serial as vendor-specific ATAG to linux"); -BAREBOX_MAGICVAR_NAMED(global_atags_revision16, global.board.revision16, +BAREBOX_MAGICVAR(global.board.revision16, "Pass the kindle BoardId as vendor-specific ATAG to linux"); /* The Kindle Kernel expects two custom ATAGs, ATAG_REVISION16 describing diff --git a/arch/arm/boards/kindle3/kindle3.c b/arch/arm/boards/kindle3/kindle3.c index 14e04deb94..a593dc424d 100644 --- a/arch/arm/boards/kindle3/kindle3.c +++ b/arch/arm/boards/kindle3/kindle3.c @@ -64,9 +64,9 @@ static const char *get_env_16char_tag(const char *tag) return value; } -BAREBOX_MAGICVAR_NAMED(global_atags_serial16, global.board.serial16, +BAREBOX_MAGICVAR(global.board.serial16, "Pass the kindle Serial as vendor-specific ATAG to linux"); -BAREBOX_MAGICVAR_NAMED(global_atags_revision16, global.board.revision16, +BAREBOX_MAGICVAR(global.board.revision16, "Pass the kindle BoardId as vendor-specific ATAG to linux"); /* The Kindle3 Kernel expects two custom ATAGs, ATAG_REVISION16 describing diff --git a/arch/arm/boards/lxa-mc1/board.c b/arch/arm/boards/lxa-mc1/board.c index 7f1f3ccd7e..9126973dcb 100644 --- a/arch/arm/boards/lxa-mc1/board.c +++ b/arch/arm/boards/lxa-mc1/board.c @@ -28,11 +28,9 @@ static int of_fixup_regulator_supply_disable(struct device_node *root, void *pat return 0; } -static int mc1_device_init(void) +static int mc1_probe(struct device_d *dev) { int flags; - if (!of_machine_is_compatible("lxa,stm32mp157c-mc1")) - return 0; flags = bootsource_get_instance() == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0; stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", flags); @@ -55,4 +53,15 @@ static int mc1_device_init(void) */ return of_register_fixup(of_fixup_regulator_supply_disable, "/regulator_3v3"); } -device_initcall(mc1_device_init); + +static const struct of_device_id mc1_of_match[] = { + { .compatible = "lxa,stm32mp157c-mc1" }, + { /* sentinel */ }, +}; + +static struct driver_d mc1_board_driver = { + .name = "board-lxa-mc1", + .probe = mc1_probe, + .of_compatible = mc1_of_match, +}; +device_platform_driver(mc1_board_driver); diff --git a/arch/arm/boards/nxp-imx8mm-evk/board.c b/arch/arm/boards/nxp-imx8mm-evk/board.c index 8f5d851a88..4350abd157 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/board.c +++ b/arch/arm/boards/nxp-imx8mm-evk/board.c @@ -55,7 +55,7 @@ static int nxp_imx8mm_evk_init(void) imx8mq_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", emmc_sd_flag); - imx8mq_bbu_internal_mmc_register_handler("eMMC", "/dev/mmc2", + imx8mq_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, diff --git a/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c b/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c index b164bdec07..8d6cc389ba 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c +++ b/arch/arm/boards/nxp-imx8mm-evk/lpddr4-timing.c @@ -118,7 +118,7 @@ static struct dram_cfg_param lpddr4_ddrc_cfg[] = { { DDRC_FREQ2_INIT7(0), 0x0006004a }, /* boot start point */ - { DDRC_MSTR2(0), 0x2 }, //DDRC_MSTR2 + { DDRC_MSTR2(0), 0x0 }, }; /* PHY Initialize Configuration */ @@ -1941,12 +1941,6 @@ static struct dram_fsp_msg lpddr4_dram_fsp_msg[] = { .fsp_cfg = lpddr4_fsp0_cfg, .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_cfg), }, { - /* P0 3000mts 2D */ - .drate = 3000, - .fw_type = FW_2D_IMAGE, - .fsp_cfg = lpddr4_fsp0_2d_cfg, - .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_2d_cfg), - }, { /* P1 400mts 1D */ .drate = 400, .fw_type = FW_1D_IMAGE, @@ -1958,6 +1952,12 @@ static struct dram_fsp_msg lpddr4_dram_fsp_msg[] = { .fw_type = FW_1D_IMAGE, .fsp_cfg = lpddr4_fsp2_cfg, .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp2_cfg), + }, { + /* P0 3000mts 2D */ + .drate = 3000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = lpddr4_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_2d_cfg), }, }; diff --git a/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c index e4f994a1d1..3298ded586 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mp-evk/lowlevel.c @@ -118,7 +118,7 @@ static void start_atf(void) power_init_board(); - imx8mm_ddr_init(&imx8mp_evk_dram_timing); + imx8mp_ddr_init(&imx8mp_evk_dram_timing); imx8mp_get_boot_source(&src, &instance); switch (src) { diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c index 407115c2a6..62a1c8de73 100644 --- a/arch/arm/boards/phytec-som-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c @@ -110,6 +110,7 @@ PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_so PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true); PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_2gib, imx6q_phytec_phycore_som_emmc, SZ_2G, true); +PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_emmc_512mb, imx6ul_phytec_phycore_som_emmc, SZ_512M, false); PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_nand_512mb, imx6ul_phytec_phycore_som_nand, SZ_512M, false); PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_lc_nand_256mb, imx6ull_phytec_phycore_som_lc_nand, SZ_256M, false); PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_nand_512mb, imx6ull_phytec_phycore_som_nand, SZ_512M, false); diff --git a/arch/arm/boards/seeed-odyssey/board.c b/arch/arm/boards/seeed-odyssey/board.c index e3fe536873..8c011898a3 100644 --- a/arch/arm/boards/seeed-odyssey/board.c +++ b/arch/arm/boards/seeed-odyssey/board.c @@ -7,14 +7,11 @@ #include <bootsource.h> #include <of.h> -static int odyssey_device_init(void) +static int odyssey_som_probe(struct device_d *dev) { int flags; int instance = bootsource_get_instance(); - if (!of_machine_is_compatible("seeed,stm32mp157c-odyssey-som")) - return 0; - flags = instance == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0; stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", flags); @@ -29,4 +26,15 @@ static int odyssey_device_init(void) return 0; } -device_initcall(odyssey_device_init); + +static const struct of_device_id odyssey_som_of_match[] = { + { .compatible = "seeed,stm32mp157c-odyssey-som" }, + { /* sentinel */ }, +}; + +static struct driver_d odyssey_som_driver = { + .name = "odyssey-som", + .probe = odyssey_som_probe, + .of_compatible = odyssey_som_of_match, +}; +device_platform_driver(odyssey_som_driver); diff --git a/arch/arm/boards/stm32mp157c-dk2/board.c b/arch/arm/boards/stm32mp157c-dk2/board.c deleted file mode 100644 index 4636603121..0000000000 --- a/arch/arm/boards/stm32mp157c-dk2/board.c +++ /dev/null @@ -1,18 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -#include <common.h> -#include <init.h> -#include <mach/bbu.h> - -static int dk2_postcore_init(void) -{ - if (!of_machine_is_compatible("st,stm32mp157c-dk2")) - return 0; - - stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", - BBU_HANDLER_FLAG_DEFAULT); - - barebox_set_model("STM32MP157C-DK2"); - - return 0; -} -postcore_initcall(dk2_postcore_init); diff --git a/arch/arm/boards/stm32mp157c-dk2/lowlevel.c b/arch/arm/boards/stm32mp157c-dk2/lowlevel.c deleted file mode 100644 index 7261d7a8bc..0000000000 --- a/arch/arm/boards/stm32mp157c-dk2/lowlevel.c +++ /dev/null @@ -1,26 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -#include <common.h> -#include <mach/entry.h> -#include <debug_ll.h> - -extern char __dtb_z_stm32mp157c_dk2_start[]; - -static void setup_uart(void) -{ - /* first stage has set up the UART, so nothing to do here */ - putc_ll('>'); -} - -ENTRY_FUNCTION(start_stm32mp157c_dk2, r0, r1, r2) -{ - void *fdt; - - stm32mp_cpu_lowlevel_init(); - - if (IS_ENABLED(CONFIG_DEBUG_LL)) - setup_uart(); - - fdt = __dtb_z_stm32mp157c_dk2_start + get_runtime_offset(); - - stm32mp1_barebox_entry(fdt); -} diff --git a/arch/arm/boards/stm32mp157c-dk2/Makefile b/arch/arm/boards/stm32mp15xx-dkx/Makefile index 092c31d6b2..092c31d6b2 100644 --- a/arch/arm/boards/stm32mp157c-dk2/Makefile +++ b/arch/arm/boards/stm32mp15xx-dkx/Makefile diff --git a/arch/arm/boards/stm32mp15xx-dkx/board.c b/arch/arm/boards/stm32mp15xx-dkx/board.c new file mode 100644 index 0000000000..1ddfee698d --- /dev/null +++ b/arch/arm/boards/stm32mp15xx-dkx/board.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include <common.h> +#include <init.h> +#include <mach/bbu.h> + +static int dkx_probe(struct device_d *dev) +{ + const void *model; + + stm32mp_bbu_mmc_register_handler("sd", "/dev/mmc0.ssbl", + BBU_HANDLER_FLAG_DEFAULT); + + if (dev_get_drvdata(dev, &model) == 0) + barebox_set_model(model); + + barebox_set_hostname("stm32mp15xx-dkx"); + + return 0; +} + +static const struct of_device_id dkx_of_match[] = { + { .compatible = "st,stm32mp157a-dk1", .data = "STM32MP157A-DK1" }, + { .compatible = "st,stm32mp157c-dk2", .data = "STM32MP157C-DK2" }, + { /* sentinel */ }, +}; + +static struct driver_d dkx_board_driver = { + .name = "board-stm32mp15xx-dkx", + .probe = dkx_probe, + .of_compatible = dkx_of_match, +}; +postcore_platform_driver(dkx_board_driver); diff --git a/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c b/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c new file mode 100644 index 0000000000..65f4bbb4da --- /dev/null +++ b/arch/arm/boards/stm32mp15xx-dkx/lowlevel.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include <common.h> +#include <mach/entry.h> +#include <debug_ll.h> +#include <mach/revision.h> + +extern char __dtb_z_stm32mp157c_dk2_start[]; +extern char __dtb_z_stm32mp157a_dk1_start[]; + +static void setup_uart(void) +{ + /* first stage has set up the UART, so nothing to do here */ + putc_ll('>'); +} + +ENTRY_FUNCTION(start_stm32mp15xx_dkx, r0, r1, r2) +{ + void *fdt; + u32 cputype; + int err; + + stm32mp_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + err = __stm32mp_get_cpu_type(&cputype); + if (!err && cputype == CPU_STM32MP157Axx) + fdt = __dtb_z_stm32mp157a_dk1_start; + else + fdt = __dtb_z_stm32mp157c_dk2_start; + + stm32mp1_barebox_entry(fdt + get_runtime_offset()); +} diff --git a/arch/arm/boards/tny-a926x/tny_a9263_bootstrap.c b/arch/arm/boards/tny-a926x/tny_a9263_bootstrap.c index 368c67744f..f26f1eaecb 100644 --- a/arch/arm/boards/tny-a926x/tny_a9263_bootstrap.c +++ b/arch/arm/boards/tny-a926x/tny_a9263_bootstrap.c @@ -11,6 +11,6 @@ #ifdef CONFIG_MTD_DATAFLASH void * bootstrap_board_read_dataflash(void) { - return bootstrap_read_devfs("dataflash0", false, 0xffc0, 204864, 204864); + return bootstrap_read_devfs("dataflash0", false, 0xffc0, 204864, 204864, NULL); } #endif diff --git a/arch/arm/boards/usb-a926x/usb_a9263_bootstrap.c b/arch/arm/boards/usb-a926x/usb_a9263_bootstrap.c index 368c67744f..f26f1eaecb 100644 --- a/arch/arm/boards/usb-a926x/usb_a9263_bootstrap.c +++ b/arch/arm/boards/usb-a926x/usb_a9263_bootstrap.c @@ -11,6 +11,6 @@ #ifdef CONFIG_MTD_DATAFLASH void * bootstrap_board_read_dataflash(void) { - return bootstrap_read_devfs("dataflash0", false, 0xffc0, 204864, 204864); + return bootstrap_read_devfs("dataflash0", false, 0xffc0, 204864, 204864, NULL); } #endif diff --git a/arch/arm/boards/webasto-ccbv2/Makefile b/arch/arm/boards/webasto-ccbv2/Makefile new file mode 100644 index 0000000000..01c7a259e9 --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/Makefile @@ -0,0 +1,2 @@ +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/webasto-ccbv2/board.c b/arch/arm/boards/webasto-ccbv2/board.c new file mode 100644 index 0000000000..a78258ea6a --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/board.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2019 Rouven Czerwinski, Pengutronix + */ + +#include <common.h> +#include <init.h> +#include <mach/generic.h> +#include <mach/bbu.h> +#include <of.h> +#include <string.h> + +#include "ccbv2.h" + +static int ccbv2_probe(struct device_d *dev) +{ + struct device_node *overlay; + struct fdt_header *fdt; + int ret; + + /* the bootloader is stored in one of the two boot partitions */ + imx6_bbu_internal_mmcboot_register_handler("emmc", "/dev/mmc1", + BBU_HANDLER_FLAG_DEFAULT); + + barebox_set_hostname("weabsto-ccbv2"); + + if(!IS_ENABLED(CONFIG_FIRMWARE_CCBV2_OPTEE)) + return 0; + + fdt = (void*)OPTEE_OVERLAY_LOCATION; + overlay = of_unflatten_dtb(fdt); + + if (IS_ERR(overlay)) + return PTR_ERR(overlay); + + ret = of_register_overlay(overlay); + if (ret) { + printf("cannot apply oftree overlay: %s\n", strerror(-ret)); + goto err; + } + + return 0; +err: + of_delete_node(overlay); + return ret; + +} + +static const struct of_device_id ccbv2_of_match[] = { + { .compatible = "webasto,imx6ul-ccbv2" }, + { /* sentinel */ }, +}; + +static struct driver_d ccbv2_board_driver = { + .name = "board-imx6ul-ccbv2", + .probe = ccbv2_probe, + .of_compatible = ccbv2_of_match, +}; +postcore_platform_driver(ccbv2_board_driver); diff --git a/arch/arm/boards/webasto-ccbv2/ccbv2.h b/arch/arm/boards/webasto-ccbv2/ccbv2.h new file mode 100644 index 0000000000..bf43fe8410 --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/ccbv2.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * ccbv2.h - common defines between OP-TEE and barebox + * + * Copyright (c) 2019 Rouven Czerwinski <r.czerwinski@pengutronix.de>, Pengutronix + * + */ +#ifndef __CCBV2_H_ +#define __CCBV2_H_ + +/* MX6UL_MMDC_PORT0_BASE_ADDR + SZ_64M */ +#define OPTEE_OVERLAY_LOCATION 0x84000000 + + +#endif // __CCBV2_H_ diff --git a/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2.imxcfg b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2.imxcfg new file mode 100644 index 0000000000..ea327b2630 --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2.imxcfg @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +loadaddr 0x80000000 +soc imx6 +ivtofs 0x400 + +/* Enable all clocks */ +wm 32 0x020c4068 0xffffffff +wm 32 0x020c406c 0xffffffff +wm 32 0x020c4070 0xffffffff +wm 32 0x020c4074 0xffffffff +wm 32 0x020c4078 0xffffffff +wm 32 0x020c407c 0xffffffff +wm 32 0x020c4080 0xffffffff + +/* IOMUX */ +/* DDR IO type */ +wm 32 0x020E04B4 0x000C0000 +wm 32 0x020E04AC 0x00000000 +/* Clock */ +wm 32 0x020E027C 0x00000028 +/* Control */ +wm 32 0x020E0250 0x00000028 +wm 32 0x020E024C 0x00000028 +wm 32 0x020E0490 0x00000028 +wm 32 0x020E0288 0x00000028 +wm 32 0x020E0270 0x00000000 +wm 32 0x020E0260 0x00000028 +wm 32 0x020E0264 0x00000028 +wm 32 0x020E04A0 0x00000028 +/* Data strobe */ +wm 32 0x020E0494 0x00020000 +wm 32 0x020E0280 0x00000028 +wm 32 0x020E0284 0x00000028 +/* Data */ +wm 32 0x020E04B0 0x00020000 +wm 32 0x020E0498 0x00000028 +wm 32 0x020E04A4 0x00000028 +wm 32 0x020E0244 0x00000028 |