diff options
116 files changed, 700 insertions, 366 deletions
diff --git a/Documentation/boards/bcm2835.rst b/Documentation/boards/bcm2835.rst index e9ad1d4d57..c896871e0d 100644 --- a/Documentation/boards/bcm2835.rst +++ b/Documentation/boards/bcm2835.rst @@ -11,9 +11,9 @@ Raspberry Pi 3. Use ``make rpi_defconfig; make`` to build barebox. This will create the following images: - - ``images/barebox-raspberry-pi-1.img`` for the BCM2835/ARM1176JZF-S (Raspberry Pi 1) + - ``images/barebox-raspberry-pi-1.img`` for the BCM2835/ARM1176JZF-S (Raspberry Pi 1, Raspberry Pi Zero) - ``images/barebox-raspberry-pi-2.img`` for the BCM2836/CORTEX-A7 (Raspberry Pi 2) - - ``images/barebox-raspberry-pi-3.img`` for the BCM2837/CORTEX-A53 (Raspberry Pi 3, Raspberry Pi Zero) + - ``images/barebox-raspberry-pi-3.img`` for the BCM2837/CORTEX-A53 (Raspberry Pi 3) Copy the respective image for your model to your SD card and name it ``barebox.img``. @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 VERSION = 2020 -PATCHLEVEL = 11 +PATCHLEVEL = 12 SUBLEVEL = 0 EXTRAVERSION = NAME = None diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ea6d459dfe..ab0bf03013 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -216,13 +216,18 @@ config ARCH_VERSATILE select HAS_DEBUG_LL config ARCH_VEXPRESS - bool "ARM Vexpres boards" + bool "ARM Vexpress & virt boards" select HAS_DEBUG_LL select CPU_V7 select ARM_AMBA select AMBA_SP804 select CLKDEV_LOOKUP select COMMON_CLK + select COMMON_CLK_OF_PROVIDER + select OFTREE + select OFDEVICE + select RELOCATABLE + select HAVE_PBL_MULTI_IMAGES config ARCH_TEGRA bool "NVIDIA Tegra" diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index a02d80d2da..81c228efd6 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -164,6 +164,7 @@ obj-$(CONFIG_MACH_ZYLONITE) += zylonite/ obj-$(CONFIG_MACH_VARISCITE_MX6) += variscite-mx6/ obj-$(CONFIG_MACH_VSCOM_BALTOS) += vscom-baltos/ obj-$(CONFIG_MACH_QEMU_VIRT64) += qemu-virt64/ +obj-$(CONFIG_MACH_VIRT) += qemu-virt/ obj-$(CONFIG_MACH_WARP7) += element14-warp7/ obj-$(CONFIG_MACH_WEBASTO_CCBV2) += webasto-ccbv2/ obj-$(CONFIG_MACH_VF610_TWR) += freescale-vf610-twr/ diff --git a/arch/arm/boards/nxp-imx8mm-evk/board.c b/arch/arm/boards/nxp-imx8mm-evk/board.c index 4350abd157..2603a2ab07 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/board.c +++ b/arch/arm/boards/nxp-imx8mm-evk/board.c @@ -53,10 +53,8 @@ static int nxp_imx8mm_evk_init(void) emmc_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; } - imx8mq_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", - emmc_sd_flag); - imx8mq_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", - emmc_bbu_flag); + imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", emmc_sd_flag); + imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, ar8031_phy_fixup); diff --git a/arch/arm/boards/nxp-imx8mp-evk/board.c b/arch/arm/boards/nxp-imx8mp-evk/board.c index d75eb1c697..f64f466810 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/board.c +++ b/arch/arm/boards/nxp-imx8mp-evk/board.c @@ -36,10 +36,8 @@ static int nxp_imx8mp_evk_init(void) emmc_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; } - imx8mq_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", - emmc_sd_flag); - imx8mq_bbu_internal_mmc_register_handler("eMMC", "/dev/mmc2", - emmc_bbu_flag); + imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", emmc_sd_flag); + imx8m_bbu_internal_mmc_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); val = readl(MX8MP_IOMUXC_GPR_BASE_ADDR + MX8MP_IOMUXC_GPR1); val |= MX8MP_IOMUXC_GPR1_ENET1_RGMII_EN; diff --git a/arch/arm/boards/nxp-imx8mq-evk/board.c b/arch/arm/boards/nxp-imx8mq-evk/board.c index 19e640397c..c28107cb17 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/board.c +++ b/arch/arm/boards/nxp-imx8mq-evk/board.c @@ -40,12 +40,10 @@ static int nxp_imx8mq_evk_init(void) barebox_set_hostname("imx8mq-evk"); flags = bootsource_get_instance() == 0 ? BBU_HANDLER_FLAG_DEFAULT : 0; - imx8mq_bbu_internal_mmc_register_handler("eMMC", - "/dev/mmc0.barebox", flags); + imx8m_bbu_internal_mmc_register_handler("eMMC", "/dev/mmc0.barebox", flags); flags = bootsource_get_instance() == 1 ? BBU_HANDLER_FLAG_DEFAULT : 0; - imx8mq_bbu_internal_mmc_register_handler("SD", - "/dev/mmc1.barebox", flags); + imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", flags); if (bootsource_get_instance() == 0) of_device_enable_path("/chosen/environment-emmc"); diff --git a/arch/arm/boards/phytec-som-imx8mq/board.c b/arch/arm/boards/phytec-som-imx8mq/board.c index 7df53a7cfb..6d331281e6 100644 --- a/arch/arm/boards/phytec-som-imx8mq/board.c +++ b/arch/arm/boards/phytec-som-imx8mq/board.c @@ -73,10 +73,8 @@ static int physom_imx8mq_devices_init(void) break; } - imx8mq_bbu_internal_mmc_register_handler("eMMC", - "/dev/mmc0.barebox", flag_emmc); - imx8mq_bbu_internal_mmc_register_handler("SD", - "/dev/mmc1.barebox", flag_sd); + imx8m_bbu_internal_mmc_register_handler("eMMC", "/dev/mmc0.barebox", flag_emmc); + imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", flag_sd); return 0; diff --git a/arch/arm/boards/protonic-imx6/board.c b/arch/arm/boards/protonic-imx6/board.c index daae9a527c..a718d54df4 100644 --- a/arch/arm/boards/protonic-imx6/board.c +++ b/arch/arm/boards/protonic-imx6/board.c @@ -11,8 +11,11 @@ #include <i2c/i2c.h> #include <mach/bbu.h> #include <mach/imx6.h> +#include <mfd/imx6q-iomuxc-gpr.h> +#include <mfd/syscon.h> #include <net.h> #include <of_device.h> +#include <regmap.h> #include <sys/mount.h> #include <sys/stat.h> #include <unistd.h> @@ -577,6 +580,27 @@ static int prt_imx6_init_victgo(struct prt_imx6_priv *priv) return prt_imx6_init_kvg_power(priv, PW_MODE_KVG_NEW); } +static int prt_imx6_init_prti6g(struct prt_imx6_priv *priv) +{ + struct regmap *gpr; + + gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr"); + if (!IS_ERR(gpr)) { + int ret; + + /* Configure FEC1 to use 50MHz clock provided by the PHY */ + ret = regmap_update_bits(gpr, IOMUXC_GPR1, + IMX6UL_GPR1_ENET1_CLK_DIR | IMX6UL_GPR1_ENET1_CLK_SEL, + IMX6UL_GPR1_ENET1_CLK_SEL); + if (ret) + dev_err(priv->dev, "regmap error\n"); + } else { + dev_err(priv->dev, "failed to find fsl,imx6ul-iomux-gpr regmap\n"); + } + + return 0; +} + static int prt_imx6_init_kvg_new(struct prt_imx6_priv *priv) { return prt_imx6_init_kvg_power(priv, PW_MODE_KVG_NEW); @@ -923,6 +947,7 @@ static const struct prt_machine_data prt_imx6_cfg_prti6g[] = { .hw_rev = 0, .i2c_addr = 0x51, .i2c_adapter = 0, + .init = prt_imx6_init_prti6g, .flags = PRT_IMX6_BOOTSRC_EMMC, }, { .hw_id = UINT_MAX diff --git a/arch/arm/boards/qemu-virt/Makefile b/arch/arm/boards/qemu-virt/Makefile new file mode 100644 index 0000000000..dcfc2937d3 --- /dev/null +++ b/arch/arm/boards/qemu-virt/Makefile @@ -0,0 +1 @@ +obj-y += board.o diff --git a/arch/arm/boards/qemu-virt/board.c b/arch/arm/boards/qemu-virt/board.c new file mode 100644 index 0000000000..3aeea1a017 --- /dev/null +++ b/arch/arm/boards/qemu-virt/board.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2020 Pengutronix e.K. + * + */ +#include <common.h> +#include <init.h> +#include <asm/system_info.h> + +static int virt_probe(struct device_d *dev) +{ + char *hostname = "virt"; + + if (cpu_is_cortex_a7()) + hostname = "virt-a7"; + else if (cpu_is_cortex_a15()) + hostname = "virt-a15"; + + barebox_set_model("ARM QEMU virt"); + barebox_set_hostname(hostname); + + return 0; +} + +static const struct of_device_id virt_of_match[] = { + { .compatible = "linux,dummy-virt" }, + { /* Sentinel */}, +}; + +static struct driver_d virt_board_driver = { + .name = "board-qemu-virt", + .probe = virt_probe, + .of_compatible = virt_of_match, +}; + +postcore_platform_driver(virt_board_driver); diff --git a/arch/arm/boards/vexpress/Kconfig b/arch/arm/boards/vexpress/Kconfig deleted file mode 100644 index 94cba3ba81..0000000000 --- a/arch/arm/boards/vexpress/Kconfig +++ /dev/null @@ -1,8 +0,0 @@ - -if MACH_VERSATILEPB - -config ARCH_TEXT_BASE - hex - default 0x01000000 - -endif diff --git a/arch/arm/boards/vexpress/init.c b/arch/arm/boards/vexpress/init.c index 946385393f..6ba23bbb62 100644 --- a/arch/arm/boards/vexpress/init.c +++ b/arch/arm/boards/vexpress/init.c @@ -19,9 +19,33 @@ #define V2M_SYS_FLASH 0x03c -static int vexpress_core_init(void) +static int of_fixup_virtio_mmio(struct device_node *root, void *unused) +{ + struct device_node *barebox_root, *np, *parent; + + barebox_root = of_get_root_node(); + if (root == barebox_root) + return 0; + + for_each_compatible_node_from(np, barebox_root, NULL, "virtio,mmio") { + if (of_get_parent(np) == barebox_root) + parent = root; + else + parent = of_find_node_by_path_from(root, + of_get_parent(np)->full_name); + if (!parent) + return -EINVAL; + + of_copy_node(parent, np); + } + + return 0; +} + +static int vexpress_probe(struct device_d *dev) { char *hostname = "vexpress-unknown"; + int ret = 0; if (amba_is_arm_sp804(IOMEM(0x10011000))) { vexpress_a9_legacy_init(); @@ -42,35 +66,22 @@ static int vexpress_core_init(void) barebox_set_hostname(hostname); - return 0; -} -postcore_initcall(vexpress_core_init); - -static int of_fixup_virtio_mmio(struct device_node *root, void *unused) -{ - struct device_node *barebox_root, *np, *parent; - - barebox_root = of_get_root_node(); - if (root == barebox_root) - return 0; + ret = of_register_fixup(of_fixup_virtio_mmio, NULL); - for_each_compatible_node_from(np, barebox_root, NULL, "virtio,mmio") { - if (of_get_parent(np) == barebox_root) - parent = root; - else - parent = of_find_node_by_path_from(root, - of_get_parent(np)->full_name); - if (!parent) - return -EINVAL; + return ret; +} - of_copy_node(parent, np); - } +static const struct of_device_id vexpress_of_match[] = { + { .compatible = "arm,vexpress,v2p-ca9" }, + { .compatible = "arm,vexpress,v2p-ca15" }, + { .compatible = "arm,vexpress" }, + { /* Sentinel */}, +}; - return 0; -} +static struct driver_d vexpress_board_driver = { + .name = "board-vexpress", + .probe = vexpress_probe, + .of_compatible = vexpress_of_match, +}; -static int of_register_virtio_mmio_fixup(void) -{ - return of_register_fixup(of_fixup_virtio_mmio, NULL); -} -late_initcall(of_register_virtio_mmio_fixup); +postcore_platform_driver(vexpress_board_driver); diff --git a/arch/arm/boards/zii-imx8mq-dev/board.c b/arch/arm/boards/zii-imx8mq-dev/board.c index cfe879c201..4ad09663ac 100644 --- a/arch/arm/boards/zii-imx8mq-dev/board.c +++ b/arch/arm/boards/zii-imx8mq-dev/board.c @@ -31,9 +31,9 @@ static int zii_imx8mq_dev_init(void) if (of_machine_is_compatible("zii,imx8mq-ultra-rmb3")) barebox_set_hostname("rmb3"); - imx8mq_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc0", - BBU_HANDLER_FLAG_DEFAULT); - imx8mq_bbu_internal_mmc_register_handler("SD", "/dev/mmc1", 0); + imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc0", + BBU_HANDLER_FLAG_DEFAULT); + imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1", 0); if (bootsource_get_instance() == 0) of_device_enable_path("/chosen/environment-emmc"); diff --git a/arch/arm/configs/am335x_mlo_defconfig b/arch/arm/configs/am335x_mlo_defconfig index efe9911050..51d238db3e 100644 --- a/arch/arm/configs/am335x_mlo_defconfig +++ b/arch/arm/configs/am335x_mlo_defconfig @@ -8,6 +8,7 @@ CONFIG_MACH_BEAGLEBONE=y CONFIG_MACH_PHYTEC_SOM_AM335X=y CONFIG_THUMB2_BAREBOX=y # CONFIG_MEMINFO is not set +CONFIG_IMAGE_COMPRESSION_XZKERN=y CONFIG_MMU=y CONFIG_MALLOC_SIZE=0x0 CONFIG_MALLOC_TLSF=y @@ -26,11 +27,6 @@ CONFIG_MTD=y # CONFIG_MTD_OOB_DEVICE is not set CONFIG_MTD_M25P80=y CONFIG_NAND=y -# CONFIG_NAND_ECC_SOFT is not set -# CONFIG_NAND_ECC_HW_SYNDROME is not set -# CONFIG_NAND_ECC_HW_NONE is not set -# CONFIG_NAND_INFO is not set -# CONFIG_NAND_BBT is not set CONFIG_NAND_OMAP_GPMC=y CONFIG_MCI=y # CONFIG_MCI_WRITE is not set diff --git a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi index cb5ca0aba2..f499ca5684 100644 --- a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi @@ -21,7 +21,7 @@ environment-spinor { compatible = "barebox,environment"; - device-path = &flash, "partname:barebox-environment"; + device-path = &som_flash, "partname:barebox-environment"; status = "disabled"; }; @@ -53,32 +53,30 @@ /delete-node/ &{/memory@10000000}; -&ecspi3 { - flash: flash@0 { - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "barebox"; - reg = <0x0 0x100000>; - }; - - partition@100000 { - label = "barebox-environment"; - reg = <0x100000 0x20000>; - }; - - partition@120000 { - label = "oftree"; - reg = <0x120000 0x20000>; - }; - - partition@140000 { - label = "kernel"; - reg = <0x140000 0x0>; - }; +&som_flash { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x100000>; + }; + + partition@100000 { + label = "barebox-environment"; + reg = <0x100000 0x20000>; + }; + + partition@120000 { + label = "oftree"; + reg = <0x120000 0x20000>; + }; + + partition@140000 { + label = "kernel"; + reg = <0x140000 0x0>; }; }; }; @@ -103,12 +101,12 @@ reg = <0x0 0x1000000>; }; - partition@400000 { + partition@1000000 { label = "barebox-environment"; reg = <0x1000000 0x100000>; }; - partition@500000 { + partition@1100000 { label = "root"; reg = <0x1100000 0x0>; }; diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c index 1b3cb70da8..c6d427a46c 100644 --- a/arch/arm/mach-imx/imx-bbu-internal.c +++ b/arch/arm/mach-imx/imx-bbu-internal.c @@ -593,9 +593,9 @@ int vf610_bbu_internal_mmc_register_handler(const char *name, __alias(imx6_bbu_internal_mmc_register_handler); /* - * Register an i.MX8MQ internal boot update handler for MMC/SD + * Register an i.MX8M* internal boot update handler for MMC/SD */ -int imx8mq_bbu_internal_mmc_register_handler(const char *name, +int imx8m_bbu_internal_mmc_register_handler(const char *name, const char *devicefile, unsigned long flags) __alias(imx6_bbu_internal_mmc_register_handler); @@ -643,7 +643,7 @@ int imx7_bbu_internal_mmcboot_register_handler(const char *name, unsigned long flags) __alias(imx_bbu_internal_mmcboot_register_handler); -int imx8mq_bbu_internal_mmcboot_register_handler(const char *name, +int imx8m_bbu_internal_mmcboot_register_handler(const char *name, const char *devicefile, unsigned long flags) __alias(imx_bbu_internal_mmcboot_register_handler); diff --git a/arch/arm/mach-imx/include/mach/bbu.h b/arch/arm/mach-imx/include/mach/bbu.h index 10638a7fc7..f2e326f475 100644 --- a/arch/arm/mach-imx/include/mach/bbu.h +++ b/arch/arm/mach-imx/include/mach/bbu.h @@ -74,10 +74,10 @@ int vf610_bbu_internal_spi_i2c_register_handler(const char *name, const char *de int imx7_bbu_internal_spi_i2c_register_handler(const char *name, const char *devicefile, unsigned long flags); -int imx8mq_bbu_internal_mmc_register_handler(const char *name, const char *devicefile, - unsigned long flags); -int imx8mq_bbu_internal_mmcboot_register_handler(const char *name, const char *devicefile, - unsigned long flags); +int imx8m_bbu_internal_mmc_register_handler(const char *name, const char *devicefile, + unsigned long flags); +int imx8m_bbu_internal_mmcboot_register_handler(const char *name, const char *devicefile, + unsigned long flags); int imx_bbu_external_nor_register_handler(const char *name, const char *devicefile, unsigned long flags); @@ -161,15 +161,15 @@ static inline int vf610_bbu_internal_mmc_register_handler(const char *name, cons return -ENOSYS; } -static inline int imx8mq_bbu_internal_mmc_register_handler(const char *name, const char *devicefile, - unsigned long flags) +static inline int imx8m_bbu_internal_mmc_register_handler(const char *name, const char *devicefile, + unsigned long flags) { return -ENOSYS; } -static inline int imx8mq_bbu_internal_mmcboot_register_handler(const char *name, - const char *devicefile, - unsigned long flags) +static inline int imx8m_bbu_internal_mmcboot_register_handler(const char *name, + const char *devicefile, + unsigned long flags) { return -ENOSYS; } diff --git a/arch/arm/mach-imx/include/mach/imx-gpio.h b/arch/arm/mach-imx/include/mach/imx-gpio.h index 891c33a3f4..0cfd16f4fa 100644 --- a/arch/arm/mach-imx/include/mach/imx-gpio.h +++ b/arch/arm/mach-imx/include/mach/imx-gpio.h @@ -50,6 +50,7 @@ static inline void imx31_gpio_direction_output(void *base, int gpio, int value) #define imx51_gpio_direction_output(base, gpio, value) imx31_gpio_direction_output(base, gpio,value) #define imx53_gpio_direction_output(base, gpio, value) imx31_gpio_direction_output(base, gpio,value) #define imx6_gpio_direction_output(base, gpio, value) imx31_gpio_direction_output(base, gpio,value) +#define imx8m_gpio_direction_output(base, gpio, value) imx31_gpio_direction_output(base, gpio,value) static inline void imx1_gpio_direction_input(void *base, int gpio, int value) { @@ -69,6 +70,7 @@ static inline void imx31_gpio_direction_input(void *base, int gpio) #define imx51_gpio_direction_input(base, gpio, value) imx31_gpio_direction_input(base, gpio) #define imx53_gpio_direction_input(base, gpio, value) imx31_gpio_direction_input(base, gpio) #define imx6_gpio_direction_input(base, gpio) imx31_gpio_direction_input(base, gpio) +#define imx8m_gpio_direction_input(base, gpio) imx31_gpio_direction_input(base, gpio) #define imx1_gpio_val(base, gpio) readl(base + 0x1c) & (1 << gpio) ? 1 : 0 #define imx21_gpio_val(base, gpio) imx1_gpio_val(base, gpio) @@ -80,5 +82,6 @@ static inline void imx31_gpio_direction_input(void *base, int gpio) #define imx51_gpio_val(base, gpio) imx31_gpio_val(base, gpio) #define imx53_gpio_val(base, gpio) imx31_gpio_val(base, gpio) #define imx6_gpio_val(base, gpio) imx31_gpio_val(base, gpio) +#define imx8m_gpio_val(base, gpio) imx31_gpio_val(base, gpio) #endif /* __MACH_IMX_GPIO_H */ diff --git a/arch/arm/mach-imx/include/mach/ocotp.h b/arch/arm/mach-imx/include/mach/ocotp.h index 7ba5da156b..20205c5da7 100644 --- a/arch/arm/mach-imx/include/mach/ocotp.h +++ b/arch/arm/mach-imx/include/mach/ocotp.h @@ -26,8 +26,8 @@ #define OCOTP_BIT(n) FIELD_PREP(OCOTP_BIT_MASK, n) #define OCOTP_WIDTH(n) FIELD_PREP(OCOTP_WIDTH_MASK, (n) - 1) -#define OCOTP_OFFSET_CFG0 0x410 -#define OCOTP_OFFSET_CFG1 0x420 +#define OCOTP_UID_L 0x410 +#define OCOTP_UID_H 0x420 int imx_ocotp_read_field(uint32_t field, unsigned *value); @@ -39,9 +39,9 @@ static inline u64 imx_ocotp_read_uid(void __iomem *ocotp) { u64 uid; - uid = readl(ocotp + OCOTP_OFFSET_CFG0); + uid = readl(ocotp + OCOTP_UID_H); uid <<= 32; - uid |= readl(ocotp + OCOTP_OFFSET_CFG1); + uid |= readl(ocotp + OCOTP_UID_L); return uid; } diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index aaa535f073..9d301f7ae8 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig @@ -4,17 +4,12 @@ config ARCH_TEXT_BASE hex default 0x0 -choice - prompt "ARM Board type" - config MACH_VEXPRESS bool "ARM Vexpress" - select RELOCATABLE - select HAVE_PBL_MULTI_IMAGES - select OFTREE - select OFDEVICE - select COMMON_CLK_OF_PROVIDER -endchoice +config MACH_VIRT + bool "QEMU virt" + select ARM_PSCI_CLIENT + select BOARD_ARM_GENERIC_DT endif diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 7a8f010506..48f97c4bbf 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -175,6 +175,9 @@ config CPU_LOONGSON1B bool "Loongson 1B" depends on SYS_HAS_CPU_LOONGSON1B select CPU_GS232 + select CLKDEV_LOOKUP + select COMMON_CLK + select COMMON_CLK_OF_PROVIDER help The Loongson 1B is a 32-bit SoC, which implements the MIPS32 release 2 instruction set. diff --git a/arch/mips/dts/loongson-ls1b.dts b/arch/mips/dts/loongson-ls1b.dts index 6b53311982..89cce5636b 100644 --- a/arch/mips/dts/loongson-ls1b.dts +++ b/arch/mips/dts/loongson-ls1b.dts @@ -6,6 +6,12 @@ model = "Loongson Tech LS1B Demo Board"; compatible = "loongson,ls1b"; + oscillator: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33000000>; + }; + memory@0 { device_type = "memory"; reg = <0x00000000 0x4000000>; diff --git a/arch/mips/dts/ls1b.dtsi b/arch/mips/dts/ls1b.dtsi index cb85814af4..3b57093c9b 100644 --- a/arch/mips/dts/ls1b.dtsi +++ b/arch/mips/dts/ls1b.dtsi @@ -1,3 +1,5 @@ +#include <dt-bindings/clock/ls1b-clk.h> + / { #address-cells = <1>; #size-cells = <1>; @@ -13,7 +15,7 @@ compatible = "ns16550a"; reg = <0x1fe40000 0x8>; reg-shift = <0>; - clock-frequency = <83000000>; + clocks = <&pll LS1B_CLK_APB_DIV>; status = "disabled"; }; @@ -21,7 +23,7 @@ compatible = "ns16550a"; reg = <0x1fe44000 0x8>; reg-shift = <0>; - clock-frequency = <83000000>; + clocks = <&pll LS1B_CLK_APB_DIV>; status = "disabled"; }; @@ -29,7 +31,7 @@ compatible = "ns16550a"; reg = <0x1fe48000 0x8>; reg-shift = <0>; - clock-frequency = <83000000>; + clocks = <&pll LS1B_CLK_APB_DIV>; status = "disabled"; }; @@ -37,8 +39,15 @@ compatible = "ns16550a"; reg = <0x1fe4c000 0x8>; reg-shift = <0>; - clock-frequency = <83000000>; + clocks = <&pll LS1B_CLK_APB_DIV>; status = "disabled"; }; + + pll: pll@1fe78030 { + compatible = "loongson,ls1b-pll"; + #clock-cells = <1>; + reg = <0x1fe78030 0x8>; + clocks = <&oscillator>; + }; }; }; diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index 113b619fc3..d9fc0c947b 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -11,17 +11,13 @@ config SANDBOX select BLOCK_WRITE select PARTITION_DISK select ARCH_HAS_STACK_DUMP if ASAN + select GENERIC_FIND_NEXT_BIT default y config ARCH_TEXT_BASE hex default 0x00000000 -config LINUX - bool - default y - select GENERIC_FIND_NEXT_BIT - config SANDBOX_REEXEC prompt "exec(2) reset handler" def_bool y diff --git a/commands/Kconfig b/commands/Kconfig index 8b4ed9aa53..03ddfc8870 100644 --- a/commands/Kconfig +++ b/commands/Kconfig @@ -2058,7 +2058,7 @@ config CMD_KEYSTORE config CMD_LINUX_EXEC bool "linux exec" - depends on LINUX + depends on SANDBOX help Execute a command on the host diff --git a/commands/imd.c b/commands/imd.c index 912f065c9e..9f7ac79f8f 100644 --- a/commands/imd.c +++ b/commands/imd.c @@ -31,6 +31,7 @@ BAREBOX_CMD_HELP_TEXT("Options:") BAREBOX_CMD_HELP_OPT ("-t <type>", "only show information of <type>") BAREBOX_CMD_HELP_OPT ("-n <no>", "for tags with multiple strings only show string <no>") BAREBOX_CMD_HELP_OPT ("-s VARNAME", "set variable VARNAME instead of showing information") +BAREBOX_CMD_HELP_OPT ("-v", "Be verbose") BAREBOX_CMD_HELP_OPT ("-V", "Verify checksum of FILE") BAREBOX_CMD_HELP_OPT ("-c", "Create checksum for FILE and write it to the crc32 tag.") BAREBOX_CMD_HELP_TEXT("") diff --git a/common/imd.c b/common/imd.c index 4fd4431aa9..4aca8ea78f 100644 --- a/common/imd.c +++ b/common/imd.c @@ -489,10 +489,15 @@ int imd_command(int argc, char *argv[]) goto out; } - if (checksum) - imd_write_crc32(buf, imd_start, filename, size); - if (verify) - imd_verify_crc32(buf, size); + if (checksum) { + ret = imd_write_crc32(buf, imd_start, filename, size); + goto out; + } + + if (verify) { + ret = imd_verify_crc32(buf, size); + goto out; + } if (type == IMD_TYPE_INVALID) { imd_for_each(imd_start, imd) { diff --git a/common/usbgadget.c b/common/usbgadget.c index fb508db947..8b351c7bf4 100644 --- a/common/usbgadget.c +++ b/common/usbgadget.c @@ -102,12 +102,18 @@ int usbgadget_register(bool dfu, const char *dfu_opts, static int usbgadget_autostart_set(struct param_d *param, void *ctx) { + static bool started; bool fastboot_bbu = get_fastboot_bbu(); + int err; - if (!IS_ENABLED(CONFIG_USB_GADGET_AUTOSTART) || !autostart) + if (!IS_ENABLED(CONFIG_USB_GADGET_AUTOSTART) || !autostart || started) return 0; - return usbgadget_register(true, NULL, true, NULL, acm, fastboot_bbu); + err = usbgadget_register(true, NULL, true, NULL, acm, fastboot_bbu); + if (!err) + started = true; + + return err; } static int usbgadget_globalvars_init(void) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 09032744a0..04c797e7e0 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -19,4 +19,5 @@ obj-$(CONFIG_ARCH_IMX) += imx/ obj-$(CONFIG_COMMON_CLK_AT91) += at91/ obj-$(CONFIG_ARCH_STM32MP) += clk-stm32mp1.o obj-$(CONFIG_MACH_VEXPRESS) += vexpress/ +obj-$(CONFIG_MACH_MIPS_LOONGSON)+= loongson/ obj-$(CONFIG_ARCH_LAYERSCAPE) += clk-qoric.o diff --git a/drivers/clk/imx/clk-imx6.c b/drivers/clk/imx/clk-imx6.c index cb03024458..6935a8e852 100644 --- a/drivers/clk/imx/clk-imx6.c +++ b/drivers/clk/imx/clk-imx6.c @@ -482,9 +482,9 @@ static void init_ldb_clks(struct device_node *np, void __iomem *ccm_base) of_assigned_ldb_sels(np, &sel[0][3], &sel[1][3]); for (i = 0; i < 2; i++) { - /* Warn if a glitch might have been introduced already */ + /* log if a glitch might have been introduced already */ if (sel[i][0] != LDB_DI_SEL_MMDC_CH1_AXI) { - pr_warn("ccm: ldb_di%d_sel already changed from reset value: %d\n", + pr_debug("ccm: ldb_di%d_sel already changed from reset value: %d\n", i, sel[i][0]); } diff --git a/drivers/clk/loongson/Makefile b/drivers/clk/loongson/Makefile new file mode 100644 index 0000000000..dd76b2518c --- /dev/null +++ b/drivers/clk/loongson/Makefile @@ -0,0 +1,2 @@ +obj-$(CONFIG_BOARD_LOONGSON_TECH_LS1B) += clk-ls1b200.o + diff --git a/drivers/clk/loongson/clk-ls1b200.c b/drivers/clk/loongson/clk-ls1b200.c new file mode 100644 index 0000000000..66f8e261ac --- /dev/null +++ b/drivers/clk/loongson/clk-ls1b200.c @@ -0,0 +1,151 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Based on the ath79 clock code by Antony Pavlov <antonynpavlov@gmail.com> + * Barebox drivers/clk/clk-ar933x.c + * + * Copyright (C) 2020 Du Huanpeng <u74147@gmail.com> + */ + +#include <common.h> +#include <init.h> +#include <io.h> +#include <linux/clk.h> +#include <linux/clkdev.h> +#include <linux/err.h> + +#include <dt-bindings/clock/ls1b-clk.h> + +#define LS1B_CPU_DIV_SHIFT 20 +#define LS1B_CPU_DIV_WIDTH 4 + +#define LS1B_DDR_DIV_SHIFT 14 +#define LS1B_DDR_DIV_WIDTH 4 + +#define LS1B_DC_DIV_SHIFT 26 +#define LS1B_DC_DIV_WIDTH 4 + +#define LS1B_CLK_APB_MULT 1 +#define LS1B_CLK_APB_DIV2 2 + +/* register offset */ +#define PLL_FREQ 0 +#define PLL_DIV_PARAM 4 + +static struct clk *clks[LS1B_CLK_END]; +static struct clk_onecell_data clk_data; + +struct clk_ls1b200 { + struct clk clk; + void __iomem *base; + int div_shift; + int div_mask; + const char *parent; +}; + +static unsigned long clk_ls1b200_recalc_rate(struct clk *clk, unsigned long parent_rate) +{ + int n; + unsigned long rate; + int pll_freq; + struct clk_ls1b200 *ls1bclk; + + ls1bclk = container_of(clk, struct clk_ls1b200, clk); + pll_freq = __raw_readl(ls1bclk->base); + + n = 12 * 1024; + n += (pll_freq & 0x3F) * 1024; + n += (pll_freq >> 8) & 0x3FF; + + rate = parent_rate / 2 / 1024; + /* avoid overflow. */ + rate *= n; + + return rate; +} + +struct clk_ops clk_ls1b200_ops = { + .recalc_rate = clk_ls1b200_recalc_rate, +}; + +static struct clk *clk_ls1b200(const char *name, const char *parent, + void __iomem *base, int div_shift, int div_mask) +{ + struct clk_ls1b200 *f = xzalloc(sizeof(struct clk_ls1b200)); + + f->parent = parent; + f->base = base; + f->div_shift = div_shift; + f->div_mask = div_mask; + + f->clk.ops = &clk_ls1b200_ops; + f->clk.name = name; + f->clk.parent_names = &f->parent; + f->clk.num_parents = 1; + + clk_register(&f->clk); + + return &f->clk; +} + +static const char * const cpu_mux[] = {"cpu_div", "oscillator", }; +static const char * const ddr_mux[] = {"ddr_div", "oscillator", }; +static const char * const dc_mux[] = {"dc_div", "oscillator", }; + +static void ls1b200_pll_init(void __iomem *base) +{ + clks[LS1B_CLK_PLL] = clk_ls1b200("pll", "oscillator", base + PLL_FREQ, 0, 0); + + clks[LS1B_CLK_CPU_DIV] = clk_divider("cpu_div", "pll", 0, + base + PLL_DIV_PARAM, LS1B_CPU_DIV_SHIFT, LS1B_CPU_DIV_WIDTH, CLK_DIVIDER_ONE_BASED); + clks[LS1B_CLK_CPU_MUX] = clk_mux("cpu_mux", 0, base + PLL_DIV_PARAM, + 8, 1, cpu_mux, ARRAY_SIZE(cpu_mux), 0); + + clks[LS1B_CLK_DDR_DIV] = clk_divider("ddr_div", "pll", 0, + base + PLL_DIV_PARAM, LS1B_DDR_DIV_SHIFT, LS1B_DDR_DIV_WIDTH, CLK_DIVIDER_ONE_BASED); + clks[LS1B_CLK_DDR_MUX] = clk_mux("ddr_mux", 0, base + PLL_DIV_PARAM, + 10, 1, ddr_mux, ARRAY_SIZE(ddr_mux), 0); + clks[LS1B_CLK_APB_DIV] = clk_fixed_factor("apb_div", "ddr_mux", LS1B_CLK_APB_MULT, LS1B_CLK_APB_DIV2, 0); + + clks[LS1B_CLK_DIV4] = clk_fixed_factor("dc_div4", "pll", 1, 4, 0); + + clks[LS1B_CLK_DC_DIV] = clk_divider("dc_div", "dc_div4", 0, + base + PLL_DIV_PARAM, LS1B_DC_DIV_SHIFT, LS1B_DC_DIV_WIDTH, CLK_DIVIDER_ONE_BASED); + clks[LS1B_CLK_DC_MUX] = clk_mux("dc_mux", 0, base + PLL_DIV_PARAM, + 10, 1, dc_mux, ARRAY_SIZE(dc_mux), 0); +} + +static int ls1b200_clk_probe(struct device_d *dev) +{ + struct resource *iores; + void __iomem *base; + + iores = dev_request_mem_resource(dev, 0); + if (IS_ERR(iores)) + return PTR_ERR(iores); + base = IOMEM(iores->start); + + /* now got the controller base address */ + ls1b200_pll_init(base); + + clk_data.clks = clks; + clk_data.clk_num = ARRAY_SIZE(clks); + of_clk_add_provider(dev->device_node, of_clk_src_onecell_get, &clk_data); + + return 0; +} + +static __maybe_unused struct of_device_id ls1b200_clk_dt_ids[] = { + { + .compatible = "loongson,ls1b-pll", + }, { + /* sentinel */ + } +}; + +static struct driver_d ls1b200_clk_driver = { + .probe = ls1b200_clk_probe, + .name = "ls1b-clk", + .of_compatible = DRV_OF_COMPAT(ls1b200_clk_dt_ids), +}; + +postcore_platform_driver(ls1b200_clk_driver); diff --git a/drivers/clocksource/amba-sp804.c b/drivers/clocksource/amba-sp804.c index 8ed5ae4be0..0c0ecaa83a 100644 --- a/drivers/clocksource/amba-sp804.c +++ b/drivers/clocksource/amba-sp804.c @@ -85,4 +85,4 @@ struct amba_driver sp804_driver = { .id_table = sp804_ids, }; -coredevice_platform_driver(sp804_driver); +coredevice_amba_driver(sp804_driver); diff --git a/drivers/hab/habv4.c b/drivers/hab/habv4.c index e94f827549..c2acb81369 100644 --- a/drivers/hab/habv4.c +++ b/drivers/hab/habv4.c @@ -500,11 +500,34 @@ static bool is_known_rng_fail_event(const uint8_t *data, size_t len) return false; } +static uint8_t *hab_get_event(const struct habv4_rvt *rvt, int index, int *len) +{ + enum hab_status err; + uint8_t *buf; + + err = rvt->report_event(HAB_STATUS_ANY, index, NULL, len); + if (err != HAB_STATUS_SUCCESS) + return NULL; + + buf = malloc(*len); + if (!buf) + return NULL; + + err = rvt->report_event(HAB_STATUS_ANY, index, buf, len); + if (err != HAB_STATUS_SUCCESS) { + pr_err("Unexpected HAB return code\n"); + free(buf); + return NULL; + } + + return buf; +} + static int habv4_get_status(const struct habv4_rvt *rvt) { - uint8_t data[256]; + uint8_t *data; uint32_t len; - uint32_t index = 0; + int i; enum hab_status status; enum hab_config config = 0x0; enum hab_state state = 0x0; @@ -524,40 +547,24 @@ static int habv4_get_status(const struct habv4_rvt *rvt) return 0; } - len = sizeof(data); - while (rvt->report_event(HAB_STATUS_WARNING, index, data, &len) == HAB_STATUS_SUCCESS) { + for (i = 0;; i++) { + data = hab_get_event(rvt, i, &len); + if (!data) + break; /* suppress RNG self-test fail events if they can be handled in software */ if (IS_ENABLED(CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_SELF_TEST) && is_known_rng_fail_event(data, len)) { pr_debug("RNG self-test failure detected, will run software self-test\n"); } else { - pr_err("-------- HAB warning Event %d --------\n", index); + pr_err("-------- HAB Event %d --------\n", i); pr_err("event data:\n"); habv4_display_event(data, len); } - len = sizeof(data); - index++; + free(data); } - len = sizeof(data); - index = 0; - while (rvt->report_event(HAB_STATUS_FAILURE, index, data, &len) == HAB_STATUS_SUCCESS) { - pr_err("-------- HAB failure Event %d --------\n", index); - pr_err("event data:\n"); - - habv4_display_event(data, len); - len = sizeof(data); - index++; - } - - /* Check reason for stopping */ - len = sizeof(data); - index = 0; - if (rvt->report_event(HAB_STATUS_ANY, index, NULL, &len) == HAB_STATUS_SUCCESS) - pr_err("ERROR: Recompile with larger event data buffer (at least %d bytes)\n\n", len); - return -EPERM; } diff --git a/drivers/mci/mmci.c b/drivers/mci/mmci.c index f45557d4f7..53f25dff96 100644 --- a/drivers/mci/mmci.c +++ b/drivers/mci/mmci.c @@ -709,9 +709,4 @@ static struct amba_driver mmci_driver = { .id_table = mmci_ids, }; -static int mmci_init(void) -{ - amba_driver_register(&mmci_driver); - return 0; -} -device_initcall(mmci_init); +device_amba_driver(mmci_driver); diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 2c3c0b360f..5db0b5625e 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -3415,6 +3415,9 @@ int nand_write_oob_std(struct nand_chip *chip, int page) { struct mtd_info *mtd = nand_to_mtd(chip); + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + return nand_prog_page_op(chip, page, mtd->writesize, chip->oob_poi, mtd->oobsize); } @@ -3434,6 +3437,9 @@ static int nand_write_oob_syndrome(struct nand_chip *chip, int page) int ret, i, len, pos, sndcmd = 0, steps = chip->ecc.steps; const uint8_t *bufpoi = chip->oob_poi; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + /* * data-ecc-data-ecc ... ecc-oob * or @@ -3635,6 +3641,9 @@ int nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf, struct mtd_info *mtd = nand_to_mtd(chip); int ret; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + ret = nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize); if (ret) return ret; @@ -3673,6 +3682,9 @@ int nand_monolithic_write_page_raw(struct nand_chip *chip, const u8 *buf, unsigned int size = mtd->writesize; u8 *write_buf = (u8 *)buf; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + if (oob_required) { size += mtd->oobsize; @@ -3705,6 +3717,9 @@ static int nand_write_page_raw_syndrome(struct nand_chip *chip, uint8_t *oob = chip->oob_poi; int steps, size, ret; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); if (ret) return ret; @@ -3767,6 +3782,9 @@ static int nand_write_page_swecc(struct nand_chip *chip, const uint8_t *buf, uint8_t *ecc_calc = chip->ecc.calc_buf; const uint8_t *p = buf; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + /* Software ECC calculation */ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) chip->ecc.calculate(chip, p, &ecc_calc[i]); @@ -3796,6 +3814,9 @@ static int nand_write_page_hwecc(struct nand_chip *chip, const uint8_t *buf, uint8_t *ecc_calc = chip->ecc.calc_buf; const uint8_t *p = buf; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); if (ret) return ret; @@ -3847,6 +3868,9 @@ static int nand_write_subpage_hwecc(struct nand_chip *chip, uint32_t offset, int oob_bytes = mtd->oobsize / ecc_steps; int step, ret; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); if (ret) return ret; @@ -3914,6 +3938,9 @@ static int nand_write_page_syndrome(struct nand_chip *chip, const uint8_t *buf, uint8_t *oob = chip->oob_poi; int ret; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + ret = nand_prog_page_begin_op(chip, page, 0, NULL, 0); if (ret) return ret; @@ -3980,6 +4007,9 @@ static int nand_write_page(struct nand_chip *chip, uint32_t offset, struct mtd_info *mtd = nand_to_mtd(chip); int status, subpage; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && chip->ecc.write_subpage) subpage = offset || (data_len < mtd->writesize); @@ -4026,12 +4056,15 @@ static int nand_do_write_ops(struct nand_chip *chip, loff_t to, int ret; int oob_required = oob ? 1 : 0; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + ops->retlen = 0; if (!writelen) return 0; /* Reject writes, which are not page aligned */ - if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { + if (NOTALIGNED(to)) { pr_notice("%s: attempt to write non page aligned data\n", __func__); return -EINVAL; @@ -4143,6 +4176,9 @@ static int nand_write_oob(struct mtd_info *mtd, loff_t to, struct nand_chip *chip = mtd_to_nand(mtd); int ret; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + ops->retlen = 0; ret = nand_get_device(chip); @@ -4178,6 +4214,9 @@ out: */ static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) { + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + return nand_erase_nand(mtd_to_nand(mtd), instr, 0); } @@ -4197,6 +4236,9 @@ int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr, int page, pages_per_block, ret, chipnr; loff_t len; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + pr_debug("%s: start = 0x%012llx, len = %llu\n", __func__, (unsigned long long)instr->addr, (unsigned long long)instr->len); @@ -4335,6 +4377,9 @@ static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) { int ret; + if (!IS_ENABLED(CONFIG_MTD_WRITE)) + return -ENOTSUPP; + ret = nand_block_isbad(mtd, ofs); if (ret) { /* If it was bad already, return success and do nothing */ diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index f582799636..a86b5b2da3 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c @@ -1018,14 +1018,16 @@ static int check_create(struct nand_chip *this, uint8_t *buf, } /* Write the bad block table to the device? */ - if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE)) { + if ((writeops & 0x01) && (td->options & NAND_BBT_WRITE) && + IS_ENABLED(CONFIG_MTD_WRITE)) { res = write_bbt(this, buf, td, md, chipsel); if (res < 0) return res; } /* Write the mirror bad block table to the device? */ - if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE)) { + if ((writeops & 0x02) && md && (md->options & NAND_BBT_WRITE) && + IS_ENABLED(CONFIG_MTD_WRITE)) { res = write_bbt(this, buf, md, td, chipsel); if (res < 0) return res; @@ -1074,13 +1076,13 @@ int nand_update_bbt(struct nand_chip *this, loff_t offs) md->version[chip]++; /* Write the bad block table to the device? */ - if (td->options & NAND_BBT_WRITE) { + if ((td->options & NAND_BBT_WRITE) && IS_ENABLED(CONFIG_MTD_WRITE)) { res = write_bbt(this, buf, td, md, chipsel); if (res < 0) goto out; } /* Write the mirror bad block table to the device? */ - if (md && (md->options & NAND_BBT_WRITE)) { + if (md && (md->options & NAND_BBT_WRITE) && IS_ENABLED(CONFIG_MTD_WRITE)) { res = write_bbt(this, buf, md, td, chipsel); } diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c index e3d36a1cf4..1d81500bce 100644 --- a/drivers/mtd/nand/nand_omap_gpmc.c +++ b/drivers/mtd/nand/nand_omap_gpmc.c @@ -91,6 +91,8 @@ #define BCH8_MAX_ERROR 8 /* upto 8 bit correctable */ +#define BADBLOCK_MARKER_LENGTH 2 + static const uint8_t bch8_vector[] = {0xf3, 0xdb, 0x14, 0x16, 0x8b, 0xd2, 0xbe, 0xcc, 0xac, 0x6b, 0xff, 0x99, 0x7b}; static u_char bch16_vector[] = {0xf5, 0x24, 0x1c, 0xd0, 0x61, 0xb3, 0xf1, 0x55, @@ -497,9 +499,9 @@ static void omap_enable_hwecc(struct nand_chip *nand, int mode) case OMAP_ECC_BCH16_CODE_HW: bch_mod = 2; if (mode == NAND_ECC_READ) { - bch_wrapmode = 4; - eccsize0 = 4; /* ECC bits in nibbles per sector */ - eccsize1 = 52; /* non-ECC bits in nibbles per sector */ + bch_wrapmode = 1; + eccsize0 = 52; /* ECC bits in nibbles per sector */ + eccsize1 = 0; /* non-ECC bits in nibbles per sector */ } else { bch_wrapmode = 4; eccsize0 = 4; /* extra bits in nibbles per sector */ @@ -964,7 +966,12 @@ static int gpmc_read_page_hwecc_elm(struct nand_chip *chip, uint8_t *buf, nand_read_page_op(chip, page, 0, NULL, 0); chip->legacy.read_buf(chip, buf, mtd->writesize); - chip->legacy.read_buf(chip, chip->oob_poi, mtd->oobsize); + + /* Read oob bytes */ + nand_change_read_column_op(chip, + mtd->writesize + BADBLOCK_MARKER_LENGTH, + chip->oob_poi + BADBLOCK_MARKER_LENGTH, + chip->ecc.total, false); ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, chip->ecc.total); diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 76509a52a1..0d55ea7a3b 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -242,7 +242,7 @@ config DRIVER_NET_SMC91111 config DRIVER_NET_TAP bool "tap Ethernet driver" - depends on LINUX + depends on SANDBOX config DRIVER_NET_EFI_SNP bool "EFI SNP ethernet driver" diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 14cd430ee4..5c6f0e88e3 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -52,7 +52,7 @@ config DRIVER_SERIAL_AUART bool "i.MX23/i.MX28 application UART serial driver" config DRIVER_SERIAL_LINUX_CONSOLE - depends on LINUX + depends on SANDBOX default y bool "linux console driver" diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c index 865ecdddb2..9261d20f2a 100644 --- a/drivers/serial/amba-pl011.c +++ b/drivers/serial/amba-pl011.c @@ -237,10 +237,4 @@ struct amba_driver pl011_driver = { .id_table = pl011_ids, }; -static int pl011_init(void) -{ - amba_driver_register(&pl011_driver); - return 0; -} - -console_initcall(pl011_init); +console_amba_driver(pl011_driver); diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 977f6c0dba..7e0c570914 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -39,7 +39,7 @@ config USB_GADGET_AUTOSTART help Enabling this option allows to automatically start a dfu or fastboot gadget during boot. This behaviour is controlled with - the global.usbgadget.{dfu,fastboot}_function variable. + the global.usbgadget.dfu_function and global.fastboot.* variables. comment "USB Gadget drivers" diff --git a/drivers/usb/imx/chipidea-imx.c b/drivers/usb/imx/chipidea-imx.c index b1a77a1637..b144f41437 100644 --- a/drivers/usb/imx/chipidea-imx.c +++ b/drivers/usb/imx/chipidea-imx.c @@ -168,6 +168,9 @@ static int imx_chipidea_probe_dt(struct imx_chipidea *ci) "over-current-active-high", NULL)) ci->flags |= MXC_EHCI_OC_PIN_ACTIVE_LOW; + if (of_find_property(ci->dev->device_node, "power-active-high", NULL)) + ci->flags |= MXC_EHCI_PWR_PIN_ACTIVE_HIGH; + if (of_usb_get_maximum_speed(ci->dev->device_node, NULL) == USB_SPEED_FULL) ci->flags |= MXC_EHCI_PFSC; diff --git a/drivers/usb/imx/imx-usb-misc.c b/drivers/usb/imx/imx-usb-misc.c index 3a5ec236e5..b663d073aa 100644 --- a/drivers/usb/imx/imx-usb-misc.c +++ b/drivers/usb/imx/imx-usb-misc.c @@ -354,6 +354,7 @@ static __maybe_unused struct imx_usb_misc_data mx5_data = { #define MX6_USB_CTRL(n) ((n) * 4) #define MX6_USB_CTRL_OVER_CUR_DIS (1 << 7) #define MX6_USB_CTRL_OVER_CUR_ACT_HIGH (1 << 8) +#define MX6_USB_CTRL_PWR_POLARITY (1 << 9) static void mx6_hsic_pullup(unsigned long reg, int on) { @@ -380,6 +381,8 @@ static __maybe_unused int mx6_initialize_usb_hw(void __iomem *base, int port, val = readl(base + MX6_USB_CTRL(port)); if (flags & MXC_EHCI_DISABLE_OVERCURRENT) val |= MX6_USB_CTRL_OVER_CUR_DIS; + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + val |= MX6_USB_CTRL_PWR_POLARITY; writel(val, base + MX6_USB_CTRL(port)); break; case 2: /* HSIC port */ @@ -454,6 +457,8 @@ static int usbmisc_imx7d_init(void __iomem *base, int port, else reg |= MX6_USB_CTRL_OVER_CUR_ACT_HIGH; } + if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH) + reg |= MX6_USB_CTRL_PWR_POLARITY; writel(reg, base); reg = readl(base + MX7D_USBNC_USB_CTRL2); diff --git a/dts/Bindings/clock/imx5-clock.yaml b/dts/Bindings/clock/imx5-clock.yaml index 4d9e7c73dc..90775c2669 100644 --- a/dts/Bindings/clock/imx5-clock.yaml +++ b/dts/Bindings/clock/imx5-clock.yaml @@ -57,7 +57,7 @@ examples: }; can@53fc8000 { - compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; + compatible = "fsl,imx53-flexcan", "fsl,imx25-flexcan"; reg = <0x53fc8000 0x4000>; interrupts = <82>; clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>, <&clks IMX5_CLK_CAN1_SERIAL_GATE>; diff --git a/dts/Bindings/display/brcm,bcm2711-hdmi.yaml b/dts/Bindings/display/brcm,bcm2711-hdmi.yaml index 03a76729d2..7ce06f9f9f 100644 --- a/dts/Bindings/display/brcm,bcm2711-hdmi.yaml +++ b/dts/Bindings/display/brcm,bcm2711-hdmi.yaml @@ -76,6 +76,12 @@ properties: resets: maxItems: 1 + wifi-2.4ghz-coexistence: + type: boolean + description: > + Should the pixel frequencies in the WiFi frequencies range be + avoided? + required: - compatible - reg diff --git a/dts/Bindings/net/can/fsl,flexcan.yaml b/dts/Bindings/net/can/fsl,flexcan.yaml index 43df15ba8f..13875eab2e 100644 --- a/dts/Bindings/net/can/fsl,flexcan.yaml +++ b/dts/Bindings/net/can/fsl,flexcan.yaml @@ -20,8 +20,6 @@ properties: - fsl,imx8qm-flexcan - fsl,imx8mp-flexcan - fsl,imx6q-flexcan - - fsl,imx53-flexcan - - fsl,imx35-flexcan - fsl,imx28-flexcan - fsl,imx25-flexcan - fsl,p1010-flexcan @@ -30,6 +28,11 @@ properties: - fsl,lx2160ar1-flexcan - items: - enum: + - fsl,imx53-flexcan + - fsl,imx35-flexcan + - const: fsl,imx25-flexcan + - items: + - enum: - fsl,imx7d-flexcan - fsl,imx6ul-flexcan - fsl,imx6sx-flexcan @@ -81,11 +84,12 @@ properties: req_bit is the bit offset of CAN stop request. $ref: /schemas/types.yaml#/definitions/phandle-array items: - - description: The 'gpr' is the phandle to general purpose register node. - - description: The 'req_gpr' is the gpr register offset of CAN stop request. - maximum: 0xff - - description: The 'req_bit' is the bit offset of CAN stop request. - maximum: 0x1f + items: + - description: The 'gpr' is the phandle to general purpose register node. + - description: The 'req_gpr' is the gpr register offset of CAN stop request. + maximum: 0xff + - description: The 'req_bit' is the bit offset of CAN stop request. + maximum: 0x1f fsl,clk-source: description: | diff --git a/dts/Bindings/net/can/tcan4x5x.txt b/dts/Bindings/net/can/tcan4x5x.txt index 3613c2c8f7..0968b40aef 100644 --- a/dts/Bindings/net/can/tcan4x5x.txt +++ b/dts/Bindings/net/can/tcan4x5x.txt @@ -33,7 +33,7 @@ tcan4x5x: tcan4x5x@0 { spi-max-frequency = <10000000>; bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; interrupt-parent = <&gpio1>; - interrupts = <14 GPIO_ACTIVE_LOW>; + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; device-wake-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; diff --git a/dts/Bindings/net/nfc/nxp-nci.txt b/dts/Bindings/net/nfc/nxp-nci.txt index cfaf889989..9e4dc510a4 100644 --- a/dts/Bindings/net/nfc/nxp-nci.txt +++ b/dts/Bindings/net/nfc/nxp-nci.txt @@ -25,7 +25,7 @@ Example (for ARM-based BeagleBone with NPC100 NFC controller on I2C2): clock-frequency = <100000>; interrupt-parent = <&gpio1>; - interrupts = <29 GPIO_ACTIVE_HIGH>; + interrupts = <29 IRQ_TYPE_LEVEL_HIGH>; enable-gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; firmware-gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>; diff --git a/dts/Bindings/net/nfc/pn544.txt b/dts/Bindings/net/nfc/pn544.txt index 92f399ec22..2bd82562ce 100644 --- a/dts/Bindings/net/nfc/pn544.txt +++ b/dts/Bindings/net/nfc/pn544.txt @@ -25,7 +25,7 @@ Example (for ARM-based BeagleBone with PN544 on I2C2): clock-frequency = <400000>; interrupt-parent = <&gpio1>; - interrupts = <17 GPIO_ACTIVE_HIGH>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; enable-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; firmware-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; diff --git a/dts/Bindings/sound/rt1015.txt b/dts/Bindings/sound/rt1015.txt index fcfd02d8d3..e498966d43 100644 --- a/dts/Bindings/sound/rt1015.txt +++ b/dts/Bindings/sound/rt1015.txt @@ -8,10 +8,16 @@ Required properties: - reg : The I2C address of the device. +Optional properties: + +- realtek,power-up-delay-ms + Set a delay time for flush work to be completed, + this value is adjustable depending on platform. Example: rt1015: codec@28 { compatible = "realtek,rt1015"; reg = <0x28>; + realtek,power-up-delay-ms = <50>; }; diff --git a/dts/include/dt-bindings/clock/ls1b-clk.h b/dts/include/dt-bindings/clock/ls1b-clk.h new file mode 100644 index 0000000000..2277225e39 --- /dev/null +++ b/dts/include/dt-bindings/clock/ls1b-clk.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2020 Du Huanpeng <u74147@gmail.com> + */ + +#ifndef __DT_BINDINGS_LS1B_CLK_H +#define __DT_BINDINGS_LS1B_CLK_H + +#define LS1B_CLK_PLL 0 +#define LS1B_CLK_CPU_DIV 1 +#define LS1B_CLK_CPU_MUX 2 +#define LS1B_CLK_DDR_DIV 3 +#define LS1B_CLK_DDR_MUX 4 +#define LS1B_CLK_APB_DIV 5 +#define LS1B_CLK_DC_DIV 6 +#define LS1B_CLK_DIV4 7 +#define LS1B_CLK_DC_MUX 8 + +#define LS1B_CLK_END 9 + +#endif /* __DT_BINDINGS_LS1B_CLK_H */ diff --git a/dts/src/arm/am437x-l4.dtsi b/dts/src/arm/am437x-l4.dtsi index c220dc3c4e..243e35f7a5 100644 --- a/dts/src/arm/am437x-l4.dtsi +++ b/dts/src/arm/am437x-l4.dtsi @@ -521,7 +521,7 @@ ranges = <0x0 0x100000 0x8000>; mac_sw: switch@0 { - compatible = "ti,am4372-cpsw","ti,cpsw-switch"; + compatible = "ti,am4372-cpsw-switch", "ti,cpsw-switch"; reg = <0x0 0x4000>; ranges = <0 0 0x4000>; clocks = <&cpsw_125mhz_gclk>, <&dpll_clksel_mac_clk>; diff --git a/dts/src/arm/dra76x.dtsi b/dts/src/arm/dra76x.dtsi index b69c7d40f5..2f32615111 100644 --- a/dts/src/arm/dra76x.dtsi +++ b/dts/src/arm/dra76x.dtsi @@ -32,8 +32,8 @@ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "int0", "int1"; - clocks = <&mcan_clk>, <&l3_iclk_div>; - clock-names = "cclk", "hclk"; + clocks = <&l3_iclk_div>, <&mcan_clk>; + clock-names = "hclk", "cclk"; bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>; }; }; diff --git a/dts/src/arm/exynos4412-odroid-common.dtsi b/dts/src/arm/exynos4412-odroid-common.dtsi index ab291cec65..2983e91bc7 100644 --- a/dts/src/arm/exynos4412-odroid-common.dtsi +++ b/dts/src/arm/exynos4412-odroid-common.dtsi @@ -122,7 +122,6 @@ }; &clock { - clocks = <&clock CLK_XUSBXTI>; assigned-clocks = <&clock CLK_FOUT_EPLL>; assigned-clock-rates = <45158401>; }; diff --git a/dts/src/arm/imx50-evk.dts b/dts/src/arm/imx50-evk.dts index 878e89c201..4ea5c23f18 100644 --- a/dts/src/arm/imx50-evk.dts +++ b/dts/src/arm/imx50-evk.dts @@ -59,7 +59,7 @@ MX50_PAD_CSPI_MISO__CSPI_MISO 0x00 MX50_PAD_CSPI_MOSI__CSPI_MOSI 0x00 MX50_PAD_CSPI_SS0__GPIO4_11 0xc4 - MX50_PAD_ECSPI1_MOSI__CSPI_SS1 0xf4 + MX50_PAD_ECSPI1_MOSI__GPIO4_13 0x84 >; }; diff --git a/dts/src/arm/imx6q-prti6q.dts b/dts/src/arm/imx6q-prti6q.dts index d112b50f8c..b4605edfd2 100644 --- a/dts/src/arm/imx6q-prti6q.dts +++ b/dts/src/arm/imx6q-prti6q.dts @@ -213,8 +213,8 @@ #size-cells = <0>; /* Microchip KSZ9031RNX PHY */ - rgmii_phy: ethernet-phy@4 { - reg = <4>; + rgmii_phy: ethernet-phy@0 { + reg = <0>; interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>; reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; diff --git a/dts/src/arm/imx6qdl-udoo.dtsi b/dts/src/arm/imx6qdl-udoo.dtsi index 828dd20cd2..d07d8f8345 100644 --- a/dts/src/arm/imx6qdl-udoo.dtsi +++ b/dts/src/arm/imx6qdl-udoo.dtsi @@ -98,7 +98,7 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/dts/src/arm/stm32mp15xx-dhcom-pdk2.dtsi b/dts/src/arm/stm32mp15xx-dhcom-pdk2.dtsi index 5dff24e39a..8456f172d4 100644 --- a/dts/src/arm/stm32mp15xx-dhcom-pdk2.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcom-pdk2.dtsi @@ -46,6 +46,16 @@ linux,code = <KEY_A>; gpios = <&gpiof 3 GPIO_ACTIVE_LOW>; }; + + /* + * The EXTi IRQ line 0 is shared with PMIC, + * so mark this as polled GPIO key. + */ + button-2 { + label = "TA3-GPIO-C"; + linux,code = <KEY_C>; + gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; + }; }; gpio-keys { @@ -59,13 +69,6 @@ wakeup-source; }; - button-2 { - label = "TA3-GPIO-C"; - linux,code = <KEY_C>; - gpios = <&gpioi 11 GPIO_ACTIVE_LOW>; - wakeup-source; - }; - button-3 { label = "TA4-GPIO-D"; linux,code = <KEY_D>; @@ -79,7 +82,7 @@ led-0 { label = "green:led5"; - gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>; + gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>; default-state = "off"; }; diff --git a/dts/src/arm/stm32mp15xx-dhcom-som.dtsi b/dts/src/arm/stm32mp15xx-dhcom-som.dtsi index b4b52cf634..f796a61503 100644 --- a/dts/src/arm/stm32mp15xx-dhcom-som.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcom-som.dtsi @@ -68,6 +68,7 @@ gpio = <&gpiog 3 GPIO_ACTIVE_LOW>; regulator-always-on; regulator-boot-on; + vin-supply = <&vdd>; }; }; @@ -202,6 +203,7 @@ vdda: ldo1 { regulator-name = "vdda"; + regulator-always-on; regulator-min-microvolt = <2900000>; regulator-max-microvolt = <2900000>; interrupts = <IT_CURLIM_LDO1 0>; diff --git a/dts/src/arm/stm32mp15xx-dhcor-som.dtsi b/dts/src/arm/stm32mp15xx-dhcor-som.dtsi index 04fbb324a5..803eb8bc9c 100644 --- a/dts/src/arm/stm32mp15xx-dhcor-som.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcor-som.dtsi @@ -21,6 +21,10 @@ }; }; +&dts { + status = "okay"; +}; + &i2c4 { pinctrl-names = "default"; pinctrl-0 = <&i2c4_pins_a>; diff --git a/dts/src/arm/sun6i-a31-hummingbird.dts b/dts/src/arm/sun6i-a31-hummingbird.dts index 049e6ab3cf..73de34ae37 100644 --- a/dts/src/arm/sun6i-a31-hummingbird.dts +++ b/dts/src/arm/sun6i-a31-hummingbird.dts @@ -154,7 +154,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; phy-handle = <&phy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/dts/src/arm/sun7i-a20-bananapi-m1-plus.dts b/dts/src/arm/sun7i-a20-bananapi-m1-plus.dts index 32d5d45a35..8945dbb114 100644 --- a/dts/src/arm/sun7i-a20-bananapi-m1-plus.dts +++ b/dts/src/arm/sun7i-a20-bananapi-m1-plus.dts @@ -130,7 +130,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; phy-handle = <&phy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-supply = <®_gmac_3v3>; status = "okay"; }; diff --git a/dts/src/arm/sun7i-a20-cubietruck.dts b/dts/src/arm/sun7i-a20-cubietruck.dts index 8c8dee6ea4..9109ca0919 100644 --- a/dts/src/arm/sun7i-a20-cubietruck.dts +++ b/dts/src/arm/sun7i-a20-cubietruck.dts @@ -151,7 +151,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; phy-handle = <&phy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/dts/src/arm/sun8i-a83t-bananapi-m3.dts b/dts/src/arm/sun8i-a83t-bananapi-m3.dts index 9d34eabba1..431f70234d 100644 --- a/dts/src/arm/sun8i-a83t-bananapi-m3.dts +++ b/dts/src/arm/sun8i-a83t-bananapi-m3.dts @@ -131,7 +131,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_sw>; phy-handle = <&rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; allwinner,rx-delay-ps = <700>; allwinner,tx-delay-ps = <700>; status = "okay"; diff --git a/dts/src/arm/sun8i-a83t-cubietruck-plus.dts b/dts/src/arm/sun8i-a83t-cubietruck-plus.dts index d9be511f05..d8326a5c68 100644 --- a/dts/src/arm/sun8i-a83t-cubietruck-plus.dts +++ b/dts/src/arm/sun8i-a83t-cubietruck-plus.dts @@ -183,7 +183,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_dldo4>; phy-handle = <&rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/dts/src/arm/sun8i-h3-orangepi-pc-plus.dts b/dts/src/arm/sun8i-h3-orangepi-pc-plus.dts index 71fb732089..babf4cf1b2 100644 --- a/dts/src/arm/sun8i-h3-orangepi-pc-plus.dts +++ b/dts/src/arm/sun8i-h3-orangepi-pc-plus.dts @@ -53,11 +53,6 @@ }; }; -&emac { - /* LEDs changed to active high on the plus */ - /delete-property/ allwinner,leds-active-low; -}; - &mmc1 { vmmc-supply = <®_vcc3v3>; bus-width = <4>; diff --git a/dts/src/arm/sun8i-h3-orangepi-plus2e.dts b/dts/src/arm/sun8i-h3-orangepi-plus2e.dts index 6dbf7b2e0c..b6ca45d18e 100644 --- a/dts/src/arm/sun8i-h3-orangepi-plus2e.dts +++ b/dts/src/arm/sun8i-h3-orangepi-plus2e.dts @@ -67,7 +67,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/dts/src/arm/sun8i-r40-bananapi-m2-ultra.dts b/dts/src/arm/sun8i-r40-bananapi-m2-ultra.dts index 2fc62ef0cb..a6a1087a0c 100644 --- a/dts/src/arm/sun8i-r40-bananapi-m2-ultra.dts +++ b/dts/src/arm/sun8i-r40-bananapi-m2-ultra.dts @@ -129,7 +129,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; phy-handle = <&phy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-supply = <®_dc1sw>; status = "okay"; }; diff --git a/dts/src/arm/sun9i-a80-cubieboard4.dts b/dts/src/arm/sun9i-a80-cubieboard4.dts index d3b337b043..484b93df20 100644 --- a/dts/src/arm/sun9i-a80-cubieboard4.dts +++ b/dts/src/arm/sun9i-a80-cubieboard4.dts @@ -129,7 +129,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; phy-handle = <&phy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-supply = <®_cldo1>; status = "okay"; }; diff --git a/dts/src/arm/sun9i-a80-optimus.dts b/dts/src/arm/sun9i-a80-optimus.dts index bbc6335e56..5c3580d712 100644 --- a/dts/src/arm/sun9i-a80-optimus.dts +++ b/dts/src/arm/sun9i-a80-optimus.dts @@ -124,7 +124,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; phy-handle = <&phy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-supply = <®_cldo1>; status = "okay"; }; diff --git a/dts/src/arm/sunxi-bananapi-m2-plus.dtsi b/dts/src/arm/sunxi-bananapi-m2-plus.dtsi index 39263e74fb..8e5cb3b3fd 100644 --- a/dts/src/arm/sunxi-bananapi-m2-plus.dtsi +++ b/dts/src/arm/sunxi-bananapi-m2-plus.dtsi @@ -126,7 +126,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/dts/src/arm/vf610-zii-dev-rev-b.dts b/dts/src/arm/vf610-zii-dev-rev-b.dts index e500911ce0..6f1e0f0d4f 100644 --- a/dts/src/arm/vf610-zii-dev-rev-b.dts +++ b/dts/src/arm/vf610-zii-dev-rev-b.dts @@ -406,6 +406,9 @@ }; }; +&mdio1 { + clock-frequency = <5000000>; +}; &iomuxc { pinctrl_gpio_e6185_eeprom_sel: pinctrl-gpio-e6185-eeprom-spi0 { diff --git a/dts/src/arm64/allwinner/sun50i-a64-bananapi-m64.dts b/dts/src/arm64/allwinner/sun50i-a64-bananapi-m64.dts index 3ea5182ca4..e5e840b9fb 100644 --- a/dts/src/arm64/allwinner/sun50i-a64-bananapi-m64.dts +++ b/dts/src/arm64/allwinner/sun50i-a64-bananapi-m64.dts @@ -105,7 +105,7 @@ &emac { pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&ext_rgmii_phy>; phy-supply = <®_dc1sw>; status = "okay"; diff --git a/dts/src/arm64/allwinner/sun50i-a64-orangepi-win.dts b/dts/src/arm64/allwinner/sun50i-a64-orangepi-win.dts index d894ec5fa8..70e31743f0 100644 --- a/dts/src/arm64/allwinner/sun50i-a64-orangepi-win.dts +++ b/dts/src/arm64/allwinner/sun50i-a64-orangepi-win.dts @@ -120,7 +120,7 @@ &emac { pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&ext_rgmii_phy>; phy-supply = <®_gmac_3v3>; status = "okay"; diff --git a/dts/src/arm64/allwinner/sun50i-a64-pine64-plus.dts b/dts/src/arm64/allwinner/sun50i-a64-pine64-plus.dts index b26181cf90..b54099b654 100644 --- a/dts/src/arm64/allwinner/sun50i-a64-pine64-plus.dts +++ b/dts/src/arm64/allwinner/sun50i-a64-pine64-plus.dts @@ -13,7 +13,7 @@ &emac { pinctrl-names = "default"; pinctrl-0 = <&rgmii_pins>; - phy-mode = "rgmii"; + phy-mode = "rgmii-txid"; phy-handle = <&ext_rgmii_phy>; status = "okay"; }; diff --git a/dts/src/arm64/allwinner/sun50i-a64-pinetab.dts b/dts/src/arm64/allwinner/sun50i-a64-pinetab.dts index 3ab0f0347b..0494bfaf2f 100644 --- a/dts/src/arm64/allwinner/sun50i-a64-pinetab.dts +++ b/dts/src/arm64/allwinner/sun50i-a64-pinetab.dts @@ -122,9 +122,6 @@ status = "okay"; port { - #address-cells = <1>; - #size-cells = <0>; - csi_ep: endpoint { remote-endpoint = <&ov5640_ep>; bus-width = <8>; diff --git a/dts/src/arm64/allwinner/sun50i-h5-libretech-all-h5-cc.dts b/dts/src/arm64/allwinner/sun50i-h5-libretech-all-h5-cc.dts index df1b9263ad..6e30a564c8 100644 --- a/dts/src/arm64/allwinner/sun50i-h5-libretech-all-h5-cc.dts +++ b/dts/src/arm64/allwinner/sun50i-h5-libretech-all-h5-cc.dts @@ -36,7 +36,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; /delete-property/ allwinner,leds-active-low; status = "okay"; }; diff --git a/dts/src/arm64/allwinner/sun50i-h5-orangepi-pc2.dts b/dts/src/arm64/allwinner/sun50i-h5-orangepi-pc2.dts index 7d7aad18f0..8bf2db9dcb 100644 --- a/dts/src/arm64/allwinner/sun50i-h5-orangepi-pc2.dts +++ b/dts/src/arm64/allwinner/sun50i-h5-orangepi-pc2.dts @@ -123,7 +123,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/dts/src/arm64/allwinner/sun50i-h5-orangepi-prime.dts b/dts/src/arm64/allwinner/sun50i-h5-orangepi-prime.dts index cb44bfa598..33ab44072e 100644 --- a/dts/src/arm64/allwinner/sun50i-h5-orangepi-prime.dts +++ b/dts/src/arm64/allwinner/sun50i-h5-orangepi-prime.dts @@ -124,7 +124,7 @@ pinctrl-0 = <&emac_rgmii_pins>; phy-supply = <®_gmac_3v3>; phy-handle = <&ext_rgmii_phy>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; status = "okay"; }; diff --git a/dts/src/arm64/allwinner/sun50i-h6-beelink-gs1.dts b/dts/src/arm64/allwinner/sun50i-h6-beelink-gs1.dts index 3f7ceeb1a7..7c9dbde645 100644 --- a/dts/src/arm64/allwinner/sun50i-h6-beelink-gs1.dts +++ b/dts/src/arm64/allwinner/sun50i-h6-beelink-gs1.dts @@ -97,7 +97,7 @@ &emac { pinctrl-names = "default"; pinctrl-0 = <&ext_rgmii_pins>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&ext_rgmii_phy>; phy-supply = <®_aldo2>; status = "okay"; diff --git a/dts/src/arm64/allwinner/sun50i-h6-pine-h64.dts b/dts/src/arm64/allwinner/sun50i-h6-pine-h64.dts index af85b20748..961732c52a 100644 --- a/dts/src/arm64/allwinner/sun50i-h6-pine-h64.dts +++ b/dts/src/arm64/allwinner/sun50i-h6-pine-h64.dts @@ -100,7 +100,7 @@ &emac { pinctrl-names = "default"; pinctrl-0 = <&ext_rgmii_pins>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&ext_rgmii_phy>; phy-supply = <®_gmac_3v3>; allwinner,rx-delay-ps = <200>; diff --git a/dts/src/arm64/altera/socfpga_stratix10_socdk.dts b/dts/src/arm64/altera/socfpga_stratix10_socdk.dts index feadd21bc0..46e558ab77 100644 --- a/dts/src/arm64/altera/socfpga_stratix10_socdk.dts +++ b/dts/src/arm64/altera/socfpga_stratix10_socdk.dts @@ -159,7 +159,7 @@ flash@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "n25q00a"; + compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; diff --git a/dts/src/arm64/altera/socfpga_stratix10_socdk_nand.dts b/dts/src/arm64/altera/socfpga_stratix10_socdk_nand.dts index c07966740e..f9b4a39683 100644 --- a/dts/src/arm64/altera/socfpga_stratix10_socdk_nand.dts +++ b/dts/src/arm64/altera/socfpga_stratix10_socdk_nand.dts @@ -192,7 +192,7 @@ flash@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "n25q00a"; + compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; diff --git a/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi b/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi index 55259f973b..aef8f2b007 100644 --- a/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi +++ b/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi @@ -5,20 +5,20 @@ usb { compatible = "simple-bus"; dma-ranges; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x68500000 0x00400000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x68500000 0x0 0x00400000>; usbphy0: usb-phy@0 { compatible = "brcm,sr-usb-combo-phy"; - reg = <0x00000000 0x100>; + reg = <0x0 0x00000000 0x0 0x100>; #phy-cells = <1>; status = "disabled"; }; xhci0: usb@1000 { compatible = "generic-xhci"; - reg = <0x00001000 0x1000>; + reg = <0x0 0x00001000 0x0 0x1000>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>; phys = <&usbphy0 1>, <&usbphy0 0>; phy-names = "phy0", "phy1"; @@ -28,7 +28,7 @@ bdc0: usb@2000 { compatible = "brcm,bdc-v0.16"; - reg = <0x00002000 0x1000>; + reg = <0x0 0x00002000 0x0 0x1000>; interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>; phys = <&usbphy0 0>, <&usbphy0 1>; phy-names = "phy0", "phy1"; @@ -38,21 +38,21 @@ usbphy1: usb-phy@10000 { compatible = "brcm,sr-usb-combo-phy"; - reg = <0x00010000 0x100>; + reg = <0x0 0x00010000 0x0 0x100>; #phy-cells = <1>; status = "disabled"; }; usbphy2: usb-phy@20000 { compatible = "brcm,sr-usb-hs-phy"; - reg = <0x00020000 0x100>; + reg = <0x0 0x00020000 0x0 0x100>; #phy-cells = <0>; status = "disabled"; }; xhci1: usb@11000 { compatible = "generic-xhci"; - reg = <0x00011000 0x1000>; + reg = <0x0 0x00011000 0x0 0x1000>; interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; phys = <&usbphy1 1>, <&usbphy2>, <&usbphy1 0>; phy-names = "phy0", "phy1", "phy2"; @@ -62,7 +62,7 @@ bdc1: usb@21000 { compatible = "brcm,bdc-v0.16"; - reg = <0x00021000 0x1000>; + reg = <0x0 0x00021000 0x0 0x1000>; interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; phys = <&usbphy2>; phy-names = "phy0"; diff --git a/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28.dts b/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28.dts index f46eb47cfa..8161dd2379 100644 --- a/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28.dts +++ b/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28.dts @@ -75,6 +75,7 @@ &enetc_port0 { phy-handle = <&phy0>; phy-connection-type = "sgmii"; + managed = "in-band-status"; status = "okay"; mdio { diff --git a/dts/src/arm64/freescale/fsl-ls1028a.dtsi b/dts/src/arm64/freescale/fsl-ls1028a.dtsi index 73e4f94668..7a6fb7e1fb 100644 --- a/dts/src/arm64/freescale/fsl-ls1028a.dtsi +++ b/dts/src/arm64/freescale/fsl-ls1028a.dtsi @@ -1012,6 +1012,7 @@ compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+"; reg = <0x0 0x1e34040 0x0 0x1c>; #fsl,rcpm-wakeup-cells = <7>; + little-endian; }; ftm_alarm0: timer@2800000 { diff --git a/dts/src/arm64/freescale/fsl-ls1088a.dtsi b/dts/src/arm64/freescale/fsl-ls1088a.dtsi index ff5805206a..692d8f4a20 100644 --- a/dts/src/arm64/freescale/fsl-ls1088a.dtsi +++ b/dts/src/arm64/freescale/fsl-ls1088a.dtsi @@ -805,6 +805,7 @@ compatible = "fsl,ls1088a-rcpm", "fsl,qoriq-rcpm-2.1+"; reg = <0x0 0x1e34040 0x0 0x18>; #fsl,rcpm-wakeup-cells = <6>; + little-endian; }; ftm_alarm0: timer@2800000 { diff --git a/dts/src/arm64/freescale/fsl-ls208xa.dtsi b/dts/src/arm64/freescale/fsl-ls208xa.dtsi index bf72918fe5..e7abb74bd8 100644 --- a/dts/src/arm64/freescale/fsl-ls208xa.dtsi +++ b/dts/src/arm64/freescale/fsl-ls208xa.dtsi @@ -892,6 +892,7 @@ compatible = "fsl,ls208xa-rcpm", "fsl,qoriq-rcpm-2.1+"; reg = <0x0 0x1e34040 0x0 0x18>; #fsl,rcpm-wakeup-cells = <6>; + little-endian; }; ftm_alarm0: timer@2800000 { diff --git a/dts/src/arm64/freescale/imx8mm-beacon-som.dtsi b/dts/src/arm64/freescale/imx8mm-beacon-som.dtsi index 6de86a4f0e..b88c3c99b0 100644 --- a/dts/src/arm64/freescale/imx8mm-beacon-som.dtsi +++ b/dts/src/arm64/freescale/imx8mm-beacon-som.dtsi @@ -72,6 +72,7 @@ pmic@4b { compatible = "rohm,bd71847"; reg = <0x4b>; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio1>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; @@ -210,6 +211,7 @@ host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; clocks = <&osc_32k>; + max-speed = <4000000>; clock-names = "extclk"; }; }; diff --git a/dts/src/arm64/freescale/imx8mm-evk.dtsi b/dts/src/arm64/freescale/imx8mm-evk.dtsi index f305a530ff..521eb3a5a1 100644 --- a/dts/src/arm64/freescale/imx8mm-evk.dtsi +++ b/dts/src/arm64/freescale/imx8mm-evk.dtsi @@ -121,6 +121,7 @@ pmic@4b { compatible = "rohm,bd71847"; reg = <0x4b>; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio1>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; diff --git a/dts/src/arm64/freescale/imx8mm-var-som.dtsi b/dts/src/arm64/freescale/imx8mm-var-som.dtsi index 4107fe914d..4908252976 100644 --- a/dts/src/arm64/freescale/imx8mm-var-som.dtsi +++ b/dts/src/arm64/freescale/imx8mm-var-som.dtsi @@ -135,13 +135,10 @@ pmic@4b { compatible = "rohm,bd71847"; reg = <0x4b>; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio2>; - /* - * The interrupt is not correct. It should be level low, - * however with internal pull up this causes IRQ storm. - */ - interrupts = <8 IRQ_TYPE_EDGE_RISING>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; rohm,reset-snvs-powered; #clock-cells = <0>; @@ -398,7 +395,7 @@ pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x41 + MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 >; }; diff --git a/dts/src/arm64/freescale/imx8mm.dtsi b/dts/src/arm64/freescale/imx8mm.dtsi index b83f400def..05ee062548 100644 --- a/dts/src/arm64/freescale/imx8mm.dtsi +++ b/dts/src/arm64/freescale/imx8mm.dtsi @@ -129,7 +129,7 @@ opp-1600000000 { opp-hz = /bits/ 64 <1600000000>; - opp-microvolt = <900000>; + opp-microvolt = <950000>; opp-supported-hw = <0xc>, <0x7>; clock-latency-ns = <150000>; opp-suspend; diff --git a/dts/src/arm64/freescale/imx8mn-ddr4-evk.dts b/dts/src/arm64/freescale/imx8mn-ddr4-evk.dts index 46e76cf32b..7dfee715a2 100644 --- a/dts/src/arm64/freescale/imx8mn-ddr4-evk.dts +++ b/dts/src/arm64/freescale/imx8mn-ddr4-evk.dts @@ -53,6 +53,7 @@ pmic@4b { compatible = "rohm,bd71847"; reg = <0x4b>; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio1>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; diff --git a/dts/src/arm64/freescale/imx8mn-evk.dts b/dts/src/arm64/freescale/imx8mn-evk.dts index 707d8486b4..8311b95dee 100644 --- a/dts/src/arm64/freescale/imx8mn-evk.dts +++ b/dts/src/arm64/freescale/imx8mn-evk.dts @@ -18,6 +18,7 @@ pmic: pmic@25 { compatible = "nxp,pca9450b"; reg = <0x25>; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio1>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; diff --git a/dts/src/arm64/freescale/imx8mn-var-som.dtsi b/dts/src/arm64/freescale/imx8mn-var-som.dtsi index a2d0190921..7f356edf9f 100644 --- a/dts/src/arm64/freescale/imx8mn-var-som.dtsi +++ b/dts/src/arm64/freescale/imx8mn-var-som.dtsi @@ -116,13 +116,10 @@ pmic@4b { compatible = "rohm,bd71847"; reg = <0x4b>; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio2>; - /* - * The interrupt is not correct. It should be level low, - * however with internal pull up this causes IRQ storm. - */ - interrupts = <8 IRQ_TYPE_EDGE_RISING>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; rohm,reset-snvs-powered; regulators { @@ -388,7 +385,7 @@ pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x101 + MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 >; }; diff --git a/dts/src/arm64/freescale/imx8mn.dtsi b/dts/src/arm64/freescale/imx8mn.dtsi index 746faf1cf2..16c7202885 100644 --- a/dts/src/arm64/freescale/imx8mn.dtsi +++ b/dts/src/arm64/freescale/imx8mn.dtsi @@ -790,28 +790,6 @@ #index-cells = <1>; reg = <0x32e40200 0x200>; }; - - usbotg2: usb@32e50000 { - compatible = "fsl,imx8mn-usb", "fsl,imx7d-usb"; - reg = <0x32e50000 0x200>; - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clk IMX8MN_CLK_USB1_CTRL_ROOT>; - clock-names = "usb1_ctrl_root_clk"; - assigned-clocks = <&clk IMX8MN_CLK_USB_BUS>, - <&clk IMX8MN_CLK_USB_CORE_REF>; - assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>, - <&clk IMX8MN_SYS_PLL1_100M>; - fsl,usbphy = <&usbphynop2>; - fsl,usbmisc = <&usbmisc2 0>; - status = "disabled"; - }; - - usbmisc2: usbmisc@32e50200 { - compatible = "fsl,imx8mn-usbmisc", "fsl,imx7d-usbmisc"; - #index-cells = <1>; - reg = <0x32e50200 0x200>; - }; - }; dma_apbh: dma-controller@33000000 { @@ -876,12 +854,4 @@ assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>; clock-names = "main_clk"; }; - - usbphynop2: usbphynop2 { - compatible = "usb-nop-xceiv"; - clocks = <&clk IMX8MN_CLK_USB_PHY_REF>; - assigned-clocks = <&clk IMX8MN_CLK_USB_PHY_REF>; - assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>; - clock-names = "main_clk"; - }; }; diff --git a/dts/src/arm64/freescale/qoriq-fman3-0.dtsi b/dts/src/arm64/freescale/qoriq-fman3-0.dtsi index 8bc6caa916..4338db14c5 100644 --- a/dts/src/arm64/freescale/qoriq-fman3-0.dtsi +++ b/dts/src/arm64/freescale/qoriq-fman3-0.dtsi @@ -19,6 +19,7 @@ fman0: fman@1a00000 { clock-names = "fmanclk"; fsl,qman-channel-range = <0x800 0x10>; ptimer-handle = <&ptp_timer0>; + dma-coherent; muram@0 { compatible = "fsl,fman-muram"; diff --git a/dts/src/arm64/intel/socfpga_agilex_socdk.dts b/dts/src/arm64/intel/socfpga_agilex_socdk.dts index 96c50d4828..a7a83f29f0 100644 --- a/dts/src/arm64/intel/socfpga_agilex_socdk.dts +++ b/dts/src/arm64/intel/socfpga_agilex_socdk.dts @@ -110,7 +110,7 @@ flash@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "mt25qu02g"; + compatible = "micron,mt25qu02g", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; diff --git a/dts/src/arm64/nvidia/tegra186-p2771-0000.dts b/dts/src/arm64/nvidia/tegra186-p2771-0000.dts index 381a84912b..c28d51cc57 100644 --- a/dts/src/arm64/nvidia/tegra186-p2771-0000.dts +++ b/dts/src/arm64/nvidia/tegra186-p2771-0000.dts @@ -10,18 +10,6 @@ model = "NVIDIA Jetson TX2 Developer Kit"; compatible = "nvidia,p2771-0000", "nvidia,tegra186"; - aconnect { - status = "okay"; - - dma-controller@2930000 { - status = "okay"; - }; - - interrupt-controller@2a40000 { - status = "okay"; - }; - }; - i2c@3160000 { power-monitor@42 { compatible = "ti,ina3221"; diff --git a/dts/src/arm64/nvidia/tegra194-p3668-0000.dtsi b/dts/src/arm64/nvidia/tegra194-p3668-0000.dtsi index a2893be805..0dc8304a2e 100644 --- a/dts/src/arm64/nvidia/tegra194-p3668-0000.dtsi +++ b/dts/src/arm64/nvidia/tegra194-p3668-0000.dtsi @@ -54,7 +54,7 @@ status = "okay"; }; - serial@c280000 { + serial@3100000 { status = "okay"; }; diff --git a/dts/src/arm64/nvidia/tegra194.dtsi b/dts/src/arm64/nvidia/tegra194.dtsi index e9c90f0f44..93438d2b94 100644 --- a/dts/src/arm64/nvidia/tegra194.dtsi +++ b/dts/src/arm64/nvidia/tegra194.dtsi @@ -1161,7 +1161,7 @@ hsp_aon: hsp@c150000 { compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp"; - reg = <0x0c150000 0xa0000>; + reg = <0x0c150000 0x90000>; interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, diff --git a/dts/src/arm64/nvidia/tegra210-p2597.dtsi b/dts/src/arm64/nvidia/tegra210-p2597.dtsi index e18e1a9a30..a9caaf7c0d 100644 --- a/dts/src/arm64/nvidia/tegra210-p2597.dtsi +++ b/dts/src/arm64/nvidia/tegra210-p2597.dtsi @@ -1663,16 +1663,6 @@ vin-supply = <&vdd_5v0_sys>; }; - vdd_usb_vbus_otg: regulator@11 { - compatible = "regulator-fixed"; - regulator-name = "USB_VBUS_EN0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>; - enable-active-high; - vin-supply = <&vdd_5v0_sys>; - }; - vdd_hdmi: regulator@10 { compatible = "regulator-fixed"; regulator-name = "VDD_HDMI_5V0"; @@ -1712,4 +1702,14 @@ enable-active-high; vin-supply = <&vdd_3v3_sys>; }; + + vdd_usb_vbus_otg: regulator@14 { + compatible = "regulator-fixed"; + regulator-name = "USB_VBUS_EN0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vdd_5v0_sys>; + }; }; diff --git a/dts/src/arm64/nvidia/tegra234-sim-vdk.dts b/dts/src/arm64/nvidia/tegra234-sim-vdk.dts index f6e6a24829..b5d9a55262 100644 --- a/dts/src/arm64/nvidia/tegra234-sim-vdk.dts +++ b/dts/src/arm64/nvidia/tegra234-sim-vdk.dts @@ -8,7 +8,7 @@ compatible = "nvidia,tegra234-vdk", "nvidia,tegra234"; aliases { - sdhci3 = "/cbb@0/sdhci@3460000"; + mmc3 = "/bus@0/mmc@3460000"; serial0 = &uarta; }; @@ -17,12 +17,12 @@ stdout-path = "serial0:115200n8"; }; - cbb@0 { + bus@0 { serial@3100000 { status = "okay"; }; - sdhci@3460000 { + mmc@3460000 { status = "okay"; bus-width = <8>; non-removable; diff --git a/dts/src/arm64/qcom/ipq6018.dtsi b/dts/src/arm64/qcom/ipq6018.dtsi index a94dac76bf..59e0cbfa22 100644 --- a/dts/src/arm64/qcom/ipq6018.dtsi +++ b/dts/src/arm64/qcom/ipq6018.dtsi @@ -179,22 +179,22 @@ }; soc: soc { - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0 0 0xffffffff>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0 0 0 0 0x0 0xffffffff>; dma-ranges; compatible = "simple-bus"; prng: qrng@e1000 { compatible = "qcom,prng-ee"; - reg = <0xe3000 0x1000>; + reg = <0x0 0xe3000 0x0 0x1000>; clocks = <&gcc GCC_PRNG_AHB_CLK>; clock-names = "core"; }; cryptobam: dma@704000 { compatible = "qcom,bam-v1.7.0"; - reg = <0x00704000 0x20000>; + reg = <0x0 0x00704000 0x0 0x20000>; interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_CRYPTO_AHB_CLK>; clock-names = "bam_clk"; @@ -206,7 +206,7 @@ crypto: crypto@73a000 { compatible = "qcom,crypto-v5.1"; - reg = <0x0073a000 0x6000>; + reg = <0x0 0x0073a000 0x0 0x6000>; clocks = <&gcc GCC_CRYPTO_AHB_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_CLK>; @@ -217,7 +217,7 @@ tlmm: pinctrl@1000000 { compatible = "qcom,ipq6018-pinctrl"; - reg = <0x01000000 0x300000>; + reg = <0x0 0x01000000 0x0 0x300000>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; #gpio-cells = <2>; @@ -235,7 +235,7 @@ gcc: gcc@1800000 { compatible = "qcom,gcc-ipq6018"; - reg = <0x01800000 0x80000>; + reg = <0x0 0x01800000 0x0 0x80000>; clocks = <&xo>, <&sleep_clk>; clock-names = "xo", "sleep_clk"; #clock-cells = <1>; @@ -244,17 +244,17 @@ tcsr_mutex_regs: syscon@1905000 { compatible = "syscon"; - reg = <0x01905000 0x8000>; + reg = <0x0 0x01905000 0x0 0x8000>; }; tcsr_q6: syscon@1945000 { compatible = "syscon"; - reg = <0x01945000 0xe000>; + reg = <0x0 0x01945000 0x0 0xe000>; }; blsp_dma: dma@7884000 { compatible = "qcom,bam-v1.7.0"; - reg = <0x07884000 0x2b000>; + reg = <0x0 0x07884000 0x0 0x2b000>; interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "bam_clk"; @@ -264,7 +264,7 @@ blsp1_uart3: serial@78b1000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; - reg = <0x078b1000 0x200>; + reg = <0x0 0x078b1000 0x0 0x200>; interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; @@ -276,7 +276,7 @@ compatible = "qcom,spi-qup-v2.2.1"; #address-cells = <1>; #size-cells = <0>; - reg = <0x078b5000 0x600>; + reg = <0x0 0x078b5000 0x0 0x600>; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; spi-max-frequency = <50000000>; clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>, @@ -291,7 +291,7 @@ compatible = "qcom,spi-qup-v2.2.1"; #address-cells = <1>; #size-cells = <0>; - reg = <0x078b6000 0x600>; + reg = <0x0 0x078b6000 0x0 0x600>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; spi-max-frequency = <50000000>; clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>, @@ -306,7 +306,7 @@ compatible = "qcom,i2c-qup-v2.2.1"; #address-cells = <1>; #size-cells = <0>; - reg = <0x078b6000 0x600>; + reg = <0x0 0x078b6000 0x0 0x600>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP1_AHB_CLK>, <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; @@ -321,7 +321,7 @@ compatible = "qcom,i2c-qup-v2.2.1"; #address-cells = <1>; #size-cells = <0>; - reg = <0x078b7000 0x600>; + reg = <0x0 0x078b7000 0x0 0x600>; interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP1_AHB_CLK>, <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>; @@ -336,24 +336,24 @@ compatible = "qcom,msm-qgic2"; interrupt-controller; #interrupt-cells = <0x3>; - reg = <0x0b000000 0x1000>, /*GICD*/ - <0x0b002000 0x1000>, /*GICC*/ - <0x0b001000 0x1000>, /*GICH*/ - <0x0b004000 0x1000>; /*GICV*/ + reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/ + <0x0 0x0b002000 0x0 0x1000>, /*GICC*/ + <0x0 0x0b001000 0x0 0x1000>, /*GICH*/ + <0x0 0x0b004000 0x0 0x1000>; /*GICV*/ interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; watchdog@b017000 { compatible = "qcom,kpss-wdt"; interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>; - reg = <0x0b017000 0x40>; + reg = <0x0 0x0b017000 0x0 0x40>; clocks = <&sleep_clk>; timeout-sec = <10>; }; apcs_glb: mailbox@b111000 { compatible = "qcom,ipq6018-apcs-apps-global"; - reg = <0x0b111000 0x1000>; + reg = <0x0 0x0b111000 0x0 0x1000>; #clock-cells = <1>; clocks = <&a53pll>, <&xo>; clock-names = "pll", "xo"; @@ -362,7 +362,7 @@ a53pll: clock@b116000 { compatible = "qcom,ipq6018-a53pll"; - reg = <0x0b116000 0x40>; + reg = <0x0 0x0b116000 0x0 0x40>; #clock-cells = <0>; clocks = <&xo>; clock-names = "xo"; @@ -377,68 +377,68 @@ }; timer@b120000 { - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; ranges; compatible = "arm,armv7-timer-mem"; - reg = <0x0b120000 0x1000>; + reg = <0x0 0x0b120000 0x0 0x1000>; clock-frequency = <19200000>; frame@b120000 { frame-number = <0>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b121000 0x1000>, - <0x0b122000 0x1000>; + reg = <0x0 0x0b121000 0x0 0x1000>, + <0x0 0x0b122000 0x0 0x1000>; }; frame@b123000 { frame-number = <1>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - reg = <0xb123000 0x1000>; + reg = <0x0 0xb123000 0x0 0x1000>; status = "disabled"; }; frame@b124000 { frame-number = <2>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b124000 0x1000>; + reg = <0x0 0x0b124000 0x0 0x1000>; status = "disabled"; }; frame@b125000 { frame-number = <3>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b125000 0x1000>; + reg = <0x0 0x0b125000 0x0 0x1000>; status = "disabled"; }; frame@b126000 { frame-number = <4>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b126000 0x1000>; + reg = <0x0 0x0b126000 0x0 0x1000>; status = "disabled"; }; frame@b127000 { frame-number = <5>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b127000 0x1000>; + reg = <0x0 0x0b127000 0x0 0x1000>; status = "disabled"; }; frame@b128000 { frame-number = <6>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0b128000 0x1000>; + reg = <0x0 0x0b128000 0x0 0x1000>; status = "disabled"; }; }; q6v5_wcss: remoteproc@cd00000 { compatible = "qcom,ipq8074-wcss-pil"; - reg = <0x0cd00000 0x4040>, - <0x004ab000 0x20>; + reg = <0x0 0x0cd00000 0x0 0x4040>, + <0x0 0x004ab000 0x0 0x20>; reg-names = "qdsp6", "rmb"; interrupts-extended = <&intc GIC_SPI 325 IRQ_TYPE_EDGE_RISING>, diff --git a/dts/src/arm64/renesas/r8a774e1.dtsi b/dts/src/arm64/renesas/r8a774e1.dtsi index 9cbf963aa0..c29643442e 100644 --- a/dts/src/arm64/renesas/r8a774e1.dtsi +++ b/dts/src/arm64/renesas/r8a774e1.dtsi @@ -28,6 +28,12 @@ clock-frequency = <0>; }; + audio_clk_b: audio_clk_b { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + audio_clk_c: audio_clk_c { compatible = "fixed-clock"; #clock-cells = <0>; diff --git a/dts/src/arm64/rockchip/rk3326-odroid-go2.dts b/dts/src/arm64/rockchip/rk3326-odroid-go2.dts index 35bd6b904b..3376810385 100644 --- a/dts/src/arm64/rockchip/rk3326-odroid-go2.dts +++ b/dts/src/arm64/rockchip/rk3326-odroid-go2.dts @@ -243,7 +243,6 @@ interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; pinctrl-names = "default"; pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; wakeup-source; #clock-cells = <1>; clock-output-names = "rk808-clkout1", "xin32k"; diff --git a/dts/src/arm64/rockchip/rk3328-nanopi-r2s.dts b/dts/src/arm64/rockchip/rk3328-nanopi-r2s.dts index be7a31d816..2ee07d15a6 100644 --- a/dts/src/arm64/rockchip/rk3328-nanopi-r2s.dts +++ b/dts/src/arm64/rockchip/rk3328-nanopi-r2s.dts @@ -20,7 +20,7 @@ gmac_clk: gmac-clock { compatible = "fixed-clock"; clock-frequency = <125000000>; - clock-output-names = "gmac_clk"; + clock-output-names = "gmac_clkin"; #clock-cells = <0>; }; diff --git a/dts/src/arm64/rockchip/rk3399-roc-pc.dtsi b/dts/src/arm64/rockchip/rk3399-roc-pc.dtsi index e7a459fa43..20309076db 100644 --- a/dts/src/arm64/rockchip/rk3399-roc-pc.dtsi +++ b/dts/src/arm64/rockchip/rk3399-roc-pc.dtsi @@ -74,14 +74,14 @@ label = "red:diy"; gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; default-state = "off"; - linux,default-trigger = "mmc1"; + linux,default-trigger = "mmc2"; }; yellow_led: led-2 { label = "yellow:yellow-led"; gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; default-state = "off"; - linux,default-trigger = "mmc0"; + linux,default-trigger = "mmc1"; }; }; diff --git a/dts/src/arm64/rockchip/rk3399.dtsi b/dts/src/arm64/rockchip/rk3399.dtsi index ada724b12f..7a9a7aca86 100644 --- a/dts/src/arm64/rockchip/rk3399.dtsi +++ b/dts/src/arm64/rockchip/rk3399.dtsi @@ -29,6 +29,9 @@ i2c6 = &i2c6; i2c7 = &i2c7; i2c8 = &i2c8; + mmc0 = &sdio0; + mmc1 = &sdmmc; + mmc2 = &sdhci; serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; diff --git a/fs/ubifs/tnc.c b/fs/ubifs/tnc.c index 2d7327ad84..72f9b817d8 100644 --- a/fs/ubifs/tnc.c +++ b/fs/ubifs/tnc.c @@ -1935,7 +1935,12 @@ static int tnc_delete(struct ubifs_info *c, struct ubifs_znode *znode, int n) do { ubifs_assert(c, !ubifs_zn_obsolete(znode)); - ubifs_assert(c, ubifs_zn_dirty(znode)); + /* + * This assertion is invalid in barebox due to the shortcuts we take + * in our readonly implementation. + * + * ubifs_assert(c, ubifs_zn_dirty(znode)); + */ zp = znode->parent; n = znode->iip; diff --git a/include/image.h b/include/image.h index 963ea96863..fa06476845 100644 --- a/include/image.h +++ b/include/image.h @@ -127,8 +127,8 @@ enum { #define IH_ARCH IH_ARCH_BLACKFIN #elif defined(__avr32__) #define IH_ARCH IH_ARCH_AVR32 -#elif defined(CONFIG_LINUX) -#define IH_ARCH IH_ARCH_LINUX +#elif defined(CONFIG_SANDBOX) +#define IH_ARCH IH_ARCH_SANDBOX #else #define IH_ARCH IH_ARCH_INVALID #endif diff --git a/include/linux/amba/bus.h b/include/linux/amba/bus.h index 7b3e603322..390220a3de 100644 --- a/include/linux/amba/bus.h +++ b/include/linux/amba/bus.h @@ -60,6 +60,13 @@ extern struct bus_type amba_bustype; #define to_amba_device(d) container_of(d, struct amba_device, dev) +#define device_amba_driver(drv) \ + register_driver_macro(device,amba,drv) +#define coredevice_amba_driver(drv) \ + register_driver_macro(coredevice,amba,drv) +#define console_amba_driver(drv) \ + register_driver_macro(console,amba,drv) + int amba_driver_register(struct amba_driver *); void amba_driver_unregister(struct amba_driver *); struct amba_device *amba_device_alloc(const char *, int id, resource_size_t, size_t); diff --git a/include/mfd/imx6q-iomuxc-gpr.h b/include/mfd/imx6q-iomuxc-gpr.h index b2c9da6579..2e7aa6dc7a 100644 --- a/include/mfd/imx6q-iomuxc-gpr.h +++ b/include/mfd/imx6q-iomuxc-gpr.h @@ -344,4 +344,22 @@ #define IMX6Q_GPR13_SATA_PHY_1_MED (0x1 << 0) #define IMX6Q_GPR13_SATA_PHY_1_SLOW (0x2 << 0) +/* For imx6ul iomux gpr register field define */ +/* IMX6UL_GPR1_ENET*_CLK_DIR: + * 0 - ENET1_TX_CLK output driver is disabled when configured for ALT1 + * 1 - ENET1_TX_CLK output driver is enabled when configured for ALT1 + */ +#define IMX6UL_GPR1_ENET2_CLK_DIR (0x1 << 18) +#define IMX6UL_GPR1_ENET1_CLK_DIR (0x1 << 17) + +/* IMX6UL_GPR1_ENET*_CLK_SEL: + * 0 - ENET TX reference clock driven by ref_enetpll. This clock is also + * output to pins via the IOMUX. ENET_REF_CLK2 function. + * 1 - Gets ENET2 TX reference clk from the ENET2_TX_CLK pin. In this use case, + * an external OSC provides the clock for both the external PHY and the + * internal controller. + */ +#define IMX6UL_GPR1_ENET2_CLK_SEL (0x1 << 14) +#define IMX6UL_GPR1_ENET1_CLK_SEL (0x1 << 13) + #endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */ diff --git a/scripts/bareboximd.c b/scripts/bareboximd.c index 48c3e8ab3f..0500e01cc2 100644 --- a/scripts/bareboximd.c +++ b/scripts/bareboximd.c @@ -161,6 +161,7 @@ static void usage(const char *prgname) "Options:\n" "-t <type> only show information of <type>\n" "-n <no> for tags with multiple strings only show string <no>\n" +"-v Be verbose\n" "-V Verify checksum of FILE\n" "-c Create checksum for FILE and write it to the crc32 tag\n" "\n" |