diff options
| -rw-r--r-- | arch/mips/include/asm/cache.h | 6 | ||||
| -rw-r--r-- | arch/mips/lib/Makefile | 1 | ||||
| -rw-r--r-- | arch/mips/lib/c-r4k.c | 24 | ||||
| -rw-r--r-- | arch/mips/lib/shutdown.c | 12 |
4 files changed, 43 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h new file mode 100644 index 0000000000..cceba0acc0 --- /dev/null +++ b/arch/mips/include/asm/cache.h @@ -0,0 +1,6 @@ +#ifndef _ASM_MIPS_CACHE_H +#define _ASM_MIPS_CACHE_H + +void flush_cache_all(void); + +#endif /* _ASM_MIPS_CACHE_H */ diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 02ee1893f8..43f7af7af2 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -6,6 +6,7 @@ obj-y += ashrdi3.o obj-y += cpu-probe.o obj-y += traps.o obj-y += genex.o +obj-y += shutdown.o obj-$(CONFIG_MIPS_OPTIMIZED_STRING_FUNCTIONS) += memcpy.o obj-$(CONFIG_MIPS_OPTIMIZED_STRING_FUNCTIONS) += memset.o diff --git a/arch/mips/lib/c-r4k.c b/arch/mips/lib/c-r4k.c index ba77d18e7c..150205840d 100644 --- a/arch/mips/lib/c-r4k.c +++ b/arch/mips/lib/c-r4k.c @@ -10,6 +10,7 @@ #include <common.h> #include <asm/io.h> #include <asm/mipsregs.h> +#include <asm/cache.h> #include <asm/cacheops.h> #include <asm/cpu.h> #include <asm/cpu-info.h> @@ -47,6 +48,29 @@ static inline void blast_##pfx##cache##_range(unsigned long start, \ __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D) __BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D) +void flush_cache_all(void) +{ + struct cpuinfo_mips *c = ¤t_cpu_data; + unsigned long lsize; + unsigned long addr; + unsigned long aend; + unsigned int icache_size, dcache_size; + + dcache_size = c->dcache.waysize * c->dcache.ways; + lsize = c->dcache.linesz; + aend = (KSEG0 + dcache_size - 1) & ~(lsize - 1); + for (addr = KSEG0; addr <= aend; addr += lsize) + cache_op(Index_Writeback_Inv_D, addr); + + icache_size = c->icache.waysize * c->icache.ways; + lsize = c->icache.linesz; + aend = (KSEG0 + icache_size - 1) & ~(lsize - 1); + for (addr = KSEG0; addr <= aend; addr += lsize) + cache_op(Index_Invalidate_I, addr); + + /* secondatory cache skipped */ +} + void dma_flush_range(unsigned long start, unsigned long end) { blast_dcache_range(start, end); diff --git a/arch/mips/lib/shutdown.c b/arch/mips/lib/shutdown.c new file mode 100644 index 0000000000..973cd23c71 --- /dev/null +++ b/arch/mips/lib/shutdown.c @@ -0,0 +1,12 @@ +/** + * This function is called by shutdown_barebox to get a clean + * memory/cache state. + */ +#include <init.h> +#include <asm/cache.h> + +static void arch_shutdown(void) +{ + flush_cache_all(); +} +archshutdown_exitcall(arch_shutdown); |