diff options
270 files changed, 4267 insertions, 2021 deletions
diff --git a/.gitignore b/.gitignore index 7fa2948bf4..d7a37b3c9b 100644 --- a/.gitignore +++ b/.gitignore @@ -87,3 +87,4 @@ GTAGS /allno.config /allrandom.config /allyes.config +/compile_commands.json diff --git a/Documentation/user/state.rst b/Documentation/user/state.rst index 54aa396257..a0e27d4fe8 100644 --- a/Documentation/user/state.rst +++ b/Documentation/user/state.rst @@ -579,6 +579,9 @@ content, its backend-type and *state* variable layout. }; }; +If the *state* variable set is set to be located in a GPT partition, use +``4778ed65-bf42-45fa-9c5b-287a1dc4aab1`` as the partition type GUID. + SRAM #### @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 VERSION = 2021 -PATCHLEVEL = 01 +PATCHLEVEL = 02 SUBLEVEL = 0 EXTRAVERSION = NAME = None @@ -541,7 +541,7 @@ endif # in addition to whatever we do anyway. # Just "make" or "make all" shall build modules as well -ifneq ($(filter all _all modules,$(MAKECMDGOALS)),) +ifneq ($(filter all _all modules %compile_commands.json,$(MAKECMDGOALS)),) KBUILD_MODULES := 1 endif @@ -1104,7 +1104,7 @@ endif # CONFIG_MODULES CLEAN_DIRS += $(MODVERDIR) CLEAN_FILES += barebox System.map include/generated/barebox_default_env.h \ .tmp_version .tmp_barebox* barebox.bin barebox.map barebox.S \ - .tmp_kallsyms* barebox.ldr \ + .tmp_kallsyms* barebox.ldr compile_commands.json \ scripts/bareboxenv-target barebox-flash-image \ barebox.srec barebox.s5p barebox.ubl barebox.zynq \ barebox.uimage barebox.spi barebox.kwb barebox.kwbuart \ @@ -1162,6 +1162,18 @@ distclean: mrproper -o -name 'core' \) \ -type f -print | xargs rm -f +# Clang Tooling +# --------------------------------------------------------------------------- + +quiet_cmd_gen_compile_commands = GEN $@ + cmd_gen_compile_commands = $(PYTHON3) $< -a $(AR) -o $@ $(filter-out $<, $(real-prereqs)) + +compile_commands.json: scripts/clang-tools/gen_compile_commands.py \ + $(BAREBOX_OBJS) $(if $(CONFIG_PBL_IMAGE),$(BAREBOX_PBL_OBJS),) FORCE + $(call if_changed,gen_compile_commands) + +PHONY += compile_commands.json + # Brief documentation of the typical targets used # --------------------------------------------------------------------------- diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 96613cc5ba..9dc0897e58 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -54,7 +54,7 @@ ifeq ($(CONFIG_CPU_V8), y) CFLAGS_ABI :=-mabi=lp64 else ifeq ($(CONFIG_AEABI),y) -CFLAGS_ABI :=-mabi=aapcs-linux -mno-thumb-interwork +CFLAGS_ABI :=-mabi=aapcs-linux else CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,) endif diff --git a/arch/arm/boards/kontron-samx6i/mem.c b/arch/arm/boards/kontron-samx6i/mem.c index 3b9fbd464a..08dceb55c0 100644 --- a/arch/arm/boards/kontron-samx6i/mem.c +++ b/arch/arm/boards/kontron-samx6i/mem.c @@ -17,7 +17,6 @@ #include "mem.h" -#define PCBVERSION_PIN IMX_GPIO_NR(2, 2) #define PCBID0_PIN IMX_GPIO_NR(6, 7) #define PCBID1_PIN IMX_GPIO_NR(6, 9) @@ -25,62 +24,47 @@ IOMUX_PAD(0x0658, 0x0270, 5, 0x0000, 0, 0) #define MX6S_PAD_NANDF_WP_B__GPIO_6_9 \ IOMUX_PAD(0x0690, 0x02A8, 5, 0x0000, 0, 0) -#define MX6S_PAD_NANDF_D2__GPIO_2_2 \ - IOMUX_PAD(0x028c, 0x0674, 5, 0x0000, 0, 0) resource_size_t samx6i_get_size(void) { resource_size_t size = 0; - int ver, id0, id1; + int id0, id1; int cpu_type = __imx6_cpu_type(); void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR); void __iomem *gpio6 = IOMEM(MX6_GPIO6_BASE_ADDR); - void __iomem *gpio2 = IOMEM(MX6_GPIO2_BASE_ADDR); if (cpu_type == IMX6_CPUTYPE_IMX6D || - cpu_type == IMX6_CPUTYPE_IMX6Q) { + cpu_type == IMX6_CPUTYPE_IMX6Q) { imx_setup_pad(iomuxbase, MX6Q_PAD_NANDF_CLE__GPIO_6_7); imx_setup_pad(iomuxbase, MX6Q_PAD_NANDF_WP_B__GPIO_6_9); - imx_setup_pad(iomuxbase, MX6Q_PAD_NANDF_D2__GPIO_2_2); } else if (cpu_type == IMX6_CPUTYPE_IMX6S || - cpu_type == IMX6_CPUTYPE_IMX6DL) { + cpu_type == IMX6_CPUTYPE_IMX6DL) { imx_setup_pad(iomuxbase, MX6S_PAD_NANDF_CLE__GPIO_6_7); imx_setup_pad(iomuxbase, MX6S_PAD_NANDF_WP_B__GPIO_6_9); - imx_setup_pad(iomuxbase, MX6S_PAD_NANDF_D2__GPIO_2_2); }; - imx6_gpio_direction_input(gpio6, 6); + imx6_gpio_direction_input(gpio6, 7); imx6_gpio_direction_input(gpio6, 9); - imx6_gpio_direction_input(gpio2, 2); - ver = imx6_gpio_val(gpio2, 2); id0 = imx6_gpio_val(gpio6, 7); id1 = imx6_gpio_val(gpio6, 9); - if (cpu_type == IMX6_CPUTYPE_IMX6D || - cpu_type == IMX6_CPUTYPE_IMX6Q) { - if (ver) - size = SZ_1G; - else if (id0 && id1) - size = SZ_2G; - else if (id0) - size = SZ_2G; - else if (id1) - size = SZ_1G; - else - size = SZ_512M; - } else if (cpu_type == IMX6_CPUTYPE_IMX6S || - cpu_type == IMX6_CPUTYPE_IMX6DL) { - if (ver) - size = SZ_512M; - if (id0 && id1) - size = SZ_2G; - else if (id0) - size = SZ_1G; - else if (id1) - size = SZ_512M; + /* Solo/DualLite module sizes */ + if (id0 && id1) + size = SZ_2G; + else if (id0) + size = SZ_1G; + else if (id1) + size = SZ_512M; + else + size = SZ_256M; + + /* Dual/Quad modules always have twice the size */ + if (cpu_type == IMX6_CPUTYPE_IMX6D || cpu_type == IMX6_CPUTYPE_IMX6Q) { + if (size == SZ_2G) + size = 0xf0000000; /* 4G on a 32bit system */ else - size = SZ_128M; + size *= 2; } return size; diff --git a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c index 2297dc01e7..4bd29c2269 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mm-evk/lowlevel.c @@ -172,11 +172,6 @@ static __noreturn noinline void nxp_imx8mm_evk_start(void) ENTRY_FUNCTION(start_nxp_imx8mm_evk, r0, r1, r2) { - void __iomem *ccm = IOMEM(MX8M_CCM_BASE_ADDR); - - writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0), - ccm + IMX8M_CCM_CCGRn_SET(IMX8M_CCM_CCGR_SCTR)); - imx8mm_cpu_lowlevel_init(); relocate_to_current_adr(); diff --git a/arch/arm/configs/stm32mp_defconfig b/arch/arm/configs/stm32mp_defconfig index e9f89e69d9..e1ee4ec082 100644 --- a/arch/arm/configs/stm32mp_defconfig +++ b/arch/arm/configs/stm32mp_defconfig @@ -94,6 +94,8 @@ CONFIG_NET_NETCONSOLE=y CONFIG_NET_FASTBOOT=y CONFIG_OFDEVICE=y CONFIG_OF_BAREBOX_DRIVERS=y +CONFIG_AIODEV=y +CONFIG_STM32_ADC=y CONFIG_DRIVER_SERIAL_STM32=y CONFIG_DRIVER_NET_DESIGNWARE_EQOS=y CONFIG_DRIVER_NET_DESIGNWARE_STM32=y @@ -132,6 +134,7 @@ CONFIG_STM32_BSEC=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED=y CONFIG_REGULATOR_STM32_PWR=y +CONFIG_REGULATOR_STM32_VREFBUF=y CONFIG_REGULATOR_STPMIC1=y CONFIG_REMOTEPROC=y CONFIG_STM32_REMOTEPROC=y diff --git a/arch/arm/cpu/board-dt-2nd.c b/arch/arm/cpu/board-dt-2nd.c index 4e7d575e8a..bb13180785 100644 --- a/arch/arm/cpu/board-dt-2nd.c +++ b/arch/arm/cpu/board-dt-2nd.c @@ -8,73 +8,7 @@ #include <debug_ll.h> #include <asm/cache.h> #include <asm/sections.h> -#include <linux/libfdt.h> - -static void of_find_mem(void *fdt, unsigned long *membase, unsigned long *memsize) -{ - const __be32 *nap, *nsp, *reg; - uint32_t na, ns; - uint64_t memsize64, membase64; - int node, size, i; - - /* Make sure FDT blob is sane */ - if (fdt_check_header(fdt) != 0) { - pr_err("Invalid device tree blob\n"); - goto err; - } - - /* Find the #address-cells and #size-cells properties */ - node = fdt_path_offset(fdt, "/"); - if (node < 0) { - pr_err("Cannot find root node\n"); - goto err; - } - - nap = fdt_getprop(fdt, node, "#address-cells", &size); - if (!nap || (size != 4)) { - pr_err("Cannot find #address-cells property"); - goto err; - } - na = fdt32_to_cpu(*nap); - - nsp = fdt_getprop(fdt, node, "#size-cells", &size); - if (!nsp || (size != 4)) { - pr_err("Cannot find #size-cells property"); - goto err; - } - ns = fdt32_to_cpu(*nap); - - /* Find the memory range */ - node = fdt_node_offset_by_prop_value(fdt, -1, "device_type", - "memory", sizeof("memory")); - if (node < 0) { - pr_err("Cannot find memory node\n"); - goto err; - } - - reg = fdt_getprop(fdt, node, "reg", &size); - if (size < (na + ns) * sizeof(u32)) { - pr_err("cannot get memory range\n"); - goto err; - } - - membase64 = 0; - for (i = 0; i < na; i++) - membase64 = (membase64 << 32) | fdt32_to_cpu(*reg++); - - /* get the memsize and truncate it to under 4G on 32 bit machines */ - memsize64 = 0; - for (i = 0; i < ns; i++) - memsize64 = (memsize64 << 32) | fdt32_to_cpu(*reg++); - - *membase = membase64; - *memsize = memsize64; - - return; -err: - pr_err("No memory, cannot continue\n"); - while (1); -} +#include <pbl.h> #ifdef CONFIG_CPU_V8 @@ -85,7 +19,7 @@ static noinline void dt_2nd_continue_aarch64(void *fdt) if (!fdt) hang(); - of_find_mem(fdt, &membase, &memsize); + fdt_find_mem(fdt, &membase, &memsize); barebox_arm_entry(membase, memsize, fdt); } @@ -114,7 +48,7 @@ static noinline void dt_2nd_continue(void *fdt) if (!fdt) hang(); - of_find_mem(fdt, &membase, &memsize); + fdt_find_mem(fdt, &membase, &memsize); barebox_arm_entry(membase, memsize, fdt); } diff --git a/arch/arm/dts/imx6dl-samx6i.dts b/arch/arm/dts/imx6dl-samx6i.dts index d688b9c6ca..da648ef5b8 100644 --- a/arch/arm/dts/imx6dl-samx6i.dts +++ b/arch/arm/dts/imx6dl-samx6i.dts @@ -1,20 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de> - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html + * Copyright 2019 (C) Pengutronix, Marco Felsch <kernel@pengutronix.de> */ /dts-v1/; -#include <arm/imx6dl.dtsi> +#include <arm/imx6dl-kontron-samx6i.dtsi> #include "imx6dl.dtsi" #include "imx6qdl-smarc-samx6i.dtsi" -/ { - model = "Kontron sAMX6i"; - compatible = "kontron,imx6dl-samx6i", "fsl,imx6dl"; +&fec { + status = "okay"; +}; + +&ecspi4 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usbotg { + status = "okay"; +}; + +&usbh1 { + status = "okay"; +}; + +&usdhc4 { + status = "okay"; }; diff --git a/arch/arm/dts/imx6q-samx6i.dts b/arch/arm/dts/imx6q-samx6i.dts index 83f19bcaf8..a2ea076edf 100644 --- a/arch/arm/dts/imx6q-samx6i.dts +++ b/arch/arm/dts/imx6q-samx6i.dts @@ -1,20 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de> - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html + * Copyright 2019 (C) Pengutronix, Marco Felsch <kernel@pengutronix.de> */ /dts-v1/; -#include <arm/imx6q.dtsi> +#include <arm/imx6q-kontron-samx6i.dtsi> #include "imx6q.dtsi" #include "imx6qdl-smarc-samx6i.dtsi" -/ { - model = "Kontron sAMX6i"; - compatible = "kontron,imx6q-samx6i", "fsl,imx6q"; +&fec { + status = "okay"; +}; + +&ecspi4 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&usbotg { + status = "okay"; +}; + +&usbh1 { + status = "okay"; +}; + +&usdhc4 { + status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi index f499ca5684..e1aa3183b3 100644 --- a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi @@ -127,30 +127,6 @@ MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000 >; }; - - pinctrl_gpmi_nand: gpminandgrp { - fsl,pins = < - MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 - MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 - MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 - MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 - MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 - MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 - MX6QDL_PAD_NANDF_CS2__NAND_CE2_B 0xb0b1 - MX6QDL_PAD_NANDF_CS3__NAND_CE3_B 0xb0b1 - MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 - MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 - MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 - MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 - MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 - MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 - MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 - MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 - MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 - MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 - MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 - >; - }; }; }; diff --git a/arch/arm/dts/imx6qdl-smarc-samx6i.dtsi b/arch/arm/dts/imx6qdl-smarc-samx6i.dtsi index 363da66ec7..504cd06de1 100644 --- a/arch/arm/dts/imx6qdl-smarc-samx6i.dtsi +++ b/arch/arm/dts/imx6qdl-smarc-samx6i.dtsi @@ -1,47 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 /* * Copyright 2017 (C) Priit Laes <plaes@plaes.org> * Copyright 2018 (C) Pengutronix, Michael Grzeschik <mgr@pengutronix.de> + * Copyright 2019 (C) Pengutronix, Marco Felsch <kernel@pengutronix.de> * * Based on initial work by Nikita Yushchenko <nyushchenko at dev.rtsoft.ru> - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * */ #include <dt-bindings/gpio/gpio.h> @@ -62,281 +25,39 @@ status = "disabled"; }; }; - - reg_3v3_s5: regulator@0 { - compatible = "regulator-fixed"; - regulator-name = "V_3V3_S5"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_1v8_s5: regulator@1 { - compatible = "regulator-fixed"; - regulator-name = "V_1V8_S5"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3v3_s0: regulator@2 { - compatible = "regulator-fixed"; - regulator-name = "V_3V3_S0"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_1v0_s0: regulator@3 { - compatible = "regulator-fixed"; - regulator-name = "V_1V0_S0"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-boot-on; - regulator-always-on; - }; - - i2c_pfuze: i2c-gpio-0 { - compatible = "i2c-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c_gpio_0>; - sda-gpios = <&gpio1 28 0>; - scl-gpios = <&gpio1 30 0>; - #address-cells = <1>; - #size-cells = <0>; - i2c-gpio,delay-us = <2>; - }; -}; - -&can1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan1>; }; -&can2 { +&gpio2 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flexcan2>; + pinctrl-0 = <&pinctrl_gpio2_hog>; }; -&fec { +&gpio6 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet_smarc>; - phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; - phy-mode = "rgmii"; - status = "okay"; + pinctrl-0 = <&pinctrl_gpio6_hog>; }; -&i2c_pfuze { - pfuze100@08 { - compatible = "fsl,pfuze100"; - reg = <0x08>; - - /* Looks unused by pfuze100 driver */ - interrupt-parent = <&gpio7>; - interrupts = <13 IRQ_TYPE_LEVEL_LOW>; - - regulators { - reg_v_core_s0: sw1ab { - regulator-name = "V_CORE_S0"; - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vddsoc_s0: sw1c { - regulator-name = "V_VDDSOC_S0"; - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3v15_s0: sw2 { - regulator-name = "V_3V15_S0"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - /* sw3a/b is used in dual mode, but driver does not - * support it? Although, there's no need to control - * DDR power - so just leaving dummy entries for sw3a - * and sw3b for now. - */ - sw3a { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3b { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_1v8_s0: sw4 { - regulator-name = "V_1V8_S0"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - /* Regulator for USB */ - reg_5v0_s0: swbst { - regulator-name = "V_5V0_S0"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5150000>; - regulator-boot-on; - }; - - reg_vsnvs: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_vrefddr: vrefddr { - regulator-boot-on; - regulator-always-on; - }; - - /* Per schematics, of all VGEN's, only VGEN5 has some - * usage ... but even that - over DNI resistor - */ - vgen1 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - - vgen4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - - reg_2v5_s0: vgen5 { - regulator-name = "V_2V5_S0"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; +&smarc_flash { + #address-cells = <1>; + #size-cells = <1>; - vgen6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - }; + partition@0 { + reg = <0x0 0x0c0000>; + label = "bootloader"; }; -}; - -&ecspi4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi4>; - fsl,spi-num-chipselects = <3>; - cs-gpios = <&gpio3 24 0>, <&gpio3 29 0>, <&gpio3 25 0>; - status = "okay"; - - flash: m25p80@0 { - compatible = "winbond,w25q16dw", "jedec,spi-nor"; - spi-max-frequency = <20000000>; - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "bootloader"; - reg = <0x000000 0x0c0000>; - }; - - flash_bareboxenv: partition@c0000 { - label = "environment"; - reg = <0x0c0000 0x010000>; - }; - partition@d0000 { - label = "user"; - reg = <0x0d0000 0x130000>; - }; + flash_bareboxenv: partition@c0000 { + reg = <0x0c0000 0x010000>; + label = "environment"; }; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; -}; - -&pcie { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie>; - wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>; - reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1_smarc>; - fsl,uart-has-rtscts; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2_smarc>; - status = "okay"; -}; -&uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart4_smarc>; - fsl,uart-has-rtscts; -}; - -&uart5 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart5_smarc>; -}; - -&usbotg { - /* - * no 'imx6-usb-charger-detection' - * since USB_OTG_CHD_B pin is not wired - */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usbotg>; - status = "okay"; -}; - -&usbh1 { - vbus-supply = <®_5v0_s0>; - status = "okay"; + partition@d0000 { + reg = <0x0d0000 0x130000>; + label = "user"; + }; }; &usdhc4 { - /* Internal eMMC, optional on some boards */ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc4>; - bus-width = <8>; - no-1-8-v; - non-removable; - status = "okay"; #address-cells = <1>; #size-cells = <1>; @@ -352,158 +73,18 @@ }; &iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_boot>; - - pinctrl_boot: boot { - fsl,pins = < - /* GPIOS for version and id detection */ - MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000 - MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x80000000 - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 - >; - }; - - pinctrl_flexcan1: flexcan1-smarc { - fsl,pins = < - MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000 - MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x80000000 - >; - }; - - pinctrl_flexcan2: flexcan2-smarc { - fsl,pins = < - MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000 - MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000 - >; - }; - - pinctrl_enet_smarc: fecgrp-smarc { - fsl,pins = < - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 - MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 - MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 - MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 - MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 - MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 - MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 - MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 - MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 - MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 - MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 - MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000 - >; - }; - - pinctrl_i2c_gpio_0: i2c-gpio-0-smarc { - fsl,pins = < - /* SCL GPIO */ - MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 - /* SDA GPIO */ - MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 - >; - }; - - pinctrl_i2c3: i2c3-smarc { - fsl,pins = < - MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 - MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 - >; - }; - - pinctrl_ecspi4: ecspi4-smarc { - fsl,pins = < - MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x80000000 - MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x80000000 - MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x80000000 - MX6QDL_PAD_EIM_D29__ECSPI4_SS0 0x80000000 - - /* In hardware, ECSPI4's SS0,SS1,SS3 are wired. - But spi-imx driver support only continuous - numbering, and only can use GPIOs (and not - ECSPI's hardware SS) for CS. So linux view - of CS numbers differs from hw view, and - pins are configured as GPIOs */ - - /* physical - CS2, in linux - CS0, either internal flash or SMARC CS0 */ - MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x80000000 - /* physical - CS0, in linux - CS1, either SMARC CS0 or not-connected */ - MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 - /* physical - CS3, in linux - CS2, SMARC CS1 */ - MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000 - >; - }; - - pinctrl_pcie: pcie-smarc { - fsl,pins = < - /* RST_PCIE_A# */ - MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x80000000 - /* PCIE_WAKE# */ - MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x80000000 - >; - }; - - pinctrl_uart1_smarc: uart1grp-smarc { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 - MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1 - MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1 - >; - }; - - pinctrl_uart2_smarc: uart2grp-smarc { - fsl,pins = < - MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 - >; - }; - - pinctrl_uart4_smarc: uart4grp-smarc { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 - MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 - MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 - MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 - >; - }; - - pinctrl_uart5_smarc: uart5grp-smarc { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1 - MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1 - >; - }; - - pinctrl_usbotg: usbotg-grp-smarc { + pinctrl_gpio2_hog: gpio2-hog { fsl,pins = < - MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1f8b0 - /* TODO: Comment out power and OC gpio's for now, since - * these are not used by driver - */ - /* USB power */ - // MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x80000000 - /* USB OC */ - // MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x80000000 + /* GPIO for version detection */ + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0xb0b0 >; }; - pinctrl_usdhc4: usdhc4grp-smarc { + pinctrl_gpio6_hog: gpio6-hog { fsl,pins = < - MX6QDL_PAD_SD4_CLK__SD4_CLK 0x17059 - MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 - MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 - MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 - MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 - MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 - MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 - MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 - MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 - MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 + /* GPIOs for ddr3 size detection */ + MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0xb0b0 + MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0xb0b0 >; }; }; diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi index ca11492de5..b82227fa20 100644 --- a/arch/arm/dts/stm32mp151.dtsi +++ b/arch/arm/dts/stm32mp151.dtsi @@ -62,3 +62,7 @@ &bsec { barebox,provide-mac-address = <ðernet0 0x39>; }; + +&vrefbuf { + regulator-name = "vref"; +}; diff --git a/arch/arm/include/asm/fncpy.h b/arch/arm/include/asm/fncpy.h new file mode 100644 index 0000000000..9d87ad72e9 --- /dev/null +++ b/arch/arm/include/asm/fncpy.h @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * arch/arm/include/asm/fncpy.h - helper macros for function body copying + * + * Copyright (C) 2011 Linaro Limited + */ + +/* + * These macros are intended for use when there is a need to copy a low-level + * function body into special memory. + * + * For example, when reconfiguring the SDRAM controller, the code doing the + * reconfiguration may need to run from SRAM. + * + * NOTE: that the copied function body must be entirely self-contained and + * position-independent in order for this to work properly. + * + * NOTE: in order for embedded literals and data to get referenced correctly, + * the alignment of functions must be preserved when copying. To ensure this, + * the source and destination addresses for fncpy() must be aligned to a + * multiple of 8 bytes: you will be get a BUG() if this condition is not met. + * You will typically need a ".align 3" directive in the assembler where the + * function to be copied is defined, and ensure that your allocator for the + * destination buffer returns 8-byte-aligned pointers. + * + * Typical usage example: + * + * extern int f(args); + * extern uint32_t size_of_f; + * int (*copied_f)(args); + * void *sram_buffer; + * + * copied_f = fncpy(sram_buffer, &f, size_of_f); + * + * ... later, call the function: ... + * + * copied_f(args); + * + * The size of the function to be copied can't be determined from C: + * this must be determined by other means, such as adding assmbler directives + * in the file where f is defined. + */ + +#ifndef __ASM_FNCPY_H +#define __ASM_FNCPY_H + +#include <linux/types.h> +#include <linux/string.h> + +/* + * Minimum alignment requirement for the source and destination addresses + * for function copying. + */ +#define FNCPY_ALIGN 8 + +#define fncpy(dest_buf, funcp, size) ({ \ + uintptr_t __funcp_address; \ + typeof(funcp) __result; \ + \ + asm("" : "=r" (__funcp_address) : "0" (funcp)); \ + \ + memcpy(dest_buf, (void const *)(__funcp_address & ~1), size); \ + \ + asm("" : "=r" (__result) \ + : "0" ((uintptr_t)(dest_buf) | (__funcp_address & 1))); \ + \ + __result; \ +}) + +#endif /* !__ASM_FNCPY_H */ diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 072b47317c..b442a37b9c 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -3,6 +3,10 @@ #define IO_SPACE_LIMIT 0 +#define memcpy_fromio memcpy_fromio +#define memcpy_toio memcpy_toio +#define memset_io memset_io + #include <asm-generic/io.h> #include <asm-generic/bitio.h> diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index e45f758e9c..d94c846a13 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -26,4 +26,4 @@ obj-$(CONFIG_BAREBOX_UPDATE) += imx-bbu-internal.o obj-$(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND) += imx-bbu-external-nand.o obj-$(CONFIG_RESET_IMX_SRC) += src.o lwl-y += cpu_init.o -pbl-y += xload-spi.o xload-common.o xload-imx-nand.o +pbl-y += xload-spi.o xload-common.o xload-imx-nand.o xload-gpmi-nand.o diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c index cc7a409e37..9d86353e22 100644 --- a/arch/arm/mach-imx/cpu_init.c +++ b/arch/arm/mach-imx/cpu_init.c @@ -20,6 +20,7 @@ #include <mach/generic.h> #include <mach/imx7-regs.h> #include <mach/imx8mq-regs.h> +#include <mach/imx8m-ccm-regs.h> #include <common.h> #include <io.h> #include <asm/syscounter.h> @@ -79,6 +80,9 @@ static void imx8m_cpu_lowlevel_init(void) void imx8mm_cpu_lowlevel_init(void) { + /* ungate system counter */ + imx8m_ccgr_clock_enable(IMX8M_CCM_CCGR_SCTR); + imx8m_cpu_lowlevel_init(); } diff --git a/arch/arm/mach-imx/imx8m.c b/arch/arm/mach-imx/imx8m.c index b9e01a1d18..350d203539 100644 --- a/arch/arm/mach-imx/imx8m.c +++ b/arch/arm/mach-imx/imx8m.c @@ -35,14 +35,14 @@ void imx8m_clock_set_target_val(int clock_id, u32 val) { - void *ccm = IOMEM(MX8M_CCM_BASE_ADDR); + void __iomem *ccm = IOMEM(MX8M_CCM_BASE_ADDR); writel(val, ccm + IMX8M_CCM_TARGET_ROOTn(clock_id)); } void imx8m_ccgr_clock_enable(int index) { - void *ccm = IOMEM(MX8M_CCM_BASE_ADDR); + void __iomem *ccm = IOMEM(MX8M_CCM_BASE_ADDR); writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0), ccm + IMX8M_CCM_CCGRn_SET(index)); @@ -50,7 +50,7 @@ void imx8m_ccgr_clock_enable(int index) void imx8m_ccgr_clock_disable(int index) { - void *ccm = IOMEM(MX8M_CCM_BASE_ADDR); + void __iomem *ccm = IOMEM(MX8M_CCM_BASE_ADDR); writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0), ccm + IMX8M_CCM_CCGRn_CLR(index)); diff --git a/arch/arm/mach-imx/include/mach/xload.h b/arch/arm/mach-imx/include/mach/xload.h index 94b2f37616..7187787f5b 100644 --- a/arch/arm/mach-imx/include/mach/xload.h +++ b/arch/arm/mach-imx/include/mach/xload.h @@ -5,6 +5,7 @@ int imx53_nand_start_image(void); int imx6_spi_load_image(int instance, unsigned int flash_offset, void *buf, int len); int imx6_spi_start_image(int instance); int imx6_esdhc_start_image(int instance); +int imx6_nand_start_image(void); int imx7_esdhc_start_image(int instance); int imx8m_esdhc_load_image(int instance, bool start); int imx8mp_esdhc_load_image(int instance, bool start); diff --git a/arch/arm/mach-imx/xload-gpmi-nand.c b/arch/arm/mach-imx/xload-gpmi-nand.c new file mode 100644 index 0000000000..b3fd479cb4 --- /dev/null +++ b/arch/arm/mach-imx/xload-gpmi-nand.c @@ -0,0 +1,1217 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#define pr_fmt(fmt) "xload-gpmi-nand: " fmt + +#include <common.h> +#include <stmp-device.h> +#include <asm-generic/io.h> +#include <linux/sizes.h> +#include <linux/mtd/nand.h> +#include <asm/cache.h> +#include <mach/xload.h> +#include <soc/imx/imx-nand-bcb.h> +#include <linux/mtd/rawnand.h> +#include <mach/imx6-regs.h> +#include <mach/clock-imx6.h> + +/* + * MXS DMA hardware command. + * + * This structure describes the in-memory layout of an entire DMA command, + * including space for the maximum number of PIO accesses. See the appropriate + * reference manual for a detailed description of what these fields mean to the + * DMA hardware. + */ +#define DMACMD_COMMAND_DMA_WRITE 0x1 +#define DMACMD_COMMAND_DMA_READ 0x2 +#define DMACMD_COMMAND_DMA_SENSE 0x3 +#define DMACMD_CHAIN (1 << 2) +#define DMACMD_IRQ (1 << 3) +#define DMACMD_NAND_LOCK (1 << 4) +#define DMACMD_NAND_WAIT_4_READY (1 << 5) +#define DMACMD_DEC_SEM (1 << 6) +#define DMACMD_WAIT4END (1 << 7) +#define DMACMD_HALT_ON_TERMINATE (1 << 8) +#define DMACMD_TERMINATE_FLUSH (1 << 9) +#define DMACMD_PIO_WORDS(words) ((words) << 12) +#define DMACMD_XFER_COUNT(x) ((x) << 16) + +struct mxs_dma_cmd { + unsigned long next; + unsigned long data; + unsigned long address; +#define APBH_DMA_PIO_WORDS 6 + unsigned long pio_words[APBH_DMA_PIO_WORDS]; +}; + +enum mxs_dma_id { + IMX23_DMA, + IMX28_DMA, +}; + +struct apbh_dma { + void __iomem *regs; + enum mxs_dma_id id; +}; + +struct mxs_dma_chan { + unsigned int flags; + int channel; + struct apbh_dma *apbh; +}; + +#define HW_APBHX_CTRL0 0x000 +#define BM_APBH_CTRL0_APB_BURST8_EN (1 << 29) +#define BM_APBH_CTRL0_APB_BURST_EN (1 << 28) +#define BP_APBH_CTRL0_CLKGATE_CHANNEL 8 +#define BP_APBH_CTRL0_RESET_CHANNEL 16 +#define HW_APBHX_CTRL1 0x010 +#define BP_APBHX_CTRL1_CH_CMDCMPLT_IRQ_EN 16 +#define HW_APBHX_CTRL2 0x020 +#define HW_APBHX_CHANNEL_CTRL 0x030 +#define BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL 16 +#define BP_APBHX_VERSION_MAJOR 24 +#define HW_APBHX_CHn_NXTCMDAR_MX23(n) (0x050 + (n) * 0x70) +#define HW_APBHX_CHn_NXTCMDAR_MX28(n) (0x110 + (n) * 0x70) +#define HW_APBHX_CHn_SEMA_MX23(n) (0x080 + (n) * 0x70) +#define HW_APBHX_CHn_SEMA_MX28(n) (0x140 + (n) * 0x70) +#define NAND_ONFI_CRC_BASE 0x4f4e + +#define apbh_dma_is_imx23(aphb) ((apbh)->id == IMX23_DMA) + +/* udelay() is not available in PBL, need to improvise */ +static void __udelay(int us) +{ + volatile int i; + + for (i = 0; i < us * 4; i++); +} + +/* + * Enable a DMA channel. + * + * If the given channel has any DMA descriptors on its active list, this + * function causes the DMA hardware to begin processing them. + * + * This function marks the DMA channel as "busy," whether or not there are any + * descriptors to process. + */ +static int mxs_dma_enable(struct mxs_dma_chan *pchan, + struct mxs_dma_cmd *pdesc) +{ + struct apbh_dma *apbh = pchan->apbh; + int channel_bit; + int channel = pchan->channel; + + if (apbh_dma_is_imx23(apbh)) { + writel((uint32_t)pdesc, + apbh->regs + HW_APBHX_CHn_NXTCMDAR_MX23(channel)); + writel(1, apbh->regs + HW_APBHX_CHn_SEMA_MX23(channel)); + channel_bit = channel + BP_APBH_CTRL0_CLKGATE_CHANNEL; + } else { + writel((uint32_t)pdesc, + apbh->regs + HW_APBHX_CHn_NXTCMDAR_MX28(channel)); + writel(1, apbh->regs + HW_APBHX_CHn_SEMA_MX28(channel)); + channel_bit = channel; + } + + writel(1 << channel_bit, apbh->regs + + HW_APBHX_CTRL0 + STMP_OFFSET_REG_CLR); + + return 0; +} + +/* + * Resets the DMA channel hardware. + */ +static int mxs_dma_reset(struct mxs_dma_chan *pchan) +{ + struct apbh_dma *apbh = pchan->apbh; + + if (apbh_dma_is_imx23(apbh)) + writel(1 << (pchan->channel + BP_APBH_CTRL0_RESET_CHANNEL), + apbh->regs + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET); + else + writel(1 << (pchan->channel + + BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL), + apbh->regs + HW_APBHX_CHANNEL_CTRL + + STMP_OFFSET_REG_SET); + + return 0; +} + +static int mxs_dma_wait_complete(struct mxs_dma_chan *pchan) +{ + struct apbh_dma *apbh = pchan->apbh; + int timeout = 1000000; + + while (1) { + if (readl(apbh->regs + HW_APBHX_CTRL1) & (1 << pchan->channel)) + return 0; + + if (!timeout--) + return -ETIMEDOUT; + } +} + +/* + * Execute the DMA channel + */ +static int mxs_dma_run(struct mxs_dma_chan *pchan, struct mxs_dma_cmd *pdesc, + int num) +{ + struct apbh_dma *apbh = pchan->apbh; + int i, ret; + + /* chain descriptors */ + for (i = 0; i < num - 1; i++) { + pdesc[i].next = (uint32_t)(&pdesc[i + 1]); + pdesc[i].data |= DMACMD_CHAIN; + } + + writel(1 << (pchan->channel + BP_APBHX_CTRL1_CH_CMDCMPLT_IRQ_EN), + apbh->regs + HW_APBHX_CTRL1 + STMP_OFFSET_REG_SET); + + ret = mxs_dma_enable(pchan, pdesc); + if (ret) { + pr_err("%s: Failed to enable dma channel: %d\n", + __func__, ret); + return ret; + } + + ret = mxs_dma_wait_complete(pchan); + if (ret) { + pr_err("%s: Failed to wait for completion: %d\n", + __func__, ret); + return ret; + } + + /* Shut the DMA channel down. */ + writel(1 << pchan->channel, apbh->regs + + HW_APBHX_CTRL1 + STMP_OFFSET_REG_CLR); + writel(1 << pchan->channel, apbh->regs + + HW_APBHX_CTRL2 + STMP_OFFSET_REG_CLR); + + mxs_dma_reset(pchan); + + writel(1 << (pchan->channel + BP_APBHX_CTRL1_CH_CMDCMPLT_IRQ_EN), + apbh->regs + HW_APBHX_CTRL1 + STMP_OFFSET_REG_CLR); + + return 0; +} + +/* ----------------------------- NAND driver part -------------------------- */ + +#define GPMI_CTRL0 0x00000000 +#define GPMI_CTRL0_RUN (1 << 29) +#define GPMI_CTRL0_DEV_IRQ_EN (1 << 28) +#define GPMI_CTRL0_UDMA (1 << 26) +#define GPMI_CTRL0_COMMAND_MODE_MASK (0x3 << 24) +#define GPMI_CTRL0_COMMAND_MODE_OFFSET 24 +#define GPMI_CTRL0_COMMAND_MODE_WRITE (0x0 << 24) +#define GPMI_CTRL0_COMMAND_MODE_READ (0x1 << 24) +#define GPMI_CTRL0_COMMAND_MODE_READ_AND_COMPARE (0x2 << 24) +#define GPMI_CTRL0_COMMAND_MODE_WAIT_FOR_READY (0x3 << 24) +#define GPMI_CTRL0_WORD_LENGTH (1 << 23) +#define GPMI_CTRL0_CS(cs) ((cs) << 20) +#define GPMI_CTRL0_ADDRESS_MASK (0x7 << 17) +#define GPMI_CTRL0_ADDRESS_OFFSET 17 +#define GPMI_CTRL0_ADDRESS_NAND_DATA (0x0 << 17) +#define GPMI_CTRL0_ADDRESS_NAND_CLE (0x1 << 17) +#define GPMI_CTRL0_ADDRESS_NAND_ALE (0x2 << 17) +#define GPMI_CTRL0_ADDRESS_INCREMENT (1 << 16) +#define GPMI_CTRL0_XFER_COUNT_MASK 0xffff +#define GPMI_CTRL0_XFER_COUNT_OFFSET 0 + +#define GPMI_ECCCTRL_ECC_CMD_DECODE (0x0 << 13) +#define GPMI_ECCCTRL_ENABLE_ECC (1 << 12) +#define GPMI_ECCCTRL_BUFFER_MASK_BCH_PAGE 0x1ff + +#define BCH_CTRL 0x00000000 +#define BCH_CTRL_COMPLETE_IRQ (1 << 0) + +#define MXS_NAND_DMA_DESCRIPTOR_COUNT 6 +#define MXS_NAND_CHUNK_DATA_CHUNK_SIZE 512 +#define MXS_NAND_METADATA_SIZE 10 +#define MXS_NAND_COMMAND_BUFFER_SIZE 128 + +struct mxs_nand_info { + void __iomem *io_base; + void __iomem *bch_base; + struct mxs_dma_chan *dma_channel; + int cs; + uint8_t *cmd_buf; + struct mxs_dma_cmd *desc; + struct fcb_block fcb; + int dbbt_num_entries; + u32 *dbbt; + struct nand_memory_organization organization; + unsigned long nand_size; +}; + +/** + * It was discovered that xloading barebox from NAND sometimes fails. Observed + * behaviour is similar to silicon errata ERR007117 for i.MX6. + * + * ERR007117 description: + * For raw NAND boot, ROM switches the source of enfc_clk_root from PLL2_PFD2 + * to PLL3. The root clock is required to be gated before switching the source + * clock. If the root clock is not gated, clock glitches might be passed to the + * divider that follows the clock mux, and the divider might behave + * unpredictably. This can cause the clock generation to fail and the chip will + * not boot successfully. + * + * Workaround solution for this errata: + * 1) gate all GPMI/BCH related clocks (CG15, G14, CG13, CG12 and CG6) + * 2) reconfigure clocks + * 3) ungate all GPMI/BCH related clocks + * + */ +static inline void imx6_errata_007117_enable(void) +{ + u32 reg; + + /* Gate (disable) the GPMI/BCH clocks in CCM_CCGR4 */ + reg = readl(MXC_CCM_CCGR4); + reg &= ~(0xFF003000); + writel(reg, MXC_CCM_CCGR4); + + /** + * Gate (disable) the enfc_clk_root before changing the enfc_clk_root + * source or dividers by clearing CCM_CCGR2[CG7] to 2'b00. This + * disables the iomux_ipt_clk_io_clk. + */ + reg = readl(MXC_CCM_CCGR2); + reg &= ~(0x3 << 14); + writel(reg, MXC_CCM_CCGR2); + + /* Configure CCM_CS2CDR for the new clock source configuration */ + reg = readl(MXC_CCM_CS2CDR); + reg &= ~(0x7FF0000); + writel(reg, MXC_CCM_CS2CDR); + reg |= 0xF0000; + writel(reg, MXC_CCM_CS2CDR); + + /** + * Enable enfc_clk_root by setting CCM_CCGR2[CG7] to 2'b11. This + * enables the iomux_ipt_clk_io_clk. + */ + reg = readl(MXC_CCM_CCGR2); + reg |= 0x3 << 14; + writel(reg, MXC_CCM_CCGR2); + + /* Ungate (enable) the GPMI/BCH clocks in CCM_CCGR4 */ + reg = readl(MXC_CCM_CCGR4); + reg |= 0xFF003000; + writel(reg, MXC_CCM_CCGR4); +} + +static uint32_t mxs_nand_aux_status_offset(void) +{ + return (MXS_NAND_METADATA_SIZE + 0x3) & ~0x3; +} + +static int mxs_nand_read_page(struct mxs_nand_info *info, int writesize, + int oobsize, int pagenum, void *databuf, int raw) +{ + void __iomem *bch_regs = info->bch_base; + unsigned column = 0; + struct mxs_dma_cmd *d; + int cmd_queue_len; + u8 *cmd_buf; + int ret; + uint8_t *status; + int i; + int timeout; + int descnum = 0; + int max_pagenum = info->nand_size / + info->organization.pagesize; + + memset(info->desc, 0, + sizeof(*info->desc) * MXS_NAND_DMA_DESCRIPTOR_COUNT); + + /* Compile DMA descriptor - read0 */ + cmd_buf = info->cmd_buf; + cmd_queue_len = 0; + d = &info->desc[descnum++]; + d->address = (dma_addr_t)(cmd_buf); + cmd_buf[cmd_queue_len++] = NAND_CMD_READ0; + cmd_buf[cmd_queue_len++] = column; + cmd_buf[cmd_queue_len++] = column >> 8; + cmd_buf[cmd_queue_len++] = pagenum; + cmd_buf[cmd_queue_len++] = pagenum >> 8; + + if ((max_pagenum - 1) >= SZ_64K) + cmd_buf[cmd_queue_len++] = pagenum >> 16; + + d->data = DMACMD_COMMAND_DMA_READ | + DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(cmd_queue_len); + + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_WRITE | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_CLE | + GPMI_CTRL0_ADDRESS_INCREMENT | + cmd_queue_len; + + /* Compile DMA descriptor - readstart */ + cmd_buf = &info->cmd_buf[8]; + cmd_queue_len = 0; + d = &info->desc[descnum++]; + d->address = (dma_addr_t)(cmd_buf); + + cmd_buf[cmd_queue_len++] = NAND_CMD_READSTART; + + d->data = DMACMD_COMMAND_DMA_READ | + DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(cmd_queue_len); + + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_WRITE | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_CLE | + GPMI_CTRL0_ADDRESS_INCREMENT | + cmd_queue_len; + + /* Compile DMA descriptor - wait for ready. */ + d = &info->desc[descnum++]; + d->data = DMACMD_CHAIN | + DMACMD_NAND_WAIT_4_READY | + DMACMD_WAIT4END | + DMACMD_PIO_WORDS(2); + + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_WAIT_FOR_READY | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_DATA; + + if (raw) { + /* Compile DMA descriptor - read. */ + d = &info->desc[descnum++]; + d->data = DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(writesize + oobsize) | + DMACMD_COMMAND_DMA_WRITE; + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_READ | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_DATA | + (writesize + oobsize); + d->address = (dma_addr_t)databuf; + } else { + /* Compile DMA descriptor - enable the BCH block and read. */ + d = &info->desc[descnum++]; + d->data = DMACMD_WAIT4END | DMACMD_PIO_WORDS(6); + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_READ | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_DATA | + (writesize + oobsize); + d->pio_words[1] = 0; + d->pio_words[2] = GPMI_ECCCTRL_ENABLE_ECC | + GPMI_ECCCTRL_ECC_CMD_DECODE | + GPMI_ECCCTRL_BUFFER_MASK_BCH_PAGE; + d->pio_words[3] = writesize + oobsize; + d->pio_words[4] = (dma_addr_t)databuf; + d->pio_words[5] = (dma_addr_t)(databuf + writesize); + + /* Compile DMA descriptor - disable the BCH block. */ + d = &info->desc[descnum++]; + d->data = DMACMD_NAND_WAIT_4_READY | + DMACMD_WAIT4END | + DMACMD_PIO_WORDS(3); + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_WAIT_FOR_READY | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_DATA | + (writesize + oobsize); + } + + /* Compile DMA descriptor - de-assert the NAND lock and interrupt. */ + d = &info->desc[descnum++]; + d->data = DMACMD_IRQ | DMACMD_DEC_SEM; + + /* Execute the DMA chain. */ + ret = mxs_dma_run(info->dma_channel, info->desc, descnum); + if (ret) { + pr_err("DMA read error\n"); + goto err; + } + + if (raw) + return 0; + + timeout = 1000000; + + while (1) { + if (!timeout--) { + ret = -ETIMEDOUT; + goto err; + } + + if (readl(bch_regs + BCH_CTRL) & BCH_CTRL_COMPLETE_IRQ) + break; + } + + writel(BCH_CTRL_COMPLETE_IRQ, + bch_regs + BCH_CTRL + STMP_OFFSET_REG_CLR); + + /* Loop over status bytes, accumulating ECC status. */ + status = databuf + writesize + mxs_nand_aux_status_offset(); + for (i = 0; i < writesize / MXS_NAND_CHUNK_DATA_CHUNK_SIZE; i++) { + if (status[i] == 0xfe) { + ret = -EBADMSG; + goto err; + } + } + + ret = 0; +err: + return ret; +} + +static int mxs_nand_get_read_status(struct mxs_nand_info *info, void *databuf) +{ + int ret; + u8 *cmd_buf; + struct mxs_dma_cmd *d; + int descnum = 0; + int cmd_queue_len; + + memset(info->desc, 0, + sizeof(*info->desc) * MXS_NAND_DMA_DESCRIPTOR_COUNT); + + /* Compile DMA descriptor - READ STATUS */ + cmd_buf = info->cmd_buf; + cmd_queue_len = 0; + d = &info->desc[descnum++]; + d->address = (dma_addr_t)(cmd_buf); + cmd_buf[cmd_queue_len++] = NAND_CMD_STATUS; + + d->data = DMACMD_COMMAND_DMA_READ | + DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(cmd_queue_len); + + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_WRITE | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_CLE | + GPMI_CTRL0_ADDRESS_INCREMENT | + cmd_queue_len; + + /* Compile DMA descriptor - read. */ + d = &info->desc[descnum++]; + d->data = DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(1) | + DMACMD_COMMAND_DMA_WRITE; + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_READ | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_DATA | + (1); + d->address = (dma_addr_t)databuf; + + /* Compile DMA descriptor - de-assert the NAND lock and interrupt. */ + d = &info->desc[descnum++]; + d->data = DMACMD_IRQ | DMACMD_DEC_SEM; + + /* Execute the DMA chain. */ + ret = mxs_dma_run(info->dma_channel, info->desc, descnum); + if (ret) { + pr_err("DMA read error\n"); + return ret; + } + + return ret; +} + +static int mxs_nand_reset(struct mxs_nand_info *info, void *databuf) +{ + int ret, i; + u8 *cmd_buf; + struct mxs_dma_cmd *d; + int descnum = 0; + int cmd_queue_len; + u8 read_status; + + memset(info->desc, 0, + sizeof(*info->desc) * MXS_NAND_DMA_DESCRIPTOR_COUNT); + + /* Compile DMA descriptor - RESET */ + cmd_buf = info->cmd_buf; + cmd_queue_len = 0; + d = &info->desc[descnum++]; + d->address = (dma_addr_t)(cmd_buf); + cmd_buf[cmd_queue_len++] = NAND_CMD_RESET; + + d->data = DMACMD_COMMAND_DMA_READ | + DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(cmd_queue_len); + + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_WRITE | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_CLE | + GPMI_CTRL0_ADDRESS_INCREMENT | + cmd_queue_len; + + /* Compile DMA descriptor - de-assert the NAND lock and interrupt. */ + d = &info->desc[descnum++]; + d->data = DMACMD_IRQ | DMACMD_DEC_SEM; + + /* Execute the DMA chain. */ + ret = mxs_dma_run(info->dma_channel, info->desc, descnum); + if (ret) { + pr_err("DMA read error\n"); + return ret; + } + + /* Wait for NAND to wake up */ + for (i = 0; i < 10; i++) { + __udelay(50000); + ret = mxs_nand_get_read_status(info, databuf); + if (ret) + return ret; + memcpy(&read_status, databuf, 1); + if (read_status & NAND_STATUS_READY) + return 0; + } + + pr_warn("NAND Reset failed\n"); + return -1; +} + +/* function taken from nand_onfi.c */ +static u16 onfi_crc16(u16 crc, u8 const *p, size_t len) +{ + int i; + + while (len--) { + crc ^= *p++ << 8; + for (i = 0; i < 8; i++) + crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0); + } + return crc; +} + +static int mxs_nand_get_onfi(struct mxs_nand_info *info, void *databuf) +{ + int ret; + u8 *cmd_buf; + u16 crc; + struct mxs_dma_cmd *d; + int descnum = 0; + int cmd_queue_len; + struct nand_onfi_params nand_params; + + memset(info->desc, 0, + sizeof(*info->desc) * MXS_NAND_DMA_DESCRIPTOR_COUNT); + + /* Compile DMA descriptor - READ PARAMETER PAGE */ + cmd_buf = info->cmd_buf; + cmd_queue_len = 0; + d = &info->desc[descnum++]; + d->address = (dma_addr_t)(cmd_buf); + cmd_buf[cmd_queue_len++] = NAND_CMD_PARAM; + cmd_buf[cmd_queue_len++] = 0x00; + + d->data = DMACMD_COMMAND_DMA_READ | + DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(cmd_queue_len); + + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_WRITE | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_CLE | + GPMI_CTRL0_ADDRESS_INCREMENT | + cmd_queue_len; + + /* Compile DMA descriptor - wait for ready. */ + d = &info->desc[descnum++]; + d->data = DMACMD_CHAIN | + DMACMD_NAND_WAIT_4_READY | + DMACMD_WAIT4END | + DMACMD_PIO_WORDS(2); + + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_WAIT_FOR_READY | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_DATA; + + /* Compile DMA descriptor - read. */ + d = &info->desc[descnum++]; + d->data = DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(sizeof(struct nand_onfi_params)) | + DMACMD_COMMAND_DMA_WRITE; + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_READ | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_DATA | + (sizeof(struct nand_onfi_params)); + d->address = (dma_addr_t)databuf; + + /* Compile DMA descriptor - de-assert the NAND lock and interrupt. */ + d = &info->desc[descnum++]; + d->data = DMACMD_IRQ | DMACMD_DEC_SEM; + + /* Execute the DMA chain. */ + ret = mxs_dma_run(info->dma_channel, info->desc, descnum); + if (ret) { + pr_err("DMA read error\n"); + return ret; + } + + memcpy(&nand_params, databuf, sizeof(struct nand_onfi_params)); + + crc = onfi_crc16(NAND_ONFI_CRC_BASE, (u8 *)&nand_params, 254); + pr_debug("ONFI CRC: 0x%x, CALC. CRC 0x%x\n", nand_params.crc, crc); + if (crc != le16_to_cpu(nand_params.crc)) { + pr_debug("ONFI CRC mismatch!\n"); + ret = -EUCLEAN; + return ret; + } + + /* Fill the NAND organization struct with data */ + info->organization.bits_per_cell = nand_params.bits_per_cell; + info->organization.pagesize = le32_to_cpu(nand_params.byte_per_page); + info->organization.oobsize = + le16_to_cpu(nand_params.spare_bytes_per_page); + info->organization.pages_per_eraseblock = + le32_to_cpu(nand_params.pages_per_block); + info->organization.eraseblocks_per_lun = + le32_to_cpu(nand_params.blocks_per_lun); + info->organization.max_bad_eraseblocks_per_lun = + le16_to_cpu(nand_params.bb_per_lun); + info->organization.luns_per_target = nand_params.lun_count; + info->nand_size = info->organization.pagesize * + info->organization.pages_per_eraseblock * + info->organization.eraseblocks_per_lun * + info->organization.luns_per_target; + + return ret; +} + +static int mxs_nand_check_onfi(struct mxs_nand_info *info, void *databuf) +{ + int ret; + u8 *cmd_buf; + struct mxs_dma_cmd *d; + int descnum = 0; + int cmd_queue_len; + + struct onfi_header { + u8 byte0; + u8 byte1; + u8 byte2; + u8 byte3; + } onfi_head; + + memset(info->desc, 0, + sizeof(*info->desc) * MXS_NAND_DMA_DESCRIPTOR_COUNT); + + /* Compile DMA descriptor - READID + 0x20 (ADDR) */ + cmd_buf = info->cmd_buf; + cmd_queue_len = 0; + d = &info->desc[descnum++]; + d->address = (dma_addr_t)(cmd_buf); + cmd_buf[cmd_queue_len++] = NAND_CMD_READID; + cmd_buf[cmd_queue_len++] = 0x20; + + d->data = DMACMD_COMMAND_DMA_READ | + DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(cmd_queue_len); + + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_WRITE | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_CLE | + GPMI_CTRL0_ADDRESS_INCREMENT | + cmd_queue_len; + + /* Compile DMA descriptor - read. */ + d = &info->desc[descnum++]; + d->data = DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(sizeof(struct onfi_header)) | + DMACMD_COMMAND_DMA_WRITE; + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_READ | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_DATA | + (sizeof(struct onfi_header)); + d->address = (dma_addr_t)databuf; + + /* Compile DMA descriptor - de-assert the NAND lock and interrupt. */ + d = &info->desc[descnum++]; + d->data = DMACMD_IRQ | DMACMD_DEC_SEM; + + /* Execute the DMA chain. */ + ret = mxs_dma_run(info->dma_channel, info->desc, descnum); + if (ret) { + pr_err("DMA read error\n"); + return ret; + } + + memcpy(&onfi_head, databuf, sizeof(struct onfi_header)); + + pr_debug("ONFI Byte0: 0x%x\n", onfi_head.byte0); + pr_debug("ONFI Byte1: 0x%x\n", onfi_head.byte1); + pr_debug("ONFI Byte2: 0x%x\n", onfi_head.byte2); + pr_debug("ONFI Byte3: 0x%x\n", onfi_head.byte3); + + /* check if returned values correspond to ascii characters "ONFI" */ + if (onfi_head.byte0 != 0x4f || onfi_head.byte1 != 0x4e || + onfi_head.byte2 != 0x46 || onfi_head.byte3 != 0x49) + return 1; + + return 0; +} + +static int mxs_nand_get_readid(struct mxs_nand_info *info, void *databuf) +{ + int ret; + u8 *cmd_buf; + struct mxs_dma_cmd *d; + int descnum = 0; + int cmd_queue_len; + + struct readid_data { + u8 byte0; + u8 byte1; + u8 byte2; + u8 byte3; + u8 byte4; + } id_data; + + memset(info->desc, 0, + sizeof(*info->desc) * MXS_NAND_DMA_DESCRIPTOR_COUNT); + + /* Compile DMA descriptor - READID */ + cmd_buf = info->cmd_buf; + cmd_queue_len = 0; + d = &info->desc[descnum++]; + d->address = (dma_addr_t)(cmd_buf); + cmd_buf[cmd_queue_len++] = NAND_CMD_READID; + cmd_buf[cmd_queue_len++] = 0x00; + + d->data = DMACMD_COMMAND_DMA_READ | + DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(cmd_queue_len); + + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_WRITE | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_CLE | + GPMI_CTRL0_ADDRESS_INCREMENT | + cmd_queue_len; + + /* Compile DMA descriptor - read. */ + d = &info->desc[descnum++]; + d->data = DMACMD_WAIT4END | + DMACMD_PIO_WORDS(1) | + DMACMD_XFER_COUNT(sizeof(struct readid_data)) | + DMACMD_COMMAND_DMA_WRITE; + d->pio_words[0] = GPMI_CTRL0_COMMAND_MODE_READ | + GPMI_CTRL0_WORD_LENGTH | + GPMI_CTRL0_CS(info->cs) | + GPMI_CTRL0_ADDRESS_NAND_DATA | + (sizeof(struct readid_data)); + d->address = (dma_addr_t)databuf; + + /* Compile DMA descriptor - de-assert the NAND lock and interrupt. */ + d = &info->desc[descnum++]; + d->data = DMACMD_IRQ | DMACMD_DEC_SEM; + + /* Execute the DMA chain. */ + ret = mxs_dma_run(info->dma_channel, info->desc, descnum); + if (ret) { + pr_err("DMA read error\n"); + return ret; + } + + memcpy(&id_data, databuf, sizeof(struct readid_data)); + + pr_debug("NAND Byte0: 0x%x\n", id_data.byte0); + pr_debug("NAND Byte1: 0x%x\n", id_data.byte1); + pr_debug("NAND Byte2: 0x%x\n", id_data.byte2); + pr_debug("NAND Byte3: 0x%x\n", id_data.byte3); + pr_debug("NAND Byte4: 0x%x\n", id_data.byte4); + + if (id_data.byte0 == 0xff || id_data.byte1 == 0xff || + id_data.byte2 == 0xff || id_data.byte3 == 0xff || + id_data.byte4 == 0xff) { + pr_err("\"READ ID\" returned 0xff, possible error!\n"); + return -EOVERFLOW; + } + + /* Fill the NAND organization struct with data */ + info->organization.bits_per_cell = + (1 << ((id_data.byte2 >> 2) & 0x3)) * 2; + info->organization.pagesize = + (1 << (id_data.byte3 & 0x3)) * SZ_1K; + info->organization.oobsize = id_data.byte3 & 0x4 ? + info->organization.pagesize / 512 * 16 : + info->organization.pagesize / 512 * 8; + info->organization.pages_per_eraseblock = + (1 << ((id_data.byte3 >> 4) & 0x3)) * SZ_64K / + info->organization.pagesize; + info->organization.planes_per_lun = + 1 << ((id_data.byte4 >> 2) & 0x3); + info->nand_size = info->organization.planes_per_lun * + (1 << ((id_data.byte4 >> 4) & 0x7)) * SZ_8M; + info->organization.eraseblocks_per_lun = info->nand_size / + (info->organization.pages_per_eraseblock * + info->organization.pagesize); + + return ret; +} + +static int mxs_nand_get_info(struct mxs_nand_info *info, void *databuf) +{ + int ret, i; + + ret = mxs_nand_check_onfi(info, databuf); + if (ret) { + if (ret != 1) + return ret; + pr_info("ONFI not supported, try \"READ ID\"...\n"); + } else { + /* + * Some NAND's don't return the correct data the first time + * "READ PARAMETER PAGE" is returned. Execute the command + * multimple times + */ + for (i = 0; i < 3; i++) { + /* + * Some NAND's need to be reset before "READ PARAMETER + * PAGE" can be successfully executed. + */ + ret = mxs_nand_reset(info, databuf); + if (ret) + return ret; + ret = mxs_nand_get_onfi(info, databuf); + if (ret) + pr_err("ONFI error: %d\n", ret); + else + break; + } + if (!ret) + goto succ; + } + + /* + * If ONFI is not supported or if it fails try to get NAND's info from + * "READ ID" command. + */ + ret = mxs_nand_reset(info, databuf); + if (ret) + return ret; + pr_debug("Trying \"READ ID\" command...\n"); + ret = mxs_nand_get_readid(info, databuf); + if (ret) { + pr_err("xloader supports only ONFI and generic \"READ ID\" " \ + "supported NANDs\n"); + return -1; + } +succ: + pr_debug("NAND page_size: %d\n", info->organization.pagesize); + pr_debug("NAND block_size: %d\n", + info->organization.pages_per_eraseblock + * info->organization.pagesize); + pr_debug("NAND oob_size: %d\n", info->organization.oobsize); + pr_debug("NAND nand_size: %lu\n", info->nand_size); + pr_debug("NAND bits_per_cell: %d\n", info->organization.bits_per_cell); + pr_debug("NAND planes_per_lun: %d\n", + info->organization.planes_per_lun); + pr_debug("NAND luns_per_target: %d\n", + info->organization.luns_per_target); + pr_debug("NAND eraseblocks_per_lun: %d\n", + info->organization.eraseblocks_per_lun); + pr_debug("NAND ntargets: %d\n", info->organization.ntargets); + + + return 0; +} + +/* ---------------------------- BCB handling part -------------------------- */ + +static uint32_t calc_chksum(void *buf, size_t size) +{ + u32 chksum = 0; + u8 *bp = buf; + size_t i; + + for (i = 0; i < size; i++) + chksum += bp[i]; + + return ~chksum; +} + +static int get_fcb(struct mxs_nand_info *info, void *databuf) +{ + int i, pagenum, ret; + uint32_t checksum; + struct fcb_block *fcb = &info->fcb; + + /* First page read fails, this shouldn't be necessary */ + mxs_nand_read_page(info, info->organization.pagesize, + info->organization.oobsize, 0, databuf, 1); + + for (i = 0; i < 4; i++) { + pagenum = info->organization.pages_per_eraseblock * i; + + ret = mxs_nand_read_page(info, info->organization.pagesize, + info->organization.oobsize, pagenum, databuf, 1); + if (ret) + continue; + + memcpy(fcb, databuf + mxs_nand_aux_status_offset(), + sizeof(*fcb)); + + if (fcb->FingerPrint != FCB_FINGERPRINT) { + pr_err("No FCB found on page %d\n", pagenum); + continue; + } + + checksum = calc_chksum((void *)fcb + + sizeof(uint32_t), sizeof(*fcb) - sizeof(uint32_t)); + + if (checksum != fcb->Checksum) { + pr_err("FCB on page %d has invalid checksum. " \ + "Expected: 0x%08x, calculated: 0x%08x", + pagenum, fcb->Checksum, checksum); + continue; + } + + pr_debug("Found FCB:\n"); + pr_debug("PageDataSize: 0x%08x\n", fcb->PageDataSize); + pr_debug("TotalPageSize: 0x%08x\n", fcb->TotalPageSize); + pr_debug("SectorsPerBlock: 0x%08x\n", fcb->SectorsPerBlock); + pr_debug("FW1_startingPage: 0x%08x\n", + fcb->Firmware1_startingPage); + pr_debug("PagesInFW1: 0x%08x\n", fcb->PagesInFirmware1); + pr_debug("FW2_startingPage: 0x%08x\n", + fcb->Firmware2_startingPage); + pr_debug("PagesInFW2: 0x%08x\n", fcb->PagesInFirmware2); + + return 0; + } + + return -EINVAL; +} + +static int get_dbbt(struct mxs_nand_info *info, void *databuf) +{ + int i, ret; + int page; + int startpage = info->fcb.DBBTSearchAreaStartAddress; + struct dbbt_block dbbt; + + for (i = 0; i < 4; i++) { + page = startpage + i * info->organization.pages_per_eraseblock; + + ret = mxs_nand_read_page(info, info->organization.pagesize, + info->organization.oobsize, page, databuf, 0); + if (ret) + continue; + + memcpy(&dbbt, databuf, sizeof(struct dbbt_block)); + + if (*(u32 *)(databuf + sizeof(u32)) != DBBT_FINGERPRINT) + continue; + + /* Version check */ + if (be32_to_cpup(databuf + 2 * sizeof(u32)) < 1) + return -ENOENT; + + ret = mxs_nand_read_page(info, info->organization.pagesize, + info->organization.oobsize, page + 4, databuf, 0); + if (ret) + continue; + + info->dbbt_num_entries = *(u32 *)(databuf + sizeof(u32)); + + pr_debug("Found DBBT with %d entries\n", + info->dbbt_num_entries); + pr_debug("Checksum = 0x%08x\n", dbbt.Checksum); + pr_debug("FingerPrint = 0x%08x\n", dbbt.FingerPrint); + pr_debug("Version = 0x%08x\n", dbbt.Version); + pr_debug("numberBB = 0x%08x\n", dbbt.numberBB); + pr_debug("DBBTNumOfPages= 0x%08x\n", dbbt.DBBTNumOfPages); + + for (i = 0; i < info->dbbt_num_entries; i++) + pr_debug("badblock %d at block %d\n", i, + *(u32 *)(databuf + (2 + i) * sizeof(u32))); + + info->dbbt = databuf + 2 * sizeof(u32); + + return 0; + } + + return -ENOENT; +} + +static int block_is_bad(struct mxs_nand_info *info, int blocknum) +{ + int i; + u32 *dbbt = info->dbbt; + + if (!dbbt) + return 0; + + for (i = 0; i < info->dbbt_num_entries; i++) { + if (dbbt[i] == blocknum) + return 1; + } + + return 0; +} + +static int read_firmware(struct mxs_nand_info *info, int startpage, + void *dest, int len) +{ + int curpage = startpage; + struct fcb_block *fcb = &info->fcb; + int pagesperblock = fcb->SectorsPerBlock; + int numpages = (len / fcb->PageDataSize) + 1; + int ret; + int pagesize = fcb->PageDataSize; + int oobsize = fcb->TotalPageSize - pagesize; + + pr_debug("Reading %d pages starting from page %d\n", + numpages, startpage); + + if (block_is_bad(info, curpage / pagesperblock)) + curpage = ALIGN_DOWN(curpage + pagesperblock, pagesperblock); + + while (numpages) { + if (!(curpage & (pagesperblock - 1))) { + /* Check for bad blocks on each block boundary */ + if (block_is_bad(info, curpage / pagesperblock)) { + pr_debug("Skipping bad block at page %d\n", + curpage); + curpage += pagesperblock; + continue; + } + } + + ret = mxs_nand_read_page(info, pagesize, oobsize, + curpage, dest, 0); + if (ret) { + pr_debug("Failed to read page %d\n", curpage); + return ret; + } + + *((u8 *)dest + fcb->BadBlockMarkerByte) = + *(u8 *)(dest + pagesize); + + numpages--; + dest += pagesize; + curpage++; + } + + return 0; +} + +static int __maybe_unused imx6_nand_load_image(void *cmdbuf, void *descs, + void *databuf, void *dest, int len) +{ + struct mxs_nand_info info = { + .io_base = (void *)0x00112000, + .bch_base = (void *)0x00114000, + }; + struct apbh_dma apbh = { + .id = IMX28_DMA, + .regs = (void *)0x00110000, + }; + struct mxs_dma_chan pchan = { + .channel = 0, /* MXS: MXS_DMA_CHANNEL_AHB_APBH_GPMI0 */ + .apbh = &apbh, + }; + int ret; + struct fcb_block *fcb; + + info.dma_channel = &pchan; + + pr_debug("cmdbuf: 0x%p descs: 0x%p databuf: 0x%p dest: 0x%p\n", + cmdbuf, descs, databuf, dest); + + /* Command buffers */ + info.cmd_buf = cmdbuf; + info.desc = descs; + + ret = mxs_nand_get_info(&info, databuf); + if (ret) + return ret; + + ret = get_fcb(&info, databuf); + if (ret) + return ret; + + fcb = &info.fcb; + + get_dbbt(&info, databuf); + + ret = read_firmware(&info, fcb->Firmware1_startingPage, dest, len); + if (ret) { + pr_err("Failed to read firmware1, trying firmware2\n"); + ret = read_firmware(&info, fcb->Firmware2_startingPage, + dest, len); + if (ret) { + pr_err("Failed to also read firmware2\n"); + return ret; + } + } + + return 0; +} + +int imx6_nand_start_image(void) +{ + int ret; + void *sdram = (void *)0x10000000; + void __noreturn (*bb)(void); + void *cmdbuf, *databuf, *descs; + + cmdbuf = sdram; + descs = sdram + MXS_NAND_COMMAND_BUFFER_SIZE; + databuf = descs + + sizeof(struct mxs_dma_cmd) * MXS_NAND_DMA_DESCRIPTOR_COUNT; + bb = (void *)PAGE_ALIGN((unsigned long)databuf + SZ_8K); + + /* Apply ERR007117 workaround */ + imx6_errata_007117_enable(); + + ret = imx6_nand_load_image(cmdbuf, descs, databuf, + bb, imx_image_size()); + if (ret) { + pr_err("Loading image failed: %d\n", ret); + return ret; + } + + pr_debug("Starting barebox image at 0x%p\n", bb); + + arm_early_mmu_cache_invalidate(); + barrier(); + + bb(); +} diff --git a/arch/arm/mach-omap/am33xx_clock.c b/arch/arm/mach-omap/am33xx_clock.c index 8fa2c70aa2..a5ac6f68c0 100644 --- a/arch/arm/mach-omap/am33xx_clock.c +++ b/arch/arm/mach-omap/am33xx_clock.c @@ -16,7 +16,7 @@ #include <asm/io.h> #include <mach/am33xx-clock.h> #include <mach/am33xx-generic.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #define PRCM_MOD_EN 0x2 #define PRCM_FORCE_WAKEUP 0x2 diff --git a/arch/arm/mach-samsung/clocks-s3c64xx.c b/arch/arm/mach-samsung/clocks-s3c64xx.c index 3c13f52d2e..2229ed0529 100644 --- a/arch/arm/mach-samsung/clocks-s3c64xx.c +++ b/arch/arm/mach-samsung/clocks-s3c64xx.c @@ -17,7 +17,7 @@ #include <init.h> #include <clock.h> #include <io.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <mach/s3c-iomap.h> #include <mach/s3c-generic.h> #include <mach/s3c-clocks.h> diff --git a/arch/powerpc/ddr-8xxx/util.c b/arch/powerpc/ddr-8xxx/util.c index 626b5f3f9b..4525524926 100644 --- a/arch/powerpc/ddr-8xxx/util.c +++ b/arch/powerpc/ddr-8xxx/util.c @@ -8,7 +8,7 @@ #include <common.h> #include <asm/fsl_law.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <mach/clock.h> #include "ddr.h" diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h index 025c06f3b7..8488c36f65 100644 --- a/arch/powerpc/include/asm/io.h +++ b/arch/powerpc/include/asm/io.h @@ -86,10 +86,6 @@ extern void _outsl_ns(volatile u32 *port, const void *buf, int nl); #define IO_SPACE_LIMIT ~0 -#define memset_io(a,b,c) memset((void *)(a),(b),(c)) -#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) -#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) - /* * Enforce In-order Execution of I/O: * Acts as a barrier to ensure all previous I/O accesses have diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index d9fc0c947b..5d1702480f 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -9,6 +9,7 @@ config SANDBOX select HAS_DMA select BLOCK select BLOCK_WRITE + select PARTITION select PARTITION_DISK select ARCH_HAS_STACK_DUMP if ASAN select GENERIC_FIND_NEXT_BIT diff --git a/arch/sandbox/board/hostfile.c b/arch/sandbox/board/hostfile.c index e3e38b7119..4fdf2b317d 100644 --- a/arch/sandbox/board/hostfile.c +++ b/arch/sandbox/board/hostfile.c @@ -72,14 +72,14 @@ static struct cdev_operations hf_cdev_ops = { .write = hf_cdev_write, }; -static int hf_blk_read(struct block_device *blk, void *buf, int block, int num_blocks) +static int hf_blk_read(struct block_device *blk, void *buf, sector_t block, blkcnt_t num_blocks) { ssize_t ret = hf_read(container_of(blk, struct hf_priv, blk), buf, num_blocks << SECTOR_SHIFT, block << SECTOR_SHIFT, 0); return ret > 0 ? 0 : ret; } -static int hf_blk_write(struct block_device *blk, const void *buf, int block, int num_blocks) +static int hf_blk_write(struct block_device *blk, const void *buf, sector_t block, blkcnt_t num_blocks) { ssize_t ret = hf_write(container_of(blk, struct hf_priv, blk), buf, num_blocks << SECTOR_SHIFT, block << SECTOR_SHIFT, 0); @@ -102,21 +102,18 @@ static int hf_probe(struct device_d *dev) { struct device_node *np = dev->device_node; struct hf_priv *priv = xzalloc(sizeof(*priv)); - struct resource *res; struct cdev *cdev; bool is_blockdev; - resource_size_t size; + u64 reg[2]; int err; - res = dev_get_resource(dev, IORESOURCE_MEM, 0); - if (IS_ERR(res)) - return PTR_ERR(res); - - size = resource_size(res); - if (!np) return -ENODEV; + err = of_property_read_u64_array(np, "reg", reg, ARRAY_SIZE(reg)); + if (err) + return err; + of_property_read_u32(np, "barebox,fd", &priv->fd); err = of_property_read_string(np, "barebox,filename", @@ -141,7 +138,7 @@ static int hf_probe(struct device_d *dev) priv->blk.dev = dev; priv->blk.ops = &hf_blk_ops; priv->blk.blockbits = SECTOR_SHIFT; - priv->blk.num_blocks = size / SECTOR_SIZE; + priv->blk.num_blocks = reg[1] / SECTOR_SIZE; err = blockdevice_register(&priv->blk); if (err) @@ -156,7 +153,7 @@ static int hf_probe(struct device_d *dev) cdev->name = np->name; cdev->dev = dev; cdev->ops = &hf_cdev_ops; - cdev->size = size; + cdev->size = reg[1]; cdev->priv = priv; err = devfs_create(cdev); diff --git a/arch/sandbox/configs/sandbox_defconfig b/arch/sandbox/configs/sandbox_defconfig index ca24d81aca..dcd0557326 100644 --- a/arch/sandbox/configs/sandbox_defconfig +++ b/arch/sandbox/configs/sandbox_defconfig @@ -1,3 +1,4 @@ +CONFIG_MALLOC_SIZE=0x1000000 CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y diff --git a/arch/sandbox/mach-sandbox/include/mach/linux.h b/arch/sandbox/mach-sandbox/include/mach/linux.h index b26bfc24a2..f047c83e17 100644 --- a/arch/sandbox/mach-sandbox/include/mach/linux.h +++ b/arch/sandbox/mach-sandbox/include/mach/linux.h @@ -17,7 +17,7 @@ int linux_open_hostfile(struct hf_info *hf); int linux_read(int fd, void *buf, size_t count); int linux_read_nonblock(int fd, void *buf, size_t count); ssize_t linux_write(int fd, const void *buf, size_t count); -off_t linux_lseek(int fildes, off_t offset); +loff_t linux_lseek(int fildes, loff_t offset); int linux_tstc(int fd); void __attribute__((noreturn)) linux_exit(void); void linux_hang(void); diff --git a/arch/sandbox/os/Makefile b/arch/sandbox/os/Makefile index 15d688bfdd..9a264ca314 100644 --- a/arch/sandbox/os/Makefile +++ b/arch/sandbox/os/Makefile @@ -4,7 +4,7 @@ machdirs := $(patsubst %,arch/sandbox/mach-%/,$(machine-y)) KBUILD_CPPFLAGS = $(patsubst %,-I$(srctree)/%include,$(machdirs)) -KBUILD_CPPFLAGS += -DCONFIG_MALLOC_SIZE=$(CONFIG_MALLOC_SIZE) +KBUILD_CPPFLAGS += -DCONFIG_MALLOC_SIZE=$(CONFIG_MALLOC_SIZE) -D_FILE_OFFSET_BITS=64 KBUILD_CFLAGS := -Wall diff --git a/arch/sandbox/os/common.c b/arch/sandbox/os/common.c index da87be29c7..f6b352f2d6 100644 --- a/arch/sandbox/os/common.c +++ b/arch/sandbox/os/common.c @@ -220,7 +220,7 @@ ssize_t linux_write(int fd, const void *buf, size_t count) return write(fd, buf, count); } -off_t linux_lseek(int fd, off_t offset) +loff_t linux_lseek(int fd, loff_t offset) { return lseek(fd, offset, SEEK_SET); } @@ -276,7 +276,7 @@ extern char * strsep_unescaped(char **s, const char *ct); static int add_image(const char *_str, char *devname_template, int *devname_number) { - struct hf_info *hf = malloc(sizeof(struct hf_info)); + struct hf_info *hf = calloc(1, sizeof(struct hf_info)); char *str, *filename, *devname; char tmp[16]; char *opt; diff --git a/commands/Kconfig b/commands/Kconfig index 03ddfc8870..1667e50cc6 100644 --- a/commands/Kconfig +++ b/commands/Kconfig @@ -746,7 +746,7 @@ config CMD_SAVEENV config CMD_SETENV tristate default y - depends on !CONFIG_SHELL_NONE + depends on !SHELL_NONE prompt "setenv" help Set environment variable diff --git a/commands/dhrystone.c b/commands/dhrystone.c index 154910e5d0..17efa9c099 100644 --- a/commands/dhrystone.c +++ b/commands/dhrystone.c @@ -15,7 +15,7 @@ #include <command.h> #include <errno.h> #include <clock.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <malloc.h> #include <stdio.h> /* for strcpy, strcmp */ diff --git a/commands/readline.c b/commands/readline.c index ef54b5e92f..403ac8563a 100644 --- a/commands/readline.c +++ b/commands/readline.c @@ -4,6 +4,7 @@ #include <common.h> #include <command.h> #include <malloc.h> +#include <slice.h> #include <xfuncs.h> #include <environment.h> @@ -14,15 +15,20 @@ static int do_readline(int argc, char *argv[]) if (argc < 3) return COMMAND_ERROR_USAGE; + command_slice_release(); + if (readline(argv[1], buf, CONFIG_CBSIZE) < 0) { + command_slice_acquire(); free(buf); - return 1; + return COMMAND_ERROR; } + command_slice_acquire(); + setenv(argv[2], buf); free(buf); - return 0; + return COMMAND_SUCCESS; } BAREBOX_CMD_HELP_START(readline) diff --git a/commands/time.c b/commands/time.c index 29000d96d8..25ba2da15e 100644 --- a/commands/time.c +++ b/commands/time.c @@ -1,7 +1,7 @@ #include <common.h> #include <command.h> #include <clock.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <malloc.h> static int do_time(int argc, char *argv[]) diff --git a/common/Kconfig b/common/Kconfig index d1baee60e6..edadcc9f49 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -874,6 +874,13 @@ config DEFAULT_ENVIRONMENT_GENERIC_NEW select NET_CMD_IFUP if NET select CMD_IP_ROUTE_GET if NET select CMD_HOST if NET + help + With this option barebox will use the files found under + defaultenv/defaultenv-2-base/ in the source tree as a template for + the defaultenv. The directories specified in DEFAULT_ENVIRONMENT_PATH + will be added to the default environment. If a file is present in + both locations, the file from DEFAULT_ENVIRONMENT_PATH will overwrite + that from the template. config DEFAULT_ENVIRONMENT_GENERIC bool "Generic environment template (old version)" @@ -887,9 +894,12 @@ config DEFAULT_ENVIRONMENT_GENERIC select CMD_CRC_CMP select CMD_GLOBAL help - With this option barebox will use the generic default - environment found under defaultenv/ in the src tree. - The Directory given with DEFAULT_ENVIRONMENT_PATH + Note: this option is not recommended for new boards; use + DEFAULT_ENVIRONMENT_GENERIC_NEW instead. + + With this option barebox will use the old generic default environment + found under defaultenv/defaultenv-1/ in the source tree. + The directory given with DEFAULT_ENVIRONMENT_PATH will be added to the default environment. This should at least contain a /env/config file. This will be able to overwrite the files from defaultenv. @@ -899,12 +909,18 @@ config DEFAULT_ENVIRONMENT_GENERIC_NEW_MENU depends on DEFAULT_ENVIRONMENT_GENERIC_NEW depends on CMD_MENUTREE default y + help + Extend the defaultenv template with a menu that is displayed at boot. + The menu files are taken from defaultenv/defaultenv-2-menu/. config DEFAULT_ENVIRONMENT_GENERIC_NEW_DFU bool depends on DEFAULT_ENVIRONMENT_GENERIC_NEW depends on USB_GADGET_DFU default y + help + Extend the defaultenv template with the 'dfu' boot entry, which + allows uploading the kernel and oftree over USB via the dfu protocol. config DEFAULT_ENVIRONMENT_GENERIC_NEW_REBOOT_MODE bool "Generic reboot-mode handlers in the environment" @@ -916,9 +932,9 @@ config DEFAULT_ENVIRONMENT_PATH depends on DEFAULT_ENVIRONMENT prompt "Default environment path" help - Space separated list of paths the default environment will be taken from. - Relative paths will be relative to the barebox Toplevel dir, but absolute - paths are fine as well. + Space separated list of paths from which the default environment will + be taken. Relative paths will be relative to the barebox top-level + directory, but absolute paths are fine as well. config BAREBOXENV_TARGET bool diff --git a/common/block.c b/common/block.c index 6371010a90..1d386edcfd 100644 --- a/common/block.c +++ b/common/block.c @@ -18,7 +18,7 @@ LIST_HEAD(block_device_list); /* a chunk of contiguous data */ struct chunk { void *data; /* data buffer */ - int block_start; /* first block in this chunk */ + sector_t block_start; /* first block in this chunk */ int dirty; /* need to write back to device */ int num; /* number of chunk, debugging only */ struct list_head list; @@ -28,7 +28,7 @@ struct chunk { static int writebuffer_io_len(struct block_device *blk, struct chunk *chunk) { - return min(blk->rdbufsize, blk->num_blocks - chunk->block_start); + return min_t(blkcnt_t, blk->rdbufsize, blk->num_blocks - chunk->block_start); } /* @@ -64,14 +64,14 @@ static int writebuffer_flush(struct block_device *blk) * get the chunk containing a given block. Will return NULL if the * block is not cached, the chunk otherwise. */ -static struct chunk *chunk_get_cached(struct block_device *blk, int block) +static struct chunk *chunk_get_cached(struct block_device *blk, sector_t block) { struct chunk *chunk; list_for_each_entry(chunk, &blk->buffered_blocks, list) { if (block >= chunk->block_start && block < chunk->block_start + blk->rdbufsize) { - dev_dbg(blk->dev, "%s: found %d in %d\n", __func__, + dev_dbg(blk->dev, "%s: found %llu in %d\n", __func__, block, chunk->num); /* * move most recently used entry to the head of the list @@ -88,7 +88,7 @@ static struct chunk *chunk_get_cached(struct block_device *blk, int block) * Get the data pointer for a given block. Will return NULL if * the block is not cached, the data pointer otherwise. */ -static void *block_get_cached(struct block_device *blk, int block) +static void *block_get_cached(struct block_device *blk, sector_t block) { struct chunk *chunk; @@ -135,7 +135,7 @@ static struct chunk *get_chunk(struct block_device *blk) * not cached already. By definition block_get_cached() for * the same block will succeed after this call. */ -static int block_cache(struct block_device *blk, int block) +static int block_cache(struct block_device *blk, sector_t block) { struct chunk *chunk; int ret; @@ -146,7 +146,7 @@ static int block_cache(struct block_device *blk, int block) chunk->block_start = block & ~blk->blkmask; - dev_dbg(blk->dev, "%s: %d to %d\n", __func__, chunk->block_start, + dev_dbg(blk->dev, "%s: %llu to %d\n", __func__, chunk->block_start, chunk->num); if (chunk->block_start * BLOCKSIZE(blk) >= blk->discard_start && @@ -172,7 +172,7 @@ static int block_cache(struct block_device *blk, int block) * Get the data for a block, either from the cache or from * the device. */ -static void *block_get(struct block_device *blk, int block) +static void *block_get(struct block_device *blk, sector_t block) { void *outdata; int ret; @@ -200,9 +200,9 @@ static ssize_t block_op_read(struct cdev *cdev, void *buf, size_t count, { struct block_device *blk = cdev->priv; unsigned long mask = BLOCKSIZE(blk) - 1; - unsigned long block = offset >> blk->blockbits; + sector_t block = offset >> blk->blockbits; size_t icount = count; - int blocks; + blkcnt_t blocks; if (offset & mask) { size_t now = BLOCKSIZE(blk) - (offset & mask); @@ -252,7 +252,7 @@ static ssize_t block_op_read(struct cdev *cdev, void *buf, size_t count, * Put data into a block. This only overwrites the data in the * cache and marks the corresponding chunk as dirty. */ -static int block_put(struct block_device *blk, const void *buf, int block) +static int block_put(struct block_device *blk, const void *buf, sector_t block) { struct chunk *chunk; void *data; @@ -277,9 +277,10 @@ static ssize_t block_op_write(struct cdev *cdev, const void *buf, size_t count, { struct block_device *blk = cdev->priv; unsigned long mask = BLOCKSIZE(blk) - 1; - unsigned long block = offset >> blk->blockbits; + sector_t block = offset >> blk->blockbits; size_t icount = count; - int blocks, ret; + blkcnt_t blocks; + int ret; if (offset & mask) { size_t now = BLOCKSIZE(blk) - (offset & mask); @@ -419,24 +420,24 @@ int blockdevice_unregister(struct block_device *blk) return 0; } -int block_read(struct block_device *blk, void *buf, int block, int num_blocks) +int block_read(struct block_device *blk, void *buf, sector_t block, blkcnt_t num_blocks) { int ret; ret = cdev_read(&blk->cdev, buf, num_blocks << blk->blockbits, - (loff_t)block << blk->blockbits, 0); + block << blk->blockbits, 0); return ret < 0 ? ret : 0; } -int block_write(struct block_device *blk, void *buf, int block, int num_blocks) +int block_write(struct block_device *blk, void *buf, sector_t block, blkcnt_t num_blocks) { int ret; ret = cdev_write(&blk->cdev, buf, num_blocks << blk->blockbits, - (loff_t)block << blk->blockbits, 0); + block << blk->blockbits, 0); return ret < 0 ? ret : 0; } diff --git a/common/clock.c b/common/clock.c index 58c2964b13..7eeba88317 100644 --- a/common/clock.c +++ b/common/clock.c @@ -11,7 +11,7 @@ #include <common.h> #include <init.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <clock.h> #include <poller.h> diff --git a/common/console_common.c b/common/console_common.c index 48590c522c..3e07415723 100644 --- a/common/console_common.c +++ b/common/console_common.c @@ -18,7 +18,7 @@ #include <clock.h> #include <malloc.h> #include <linux/pstore.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #ifndef CONFIG_CONSOLE_NONE diff --git a/common/imx-bbu-nand-fcb.c b/common/imx-bbu-nand-fcb.c index f8c4578056..0e008c6bc2 100644 --- a/common/imx-bbu-nand-fcb.c +++ b/common/imx-bbu-nand-fcb.c @@ -25,6 +25,7 @@ #include <crc.h> #include <mach/generic.h> #include <mtd/mtd-peb.h> +#include <soc/imx/imx-nand-bcb.h> #ifdef CONFIG_ARCH_IMX6 #include <mach/imx6.h> @@ -39,74 +40,6 @@ static inline int fcb_is_bch_encoded(void) } #endif -struct dbbt_block { - uint32_t Checksum; - uint32_t FingerPrint; - uint32_t Version; - uint32_t numberBB; /* reserved on i.MX6 */ - uint32_t DBBTNumOfPages; -}; - -struct fcb_block { - uint32_t Checksum; /* First fingerprint in first byte */ - uint32_t FingerPrint; /* 2nd fingerprint at byte 4 */ - uint32_t Version; /* 3rd fingerprint at byte 8 */ - uint8_t DataSetup; - uint8_t DataHold; - uint8_t AddressSetup; - uint8_t DSAMPLE_TIME; - /* These are for application use only and not for ROM. */ - uint8_t NandTimingState; - uint8_t REA; - uint8_t RLOH; - uint8_t RHOH; - uint32_t PageDataSize; /* 2048 for 2K pages, 4096 for 4K pages */ - uint32_t TotalPageSize; /* 2112 for 2K pages, 4314 for 4K pages */ - uint32_t SectorsPerBlock; /* Number of 2K sections per block */ - uint32_t NumberOfNANDs; /* Total Number of NANDs - not used by ROM */ - uint32_t TotalInternalDie; /* Number of separate chips in this NAND */ - uint32_t CellType; /* MLC or SLC */ - uint32_t EccBlockNEccType; /* Type of ECC, can be one of BCH-0-20 */ - uint32_t EccBlock0Size; /* Number of bytes for Block0 - BCH */ - uint32_t EccBlockNSize; /* Block size in bytes for all blocks other than Block0 - BCH */ - uint32_t EccBlock0EccType; /* Ecc level for Block 0 - BCH */ - uint32_t MetadataBytes; /* Metadata size - BCH */ - uint32_t NumEccBlocksPerPage; /* Number of blocks per page for ROM use - BCH */ - uint32_t EccBlockNEccLevelSDK; /* Type of ECC, can be one of BCH-0-20 */ - uint32_t EccBlock0SizeSDK; /* Number of bytes for Block0 - BCH */ - uint32_t EccBlockNSizeSDK; /* Block size in bytes for all blocks other than Block0 - BCH */ - uint32_t EccBlock0EccLevelSDK; /* Ecc level for Block 0 - BCH */ - uint32_t NumEccBlocksPerPageSDK;/* Number of blocks per page for SDK use - BCH */ - uint32_t MetadataBytesSDK; /* Metadata size - BCH */ - uint32_t EraseThreshold; /* To set into BCH_MODE register */ - uint32_t BootPatch; /* 0 for normal boot and 1 to load patch starting next to FCB */ - uint32_t PatchSectors; /* Size of patch in sectors */ - uint32_t Firmware1_startingPage;/* Firmware image starts on this sector */ - uint32_t Firmware2_startingPage;/* Secondary FW Image starting Sector */ - uint32_t PagesInFirmware1; /* Number of sectors in firmware image */ - uint32_t PagesInFirmware2; /* Number of sector in secondary FW image */ - uint32_t DBBTSearchAreaStartAddress; /* Page address where dbbt search area begins */ - uint32_t BadBlockMarkerByte; /* Byte in page data that have manufacturer marked bad block marker, */ - /* this will be swapped with metadata[0] to complete page data. */ - uint32_t BadBlockMarkerStartBit;/* For BCH ECC sizes other than 8 and 16 the bad block marker does not */ - /* start at 0th bit of BadBlockMarkerByte. This field is used to get to */ - /* the start bit of bad block marker byte with in BadBlockMarkerByte */ - uint32_t BBMarkerPhysicalOffset;/* FCB value that gives byte offset for bad block marker on physical NAND page */ - uint32_t BCHType; - - uint32_t TMTiming2_ReadLatency; - uint32_t TMTiming2_PreambleDelay; - uint32_t TMTiming2_CEDelay; - uint32_t TMTiming2_PostambleDelay; - uint32_t TMTiming2_CmdAddPause; - uint32_t TMTiming2_DataPause; - uint32_t TMSpeed; - uint32_t TMTiming1_BusyTimeout; - - uint32_t DISBBM; /* the flag to enable (1)/disable(0) bi swap */ - uint32_t BBMarkerPhysicalOffsetInSpareData; /* The swap position of main area in spare area */ -}; - struct imx_nand_fcb_bbu_handler { struct bbu_handler handler; diff --git a/common/partitions.c b/common/partitions.c index 01697f87d0..1f0c544c60 100644 --- a/common/partitions.c +++ b/common/partitions.c @@ -124,7 +124,7 @@ int parse_partition_table(struct block_device *blk) rc = block_read(blk, buf, 0, 2); if (rc != 0) { - dev_err(blk->dev, "Cannot read MBR/partition table\n"); + dev_err(blk->dev, "Cannot read MBR/partition table: %pe\n", ERR_PTR(rc)); goto on_error; } diff --git a/common/startup.c b/common/startup.c index 1ac36d950c..080feebf05 100644 --- a/common/startup.c +++ b/common/startup.c @@ -36,6 +36,7 @@ #include <environment.h> #include <linux/ctype.h> #include <watchdog.h> +#include <glob.h> extern initcall_t __barebox_initcalls_start[], __barebox_early_initcalls_end[], __barebox_initcalls_end[]; @@ -298,13 +299,12 @@ postcore_initcall(register_autoboot_vars); static int run_init(void) { - DIR *dir; - struct dirent *d; - const char *initdir = "/env/init"; const char *bmode; bool env_bin_init_exists; enum autoboot_state autoboot; struct stat s; + glob_t g; + int i, ret; setenv("PATH", "/env/bin"); export("PATH"); @@ -326,23 +326,28 @@ static int run_init(void) } /* Run scripts in /env/init/ */ - dir = opendir(initdir); - if (dir) { - char *scr; + ret = glob("/env/init/*", 0, NULL, &g); + if (!ret) { + for (i = 0; i < g.gl_pathc; i++) { + const char *path = g.gl_pathv[i]; + char *scr; + + ret = stat(path, &s); + if (ret) + continue; - while ((d = readdir(dir))) { - if (*d->d_name == '.') + if (!S_ISREG(s.st_mode)) continue; - pr_debug("Executing '%s/%s'...\n", initdir, d->d_name); - scr = basprintf("source %s/%s", initdir, d->d_name); + pr_debug("Executing '%s'...\n", path); + scr = basprintf("source %s", path); run_command(scr); free(scr); } - - closedir(dir); } + globfree(&g); + /* source matching script in /env/bmode/ */ bmode = reboot_mode_get(); if (bmode) { diff --git a/drivers/aiodev/Kconfig b/drivers/aiodev/Kconfig index 5fb445c096..88d013aad0 100644 --- a/drivers/aiodev/Kconfig +++ b/drivers/aiodev/Kconfig @@ -43,4 +43,11 @@ config AM335X_ADC rather than continuous sampling with DMA, etc. ADC channels should be configured via device tree, using the kernel bindings. +config STM32_ADC + tristate "STM32 ADC driver" + depends on ARCH_STM32MP || COMPILE_TEST + help + Support for ADC on STM32. Supports simple one-shot readings + rather than continuous sampling with DMA, etc. ADC channels should be + configured via device tree, using the kernel bindings. endif diff --git a/drivers/aiodev/Makefile b/drivers/aiodev/Makefile index 5f48b2022a..52652f67b7 100644 --- a/drivers/aiodev/Makefile +++ b/drivers/aiodev/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_LM75) += lm75.o obj-$(CONFIG_MC13XXX_ADC) += mc13xxx_adc.o obj-$(CONFIG_QORIQ_THERMAL) += qoriq_thermal.o obj-$(CONFIG_AM335X_ADC) += am335x_adc.o +obj-$(CONFIG_STM32_ADC) += stm32-adc.o stm32-adc-core.o diff --git a/drivers/aiodev/stm32-adc-core.c b/drivers/aiodev/stm32-adc-core.c new file mode 100644 index 0000000000..410e2a894e --- /dev/null +++ b/drivers/aiodev/stm32-adc-core.c @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + * Author: Fabrice Gasnier <fabrice.gasnier@st.com> + * + * Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc-core.c. + */ + +#include <common.h> +#include <linux/clk.h> +#include <regulator.h> +#include <linux/bitops.h> +#include "stm32-adc-core.h" + +/* STM32H7 - common registers for all ADC instances */ +#define STM32H7_ADC_CCR (STM32_ADCX_COMN_OFFSET + 0x08) + +/* STM32H7_ADC_CCR - bit fields */ +#define STM32H7_PRESC_SHIFT 18 +#define STM32H7_PRESC_MASK GENMASK(21, 18) +#define STM32H7_CKMODE_SHIFT 16 +#define STM32H7_CKMODE_MASK GENMASK(17, 16) + +/* STM32 H7 maximum analog clock rate (from datasheet) */ +#define STM32H7_ADC_MAX_CLK_RATE 36000000 + +/** + * struct stm32h7_adc_ck_spec - specification for stm32h7 adc clock + * @ckmode: ADC clock mode, Async or sync with prescaler. + * @presc: prescaler bitfield for async clock mode + * @div: prescaler division ratio + */ +struct stm32h7_adc_ck_spec { + u32 ckmode; + u32 presc; + int div; +}; + +static const struct stm32h7_adc_ck_spec stm32h7_adc_ckmodes_spec[] = { + /* 00: CK_ADC[1..3]: Asynchronous clock modes */ + { 0, 0, 1 }, + { 0, 1, 2 }, + { 0, 2, 4 }, + { 0, 3, 6 }, + { 0, 4, 8 }, + { 0, 5, 10 }, + { 0, 6, 12 }, + { 0, 7, 16 }, + { 0, 8, 32 }, + { 0, 9, 64 }, + { 0, 10, 128 }, + { 0, 11, 256 }, + /* HCLK used: Synchronous clock modes (1, 2 or 4 prescaler) */ + { 1, 0, 1 }, + { 2, 0, 2 }, + { 3, 0, 4 }, +}; + +static int stm32h7_adc_clk_sel(struct device_d *dev, + struct stm32_adc_common *common) +{ + u32 ckmode, presc; + unsigned long rate; + unsigned int i; + int div; + + /* stm32h7 bus clock is common for all ADC instances (mandatory) */ + if (!common->bclk) { + dev_err(dev, "No bclk clock found\n"); + return -ENOENT; + } + + /* + * stm32h7 can use either 'bus' or 'adc' clock for analog circuitry. + * So, choice is to have bus clock mandatory and adc clock optional. + * If optional 'adc' clock has been found, then try to use it first. + */ + if (common->aclk) { + /* + * Asynchronous clock modes (e.g. ckmode == 0) + * From spec: PLL output musn't exceed max rate + */ + rate = clk_get_rate(common->aclk); + if (!rate) { + dev_err(dev, "Invalid aclk rate: 0\n"); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(stm32h7_adc_ckmodes_spec); i++) { + ckmode = stm32h7_adc_ckmodes_spec[i].ckmode; + presc = stm32h7_adc_ckmodes_spec[i].presc; + div = stm32h7_adc_ckmodes_spec[i].div; + + if (ckmode) + continue; + + if ((rate / div) <= STM32H7_ADC_MAX_CLK_RATE) + goto out; + } + } + + /* Synchronous clock modes (e.g. ckmode is 1, 2 or 3) */ + rate = clk_get_rate(common->bclk); + if (!rate) { + dev_err(dev, "Invalid bus clock rate: 0\n"); + return -EINVAL; + } + + for (i = 0; i < ARRAY_SIZE(stm32h7_adc_ckmodes_spec); i++) { + ckmode = stm32h7_adc_ckmodes_spec[i].ckmode; + presc = stm32h7_adc_ckmodes_spec[i].presc; + div = stm32h7_adc_ckmodes_spec[i].div; + + if (!ckmode) + continue; + + if ((rate / div) <= STM32H7_ADC_MAX_CLK_RATE) + goto out; + } + + dev_err(dev, "clk selection failed\n"); + return -EINVAL; + +out: + /* rate used later by each ADC instance to control BOOST mode */ + common->rate = rate / div; + + /* Set common clock mode and prescaler */ + clrsetbits_le32(common->base + STM32H7_ADC_CCR, + STM32H7_CKMODE_MASK | STM32H7_PRESC_MASK, + ckmode << STM32H7_CKMODE_SHIFT | + presc << STM32H7_PRESC_SHIFT); + + dev_dbg(dev, "Using %s clock/%d source at %ld kHz\n", + ckmode ? "bus" : "adc", div, common->rate / 1000); + + return 0; +} + +static int stm32_adc_core_probe(struct device_d *dev) +{ + struct stm32_adc_common *common; + int ret; + + common = xzalloc(sizeof(*common)); + + common->vref = regulator_get(dev, "vref"); + if (IS_ERR(common->vref)) { + dev_err(dev, "can't get vref-supply: %pe\n", common->vref); + return PTR_ERR(common->vref); + } + + ret = regulator_get_voltage(common->vref); + if (ret < 0) { + dev_err(dev, "can't get vref-supply value: %d\n", ret); + return ret; + } + common->vref_uv = ret; + + common->aclk = clk_get(dev, "adc"); + if (!IS_ERR(common->aclk)) { + ret = clk_enable(common->aclk); + if (ret) { + dev_err(dev, "Can't enable aclk: %d\n", ret); + return ret; + } + } + + common->bclk = clk_get(dev, "bus"); + if (!IS_ERR(common->bclk)) { + ret = clk_enable(common->bclk); + if (ret) { + dev_err(dev, "Can't enable bclk: %d\n", ret); + goto err_aclk_disable; + } + } + + common->base = dev_request_mem_region(dev, 0); + if (IS_ERR(common->base)) { + dev_err(dev, "can't get address\n"); + return -ENOENT; + } + + ret = stm32h7_adc_clk_sel(dev, common); + if (ret) + goto err_bclk_disable; + + dev->priv = common; + return of_platform_populate(dev->device_node, NULL, dev); + +err_bclk_disable: + clk_disable(common->bclk); + +err_aclk_disable: + clk_disable(common->aclk); + + return ret; +} + +static const struct of_device_id stm32_adc_core_ids[] = { + { .compatible = "st,stm32h7-adc-core" }, + { .compatible = "st,stm32mp1-adc-core" }, + {} +}; + +static struct driver_d stm32_adc_core_driver = { + .name = "stm32-adc-core", + .probe = stm32_adc_core_probe, + .of_compatible = DRV_OF_COMPAT(stm32_adc_core_ids), +}; +device_platform_driver(stm32_adc_core_driver); diff --git a/drivers/aiodev/stm32-adc-core.h b/drivers/aiodev/stm32-adc-core.h new file mode 100644 index 0000000000..de6c0b9495 --- /dev/null +++ b/drivers/aiodev/stm32-adc-core.h @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + * Author: Fabrice Gasnier <fabrice.gasnier@st.com>. + * + * Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc-core.h. + */ + +#ifndef __STM32_ADC_H +#define __STM32_ADC_H + +/* + * STM32 - ADC global register map + * ________________________________________________________ + * | Offset | Register | + * -------------------------------------------------------- + * | 0x000 | Master ADC1 | + * -------------------------------------------------------- + * | 0x100 | Slave ADC2 | + * -------------------------------------------------------- + * | 0x200 | Slave ADC3 | + * -------------------------------------------------------- + * | 0x300 | Master & Slave common regs | + * -------------------------------------------------------- + */ +#define STM32_ADC_MAX_ADCS 3 +#define STM32_ADCX_COMN_OFFSET 0x300 + +#include <linux/types.h> + +struct regulator; +struct clk; + +/** + * struct stm32_adc_common - stm32 ADC driver common data (for all instances) + * @base: control registers base cpu addr + * @rate: clock rate used for analog circuitry + * @aclk: clock for the analog circuitry + * @bclk: bus clock common for all ADCs + * @vref: regulator reference + * @vref_uv: reference supply voltage (uV) + */ +struct stm32_adc_common { + void __iomem *base; + unsigned long rate; + struct clk *aclk; + struct clk *bclk; + struct regulator *vref; + int vref_uv; +}; + +#endif diff --git a/drivers/aiodev/stm32-adc.c b/drivers/aiodev/stm32-adc.c new file mode 100644 index 0000000000..c99b995eaf --- /dev/null +++ b/drivers/aiodev/stm32-adc.c @@ -0,0 +1,374 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + * Author: Fabrice Gasnier <fabrice.gasnier@st.com> + * + * Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc.c. + */ + +#include <common.h> +#include <linux/bitops.h> +#include <linux/iopoll.h> +#include <aiodev.h> +#include <regulator.h> +#include <linux/math64.h> +#include "stm32-adc-core.h" + +/* STM32H7 - Registers for each ADC instance */ +#define STM32H7_ADC_ISR 0x00 +#define STM32H7_ADC_CR 0x08 +#define STM32H7_ADC_CFGR 0x0C +#define STM32H7_ADC_SMPR1 0x14 +#define STM32H7_ADC_SMPR2 0x18 +#define STM32H7_ADC_PCSEL 0x1C +#define STM32H7_ADC_SQR1 0x30 +#define STM32H7_ADC_DR 0x40 +#define STM32H7_ADC_DIFSEL 0xC0 + +/* STM32H7_ADC_ISR - bit fields */ +#define STM32MP1_VREGREADY BIT(12) +#define STM32H7_EOC BIT(2) +#define STM32H7_ADRDY BIT(0) + +/* STM32H7_ADC_CR - bit fields */ +#define STM32H7_DEEPPWD BIT(29) +#define STM32H7_ADVREGEN BIT(28) +#define STM32H7_BOOST BIT(8) +#define STM32H7_ADSTART BIT(2) +#define STM32H7_ADDIS BIT(1) +#define STM32H7_ADEN BIT(0) + +/* STM32H7_ADC_CFGR bit fields */ +#define STM32H7_EXTEN GENMASK(11, 10) +#define STM32H7_DMNGT GENMASK(1, 0) + +/* STM32H7_ADC_SQR1 - bit fields */ +#define STM32H7_SQ1_SHIFT 6 + +/* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */ +#define STM32H7_BOOST_CLKRATE 20000000UL + +#define STM32_ADC_CH_MAX 20 /* max number of channels */ +#define STM32_ADC_MAX_SMP 7 /* SMPx range is [0..7] */ +#define STM32_ADC_TIMEOUT_US 100000 + +struct stm32_adc_regs { + int reg; + int mask; + int shift; +}; + +struct stm32_adc_cfg { + unsigned int max_channels; + unsigned int num_bits; + bool has_vregready; + const struct stm32_adc_regs *smp_bits; + const unsigned int *smp_cycles; +}; + +struct stm32_adc { + struct stm32_adc_common *common; + void __iomem *regs; + const struct stm32_adc_cfg *cfg; + u32 channel_mask; + u32 data_mask; + struct aiodevice aiodev; + void __iomem *base; + struct aiochannel *channels; + u32 *channel_map; + u32 smpr_val[2]; +}; + +static void stm32_adc_stop(struct stm32_adc *adc) +{ + setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADDIS); + clrbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_BOOST); + /* Setting DEEPPWD disables ADC vreg and clears ADVREGEN */ + setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_DEEPPWD); + + regulator_disable(adc->common->vref); +} + +static int stm32_adc_start_channel(struct stm32_adc *adc, int channel) +{ + struct device_d *dev = adc->aiodev.hwdev; + struct stm32_adc_common *common = adc->common; + int ret; + u32 val; + + ret = regulator_enable(common->vref); + if (ret) + return ret; + + /* Exit deep power down, then enable ADC voltage regulator */ + clrbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_DEEPPWD); + setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADVREGEN); + if (common->rate > STM32H7_BOOST_CLKRATE) + setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_BOOST); + + /* Wait for startup time */ + if (!adc->cfg->has_vregready) { + udelay(20); + } else { + ret = readl_poll_timeout(adc->regs + STM32H7_ADC_ISR, val, + val & STM32MP1_VREGREADY, + STM32_ADC_TIMEOUT_US); + if (ret < 0) { + stm32_adc_stop(adc); + dev_err(dev, "Failed to enable vreg: %d\n", ret); + return ret; + } + } + + /* Only use single ended channels */ + writel(0, adc->regs + STM32H7_ADC_DIFSEL); + + /* Enable ADC, Poll for ADRDY to be set (after adc startup time) */ + setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADEN); + ret = readl_poll_timeout(adc->regs + STM32H7_ADC_ISR, val, + val & STM32H7_ADRDY, STM32_ADC_TIMEOUT_US); + if (ret < 0) { + stm32_adc_stop(adc); + dev_err(dev, "Failed to enable ADC: %d\n", ret); + return ret; + } + + /* Preselect channels */ + writel(adc->channel_mask, adc->regs + STM32H7_ADC_PCSEL); + + /* Apply sampling time settings */ + writel(adc->smpr_val[0], adc->regs + STM32H7_ADC_SMPR1); + writel(adc->smpr_val[1], adc->regs + STM32H7_ADC_SMPR2); + + /* Program regular sequence: chan in SQ1 & len = 0 for one channel */ + writel(channel << STM32H7_SQ1_SHIFT, adc->regs + STM32H7_ADC_SQR1); + + /* Trigger detection disabled (conversion can be launched in SW) */ + clrbits_le32(adc->regs + STM32H7_ADC_CFGR, STM32H7_EXTEN | + STM32H7_DMNGT); + + return 0; +} + +static int stm32_adc_channel_data(struct stm32_adc *adc, int channel, + int *data) +{ + struct device_d *dev = &adc->aiodev.dev; + int ret; + u32 val; + + setbits_le32(adc->regs + STM32H7_ADC_CR, STM32H7_ADSTART); + ret = readl_poll_timeout(adc->regs + STM32H7_ADC_ISR, val, + val & STM32H7_EOC, STM32_ADC_TIMEOUT_US); + if (ret < 0) { + dev_err(dev, "conversion timed out: %d\n", ret); + return ret; + } + + *data = readl(adc->regs + STM32H7_ADC_DR); + + return 0; +} + +static int stm32_adc_channel_single_shot(struct aiochannel *chan, int *data) +{ + struct stm32_adc *adc = container_of(chan->aiodev, struct stm32_adc, aiodev); + int ret, index; + s64 raw64; + + index = adc->channel_map[chan->index]; + + ret = stm32_adc_start_channel(adc, index); + if (ret) + return ret; + + ret = stm32_adc_channel_data(adc, index, data); + if (ret) + return ret; + + raw64 = *data; + raw64 *= adc->common->vref_uv; + *data = div_s64(raw64, adc->data_mask); + + return 0; +} + +static void stm32_adc_smpr_init(struct stm32_adc *adc, int channel, u32 smp_ns) +{ + const struct stm32_adc_regs *smpr = &adc->cfg->smp_bits[channel]; + u32 period_ns, shift = smpr->shift, mask = smpr->mask; + unsigned int smp, r = smpr->reg; + + /* Determine sampling time (ADC clock cycles) */ + period_ns = NSEC_PER_SEC / adc->common->rate; + for (smp = 0; smp <= STM32_ADC_MAX_SMP; smp++) + if ((period_ns * adc->cfg->smp_cycles[smp]) >= smp_ns) + break; + if (smp > STM32_ADC_MAX_SMP) + smp = STM32_ADC_MAX_SMP; + + /* pre-build sampling time registers (e.g. smpr1, smpr2) */ + adc->smpr_val[r] = (adc->smpr_val[r] & ~mask) | (smp << shift); +} + +static int stm32_adc_chan_of_init(struct device_d *dev, struct stm32_adc *adc) +{ + unsigned int i; + int num_channels = 0, num_times = 0; + u32 smp = 0xffffffff; /* Set sampling time to max value by default */ + int ret; + + /* Retrieve single ended channels listed in device tree */ + of_get_property(dev->device_node, "st,adc-channels", &num_channels); + num_channels /= sizeof(__be32); + + if (num_channels > adc->cfg->max_channels) { + dev_err(dev, "too many st,adc-channels: %d\n", num_channels); + return -EINVAL; + } + + /* Optional sample time is provided either for each, or all channels */ + of_get_property(dev->device_node, "st,min-sample-time-nsecs", &num_times); + num_times /= sizeof(__be32); + if (num_times > 1 && num_times != num_channels) { + dev_err(dev, "Invalid st,min-sample-time-nsecs\n"); + return -EINVAL; + } + + adc->channels = calloc(sizeof(*adc->channels), num_channels); + if (!adc->channels) + return -ENOMEM; + + adc->aiodev.channels = calloc(sizeof(*adc->aiodev.channels), num_channels); + if (!adc->aiodev.channels) + return -ENOMEM; + + adc->channel_map = calloc(sizeof(u32), num_channels); + + adc->aiodev.num_channels = num_channels; + adc->aiodev.hwdev = dev; + adc->aiodev.read = stm32_adc_channel_single_shot; + + for (i = 0; i < num_channels; i++) { + u32 chan; + + ret = of_property_read_u32_index(dev->device_node, "st,adc-channels", i, &chan); + if (ret) + return ret; + + if (chan >= adc->cfg->max_channels) { + dev_err(dev, "bad channel %u\n", chan); + return -EINVAL; + } + + adc->channel_mask |= 1 << chan; + + adc->aiodev.channels[i] = &adc->channels[i]; + adc->channels[i].unit = "uV"; + adc->channel_map[i] = chan; + + /* + * Using of_property_read_u32_index(), smp value will only be + * modified if valid u32 value can be decoded. This allows to + * get either no value, 1 shared value for all indexes, or one + * value per channel. + */ + of_property_read_u32_index(dev->device_node, "st,min-sample-time-nsecs", + i, &smp); + /* Prepare sampling time settings */ + stm32_adc_smpr_init(adc, chan, smp); + } + + adc->data_mask = (1 << adc->cfg->num_bits) - 1; + + ret = aiodevice_register(&adc->aiodev); + if (ret < 0) + dev_err(dev, "Failed to register aiodev\n"); + + return ret; +} + +static int stm32_adc_probe(struct device_d *dev) +{ + struct stm32_adc_common *common = dev->parent->priv; + struct stm32_adc *adc; + u32 offset; + int ret; + + ret = of_property_read_u32(dev->device_node, "reg", &offset); + if (ret) { + dev_err(dev, "Can't read reg property\n"); + return ret; + } + + adc = xzalloc(sizeof(*adc)); + + adc->regs = common->base + offset; + adc->cfg = device_get_match_data(dev); + adc->common = common; + + return stm32_adc_chan_of_init(dev, adc); +} + +/* + * stm32h7_smp_bits - describe sampling time register index & bit fields + * Sorted so it can be indexed by channel number. + */ +static const struct stm32_adc_regs stm32h7_smp_bits[] = { + /* STM32H7_ADC_SMPR1, smpr[] index, mask, shift for SMP0 to SMP9 */ + { 0, GENMASK(2, 0), 0 }, + { 0, GENMASK(5, 3), 3 }, + { 0, GENMASK(8, 6), 6 }, + { 0, GENMASK(11, 9), 9 }, + { 0, GENMASK(14, 12), 12 }, + { 0, GENMASK(17, 15), 15 }, + { 0, GENMASK(20, 18), 18 }, + { 0, GENMASK(23, 21), 21 }, + { 0, GENMASK(26, 24), 24 }, + { 0, GENMASK(29, 27), 27 }, + /* STM32H7_ADC_SMPR2, smpr[] index, mask, shift for SMP10 to SMP19 */ + { 1, GENMASK(2, 0), 0 }, + { 1, GENMASK(5, 3), 3 }, + { 1, GENMASK(8, 6), 6 }, + { 1, GENMASK(11, 9), 9 }, + { 1, GENMASK(14, 12), 12 }, + { 1, GENMASK(17, 15), 15 }, + { 1, GENMASK(20, 18), 18 }, + { 1, GENMASK(23, 21), 21 }, + { 1, GENMASK(26, 24), 24 }, + { 1, GENMASK(29, 27), 27 }, +}; + +/* STM32H7 programmable sampling time (ADC clock cycles, rounded down) */ +static const unsigned int stm32h7_adc_smp_cycles[STM32_ADC_MAX_SMP + 1] = { + 1, 2, 8, 16, 32, 64, 387, 810, +}; + +static const struct stm32_adc_cfg stm32h7_adc_cfg = { + .num_bits = 16, + .max_channels = STM32_ADC_CH_MAX, + .smp_bits = stm32h7_smp_bits, + .smp_cycles = stm32h7_adc_smp_cycles, +}; + + +static const struct stm32_adc_cfg stm32mp1_adc_cfg = { + .num_bits = 16, + .max_channels = STM32_ADC_CH_MAX, + .smp_bits = stm32h7_smp_bits, + .smp_cycles = stm32h7_adc_smp_cycles, + .has_vregready = true, +}; + +static const struct of_device_id stm32_adc_match[] = { + { .compatible = "st,stm32h7-adc", .data = &stm32h7_adc_cfg }, + { .compatible = "st,stm32mp1-adc", .data = &stm32mp1_adc_cfg }, + {} +}; + +static struct driver_d stm32_adc_driver = { + .name = "stm32-adc", + .probe = stm32_adc_probe, + .of_compatible = DRV_OF_COMPAT(stm32_adc_match), +}; +device_platform_driver(stm32_adc_driver); diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 049a36bb44..6d251f248a 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -215,7 +215,7 @@ static int ahci_read_id(struct ata_port *ata, void *buf) } static int ahci_rw(struct ata_port *ata, void *rbuf, const void *wbuf, - unsigned int block, int num_blocks) + sector_t block, blkcnt_t num_blocks) { struct ahci_port *ahci = container_of(ata, struct ahci_port, ata); u8 fis[20]; @@ -237,7 +237,7 @@ static int ahci_rw(struct ata_port *ata, void *rbuf, const void *wbuf, while (num_blocks) { int now; - now = min(MAX_SATA_BLOCKS_READ_WRITE, num_blocks); + now = min_t(blkcnt_t, MAX_SATA_BLOCKS_READ_WRITE, num_blocks); fis[4] = (block >> 0) & 0xff; fis[5] = (block >> 8) & 0xff; @@ -270,14 +270,14 @@ static int ahci_rw(struct ata_port *ata, void *rbuf, const void *wbuf, return 0; } -static int ahci_read(struct ata_port *ata, void *buf, unsigned int block, - int num_blocks) +static int ahci_read(struct ata_port *ata, void *buf, sector_t block, + blkcnt_t num_blocks) { return ahci_rw(ata, buf, NULL, block, num_blocks); } -static int ahci_write(struct ata_port *ata, const void *buf, unsigned int block, - int num_blocks) +static int ahci_write(struct ata_port *ata, const void *buf, sector_t block, + blkcnt_t num_blocks) { return ahci_rw(ata, NULL, buf, block, num_blocks); } diff --git a/drivers/ata/disk_ata_drive.c b/drivers/ata/disk_ata_drive.c index 11f7151e51..3d9503fe7e 100644 --- a/drivers/ata/disk_ata_drive.c +++ b/drivers/ata/disk_ata_drive.c @@ -26,7 +26,7 @@ #include <disks.h> #include <dma.h> -static uint64_t ata_id_n_sectors(uint16_t *id) +static blkcnt_t ata_id_n_sectors(uint16_t *id) { if (ata_id_has_lba(id)) { if (ata_id_has_lba48(id)) @@ -75,7 +75,7 @@ static void __maybe_unused ata_dump_id(uint16_t *id) unsigned char serial[ATA_ID_SERNO_LEN + 1]; unsigned char firmware[ATA_ID_FW_REV_LEN + 1]; unsigned char product[ATA_ID_PROD_LEN + 1]; - uint64_t n_sectors; + sector_t n_sectors; /* Serial number */ ata_id_c_string(id, serial, ATA_ID_SERNO, sizeof(serial)); @@ -165,8 +165,8 @@ static void ata_fix_endianess(uint16_t *buf, unsigned wds) * @note Due to 'block' is of type 'int' only small disks can be handled! * @todo Optimize the read loop */ -static int ata_read(struct block_device *blk, void *buffer, int block, - int num_blocks) +static int ata_read(struct block_device *blk, void *buffer, sector_t block, + blkcnt_t num_blocks) { struct ata_port *port = container_of(blk, struct ata_port, blk); @@ -187,7 +187,7 @@ static int ata_read(struct block_device *blk, void *buffer, int block, * @todo Optimize the write loop */ static int __maybe_unused ata_write(struct block_device *blk, - const void *buffer, int block, int num_blocks) + const void *buffer, sector_t block, blkcnt_t num_blocks) { struct ata_port *port = container_of(blk, struct ata_port, blk); diff --git a/drivers/ata/disk_bios_drive.c b/drivers/ata/disk_bios_drive.c index 363af3c6dd..8f522eeba6 100644 --- a/drivers/ata/disk_bios_drive.c +++ b/drivers/ata/disk_bios_drive.c @@ -115,7 +115,7 @@ static struct DAPS bios_daps __attribute__((aligned(16))); * @param buffer Buffer to read from or write to (in the low memory area) * @return 0 on success, anything else on failure */ -static int biosdisk_bios_call(struct media_access *media, int cmd, uint64_t sector_start, unsigned sector_count, void *buffer) +static int biosdisk_bios_call(struct media_access *media, int cmd, sector_t sector_start, blkcnt_t sector_count, void *buffer) { int rc; @@ -150,12 +150,12 @@ static int biosdisk_bios_call(struct media_access *media, int cmd, uint64_t sect * * @note Due to 'block' is of type 'int' only small disks can be handled! */ -static int biosdisk_read(struct block_device *blk, void *buffer, int block, - int num_blocks) +static int biosdisk_read(struct block_device *blk, void *buffer, sector_t block, + blkcnt_t num_blocks) { int rc; - uint64_t sector_start = block; - unsigned sector_count = num_blocks; + sector_t sector_start = block; + blkcnt_t sector_count = num_blocks; struct media_access *media = to_media_access(blk); while (sector_count >= SECTORS_AT_ONCE) { @@ -191,11 +191,11 @@ static int biosdisk_read(struct block_device *blk, void *buffer, int block, * @note Due to 'block' is of type 'int' only small disks can be handled! */ static int __maybe_unused biosdisk_write(struct block_device *blk, - const void *buffer, int block, int num_blocks) + const void *buffer, sector_t block, blkcnt_t num_blocks) { int rc; - uint64_t sector_start = block; - unsigned sector_count = num_blocks; + sector_t sector_start = block; + blkcnt_t sector_count = num_blocks; struct media_access *media = to_media_access(blk); while (sector_count >= SECTORS_AT_ONCE) { diff --git a/drivers/ata/ide-sff.c b/drivers/ata/ide-sff.c index b7c8847266..a735c8c32c 100644 --- a/drivers/ata/ide-sff.c +++ b/drivers/ata/ide-sff.c @@ -138,7 +138,7 @@ static int ata_wait_ready(struct ide_port *ide, unsigned timeout) * @param num Sector number */ static int ata_set_lba_sector(struct ata_port *port, unsigned drive, - uint64_t num) + sector_t num) { struct ide_port *ide = to_ata_drive_access(port); @@ -324,11 +324,11 @@ static int ide_reset(struct ata_port *port) * @note Due to 'block' is of type 'int' only small disks can be handled! * @todo Optimize the read loop */ -static int ide_read(struct ata_port *port, void *buffer, unsigned int block, - int num_blocks) +static int ide_read(struct ata_port *port, void *buffer, sector_t block, + blkcnt_t num_blocks) { int rc; - uint64_t sector = block; + sector_t sector = block; struct ide_port *ide = to_ata_drive_access(port); while (num_blocks) { @@ -372,10 +372,10 @@ static int ide_read(struct ata_port *port, void *buffer, unsigned int block, * @todo Optimize the write loop */ static int __maybe_unused ide_write(struct ata_port *port, - const void *buffer, unsigned int block, int num_blocks) + const void *buffer, sector_t block, blkcnt_t num_blocks) { int rc; - uint64_t sector = block; + sector_t sector = block; struct ide_port *ide = to_ata_drive_access(port); while (num_blocks) { diff --git a/drivers/block/efi-block-io.c b/drivers/block/efi-block-io.c index 30db486876..4768c219ed 100644 --- a/drivers/block/efi-block-io.c +++ b/drivers/block/efi-block-io.c @@ -28,7 +28,7 @@ struct efi_block_io_media{ bool write_caching; u32 block_size; u32 io_align; - u64 last_block; + sector_t last_block; u64 lowest_aligned_lba; /* added in Revision 2 */ u32 logical_blocks_per_physical_block; /* added in Revision 2 */ u32 optimal_transfer_length_granularity; /* added in Revision 3 */ @@ -53,8 +53,8 @@ struct efi_bio_priv { u32 media_id; }; -static int efi_bio_read(struct block_device *blk, void *buffer, int block, - int num_blocks) +static int efi_bio_read(struct block_device *blk, void *buffer, sector_t block, + blkcnt_t num_blocks) { struct efi_bio_priv *priv = container_of(blk, struct efi_bio_priv, blk); efi_status_t efiret; @@ -69,7 +69,7 @@ static int efi_bio_read(struct block_device *blk, void *buffer, int block, } static int efi_bio_write(struct block_device *blk, - const void *buffer, int block, int num_blocks) + const void *buffer, sector_t block, blkcnt_t num_blocks) { struct efi_bio_priv *priv = container_of(blk, struct efi_bio_priv, blk); efi_status_t efiret; diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index cad902fd32..9c2e50e4a5 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -10,7 +10,7 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/log2.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> static unsigned int _get_table_maxdiv(const struct clk_div_table *table) { diff --git a/drivers/clk/clk-qoric.c b/drivers/clk/clk-qoric.c index b3e0780bc8..5bf677d94e 100644 --- a/drivers/clk/clk-qoric.c +++ b/drivers/clk/clk-qoric.c @@ -13,7 +13,7 @@ #include <linux/kernel.h> #include <of_address.h> #include <of.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #define PLL_DIV1 0 #define PLL_DIV2 1 diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c index 6016c5bfd0..2380bd0c21 100644 --- a/drivers/clk/clk-stm32mp1.c +++ b/drivers/clk/clk-stm32mp1.c @@ -10,7 +10,7 @@ #include <io.h> #include <of.h> #include <of_address.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <dt-bindings/clock/stm32mp1-clks.h> diff --git a/drivers/clk/imx/clk-frac-pll.c b/drivers/clk/imx/clk-frac-pll.c index 2195762c8b..48866eadf0 100644 --- a/drivers/clk/imx/clk-frac-pll.c +++ b/drivers/clk/imx/clk-frac-pll.c @@ -8,7 +8,7 @@ #include <malloc.h> #include <linux/clk.h> #include <linux/err.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-pfd.c b/drivers/clk/imx/clk-pfd.c index eb2b1700ae..a7ca664524 100644 --- a/drivers/clk/imx/clk-pfd.c +++ b/drivers/clk/imx/clk-pfd.c @@ -12,7 +12,7 @@ #include <linux/clkdev.h> #include <linux/err.h> #include <malloc.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index 6ba519516b..3fd5a49ee7 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -14,7 +14,7 @@ #include <malloc.h> #include <clock.h> #include <soc/imx8m/clk-early.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-pllv1.c b/drivers/clk/imx/clk-pllv1.c index 9b5d28f22f..283ae843a7 100644 --- a/drivers/clk/imx/clk-pllv1.c +++ b/drivers/clk/imx/clk-pllv1.c @@ -8,7 +8,7 @@ #include <linux/clkdev.h> #include <linux/err.h> #include <malloc.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-pllv2.c b/drivers/clk/imx/clk-pllv2.c index 56005ca725..6af2d71352 100644 --- a/drivers/clk/imx/clk-pllv2.c +++ b/drivers/clk/imx/clk-pllv2.c @@ -8,7 +8,7 @@ #include <linux/clkdev.h> #include <linux/err.h> #include <malloc.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c index e10b61b040..51e620a040 100644 --- a/drivers/clk/imx/clk-pllv3.c +++ b/drivers/clk/imx/clk-pllv3.c @@ -9,7 +9,7 @@ #include <linux/err.h> #include <malloc.h> #include <clock.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "clk.h" diff --git a/drivers/clk/imx/clk-sccg-pll.c b/drivers/clk/imx/clk-sccg-pll.c index aabab27a22..755ece0e12 100644 --- a/drivers/clk/imx/clk-sccg-pll.c +++ b/drivers/clk/imx/clk-sccg-pll.c @@ -12,7 +12,7 @@ #include <linux/err.h> #include <malloc.h> #include <clock.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "clk.h" diff --git a/drivers/clk/mxs/clk-frac.c b/drivers/clk/mxs/clk-frac.c index 21e572ff6f..a9d390121e 100644 --- a/drivers/clk/mxs/clk-frac.c +++ b/drivers/clk/mxs/clk-frac.c @@ -7,7 +7,7 @@ #include <linux/clk.h> #include <linux/err.h> #include <io.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "clk.h" diff --git a/drivers/clk/mxs/clk-ref.c b/drivers/clk/mxs/clk-ref.c index 16a2fc2991..69361f9ac3 100644 --- a/drivers/clk/mxs/clk-ref.c +++ b/drivers/clk/mxs/clk-ref.c @@ -7,7 +7,7 @@ #include <linux/clk.h> #include <linux/err.h> #include <io.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "clk.h" diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index 8d3fd6cf1c..6bb8156f8c 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -4,7 +4,7 @@ * Author: Heiko Stuebner <heiko@sntech.de> */ -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <common.h> #include <io.h> #include <linux/list.h> diff --git a/drivers/clk/socfpga/clk-pll-a10.c b/drivers/clk/socfpga/clk-pll-a10.c index 12d6ef6fc3..fcf31e9ea1 100644 --- a/drivers/clk/socfpga/clk-pll-a10.c +++ b/drivers/clk/socfpga/clk-pll-a10.c @@ -7,7 +7,7 @@ #include <malloc.h> #include <linux/clk.h> #include <linux/clkdev.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "clk.h" diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c index 28a1342bbf..cc8b85520c 100644 --- a/drivers/clk/tegra/clk-divider.c +++ b/drivers/clk/tegra/clk-divider.c @@ -8,7 +8,7 @@ #include <common.h> #include <io.h> #include <malloc.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <linux/clk.h> #include <linux/err.h> diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 3ac49cae47..832b3c5ea1 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -9,7 +9,7 @@ #include <clock.h> #include <io.h> #include <malloc.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <linux/clk.h> #include <linux/err.h> diff --git a/drivers/crypto/caam/caamrng.c b/drivers/crypto/caam/caamrng.c index 39a90568df..5d8cfb8bff 100644 --- a/drivers/crypto/caam/caamrng.c +++ b/drivers/crypto/caam/caamrng.c @@ -91,10 +91,8 @@ static void rng_done(struct device_d *jrdev, u32 *desc, u32 err, void *context) /* Buffer refilled, invalidate cache */ dma_sync_single_for_cpu(bd->addr, RN_BUF_SIZE, DMA_FROM_DEVICE); -#ifdef DEBUG - print_hex_dump(KERN_ERR, "rng refreshed buf@: ", - DUMP_PREFIX_OFFSET, 16, 4, bd->buf, RN_BUF_SIZE, 1); -#endif + print_hex_dump_debug("rng refreshed buf@: ", DUMP_PREFIX_OFFSET, + 16, 4, bd->buf, RN_BUF_SIZE, 1); } static inline int submit_job(struct caam_rng_ctx *ctx, int to_current) @@ -186,10 +184,9 @@ static inline int rng_create_sh_desc(struct caam_rng_ctx *ctx) dma_sync_single_for_device((unsigned long)desc, desc_bytes(desc), DMA_TO_DEVICE); -#ifdef DEBUG - print_hex_dump(KERN_ERR, "rng shdesc@: ", DUMP_PREFIX_OFFSET, 16, 4, + + print_hex_dump_debug("rng shdesc@: ", DUMP_PREFIX_OFFSET, 16, 4, desc, desc_bytes(desc), 1); -#endif return 0; } @@ -203,10 +200,9 @@ static inline int rng_create_job_desc(struct caam_rng_ctx *ctx, int buf_id) HDR_REVERSE); append_seq_out_ptr_intlen(desc, bd->addr, RN_BUF_SIZE, 0); -#ifdef DEBUG - print_hex_dump(KERN_ERR, "rng job desc@: ", DUMP_PREFIX_OFFSET, 16, 4, + + print_hex_dump_debug("rng job desc@: ", DUMP_PREFIX_OFFSET, 16, 4, desc, desc_bytes(desc), 1); -#endif return 0; } diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c index 977d22dcaa..1775b08be3 100644 --- a/drivers/ddr/fsl/util.c +++ b/drivers/ddr/fsl/util.c @@ -8,7 +8,7 @@ #include <soc/fsl/fsl_immap.h> #include <io.h> #include <soc/fsl/immap_lsch2.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "fsl_ddr.h" /* To avoid 64-bit full-divides, we factor this here */ diff --git a/drivers/gpio/gpio-orion.c b/drivers/gpio/gpio-orion.c index 63ef966edf..ba2729d1f0 100644 --- a/drivers/gpio/gpio-orion.c +++ b/drivers/gpio/gpio-orion.c @@ -91,10 +91,7 @@ static int orion_gpio_probe(struct device_d *dev) { struct resource *iores; struct orion_gpio_chip *gpio; - - dev->id = of_alias_get_id(dev->device_node, "gpio"); - if (dev->id < 0) - return dev->id; + int id; gpio = xzalloc(sizeof(*gpio)); iores = dev_request_mem_resource(dev, 0); @@ -105,7 +102,12 @@ static int orion_gpio_probe(struct device_d *dev) gpio->regs = IOMEM(iores->start); gpio->chip.dev = dev; gpio->chip.ops = &orion_gpio_ops; - gpio->chip.base = dev->id * 32; + + id = of_alias_get_id(dev->device_node, "gpio"); + if (id < 0) + return id; + + gpio->chip.base = id * 32; gpio->chip.ngpio = 32; of_property_read_u32(dev->device_node, "ngpios", &gpio->chip.ngpio); diff --git a/drivers/led/led-pwm.c b/drivers/led/led-pwm.c index d8866bf757..90c2ca929a 100644 --- a/drivers/led/led-pwm.c +++ b/drivers/led/led-pwm.c @@ -20,7 +20,7 @@ #include <led.h> #include <pwm.h> #include <of.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> struct pwmled { bool active_low; diff --git a/drivers/mci/dw_mmc.c b/drivers/mci/dw_mmc.c index 8249403eb7..7979568841 100644 --- a/drivers/mci/dw_mmc.c +++ b/drivers/mci/dw_mmc.c @@ -19,7 +19,7 @@ #include <linux/bitops.h> #include <linux/clk.h> #include <linux/err.h> -#include <asm-generic/errno.h> +#include <errno.h> #include "dw_mmc.h" diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c index 0cb32b46f1..c3a8b377e2 100644 --- a/drivers/mci/imx-esdhc-pbl.c +++ b/drivers/mci/imx-esdhc-pbl.c @@ -6,7 +6,7 @@ #include <io.h> #include <mci.h> #include <linux/sizes.h> -#include <asm-generic/sections.h> +#include <asm/sections.h> #include <asm/cache.h> #include <mach/xload.h> #ifdef CONFIG_ARCH_IMX diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c index f9066e3a1e..017f25d35f 100644 --- a/drivers/mci/mci-core.c +++ b/drivers/mci/mci-core.c @@ -14,7 +14,7 @@ #include <mci.h> #include <malloc.h> #include <errno.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <asm/byteorder.h> #include <block.h> #include <disks.h> @@ -398,16 +398,16 @@ int mci_switch(struct mci *mci, unsigned index, unsigned value) return mci_send_cmd(mci, &cmd, NULL); } -static int mci_calc_blk_cnt(uint64_t cap, unsigned shift) +static blkcnt_t mci_calc_blk_cnt(blkcnt_t cap, unsigned shift) { - unsigned ret = cap >> shift; + blkcnt_t ret = cap >> shift; if (ret > 0x7fffffff) { pr_warn("Limiting card size due to 31 bit contraints\n"); return 0x7fffffff; } - return (int)ret; + return ret; } static void mci_part_add(struct mci *mci, uint64_t size, @@ -1342,14 +1342,14 @@ static int mci_blk_part_switch(struct mci_part *part) * This routine expects the buffer has the correct size to read all data! */ static int __maybe_unused mci_sd_write(struct block_device *blk, - const void *buffer, int block, int num_blocks) + const void *buffer, sector_t block, blkcnt_t num_blocks) { struct mci_part *part = container_of(blk, struct mci_part, blk); struct mci *mci = part->mci; struct mci_host *host = mci->host; int rc; - unsigned max_req_block = num_blocks; - int write_block; + blkcnt_t max_req_block = num_blocks; + blkcnt_t write_block; if (mci->host->max_req_size) max_req_block = mci->host->max_req_size / mci->write_bl_len; @@ -1361,7 +1361,7 @@ static int __maybe_unused mci_sd_write(struct block_device *blk, return -EPERM; } - dev_dbg(&mci->dev, "%s: Write %d block(s), starting at %d\n", + dev_dbg(&mci->dev, "%s: Write %llu block(s), starting at %llu\n", __func__, num_blocks, block); if (mci->write_bl_len != SECTOR_SIZE) { @@ -1372,15 +1372,15 @@ static int __maybe_unused mci_sd_write(struct block_device *blk, /* size of the block number field in the MMC/SD command is 32 bit only */ if (block > MAX_BUFFER_NUMBER) { - dev_dbg(&mci->dev, "Cannot handle block number %d. Too large!\n", block); + dev_dbg(&mci->dev, "Cannot handle block number %llu. Too large!\n", block); return -EINVAL; } while (num_blocks) { - write_block = min_t(int, num_blocks, max_req_block); + write_block = min(num_blocks, max_req_block); rc = mci_block_write(mci, buffer, block, write_block); if (rc != 0) { - dev_dbg(&mci->dev, "Writing block %d failed with %d\n", block, rc); + dev_dbg(&mci->dev, "Writing block %llu failed with %d\n", block, rc); return rc; } num_blocks -= write_block; @@ -1401,13 +1401,13 @@ static int __maybe_unused mci_sd_write(struct block_device *blk, * * This routine expects the buffer has the correct size to store all data! */ -static int mci_sd_read(struct block_device *blk, void *buffer, int block, - int num_blocks) +static int mci_sd_read(struct block_device *blk, void *buffer, sector_t block, + blkcnt_t num_blocks) { struct mci_part *part = container_of(blk, struct mci_part, blk); struct mci *mci = part->mci; - unsigned max_req_block = num_blocks; - int read_block; + blkcnt_t max_req_block = num_blocks; + blkcnt_t read_block; int rc; if (mci->host->max_req_size) @@ -1415,7 +1415,7 @@ static int mci_sd_read(struct block_device *blk, void *buffer, int block, mci_blk_part_switch(part); - dev_dbg(&mci->dev, "%s: Read %d block(s), starting at %d\n", + dev_dbg(&mci->dev, "%s: Read %llu block(s), starting at %llu\n", __func__, num_blocks, block); if (mci->read_bl_len != SECTOR_SIZE) { @@ -1425,15 +1425,15 @@ static int mci_sd_read(struct block_device *blk, void *buffer, int block, } if (block > MAX_BUFFER_NUMBER) { - dev_err(&mci->dev, "Cannot handle block number %d. Too large!\n", block); + dev_err(&mci->dev, "Cannot handle block number %llu. Too large!\n", block); return -EINVAL; } while (num_blocks) { - read_block = min_t(int, num_blocks, max_req_block); + read_block = min(num_blocks, max_req_block); rc = mci_read_block(mci, buffer, block, read_block); if (rc != 0) { - dev_dbg(&mci->dev, "Reading block %d failed with %d\n", block, rc); + dev_dbg(&mci->dev, "Reading block %llu failed with %d\n", block, rc); return rc; } num_blocks -= read_block; diff --git a/drivers/mfd/rave-sp.c b/drivers/mfd/rave-sp.c index 8fc46b66bb..ef569dd513 100644 --- a/drivers/mfd/rave-sp.c +++ b/drivers/mfd/rave-sp.c @@ -269,9 +269,8 @@ static int rave_sp_write(struct rave_sp *sp, const u8 *data, u8 data_size) length = dest - frame; - if (IS_ENABLED(DEBUG)) - print_hex_dump(0, "rave-sp tx: ", DUMP_PREFIX_NONE, - 16, 1, frame, length, false); + print_hex_dump_debug("rave-sp tx: ", DUMP_PREFIX_NONE, 16, 1, + frame, length, false); return serdev_device_write(sp->serdev, frame, length, SECOND); } @@ -406,9 +405,8 @@ static void rave_sp_receive_frame(struct rave_sp *sp, struct device_d *dev = sp->serdev->dev; u8 crc_calculated[checksum_length]; - if (IS_ENABLED(DEBUG)) - print_hex_dump(0, "rave-sp rx: ", DUMP_PREFIX_NONE, - 16, 1, data, length, false); + print_hex_dump_debug("rave-sp rx: ", DUMP_PREFIX_NONE, 16, 1, + data, length, false); if (unlikely(length <= checksum_length)) { dev_warn(dev, "Dropping short frame\n"); diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c index 3032c5a16d..8cd82327ba 100644 --- a/drivers/mtd/mtdconcat.c +++ b/drivers/mtd/mtdconcat.c @@ -27,7 +27,7 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/concat.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> /* * Our storage structure: diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c index 172ab5ffbc..8a78f9046f 100644 --- a/drivers/mtd/nand/bbt.c +++ b/drivers/mtd/nand/bbt.c @@ -113,18 +113,20 @@ int nanddev_bbt_set_block_status(struct nand_device *nand, unsigned int entry, ((entry * bits_per_block) / BITS_PER_LONG); unsigned int offs = (entry * bits_per_block) % BITS_PER_LONG; unsigned long val = status & GENMASK(bits_per_block - 1, 0); + unsigned long shift = ((bits_per_block + offs <= BITS_PER_LONG) ? + (offs + bits_per_block - 1) : (BITS_PER_LONG - 1)); if (entry >= nanddev_neraseblocks(nand)) return -ERANGE; - pos[0] &= ~GENMASK(offs + bits_per_block - 1, offs); + pos[0] &= ~GENMASK(shift, offs); pos[0] |= val << offs; if (bits_per_block + offs > BITS_PER_LONG) { unsigned int rbits = bits_per_block + offs - BITS_PER_LONG; pos[1] &= ~GENMASK(rbits - 1, 0); - pos[1] |= val >> rbits; + pos[1] |= (val >> (BITS_PER_LONG - offs)); } return 0; diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c index db1ca88791..0f3ffa1c0e 100644 --- a/drivers/mtd/nand/nand_omap_gpmc.c +++ b/drivers/mtd/nand/nand_omap_gpmc.c @@ -636,7 +636,7 @@ static void omap_write_buf_pref(struct nand_chip *nand_chip, gpmc_prefetch_enable(info->gpmc_cs, PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x1); - while (len) { + while (len > 0) { w_count = readl(info->gpmc_base + GPMC_PREFETCH_STATUS); w_count = GPMC_PREFETCH_STATUS_FIFO_CNT(w_count); w_count = w_count >> 2; diff --git a/drivers/mtd/nand/nand_s3c24xx.c b/drivers/mtd/nand/nand_s3c24xx.c index 59bd6c9fed..f1d1441f50 100644 --- a/drivers/mtd/nand/nand_s3c24xx.c +++ b/drivers/mtd/nand/nand_s3c24xx.c @@ -32,7 +32,7 @@ #include <mach/s3c-iomap.h> #include <mach/s3c24xx-nand.h> #include <io.h> -#include <asm-generic/errno.h> +#include <errno.h> #include <asm/sections.h> #ifdef CONFIG_S3C_NAND_BOOT diff --git a/drivers/mtd/ubi/debug.c b/drivers/mtd/ubi/debug.c index 6ae797c2bf..75d6b69f09 100644 --- a/drivers/mtd/ubi/debug.c +++ b/drivers/mtd/ubi/debug.c @@ -42,7 +42,7 @@ void ubi_dump_flash(struct ubi_device *ubi, int pnum, int offset, int len) ubi_msg(ubi, "dumping %d bytes of data from PEB %d, offset %d", len, pnum, offset); - print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1, buf, len, 1); + print_hex_dump_debug("", DUMP_PREFIX_OFFSET, 32, 1, buf, len, 1); out: vfree(buf); return; @@ -63,8 +63,8 @@ void ubi_dump_ec_hdr(const struct ubi_ec_hdr *ec_hdr) pr_err("\timage_seq %d\n", be32_to_cpu(ec_hdr->image_seq)); pr_err("\thdr_crc %#08x\n", be32_to_cpu(ec_hdr->hdr_crc)); pr_err("erase counter header hexdump:\n"); - print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1, - ec_hdr, UBI_EC_HDR_SIZE, 1); + print_hex_dump_debug("", DUMP_PREFIX_OFFSET, 32, 1, + ec_hdr, UBI_EC_HDR_SIZE, 1); } /** @@ -88,8 +88,8 @@ void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr) (unsigned long long)be64_to_cpu(vid_hdr->sqnum)); pr_err("\thdr_crc %08x\n", be32_to_cpu(vid_hdr->hdr_crc)); pr_err("Volume identifier header hexdump:\n"); - print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 1, - vid_hdr, UBI_VID_HDR_SIZE, 1); + print_hex_dump_debug("", DUMP_PREFIX_OFFSET, 32, 1, + vid_hdr, UBI_VID_HDR_SIZE, 1); } /** diff --git a/drivers/mtd/ubi/kapi.c b/drivers/mtd/ubi/kapi.c index e1cab763eb..e1781f3f20 100644 --- a/drivers/mtd/ubi/kapi.c +++ b/drivers/mtd/ubi/kapi.c @@ -17,7 +17,7 @@ /* This file mostly implements UBI kernel API functions */ #include <linux/err.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include "ubi.h" /** diff --git a/drivers/mtd/ubi/ubi-barebox.h b/drivers/mtd/ubi/ubi-barebox.h index 7ee87ffd3e..5b2d4a72c8 100644 --- a/drivers/mtd/ubi/ubi-barebox.h +++ b/drivers/mtd/ubi/ubi-barebox.h @@ -17,7 +17,7 @@ #include <common.h> #include <malloc.h> #include <crc.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <errno.h> #include <linux/err.h> #include <linux/types.h> diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index ea7cea5f1b..1edc16ce44 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c @@ -541,7 +541,7 @@ static int smc911x_probe(struct device_d *dev) * forbidden while this bit isn't set. Try for 100ms */ ret = wait_on_timeout(100 * MSECOND, smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY); - if (!ret) { + if (ret) { dev_err(dev, "Device not READY in 100ms aborting\n"); return -ENODEV; } diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c index 257679fae8..a27a409cf5 100644 --- a/drivers/nvme/host/core.c +++ b/drivers/nvme/host/core.c @@ -222,7 +222,7 @@ static void __nvme_revalidate_disk(struct block_device *blk, } static void nvme_setup_rw(struct nvme_ns *ns, struct nvme_command *cmnd, - int block, int num_block) + sector_t block, blkcnt_t num_block) { cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, block)); @@ -239,7 +239,7 @@ static void nvme_setup_flush(struct nvme_ns *ns, struct nvme_command *cmnd) } static int nvme_submit_sync_rw(struct nvme_ns *ns, struct nvme_command *cmnd, - void *buffer, int block, int num_blocks) + void *buffer, sector_t block, blkcnt_t num_blocks) { /* * ns->ctrl->max_hw_sectors is in units of 512 bytes, so we @@ -251,7 +251,7 @@ static int nvme_submit_sync_rw(struct nvme_ns *ns, struct nvme_command *cmnd, if (num_blocks > max_hw_sectors) { while (num_blocks) { - const int chunk = min_t(int, num_blocks, + const u32 chunk = min_t(blkcnt_t, num_blocks, max_hw_sectors); ret = nvme_submit_sync_rw(ns, cmnd, buffer, block, @@ -275,7 +275,7 @@ static int nvme_submit_sync_rw(struct nvme_ns *ns, struct nvme_command *cmnd, if (ret) { dev_err(ns->ctrl->dev, - "I/O failed: block: %d, num blocks: %d, status code type: %xh, status code %02xh\n", + "I/O failed: block: %llu, num blocks: %llu, status code type: %xh, status code %02xh\n", block, num_blocks, (ret >> 8) & 0xf, ret & 0xff); return -EIO; @@ -286,7 +286,7 @@ static int nvme_submit_sync_rw(struct nvme_ns *ns, struct nvme_command *cmnd, static int nvme_block_device_read(struct block_device *blk, void *buffer, - int block, int num_blocks) + sector_t block, blkcnt_t num_blocks) { struct nvme_ns *ns = to_nvme_ns(blk); struct nvme_command cmnd = { }; @@ -298,7 +298,7 @@ static int nvme_block_device_read(struct block_device *blk, void *buffer, static int __maybe_unused nvme_block_device_write(struct block_device *blk, const void *buffer, - int block, int num_blocks) + sector_t block, blkcnt_t num_blocks) { struct nvme_ns *ns = to_nvme_ns(blk); struct nvme_command cmnd = { }; diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c index 9b55f47b4c..2a1c4b6941 100644 --- a/drivers/nvmem/core.c +++ b/drivers/nvmem/core.c @@ -123,7 +123,7 @@ static struct nvmem_device *of_nvmem_find(struct device_node *nvmem_np) return NULL; list_for_each_entry(dev, &nvmem_devs, node) - if (dev->dev.device_node->name && !strcmp(dev->dev.device_node->name, nvmem_np->name)) + if (dev->dev.device_node == nvmem_np) return dev; return NULL; diff --git a/drivers/of/base.c b/drivers/of/base.c index edb0a8e71a..8759099d74 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1704,8 +1704,8 @@ void barebox_register_of(struct device_node *root) if (root_node) return; - of_fix_tree(root); of_set_root_node(root); + of_fix_tree(root); if (IS_ENABLED(CONFIG_OFDEVICE)) of_probe(); diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c index 9c6218c2c4..8f4ee3f0a2 100644 --- a/drivers/of/overlay.c +++ b/drivers/of/overlay.c @@ -109,7 +109,7 @@ static char *of_overlay_fix_path(struct device_node *root, } static void of_overlay_apply_symbols(struct device_node *root, - struct device_node *overlay) + struct device_node *overlay) { const char *old_path; char *new_path; @@ -120,8 +120,13 @@ static void of_overlay_apply_symbols(struct device_node *root, root_symbols = of_get_child_by_name(root, "__symbols__"); overlay_symbols = of_get_child_by_name(overlay, "__symbols__"); - if (!overlay_symbols || !root_symbols) { - pr_info("overlay/root doesn't have a __symbols__ node\n"); + if (!overlay_symbols) { + pr_debug("overlay doesn't have a __symbols__ node\n"); + return; + } + + if (!root_symbols) { + pr_info("root doesn't have a __symbols__ node\n"); return; } @@ -218,7 +223,7 @@ int of_process_overlay(struct device_node *root, target = find_target(root, fragment); if (!target) - pr_debug("cannot find target for fragment", + pr_debug("cannot find target for fragment %s\n", fragment->name); err = process(target, ovl, data); diff --git a/drivers/of/partition.c b/drivers/of/partition.c index 65c24c5426..b71716218b 100644 --- a/drivers/of/partition.c +++ b/drivers/of/partition.c @@ -235,6 +235,9 @@ static int of_partition_fixup(struct device_node *root, void *ctx) struct device_node *np; char *name; + if (!cdev->device_node) + return -EINVAL; + name = of_get_reproducible_name(cdev->device_node); np = of_find_node_by_reproducible_name(root, name); free(name); diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c index d9eaa8a754..d1e064440e 100644 --- a/drivers/phy/phy-stm32-usbphyc.c +++ b/drivers/phy/phy-stm32-usbphyc.c @@ -12,7 +12,7 @@ #include <io.h> #include <linux/phy/phy.h> #include <linux/reset.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <usb/phy.h> #define STM32_USBPHYC_PLL 0x0 diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 8407b2f5e1..6dd6e3eb95 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -15,7 +15,7 @@ #include <pwm.h> #include <linux/clk.h> #include <linux/err.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> /* i.MX1 and i.MX21 share the same PWM function block: */ diff --git a/drivers/pwm/pwm-mxs.c b/drivers/pwm/pwm-mxs.c index 08819b43bc..8f77ca07a6 100644 --- a/drivers/pwm/pwm-mxs.c +++ b/drivers/pwm/pwm-mxs.c @@ -9,7 +9,7 @@ #include <stmp-device.h> #include <linux/clk.h> #include <linux/err.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #define SET 0x4 #define CLR 0x8 diff --git a/drivers/pwm/pxa_pwm.c b/drivers/pwm/pxa_pwm.c index dc8e41464b..61c4b8da43 100644 --- a/drivers/pwm/pxa_pwm.c +++ b/drivers/pwm/pxa_pwm.c @@ -17,7 +17,7 @@ #include <mach/clock.h> #include <mach/pxa-regs.h> #include <mach/regs-pwm.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <linux/compiler.h> /* PWM registers and bits definitions */ diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 1ce057180a..9be81832f2 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -28,6 +28,15 @@ config REGULATOR_STM32_PWR This driver supports internal regulators (1V1, 1V8, 3V3) in the STMicroelectronics STM32 chips. +config REGULATOR_STM32_VREFBUF + tristate "STMicroelectronics STM32 VREFBUF" + depends on ARCH_STM32MP || COMPILE_TEST + help + This driver supports STMicroelectronics STM32 VREFBUF (voltage + reference buffer) which can be used as voltage reference for + internal ADCs, DACs and also for external components through + dedicated Vref+ pin. + config REGULATOR_STPMIC1 tristate "STMicroelectronics STPMIC1 PMIC Regulators" depends on MFD_STPMIC1 diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 4d0bba6c52..67859bb79e 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -6,3 +6,4 @@ obj-$(CONFIG_REGULATOR_PFUZE) += pfuze.o obj-$(CONFIG_REGULATOR_STPMIC1) += stpmic1_regulator.o obj-$(CONFIG_REGULATOR_ANATOP) += anatop-regulator.o obj-$(CONFIG_REGULATOR_STM32_PWR) += stm32-pwr.o +obj-$(CONFIG_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index 6ea21a4609..ac3a9b048e 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c @@ -176,6 +176,12 @@ int of_regulator_register(struct regulator_dev *rd, struct device_node *node) ri->node = node; + if (rd->desc->off_on_delay) + ri->enable_time_us = rd->desc->off_on_delay; + + if (rd->desc->fixed_uV && rd->desc->n_voltages == 1) + ri->min_uv = ri->max_uv = rd->desc->fixed_uV; + of_property_read_u32(node, "regulator-enable-ramp-delay", &ri->enable_time_us); of_property_read_u32(node, "regulator-min-microvolt", @@ -539,6 +545,30 @@ void regulator_bulk_free(int num_consumers, } EXPORT_SYMBOL_GPL(regulator_bulk_free); +int regulator_get_voltage(struct regulator *regulator) +{ + struct regulator_dev *rdev = regulator->ri->rdev; + int sel, ret; + + if (rdev->desc->ops->get_voltage_sel) { + sel = rdev->desc->ops->get_voltage_sel(rdev); + if (sel < 0) + return sel; + ret = rdev->desc->ops->list_voltage(rdev, sel); + } else if (rdev->desc->ops->get_voltage) { + ret = rdev->desc->ops->get_voltage(rdev); + } else if (rdev->desc->ops->list_voltage) { + ret = rdev->desc->ops->list_voltage(rdev, 0); + } else if (rdev->desc->fixed_uV && (rdev->desc->n_voltages == 1)) { + ret = rdev->desc->fixed_uV; + } else { + return -EINVAL; + } + + return ret; +} +EXPORT_SYMBOL_GPL(regulator_get_voltage_rdev); + static void regulator_print_one(struct regulator_internal *ri) { struct regulator *r; diff --git a/drivers/regulator/helpers.c b/drivers/regulator/helpers.c index c4877cecf7..e741944ce7 100644 --- a/drivers/regulator/helpers.c +++ b/drivers/regulator/helpers.c @@ -369,4 +369,29 @@ int regulator_map_voltage_iterate(struct regulator_dev *rdev, } EXPORT_SYMBOL_GPL(regulator_map_voltage_iterate); +/** + * regulator_list_voltage_table - List voltages with table based mapping + * + * @rdev: Regulator device + * @selector: Selector to convert into a voltage + * + * Regulators with table based mapping between voltages and + * selectors can set volt_table in the regulator descriptor + * and then use this function as their list_voltage() operation. + */ +int regulator_list_voltage_table(struct regulator_dev *rdev, + unsigned int selector) +{ + if (!rdev->desc->volt_table) { + BUG_ON(!rdev->desc->volt_table); + return -EINVAL; + } + if (selector >= rdev->desc->n_voltages) + return -EINVAL; + if (selector < rdev->desc->linear_min_sel) + return 0; + + return rdev->desc->volt_table[selector]; +} +EXPORT_SYMBOL_GPL(regulator_list_voltage_table); diff --git a/drivers/regulator/stm32-vrefbuf.c b/drivers/regulator/stm32-vrefbuf.c new file mode 100644 index 0000000000..3956b1f64f --- /dev/null +++ b/drivers/regulator/stm32-vrefbuf.c @@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) STMicroelectronics 2017 + * + * Author: Fabrice Gasnier <fabrice.gasnier@st.com> + */ + +#include <common.h> +#include <linux/bitfield.h> +#include <linux/clk.h> +#include <linux/iopoll.h> +#include <of.h> +#include <regulator.h> + +/* STM32 VREFBUF registers */ +#define STM32_VREFBUF_CSR 0x00 + +/* STM32 VREFBUF CSR bitfields */ +#define STM32_VRS GENMASK(6, 4) +#define STM32_VRR BIT(3) +#define STM32_HIZ BIT(1) +#define STM32_ENVR BIT(0) + +#define STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS 10 + +#define readl_relaxed readl +#define writel_relaxed writel + +struct stm32_vrefbuf { + void __iomem *base; + struct clk *clk; + struct device_d *dev; + struct regulator_dev rdev; +}; + +struct stm32_vrefbuf_desc { + struct regulator_desc desc; + const char *supply_name; +}; + +static inline struct stm32_vrefbuf *to_stm32_vrefbuf(struct regulator_dev *rdev) +{ + return container_of(rdev, struct stm32_vrefbuf, rdev); +} + +static const unsigned int stm32_vrefbuf_voltages[] = { + /* Matches resp. VRS = 000b, 001b, 010b, 011b */ + 2500000, 2048000, 1800000, 1500000, +}; + +static int stm32_vrefbuf_enable(struct regulator_dev *rdev) +{ + struct stm32_vrefbuf *priv = to_stm32_vrefbuf(rdev); + u32 val; + int ret; + + val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); + val = (val & ~STM32_HIZ) | STM32_ENVR; + writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); + + /* + * Vrefbuf startup time depends on external capacitor: wait here for + * VRR to be set. That means output has reached expected value. + * ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as + * arbitrary timeout. + */ + ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val, + val & STM32_VRR, 10000); + if (ret) { + dev_err(priv->dev, "stm32 vrefbuf timed out!\n"); + val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); + val = (val & ~STM32_ENVR) | STM32_HIZ; + writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); + } + + return ret; +} + +static int stm32_vrefbuf_disable(struct regulator_dev *rdev) +{ + struct stm32_vrefbuf *priv = to_stm32_vrefbuf(rdev); + u32 val; + + val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); + val &= ~STM32_ENVR; + writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); + + return 0; +} + +static int stm32_vrefbuf_is_enabled(struct regulator_dev *rdev) +{ + struct stm32_vrefbuf *priv = to_stm32_vrefbuf(rdev); + int ret; + + ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR; + + return ret; +} + +static int stm32_vrefbuf_set_voltage_sel(struct regulator_dev *rdev, + unsigned sel) +{ + struct stm32_vrefbuf *priv = to_stm32_vrefbuf(rdev); + u32 val; + + val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); + val = (val & ~STM32_VRS) | FIELD_PREP(STM32_VRS, sel); + writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); + + return 0; +} + +static int stm32_vrefbuf_get_voltage_sel(struct regulator_dev *rdev) +{ + struct stm32_vrefbuf *priv = to_stm32_vrefbuf(rdev); + u32 val; + int ret; + + val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); + ret = FIELD_GET(STM32_VRS, val); + + return ret; +} + +static const struct regulator_ops stm32_vrefbuf_volt_ops = { + .enable = stm32_vrefbuf_enable, + .disable = stm32_vrefbuf_disable, + .is_enabled = stm32_vrefbuf_is_enabled, + .get_voltage_sel = stm32_vrefbuf_get_voltage_sel, + .set_voltage_sel = stm32_vrefbuf_set_voltage_sel, + .list_voltage = regulator_list_voltage_table, +}; + +static const struct stm32_vrefbuf_desc stm32_vrefbuf_regu = { + .desc = { + .volt_table = stm32_vrefbuf_voltages, + .n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages), + .ops = &stm32_vrefbuf_volt_ops, + .off_on_delay = 1000, + }, + .supply_name = "vdda", +}; + +static int stm32_vrefbuf_probe(struct device_d *dev) +{ + struct stm32_vrefbuf *priv; + struct regulator_dev *rdev; + struct regulator *supply; + int ret; + + supply = regulator_get(dev, stm32_vrefbuf_regu.supply_name); + if (IS_ERR(supply)) + return PTR_ERR(supply); + + priv = xzalloc(sizeof(*priv)); + priv->dev = dev; + + priv->base = dev_request_mem_region(dev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + priv->clk = clk_get(dev, NULL); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); + + ret = clk_enable(priv->clk); + if (ret) { + dev_err(dev, "clk enable failed with error %d\n", ret); + return ret; + } + + rdev = &priv->rdev; + + rdev->dev = dev; + rdev->desc = &stm32_vrefbuf_regu.desc; + + ret = of_regulator_register(rdev, dev->device_node); + if (ret) { + ret = PTR_ERR(rdev); + dev_err(dev, "register failed with error %d\n", ret); + goto err_clk_dis; + } + + regulator_enable(supply); + + dev->priv = priv; + + return 0; + +err_clk_dis: + clk_disable(priv->clk); + + return ret; +} + +static void stm32_vrefbuf_remove(struct device_d *dev) +{ + struct stm32_vrefbuf *priv = dev->priv; + + clk_disable(priv->clk); +}; + +static const struct of_device_id __maybe_unused stm32_vrefbuf_of_match[] = { + { .compatible = "st,stm32-vrefbuf", }, + {}, +}; + +static struct driver_d stm32_vrefbuf_driver = { + .probe = stm32_vrefbuf_probe, + .name = "stm32-vrefbuf", + .remove = stm32_vrefbuf_remove, + .of_compatible = stm32_vrefbuf_of_match, +}; +device_platform_driver(stm32_vrefbuf_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>"); +MODULE_DESCRIPTION("STMicroelectronics STM32 VREFBUF driver"); +MODULE_ALIAS("platform:stm32-vrefbuf"); diff --git a/drivers/serial/serial_ar933x.c b/drivers/serial/serial_ar933x.c index 2fe1b4f923..32ad1ba463 100644 --- a/drivers/serial/serial_ar933x.c +++ b/drivers/serial/serial_ar933x.c @@ -18,7 +18,7 @@ #include <init.h> #include <malloc.h> #include <io.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <linux/clk.h> #include <linux/err.h> diff --git a/drivers/usb/gadget/dfu.c b/drivers/usb/gadget/dfu.c index 7e23fa3157..bb0b34aa94 100644 --- a/drivers/usb/gadget/dfu.c +++ b/drivers/usb/gadget/dfu.c @@ -32,6 +32,7 @@ * checking? * - make 'dnstate' attached to 'struct usb_device_instance' */ +#define pr_fmt(fmt) "dfu: " fmt #include <dma.h> #include <asm/byteorder.h> @@ -54,6 +55,7 @@ #include <fs.h> #include <ioctl.h> #include <linux/mtd/mtd-abi.h> +#include <work.h> #define USB_DT_DFU 0x21 @@ -153,6 +155,7 @@ struct f_dfu { u8 dfu_state; u8 dfu_status; struct usb_request *dnreq; + struct work_queue wq; }; static inline struct f_dfu *func_to_dfu(struct usb_function *f) @@ -173,6 +176,191 @@ static struct usb_gadget_strings *dfu_strings[] = { }; static void dn_complete(struct usb_ep *ep, struct usb_request *req); +static void up_complete(struct usb_ep *ep, struct usb_request *req); +static void dfu_cleanup(struct f_dfu *dfu); + +struct dfu_work { + struct work_struct work; + struct f_dfu *dfu; + void (*task)(struct dfu_work *dw); + size_t len; + uint8_t *rbuf; + uint8_t wbuf[CONFIG_USBD_DFU_XFER_SIZE]; +}; + +static void dfu_do_work(struct work_struct *w) +{ + struct dfu_work *dw = container_of(w, struct dfu_work, work); + struct f_dfu *dfu = dw->dfu; + + if (dfu->dfu_state != DFU_STATE_dfuERROR && dfu->dfu_status == DFU_STATUS_OK) + dw->task(dw); + else + pr_debug("skip work\n"); + + free(dw); +} + +static void dfu_work_cancel(struct work_struct *w) +{ + struct dfu_work *dw = container_of(w, struct dfu_work, work); + + free(dw); +} + +static void dfu_do_write(struct dfu_work *dw) +{ + struct f_dfu *dfu = dw->dfu; + ssize_t size, wlen = dw->len; + ssize_t ret; + + pr_debug("do write\n"); + + if (prog_erase && (dfu_written + wlen) > dfu_erased) { + size = roundup(wlen, dfu_mtdinfo.erasesize); + ret = erase(dfufd, size, dfu_erased); + dfu_erased += size; + if (ret && ret != -ENOSYS) { + perror("erase"); + dfu->dfu_state = DFU_STATE_dfuERROR; + dfu->dfu_status = DFU_STATUS_errERASE; + return; + } + } + + dfu_written += wlen; + ret = write(dfufd, dw->wbuf, wlen); + if (ret < wlen) { + perror("write"); + dfu->dfu_state = DFU_STATE_dfuERROR; + dfu->dfu_status = DFU_STATUS_errWRITE; + } +} + +static void dfu_do_read(struct dfu_work *dw) +{ + struct f_dfu *dfu = dw->dfu; + struct usb_composite_dev *cdev = dfu->func.config->cdev; + ssize_t size, rlen = dw->len; + + pr_debug("do read\n"); + + size = read(dfufd, dfu->dnreq->buf, rlen); + dfu->dnreq->length = size; + if (size < 0) { + perror("read"); + dfu->dnreq->length = 0; + dfu->dfu_state = DFU_STATE_dfuERROR; + dfu->dfu_status = DFU_STATUS_errFILE; + } else if (size < rlen) { + /* this is the last chunk, go to IDLE and close file */ + dfu_cleanup(dfu); + } + + dfu->dnreq->complete = up_complete; + usb_ep_queue(cdev->gadget->ep0, dfu->dnreq); +} + +static void dfu_do_open_dnload(struct dfu_work *dw) +{ + struct f_dfu *dfu = dw->dfu; + int ret; + + pr_debug("do open dnload\n"); + + if (dfu_file_entry->flags & FILE_LIST_FLAG_SAFE) { + dfufd = open(DFU_TEMPFILE, O_WRONLY | O_CREAT); + } else { + unsigned flags = O_WRONLY; + + if (dfu_file_entry->flags & FILE_LIST_FLAG_CREATE) + flags |= O_CREAT | O_TRUNC; + + dfufd = open(dfu_file_entry->filename, flags); + } + + if (dfufd < 0) { + perror("open"); + dfu->dfu_state = DFU_STATE_dfuERROR; + dfu->dfu_status = DFU_STATUS_errFILE; + return; + } + + if (!(dfu_file_entry->flags & FILE_LIST_FLAG_SAFE)) { + ret = ioctl(dfufd, MEMGETINFO, &dfu_mtdinfo); + if (!ret) /* file is on a mtd device */ + prog_erase = 1; + } +} + +static void dfu_do_open_upload(struct dfu_work *dw) +{ + struct f_dfu *dfu = dw->dfu; + + pr_debug("do open upload\n"); + + dfufd = open(dfu_file_entry->filename, O_RDONLY); + if (dfufd < 0) { + perror("open"); + dfu->dfu_state = DFU_STATE_dfuERROR; + dfu->dfu_status = DFU_STATUS_errFILE; + } +} + +static void dfu_do_close(struct dfu_work *dw) +{ + struct stat s; + + pr_debug("do close\n"); + + if (dfufd > 0) { + close(dfufd); + dfufd = -EINVAL; + } + + if (!stat(DFU_TEMPFILE, &s)) + unlink(DFU_TEMPFILE); +} + +static void dfu_do_copy(struct dfu_work *dw) +{ + struct f_dfu *dfu = dw->dfu; + unsigned flags = O_WRONLY; + int ret, fd; + + pr_debug("do copy\n"); + + if (dfu_file_entry->flags & FILE_LIST_FLAG_CREATE) + flags |= O_CREAT | O_TRUNC; + + fd = open(dfu_file_entry->filename, flags); + if (fd < 0) { + perror("open"); + dfu->dfu_state = DFU_STATE_dfuERROR; + dfu->dfu_status = DFU_STATUS_errERASE; + return; + } + + ret = erase(fd, ERASE_SIZE_ALL, 0); + close(fd); + if (ret && ret != -ENOSYS) { + perror("erase"); + dfu->dfu_state = DFU_STATE_dfuERROR; + dfu->dfu_status = DFU_STATUS_errERASE; + return; + } + + ret = copy_file(DFU_TEMPFILE, dfu_file_entry->filename, 0); + if (ret) { + pr_err("copy file failed\n"); + dfu->dfu_state = DFU_STATE_dfuERROR; + dfu->dfu_status = DFU_STATUS_errWRITE; + return; + } + + dfu->dfu_state = DFU_STATE_dfuIDLE; + dfu_do_close(dw); +} static int dfu_bind(struct usb_configuration *c, struct usb_function *f) @@ -181,7 +369,7 @@ dfu_bind(struct usb_configuration *c, struct usb_function *f) struct usb_descriptor_header **header; struct usb_interface_descriptor *desc; struct file_list_entry *fentry; - struct f_dfu *dfu = container_of(f, struct f_dfu, func); + struct f_dfu *dfu = func_to_dfu(f); int i; int status; struct usb_string *us; @@ -209,7 +397,7 @@ dfu_bind(struct usb_configuration *c, struct usb_function *f) dfu->dnreq = usb_ep_alloc_request(c->cdev->gadget->ep0); if (!dfu->dnreq) { - printf("usb_ep_alloc_request failed\n"); + pr_err("usb_ep_alloc_request failed\n"); status = -ENOMEM; goto out; } @@ -223,6 +411,10 @@ dfu_bind(struct usb_configuration *c, struct usb_function *f) goto out; } + dfu->wq.fn = dfu_do_work; + dfu->wq.cancel = dfu_work_cancel; + wq_register(&dfu->wq); + /* allocate instance-specific interface IDs, and patch descriptors */ status = usb_interface_id(c, f); if (status < 0) @@ -254,7 +446,7 @@ dfu_bind(struct usb_configuration *c, struct usb_function *f) i = 0; file_list_for_each_entry(dfu_files, fentry) { - printf("dfu: register alt%d(%s) with device %s\n", + pr_err("register alt%d(%s) with device %s\n", i, fentry->name, fentry->filename); i++; } @@ -278,6 +470,8 @@ dfu_unbind(struct usb_configuration *c, struct usb_function *f) dfu_file_entry = NULL; dfudetach = 0; + wq_unregister(&dfu->wq); + usb_free_all_descriptors(f); dma_free(dfu->dnreq->buf); @@ -320,47 +514,50 @@ static int dfu_status(struct usb_function *f, const struct usb_ctrlrequest *ctrl static void dfu_cleanup(struct f_dfu *dfu) { - struct stat s; + struct dfu_work *dw; + + pr_debug("dfu cleanup\n"); memset(&dfu_mtdinfo, 0, sizeof(dfu_mtdinfo)); dfu_written = 0; dfu_erased = 0; prog_erase = 0; - if (dfufd > 0) { - close(dfufd); - dfufd = -EINVAL; - } + dfu->dfu_state = DFU_STATE_dfuIDLE; + dfu->dfu_status = DFU_STATUS_OK; - if (!stat(DFU_TEMPFILE, &s)) - unlink(DFU_TEMPFILE); + dw = xzalloc(sizeof(*dw)); + dw->dfu = dfu; + dw->task = dfu_do_close; + wq_queue_work(&dfu->wq, &dw->work); } static void dn_complete(struct usb_ep *ep, struct usb_request *req) { struct f_dfu *dfu = req->context; - loff_t size; - int ret; + struct dfu_work *dw; + + dw = xzalloc(sizeof(*dw)); + dw->dfu = dfu; + dw->task = dfu_do_write; + dw->len = min_t(unsigned int, req->length, CONFIG_USBD_DFU_XFER_SIZE); + memcpy(dw->wbuf, req->buf, dw->len); + wq_queue_work(&dfu->wq, &dw->work); +} - if (prog_erase && (dfu_written + req->length) > dfu_erased) { - size = roundup(req->length, dfu_mtdinfo.erasesize); - ret = erase(dfufd, size, dfu_erased); - dfu_erased += size; - if (ret && ret != -ENOSYS) { - perror("erase"); - dfu->dfu_status = DFU_STATUS_errERASE; - dfu_cleanup(dfu); - return; - } - } +static int handle_manifest(struct usb_function *f, const struct usb_ctrlrequest *ctrl) +{ + struct f_dfu *dfu = func_to_dfu(f); + struct dfu_work *dw; - dfu_written += req->length; - ret = write(dfufd, req->buf, req->length); - if (ret < (int)req->length) { - perror("write"); - dfu->dfu_status = DFU_STATUS_errWRITE; - dfu_cleanup(dfu); + if (dfu_file_entry->flags & FILE_LIST_FLAG_SAFE) { + dw = xzalloc(sizeof(*dw)); + dw->dfu = dfu; + dw->task = dfu_do_copy; + wq_queue_work(&dfu->wq, &dw->work); } + + return 0; } static int handle_dnload(struct usb_function *f, const struct usb_ctrlrequest *ctrl) @@ -370,12 +567,8 @@ static int handle_dnload(struct usb_function *f, const struct usb_ctrlrequest *c u16 w_length = le16_to_cpu(ctrl->wLength); if (w_length == 0) { - if (dfu_file_entry->flags & FILE_LIST_FLAG_SAFE) { - dfu->dfu_state = DFU_STATE_dfuMANIFEST; - } else { - dfu->dfu_state = DFU_STATE_dfuIDLE; - dfu_cleanup(dfu); - } + handle_manifest(f, ctrl); + dfu->dfu_state = DFU_STATE_dfuMANIFEST; return 0; } @@ -386,53 +579,6 @@ static int handle_dnload(struct usb_function *f, const struct usb_ctrlrequest *c return 0; } -static int handle_manifest(struct usb_function *f, const struct usb_ctrlrequest *ctrl) -{ - struct f_dfu *dfu = func_to_dfu(f); - int ret; - - dfu->dfu_state = DFU_STATE_dfuIDLE; - - if (dfu_file_entry->flags & FILE_LIST_FLAG_SAFE) { - int fd; - unsigned flags = O_WRONLY; - - if (dfu_file_entry->flags & FILE_LIST_FLAG_CREATE) - flags |= O_CREAT | O_TRUNC; - - fd = open(dfu_file_entry->filename, flags); - if (fd < 0) { - perror("open"); - dfu->dfu_status = DFU_STATUS_errERASE; - ret = -EINVAL; - goto out; - } - - ret = erase(fd, ERASE_SIZE_ALL, 0); - close(fd); - if (ret && ret != -ENOSYS) { - dfu->dfu_status = DFU_STATUS_errERASE; - perror("erase"); - goto out; - } - - ret = copy_file(DFU_TEMPFILE, dfu_file_entry->filename, 0); - if (ret) { - printf("copy file failed\n"); - ret = -EINVAL; - goto out; - } - } - - return 0; - -out: - dfu->dfu_status = DFU_STATUS_errWRITE; - dfu->dfu_state = DFU_STATE_dfuERROR; - dfu_cleanup(dfu); - return ret; -} - static void up_complete(struct usb_ep *ep, struct usb_request *req) { } @@ -440,28 +586,22 @@ static void up_complete(struct usb_ep *ep, struct usb_request *req) static int handle_upload(struct usb_function *f, const struct usb_ctrlrequest *ctrl) { struct f_dfu *dfu = func_to_dfu(f); - struct usb_composite_dev *cdev = f->config->cdev; + struct dfu_work *dw; u16 w_length = le16_to_cpu(ctrl->wLength); - int len; - - len = read(dfufd, dfu->dnreq->buf, w_length); - dfu->dnreq->length = len; - if (len < w_length) { - dfu_cleanup(dfu); - dfu->dfu_state = DFU_STATE_dfuIDLE; - } - - dfu->dnreq->complete = up_complete; - usb_ep_queue(cdev->gadget->ep0, dfu->dnreq); + dw = xzalloc(sizeof(*dw)); + dw->dfu = dfu; + dw->task = dfu_do_read; + dw->len = w_length; + dw->rbuf = dfu->dnreq->buf; + wq_queue_work(&dfu->wq, &dw->work); return 0; } static void dfu_abort(struct f_dfu *dfu) { - dfu->dfu_state = DFU_STATE_dfuIDLE; - dfu->dfu_status = DFU_STATUS_OK; + wq_cancel_work(&dfu->wq); dfu_cleanup(dfu); } @@ -474,7 +614,7 @@ static int dfu_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) int value = -EOPNOTSUPP; int w_length = le16_to_cpu(ctrl->wLength); int w_value = le16_to_cpu(ctrl->wValue); - int ret; + struct dfu_work *dw; if (ctrl->bRequestType == USB_DIR_IN && ctrl->bRequest == USB_REQ_GET_DESCRIPTOR && (w_value >> 8) == 0x21) { @@ -500,46 +640,28 @@ static int dfu_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) value = -EINVAL; goto out; } - debug("dfu: starting download to %s\n", dfu_file_entry->filename); - if (dfu_file_entry->flags & FILE_LIST_FLAG_SAFE) { - dfufd = open(DFU_TEMPFILE, O_WRONLY | O_CREAT); - } else { - unsigned flags = O_WRONLY; - - if (dfu_file_entry->flags & FILE_LIST_FLAG_CREATE) - flags |= O_CREAT | O_TRUNC; - - dfufd = open(dfu_file_entry->filename, flags); - } - - if (dfufd < 0) { - dfu->dfu_state = DFU_STATE_dfuERROR; - perror("open"); - goto out; - } - - if (!(dfu_file_entry->flags & FILE_LIST_FLAG_SAFE)) { - ret = ioctl(dfufd, MEMGETINFO, &dfu_mtdinfo); - if (!ret) /* file is on a mtd device */ - prog_erase = 1; - } + pr_debug("starting download to %s\n", dfu_file_entry->filename); + dw = xzalloc(sizeof(*dw)); + dw->dfu = dfu; + dw->task = dfu_do_open_dnload; + wq_queue_work(&dfu->wq, &dw->work); value = handle_dnload(f, ctrl); dfu->dfu_state = DFU_STATE_dfuDNLOAD_IDLE; return 0; case USB_REQ_DFU_UPLOAD: dfu->dfu_state = DFU_STATE_dfuUPLOAD_IDLE; - debug("dfu: starting upload from %s\n", dfu_file_entry->filename); + pr_debug("starting upload from %s\n", dfu_file_entry->filename); if (!(dfu_file_entry->flags & FILE_LIST_FLAG_READBACK)) { dfu->dfu_state = DFU_STATE_dfuERROR; goto out; } - dfufd = open(dfu_file_entry->filename, O_RDONLY); - if (dfufd < 0) { - dfu->dfu_state = DFU_STATE_dfuERROR; - perror("open"); - goto out; - } + + dw = xzalloc(sizeof(*dw)); + dw->dfu = dfu; + dw->task = dfu_do_open_upload; + wq_queue_work(&dfu->wq, &dw->work); + handle_upload(f, ctrl); return 0; case USB_REQ_DFU_ABORT: @@ -606,6 +728,7 @@ static int dfu_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) } break; case DFU_STATE_dfuERROR: + wq_cancel_work(&dfu->wq); switch (ctrl->bRequest) { case USB_REQ_DFU_GETSTATUS: value = dfu_status(f, ctrl); @@ -647,10 +770,7 @@ static int dfu_setup(struct usb_function *f, const struct usb_ctrlrequest *ctrl) } break; case DFU_STATE_dfuMANIFEST: - value = handle_manifest(f, ctrl); - if (dfu->dfu_state != DFU_STATE_dfuIDLE) { - return 0; - } + dfu->dfu_state = DFU_STATE_dfuMANIFEST_SYNC; switch (ctrl->bRequest) { case USB_REQ_DFU_GETSTATUS: value = dfu_status(f, ctrl); @@ -692,9 +812,7 @@ static void dfu_disable(struct usb_function *f) { struct f_dfu *dfu = func_to_dfu(f); - dfu->dfu_state = DFU_STATE_dfuIDLE; - - dfu_cleanup(dfu); + dfu_abort(dfu); } #define STRING_MANUFACTURER_IDX 0 @@ -863,7 +981,7 @@ out: static void dfu_free_func(struct usb_function *f) { - struct f_dfu *dfu = container_of(f, struct f_dfu, func); + struct f_dfu *dfu = func_to_dfu(f); free(dfu); } diff --git a/drivers/usb/otg/otgdev.c b/drivers/usb/otg/otgdev.c index 52f43b75d2..c233315d91 100644 --- a/drivers/usb/otg/otgdev.c +++ b/drivers/usb/otg/otgdev.c @@ -4,28 +4,33 @@ #include <driver.h> #include <usb/usb.h> -static int (*set_mode_callback)(void *ctx, enum usb_dr_mode mode); -static unsigned int otg_mode; +struct otg_mode { + struct device_d dev; + unsigned int var_mode; + unsigned int cur_mode; + int (*set_mode_callback)(void *ctx, enum usb_dr_mode mode); + void *ctx; +}; static int otg_set_mode(struct param_d *param, void *ctx) { - static int cur_mode = USB_DR_MODE_OTG; + struct otg_mode *otg = ctx; int ret; - if (otg_mode == USB_DR_MODE_UNKNOWN) + if (otg->var_mode == USB_DR_MODE_UNKNOWN) return -EINVAL; - if (otg_mode == cur_mode) + if (otg->var_mode == otg->cur_mode) return 0; - if (cur_mode != USB_DR_MODE_OTG) + if (otg->cur_mode != USB_DR_MODE_OTG) return -EBUSY; - ret = set_mode_callback(ctx, otg_mode); + ret = otg->set_mode_callback(otg->ctx, otg->var_mode); if (ret) return ret; - cur_mode = otg_mode; + otg->cur_mode = otg->var_mode; return 0; } @@ -47,20 +52,38 @@ int usb_register_otg_device(struct device_d *parent, { int ret; struct param_d *param_mode; - - if (otg_device.parent) - return -EBUSY; - - otg_device.parent = parent; - set_mode_callback = set_mode; - otg_mode = USB_DR_MODE_OTG; - - ret = register_device(&otg_device); + struct otg_mode *otg; + + otg = xzalloc(sizeof(*otg)); + otg->dev.priv = otg; + otg->dev.parent = parent; + otg->dev.id = DEVICE_ID_DYNAMIC; + dev_set_name(&otg->dev, "otg"); + + otg->var_mode = USB_DR_MODE_OTG; + otg->cur_mode = USB_DR_MODE_OTG; + otg->set_mode_callback = set_mode; + otg->ctx = ctx; + + /* register otg.mode as an alias of otg0.mode */ + if (otg_device.parent == NULL) { + otg_device.parent = parent; + ret = register_device(&otg_device); + if (ret) + return ret; + + param_mode = dev_add_param_enum(&otg_device, "mode", + otg_set_mode, NULL, &otg->var_mode, + otg_mode_names, ARRAY_SIZE(otg_mode_names), otg); + } + + ret = register_device(&otg->dev); if (ret) return ret; - param_mode = dev_add_param_enum(&otg_device, "mode", - otg_set_mode, NULL, &otg_mode, - otg_mode_names, ARRAY_SIZE(otg_mode_names), ctx); + param_mode = dev_add_param_enum(&otg->dev, "mode", + otg_set_mode, NULL, &otg->var_mode, + otg_mode_names, ARRAY_SIZE(otg_mode_names), otg); + return PTR_ERR_OR_ZERO(param_mode); } diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c index e0ef4f5ef3..c264dd4b71 100644 --- a/drivers/usb/storage/usb.c +++ b/drivers/usb/storage/usb.c @@ -185,7 +185,7 @@ exit: } static int usb_stor_io_10(struct us_blk_dev *usb_blkdev, u8 opcode, - u32 start, u8 *data, u16 blocks) + sector_t start, u8 *data, u16 blocks) { u8 cmd[10]; @@ -206,7 +206,7 @@ static int usb_stor_io_10(struct us_blk_dev *usb_blkdev, u8 opcode, /* Read / write a chunk of sectors on media */ static int usb_stor_blk_io(struct block_device *disk_dev, - int sector_start, int sector_count, void *buffer, + sector_t sector_start, blkcnt_t sector_count, void *buffer, bool read) { struct us_blk_dev *pblk_dev = container_of(disk_dev, @@ -223,18 +223,18 @@ static int usb_stor_blk_io(struct block_device *disk_dev, } /* read / write the requested data */ - dev_dbg(dev, "%s %u block(s), starting from %d\n", + dev_dbg(dev, "%s %llu block(s), starting from %llu\n", read ? "Read" : "Write", sector_count, sector_start); while (sector_count > 0) { - unsigned n = min(sector_count, US_MAX_IO_BLK); + u16 n = min_t(blkcnt_t, sector_count, US_MAX_IO_BLK); if (usb_stor_io_10(pblk_dev, read ? SCSI_READ10 : SCSI_WRITE10, sector_start, buffer, n)) { - dev_dbg(dev, "I/O error at sector %d\n", sector_start); + dev_dbg(dev, "I/O error at sector %llu\n", sector_start); break; } sector_start += n; @@ -247,14 +247,14 @@ static int usb_stor_blk_io(struct block_device *disk_dev, /* Write a chunk of sectors to media */ static int __maybe_unused usb_stor_blk_write(struct block_device *blk, - const void *buffer, int block, int num_blocks) + const void *buffer, sector_t block, blkcnt_t num_blocks) { return usb_stor_blk_io(blk, block, num_blocks, (void *)buffer, false); } /* Read a chunk of sectors from media */ -static int usb_stor_blk_read(struct block_device *blk, void *buffer, int block, - int num_blocks) +static int usb_stor_blk_read(struct block_device *blk, void *buffer, sector_t block, + blkcnt_t num_blocks) { return usb_stor_blk_io(blk, block, num_blocks, buffer, true); } @@ -305,17 +305,18 @@ static int usb_stor_init_blkdev(struct us_blk_dev *pblk_dev) return result; } - if (last_lba > INT_MAX - 1) { - last_lba = INT_MAX - 1; + if (last_lba == U32_MAX) { + last_lba = U32_MAX - 1; dev_warn(dev, - "Limiting device size due to 31 bit contraints\n"); + "Limiting device size due to 32 bit constraints\n"); + /* To support LBA >= U32_MAX, a READ CAPACITY (16) should be issued here */ } pblk_dev->blk.num_blocks = last_lba + 1; if (block_length != SECTOR_SIZE) pr_warn("Support only %d bytes sectors\n", SECTOR_SIZE); pblk_dev->blk.blockbits = SECTOR_SHIFT; - dev_dbg(dev, "Capacity = 0x%x, blockshift = 0x%x\n", + dev_dbg(dev, "Capacity = 0x%llx, blockshift = 0x%x\n", pblk_dev->blk.num_blocks, pblk_dev->blk.blockbits); return 0; diff --git a/drivers/video/backlight-pwm.c b/drivers/video/backlight-pwm.c index cae016be8f..4410c7d047 100644 --- a/drivers/video/backlight-pwm.c +++ b/drivers/video/backlight-pwm.c @@ -24,7 +24,7 @@ #include <regulator.h> #include <gpio.h> #include <of_gpio.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> struct pwm_backlight { struct backlight_device backlight; diff --git a/drivers/video/imx-ipu-fb.c b/drivers/video/imx-ipu-fb.c index 18171bdd81..a3f195373b 100644 --- a/drivers/video/imx-ipu-fb.c +++ b/drivers/video/imx-ipu-fb.c @@ -23,7 +23,7 @@ #include <mach/imxfb.h> #include <malloc.h> #include <errno.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <mmu.h> #include <mach/imx-ipu-fb.h> #include <linux/clk.h> diff --git a/drivers/video/imx-ipu-v3/imx-hdmi.c b/drivers/video/imx-ipu-v3/imx-hdmi.c index 1e55c97d24..589ef5e32d 100644 --- a/drivers/video/imx-ipu-v3/imx-hdmi.c +++ b/drivers/video/imx-ipu-v3/imx-hdmi.c @@ -19,7 +19,7 @@ #include <init.h> #include <linux/clk.h> #include <linux/err.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <linux/clk.h> #include <i2c/i2c.h> #include <video/media-bus-format.h> diff --git a/drivers/video/imx-ipu-v3/imx-ldb.c b/drivers/video/imx-ipu-v3/imx-ldb.c index d7793bdc0e..1316237161 100644 --- a/drivers/video/imx-ipu-v3/imx-ldb.c +++ b/drivers/video/imx-ipu-v3/imx-ldb.c @@ -31,7 +31,7 @@ #include <mfd/imx6q-iomuxc-gpr.h> #include <linux/clk.h> #include <linux/err.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <linux/clk.h> #include <mach/imx6-regs.h> #include <mach/imx53-regs.h> diff --git a/drivers/video/imx-ipu-v3/ipu-di.c b/drivers/video/imx-ipu-v3/ipu-di.c index b4302412e0..97613207c9 100644 --- a/drivers/video/imx-ipu-v3/ipu-di.c +++ b/drivers/video/imx-ipu-v3/ipu-di.c @@ -15,7 +15,7 @@ #include <common.h> #include <linux/err.h> #include <linux/clk.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <malloc.h> #include "imx-ipu-v3.h" diff --git a/drivers/video/imx-ipu-v3/ipufb.c b/drivers/video/imx-ipu-v3/ipufb.c index dd54d9df31..0b53916434 100644 --- a/drivers/video/imx-ipu-v3/ipufb.c +++ b/drivers/video/imx-ipu-v3/ipufb.c @@ -22,7 +22,7 @@ #include <of_graph.h> #include <linux/clk.h> #include <linux/err.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <video/media-bus-format.h> #include "imx-ipu-v3.h" diff --git a/drivers/video/imx.c b/drivers/video/imx.c index d15c2d88fb..e93859775a 100644 --- a/drivers/video/imx.c +++ b/drivers/video/imx.c @@ -25,7 +25,7 @@ #include <linux/clk.h> #include <linux/err.h> #include <linux/sizes.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #define LCDC_SSA 0x00 diff --git a/drivers/video/pxa.c b/drivers/video/pxa.c index d444e0981f..a2ff4bce2a 100644 --- a/drivers/video/pxa.c +++ b/drivers/video/pxa.c @@ -38,7 +38,7 @@ #include <mach/pxafb.h> #include <asm/io.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> /* PXA LCD DMA descriptor */ struct pxafb_dma_descriptor { diff --git a/drivers/video/tc358767.c b/drivers/video/tc358767.c index e64dde1ddf..2a0fa8b368 100644 --- a/drivers/video/tc358767.c +++ b/drivers/video/tc358767.c @@ -31,7 +31,7 @@ #include <of_gpio.h> #include <video/media-bus-format.h> #include <video/vpl.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #define DP_LINK_BW_SET 0x100 #define DP_ENHANCED_FRAME_EN (1 << 7) @@ -1191,8 +1191,7 @@ static int tc_read_edid(struct tc_data *tc) #ifdef DEBUG printk(KERN_DEBUG "eDP display EDID:\n"); - print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1, tc->edid, - EDID_LENGTH, true); + print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, tc->edid, EDID_LENGTH); #endif return 0; diff --git a/drivers/watchdog/stpmic1_wdt.c b/drivers/watchdog/stpmic1_wdt.c index 12280f1447..105ba39fb7 100644 --- a/drivers/watchdog/stpmic1_wdt.c +++ b/drivers/watchdog/stpmic1_wdt.c @@ -174,10 +174,6 @@ static int stpmic1_wdt_probe(struct device_d *dev) wdd->set_timeout = stpmic1_wdt_set_timeout; wdd->timeout_max = PMIC_WDT_MAX_TIMEOUT; - /* have the watchdog reset, not power-off the system */ - regmap_write_bits(wdt->regmap, SWOFF_PWRCTRL_CR, - RESTART_REQUEST_ENABLED, RESTART_REQUEST_ENABLED); - ret = watchdog_register(wdd); if (ret) { dev_err(dev, "Failed to register watchdog device\n"); diff --git a/drivers/watchdog/wd_core.c b/drivers/watchdog/wd_core.c index 643c53268f..4b0ee31d5b 100644 --- a/drivers/watchdog/wd_core.c +++ b/drivers/watchdog/wd_core.c @@ -54,6 +54,9 @@ int watchdog_set_timeout(struct watchdog *wd, unsigned timeout) if (ret) return ret; + wd->last_ping = get_time_ns(); + wd->timeout_cur = timeout; + wd->running = timeout ? WDOG_HW_RUNNING : WDOG_HW_NOT_RUNNING; return 0; @@ -155,6 +158,25 @@ static unsigned int dev_get_watchdog_priority(struct device_d *dev) return priority; } +static int seconds_to_expire_get(struct param_d *p, void *priv) +{ + struct watchdog *wd = priv; + uint64_t diff; + + if (!wd->timeout_cur) { + wd->seconds_to_expire = -1; + return 0; + } + + diff = get_time_ns() - wd->last_ping; + + do_div(diff, 1000000000); + + wd->seconds_to_expire = wd->timeout_cur - diff; + + return 0; +} + int watchdog_register(struct watchdog *wd) { struct param_d *p; @@ -218,6 +240,13 @@ int watchdog_register(struct watchdog *wd) goto error_unregister; } + p = dev_add_param_uint32(&wd->dev, "seconds_to_expire", param_set_readonly, + seconds_to_expire_get, &wd->seconds_to_expire, "%d", wd); + if (IS_ERR(p)) { + ret = PTR_ERR(p); + goto error_unregister; + } + list_add_tail(&wd->list, &watchdog_list); pr_debug("registering watchdog %s with priority %d\n", watchdog_name(wd), diff --git a/dts/Bindings/arm/cpus.yaml b/dts/Bindings/arm/cpus.yaml index 14cd727d3c..f02fd10de6 100644 --- a/dts/Bindings/arm/cpus.yaml +++ b/dts/Bindings/arm/cpus.yaml @@ -232,7 +232,6 @@ properties: by this cpu (see ./idle-states.yaml). capacity-dmips-mhz: - $ref: '/schemas/types.yaml#/definitions/uint32' description: u32 value representing CPU capacity (see ./cpu-capacity.txt) in DMIPS/MHz, relative to highest capacity-dmips-mhz diff --git a/dts/Bindings/display/bridge/sii902x.txt b/dts/Bindings/display/bridge/sii902x.txt index 02c21b5847..3bc760cc31 100644 --- a/dts/Bindings/display/bridge/sii902x.txt +++ b/dts/Bindings/display/bridge/sii902x.txt @@ -40,7 +40,7 @@ Optional properties: documents on how to describe the way the sii902x device is connected to the rest of the audio system: Documentation/devicetree/bindings/sound/simple-card.yaml - Documentation/devicetree/bindings/sound/audio-graph-card.txt + Documentation/devicetree/bindings/sound/audio-graph-card.yaml Note: In case of the audio-graph-card binding the used port index should be 3. diff --git a/dts/Bindings/display/mediatek/mediatek,disp.txt b/dts/Bindings/display/mediatek/mediatek,disp.txt index 33977e15be..ed76332ec0 100644 --- a/dts/Bindings/display/mediatek/mediatek,disp.txt +++ b/dts/Bindings/display/mediatek/mediatek,disp.txt @@ -23,7 +23,7 @@ connected to. For a description of the display interface sink function blocks, see Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt and -Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt. +Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml. Required properties (all function blocks): - compatible: "mediatek,<chip>-disp-<function>", one of @@ -61,7 +61,7 @@ Required properties (DMA function blocks): "mediatek,<chip>-disp-wdma" the supported chips are mt2701, mt8167 and mt8173. - larb: Should contain a phandle pointing to the local arbiter device as defined - in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml - iommus: Should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details. diff --git a/dts/Bindings/extcon/wlf,arizona.yaml b/dts/Bindings/extcon/wlf,arizona.yaml index 5fe784f487..efdf59abb2 100644 --- a/dts/Bindings/extcon/wlf,arizona.yaml +++ b/dts/Bindings/extcon/wlf,arizona.yaml @@ -85,7 +85,6 @@ properties: wlf,micd-timeout-ms: description: Timeout for microphone detection, specified in milliseconds. - $ref: "/schemas/types.yaml#/definitions/uint32" wlf,micd-force-micbias: description: diff --git a/dts/Bindings/hwmon/adi,ltc2947.yaml b/dts/Bindings/hwmon/adi,ltc2947.yaml index eef614962b..bf04151b63 100644 --- a/dts/Bindings/hwmon/adi,ltc2947.yaml +++ b/dts/Bindings/hwmon/adi,ltc2947.yaml @@ -49,7 +49,6 @@ properties: description: This property controls the Accumulation Dead band which allows to set the level of current below which no accumulation takes place. - $ref: /schemas/types.yaml#/definitions/uint32 maximum: 255 default: 0 diff --git a/dts/Bindings/hwmon/baikal,bt1-pvt.yaml b/dts/Bindings/hwmon/baikal,bt1-pvt.yaml index 00a6511354..5d3ce641fc 100644 --- a/dts/Bindings/hwmon/baikal,bt1-pvt.yaml +++ b/dts/Bindings/hwmon/baikal,bt1-pvt.yaml @@ -73,11 +73,9 @@ properties: description: | Temperature sensor trimming factor. It can be used to manually adjust the temperature measurements within 7.130 degrees Celsius. - maxItems: 1 - items: - default: 0 - minimum: 0 - maximum: 7130 + default: 0 + minimum: 0 + maximum: 7130 additionalProperties: false diff --git a/dts/Bindings/hwmon/ti,tmp513.yaml b/dts/Bindings/hwmon/ti,tmp513.yaml index 8020d739a0..1502b22c77 100644 --- a/dts/Bindings/hwmon/ti,tmp513.yaml +++ b/dts/Bindings/hwmon/ti,tmp513.yaml @@ -52,7 +52,6 @@ properties: ti,bus-range-microvolt: description: | This is the operating range of the bus voltage in microvolt - $ref: /schemas/types.yaml#/definitions/uint32 enum: [16000000, 32000000] default: 32000000 diff --git a/dts/Bindings/i2c/i2c-gpio.yaml b/dts/Bindings/i2c/i2c-gpio.yaml index cc3aa2a5e7..ff99344788 100644 --- a/dts/Bindings/i2c/i2c-gpio.yaml +++ b/dts/Bindings/i2c/i2c-gpio.yaml @@ -39,11 +39,9 @@ properties: i2c-gpio,delay-us: description: delay between GPIO operations (may depend on each platform) - $ref: /schemas/types.yaml#/definitions/uint32 i2c-gpio,timeout-ms: description: timeout to get data - $ref: /schemas/types.yaml#/definitions/uint32 # Deprecated properties, do not use in new device tree sources: gpios: diff --git a/dts/Bindings/i2c/snps,designware-i2c.yaml b/dts/Bindings/i2c/snps,designware-i2c.yaml index c22b66b621..d9293c57f5 100644 --- a/dts/Bindings/i2c/snps,designware-i2c.yaml +++ b/dts/Bindings/i2c/snps,designware-i2c.yaml @@ -66,21 +66,18 @@ properties: default: 400000 i2c-sda-hold-time-ns: - maxItems: 1 description: | The property should contain the SDA hold time in nanoseconds. This option is only supported in hardware blocks version 1.11a or newer or on Microsemi SoCs. i2c-scl-falling-time-ns: - maxItems: 1 description: | The property should contain the SCL falling time in nanoseconds. This value is used to compute the tLOW period. default: 300 i2c-sda-falling-time-ns: - maxItems: 1 description: | The property should contain the SDA falling time in nanoseconds. This value is used to compute the tHIGH period. diff --git a/dts/Bindings/iio/accel/bosch,bma255.yaml b/dts/Bindings/iio/accel/bosch,bma255.yaml index 6eef3480ea..c2efbb813c 100644 --- a/dts/Bindings/iio/accel/bosch,bma255.yaml +++ b/dts/Bindings/iio/accel/bosch,bma255.yaml @@ -16,8 +16,8 @@ description: properties: compatible: enum: - - bosch,bmc150 - - bosch,bmi055 + - bosch,bmc150_accel + - bosch,bmi055_accel - bosch,bma255 - bosch,bma250e - bosch,bma222 diff --git a/dts/Bindings/iio/adc/adi,ad7192.yaml b/dts/Bindings/iio/adc/adi,ad7192.yaml index e0cc3b2e89..22b7ed3723 100644 --- a/dts/Bindings/iio/adc/adi,ad7192.yaml +++ b/dts/Bindings/iio/adc/adi,ad7192.yaml @@ -80,7 +80,7 @@ properties: type: boolean bipolar: - description: see Documentation/devicetree/bindings/iio/adc/adc.txt + description: see Documentation/devicetree/bindings/iio/adc/adc.yaml type: boolean required: diff --git a/dts/Bindings/iio/adc/maxim,max9611.yaml b/dts/Bindings/iio/adc/maxim,max9611.yaml index 9475a9e6e9..95774a5562 100644 --- a/dts/Bindings/iio/adc/maxim,max9611.yaml +++ b/dts/Bindings/iio/adc/maxim,max9611.yaml @@ -23,7 +23,6 @@ properties: maxItems: 1 shunt-resistor-micro-ohms: - $ref: /schemas/types.yaml#/definitions/uint32 description: | Value in micro Ohms of the shunt resistor connected between the RS+ and RS- inputs, across which the current is measured. Value needed to compute diff --git a/dts/Bindings/iio/adc/st,stm32-adc.yaml b/dts/Bindings/iio/adc/st,stm32-adc.yaml index 28417b31b5..517e32976c 100644 --- a/dts/Bindings/iio/adc/st,stm32-adc.yaml +++ b/dts/Bindings/iio/adc/st,stm32-adc.yaml @@ -246,7 +246,6 @@ patternProperties: Resolution (bits) to use for conversions: - can be 6, 8, 10 or 12 on stm32f4 - can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1 - $ref: /schemas/types.yaml#/definitions/uint32 st,adc-channels: description: | diff --git a/dts/Bindings/iio/adc/ti,palmas-gpadc.yaml b/dts/Bindings/iio/adc/ti,palmas-gpadc.yaml index 692dacd0fe..7b895784e0 100644 --- a/dts/Bindings/iio/adc/ti,palmas-gpadc.yaml +++ b/dts/Bindings/iio/adc/ti,palmas-gpadc.yaml @@ -42,7 +42,6 @@ properties: const: 1 ti,channel0-current-microamp: - $ref: /schemas/types.yaml#/definitions/uint32 description: Channel 0 current in uA. enum: - 0 @@ -51,7 +50,6 @@ properties: - 20 ti,channel3-current-microamp: - $ref: /schemas/types.yaml#/definitions/uint32 description: Channel 3 current in uA. enum: - 0 diff --git a/dts/Bindings/iio/dac/adi,ad5758.yaml b/dts/Bindings/iio/dac/adi,ad5758.yaml index 626ccb6fe2..fd4edca34a 100644 --- a/dts/Bindings/iio/dac/adi,ad5758.yaml +++ b/dts/Bindings/iio/dac/adi,ad5758.yaml @@ -46,31 +46,42 @@ properties: two properties must be present: adi,range-microvolt: - $ref: /schemas/types.yaml#/definitions/int32-array description: | Voltage output range specified as <minimum, maximum> - enum: - - [[0, 5000000]] - - [[0, 10000000]] - - [[-5000000, 5000000]] - - [[-10000000, 10000000]] + oneOf: + - items: + - const: 0 + - enum: [5000000, 10000000] + - items: + - const: -5000000 + - const: 5000000 + - items: + - const: -10000000 + - const: 10000000 adi,range-microamp: - $ref: /schemas/types.yaml#/definitions/int32-array description: | Current output range specified as <minimum, maximum> - enum: - - [[0, 20000]] - - [[0, 24000]] - - [[4, 24000]] - - [[-20000, 20000]] - - [[-24000, 24000]] - - [[-1000, 22000]] + oneOf: + - items: + - const: 0 + - enum: [20000, 24000] + - items: + - const: 4 + - const: 24000 + - items: + - const: -20000 + - const: 20000 + - items: + - const: -24000 + - const: 24000 + - items: + - const: -1000 + - const: 22000 reset-gpios: true adi,dc-dc-ilim-microamp: - $ref: /schemas/types.yaml#/definitions/uint32 enum: [150000, 200000, 250000, 300000, 350000, 400000] description: | The dc-to-dc converter current limit. diff --git a/dts/Bindings/iio/health/maxim,max30100.yaml b/dts/Bindings/iio/health/maxim,max30100.yaml index 64b8626370..967778fb0c 100644 --- a/dts/Bindings/iio/health/maxim,max30100.yaml +++ b/dts/Bindings/iio/health/maxim,max30100.yaml @@ -21,7 +21,6 @@ properties: description: Connected to ADC_RDY pin. maxim,led-current-microamp: - $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 2 maxItems: 2 description: | diff --git a/dts/Bindings/input/adc-keys.txt b/dts/Bindings/input/adc-keys.txt index e551814629..6c8be6a9ac 100644 --- a/dts/Bindings/input/adc-keys.txt +++ b/dts/Bindings/input/adc-keys.txt @@ -5,7 +5,8 @@ Required properties: - compatible: "adc-keys" - io-channels: Phandle to an ADC channel - io-channel-names = "buttons"; - - keyup-threshold-microvolt: Voltage at which all the keys are considered up. + - keyup-threshold-microvolt: Voltage above or equal to which all the keys are + considered up. Optional properties: - poll-interval: Poll interval time in milliseconds @@ -17,7 +18,12 @@ Each button (key) is represented as a sub-node of "adc-keys": Required subnode-properties: - label: Descriptive name of the key. - linux,code: Keycode to emit. - - press-threshold-microvolt: Voltage ADC input when this key is pressed. + - press-threshold-microvolt: voltage above or equal to which this key is + considered pressed. + +No two values of press-threshold-microvolt may be the same. +All values of press-threshold-microvolt must be less than +keyup-threshold-microvolt. Example: @@ -47,3 +53,15 @@ Example: press-threshold-microvolt = <500000>; }; }; + ++--------------------------------+------------------------+ +| 2.000.000 <= value | no key pressed | ++--------------------------------+------------------------+ +| 1.500.000 <= value < 2.000.000 | KEY_VOLUMEUP pressed | ++--------------------------------+------------------------+ +| 1.000.000 <= value < 1.500.000 | KEY_VOLUMEDOWN pressed | ++--------------------------------+------------------------+ +| 500.000 <= value < 1.000.000 | KEY_ENTER pressed | ++--------------------------------+------------------------+ +| value < 500.000 | no key pressed | ++--------------------------------+------------------------+ diff --git a/dts/Bindings/input/touchscreen/goodix.yaml b/dts/Bindings/input/touchscreen/goodix.yaml index da5b0d87e1..93f2ce3130 100644 --- a/dts/Bindings/input/touchscreen/goodix.yaml +++ b/dts/Bindings/input/touchscreen/goodix.yaml @@ -26,6 +26,7 @@ properties: - goodix,gt927 - goodix,gt9271 - goodix,gt928 + - goodix,gt9286 - goodix,gt967 reg: diff --git a/dts/Bindings/input/touchscreen/touchscreen.yaml b/dts/Bindings/input/touchscreen/touchscreen.yaml index a771a15f05..046ace461c 100644 --- a/dts/Bindings/input/touchscreen/touchscreen.yaml +++ b/dts/Bindings/input/touchscreen/touchscreen.yaml @@ -70,11 +70,9 @@ properties: touchscreen-x-mm: description: horizontal length in mm of the touchscreen - $ref: /schemas/types.yaml#/definitions/uint32 touchscreen-y-mm: description: vertical length in mm of the touchscreen - $ref: /schemas/types.yaml#/definitions/uint32 dependencies: touchscreen-size-x: [ touchscreen-size-y ] diff --git a/dts/Bindings/leds/richtek,rt8515.yaml b/dts/Bindings/leds/richtek,rt8515.yaml new file mode 100644 index 0000000000..68c328eec0 --- /dev/null +++ b/dts/Bindings/leds/richtek,rt8515.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/richtek,rt8515.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT8515 1.5A dual channel LED driver + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +description: | + The Richtek RT8515 is a dual channel (two mode) LED driver that + supports driving a white LED in flash or torch mode. The maximum + current for each mode is defined in hardware using two resistors + RFS and RTS. + +properties: + compatible: + const: richtek,rt8515 + + enf-gpios: + maxItems: 1 + description: A connection to the 'ENF' (enable flash) pin. + + ent-gpios: + maxItems: 1 + description: A connection to the 'ENT' (enable torch) pin. + + richtek,rfs-ohms: + minimum: 7680 + maximum: 367000 + description: The resistance value of the RFS resistor. This + resistors limits the maximum flash current. This must be set + for the property flash-max-microamp to work, the RFS resistor + defines the range of the dimmer setting (brightness) of the + flash LED. + + richtek,rts-ohms: + minimum: 7680 + maximum: 367000 + description: The resistance value of the RTS resistor. This + resistors limits the maximum torch current. This must be set + for the property torch-max-microamp to work, the RTS resistor + defines the range of the dimmer setting (brightness) of the + torch LED. + + led: + type: object + $ref: common.yaml# + properties: + function: true + color: true + flash-max-timeout-us: true + + flash-max-microamp: + maximum: 700000 + description: The maximum current for flash mode + is hardwired to the component using the RFS resistor to + ground. The maximum hardware current setting is calculated + according to the formula Imax = 5500 / RFS. The lowest + allowed resistance value is 7.86 kOhm giving an absolute + maximum current of 700mA. By setting this attribute in + the device tree, you can further restrict the maximum + current below the hardware limit. This requires the RFS + to be defined as it defines the maximum range. + + led-max-microamp: + maximum: 700000 + description: The maximum current for torch mode + is hardwired to the component using the RTS resistor to + ground. The maximum hardware current setting is calculated + according to the formula Imax = 5500 / RTS. The lowest + allowed resistance value is 7.86 kOhm giving an absolute + maximum current of 700mA. By setting this attribute in + the device tree, you can further restrict the maximum + current below the hardware limit. This requires the RTS + to be defined as it defines the maximum range. + + additionalProperties: false + +required: + - compatible + - ent-gpios + - enf-gpios + - led + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/leds/common.h> + + led-controller { + compatible = "richtek,rt8515"; + enf-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; + ent-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; + richtek,rfs-ohms = <16000>; + richtek,rts-ohms = <100000>; + + led { + function = LED_FUNCTION_FLASH; + color = <LED_COLOR_ID_WHITE>; + flash-max-timeout-us = <250000>; + flash-max-microamp = <150000>; + led-max-microamp = <25000>; + }; + }; + +... diff --git a/dts/Bindings/media/mediatek-jpeg-decoder.txt b/dts/Bindings/media/mediatek-jpeg-decoder.txt index 044b11913c..cf60c5acc0 100644 --- a/dts/Bindings/media/mediatek-jpeg-decoder.txt +++ b/dts/Bindings/media/mediatek-jpeg-decoder.txt @@ -16,7 +16,7 @@ Required properties: - power-domains: a phandle to the power domain, see Documentation/devicetree/bindings/power/power_domain.txt for details. - mediatek,larb: must contain the local arbiters in the current Socs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml for details. - iommus: should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt diff --git a/dts/Bindings/media/mediatek-jpeg-encoder.txt b/dts/Bindings/media/mediatek-jpeg-encoder.txt index 736be7cad3..acfb50375b 100644 --- a/dts/Bindings/media/mediatek-jpeg-encoder.txt +++ b/dts/Bindings/media/mediatek-jpeg-encoder.txt @@ -14,7 +14,7 @@ Required properties: - power-domains: a phandle to the power domain, see Documentation/devicetree/bindings/power/power_domain.txt for details. - mediatek,larb: must contain the local arbiters in the current SoCs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml for details. - iommus: should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt diff --git a/dts/Bindings/media/mediatek-mdp.txt b/dts/Bindings/media/mediatek-mdp.txt index 0d03e3ae2b..f4798d04e9 100644 --- a/dts/Bindings/media/mediatek-mdp.txt +++ b/dts/Bindings/media/mediatek-mdp.txt @@ -28,7 +28,7 @@ Required properties (DMA function blocks, child node): argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details. - mediatek,larb: must contain the local arbiters in the current Socs, see - Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml for details. Example: diff --git a/dts/Bindings/mmc/mmc-controller.yaml b/dts/Bindings/mmc/mmc-controller.yaml index 186f04ba93..e674bba52e 100644 --- a/dts/Bindings/mmc/mmc-controller.yaml +++ b/dts/Bindings/mmc/mmc-controller.yaml @@ -259,7 +259,6 @@ properties: waiting for I/O signalling and card power supply to be stable, regardless of whether pwrseq-simple is used. Default to 10ms if no available. - $ref: /schemas/types.yaml#/definitions/uint32 default: 10 supports-cqe: diff --git a/dts/Bindings/mmc/mmc-pwrseq-simple.yaml b/dts/Bindings/mmc/mmc-pwrseq-simple.yaml index 6cd57863c1..226fb19191 100644 --- a/dts/Bindings/mmc/mmc-pwrseq-simple.yaml +++ b/dts/Bindings/mmc/mmc-pwrseq-simple.yaml @@ -41,13 +41,11 @@ properties: description: Delay in ms after powering the card and de-asserting the reset-gpios (if any). - $ref: /schemas/types.yaml#/definitions/uint32 power-off-delay-us: description: Delay in us after asserting the reset-gpios (if any) during power off of the card. - $ref: /schemas/types.yaml#/definitions/uint32 required: - compatible diff --git a/dts/Bindings/net/ethernet-controller.yaml b/dts/Bindings/net/ethernet-controller.yaml index 0965f6515f..dac4aadb6e 100644 --- a/dts/Bindings/net/ethernet-controller.yaml +++ b/dts/Bindings/net/ethernet-controller.yaml @@ -122,7 +122,6 @@ properties: such as flow control thresholds. rx-internal-delay-ps: - $ref: /schemas/types.yaml#/definitions/uint32 description: | RGMII Receive Clock Delay defined in pico seconds. This is used for controllers that have configurable RX internal delays. @@ -140,7 +139,6 @@ properties: is used for components that can have configurable fifo sizes. tx-internal-delay-ps: - $ref: /schemas/types.yaml#/definitions/uint32 description: | RGMII Transmit Clock Delay defined in pico seconds. This is used for controllers that have configurable TX internal delays. diff --git a/dts/Bindings/net/renesas,etheravb.yaml b/dts/Bindings/net/renesas,etheravb.yaml index 244befb640..de9dd574a2 100644 --- a/dts/Bindings/net/renesas,etheravb.yaml +++ b/dts/Bindings/net/renesas,etheravb.yaml @@ -163,6 +163,7 @@ allOf: enum: - renesas,etheravb-r8a774a1 - renesas,etheravb-r8a774b1 + - renesas,etheravb-r8a774e1 - renesas,etheravb-r8a7795 - renesas,etheravb-r8a7796 - renesas,etheravb-r8a77961 diff --git a/dts/Bindings/net/snps,dwmac.yaml b/dts/Bindings/net/snps,dwmac.yaml index b2f6083f55..0642b0f594 100644 --- a/dts/Bindings/net/snps,dwmac.yaml +++ b/dts/Bindings/net/snps,dwmac.yaml @@ -161,7 +161,8 @@ properties: * snps,route-dcbcp, DCB Control Packets * snps,route-up, Untagged Packets * snps,route-multi-broad, Multicast & Broadcast Packets - * snps,priority, RX queue priority (Range 0x0 to 0xF) + * snps,priority, bitmask of the tagged frames priorities assigned to + the queue snps,mtl-tx-config: $ref: /schemas/types.yaml#/definitions/phandle @@ -188,7 +189,10 @@ properties: * snps,idle_slope, unlock on WoL * snps,high_credit, max write outstanding req. limit * snps,low_credit, max read outstanding req. limit - * snps,priority, TX queue priority (Range 0x0 to 0xF) + * snps,priority, bitmask of the priorities assigned to the queue. + When a PFC frame is received with priorities matching the bitmask, + the queue is blocked from transmitting for the pause time specified + in the PFC frame. snps,reset-gpio: deprecated: true @@ -208,7 +212,6 @@ properties: Triplet of delays. The 1st cell is reset pre-delay in micro seconds. The 2nd cell is reset pulse in micro seconds. The 3rd cell is reset post-delay in micro seconds. - $ref: /schemas/types.yaml#/definitions/uint32-array minItems: 3 maxItems: 3 diff --git a/dts/Bindings/power/supply/battery.yaml b/dts/Bindings/power/supply/battery.yaml index 0c7e2e4479..c3b4b75435 100644 --- a/dts/Bindings/power/supply/battery.yaml +++ b/dts/Bindings/power/supply/battery.yaml @@ -83,21 +83,18 @@ properties: for each of the battery capacity lookup table. operating-range-celsius: - $ref: /schemas/types.yaml#/definitions/uint32-array description: operating temperature range of a battery items: - description: minimum temperature at which battery can operate - description: maximum temperature at which battery can operate ambient-celsius: - $ref: /schemas/types.yaml#/definitions/uint32-array description: safe range of ambient temperature items: - description: alert when ambient temperature is lower than this value - description: alert when ambient temperature is higher than this value alert-celsius: - $ref: /schemas/types.yaml#/definitions/uint32-array description: safe range of battery temperature items: - description: alert when battery temperature is lower than this value diff --git a/dts/Bindings/power/supply/bq2515x.yaml b/dts/Bindings/power/supply/bq2515x.yaml index 75a56773be..813d6afde6 100644 --- a/dts/Bindings/power/supply/bq2515x.yaml +++ b/dts/Bindings/power/supply/bq2515x.yaml @@ -50,7 +50,6 @@ properties: maxItems: 1 input-current-limit-microamp: - $ref: /schemas/types.yaml#/definitions/uint32 description: Maximum input current in micro Amps. minimum: 50000 maximum: 500000 diff --git a/dts/Bindings/regulator/dlg,da9121.yaml b/dts/Bindings/regulator/dlg,da9121.yaml index 6f2164f7bc..228018c87b 100644 --- a/dts/Bindings/regulator/dlg,da9121.yaml +++ b/dts/Bindings/regulator/dlg,da9121.yaml @@ -62,7 +62,6 @@ properties: description: IRQ line information. dlg,irq-polling-delay-passive-ms: - $ref: "/schemas/types.yaml#/definitions/uint32" minimum: 1000 maximum: 10000 description: | diff --git a/dts/Bindings/regulator/fixed-regulator.yaml b/dts/Bindings/regulator/fixed-regulator.yaml index d3d0dc13dd..8850c01bd4 100644 --- a/dts/Bindings/regulator/fixed-regulator.yaml +++ b/dts/Bindings/regulator/fixed-regulator.yaml @@ -72,11 +72,9 @@ properties: startup-delay-us: description: startup time in microseconds - $ref: /schemas/types.yaml#/definitions/uint32 off-on-delay-us: description: off delay time in microseconds - $ref: /schemas/types.yaml#/definitions/uint32 enable-active-high: description: diff --git a/dts/Bindings/rtc/rtc.yaml b/dts/Bindings/rtc/rtc.yaml index d30dc045aa..0ec3551f12 100644 --- a/dts/Bindings/rtc/rtc.yaml +++ b/dts/Bindings/rtc/rtc.yaml @@ -27,7 +27,6 @@ properties: 1: chargeable quartz-load-femtofarads: - $ref: /schemas/types.yaml#/definitions/uint32 description: The capacitive load of the quartz(x-tal), expressed in femto Farad (fF). The default value shall be listed (if optional), @@ -47,7 +46,6 @@ properties: deprecated: true trickle-resistor-ohms: - $ref: /schemas/types.yaml#/definitions/uint32 description: Selected resistor for trickle charger. Should be given if trickle charger should be enabled. diff --git a/dts/Bindings/serial/pl011.yaml b/dts/Bindings/serial/pl011.yaml index c23c93b400..07fa6d26f2 100644 --- a/dts/Bindings/serial/pl011.yaml +++ b/dts/Bindings/serial/pl011.yaml @@ -88,14 +88,12 @@ properties: description: Rate at which poll occurs when auto-poll is set. default 100ms. - $ref: /schemas/types.yaml#/definitions/uint32 default: 100 poll-timeout-ms: description: Poll timeout when auto-poll is set, default 3000ms. - $ref: /schemas/types.yaml#/definitions/uint32 default: 3000 required: diff --git a/dts/Bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml b/dts/Bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml index bf8c8ba250..54650823b2 100644 --- a/dts/Bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml +++ b/dts/Bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml @@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Mediatek MT8192 with MT6359, RT1015 and RT5682 ASoC sound card driver maintainers: - - Jiaxin Yu <jiaxin.yu@mediatek.com> - - Shane Chien <shane.chien@mediatek.com> + - Jiaxin Yu <jiaxin.yu@mediatek.com> + - Shane Chien <shane.chien@mediatek.com> description: This binding describes the MT8192 sound card. diff --git a/dts/Bindings/sound/sgtl5000.yaml b/dts/Bindings/sound/sgtl5000.yaml index d116c174b5..70b4a88310 100644 --- a/dts/Bindings/sound/sgtl5000.yaml +++ b/dts/Bindings/sound/sgtl5000.yaml @@ -41,14 +41,12 @@ properties: values of 2k, 4k or 8k. If set to 0 it will be off. If this node is not mentioned or if the value is unknown, then micbias resistor is set to 4k. - $ref: "/schemas/types.yaml#/definitions/uint32" enum: [ 0, 2, 4, 8 ] micbias-voltage-m-volts: description: The bias voltage to be used in mVolts. The voltage can take values from 1.25V to 3V by 250mV steps. If this node is not mentioned or the value is unknown, then the value is set to 1.25V. - $ref: "/schemas/types.yaml#/definitions/uint32" enum: [ 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000 ] lrclk-strength: diff --git a/dts/Bindings/sound/ti,j721e-cpb-audio.yaml b/dts/Bindings/sound/ti,j721e-cpb-audio.yaml index 805da4d6a8..ec06789b21 100644 --- a/dts/Bindings/sound/ti,j721e-cpb-audio.yaml +++ b/dts/Bindings/sound/ti,j721e-cpb-audio.yaml @@ -1,4 +1,6 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 Texas Instruments Incorporated +# Author: Peter Ujfalusi <peter.ujfalusi@ti.com> %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-audio.yaml# @@ -7,7 +9,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Texas Instruments J721e Common Processor Board Audio Support maintainers: - - Peter Ujfalusi <peter.ujfalusi@ti.com> + - Peter Ujfalusi <peter.ujfalusi@gmail.com> description: | The audio support on the board is using pcm3168a codec connected to McASP10 diff --git a/dts/Bindings/sound/ti,j721e-cpb-ivi-audio.yaml b/dts/Bindings/sound/ti,j721e-cpb-ivi-audio.yaml index bb780f6216..ee9f960de3 100644 --- a/dts/Bindings/sound/ti,j721e-cpb-ivi-audio.yaml +++ b/dts/Bindings/sound/ti,j721e-cpb-ivi-audio.yaml @@ -1,4 +1,6 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 Texas Instruments Incorporated +# Author: Peter Ujfalusi <peter.ujfalusi@ti.com> %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/ti,j721e-cpb-ivi-audio.yaml# @@ -7,7 +9,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Texas Instruments J721e Common Processor Board Audio Support maintainers: - - Peter Ujfalusi <peter.ujfalusi@ti.com> + - Peter Ujfalusi <peter.ujfalusi@gmail.com> description: | The Infotainment board plugs into the Common Processor Board, the support of the diff --git a/dts/Bindings/usb/ti,j721e-usb.yaml b/dts/Bindings/usb/ti,j721e-usb.yaml index 148b3fb4ce..c80a835719 100644 --- a/dts/Bindings/usb/ti,j721e-usb.yaml +++ b/dts/Bindings/usb/ti,j721e-usb.yaml @@ -21,6 +21,8 @@ properties: reg: description: module registers + ranges: true + power-domains: description: PM domain provider node and an args specifier containing @@ -62,6 +64,8 @@ properties: '#size-cells': const: 2 + dma-coherent: true + patternProperties: "^usb@": type: object diff --git a/dts/Bindings/watchdog/watchdog.yaml b/dts/Bindings/watchdog/watchdog.yaml index 4e2c26cd98..e3dfb02f0c 100644 --- a/dts/Bindings/watchdog/watchdog.yaml +++ b/dts/Bindings/watchdog/watchdog.yaml @@ -19,7 +19,6 @@ properties: pattern: "^watchdog(@.*|-[0-9a-f])?$" timeout-sec: - $ref: /schemas/types.yaml#/definitions/uint32 description: Contains the watchdog timeout in seconds. diff --git a/dts/include/dt-bindings/sound/apq8016-lpass.h b/dts/include/dt-bindings/sound/apq8016-lpass.h index 3c3e16c0aa..dc605c4bc2 100644 --- a/dts/include/dt-bindings/sound/apq8016-lpass.h +++ b/dts/include/dt-bindings/sound/apq8016-lpass.h @@ -2,9 +2,8 @@ #ifndef __DT_APQ8016_LPASS_H #define __DT_APQ8016_LPASS_H -#define MI2S_PRIMARY 0 -#define MI2S_SECONDARY 1 -#define MI2S_TERTIARY 2 -#define MI2S_QUATERNARY 3 +#include <dt-bindings/sound/qcom,lpass.h> + +/* NOTE: Use qcom,lpass.h to define any AIF ID's for LPASS */ #endif /* __DT_APQ8016_LPASS_H */ diff --git a/dts/include/dt-bindings/sound/qcom,lpass.h b/dts/include/dt-bindings/sound/qcom,lpass.h new file mode 100644 index 0000000000..7b0b80b386 --- /dev/null +++ b/dts/include/dt-bindings/sound/qcom,lpass.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __DT_QCOM_LPASS_H +#define __DT_QCOM_LPASS_H + +#define MI2S_PRIMARY 0 +#define MI2S_SECONDARY 1 +#define MI2S_TERTIARY 2 +#define MI2S_QUATERNARY 3 +#define MI2S_QUINARY 4 + +#define LPASS_DP_RX 5 + +#define LPASS_MCLK0 0 + +#endif /* __DT_QCOM_LPASS_H */ diff --git a/dts/include/dt-bindings/sound/sc7180-lpass.h b/dts/include/dt-bindings/sound/sc7180-lpass.h index 56ecaafd2d..5c1ee8b36b 100644 --- a/dts/include/dt-bindings/sound/sc7180-lpass.h +++ b/dts/include/dt-bindings/sound/sc7180-lpass.h @@ -2,10 +2,8 @@ #ifndef __DT_SC7180_LPASS_H #define __DT_SC7180_LPASS_H -#define MI2S_PRIMARY 0 -#define MI2S_SECONDARY 1 -#define LPASS_DP_RX 2 +#include <dt-bindings/sound/qcom,lpass.h> -#define LPASS_MCLK0 0 +/* NOTE: Use qcom,lpass.h to define any AIF ID's for LPASS */ #endif /* __DT_APQ8016_LPASS_H */ diff --git a/dts/src/arm/imx6q-tbs2910.dts b/dts/src/arm/imx6q-tbs2910.dts index 861e05d531..343364d3e4 100644 --- a/dts/src/arm/imx6q-tbs2910.dts +++ b/dts/src/arm/imx6q-tbs2910.dts @@ -16,6 +16,13 @@ stdout-path = &uart1; }; + aliases { + mmc0 = &usdhc2; + mmc1 = &usdhc3; + mmc2 = &usdhc4; + /delete-property/ mmc3; + }; + memory@10000000 { device_type = "memory"; reg = <0x10000000 0x80000000>; diff --git a/dts/src/arm/imx6qdl-gw52xx.dtsi b/dts/src/arm/imx6qdl-gw52xx.dtsi index 736074f1c3..959d8ac2e3 100644 --- a/dts/src/arm/imx6qdl-gw52xx.dtsi +++ b/dts/src/arm/imx6qdl-gw52xx.dtsi @@ -418,7 +418,7 @@ /* VDD_AUD_1P8: Audio codec */ reg_aud_1p8v: ldo3 { - regulator-name = "vdd1p8"; + regulator-name = "vdd1p8a"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; diff --git a/dts/src/arm/imx6qdl-kontron-samx6i.dtsi b/dts/src/arm/imx6qdl-kontron-samx6i.dtsi index d6df598bd1..b167b33bd1 100644 --- a/dts/src/arm/imx6qdl-kontron-samx6i.dtsi +++ b/dts/src/arm/imx6qdl-kontron-samx6i.dtsi @@ -137,7 +137,7 @@ lcd_backlight: lcd-backlight { compatible = "pwm-backlight"; - pwms = <&pwm4 0 5000000>; + pwms = <&pwm4 0 5000000 0>; pwm-names = "LCD_BKLT_PWM"; brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; @@ -167,7 +167,7 @@ i2c-gpio,delay-us = <2>; /* ~100 kHz */ #address-cells = <1>; #size-cells = <0>; - status = "disabld"; + status = "disabled"; }; i2c_cam: i2c-gpio-cam { @@ -179,7 +179,7 @@ i2c-gpio,delay-us = <2>; /* ~100 kHz */ #address-cells = <1>; #size-cells = <0>; - status = "disabld"; + status = "disabled"; }; }; diff --git a/dts/src/arm/imx6qdl-sr-som.dtsi b/dts/src/arm/imx6qdl-sr-som.dtsi index b06577808f..7e4e5fd014 100644 --- a/dts/src/arm/imx6qdl-sr-som.dtsi +++ b/dts/src/arm/imx6qdl-sr-som.dtsi @@ -53,7 +53,6 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; - phy-handle = <&phy>; phy-mode = "rgmii-id"; phy-reset-duration = <2>; phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; @@ -63,10 +62,19 @@ #address-cells = <1>; #size-cells = <0>; - phy: ethernet-phy@0 { + /* + * The PHY can appear at either address 0 or 4 due to the + * configuration (LED) pin not being pulled sufficiently. + */ + ethernet-phy@0 { reg = <0>; qca,clk-out-frequency = <125000000>; }; + + ethernet-phy@4 { + reg = <4>; + qca,clk-out-frequency = <125000000>; + }; }; }; diff --git a/dts/src/arm/imx7d-flex-concentrator.dts b/dts/src/arm/imx7d-flex-concentrator.dts index 84b095279e..bd6b5285aa 100644 --- a/dts/src/arm/imx7d-flex-concentrator.dts +++ b/dts/src/arm/imx7d-flex-concentrator.dts @@ -115,6 +115,7 @@ compatible = "nxp,pcf2127"; reg = <0>; spi-max-frequency = <2000000>; + reset-source; }; }; diff --git a/dts/src/arm/lpc32xx.dtsi b/dts/src/arm/lpc32xx.dtsi index 3a5cfb0ddb..c87066d6c9 100644 --- a/dts/src/arm/lpc32xx.dtsi +++ b/dts/src/arm/lpc32xx.dtsi @@ -326,9 +326,6 @@ clocks = <&xtal_32k>, <&xtal>; clock-names = "xtal_32k", "xtal"; - - assigned-clocks = <&clk LPC32XX_CLK_HCLK_PLL>; - assigned-clock-rates = <208000000>; }; }; diff --git a/dts/src/arm/omap3-gta04.dtsi b/dts/src/arm/omap3-gta04.dtsi index c8745bc800..7b8c18e660 100644 --- a/dts/src/arm/omap3-gta04.dtsi +++ b/dts/src/arm/omap3-gta04.dtsi @@ -114,7 +114,7 @@ gpio-sck = <&gpio1 12 GPIO_ACTIVE_HIGH>; gpio-miso = <&gpio1 18 GPIO_ACTIVE_HIGH>; gpio-mosi = <&gpio1 20 GPIO_ACTIVE_HIGH>; - cs-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; num-chipselects = <1>; /* lcd panel */ @@ -124,7 +124,6 @@ spi-max-frequency = <100000>; spi-cpol; spi-cpha; - spi-cs-high; backlight= <&backlight>; label = "lcd"; diff --git a/dts/src/arm/omap4-droid4-xt894.dts b/dts/src/arm/omap4-droid4-xt894.dts index 3ea4c5b9fd..e833c21f1c 100644 --- a/dts/src/arm/omap4-droid4-xt894.dts +++ b/dts/src/arm/omap4-droid4-xt894.dts @@ -16,8 +16,13 @@ debounce-interval = <10>; }; + /* + * We use pad 0x4a100116 abe_dmic_din3.gpio_122 as the irq instead + * of the gpio interrupt to avoid lost events in deeper idle states. + */ slider { label = "Keypad Slide"; + interrupts-extended = <&omap4_pmx_core 0xd6>; gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>; /* gpio122 */ linux,input-type = <EV_SW>; linux,code = <SW_KEYPAD_SLIDE>; diff --git a/dts/src/arm/ste-db8500.dtsi b/dts/src/arm/ste-db8500.dtsi index d309fad322..344d29853b 100644 --- a/dts/src/arm/ste-db8500.dtsi +++ b/dts/src/arm/ste-db8500.dtsi @@ -12,4 +12,42 @@ 200000 0>; }; }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Modem trace memory */ + ram@06000000 { + reg = <0x06000000 0x00f00000>; + no-map; + }; + + /* Modem shared memory */ + ram@06f00000 { + reg = <0x06f00000 0x00100000>; + no-map; + }; + + /* Modem private memory */ + ram@07000000 { + reg = <0x07000000 0x01000000>; + no-map; + }; + + /* + * Initial Secure Software ISSW memory + * + * This is probably only used if the kernel tries + * to actually call into trustzone to run secure + * applications, which the mainline kernel probably + * will not do on this old chipset. But you can never + * be too careful, so reserve this memory anyway. + */ + ram@17f00000 { + reg = <0x17f00000 0x00100000>; + no-map; + }; + }; }; diff --git a/dts/src/arm/ste-db8520.dtsi b/dts/src/arm/ste-db8520.dtsi index 48bd8728ae..287804e9e1 100644 --- a/dts/src/arm/ste-db8520.dtsi +++ b/dts/src/arm/ste-db8520.dtsi @@ -12,4 +12,42 @@ 200000 0>; }; }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* Modem trace memory */ + ram@06000000 { + reg = <0x06000000 0x00f00000>; + no-map; + }; + + /* Modem shared memory */ + ram@06f00000 { + reg = <0x06f00000 0x00100000>; + no-map; + }; + + /* Modem private memory */ + ram@07000000 { + reg = <0x07000000 0x01000000>; + no-map; + }; + + /* + * Initial Secure Software ISSW memory + * + * This is probably only used if the kernel tries + * to actually call into trustzone to run secure + * applications, which the mainline kernel probably + * will not do on this old chipset. But you can never + * be too careful, so reserve this memory anyway. + */ + ram@17f00000 { + reg = <0x17f00000 0x00100000>; + no-map; + }; + }; }; diff --git a/dts/src/arm/ste-db9500.dtsi b/dts/src/arm/ste-db9500.dtsi new file mode 100644 index 0000000000..0afff70319 --- /dev/null +++ b/dts/src/arm/ste-db9500.dtsi @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "ste-dbx5x0.dtsi" + +/ { + cpus { + cpu@300 { + /* cpufreq controls */ + operating-points = <1152000 0 + 800000 0 + 400000 0 + 200000 0>; + }; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* + * Initial Secure Software ISSW memory + * + * This is probably only used if the kernel tries + * to actually call into trustzone to run secure + * applications, which the mainline kernel probably + * will not do on this old chipset. But you can never + * be too careful, so reserve this memory anyway. + */ + ram@17f00000 { + reg = <0x17f00000 0x00100000>; + no-map; + }; + }; +}; diff --git a/dts/src/arm/ste-snowball.dts b/dts/src/arm/ste-snowball.dts index be90e73c92..27d8a07718 100644 --- a/dts/src/arm/ste-snowball.dts +++ b/dts/src/arm/ste-snowball.dts @@ -4,7 +4,7 @@ */ /dts-v1/; -#include "ste-db8500.dtsi" +#include "ste-db9500.dtsi" #include "ste-href-ab8500.dtsi" #include "ste-href-family-pinctrl.dtsi" diff --git a/dts/src/arm/stm32mp15xx-dhcom-drc02.dtsi b/dts/src/arm/stm32mp15xx-dhcom-drc02.dtsi index 62ab23824a..5088dd3a30 100644 --- a/dts/src/arm/stm32mp15xx-dhcom-drc02.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcom-drc02.dtsi @@ -33,9 +33,9 @@ * during TX anyway and that it only controls drive enable DE * line. Hence, the RX is always enabled here. */ - rs485-rx-en { + rs485-rx-en-hog { gpio-hog; - gpios = <8 GPIO_ACTIVE_HIGH>; + gpios = <8 0>; output-low; line-name = "rs485-rx-en"; }; @@ -61,9 +61,9 @@ * order to reset the Hub when USB bus is powered down, but * so far there is no such functionality. */ - usb-hub { + usb-hub-hog { gpio-hog; - gpios = <2 GPIO_ACTIVE_HIGH>; + gpios = <2 0>; output-high; line-name = "usb-hub-reset"; }; @@ -87,6 +87,12 @@ }; }; +&i2c4 { + touchscreen@49 { + status = "disabled"; + }; +}; + &i2c5 { /* TP7/TP8 */ pinctrl-names = "default"; pinctrl-0 = <&i2c5_pins_a>; @@ -104,7 +110,7 @@ * are used for on-board microSD slot instead. */ /delete-property/broken-cd; - cd-gpios = <&gpioi 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>; disable-wp; }; diff --git a/dts/src/arm/stm32mp15xx-dhcom-picoitx.dtsi b/dts/src/arm/stm32mp15xx-dhcom-picoitx.dtsi index 356150d28c..32700cca24 100644 --- a/dts/src/arm/stm32mp15xx-dhcom-picoitx.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcom-picoitx.dtsi @@ -43,9 +43,9 @@ * in order to turn on port power when USB bus is powered up, but so * far there is no such functionality. */ - usb-port-power { + usb-port-power-hog { gpio-hog; - gpios = <13 GPIO_ACTIVE_LOW>; + gpios = <13 0>; output-low; line-name = "usb-port-power"; }; diff --git a/dts/src/arm/stm32mp15xx-dhcom-som.dtsi b/dts/src/arm/stm32mp15xx-dhcom-som.dtsi index ac46ab363e..daff5318f3 100644 --- a/dts/src/arm/stm32mp15xx-dhcom-som.dtsi +++ b/dts/src/arm/stm32mp15xx-dhcom-som.dtsi @@ -390,7 +390,8 @@ pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>; pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>; pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>; - broken-cd; + cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + disable-wp; st,sig-dir; st,neg-edge; st,use-ckin; diff --git a/dts/src/arm/sun7i-a20-bananapro.dts b/dts/src/arm/sun7i-a20-bananapro.dts index 01ccff7569..5740f94427 100644 --- a/dts/src/arm/sun7i-a20-bananapro.dts +++ b/dts/src/arm/sun7i-a20-bananapro.dts @@ -110,7 +110,7 @@ pinctrl-names = "default"; pinctrl-0 = <&gmac_rgmii_pins>; phy-handle = <&phy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-supply = <®_gmac_3v3>; status = "okay"; }; diff --git a/dts/src/arm64/amlogic/meson-axg.dtsi b/dts/src/arm64/amlogic/meson-axg.dtsi index ba1c6dfdc4..d945c84ab6 100644 --- a/dts/src/arm64/amlogic/meson-axg.dtsi +++ b/dts/src/arm64/amlogic/meson-axg.dtsi @@ -280,8 +280,6 @@ "timing-adjustment"; rx-fifo-depth = <4096>; tx-fifo-depth = <2048>; - resets = <&reset RESET_ETHERNET>; - reset-names = "stmmaceth"; power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>; status = "disabled"; }; diff --git a/dts/src/arm64/amlogic/meson-g12-common.dtsi b/dts/src/arm64/amlogic/meson-g12-common.dtsi index 9c90d562ad..b858c5e43c 100644 --- a/dts/src/arm64/amlogic/meson-g12-common.dtsi +++ b/dts/src/arm64/amlogic/meson-g12-common.dtsi @@ -224,8 +224,6 @@ "timing-adjustment"; rx-fifo-depth = <4096>; tx-fifo-depth = <2048>; - resets = <&reset RESET_ETHERNET>; - reset-names = "stmmaceth"; status = "disabled"; mdio0: mdio { @@ -2390,7 +2388,7 @@ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; dr_mode = "host"; snps,dis_u2_susphy_quirk; - snps,quirk-frame-length-adjustment; + snps,quirk-frame-length-adjustment = <0x20>; snps,parkmode-disable-ss-quirk; }; }; diff --git a/dts/src/arm64/amlogic/meson-gx.dtsi b/dts/src/arm64/amlogic/meson-gx.dtsi index 726b91d3a9..0edd137151 100644 --- a/dts/src/arm64/amlogic/meson-gx.dtsi +++ b/dts/src/arm64/amlogic/meson-gx.dtsi @@ -13,7 +13,6 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/power/meson-gxbb-power.h> -#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> #include <dt-bindings/thermal/thermal.h> / { @@ -576,8 +575,6 @@ interrupt-names = "macirq"; rx-fifo-depth = <4096>; tx-fifo-depth = <2048>; - resets = <&reset RESET_ETHERNET>; - reset-names = "stmmaceth"; power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>; status = "disabled"; }; diff --git a/dts/src/arm64/amlogic/meson-sm1-odroid-c4.dts b/dts/src/arm64/amlogic/meson-sm1-odroid-c4.dts index cf5a98f0e4..a712273c90 100644 --- a/dts/src/arm64/amlogic/meson-sm1-odroid-c4.dts +++ b/dts/src/arm64/amlogic/meson-sm1-odroid-c4.dts @@ -52,7 +52,7 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; - gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; + gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>; enable-active-high; regulator-always-on; }; diff --git a/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi b/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi index aef8f2b007..5401a646c8 100644 --- a/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi +++ b/dts/src/arm64/broadcom/stingray/stingray-usb.dtsi @@ -4,11 +4,16 @@ */ usb { compatible = "simple-bus"; - dma-ranges; #address-cells = <2>; #size-cells = <2>; ranges = <0x0 0x0 0x0 0x68500000 0x0 0x00400000>; + /* + * Internally, USB bus to the interconnect can only address up + * to 40-bit + */ + dma-ranges = <0 0 0 0 0x100 0x0>; + usbphy0: usb-phy@0 { compatible = "brcm,sr-usb-combo-phy"; reg = <0x0 0x00000000 0x0 0x100>; diff --git a/dts/src/arm64/freescale/fsl-ls1028a.dtsi b/dts/src/arm64/freescale/fsl-ls1028a.dtsi index 60ff19fa53..6c8a61c2cc 100644 --- a/dts/src/arm64/freescale/fsl-ls1028a.dtsi +++ b/dts/src/arm64/freescale/fsl-ls1028a.dtsi @@ -101,7 +101,7 @@ reboot { compatible ="syscon-reboot"; regmap = <&rst>; - offset = <0xb0>; + offset = <0>; mask = <0x02>; }; diff --git a/dts/src/arm64/freescale/fsl-ls1046a.dtsi b/dts/src/arm64/freescale/fsl-ls1046a.dtsi index 025e1f5876..565934cbfa 100644 --- a/dts/src/arm64/freescale/fsl-ls1046a.dtsi +++ b/dts/src/arm64/freescale/fsl-ls1046a.dtsi @@ -385,7 +385,7 @@ dcfg: dcfg@1ee0000 { compatible = "fsl,ls1046a-dcfg", "syscon"; - reg = <0x0 0x1ee0000 0x0 0x10000>; + reg = <0x0 0x1ee0000 0x0 0x1000>; big-endian; }; diff --git a/dts/src/arm64/freescale/imx8mm-pinfunc.h b/dts/src/arm64/freescale/imx8mm-pinfunc.h index 5ccc4cc919..a003e6af33 100644 --- a/dts/src/arm64/freescale/imx8mm-pinfunc.h +++ b/dts/src/arm64/freescale/imx8mm-pinfunc.h @@ -124,7 +124,7 @@ #define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x0A4 0x30C 0x000 0x0 0x0 #define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x0A4 0x30C 0x000 0x5 0x0 #define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0A8 0x310 0x000 0x0 0x0 -#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x31 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x310 0x000 0x5 0x0 #define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0AC 0x314 0x000 0x0 0x0 #define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x0AC 0x314 0x000 0x5 0x0 #define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0B0 0x318 0x000 0x0 0x0 diff --git a/dts/src/arm64/freescale/imx8mn.dtsi b/dts/src/arm64/freescale/imx8mn.dtsi index ee17902304..2a79e89f82 100644 --- a/dts/src/arm64/freescale/imx8mn.dtsi +++ b/dts/src/arm64/freescale/imx8mn.dtsi @@ -253,7 +253,7 @@ #size-cells = <1>; ranges; - spba: bus@30000000 { + spba: spba-bus@30000000 { compatible = "fsl,spba-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; diff --git a/dts/src/arm64/freescale/imx8mp.dtsi b/dts/src/arm64/freescale/imx8mp.dtsi index ecccfbb4f5..23f5a5e371 100644 --- a/dts/src/arm64/freescale/imx8mp.dtsi +++ b/dts/src/arm64/freescale/imx8mp.dtsi @@ -266,7 +266,7 @@ #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&iomuxc 0 56 26>, <&iomuxc 0 144 4>; + gpio-ranges = <&iomuxc 0 56 26>, <&iomuxc 26 144 4>; }; gpio4: gpio@30230000 { diff --git a/dts/src/arm64/qcom/sdm845-db845c.dts b/dts/src/arm64/qcom/sdm845-db845c.dts index 7cc236575e..c0b93813ea 100644 --- a/dts/src/arm64/qcom/sdm845-db845c.dts +++ b/dts/src/arm64/qcom/sdm845-db845c.dts @@ -415,7 +415,9 @@ &gcc { protected-clocks = <GCC_QSPI_CORE_CLK>, <GCC_QSPI_CORE_CLK_SRC>, - <GCC_QSPI_CNOC_PERIPH_AHB_CLK>; + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, + <GCC_LPASS_Q6_AXI_CLK>, + <GCC_LPASS_SWAY_CLK>; }; &gpu { diff --git a/dts/src/arm64/qcom/sdm850-lenovo-yoga-c630.dts b/dts/src/arm64/qcom/sdm850-lenovo-yoga-c630.dts index 13fdd02cff..8b40f96e97 100644 --- a/dts/src/arm64/qcom/sdm850-lenovo-yoga-c630.dts +++ b/dts/src/arm64/qcom/sdm850-lenovo-yoga-c630.dts @@ -302,7 +302,9 @@ &gcc { protected-clocks = <GCC_QSPI_CORE_CLK>, <GCC_QSPI_CORE_CLK_SRC>, - <GCC_QSPI_CNOC_PERIPH_AHB_CLK>; + <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, + <GCC_LPASS_Q6_AXI_CLK>, + <GCC_LPASS_SWAY_CLK>; }; &gpu { @@ -320,6 +322,8 @@ &i2c3 { status = "okay"; clock-frequency = <400000>; + /* Overwrite pinctrl-0 from sdm845.dtsi */ + pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>; tsel: hid@15 { compatible = "hid-over-i2c"; @@ -327,9 +331,6 @@ hid-descr-addr = <0x1>; interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>; - - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_hid_active>; }; tsc2: hid@2c { @@ -338,11 +339,6 @@ hid-descr-addr = <0x20>; interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>; - - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_hid_active>; - - status = "disabled"; }; }; diff --git a/dts/src/arm64/rockchip/px30.dtsi b/dts/src/arm64/rockchip/px30.dtsi index 2695ea8cda..64193292d2 100644 --- a/dts/src/arm64/rockchip/px30.dtsi +++ b/dts/src/arm64/rockchip/px30.dtsi @@ -1097,7 +1097,7 @@ vopl_mmu: iommu@ff470f00 { compatible = "rockchip,iommu"; reg = <0x0 0xff470f00 0x0 0x100>; - interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vopl_mmu"; clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>; clock-names = "aclk", "iface"; diff --git a/dts/src/arm64/rockchip/rk3328-nanopi-r2s.dts b/dts/src/arm64/rockchip/rk3328-nanopi-r2s.dts index 2ee07d15a6..1eecad724f 100644 --- a/dts/src/arm64/rockchip/rk3328-nanopi-r2s.dts +++ b/dts/src/arm64/rockchip/rk3328-nanopi-r2s.dts @@ -114,6 +114,10 @@ cpu-supply = <&vdd_arm>; }; +&display_subsystem { + status = "disabled"; +}; + &gmac2io { assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; diff --git a/dts/src/arm64/rockchip/rk3399-pinebook-pro.dts b/dts/src/arm64/rockchip/rk3399-pinebook-pro.dts index 06d48338c8..219b7507a1 100644 --- a/dts/src/arm64/rockchip/rk3399-pinebook-pro.dts +++ b/dts/src/arm64/rockchip/rk3399-pinebook-pro.dts @@ -790,7 +790,6 @@ &pcie0 { bus-scan-delay-ms = <1000>; ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; - max-link-speed = <2>; num-lanes = <4>; pinctrl-names = "default"; pinctrl-0 = <&pcie_clkreqn_cpm>; diff --git a/dts/src/arm64/rockchip/rk3399.dtsi b/dts/src/arm64/rockchip/rk3399.dtsi index f5dee5f447..2551b238b9 100644 --- a/dts/src/arm64/rockchip/rk3399.dtsi +++ b/dts/src/arm64/rockchip/rk3399.dtsi @@ -234,6 +234,7 @@ reg = <0x0 0xf8000000 0x0 0x2000000>, <0x0 0xfd000000 0x0 0x1000000>; reg-names = "axi-base", "apb-base"; + device_type = "pci"; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; @@ -252,7 +253,6 @@ <0 0 0 2 &pcie0_intc 1>, <0 0 0 3 &pcie0_intc 2>, <0 0 0 4 &pcie0_intc 3>; - linux,pci-domain = <0>; max-link-speed = <1>; msi-map = <0x0 &its 0x0 0x1000>; phys = <&pcie_phy 0>, <&pcie_phy 1>, @@ -1278,7 +1278,6 @@ compatible = "rockchip,rk3399-vdec"; reg = <0x0 0xff660000 0x0 0x400>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>; - interrupt-names = "vdpu"; clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>, <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>; clock-names = "axi", "ahb", "cabac", "core"; diff --git a/dts/src/riscv/sifive/hifive-unleashed-a00.dts b/dts/src/riscv/sifive/hifive-unleashed-a00.dts index 4a2729f5ca..60846e88ae 100644 --- a/dts/src/riscv/sifive/hifive-unleashed-a00.dts +++ b/dts/src/riscv/sifive/hifive-unleashed-a00.dts @@ -88,6 +88,7 @@ phy-mode = "gmii"; phy-handle = <&phy0>; phy0: ethernet-phy@0 { + compatible = "ethernet-phy-id0007.0771"; reg = <0>; }; }; diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c index c9f27f1278..4bfb55ad0d 100644 --- a/fs/ext4/ext4_common.c +++ b/fs/ext4/ext4_common.c @@ -43,10 +43,11 @@ static struct ext4_extent_header *ext4fs_get_extent_block(struct ext2_data *data uint32_t fileblock, int log2_blksz) { struct ext4_extent_idx *index; - unsigned long long block; + sector_t block; struct ext_filesystem *fs = data->fs; int blksz = EXT2_BLOCK_SIZE(data); - int i, ret; + ssize_t ret; + int i; while (1) { index = (struct ext4_extent_idx *)(ext_block + 1); @@ -77,10 +78,10 @@ static struct ext4_extent_header *ext4fs_get_extent_block(struct ext2_data *data } } -static int ext4fs_blockgroup(struct ext2_data *data, int group, +static ssize_t ext4fs_blockgroup(struct ext2_data *data, int group, struct ext2_block_group *blkgrp) { - long int blkno; + sector_t blkno; unsigned int blkoff, desc_per_blk; struct ext_filesystem *fs = data->fs; int desc_size = fs->gdsize; @@ -91,7 +92,7 @@ static int ext4fs_blockgroup(struct ext2_data *data, int group, group / desc_per_blk; blkoff = (group % desc_per_blk) * desc_size; - dev_dbg(fs->dev, "read %d group descriptor (blkno %ld blkoff %u)\n", + dev_dbg(fs->dev, "read %d group descriptor (blkno %llu blkoff %u)\n", group, blkno, blkoff); return ext4fs_devread(fs, blkno << LOG2_EXT2_BLOCK_SIZE(data), @@ -103,8 +104,9 @@ int ext4fs_read_inode(struct ext2_data *data, int ino, struct ext2_inode *inode) struct ext2_block_group blkgrp; struct ext2_sblock *sblock = &data->sblock; struct ext_filesystem *fs = data->fs; - int inodes_per_block, ret; - long int blkno; + int inodes_per_block; + ssize_t ret; + sector_t blkno; unsigned int blkoff; /* It is easier to calculate if the first inode is 0. */ @@ -128,11 +130,11 @@ int ext4fs_read_inode(struct ext2_data *data, int ino, struct ext2_inode *inode) } static int ext4fs_get_indir_block(struct ext2fs_node *node, - struct ext4fs_indir_block *indir, int blkno) + struct ext4fs_indir_block *indir, sector_t blkno) { struct ext_filesystem *fs = node->data->fs; int blksz; - int ret; + ssize_t ret; blksz = EXT2_BLOCK_SIZE(node->data); @@ -488,7 +490,8 @@ fail: int ext4fs_mount(struct ext_filesystem *fs) { struct ext2_data *data; - int ret, blksz; + ssize_t ret; + int blksz; data = zalloc(sizeof(struct ext2_data)); if (!data) diff --git a/fs/ext4/ext4_common.h b/fs/ext4/ext4_common.h index 81fb67ef4c..f8ebd76266 100644 --- a/fs/ext4/ext4_common.h +++ b/fs/ext4/ext4_common.h @@ -48,8 +48,8 @@ static inline void *zalloc(size_t size) int ext4fs_read_inode(struct ext2_data *data, int ino, struct ext2_inode *inode); -int ext4fs_read_file(struct ext2fs_node *node, int pos, - unsigned int len, char *buf); +loff_t ext4fs_read_file(struct ext2fs_node *node, loff_t pos, + unsigned int len, char *buf); int ext4fs_find_file(const char *path, struct ext2fs_node *rootnode, struct ext2fs_node **foundnode, int *foundtype); int ext4fs_iterate_dir(struct ext2fs_node *dir, char *name, diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c index 2d231d273a..54349aad3f 100644 --- a/fs/ext4/ext4fs.c +++ b/fs/ext4/ext4fs.c @@ -47,28 +47,32 @@ void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot) * Optimized read file API : collects and defers contiguous sector * reads into one potentially more efficient larger sequential read action */ -int ext4fs_read_file(struct ext2fs_node *node, int pos, +loff_t ext4fs_read_file(struct ext2fs_node *node, loff_t pos, unsigned int len, char *buf) { - int i; - int blockcnt; + loff_t i; + blkcnt_t blockcnt; int log2blocksize = LOG2_EXT2_BLOCK_SIZE(node->data); - int blocksize = 1 << (log2blocksize + DISK_SECTOR_BITS); - unsigned int filesize = le32_to_cpu(node->inode.size); - short ret; + const int blockshift = log2blocksize + DISK_SECTOR_BITS; + const int blocksize = 1 << blockshift; + loff_t filesize = ext4_isize(node); + ssize_t ret; struct ext_filesystem *fs = node->data->fs; /* Adjust len so it we can't read past the end of the file. */ - if (len > filesize) - len = filesize; + if (len + pos > filesize) + len = filesize - pos; - blockcnt = ((len + pos) + blocksize - 1) / blocksize; + if (filesize <= pos) + return -EINVAL; - for (i = pos / blocksize; i < blockcnt; i++) { - int blknr; - int blockoff = pos % blocksize; - int blockend = blocksize; - int skipfirst = 0; + blockcnt = ((len + pos) + blocksize - 1) >> blockshift; + + for (i = pos >> blockshift; i < blockcnt; i++) { + sector_t blknr; + loff_t blockoff = pos - (blocksize * i); + loff_t blockend = blocksize; + loff_t skipfirst = 0; blknr = read_allocated_block(node, i); if (blknr < 0) @@ -78,7 +82,7 @@ int ext4fs_read_file(struct ext2fs_node *node, int pos, /* Last block. */ if (i == blockcnt - 1) { - blockend = (len + pos) % blocksize; + blockend = (len + pos) - (blocksize * i); /* The last portion is exactly blocksize. */ if (!blockend) @@ -86,7 +90,7 @@ int ext4fs_read_file(struct ext2fs_node *node, int pos, } /* First block. */ - if (i == pos / blocksize) { + if (i == pos >> blockshift) { skipfirst = blockoff; blockend -= skipfirst; } diff --git a/fs/ext4/ext4fs.h b/fs/ext4/ext4fs.h index 17a490a943..83ae9b87a4 100644 --- a/fs/ext4/ext4fs.h +++ b/fs/ext4/ext4fs.h @@ -74,39 +74,10 @@ struct ext4_extent_header { }; struct ext_filesystem { - /* Total Sector of partition */ - uint64_t total_sect; - /* Block size of partition */ - uint32_t blksz; /* Inode size of partition */ uint32_t inodesz; - /* Sectors per Block */ - uint32_t sect_perblk; /* Group Descriptor size */ uint16_t gdsize; - /* Group Descriptor Block Number */ - uint32_t gdtable_blkno; - /* Total block groups of partition */ - uint32_t no_blkgrp; - /* No of blocks required for bgdtable */ - uint32_t no_blk_pergdt; - /* Superblock */ - struct ext2_sblock *sb; - /* Block group descritpor table */ - struct ext2_block_group *bgd; - char *gdtable; - - /* Block Bitmap Related */ - unsigned char **blk_bmaps; - long int curr_blkno; - uint16_t first_pass_bbmap; - - /* Inode Bitmap Related */ - unsigned char **inode_bmaps; - int curr_inode_no; - uint16_t first_pass_ibmap; - - /* Journal Related */ /* Block Device Descriptor */ struct cdev *cdev; @@ -124,7 +95,7 @@ int ext4fs_mount(struct ext_filesystem *fs); void ext4fs_umount(struct ext_filesystem *fs); char *ext4fs_read_symlink(struct ext2fs_node *node); void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot); -int ext4fs_devread(struct ext_filesystem *fs, int sector, int byte_offset, int byte_len, char *buf); +ssize_t ext4fs_devread(struct ext_filesystem *fs, sector_t sector, int byte_offset, size_t byte_len, char *buf); long int read_allocated_block(struct ext2fs_node *node, int fileblock); #endif diff --git a/fs/ext4/ext_barebox.c b/fs/ext4/ext_barebox.c index 353ab44b29..8f318a49c0 100644 --- a/fs/ext4/ext_barebox.c +++ b/fs/ext4/ext_barebox.c @@ -27,15 +27,15 @@ #include <fcntl.h> #include "ext4_common.h" -int ext4fs_devread(struct ext_filesystem *fs, int __sector, int byte_offset, - int byte_len, char *buf) +ssize_t ext4fs_devread(struct ext_filesystem *fs, sector_t __sector, int byte_offset, + size_t byte_len, char *buf) { ssize_t size; uint64_t sector = __sector; size = cdev_read(fs->cdev, buf, byte_len, sector * SECTOR_SIZE + byte_offset, 0); if (size < 0) { - dev_err(fs->dev, "read error at sector %d: %s\n", __sector, + dev_err(fs->dev, "read error at sector %llu: %s\n", __sector, strerror(-size)); return size; } @@ -221,7 +221,7 @@ struct inode *ext_get_inode(struct super_block *sb, int ino) inode->i_ino = ino; inode->i_mode = le16_to_cpu(node->inode.mode); - inode->i_size = le32_to_cpu(node->inode.size); + inode->i_size = ext4_isize(node); switch (inode->i_mode & S_IFMT) { default: diff --git a/fs/ext4/ext_common.h b/fs/ext4/ext_common.h index a28f591bc4..37575d2a1a 100644 --- a/fs/ext4/ext_common.h +++ b/fs/ext4/ext_common.h @@ -232,5 +232,13 @@ struct ext2_data { struct ext4fs_indir_block indir1, indir2, indir3; }; -extern unsigned long part_offset; +static inline loff_t ext4_isize(struct ext2fs_node *node) +{ + if (S_ISREG(le16_to_cpu(node->inode.mode))) + return ((loff_t)le32_to_cpu(node->inode.size_high) << 32) | + le32_to_cpu(node->inode.size); + + return (loff_t) le32_to_cpu(node->inode.size); +} + #endif @@ -89,7 +89,13 @@ static int init_fs(void) postcore_initcall(init_fs); +struct filename; + static struct fs_device_d *get_fsdevice_by_path(const char *path); +static int filename_lookup(int dfd, struct filename *name, unsigned flags, + struct path *path);; +static struct filename *getname(const char *filename); +static void path_put(const struct path *path); LIST_HEAD(fs_device_list); @@ -683,6 +689,8 @@ static void fs_remove(struct device_d *dev) struct fs_device_d *fsdev = dev_to_fs_device(dev); struct super_block *sb = &fsdev->sb; struct inode *inode, *tmp; + struct path path; + int ret; if (fsdev->dev.driver) { dev->driver->remove(dev); @@ -695,9 +703,17 @@ static void fs_remove(struct device_d *dev) if (fsdev->cdev) cdev_close(fsdev->cdev); - if (fsdev->loop && fsdev->cdev) + if (fsdev->loop && fsdev->cdev) { cdev_remove_loop(fsdev->cdev); + ret = filename_lookup(AT_FDCWD, getname(fsdev->backingstore), + LOOKUP_FOLLOW, &path); + if (!ret) { + mntput(path.mnt); + path_put(&path); + } + } + if (fsdev->vfsmount.mountpoint) fsdev->vfsmount.mountpoint->d_flags &= ~DCACHE_MOUNTED; @@ -767,16 +783,30 @@ static const char *detect_fs(const char *filename, const char *fsoptions) int fsdev_open_cdev(struct fs_device_d *fsdev) { unsigned long long offset = 0; + struct path path = {}; + int ret; parseopt_b(fsdev->options, "loop", &fsdev->loop); parseopt_llu_suffix(fsdev->options, "offset", &offset); - if (fsdev->loop) - fsdev->cdev = cdev_create_loop(fsdev->backingstore, O_RDWR, - offset); - else + if (fsdev->loop) { + ret = filename_lookup(AT_FDCWD, getname(fsdev->backingstore), + LOOKUP_FOLLOW, &path); + if (ret) + return ret; + + fsdev->cdev = cdev_create_loop(fsdev->backingstore, O_RDWR, offset); + } else { fsdev->cdev = cdev_open(fsdev->backingstore, O_RDWR); - if (!fsdev->cdev) + } + if (!fsdev->cdev) { + path_put(&path); return -EINVAL; + } + + if (path.mnt) { + mntget(path.mnt); + path_put(&path); + } fsdev->dev.parent = fsdev->cdev->dev; fsdev->parent_device = fsdev->cdev->dev; diff --git a/fs/ubifs/scan.c b/fs/ubifs/scan.c index ea88926163..113c2cf755 100644 --- a/fs/ubifs/scan.c +++ b/fs/ubifs/scan.c @@ -244,7 +244,7 @@ void ubifs_scanned_corruption(const struct ubifs_info *c, int lnum, int offs, if (len > 8192) len = 8192; ubifs_err(c, "first %d bytes from LEB %d:%d", len, lnum, offs); - print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 32, 4, buf, len, 1); + print_hex_dump_debug("", DUMP_PREFIX_OFFSET, 32, 4, buf, len, 1); } /** diff --git a/include/asm-generic/div64.h b/include/asm-generic/div64.h index 2e0ba8389e..a3b98c86f0 100644 --- a/include/asm-generic/div64.h +++ b/include/asm-generic/div64.h @@ -1,9 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _ASM_GENERIC_DIV64_H #define _ASM_GENERIC_DIV64_H /* * Copyright (C) 2003 Bernardo Innocenti <bernie@develer.com> * Based on former asm-ppc/div64.h and asm-m68knommu/div64.h * + * Optimization for constant divisors on 32-bit machines: + * Copyright (C) 2006-2015 Nicolas Pitre + * * The semantics of do_div() are: * * uint32_t do_div(uint64_t *n, uint32_t base) @@ -18,8 +22,200 @@ */ #include <linux/types.h> +#include <linux/compiler.h> + +#if BITS_PER_LONG == 64 + +/** + * do_div - returns 2 values: calculate remainder and update new dividend + * @n: uint64_t dividend (will be updated) + * @base: uint32_t divisor + * + * Summary: + * ``uint32_t remainder = n % base;`` + * ``n = n / base;`` + * + * Return: (uint32_t)remainder + * + * NOTE: macro parameter @n is evaluated multiple times, + * beware of side effects! + */ +# define do_div(n,base) ({ \ + uint32_t __base = (base); \ + uint32_t __rem; \ + __rem = ((uint64_t)(n)) % __base; \ + (n) = ((uint64_t)(n)) / __base; \ + __rem; \ + }) + +#elif BITS_PER_LONG == 32 + +#include <linux/log2.h> + +/* + * If the divisor happens to be constant, we determine the appropriate + * inverse at compile time to turn the division into a few inline + * multiplications which ought to be much faster. And yet only if compiling + * with a sufficiently recent gcc version to perform proper 64-bit constant + * propagation. + * + * (It is unfortunate that gcc doesn't perform all this internally.) + */ +#ifndef __div64_const32_is_OK +#define __div64_const32_is_OK (__GNUC__ >= 4) +#endif + +#define __div64_const32(n, ___b) \ +({ \ + /* \ + * Multiplication by reciprocal of b: n / b = n * (p / b) / p \ + * \ + * We rely on the fact that most of this code gets optimized \ + * away at compile time due to constant propagation and only \ + * a few multiplication instructions should remain. \ + * Hence this monstrous macro (static inline doesn't always \ + * do the trick here). \ + */ \ + uint64_t ___res, ___x, ___t, ___m, ___n = (n); \ + uint32_t ___p, ___bias; \ + \ + /* determine MSB of b */ \ + ___p = 1 << ilog2(___b); \ + \ + /* compute m = ((p << 64) + b - 1) / b */ \ + ___m = (~0ULL / ___b) * ___p; \ + ___m += (((~0ULL % ___b + 1) * ___p) + ___b - 1) / ___b; \ + \ + /* one less than the dividend with highest result */ \ + ___x = ~0ULL / ___b * ___b - 1; \ + \ + /* test our ___m with res = m * x / (p << 64) */ \ + ___res = ((___m & 0xffffffff) * (___x & 0xffffffff)) >> 32; \ + ___t = ___res += (___m & 0xffffffff) * (___x >> 32); \ + ___res += (___x & 0xffffffff) * (___m >> 32); \ + ___t = (___res < ___t) ? (1ULL << 32) : 0; \ + ___res = (___res >> 32) + ___t; \ + ___res += (___m >> 32) * (___x >> 32); \ + ___res /= ___p; \ + \ + /* Now sanitize and optimize what we've got. */ \ + if (~0ULL % (___b / (___b & -___b)) == 0) { \ + /* special case, can be simplified to ... */ \ + ___n /= (___b & -___b); \ + ___m = ~0ULL / (___b / (___b & -___b)); \ + ___p = 1; \ + ___bias = 1; \ + } else if (___res != ___x / ___b) { \ + /* \ + * We can't get away without a bias to compensate \ + * for bit truncation errors. To avoid it we'd need an \ + * additional bit to represent m which would overflow \ + * a 64-bit variable. \ + * \ + * Instead we do m = p / b and n / b = (n * m + m) / p. \ + */ \ + ___bias = 1; \ + /* Compute m = (p << 64) / b */ \ + ___m = (~0ULL / ___b) * ___p; \ + ___m += ((~0ULL % ___b + 1) * ___p) / ___b; \ + } else { \ + /* \ + * Reduce m / p, and try to clear bit 31 of m when \ + * possible, otherwise that'll need extra overflow \ + * handling later. \ + */ \ + uint32_t ___bits = -(___m & -___m); \ + ___bits |= ___m >> 32; \ + ___bits = (~___bits) << 1; \ + /* \ + * If ___bits == 0 then setting bit 31 is unavoidable. \ + * Simply apply the maximum possible reduction in that \ + * case. Otherwise the MSB of ___bits indicates the \ + * best reduction we should apply. \ + */ \ + if (!___bits) { \ + ___p /= (___m & -___m); \ + ___m /= (___m & -___m); \ + } else { \ + ___p >>= ilog2(___bits); \ + ___m >>= ilog2(___bits); \ + } \ + /* No bias needed. */ \ + ___bias = 0; \ + } \ + \ + /* \ + * Now we have a combination of 2 conditions: \ + * \ + * 1) whether or not we need to apply a bias, and \ + * \ + * 2) whether or not there might be an overflow in the cross \ + * product determined by (___m & ((1 << 63) | (1 << 31))). \ + * \ + * Select the best way to do (m_bias + m * n) / (1 << 64). \ + * From now on there will be actual runtime code generated. \ + */ \ + ___res = __arch_xprod_64(___m, ___n, ___bias); \ + \ + ___res /= ___p; \ +}) + +#ifndef __arch_xprod_64 +/* + * Default C implementation for __arch_xprod_64() + * + * Prototype: uint64_t __arch_xprod_64(const uint64_t m, uint64_t n, bool bias) + * Semantic: retval = ((bias ? m : 0) + m * n) >> 64 + * + * The product is a 128-bit value, scaled down to 64 bits. + * Assuming constant propagation to optimize away unused conditional code. + * Architectures may provide their own optimized assembly implementation. + */ +static inline uint64_t __arch_xprod_64(const uint64_t m, uint64_t n, bool bias) +{ + uint32_t m_lo = m; + uint32_t m_hi = m >> 32; + uint32_t n_lo = n; + uint32_t n_hi = n >> 32; + uint64_t res; + uint32_t res_lo, res_hi, tmp; + + if (!bias) { + res = ((uint64_t)m_lo * n_lo) >> 32; + } else if (!(m & ((1ULL << 63) | (1ULL << 31)))) { + /* there can't be any overflow here */ + res = (m + (uint64_t)m_lo * n_lo) >> 32; + } else { + res = m + (uint64_t)m_lo * n_lo; + res_lo = res >> 32; + res_hi = (res_lo < m_hi); + res = res_lo | ((uint64_t)res_hi << 32); + } + + if (!(m & ((1ULL << 63) | (1ULL << 31)))) { + /* there can't be any overflow here */ + res += (uint64_t)m_lo * n_hi; + res += (uint64_t)m_hi * n_lo; + res >>= 32; + } else { + res += (uint64_t)m_lo * n_hi; + tmp = res >> 32; + res += (uint64_t)m_hi * n_lo; + res_lo = res >> 32; + res_hi = (res_lo < tmp); + res = res_lo | ((uint64_t)res_hi << 32); + } + + res += (uint64_t)m_hi * n_hi; + + return res; +} +#endif + +#ifndef __div64_32 extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor); +#endif /* The unnecessary pointer compare is there * to check for type safety (n must be 64bit) @@ -28,7 +224,19 @@ extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor); uint32_t __base = (base); \ uint32_t __rem; \ (void)(((typeof((n)) *)0) == ((uint64_t *)0)); \ - if (((n) >> 32) == 0) { \ + if (__builtin_constant_p(__base) && \ + is_power_of_2(__base)) { \ + __rem = (n) & (__base - 1); \ + (n) >>= ilog2(__base); \ + } else if (__div64_const32_is_OK && \ + __builtin_constant_p(__base) && \ + __base != 0) { \ + uint32_t __res_lo, __n_lo = (n); \ + (n) = __div64_const32(n, __base); \ + /* the remainder can be computed with 32-bit regs */ \ + __res_lo = (n); \ + __rem = __n_lo - __res_lo * __base; \ + } else if (likely(((n) >> 32) == 0)) { \ __rem = (uint32_t)(n) % __base; \ (n) = (uint32_t)(n) / __base; \ } else \ @@ -36,4 +244,10 @@ extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor); __rem; \ }) +#else /* BITS_PER_LONG == ?? */ + +# error do_div() does not yet support the C64 + +#endif /* BITS_PER_LONG */ + #endif /* _ASM_GENERIC_DIV64_H */ diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h index 76e6d0dc11..a4b0dc4b43 100644 --- a/include/asm-generic/io.h +++ b/include/asm-generic/io.h @@ -11,6 +11,7 @@ #ifndef __ASM_GENERIC_IO_H #define __ASM_GENERIC_IO_H +#include <linux/string.h> /* for memset() and memcpy() */ #include <linux/types.h> #include <asm/byteorder.h> @@ -424,4 +425,58 @@ static inline void iowrite64be(u64 value, volatile void __iomem *addr) #define IOMEM(addr) ((void __force __iomem *)(addr)) #endif +#define __io_virt(x) ((void __force *)(x)) + +#ifndef memset_io +#define memset_io memset_io +/** + * memset_io Set a range of I/O memory to a constant value + * @addr: The beginning of the I/O-memory range to set + * @val: The value to set the memory to + * @count: The number of bytes to set + * + * Set a range of I/O memory to a given value. + */ +static inline void memset_io(volatile void __iomem *addr, int value, + size_t size) +{ + memset(__io_virt(addr), value, size); +} +#endif + +#ifndef memcpy_fromio +#define memcpy_fromio memcpy_fromio +/** + * memcpy_fromio Copy a block of data from I/O memory + * @dst: The (RAM) destination for the copy + * @src: The (I/O memory) source for the data + * @count: The number of bytes to copy + * + * Copy a block of data from I/O memory. + */ +static inline void memcpy_fromio(void *buffer, + const volatile void __iomem *addr, + size_t size) +{ + memcpy(buffer, __io_virt(addr), size); +} +#endif + +#ifndef memcpy_toio +#define memcpy_toio memcpy_toio +/** + * memcpy_toio Copy a block of data into I/O memory + * @dst: The (I/O memory) destination for the copy + * @src: The (RAM) source for the data + * @count: The number of bytes to copy + * + * Copy a block of data to I/O memory. + */ +static inline void memcpy_toio(volatile void __iomem *addr, const void *buffer, + size_t size) +{ + memcpy(__io_virt(addr), buffer, size); +} +#endif + #endif /* __ASM_GENERIC_IO_H */ diff --git a/include/ata_drive.h b/include/ata_drive.h index eae74db855..6b8915c9cb 100644 --- a/include/ata_drive.h +++ b/include/ata_drive.h @@ -115,8 +115,8 @@ struct ata_port; struct ata_port_operations { int (*init)(struct ata_port *port); - int (*read)(struct ata_port *port, void *buf, unsigned int block, int num_blocks); - int (*write)(struct ata_port *port, const void *buf, unsigned int block, int num_blocks); + int (*read)(struct ata_port *port, void *buf, sector_t block, blkcnt_t num_blocks); + int (*write)(struct ata_port *port, const void *buf, sector_t block, blkcnt_t num_blocks); int (*read_id)(struct ata_port *port, void *buf); int (*reset)(struct ata_port *port); }; diff --git a/include/block.h b/include/block.h index a1de266194..d3a154bf73 100644 --- a/include/block.h +++ b/include/block.h @@ -4,12 +4,13 @@ #include <driver.h> #include <linux/list.h> +#include <linux/types.h> struct block_device; struct block_device_ops { - int (*read)(struct block_device *, void *buf, int block, int num_blocks); - int (*write)(struct block_device *, const void *buf, int block, int num_blocks); + int (*read)(struct block_device *, void *buf, sector_t block, blkcnt_t num_blocks); + int (*write)(struct block_device *, const void *buf, sector_t block, blkcnt_t num_blocks); int (*flush)(struct block_device *); }; @@ -20,12 +21,12 @@ struct block_device { struct list_head list; struct block_device_ops *ops; int blockbits; - int num_blocks; + blkcnt_t num_blocks; int rdbufsize; int blkmask; - loff_t discard_start; - loff_t discard_size; + sector_t discard_start; + blkcnt_t discard_size; struct list_head buffered_blocks; struct list_head idle_blocks; @@ -40,8 +41,8 @@ extern struct list_head block_device_list; int blockdevice_register(struct block_device *blk); int blockdevice_unregister(struct block_device *blk); -int block_read(struct block_device *blk, void *buf, int block, int num_blocks); -int block_write(struct block_device *blk, void *buf, int block, int num_blocks); +int block_read(struct block_device *blk, void *buf, sector_t block, blkcnt_t num_blocks); +int block_write(struct block_device *blk, void *buf, sector_t block, blkcnt_t num_blocks); static inline int block_flush(struct block_device *blk) { diff --git a/include/efi.h b/include/efi.h index 5698a84145..b9f3428dc5 100644 --- a/include/efi.h +++ b/include/efi.h @@ -257,7 +257,8 @@ typedef struct { efi_status_t (EFIAPI *open_protocol)(efi_handle_t handle, efi_guid_t *protocol, void ** interface, efi_handle_t agent_handle, efi_handle_t controller_handle, u32 attributes); - void *close_protocol; + efi_status_t (EFIAPI *close_protocol)(efi_handle_t handle, efi_guid_t *protocol, + efi_handle_t agent, efi_handle_t controller); efi_status_t(EFIAPI *open_protocol_information)(efi_handle_t handle, efi_guid_t *Protocol, struct efi_open_protocol_information_entry **entry_buffer, unsigned long *entry_count); diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 787571a5a0..9ccdd60224 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -6,7 +6,7 @@ #include <linux/bug.h> #include <linux/barebox-wrapper.h> #include <linux/limits.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #define ALIGN(x, a) __ALIGN_MASK(x, (typeof(x))(a) - 1) #define ALIGN_DOWN(x, a) ALIGN((x) - ((a) - 1), (a)) diff --git a/include/linux/math64.h b/include/linux/math64.h index e8b737e70e..8537c0412d 100644 --- a/include/linux/math64.h +++ b/include/linux/math64.h @@ -3,6 +3,7 @@ #define _LINUX_MATH64_H #include <linux/types.h> +#include <linux/compiler.h> #include <asm-generic/div64.h> #if BITS_PER_LONG == 64 diff --git a/include/linux/mtd/mtd-abi.h b/include/linux/mtd/mtd-abi.h index 6ad34c8912..b7a8955880 100644 --- a/include/linux/mtd/mtd-abi.h +++ b/include/linux/mtd/mtd-abi.h @@ -7,7 +7,7 @@ #ifndef __MTD_ABI_H__ #define __MTD_ABI_H__ -#include <asm-generic/div64.h> +#include <linux/math64.h> struct erase_info_user { uint64_t start; diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 0d977fea25..b17e590f5e 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -15,7 +15,7 @@ #include <linux/types.h> #include <linux/list.h> #include <linux/mtd/mtd-abi.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #define MTD_CHAR_MAJOR 90 #define MTD_BLOCK_MAJOR 31 diff --git a/include/linux/types.h b/include/linux/types.h index fa7684e31e..5716a4c92f 100644 --- a/include/linux/types.h +++ b/include/linux/types.h @@ -166,13 +166,8 @@ typedef __u32 __bitwise __wsum; * * blkcnt_t is the type of the inode's block count. */ -#ifdef CONFIG_LBDAF typedef u64 sector_t; typedef u64 blkcnt_t; -#else -typedef unsigned long sector_t; -typedef unsigned long blkcnt_t; -#endif /* * The type of an index into the pagecache. diff --git a/include/pbl.h b/include/pbl.h index 5e971f8656..194d5e7508 100644 --- a/include/pbl.h +++ b/include/pbl.h @@ -32,4 +32,6 @@ ssize_t pbl_fat_load(struct pbl_bio *, const char *filename, void *dest, size_t #define IN_PBL 0 #endif +void fdt_find_mem(const void *fdt, unsigned long *membase, unsigned long *memsize); + #endif /* __PBL_H__ */ diff --git a/include/printk.h b/include/printk.h index 9941ddb12c..f92e477298 100644 --- a/include/printk.h +++ b/include/printk.h @@ -160,4 +160,32 @@ extern void print_hex_dump(const char *level, const char *prefix_str, int prefix_type, int rowsize, int groupsize, const void *buf, size_t len, bool ascii); +#if LOGLEVEL <= MSG_DEBUG +#define print_hex_dump_debug(prefix_str, prefix_type, rowsize, \ + groupsize, buf, len, ascii) \ + print_hex_dump(KERN_DEBUG, prefix_str, prefix_type, rowsize, \ + groupsize, buf, len, ascii) +#else +static inline void print_hex_dump_debug(const char *prefix_str, int prefix_type, + int rowsize, int groupsize, + const void *buf, size_t len, bool ascii) +{ +} +#endif + +/** + * print_hex_dump_bytes - shorthand form of print_hex_dump() with default params + * @prefix_str: string to prefix each line with; + * caller supplies trailing spaces for alignment if desired + * @prefix_type: controls whether prefix of an offset, address, or none + * is printed (%DUMP_PREFIX_OFFSET, %DUMP_PREFIX_ADDRESS, %DUMP_PREFIX_NONE) + * @buf: data blob to dump + * @len: number of bytes in the @buf + * + * Calls print_hex_dump(), with log level of KERN_DEBUG, + * rowsize of 16, groupsize of 1, and ASCII output included. + */ +#define print_hex_dump_bytes(prefix_str, prefix_type, buf, len) \ + print_hex_dump_debug(prefix_str, prefix_type, 16, 1, buf, len, true) + #endif diff --git a/include/progress.h b/include/progress.h index 75aa9c4f86..50b15fb12b 100644 --- a/include/progress.h +++ b/include/progress.h @@ -2,15 +2,17 @@ #ifndef __PROGRSS_H #define __PROGRSS_H +#include <linux/types.h> + /* Initialize a progress bar. If max > 0 a one line progress * bar is printed where 'max' corresponds to 100%. If max == 0 * a multi line progress bar is printed. */ -void init_progression_bar(int max); +void init_progression_bar(loff_t max); /* update a progress bar to a new value. If now < 0 then a * spinner is printed. */ -void show_progress(int now); +void show_progress(loff_t now); #endif /* __PROGRSS_H */ diff --git a/include/regulator.h b/include/regulator.h index 7c2a01b687..bbe8dd91d8 100644 --- a/include/regulator.h +++ b/include/regulator.h @@ -51,6 +51,9 @@ struct regulator_bulk_data { * @disable_val: Disabling value for control when using regmap enable/disable ops * @enable_is_inverted: A flag to indicate set enable_mask bits to disable * when using regulator_enable_regmap and friends APIs. + * @volt_table: Voltage mapping table (if table based mapping) + * @fixed_uV: Fixed voltage of rails. + * @off_on_delay: guard time (in uS), before re-enabling a regulator */ struct regulator_desc { @@ -73,6 +76,9 @@ struct regulator_desc { const struct regulator_linear_range *linear_ranges; int n_linear_ranges; + const unsigned int *volt_table; + int fixed_uV; + unsigned int off_on_delay; }; struct regulator_dev { @@ -92,6 +98,9 @@ struct regulator_ops { int (*list_voltage) (struct regulator_dev *, unsigned int); int (*set_voltage_sel) (struct regulator_dev *, unsigned int); int (*map_voltage)(struct regulator_dev *, int min_uV, int max_uV); + + int (*get_voltage) (struct regulator_dev *); + int (*get_voltage_sel) (struct regulator_dev *); }; /* @@ -166,12 +175,26 @@ int regulator_bulk_disable(int num_consumers, void regulator_bulk_free(int num_consumers, struct regulator_bulk_data *consumers); +/** + * regulator_get_voltage - get regulator output voltage + * @regulator: regulator source + * + * This returns the current regulator voltage in uV. + * + * NOTE: If the regulator is disabled it will return the voltage value. This + * function should not be used to determine regulator state. + */ +int regulator_get_voltage(struct regulator *regulator); + /* * Helper functions intended to be used by regulator drivers prior registering * their regulators. */ int regulator_desc_list_voltage_linear_range(const struct regulator_desc *desc, unsigned int selector); + +int regulator_list_voltage_table(struct regulator_dev *rdev, + unsigned int selector); #else static inline struct regulator *regulator_get(struct device_d *dev, const char *id) @@ -223,6 +246,11 @@ static inline void regulator_bulk_free(int num_consumers, { } +static inline int regulator_get_voltage(struct regulator *regulator) +{ + return -EINVAL; +} + #endif #endif /* __REGULATOR_H */ diff --git a/include/soc/imx/imx-nand-bcb.h b/include/soc/imx/imx-nand-bcb.h new file mode 100644 index 0000000000..b60205bd59 --- /dev/null +++ b/include/soc/imx/imx-nand-bcb.h @@ -0,0 +1,80 @@ +#ifndef __MACH_IMX_NAND_BCB_H +#define __MACH_IMX_NAND_BCB_H + +#define FCB_FINGERPRINT 0x20424346 /* 'FCB' */ +#define FCB_VERSION_1 0x01000000 +#define FCB_FINGERPRINT_OFF 0x4 /* FCB fingerprint offset*/ + +#define DBBT_FINGERPRINT 0x54424244 /* 'DBBT' */ +#define DBBT_VERSION_1 0x01000000 +#define DBBT_FINGERPRINT_OFF 0x4 /* DBBT fingerprint offset*/ + +struct dbbt_block { + uint32_t Checksum; + uint32_t FingerPrint; + uint32_t Version; + uint32_t numberBB; /* reserved on i.MX6 */ + uint32_t DBBTNumOfPages; +}; + +struct fcb_block { + uint32_t Checksum; /* First fingerprint in first byte */ + uint32_t FingerPrint; /* 2nd fingerprint at byte 4 */ + uint32_t Version; /* 3rd fingerprint at byte 8 */ + uint8_t DataSetup; + uint8_t DataHold; + uint8_t AddressSetup; + uint8_t DSAMPLE_TIME; + /* These are for application use only and not for ROM. */ + uint8_t NandTimingState; + uint8_t REA; + uint8_t RLOH; + uint8_t RHOH; + uint32_t PageDataSize; /* 2048 for 2K pages, 4096 for 4K pages */ + uint32_t TotalPageSize; /* 2112 for 2K pages, 4314 for 4K pages */ + uint32_t SectorsPerBlock; /* Number of 2K sections per block */ + uint32_t NumberOfNANDs; /* Total Number of NANDs - not used by ROM */ + uint32_t TotalInternalDie; /* Number of separate chips in this NAND */ + uint32_t CellType; /* MLC or SLC */ + uint32_t EccBlockNEccType; /* Type of ECC, can be one of BCH-0-20 */ + uint32_t EccBlock0Size; /* Number of bytes for Block0 - BCH */ + uint32_t EccBlockNSize; /* Block size in bytes for all blocks other than Block0 - BCH */ + uint32_t EccBlock0EccType; /* Ecc level for Block 0 - BCH */ + uint32_t MetadataBytes; /* Metadata size - BCH */ + uint32_t NumEccBlocksPerPage; /* Number of blocks per page for ROM use - BCH */ + uint32_t EccBlockNEccLevelSDK; /* Type of ECC, can be one of BCH-0-20 */ + uint32_t EccBlock0SizeSDK; /* Number of bytes for Block0 - BCH */ + uint32_t EccBlockNSizeSDK; /* Block size in bytes for all blocks other than Block0 - BCH */ + uint32_t EccBlock0EccLevelSDK; /* Ecc level for Block 0 - BCH */ + uint32_t NumEccBlocksPerPageSDK;/* Number of blocks per page for SDK use - BCH */ + uint32_t MetadataBytesSDK; /* Metadata size - BCH */ + uint32_t EraseThreshold; /* To set into BCH_MODE register */ + uint32_t BootPatch; /* 0 for normal boot and 1 to load patch starting next to FCB */ + uint32_t PatchSectors; /* Size of patch in sectors */ + uint32_t Firmware1_startingPage;/* Firmware image starts on this sector */ + uint32_t Firmware2_startingPage;/* Secondary FW Image starting Sector */ + uint32_t PagesInFirmware1; /* Number of sectors in firmware image */ + uint32_t PagesInFirmware2; /* Number of sector in secondary FW image */ + uint32_t DBBTSearchAreaStartAddress; /* Page address where dbbt search area begins */ + uint32_t BadBlockMarkerByte; /* Byte in page data that have manufacturer marked bad block marker, */ + /* this will be swapped with metadata[0] to complete page data. */ + uint32_t BadBlockMarkerStartBit;/* For BCH ECC sizes other than 8 and 16 the bad block marker does not */ + /* start at 0th bit of BadBlockMarkerByte. This field is used to get to */ + /* the start bit of bad block marker byte with in BadBlockMarkerByte */ + uint32_t BBMarkerPhysicalOffset;/* FCB value that gives byte offset for bad block marker on physical NAND page */ + uint32_t BCHType; + + uint32_t TMTiming2_ReadLatency; + uint32_t TMTiming2_PreambleDelay; + uint32_t TMTiming2_CEDelay; + uint32_t TMTiming2_PostambleDelay; + uint32_t TMTiming2_CmdAddPause; + uint32_t TMTiming2_DataPause; + uint32_t TMSpeed; + uint32_t TMTiming1_BusyTimeout; + + uint32_t DISBBM; /* the flag to enable (1)/disable(0) bi swap */ + uint32_t BBMarkerPhysicalOffsetInSpareData; /* The swap position of main area in spare area */ +}; + +#endif /* __MACH_IMX_NAND_BCB_H */ diff --git a/include/watchdog.h b/include/watchdog.h index 4d755a5a79..281885686e 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -22,8 +22,11 @@ struct watchdog { struct device_d dev; unsigned int priority; unsigned int timeout_max; + unsigned int timeout_cur; unsigned int poller_timeout_cur; unsigned int poller_enable; + uint64_t last_ping; + int seconds_to_expire; struct poller_async poller; struct list_head list; int running; /* enum wdog_hw_running */ diff --git a/lib/Makefile b/lib/Makefile index 9c6f4133d7..9b37d847e0 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -9,8 +9,6 @@ obj-y += kstrtox.o obj-y += vsprintf.o obj-$(CONFIG_KASAN) += kasan/ pbl-$(CONFIG_PBL_CONSOLE) += vsprintf.o -obj-y += div64.o -pbl-y += div64.o obj-y += misc.o obj-$(CONFIG_PARAMETER) += parameter.o obj-y += xfuncs.o diff --git a/lib/div64.c b/lib/div64.c deleted file mode 100644 index 0196725ce9..0000000000 --- a/lib/div64.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (C) 2003 Bernardo Innocenti <bernie@develer.com> - * - * Based on former do_div() implementation from asm-parisc/div64.h: - * Copyright (C) 1999 Hewlett-Packard Co - * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com> - * - * - * Generic C version of 64bit/32bit division and modulo, with - * 64bit result and 32bit remainder. - * - * The fast case for (n>>32 == 0) is handled inline by do_div(). - * - * Code generated for this function might be very inefficient - * for some CPUs. __div64_32() can be overridden by linking arch-specific - * assembly versions such as arch/ppc/lib/div64.S and arch/sh/lib/div64.S. - */ - -#include <linux/types.h> - -#include <asm-generic/div64.h> - -uint32_t __div64_32(uint64_t *n, uint32_t base) -{ - uint64_t rem = *n; - uint64_t b = base; - uint64_t res, d = 1; - uint32_t high = rem >> 32; - - /* Reduce the thing a bit first */ - res = 0; - if (high >= base) { - high /= base; - res = (uint64_t) high << 32; - rem -= (uint64_t) (high*base) << 32; - } - - while ((int64_t)b > 0 && b < rem) { - b = b+b; - d = d+d; - } - - do { - if (rem >= b) { - rem -= b; - res += d; - } - b >>= 1; - d >>= 1; - } while (d); - - *n = res; - return rem; -} diff --git a/lib/libfile.c b/lib/libfile.c index 20bb689a79..4ab8db11ad 100644 --- a/lib/libfile.c +++ b/lib/libfile.c @@ -332,7 +332,7 @@ int copy_file(const char *src, const char *dst, int verbose) int r, s; int ret = 1, err1 = 0; int mode; - int total = 0; + loff_t total = 0; struct stat srcstat, dststat; rw_buf = xmalloc(RW_BUF_SIZE); diff --git a/lib/libscan.c b/lib/libscan.c index c4139e69d1..ad2e3df341 100644 --- a/lib/libscan.c +++ b/lib/libscan.c @@ -31,7 +31,7 @@ #include <mtd/ubi-user.h> #include <mtd/utils.h> #include <mtd/ubi-media.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> int libscan_ubi_scan(struct mtd_info *mtd, struct ubi_scan_info **info, int verbose) diff --git a/lib/math/Makefile b/lib/math/Makefile index 3341a8e474..c2c892dd55 100644 --- a/lib/math/Makefile +++ b/lib/math/Makefile @@ -1 +1,2 @@ obj-y += div64.o +pbl-y += div64.o diff --git a/lib/show_progress.c b/lib/show_progress.c index 85085790f6..1be06ea780 100644 --- a/lib/show_progress.c +++ b/lib/show_progress.c @@ -17,15 +17,15 @@ #include <common.h> #include <fs.h> #include <progress.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> -#define HASHES_PER_LINE 65 +#define HASHES_PER_LINE 64 -static int printed; -static int progress_max; -static int spin; +static loff_t printed; +static loff_t progress_max; +static unsigned spin; -void show_progress(int now) +void show_progress(loff_t now) { char spinchr[] = "\\|/-"; @@ -35,9 +35,8 @@ void show_progress(int now) } if (progress_max && progress_max != FILESIZE_MAX) { - uint64_t tmp = (int64_t)now * HASHES_PER_LINE; - do_div(tmp, progress_max); - now = tmp; + uint64_t tmp = now * HASHES_PER_LINE; + now = div64_u64(tmp, progress_max); } while (printed < now) { @@ -48,7 +47,7 @@ void show_progress(int now) } } -void init_progression_bar(int max) +void init_progression_bar(loff_t max) { printed = 0; progress_max = max; diff --git a/lib/vsprintf.c b/lib/vsprintf.c index 4834501ff1..1d82adc733 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -13,7 +13,7 @@ #include <linux/types.h> #include <linux/string.h> #include <linux/ctype.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <malloc.h> #include <kallsyms.h> diff --git a/net/sntp.c b/net/sntp.c index 45449fd95b..08da012f36 100644 --- a/net/sntp.c +++ b/net/sntp.c @@ -3,7 +3,7 @@ #include <common.h> #include <asm/byteorder.h> #include <asm/unaligned.h> -#include <asm-generic/div64.h> +#include <linux/math64.h> #include <command.h> #include <clock.h> #include <net.h> diff --git a/pbl/Makefile b/pbl/Makefile index c5a08c1354..9faa56ac91 100644 --- a/pbl/Makefile +++ b/pbl/Makefile @@ -4,4 +4,5 @@ pbl-y += misc.o pbl-y += string.o pbl-y += decomp.o +pbl-$(CONFIG_LIBFDT) += fdt.o pbl-$(CONFIG_PBL_CONSOLE) += console.o diff --git a/pbl/fdt.c b/pbl/fdt.c new file mode 100644 index 0000000000..b4a40a514b --- /dev/null +++ b/pbl/fdt.c @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0 +#include <linux/libfdt.h> +#include <pbl.h> +#include <printk.h> + +void fdt_find_mem(const void *fdt, unsigned long *membase, unsigned long *memsize) +{ + const __be32 *nap, *nsp, *reg; + uint32_t na, ns; + uint64_t memsize64, membase64; + int node, size, i; + + /* Make sure FDT blob is sane */ + if (fdt_check_header(fdt) != 0) { + pr_err("Invalid device tree blob\n"); + goto err; + } + + /* Find the #address-cells and #size-cells properties */ + node = fdt_path_offset(fdt, "/"); + if (node < 0) { + pr_err("Cannot find root node\n"); + goto err; + } + + nap = fdt_getprop(fdt, node, "#address-cells", &size); + if (!nap || (size != 4)) { + pr_err("Cannot find #address-cells property"); + goto err; + } + na = fdt32_to_cpu(*nap); + + nsp = fdt_getprop(fdt, node, "#size-cells", &size); + if (!nsp || (size != 4)) { + pr_err("Cannot find #size-cells property"); + goto err; + } + ns = fdt32_to_cpu(*nap); + + /* Find the memory range */ + node = fdt_node_offset_by_prop_value(fdt, -1, "device_type", + "memory", sizeof("memory")); + if (node < 0) { + pr_err("Cannot find memory node\n"); + goto err; + } + + reg = fdt_getprop(fdt, node, "reg", &size); + if (size < (na + ns) * sizeof(u32)) { + pr_err("cannot get memory range\n"); + goto err; + } + + membase64 = 0; + for (i = 0; i < na; i++) + membase64 = (membase64 << 32) | fdt32_to_cpu(*reg++); + + /* get the memsize and truncate it to under 4G on 32 bit machines */ + memsize64 = 0; + for (i = 0; i < ns; i++) + memsize64 = (memsize64 << 32) | fdt32_to_cpu(*reg++); + + *membase = membase64; + *memsize = memsize64; + + return; +err: + pr_err("No memory, cannot continue\n"); + while (1); +} diff --git a/scripts/bareboxcrc32.c b/scripts/bareboxcrc32.c index 409e1cbba3..6d39fa047d 100644 --- a/scripts/bareboxcrc32.c +++ b/scripts/bareboxcrc32.c @@ -1,18 +1,7 @@ -/* - * bareboxcrc32.c - generate crc32 checksum in little endian - * - * Copyright (c) 2013 Michael Grzeschik <mgr@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2013 Michael Grzeschik <mgr@pengutronix.de> + +/* bareboxcrc32.c - generate crc32 checksum in little endian */ #include <stdio.h> #include <sys/types.h> diff --git a/scripts/bareboxenv.c b/scripts/bareboxenv.c index 3c743435fe..bdff644335 100644 --- a/scripts/bareboxenv.c +++ b/scripts/bareboxenv.c @@ -1,18 +1,7 @@ -/* - * bareboxenv.c - generate or read a barebox environment archive - * - * Copyright (c) 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + +/* bareboxenv.c - generate or read a barebox environment archive */ #include <stdio.h> #include <sys/types.h> diff --git a/scripts/bareboximd.c b/scripts/bareboximd.c index 0500e01cc2..9558c77d1a 100644 --- a/scripts/bareboximd.c +++ b/scripts/bareboximd.c @@ -1,17 +1,5 @@ -/* - * (C) Copyright 2014 Sascha Hauer, Pengutronix - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2014 Sascha Hauer, Pengutronix #include <stdio.h> #include <sys/types.h> diff --git a/scripts/clang-tools/gen_compile_commands.py b/scripts/clang-tools/gen_compile_commands.py new file mode 100755 index 0000000000..7ed3919f45 --- /dev/null +++ b/scripts/clang-tools/gen_compile_commands.py @@ -0,0 +1,237 @@ +#!/usr/bin/env python +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) Google LLC, 2018 +# +# Author: Tom Roeder <tmroeder@google.com> +# +"""A tool for generating compile_commands.json in the Linux kernel.""" + +import argparse +import json +import logging +import os +import sys +import re +import subprocess + +_DEFAULT_OUTPUT = 'compile_commands.json' +_DEFAULT_LOG_LEVEL = 'WARNING' + +_FILENAME_PATTERN = r'^\..*\.cmd$' +_LINE_PATTERN = r'^cmd_[^ ]*\.o := (.* )([^ ]*\.c)$' +_VALID_LOG_LEVELS = ['DEBUG', 'INFO', 'WARNING', 'ERROR', 'CRITICAL'] + + +def parse_arguments(): + """Sets up and parses command-line arguments. + + Returns: + log_level: A logging level to filter log output. + directory: The work directory where the objects were built. + ar: Command used for parsing .a archives. + output: Where to write the compile-commands JSON file. + paths: The list of files/directories to handle to find .cmd files. + """ + usage = 'Creates a compile_commands.json database from kernel .cmd files' + parser = argparse.ArgumentParser(description=usage) + + directory_help = ('specify the output directory used for the kernel build ' + '(defaults to the working directory)') + parser.add_argument('-d', '--directory', type=str, default='.', + help=directory_help) + + output_help = ('path to the output command database (defaults to ' + + _DEFAULT_OUTPUT + ')') + parser.add_argument('-o', '--output', type=str, default=_DEFAULT_OUTPUT, + help=output_help) + + log_level_help = ('the level of log messages to produce (defaults to ' + + _DEFAULT_LOG_LEVEL + ')') + parser.add_argument('--log_level', choices=_VALID_LOG_LEVELS, + default=_DEFAULT_LOG_LEVEL, help=log_level_help) + + ar_help = 'command used for parsing .a archives' + parser.add_argument('-a', '--ar', type=str, default='llvm-ar', help=ar_help) + + paths_help = ('directories to search or files to parse ' + '(files should be *.o, *.a, or modules.order). ' + 'If nothing is specified, the current directory is searched') + parser.add_argument('paths', type=str, nargs='*', help=paths_help) + + args = parser.parse_args() + + return (args.log_level, + os.path.abspath(args.directory), + args.output, + args.ar, + args.paths if len(args.paths) > 0 else [args.directory]) + + +def cmdfiles_in_dir(directory): + """Generate the iterator of .cmd files found under the directory. + + Walk under the given directory, and yield every .cmd file found. + + Args: + directory: The directory to search for .cmd files. + + Yields: + The path to a .cmd file. + """ + + filename_matcher = re.compile(_FILENAME_PATTERN) + + for dirpath, _, filenames in os.walk(directory): + for filename in filenames: + if filename_matcher.match(filename): + yield os.path.join(dirpath, filename) + + +def to_cmdfile(path): + """Return the path of .cmd file used for the given build artifact + + Args: + Path: file path + + Returns: + The path to .cmd file + """ + dir, base = os.path.split(path) + return os.path.join(dir, '.' + base + '.cmd') + + +def cmdfiles_for_o(obj): + """Generate the iterator of .cmd files associated with the object + + Yield the .cmd file used to build the given object + + Args: + obj: The object path + + Yields: + The path to .cmd file + """ + yield to_cmdfile(obj) + + +def cmdfiles_for_a(archive, ar): + """Generate the iterator of .cmd files associated with the archive. + + Parse the given archive, and yield every .cmd file used to build it. + + Args: + archive: The archive to parse + + Yields: + The path to every .cmd file found + """ + for obj in subprocess.check_output([ar, '-t', archive]).decode().split(): + yield to_cmdfile(obj) + + +def cmdfiles_for_modorder(modorder): + """Generate the iterator of .cmd files associated with the modules.order. + + Parse the given modules.order, and yield every .cmd file used to build the + contained modules. + + Args: + modorder: The modules.order file to parse + + Yields: + The path to every .cmd file found + """ + with open(modorder) as f: + for line in f: + ko = line.rstrip() + base, ext = os.path.splitext(ko) + if ext != '.ko': + sys.exit('{}: module path must end with .ko'.format(ko)) + mod = base + '.mod' + # The first line of *.mod lists the objects that compose the module. + with open(mod) as m: + for obj in m.readline().split(): + yield to_cmdfile(obj) + + +def process_line(root_directory, command_prefix, file_path): + """Extracts information from a .cmd line and creates an entry from it. + + Args: + root_directory: The directory that was searched for .cmd files. Usually + used directly in the "directory" entry in compile_commands.json. + command_prefix: The extracted command line, up to the last element. + file_path: The .c file from the end of the extracted command. + Usually relative to root_directory, but sometimes absolute. + + Returns: + An entry to append to compile_commands. + + Raises: + ValueError: Could not find the extracted file based on file_path and + root_directory or file_directory. + """ + # The .cmd files are intended to be included directly by Make, so they + # escape the pound sign '#', either as '\#' or '$(pound)' (depending on the + # kernel version). The compile_commands.json file is not interepreted + # by Make, so this code replaces the escaped version with '#'. + prefix = command_prefix.replace('\#', '#').replace('$(pound)', '#') + + # Use os.path.abspath() to normalize the path resolving '.' and '..' . + abs_path = os.path.abspath(os.path.join(root_directory, file_path)) + if not os.path.exists(abs_path): + raise ValueError('File %s not found' % abs_path) + return { + 'directory': root_directory, + 'file': abs_path, + 'command': prefix + file_path, + } + + +def main(): + """Walks through the directory and finds and parses .cmd files.""" + log_level, directory, output, ar, paths = parse_arguments() + + level = getattr(logging, log_level) + logging.basicConfig(format='%(levelname)s: %(message)s', level=level) + + line_matcher = re.compile(_LINE_PATTERN) + + compile_commands = [] + + for path in paths: + # If 'path' is a directory, handle all .cmd files under it. + # Otherwise, handle .cmd files associated with the file. + # Most of built-in objects are linked via archives (built-in.a or lib.a) + # but some objects are linked to vmlinux directly. + # Modules are listed in modules.order. + if os.path.isdir(path): + cmdfiles = cmdfiles_in_dir(path) + elif path.endswith('.o'): + cmdfiles = cmdfiles_for_o(path) + elif path.endswith('.a'): + cmdfiles = cmdfiles_for_a(path, ar) + elif path.endswith('modules.order'): + cmdfiles = cmdfiles_for_modorder(path) + else: + sys.exit('{}: unknown file type'.format(path)) + + for cmdfile in cmdfiles: + with open(cmdfile, 'rt') as f: + result = line_matcher.match(f.readline()) + if result: + try: + entry = process_line(directory, result.group(1), + result.group(2)) + compile_commands.append(entry) + except ValueError as err: + logging.info('Could not add line from %s: %s', + cmdfile, err) + + with open(output, 'wt') as f: + json.dump(compile_commands, f, indent=2, sort_keys=True) + + +if __name__ == '__main__': + main() diff --git a/scripts/imx/imx.c b/scripts/imx/imx.c index e9f05b83a3..6b8dabd047 100644 --- a/scripts/imx/imx.c +++ b/scripts/imx/imx.c @@ -1,17 +1,5 @@ -/* - * (C) Copyright 2016 Sascha Hauer, Pengutronix - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2016 Sascha Hauer, Pengutronix #define _GNU_SOURCE #include <stdio.h> diff --git a/scripts/include/asm-generic/barrier.h b/scripts/include/asm-generic/barrier.h index 47b933903e..2e78c3f328 100644 --- a/scripts/include/asm-generic/barrier.h +++ b/scripts/include/asm-generic/barrier.h @@ -1,3 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* SPDX-FileCopyrightText: 2007 Red Hat (David Howells <dhowells@redhat.com>) */ + /* * Copied from the kernel sources to tools/perf/: * @@ -5,14 +8,6 @@ * * It should be possible to use these on really simple architectures, * but it serves more as a starting point for new ports. - * - * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public Licence - * as published by the Free Software Foundation; either version - * 2 of the Licence, or (at your option) any later version. */ #ifndef __TOOLS_LINUX_ASM_GENERIC_BARRIER_H #define __TOOLS_LINUX_ASM_GENERIC_BARRIER_H diff --git a/scripts/include/linux/log2.h b/scripts/include/linux/log2.h index 41446668cc..abc38f4c63 100644 --- a/scripts/include/linux/log2.h +++ b/scripts/include/linux/log2.h @@ -1,13 +1,7 @@ -/* Integer base 2 logarithm calculation - * - * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* SPDX-FileCopyrightText: 2006 Red Hat (David Howells <dhowells@redhat.com>) */ + +/* Integer base 2 logarithm calculation */ #ifndef _TOOLS_LINUX_LOG2_H #define _TOOLS_LINUX_LOG2_H diff --git a/scripts/kwbimage.c b/scripts/kwbimage.c index 75c9e9cda9..28c9a68e18 100644 --- a/scripts/kwbimage.c +++ b/scripts/kwbimage.c @@ -1,20 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> + /* * Image manipulator for Marvell SoCs * supports Kirkwood, Dove, Armada 370, and Armada XP * - * (C) Copyright 2013 Thomas Petazzoni - * <thomas.petazzoni@free-electrons.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * * This tool allows to extract and create bootable images for Marvell * Kirkwood, Dove, Armada 370, and Armada XP SoCs. It supports two * versions of the bootable image format: version 0 (used on Marvell diff --git a/scripts/mk-omap-image.c b/scripts/mk-omap-image.c index 234b7e37c2..5741b0afbc 100644 --- a/scripts/mk-omap-image.c +++ b/scripts/mk-omap-image.c @@ -1,22 +1,8 @@ -/* - * mk-am35xx-spi-image.c - convert a barebox image for SPI loading on AM35xx - * - * Copyright (C) 2012 Jan Luebbe <j.luebbe@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2012 Jan Luebbe <j.luebbe@pengutronix.de> + +/* mk-am35xx-spi-image.c - convert a barebox image for SPI loading on AM35xx */ + /** * @file * @brief convert a barebox image for SPI loading on AM35xx diff --git a/scripts/mkimage.c b/scripts/mkimage.c index 7d283c5509..a76c061aee 100644 --- a/scripts/mkimage.c +++ b/scripts/mkimage.c @@ -1,22 +1,6 @@ -/* - * (C) Copyright 2008 Semihalf - * - * (C) Copyright 2000-2004 - * DENX Software Engineering - * Wolfgang Denk, wd@denx.de - * All rights reserved. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2008 Semihalf +// SPDX-FileCopyrightText: 2000-2004 DENX Software Engineering (Wolfgang Denk <wd@denx.de>) #include <sys/stat.h> #include <time.h> diff --git a/scripts/mkublheader.c b/scripts/mkublheader.c index 496ba0b500..db3e284a8a 100644 --- a/scripts/mkublheader.c +++ b/scripts/mkublheader.c @@ -1,22 +1,7 @@ -/* - * mkublheader.c - produce the header needed to load barebox on OMAP-L138 - * - * Copyright (C) 2012 Jan Luebbe <j.luebbe@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2012 Jan Luebbe <j.luebbe@pengutronix.de> + +/* mkublheader.c - produce the header needed to load barebox on OMAP-L138 */ #define _BSD_SOURCE #define _DEFAULT_SOURCE diff --git a/scripts/mod/sumversion.c b/scripts/mod/sumversion.c index d9cc6901d6..b5f1824a69 100644 --- a/scripts/mod/sumversion.c +++ b/scripts/mod/sumversion.c @@ -1,3 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 1997-1998 Andrew Tridgell +// SPDX-FileCopyrightText: Cryptoapi developers. +// SPDX-FileCopyrightText: 2002 David S. Miller <davem@redhat.com> +// SPDX-FileCopyrightText: 2002 James Morris <jmorris@intercode.com.au> + #include <netinet/in.h> #ifdef __sun__ #include <inttypes.h> @@ -20,17 +26,7 @@ * originally based on the public domain implementation written * by Colin Plumb in 1993. * - * Copyright (c) Andrew Tridgell 1997-1998. * Modified by Steve French (sfrench@us.ibm.com) 2002 - * Copyright (c) Cryptoapi developers. - * Copyright (c) 2002 David S. Miller (davem@redhat.com) - * Copyright (c) 2002 James Morris <jmorris@intercode.com.au> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * */ #define MD4_DIGEST_SIZE 16 #define MD4_HMAC_BLOCK_SIZE 64 diff --git a/scripts/omap3-usb-loader.c b/scripts/omap3-usb-loader.c index ae6f1258df..599a93856a 100644 --- a/scripts/omap3-usb-loader.c +++ b/scripts/omap3-usb-loader.c @@ -1,18 +1,8 @@ -/* - * OMAP Loader, a USB uploader application targeted at OMAP3 processors - * Copyright (C) 2008 Martin Mueller <martinmm@pfump.org> - * Copyright (C) 2014 Grant Hernandez <grant.h.hernandez@gmail.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2008 Martin Mueller <martinmm@pfump.org> +// SPDX-FileCopyrightText: 2014 Grant Hernandez <grant.h.hernandez@gmail.com> + +/* OMAP Loader, a USB uploader application targeted at OMAP3 processors */ #include <stdio.h> #include <stdlib.h> diff --git a/scripts/omap4_usbboot.c b/scripts/omap4_usbboot.c index 44236259dc..342efd0c9a 100644 --- a/scripts/omap4_usbboot.c +++ b/scripts/omap4_usbboot.c @@ -1,16 +1,6 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Inspired by: https://github.com/simu/usbboot-omap4.git - */ +// SPDX-License-Identifier: GPL-2.0-or-later + +/* Inspired by: https://github.com/simu/usbboot-omap4.git */ #include <stdio.h> #include <stdlib.h> diff --git a/scripts/omap_signGP.c b/scripts/omap_signGP.c index ac47fdf089..b89414931e 100644 --- a/scripts/omap_signGP.c +++ b/scripts/omap_signGP.c @@ -1,3 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2010 Texas Instruments Incorporated (http://www.ti.com/) + /** * signGP.c - Read the x-load.bin file and write out the x-load.bin.ift file * @@ -5,17 +8,6 @@ * and the load address. If not entered on command line, file name is * assumed to be x-load.bin in current directory and load address is * 0x40200800. - * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 of - * the License as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include <stdio.h> diff --git a/scripts/s5p_cksum.c b/scripts/s5p_cksum.c index 29cf539a28..0f53ee1dd2 100644 --- a/scripts/s5p_cksum.c +++ b/scripts/s5p_cksum.c @@ -1,16 +1,5 @@ -/* - * Copyright (C) 2012 Alexey Galakhov - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 Alexey Galakhov #include <stdio.h> #include <stdint.h> diff --git a/scripts/setupmbr/setupmbr.c b/scripts/setupmbr/setupmbr.c index 1487498f1f..38af550809 100644 --- a/scripts/setupmbr/setupmbr.c +++ b/scripts/setupmbr/setupmbr.c @@ -1,18 +1,5 @@ -/* - * Copyright (C) 2009 Juergen Beisert, Pengutronix - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2009 Juergen Beisert, Pengutronix /** * @file diff --git a/scripts/tegra/bct_dump.c b/scripts/tegra/bct_dump.c index 74f4d595e0..bf4c146bac 100644 --- a/scripts/tegra/bct_dump.c +++ b/scripts/tegra/bct_dump.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION #include "cbootimage.h" #include "data_layout.h" diff --git a/scripts/tegra/cbootimage.c b/scripts/tegra/cbootimage.c index d64f322f11..7714893d28 100644 --- a/scripts/tegra/cbootimage.c +++ b/scripts/tegra/cbootimage.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION /* * cbootimage.c - Implementation of the cbootimage tool. diff --git a/scripts/tegra/cbootimage.h b/scripts/tegra/cbootimage.h index 04d1a8b274..99b37d1563 100644 --- a/scripts/tegra/cbootimage.h +++ b/scripts/tegra/cbootimage.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ /* * cbootimage.h - Definitions for the cbootimage code. diff --git a/scripts/tegra/context.c b/scripts/tegra/context.c index 47e65d570b..93a5e33ce1 100644 --- a/scripts/tegra/context.c +++ b/scripts/tegra/context.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION #include "cbootimage.h" #include "data_layout.h" diff --git a/scripts/tegra/context.h b/scripts/tegra/context.h index bdfa25b451..f0f5d0587a 100644 --- a/scripts/tegra/context.h +++ b/scripts/tegra/context.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ #ifndef INCLUDED_CONTEXT_H #define INCLUDED_CONTEXT_H diff --git a/scripts/tegra/crypto.c b/scripts/tegra/crypto.c index e40f56e474..17d422990b 100644 --- a/scripts/tegra/crypto.c +++ b/scripts/tegra/crypto.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION /* * crypto.c - Cryptography support diff --git a/scripts/tegra/crypto.h b/scripts/tegra/crypto.h index 2220ac8367..db687d0371 100644 --- a/scripts/tegra/crypto.h +++ b/scripts/tegra/crypto.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ /* * crypto.h - Definitions for the crypto support. diff --git a/scripts/tegra/data_layout.c b/scripts/tegra/data_layout.c index 99ae8d92c8..abfbf6efae 100644 --- a/scripts/tegra/data_layout.c +++ b/scripts/tegra/data_layout.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION /* * data_layout.c - Code to manage the layout of data in the boot device. diff --git a/scripts/tegra/data_layout.h b/scripts/tegra/data_layout.h index c708da4a15..002a1ab43e 100644 --- a/scripts/tegra/data_layout.h +++ b/scripts/tegra/data_layout.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ /* * data_layout.h - Definitions for the cbootimage data layout code. diff --git a/scripts/tegra/nvaes_ref.h b/scripts/tegra/nvaes_ref.h index 1d06e71903..7a7e5ec3bf 100644 --- a/scripts/tegra/nvaes_ref.h +++ b/scripts/tegra/nvaes_ref.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ #include "cbootimage.h" #include "string.h" diff --git a/scripts/tegra/parse.c b/scripts/tegra/parse.c index 9180adfda3..d861deed17 100644 --- a/scripts/tegra/parse.c +++ b/scripts/tegra/parse.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION /* * parse.c - Parsing support for the cbootimage tool diff --git a/scripts/tegra/parse.h b/scripts/tegra/parse.h index 7402a1dd98..2d953bb858 100644 --- a/scripts/tegra/parse.h +++ b/scripts/tegra/parse.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ /* * parse.h - Definitions for the cbootimage parsing code. diff --git a/scripts/tegra/set.c b/scripts/tegra/set.c index 1c5e8dda8c..9de879f22e 100644 --- a/scripts/tegra/set.c +++ b/scripts/tegra/set.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION /* * set.c - State setting support for the cbootimage tool diff --git a/scripts/tegra/set.h b/scripts/tegra/set.h index 7e7245aaf4..0b905fd050 100644 --- a/scripts/tegra/set.h +++ b/scripts/tegra/set.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ /* * set.h - Definitions for the cbootimage state setting code. diff --git a/scripts/tegra/t114/nvbctlib_t114.c b/scripts/tegra/t114/nvbctlib_t114.c index 3bda785f57..1085146ee0 100644 --- a/scripts/tegra/t114/nvbctlib_t114.c +++ b/scripts/tegra/t114/nvbctlib_t114.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION #include "../cbootimage.h" #include "../parse.h" diff --git a/scripts/tegra/t114/nvboot_bct_t114.h b/scripts/tegra/t114/nvboot_bct_t114.h index a2a6b865f6..9b8e20ae4a 100644 --- a/scripts/tegra/t114/nvboot_bct_t114.h +++ b/scripts/tegra/t114/nvboot_bct_t114.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ #ifndef INCLUDED_NVBOOT_BCT_T114_H #define INCLUDED_NVBOOT_BCT_T114_H diff --git a/scripts/tegra/t114/nvboot_sdram_param_t114.h b/scripts/tegra/t114/nvboot_sdram_param_t114.h index 78151dcfb8..2f8f0407f1 100644 --- a/scripts/tegra/t114/nvboot_sdram_param_t114.h +++ b/scripts/tegra/t114/nvboot_sdram_param_t114.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ /** * Defines the SDRAM parameter structure. diff --git a/scripts/tegra/t114/parse_t114.c b/scripts/tegra/t114/parse_t114.c index 79c2ed8f53..0f6d4dbcdd 100644 --- a/scripts/tegra/t114/parse_t114.c +++ b/scripts/tegra/t114/parse_t114.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION /* * parse_t114.h - Definitions for the dev/sdram parameters diff --git a/scripts/tegra/t124/nvbctlib_t124.c b/scripts/tegra/t124/nvbctlib_t124.c index 55b840926e..9cc312b2e4 100644 --- a/scripts/tegra/t124/nvbctlib_t124.c +++ b/scripts/tegra/t124/nvbctlib_t124.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2013 NVIDIA CORPORATION #include "../cbootimage.h" #include "../parse.h" diff --git a/scripts/tegra/t124/nvboot_bct_t124.h b/scripts/tegra/t124/nvboot_bct_t124.h index bc07add3db..479ce97654 100644 --- a/scripts/tegra/t124/nvboot_bct_t124.h +++ b/scripts/tegra/t124/nvboot_bct_t124.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2013 NVIDIA CORPORATION */ #ifndef INCLUDED_NVBOOT_BCT_T124_H #define INCLUDED_NVBOOT_BCT_T124_H diff --git a/scripts/tegra/t124/nvboot_sdram_param_t124.h b/scripts/tegra/t124/nvboot_sdram_param_t124.h index bae40b1353..46adba519b 100644 --- a/scripts/tegra/t124/nvboot_sdram_param_t124.h +++ b/scripts/tegra/t124/nvboot_sdram_param_t124.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2013 NVIDIA CORPORATION */ /** * Defines the SDRAM parameter structure. diff --git a/scripts/tegra/t124/parse_t124.c b/scripts/tegra/t124/parse_t124.c index 8468209b61..8a63dd2377 100644 --- a/scripts/tegra/t124/parse_t124.c +++ b/scripts/tegra/t124/parse_t124.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2013 NVIDIA CORPORATION /* * parse_t124.c - The implementation for parsing dev/sdram parameters diff --git a/scripts/tegra/t20/nvbctlib_t20.c b/scripts/tegra/t20/nvbctlib_t20.c index 42ad146755..972c37befe 100644 --- a/scripts/tegra/t20/nvbctlib_t20.c +++ b/scripts/tegra/t20/nvbctlib_t20.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION #include "../cbootimage.h" #include "../parse.h" diff --git a/scripts/tegra/t20/nvboot_bct_t20.h b/scripts/tegra/t20/nvboot_bct_t20.h index bf94d50b40..97ceeed659 100644 --- a/scripts/tegra/t20/nvboot_bct_t20.h +++ b/scripts/tegra/t20/nvboot_bct_t20.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ #ifndef INCLUDED_NVBOOT_BCT_T20_H #define INCLUDED_NVBOOT_BCT_T20_H diff --git a/scripts/tegra/t20/nvboot_sdram_param_t20.h b/scripts/tegra/t20/nvboot_sdram_param_t20.h index de002f0c38..397397a0cd 100644 --- a/scripts/tegra/t20/nvboot_sdram_param_t20.h +++ b/scripts/tegra/t20/nvboot_sdram_param_t20.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ /** * Defines the SDRAM parameter structure. diff --git a/scripts/tegra/t20/parse_t20.c b/scripts/tegra/t20/parse_t20.c index 5db74d5597..c613ecf85e 100644 --- a/scripts/tegra/t20/parse_t20.c +++ b/scripts/tegra/t20/parse_t20.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION /* * parse_t20.c - Parsing code for t20 diff --git a/scripts/tegra/t30/nvbctlib_t30.c b/scripts/tegra/t30/nvbctlib_t30.c index 04e8974fbf..77c4aceb0a 100644 --- a/scripts/tegra/t30/nvbctlib_t30.c +++ b/scripts/tegra/t30/nvbctlib_t30.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION #include "../cbootimage.h" #include "../parse.h" diff --git a/scripts/tegra/t30/nvboot_bct_t30.h b/scripts/tegra/t30/nvboot_bct_t30.h index c5fee4c0a2..5f4997ed8e 100644 --- a/scripts/tegra/t30/nvboot_bct_t30.h +++ b/scripts/tegra/t30/nvboot_bct_t30.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ #ifndef INCLUDED_NVBOOT_BCT_T30_H #define INCLUDED_NVBOOT_BCT_T30_H diff --git a/scripts/tegra/t30/nvboot_sdram_param_t30.h b/scripts/tegra/t30/nvboot_sdram_param_t30.h index 24c176858f..fb0dffa0a0 100644 --- a/scripts/tegra/t30/nvboot_sdram_param_t30.h +++ b/scripts/tegra/t30/nvboot_sdram_param_t30.h @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION */ /** * Defines the SDRAM parameter structure. diff --git a/scripts/tegra/t30/parse_t30.c b/scripts/tegra/t30/parse_t30.c index e5f4e93b28..bd85a96d12 100644 --- a/scripts/tegra/t30/parse_t30.c +++ b/scripts/tegra/t30/parse_t30.c @@ -1,18 +1,5 @@ -/* - * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 NVIDIA CORPORATION /* * parse_t30.h - Definitions for the dev/sdram parameters diff --git a/scripts/zynq_mkimage.c b/scripts/zynq_mkimage.c index a211b79c28..8b95b41960 100644 --- a/scripts/zynq_mkimage.c +++ b/scripts/zynq_mkimage.c @@ -1,16 +1,5 @@ -/* - * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de> #include <endian.h> #include <errno.h> |