diff options
| -rw-r--r-- | arch/arm/mach-omap/include/mach/sys_info.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap/omap3_generic.c | 19 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/mach-omap/include/mach/sys_info.h b/arch/arm/mach-omap/include/mach/sys_info.h index f557068345..f0594bf2b7 100644 --- a/arch/arm/mach-omap/include/mach/sys_info.h +++ b/arch/arm/mach-omap/include/mach/sys_info.h @@ -91,6 +91,7 @@ u32 get_cpu_type(void); u32 get_cpu_rev(void); u32 get_sdr_cs_size(u32 offset); +u32 get_sdr_cs1_base(void); inline u32 get_sysboot_value(void); u32 get_gpmc0_base(void); u32 get_base(void); diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c index 9627a6b1e4..7468441952 100644 --- a/arch/arm/mach-omap/omap3_generic.c +++ b/arch/arm/mach-omap/omap3_generic.c @@ -178,7 +178,26 @@ u32 get_sdr_cs_size(u32 offset) size *= 2 * (1024 * 1024); /* find size in MB */ return size; } +EXPORT_SYMBOL(get_sdr_cs_size); +/** + * @brief base address of chip select 1 (cs0 is defined at 0x80000000) + * + * @return return the CS1 base address. + */ +u32 get_sdr_cs1_base(void) +{ + u32 base; + u32 cs_cfg; + cs_cfg = readl(SDRC_REG(CS_CFG)); + /* get ram size field */ + base = (cs_cfg & 0x0000000F) << 2; /* get CS1STARTHIGH */ + base = base | ((cs_cfg & 0x00000300) >> 8); /* get CS1STARTLOW */ + base = base << 25; + base += 0x80000000; + return base; +} +EXPORT_SYMBOL(get_sdr_cs1_base); /** * @brief Get the initial SYSBOOT value * |