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-rw-r--r--Documentation/boards/rockchip.rst15
-rw-r--r--Makefile2
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/boards/guf-santaro/board.c3
-rw-r--r--arch/arm/boards/netgear-rn2120/board.c2
-rw-r--r--arch/arm/boards/rockchip-rk3568-evb/board.c7
-rw-r--r--arch/arm/boards/skov-imx6/Makefile1
-rw-r--r--arch/arm/boards/skov-imx6/board.c228
-rw-r--r--arch/arm/boards/skov-imx6/defaultenv-skov-imx6/network/eth1-discover8
-rw-r--r--arch/arm/boards/skov-imx6/lowlevel.c6
-rw-r--r--arch/arm/boards/terasic-de0-nano-soc/board.c2
-rw-r--r--arch/arm/boards/terasic-sockit/board.c2
-rw-r--r--arch/arm/configs/stm32mp_defconfig7
-rw-r--r--arch/arm/configs/zynq_defconfig1
-rw-r--r--arch/arm/configs/zynqmp_defconfig1
-rw-r--r--arch/arm/dts/Makefile2
-rw-r--r--arch/arm/dts/imx6qdl-skov-imx6.dtsi20
-rw-r--r--arch/arm/dts/imx6s-skov-imx6.dts22
-rw-r--r--arch/arm/dts/rk3568-evb1-v10.dts22
-rw-r--r--arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts3
-rw-r--r--arch/arm/dts/socfpga_cyclone5_sockit.dts3
-rw-r--r--arch/arm/dts/vexpress-v2p-ca9.dts2
-rw-r--r--arch/arm/include/asm/barebox-arm-head.h2
-rw-r--r--arch/arm/mach-mvebu/kwb_bbu.c2
-rw-r--r--arch/arm/mach-rockchip/Kconfig8
-rw-r--r--arch/arm/mach-rockchip/Makefile1
-rw-r--r--arch/arm/mach-rockchip/atf.c53
-rw-r--r--arch/arm/mach-rockchip/bbu.c141
-rw-r--r--arch/arm/mach-rockchip/include/mach/bbu.h9
-rw-r--r--arch/arm/mach-rockchip/include/mach/rockchip.h2
-rw-r--r--arch/arm/mach-rockchip/rk3568.c16
-rw-r--r--arch/arm/mach-rockchip/rockchip.c15
-rw-r--r--arch/sandbox/configs/hosttools_defconfig1
-rw-r--r--arch/sandbox/configs/targettools_defconfig1
-rw-r--r--commands/md.c4
-rw-r--r--commands/memcmp.c2
-rw-r--r--commands/memcpy.c6
-rw-r--r--commands/memset.c2
-rw-r--r--commands/mm.c2
-rw-r--r--commands/mw.c7
-rw-r--r--commands/nandtest.c6
-rw-r--r--common/bootchooser.c2
-rw-r--r--common/efi/efi-iomem.c40
-rw-r--r--common/imd.c2
-rw-r--r--common/optee.c2
-rw-r--r--common/partitions.c27
-rw-r--r--common/startup.c70
-rw-r--r--common/state/backend_bucket_direct.c2
-rw-r--r--common/state/backend_storage.c2
-rw-r--r--common/state/state_variables.c2
-rw-r--r--drivers/aiodev/core.c2
-rw-r--r--drivers/clk/analogbits/wrpll-cln28hpc.c2
-rw-r--r--drivers/clk/at91/pmc.h2
-rw-r--r--drivers/clk/clk.c8
-rw-r--r--drivers/clk/sifive/sifive-prci.c2
-rw-r--r--drivers/clocksource/Kconfig4
-rw-r--r--drivers/ddr/fsl/Kconfig4
-rw-r--r--drivers/gpio/Kconfig7
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/gpio-sifive.c2
-rw-r--r--drivers/gpio/gpio-starfive-vic.c2
-rw-r--r--drivers/gpio/gpio-zynq.c436
-rw-r--r--drivers/i2c/busses/i2c-imx-early.c2
-rw-r--r--drivers/i2c/i2c.c3
-rw-r--r--drivers/i2c/muxes/i2c-mux-pca954x.c4
-rw-r--r--drivers/mci/dw_mmc.c2
-rw-r--r--drivers/misc/acpi-test.c2
-rw-r--r--drivers/mtd/nand/atmel_nand.c8
-rw-r--r--drivers/mtd/spi-nor/cadence-quadspi.c10
-rw-r--r--drivers/net/designware_eqos.c6
-rw-r--r--drivers/net/ksz8864rmn.c66
-rw-r--r--drivers/net/phy/micrel.c250
-rw-r--r--drivers/net/usb/Kconfig7
-rw-r--r--drivers/net/usb/Makefile1
-rw-r--r--drivers/net/usb/r8152.c1593
-rw-r--r--drivers/net/usb/r8152.h619
-rw-r--r--drivers/net/usb/r8152_fw.c1199
-rw-r--r--drivers/of/partition.c3
-rw-r--r--drivers/of/platform.c5
-rw-r--r--drivers/pci/pci-efi.c9
-rw-r--r--drivers/phy/rockchip/phy-rockchip-inno-usb2.c12
-rw-r--r--drivers/pinctrl/pinctrl-rockchip.c3
-rw-r--r--drivers/pwm/pwm-atmel.c2
-rw-r--r--drivers/regulator/core.c2
-rw-r--r--drivers/reset/reset-socfpga.c5
-rw-r--r--drivers/serial/atmel.c5
-rw-r--r--drivers/soc/sifive/sifive_l2_cache.c2
-rw-r--r--drivers/spi/Kconfig7
-rw-r--r--drivers/spi/Makefile1
-rw-r--r--drivers/spi/stm32_spi.c590
-rw-r--r--drivers/spi/zynq_qspi.c4
-rw-r--r--drivers/usb/dwc3/core.c13
-rw-r--r--drivers/usb/dwc3/core.h2
-rw-r--r--drivers/watchdog/f71808e_wdt.c2
-rw-r--r--dts/Bindings/display/bridge/ti,sn65dsi83.yaml2
-rw-r--r--dts/Bindings/display/bridge/ti,sn65dsi86.yaml2
-rw-r--r--dts/Bindings/display/panel/ilitek,ili9341.yaml2
-rw-r--r--dts/Bindings/media/i2c/ovti,ov5647.yaml2
-rw-r--r--dts/Bindings/media/i2c/ovti,ov9282.yaml2
-rw-r--r--dts/Bindings/media/i2c/sony,imx335.yaml2
-rw-r--r--dts/Bindings/media/i2c/sony,imx412.yaml2
-rw-r--r--dts/Bindings/mfd/brcm,cru.yaml11
-rw-r--r--dts/Bindings/mmc/snps,dwcmshc-sdhci.yaml4
-rw-r--r--dts/Bindings/net/dsa/marvell.txt2
-rw-r--r--dts/Bindings/net/nxp,dwmac-imx.yaml1
-rw-r--r--dts/Bindings/net/snps,dwmac.yaml2
-rw-r--r--dts/Bindings/pci/fsl,imx6q-pcie.yaml1
-rw-r--r--dts/Bindings/pinctrl/brcm,ns-pinmux.yaml33
-rw-r--r--dts/Bindings/spi/snps,dw-apb-ssi.yaml2
-rw-r--r--dts/src/arm/at91-sama5d27_som1_ek.dts1
-rw-r--r--dts/src/arm/at91-sama7g5ek.dts45
-rw-r--r--dts/src/arm/bcm2711-rpi-4-b.dts11
-rw-r--r--dts/src/arm/bcm2711.dtsi12
-rw-r--r--dts/src/arm/bcm2835-common.dtsi8
-rw-r--r--dts/src/arm/bcm283x.dtsi8
-rw-r--r--dts/src/arm/imx53-m53menlo.dts4
-rw-r--r--dts/src/arm/imx6dl-yapp4-common.dtsi5
-rw-r--r--dts/src/arm/imx6qdl-pico.dtsi11
-rw-r--r--dts/src/arm/imx6sx-sdb.dts4
-rw-r--r--dts/src/arm/imx6ul-14x14-evk.dtsi2
-rw-r--r--dts/src/arm/omap3430-sdp.dts2
-rw-r--r--dts/src/arm/qcom-apq8064.dtsi15
-rw-r--r--dts/src/arm/sama7g5.dtsi39
-rw-r--r--dts/src/arm/spear3xx.dtsi2
-rw-r--r--dts/src/arm/sun7i-a20-olinuxino-lime2.dts2
-rw-r--r--dts/src/arm/vexpress-v2m-rs1.dtsi67
-rw-r--r--dts/src/arm/vexpress-v2m.dtsi65
-rw-r--r--dts/src/arm/vexpress-v2p-ca15-tc1.dts57
-rw-r--r--dts/src/arm/vexpress-v2p-ca15_a7.dts57
-rw-r--r--dts/src/arm/vexpress-v2p-ca5s.dts57
-rw-r--r--dts/src/arm/vexpress-v2p-ca9.dts58
-rw-r--r--dts/src/arm64/allwinner/sun50i-h5-nanopi-neo2.dts2
-rw-r--r--dts/src/arm64/arm/foundation-v8.dtsi1
-rw-r--r--dts/src/arm64/arm/fvp-base-revc.dts23
-rw-r--r--dts/src/arm64/arm/juno-base.dtsi12
-rw-r--r--dts/src/arm64/arm/juno-motherboard.dtsi21
-rw-r--r--dts/src/arm64/arm/rtsm_ve-aemv8a.dts11
-rw-r--r--dts/src/arm64/arm/rtsm_ve-motherboard-rs2.dtsi2
-rw-r--r--dts/src/arm64/arm/rtsm_ve-motherboard.dtsi20
-rw-r--r--dts/src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts57
-rw-r--r--dts/src/arm64/arm/vexpress-v2m-rs1.dtsi67
-rw-r--r--dts/src/arm64/freescale/fsl-ls1028a.dtsi4
-rw-r--r--dts/src/arm64/freescale/imx8mm-beacon-som.dtsi2
-rw-r--r--dts/src/arm64/freescale/imx8mm-evk.dts2
-rw-r--r--dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts8
-rw-r--r--dts/src/arm64/freescale/imx8mm-kontron-n801x-som.dtsi9
-rw-r--r--dts/src/arm64/freescale/imx8mm-venice-gw7902.dts2
-rw-r--r--dts/src/arm64/freescale/imx8mn-beacon-som.dtsi2
-rw-r--r--dts/src/arm64/freescale/imx8mn-venice-gw7902.dts2
-rw-r--r--dts/src/arm64/freescale/imx8mp-phycore-som.dtsi2
-rw-r--r--dts/src/arm64/freescale/imx8mq-evk.dts2
-rw-r--r--dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts2
-rw-r--r--dts/src/arm64/qcom/pm8150.dtsi4
-rw-r--r--dts/src/arm64/qcom/qrb5165-rb5.dts10
-rw-r--r--dts/src/arm64/qcom/sc7180-trogdor.dtsi9
-rw-r--r--dts/src/arm64/qcom/sc7280.dtsi6
-rw-r--r--dts/src/arm64/qcom/sdm630.dtsi15
-rw-r--r--dts/src/arm64/qcom/sdm845.dtsi21
-rw-r--r--dts/src/arm64/qcom/sdm850-lenovo-yoga-c630.dts34
-rw-r--r--dts/src/arm64/qcom/sm8250.dtsi3
-rw-r--r--dts/src/powerpc/fsl/t1023rdb.dts2
-rw-r--r--fs/devfs-core.c34
-rw-r--r--fs/pstore/platform.c2
-rw-r--r--fs/pstore/ram.c2
-rw-r--r--fs/ramfs.c1
-rw-r--r--fs/squashfs/squashfs.h2
-rw-r--r--include/asm-generic/bug.h5
-rw-r--r--include/common.h13
-rw-r--r--include/driver.h1
-rw-r--r--include/image-metadata.h8
-rw-r--r--include/linux/barebox-wrapper.h15
-rw-r--r--include/linux/bitops.h5
-rw-r--r--include/linux/kernel.h1
-rw-r--r--include/linux/mtd/mtd.h2
-rw-r--r--include/linux/phy.h2
-rw-r--r--include/linux/printk.h173
-rw-r--r--include/of.h6
-rw-r--r--include/printk.h166
-rw-r--r--include/stdio.h8
-rw-r--r--lib/hexdump.c2
-rw-r--r--lib/kasan/report.c2
-rw-r--r--lib/logo/Kconfig6
-rw-r--r--lib/logo/Makefile19
-rw-r--r--pbl/fdt.c2
-rw-r--r--scripts/.gitignore2
-rw-r--r--scripts/Kconfig78
-rw-r--r--scripts/Makefile24
-rw-r--r--scripts/bareboximd.c100
-rw-r--r--scripts/common.c168
-rw-r--r--scripts/common.h10
-rw-r--r--scripts/imx/imx-image.c47
-rw-r--r--scripts/imx/imx-usb-loader.c77
-rw-r--r--scripts/include/asm-generic/bitops/__ffs.h3
-rw-r--r--scripts/include/asm-generic/bitops/arch_hweight.h1
-rw-r--r--scripts/include/asm-generic/bitops/atomic.h9
-rw-r--r--scripts/include/asm-generic/bitops/const_hweight.h1
-rw-r--r--scripts/include/asm-generic/bitops/hweight.h3
-rw-r--r--scripts/include/asm-generic/bitsperlong.h12
-rw-r--r--scripts/include/linux/bitops.h11
-rw-r--r--scripts/include/linux/kernel.h1
-rw-r--r--scripts/omap3-usb-loader.c47
-rw-r--r--scripts/rk-usb-loader-target.c1
-rw-r--r--scripts/rk-usb-loader.c328
-rw-r--r--scripts/rkimage.c71
-rw-r--r--scripts/rockchip.h35
-rw-r--r--scripts/socfpga_mkimage.c51
206 files changed, 6836 insertions, 1381 deletions
diff --git a/Documentation/boards/rockchip.rst b/Documentation/boards/rockchip.rst
index 55a3956dd4..d52d979cbf 100644
--- a/Documentation/boards/rockchip.rst
+++ b/Documentation/boards/rockchip.rst
@@ -84,3 +84,18 @@ A bootable SD card can be created with:
The barebox image is written to the raw device, so make sure the partitioning
doesn't conflict with the are barebox is written to. Starting the first
partition at offset 8MiB is a safe bet.
+
+USB bootstrapping
+^^^^^^^^^^^^^^^^^
+
+The RK3568 can be bootstrapped via USB for which the rk-usb-loader tool in the barebox
+repository can be used. The tool takes the same images as written on SD cards:
+
+.. code-block:: sh
+
+ ./scripts/rk-usb-loader images/barebox-rk3568-evb.img
+
+Note that the boot order of the RK3568 is not configurable. The SoC will only enter USB
+MaskROM mode when no other bootsource contains a valid bootloader. This means to use USB
+you have to make all other bootsources invalid by removing SD cards and shortcircuiting
+eMMCs. The RK3568 EVB has a pushbutton to disable the eMMC.
diff --git a/Makefile b/Makefile
index dde5ed3141..77edecd1f7 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
VERSION = 2021
-PATCHLEVEL = 10
+PATCHLEVEL = 11
SUBLEVEL = 0
EXTRAVERSION =
NAME = None
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index c7ab166888..a8b7bdeaa6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -248,6 +248,7 @@ config ARCH_ZYNQ
bool "Xilinx Zynq-based boards"
select HAS_DEBUG_LL
select PBL_IMAGE
+ select GPIOLIB
config ARCH_ZYNQMP
bool "Xilinx ZynqMP-based boards"
@@ -258,6 +259,7 @@ config ARCH_ZYNQMP
select COMMON_CLK
select COMMON_CLK_OF_PROVIDER
select CLKDEV_LOOKUP
+ select GPIOLIB
select OFDEVICE
select OFTREE
select RELOCATABLE
diff --git a/arch/arm/boards/guf-santaro/board.c b/arch/arm/boards/guf-santaro/board.c
index 34005ff7bf..cfc85af59e 100644
--- a/arch/arm/boards/guf-santaro/board.c
+++ b/arch/arm/boards/guf-santaro/board.c
@@ -22,12 +22,11 @@
static int i2c_device_present(struct i2c_adapter *adapter, int addr)
{
struct i2c_client client = {};
- u8 reg;
client.adapter = adapter;
client.addr = addr;
- return i2c_write_reg(&client, 0x00, &reg, 0) < 0 ? false : true;
+ return i2c_write_reg(&client, 0x00, NULL, 0) < 0 ? false : true;
}
#define TOUCH_RESET_GPIO IMX_GPIO_NR(1, 20)
diff --git a/arch/arm/boards/netgear-rn2120/board.c b/arch/arm/boards/netgear-rn2120/board.c
index caf106af50..d5756e0969 100644
--- a/arch/arm/boards/netgear-rn2120/board.c
+++ b/arch/arm/boards/netgear-rn2120/board.c
@@ -2,7 +2,7 @@
#include <init.h>
#include <of.h>
#include <gpio.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <linux/kernel.h>
#include <asm/armlinux.h>
#include <generated/mach-types.h>
diff --git a/arch/arm/boards/rockchip-rk3568-evb/board.c b/arch/arm/boards/rockchip-rk3568-evb/board.c
index 9cd84d7fb9..09385bea29 100644
--- a/arch/arm/boards/rockchip-rk3568-evb/board.c
+++ b/arch/arm/boards/rockchip-rk3568-evb/board.c
@@ -10,6 +10,7 @@
#include <environment.h>
#include <globalvar.h>
#include <magicvar.h>
+#include <deep-probe.h>
static bool machine_is_rk3568_evb = false;
@@ -27,8 +28,8 @@ static int rk3568_evb_probe(struct device_d *dev)
else
of_device_enable_path("/chosen/environment-emmc");
- rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/emmc.barebox");
- rk3568_bbu_mmc_register("sd", 0, "/dev/sd.barebox");
+ rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/emmc");
+ rk3568_bbu_mmc_register("sd", 0, "/dev/sd");
return 0;
}
@@ -45,6 +46,8 @@ static struct driver_d rk3568_evb_board_driver = {
};
coredevice_platform_driver(rk3568_evb_board_driver);
+BAREBOX_DEEP_PROBE_ENABLE(rk3568_evb_of_match);
+
static int rk3568_evb_detect_hwid(void)
{
int ret;
diff --git a/arch/arm/boards/skov-imx6/Makefile b/arch/arm/boards/skov-imx6/Makefile
index a5e85bc1e1..07b87ff11d 100644
--- a/arch/arm/boards/skov-imx6/Makefile
+++ b/arch/arm/boards/skov-imx6/Makefile
@@ -1,3 +1,4 @@
obj-y += board.o
lwl-y += lowlevel.o
obj-pbl-y += version.o
+bbenv-y += defaultenv-skov-imx6
diff --git a/arch/arm/boards/skov-imx6/board.c b/arch/arm/boards/skov-imx6/board.c
index a58172b2b1..cd7b8e208d 100644
--- a/arch/arm/boards/skov-imx6/board.c
+++ b/arch/arm/boards/skov-imx6/board.c
@@ -2,15 +2,18 @@
#define pr_fmt(fmt) "skov-imx6: " fmt
+#include <bootsource.h>
#include <common.h>
-#include <init.h>
-#include <mach/bbu.h>
+#include <deep-probe.h>
+#include <envfs.h>
#include <environment.h>
-#include <bootsource.h>
#include <globalvar.h>
+#include <gpio.h>
+#include <init.h>
+#include <linux/micrel_phy.h>
+#include <mach/bbu.h>
#include <net.h>
#include <of_gpio.h>
-#include <gpio.h>
#include "version.h"
@@ -130,6 +133,9 @@ copy_mac_from_eth0:
return eth_of_fixup_node_from_eth_device(root, node_path, ethname);
}
+#define SKOV_GPIO_MDIO_BUS 0
+#define SKOV_LAN1_PHY_ADDR 1
+
#define MAX_V_GPIO 8
struct board_description {
@@ -303,20 +309,148 @@ static const struct board_description imx6_variants[] = {
};
static int skov_board_no = -1;
+static bool skov_have_switch = true;
+static const char *no_switch_suffix = "-noswitch";
-static int skov_imx6_fixup(struct device_node *root, void *unused)
+static void fixup_machine_compatible(const char *compat,
+ struct device_node *root)
{
- int ret;
- const char *val;
- uint32_t brightness;
+ int cclen = 0, clen = strlen(compat) + 1;
+ const char *curcompat;
+ void *buf;
+
+ if (!root) {
+ root = of_get_root_node();
+ if (!root)
+ return;
+ }
+
+ curcompat = of_get_property(root, "compatible", &cclen);
+
+ buf = xzalloc(cclen + clen);
+
+ memcpy(buf, compat, clen);
+ memcpy(buf + clen, curcompat, cclen);
+
+ /*
+ * Prepend the compatible from board entry to the machine compatible.
+ * Used to match bootspec entries against it.
+ */
+ of_set_property(root, "compatible", buf, cclen + clen, true);
+
+ free(buf);
+}
+
+static void fixup_noswitch_machine_compatible(struct device_node *root)
+{
+ const char *compat = imx6_variants[skov_board_no].dts_compatible;
+ const char *generic = "skov,imx6";
+ size_t size, size_generic;
+ char *buf;
+
+ size = strlen(compat) + strlen(no_switch_suffix) + 1;
+ size_generic = strlen(generic) + strlen(no_switch_suffix) + 1;
+ size = max(size, size_generic);
+
+ /* add generic compatible, so systemd&co can make right decisions */
+ buf = xasprintf("%s%s", generic, no_switch_suffix);
+ fixup_machine_compatible(buf, root);
+
+ /* add specific compatible as fallback, in case this board has new
+ * challenges.
+ */
+ buf = xasprintf("%s%s", compat, no_switch_suffix);
+ fixup_machine_compatible(buf, root);
+
+ free(buf);
+}
+
+static void skov_imx6_no_switch(struct device_node *root)
+{
+ const char *fec_alias = "ethernet0";
struct device_node *node;
+ int ret;
+
+ fixup_noswitch_machine_compatible(root);
+
+ node = of_find_node_by_alias(root, fec_alias);
+ if (node) {
+ ret = of_device_disable(node);
+ if (ret)
+ pr_warn("Can't disable %s\n", fec_alias);
+ } else {
+ pr_warn("Can't find node by alias: %s\n", fec_alias);
+ }
+
+ node = of_find_node_by_alias(root, "mdio-gpio0");
+ if (node) {
+ ret = of_device_disable(node);
+ if (ret)
+ pr_warn("Can't disable mdio-gpio0 node\n");
+ } else {
+ pr_warn("Can't find mdio-gpio0 node\n");
+ }
+}
+
+static int skov_imx6_switch_port(struct device_node *root, const char *path)
+{
+ size_t size;
+ char *buf;
+ int ret;
+
+ /* size is, string + '\0' + port number */
+ size = strlen(path) + 2;
+ buf = xzalloc(size);
+ if (!buf)
+ return -ENOMEM;
+
+ ret = snprintf(buf, size, "%s0", path);
+ if (ret < 0)
+ return ret;
+
+ ret = eth_of_fixup_node_from_eth_device(root, buf, "eth0");
+ if (ret)
+ return ret;
+
+ ret = snprintf(buf, size, "%s1", path);
+ if (ret < 0)
+ return ret;
+
+ ret = eth2_of_fixup_node_individually(root, buf, "eth0",
+ "state.ethaddr.eth2",
+ "/state/ethaddr/eth2");
+ return ret;
+}
+
+static void skov_imx6_switch(struct device_node *root)
+{
+ const char *old = "/mdio-gpio/ksz8873@3/ports/ports@";
+ const char *new = "/mdio/switch@0/ports/ports@";
+ int ret;
+
+ /* Old DTS variants (pre kernel mainline) use different path. Try first
+ * the new variant, then fall back to the old one.
+ */
+ ret = skov_imx6_switch_port(root, new);
+ if (ret) {
+ ret = skov_imx6_switch_port(root, old);
+ if (ret)
+ pr_err("Filed to set mac address\n");
+ }
+}
+
+static int skov_imx6_fixup(struct device_node *root, void *unused)
+{
struct device_node *chosen = of_create_node(root, "/chosen");
+ struct device_node *node;
+ uint32_t brightness;
+ const char *val;
+ int ret;
- eth_of_fixup_node_from_eth_device(root,
- "/mdio-gpio/ksz8873@3/ports/ports@0", "eth0");
- eth2_of_fixup_node_individually(root,
- "/mdio-gpio/ksz8873@3/ports/ports@1", "eth0",
- "state.ethaddr.eth2", "/state/ethaddr/eth2");
+ if (skov_have_switch)
+ skov_imx6_switch(root);
+ else
+ skov_imx6_no_switch(root);
switch (bootsource_get()) {
case BOOTSOURCE_MMC:
@@ -357,10 +491,20 @@ static int skov_imx6_fixup(struct device_node *root, void *unused)
*/
static void skov_init_board(const struct board_description *variant)
{
+ struct device_node *gpio_np = NULL;
struct device_node *np;
char *environment_path, *envdev;
int ret;
+ gpio_np = of_find_node_by_name(NULL, "gpio@20b4000");
+ if (gpio_np) {
+ ret = of_device_ensure_probed(gpio_np);
+ if (ret)
+ pr_warn("Can't probe GPIO node\n");
+ } else {
+ pr_warn("Can't get GPIO node\n");
+ }
+
imx6_bbu_internal_spi_i2c_register_handler("spiflash", "/dev/m25p0.barebox",
BBU_HANDLER_FLAG_DEFAULT);
@@ -432,32 +576,49 @@ static void skov_init_board(const struct board_description *variant)
}
}
-static void fixup_machine_compatible(const char *compat)
+static int skov_switch_test(void)
{
- const char *curcompat;
- struct device_node *root;
- int cclen = 0, clen = strlen(compat) + 1;
- void *buf;
+ struct phy_device *phydev;
+ struct device_d *eth0;
+ struct mii_bus *mii;
+ int ret;
- root = of_get_root_node();
- if (!root)
- return;
+ if (skov_board_no < 0)
+ return 0;
- curcompat = of_get_property(root, "compatible", &cclen);
+ /* On this boards, we have only one MDIO bus. So, it is enough to take
+ * the first one.
+ */
+ mii = mdiobus_get_bus(SKOV_GPIO_MDIO_BUS);
+ /* We can't read the switch ID, but we get get ID of the first PHY,
+ * which is enough to test if the switch is attached.
+ */
+ phydev = get_phy_device(mii, SKOV_LAN1_PHY_ADDR);
+ if (IS_ERR(phydev))
+ goto no_switch;
- buf = xzalloc(cclen + clen);
+ if (phydev->phy_id != PHY_ID_KSZ886X)
+ goto no_switch;
- memcpy(buf, compat, clen);
- memcpy(buf + clen, curcompat, cclen);
+ return 0;
- /*
- * Prepend the compatible from board entry to the machine compatible.
- * Used to match bootspec entries against it.
- */
- of_set_property(root, "compatible", buf, cclen + clen, true);
+no_switch:
+ skov_have_switch = false;
- free(buf);
+ pr_notice("No-switch variant is detected\n");
+
+ eth0 = get_device_by_name("eth0");
+ if (eth0) {
+ ret = dev_set_param(eth0, "mode", "disabled");
+ if (ret)
+ pr_warn("Can't set eth0 mode\n");
+ } else {
+ pr_warn("Can't disable eth0\n");
+ }
+
+ return 0;
}
+late_initcall(skov_switch_test);
static int skov_imx6_probe(struct device_d *dev)
{
@@ -487,10 +648,12 @@ static int skov_imx6_probe(struct device_d *dev)
globalvar_add_simple("board.dts", variant->dts_compatible);
globalvar_add_simple("board.display", variant->display ?: NULL);
- fixup_machine_compatible(variant->dts_compatible);
+ fixup_machine_compatible(variant->dts_compatible, NULL);
skov_init_board(variant);
+ defaultenv_append_directory(defaultenv_skov_imx6);
+
return 0;
}
@@ -501,6 +664,7 @@ static __maybe_unused struct of_device_id skov_version_ids[] = {
/* sentinel */
}
};
+BAREBOX_DEEP_PROBE_ENABLE(skov_version_ids);
static struct driver_d skov_version_driver = {
.name = "skov-imx6",
diff --git a/arch/arm/boards/skov-imx6/defaultenv-skov-imx6/network/eth1-discover b/arch/arm/boards/skov-imx6/defaultenv-skov-imx6/network/eth1-discover
new file mode 100644
index 0000000000..e11a3f9006
--- /dev/null
+++ b/arch/arm/boards/skov-imx6/defaultenv-skov-imx6/network/eth1-discover
@@ -0,0 +1,8 @@
+#!/bin/sh
+
+# Some boards doesn't have a ETH port, but may have USB network attached
+if [ "$eth0.mode" != "disabled" ]; then
+ exit 0;
+fi
+
+usb
diff --git a/arch/arm/boards/skov-imx6/lowlevel.c b/arch/arm/boards/skov-imx6/lowlevel.c
index eab797faa1..ea6de36a36 100644
--- a/arch/arm/boards/skov-imx6/lowlevel.c
+++ b/arch/arm/boards/skov-imx6/lowlevel.c
@@ -618,6 +618,7 @@ static void skov_imx6_init(int cpu_type, unsigned board_variant)
extern char __dtb_z_imx6q_skov_imx6_start[];
extern char __dtb_z_imx6dl_skov_imx6_start[];
+extern char __dtb_z_imx6s_skov_imx6_start[];
/* called twice: once for SDRAM setup only, second for devicetree setup */
static noinline void skov_imx6_start(void)
@@ -640,8 +641,11 @@ static noinline void skov_imx6_start(void)
/* boot this platform (second call) */
switch (cpu_type) {
case IMX6_CPUTYPE_IMX6S:
+ pr_debug("Startup i.MX6S based system...\n");
+ imx6q_barebox_entry(__dtb_z_imx6s_skov_imx6_start);
+ break;
case IMX6_CPUTYPE_IMX6DL:
- pr_debug("Startup i.MX6S/DL based system...\n");
+ pr_debug("Startup i.MX6DL based system...\n");
imx6q_barebox_entry(__dtb_z_imx6dl_skov_imx6_start);
break;
case IMX6_CPUTYPE_IMX6D:
diff --git a/arch/arm/boards/terasic-de0-nano-soc/board.c b/arch/arm/boards/terasic-de0-nano-soc/board.c
index 8e69319d17..c6036a41f9 100644
--- a/arch/arm/boards/terasic-de0-nano-soc/board.c
+++ b/arch/arm/boards/terasic-de0-nano-soc/board.c
@@ -24,7 +24,7 @@ static int phy_fixup(struct phy_device *dev)
static int socfpga_init(void)
{
- if (!of_machine_is_compatible("terasic,de0-nano-soc"))
+ if (!of_machine_is_compatible("terasic,de0-atlas"))
return 0;
if (IS_ENABLED(CONFIG_PHYLIB))
diff --git a/arch/arm/boards/terasic-sockit/board.c b/arch/arm/boards/terasic-sockit/board.c
index ec68315998..19e67ff933 100644
--- a/arch/arm/boards/terasic-sockit/board.c
+++ b/arch/arm/boards/terasic-sockit/board.c
@@ -25,7 +25,7 @@ static int phy_fixup(struct phy_device *dev)
static int socfpga_console_init(void)
{
- if (!of_machine_is_compatible("terasic,sockit"))
+ if (!of_machine_is_compatible("terasic,socfpga-cyclone5-sockit"))
return 0;
if (IS_ENABLED(CONFIG_PHYLIB))
diff --git a/arch/arm/configs/stm32mp_defconfig b/arch/arm/configs/stm32mp_defconfig
index 49041b1f48..eb3c95b12c 100644
--- a/arch/arm/configs/stm32mp_defconfig
+++ b/arch/arm/configs/stm32mp_defconfig
@@ -82,6 +82,7 @@ CONFIG_CMD_FLASH=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_LED=y
CONFIG_CMD_POWEROFF=y
+CONFIG_CMD_SPI=y
CONFIG_CMD_WD=y
CONFIG_CMD_BAREBOX_UPDATE=y
CONFIG_CMD_OF_DIFF=y
@@ -102,9 +103,12 @@ CONFIG_DRIVER_NET_DESIGNWARE_STM32=y
CONFIG_AT803X_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_REALTEK_PHY=y
-# CONFIG_SPI is not set
+CONFIG_DRIVER_SPI_STM32=y
CONFIG_I2C=y
CONFIG_I2C_STM32=y
+CONFIG_MTD=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_SST25L=y
CONFIG_USB_HOST=y
CONFIG_USB_DWC2_HOST=y
CONFIG_USB_DWC2_GADGET=y
@@ -126,6 +130,7 @@ CONFIG_LED_GPIO=y
CONFIG_LED_PWM=y
CONFIG_LED_GPIO_OF=y
CONFIG_LED_TRIGGERS=y
+CONFIG_EEPROM_AT25=y
CONFIG_EEPROM_AT24=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_INPUT_SPECIALKEYS=y
diff --git a/arch/arm/configs/zynq_defconfig b/arch/arm/configs/zynq_defconfig
index a16c57d5ce..38662eeb5d 100644
--- a/arch/arm/configs/zynq_defconfig
+++ b/arch/arm/configs/zynq_defconfig
@@ -45,3 +45,4 @@ CONFIG_DRIVER_NET_MACB=y
# CONFIG_PINCTRL is not set
CONFIG_FS_TFTP=y
CONFIG_DIGEST=y
+CONFIG_GPIO_ZYNQ=y
diff --git a/arch/arm/configs/zynqmp_defconfig b/arch/arm/configs/zynqmp_defconfig
index 2cd8781332..8dd0f40b3d 100644
--- a/arch/arm/configs/zynqmp_defconfig
+++ b/arch/arm/configs/zynqmp_defconfig
@@ -64,3 +64,4 @@ CONFIG_FS_NFS=y
CONFIG_FS_FAT=y
CONFIG_FS_FAT_WRITE=y
CONFIG_DIGEST=y
+CONFIG_GPIO_ZYNQ=y
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 80caa738a9..88a079497a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -115,7 +115,7 @@ lwl-$(CONFIG_MACH_SOLIDRUN_CUBOX) += dove-cubox-bb.dtb.o
lwl-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += imx6dl-hummingboard.dtb.o imx6q-hummingboard.dtb.o \
imx6dl-hummingboard2.dtb.o imx6q-hummingboard2.dtb.o \
imx6q-h100.dtb.o
-lwl-$(CONFIG_MACH_SKOV_IMX6) += imx6dl-skov-imx6.dtb.o imx6q-skov-imx6.dtb.o
+lwl-$(CONFIG_MACH_SKOV_IMX6) += imx6s-skov-imx6.dtb.o imx6dl-skov-imx6.dtb.o imx6q-skov-imx6.dtb.o
lwl-$(CONFIG_MACH_SKOV_ARM9CPU) += at91-skov-arm9cpu.dtb.o
lwl-$(CONFIG_MACH_SEEED_ODYSSEY) += stm32mp157c-odyssey.dtb.o
lwl-$(CONFIG_MACH_STM32MP15XX_DKX) += stm32mp157c-dk2.dtb.o stm32mp157a-dk1.dtb.o
diff --git a/arch/arm/dts/imx6qdl-skov-imx6.dtsi b/arch/arm/dts/imx6qdl-skov-imx6.dtsi
index 03f3cb02fc..371a931e53 100644
--- a/arch/arm/dts/imx6qdl-skov-imx6.dtsi
+++ b/arch/arm/dts/imx6qdl-skov-imx6.dtsi
@@ -273,6 +273,26 @@
remote-endpoint = <&display0_in>;
};
+&usbh1 {
+ disable-over-current;
+ status = "okay";
+};
+
+/* no usbh2 */
+&usbphynop1 {
+ status = "disabled";
+};
+
+/* no usbh3 */
+&usbphynop2 {
+ status = "disabled";
+};
+
+&usbotg {
+ disable-over-current;
+ status = "okay";
+};
+
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
diff --git a/arch/arm/dts/imx6s-skov-imx6.dts b/arch/arm/dts/imx6s-skov-imx6.dts
new file mode 100644
index 0000000000..9061563e45
--- /dev/null
+++ b/arch/arm/dts/imx6s-skov-imx6.dts
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2015 Juergen Borleis, Pengutronix <kernel@pengutronix.de>
+ */
+
+/dts-v1/;
+#include <arm/imx6dl.dtsi>
+#include "imx6dl.dtsi"
+#include "imx6qdl-skov-imx6.dtsi"
+
+/ {
+ model = "Skov IMX6";
+ compatible = "skov,imx6", "fsl,imx6dl";
+
+ chosen {
+ stdout-path = &uart2;
+ };
+};
+
+&hdmi {
+ status = "disabled";
+};
diff --git a/arch/arm/dts/rk3568-evb1-v10.dts b/arch/arm/dts/rk3568-evb1-v10.dts
index bd583015e8..6f1eebc619 100644
--- a/arch/arm/dts/rk3568-evb1-v10.dts
+++ b/arch/arm/dts/rk3568-evb1-v10.dts
@@ -472,17 +472,12 @@
partitions {
compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@8000 {
- label = "barebox";
- reg = <0x8000 0x400000>;
- };
+ #address-cells = <2>;
+ #size-cells = <2>;
environment_emmc: partition@408000 {
label = "barebox-environment";
- reg = <0x408000 0x8000>;
+ reg = <0x0 0x408000 0x0 0x8000>;
};
};
};
@@ -503,17 +498,12 @@
partitions {
compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@8000 {
- label = "barebox";
- reg = <0x8000 0x400000>;
- };
+ #address-cells = <2>;
+ #size-cells = <2>;
environment_sd: partition@408000 {
label = "barebox-environment";
- reg = <0x408000 0x8000>;
+ reg = <0x0 0x408000 0x0 0x8000>;
};
};
};
diff --git a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
index 427f150fb4..c737b091a7 100644
--- a/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
+++ b/arch/arm/dts/socfpga_cyclone5_de0_nano_soc.dts
@@ -19,9 +19,6 @@
#include "socfpga.dtsi"
/ {
- model = "Terasic DE0-Nano-SoC/Atlas-SoC Kit";
- compatible = "terasic,de0-nano-soc","altr,socfpga-cyclone5", "altr,socfpga";
-
chosen {
stdout-path = &uart0;
diff --git a/arch/arm/dts/socfpga_cyclone5_sockit.dts b/arch/arm/dts/socfpga_cyclone5_sockit.dts
index 23e07c964c..27d2087a33 100644
--- a/arch/arm/dts/socfpga_cyclone5_sockit.dts
+++ b/arch/arm/dts/socfpga_cyclone5_sockit.dts
@@ -19,9 +19,6 @@
#include "socfpga.dtsi"
/ {
- model = "Terasic SoCkit";
- compatible = "terasic,sockit", "altr,socfpga";
-
chosen {
stdout-path = &uart0;
diff --git a/arch/arm/dts/vexpress-v2p-ca9.dts b/arch/arm/dts/vexpress-v2p-ca9.dts
index 8be04b174b..a43628e7ce 100644
--- a/arch/arm/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/dts/vexpress-v2p-ca9.dts
@@ -69,7 +69,7 @@
};
};
-&{/bus@4000000/motherboard/flash@0,00000000} {
+&{/bus@40000000/motherboard-bus@40000000/flash@0,00000000} {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
diff --git a/arch/arm/include/asm/barebox-arm-head.h b/arch/arm/include/asm/barebox-arm-head.h
index 8409a77d2e..187d12c9fc 100644
--- a/arch/arm/include/asm/barebox-arm-head.h
+++ b/arch/arm/include/asm/barebox-arm-head.h
@@ -44,6 +44,8 @@ static inline void __barebox_arm_head(void)
"1: b 1b\n"
#endif
#else
+ /* two instruction long function prologue */
+ /* only use if stack is initialized! */
"b 2f\n"
"nop\n"
"nop\n"
diff --git a/arch/arm/mach-mvebu/kwb_bbu.c b/arch/arm/mach-mvebu/kwb_bbu.c
index f79464fe53..3de575740c 100644
--- a/arch/arm/mach-mvebu/kwb_bbu.c
+++ b/arch/arm/mach-mvebu/kwb_bbu.c
@@ -1,6 +1,6 @@
#include <bbu.h>
#include <libfile.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <mach/bbu.h>
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 2786fadeaf..1ad7ccedf6 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -1,4 +1,3 @@
-
menu "Rockchip Features"
depends on ARCH_ROCKCHIP
@@ -51,10 +50,13 @@ config MACH_RK3568_EVB
help
Say Y here if you are using a RK3568 EVB
-endmenu
+comment "select board features:"
config ARCH_RK3568_OPTEE
- bool "Build OP-TEE binary into barebox"
+ bool "Build rk3568 OP-TEE binary into barebox"
+ depends on ARCH_RK3568
help
With this option enabled the RK3568 OP-TEE binary is compiled
into barebox and started along with the BL31 trusted firmware.
+
+endmenu
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index ebaa3a5450..66bcdba2eb 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -4,3 +4,4 @@ obj-$(CONFIG_ARCH_RK3188) += rk3188.o
obj-$(CONFIG_ARCH_RK3288) += rk3288.o
obj-pbl-$(CONFIG_ARCH_RK3568) += rk3568.o
obj-$(CONFIG_ARCH_RK3568) += bootm.o
+obj-$(CONFIG_BAREBOX_UPDATE) += bbu.o
diff --git a/arch/arm/mach-rockchip/atf.c b/arch/arm/mach-rockchip/atf.c
index 3c4c9d1c8a..de22784489 100644
--- a/arch/arm/mach-rockchip/atf.c
+++ b/arch/arm/mach-rockchip/atf.c
@@ -33,30 +33,35 @@ static unsigned long load_elf64_image_phdr(const void *elf)
return ehdr->e_entry;
}
-void rk3568_atf_load_bl31(void *fdt)
-{
- const void *bl31_elf, *optee;
- unsigned long bl31;
- size_t bl31_elf_size, optee_size;
- uintptr_t optee_load_address = 0;
-
- get_builtin_firmware(rk3568_bl31_bin, &bl31_elf, &bl31_elf_size);
-
- bl31 = load_elf64_image_phdr(bl31_elf);
-
- if (IS_ENABLED(CONFIG_ARCH_RK3568_OPTEE)) {
- optee_load_address = RK3568_OPTEE_LOAD_ADDRESS;
+#define rockchip_atf_load_bl31(SOC, atf_bin, tee_bin, fdt) do { \
+ const void *bl31_elf, *optee; \
+ unsigned long bl31; \
+ size_t bl31_elf_size, optee_size; \
+ uintptr_t optee_load_address = 0; \
+ \
+ get_builtin_firmware(atf_bin, &bl31_elf, &bl31_elf_size); \
+ \
+ bl31 = load_elf64_image_phdr(bl31_elf); \
+ \
+ if (IS_ENABLED(CONFIG_ARCH_##SOC##_OPTEE)) { \
+ optee_load_address = SOC##_OPTEE_LOAD_ADDRESS; \
+ \
+ get_builtin_firmware(tee_bin, &optee, &optee_size); \
+ \
+ memcpy((void *)optee_load_address, optee, optee_size); \
+ } \
+ \
+ /* Setup an initial stack for EL2 */ \
+ asm volatile("msr sp_el2, %0" : : \
+ "r" (SOC##_BAREBOX_LOAD_ADDRESS - 16) : \
+ "cc"); \
+ \
+ bl31_entry(bl31, optee_load_address, \
+ SOC##_BAREBOX_LOAD_ADDRESS, (uintptr_t)fdt); \
+} while (0) \
- get_builtin_firmware(rk3568_op_tee_bin, &optee, &optee_size);
- memcpy((void *)optee_load_address, optee, optee_size);
- }
-
- /* Setup an initial stack for EL2 */
- asm volatile("msr sp_el2, %0" : :
- "r" (RK3568_BAREBOX_LOAD_ADDRESS - 16) :
- "cc");
-
- bl31_entry(bl31, optee_load_address,
- RK3568_BAREBOX_LOAD_ADDRESS, (uintptr_t)fdt);
+void rk3568_atf_load_bl31(void *fdt)
+{
+ rockchip_atf_load_bl31(RK3568, rk3568_bl31_bin, rk3568_op_tee_bin, fdt);
}
diff --git a/arch/arm/mach-rockchip/bbu.c b/arch/arm/mach-rockchip/bbu.c
new file mode 100644
index 0000000000..71bbac27e8
--- /dev/null
+++ b/arch/arm/mach-rockchip/bbu.c
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+#include <common.h>
+#include <malloc.h>
+#include <bbu.h>
+#include <filetype.h>
+#include <errno.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <linux/sizes.h>
+#include <linux/stat.h>
+#include <ioctl.h>
+#include <environment.h>
+#include <mach/bbu.h>
+#include <libfile.h>
+#include <linux/bitfield.h>
+#include <mach/rk3568-regs.h>
+
+/* The MaskROM looks for images on these locations: */
+#define IMG_OFFSET_0 (0 * SZ_1K + SZ_32K)
+#define IMG_OFFSET_1 (512 * SZ_1K + SZ_32K)
+#define IMG_OFFSET_2 (1024 * SZ_1K + SZ_32K)
+#define IMG_OFFSET_3 (1536 * SZ_1K + SZ_32K)
+#define IMG_OFFSET_4 (2048 * SZ_1K + SZ_32K)
+
+#define RK3568_IRAM_ACTIVE_BOOT_SLOT GENMASK(12, 10)
+
+static int rk3568_get_active_slot(void)
+{
+ return FIELD_GET(RK3568_IRAM_ACTIVE_BOOT_SLOT,
+ readl(RK3568_IRAM_BASE + 0x14));
+}
+
+/*
+ * The strategy here is:
+ * The MaskROM iterates over the above five locations until it finds a valid
+ * boot image. The images are protected with sha sums, so any change to an
+ * image on disk is invalidating it. We first check if we have enough space to
+ * write two copies of barebox. To make it simple we only use IMG_OFFSET_0 and
+ * IMG_OFFSET_4 which leaves the maximum size for a single image. When there's
+ * not enough free space on the beginning of the disk we only write a single
+ * image. When we have enough space for two images we first write the inactive one
+ * (leaving the active one intact). Afterwards we write the active one which
+ * leaves the previously written inactive image as a fallback in case writing the
+ * first one gets interrupted.
+ */
+static int rk3568_bbu_mmc_handler(struct bbu_handler *handler,
+ struct bbu_data *data)
+{
+ enum filetype filetype;
+ int ret, fd, wr0, wr1;
+ loff_t space;
+ const char *cdevname;
+
+ filetype = file_detect_type(data->image, data->len);
+ if (filetype != filetype_rockchip_rkns_image) {
+ if (!bbu_force(data, "incorrect image type. Expected: %s, got %s",
+ file_type_to_string(filetype_rockchip_rkns_image),
+ file_type_to_string(filetype)))
+ return -EINVAL;
+ }
+
+ cdevname = devpath_to_name(data->devicefile);
+
+ device_detect_by_name(cdevname);
+
+ ret = bbu_confirm(data);
+ if (ret)
+ return ret;
+
+ space = cdev_unallocated_space(cdev_by_name(cdevname));
+
+ if (space < IMG_OFFSET_0 + data->len) {
+ pr_err("Unallocated space on %s is too small for one image\n",
+ data->devicefile);
+ return -ENOSPC;
+ }
+
+ fd = open(data->devicefile, O_WRONLY);
+ if (fd < 0)
+ return fd;
+
+ if (space >= IMG_OFFSET_4 + data->len) {
+ int slot = rk3568_get_active_slot();
+
+ pr_info("Unallocated space is enough for two copies, doing failsafe update\n");
+
+ if (slot == 0) {
+ wr0 = IMG_OFFSET_4;
+ wr1 = IMG_OFFSET_0;
+ } else {
+ wr0 = IMG_OFFSET_0;
+ wr1 = IMG_OFFSET_4;
+ }
+ } else {
+ wr0 = IMG_OFFSET_0;
+ wr1 = 0;
+ }
+
+ ret = pwrite_full(fd, data->image, data->len, wr0);
+ if (ret < 0) {
+ pr_err("writing to %s failed with %s\n", data->devicefile,
+ strerror(-ret));
+ goto err_close;
+ }
+
+ if (wr1) {
+ ret = pwrite_full(fd, data->image, data->len, wr1);
+ if (ret < 0) {
+ pr_err("writing to %s failed with %s\n", data->devicefile,
+ strerror(-ret));
+ goto err_close;
+ }
+ }
+
+ ret = 0;
+
+err_close:
+ close(fd);
+
+ return ret;
+}
+
+int rk3568_bbu_mmc_register(const char *name, unsigned long flags,
+ const char *devicefile)
+{
+ struct bbu_handler *handler;
+ int ret;
+
+ handler = xzalloc(sizeof(*handler));
+
+ handler->flags = flags;
+ handler->devicefile = devicefile;
+ handler->name = name;
+ handler->handler = rk3568_bbu_mmc_handler;
+
+ ret = bbu_register_handler(handler);
+ if (ret)
+ free(handler);
+
+ return ret;
+}
diff --git a/arch/arm/mach-rockchip/include/mach/bbu.h b/arch/arm/mach-rockchip/include/mach/bbu.h
index e61e0615e2..7fb08a0a9e 100644
--- a/arch/arm/mach-rockchip/include/mach/bbu.h
+++ b/arch/arm/mach-rockchip/include/mach/bbu.h
@@ -3,12 +3,15 @@
#include <bbu.h>
+#ifdef CONFIG_BAREBOX_UPDATE
+int rk3568_bbu_mmc_register(const char *name, unsigned long flags,
+ const char *devicefile);
+#else
static inline int rk3568_bbu_mmc_register(const char *name, unsigned long flags,
const char *devicefile)
{
- return bbu_register_std_file_update(name, flags,
- devicefile, filetype_rockchip_rkns_image);
-
+ return -ENOSYS;
}
+#endif
# endif /* __MACH_ROCKCHIP_BBU_H */
diff --git a/arch/arm/mach-rockchip/include/mach/rockchip.h b/arch/arm/mach-rockchip/include/mach/rockchip.h
index 722b73d6f8..269d113bc3 100644
--- a/arch/arm/mach-rockchip/include/mach/rockchip.h
+++ b/arch/arm/mach-rockchip/include/mach/rockchip.h
@@ -28,6 +28,6 @@ static inline int rk3568_init(void)
}
#endif
-int rk3568_lowlevel_init(void);
+void rk3568_lowlevel_init(void);
#endif /* __MACH_ROCKCHIP_H */
diff --git a/arch/arm/mach-rockchip/rk3568.c b/arch/arm/mach-rockchip/rk3568.c
index fcf3cb7053..234c6d22d1 100644
--- a/arch/arm/mach-rockchip/rk3568.c
+++ b/arch/arm/mach-rockchip/rk3568.c
@@ -90,7 +90,7 @@ static void qos_priority_init(void)
writel(0x303, EBC_PRIORITY_REG);
}
-int rk3568_lowlevel_init(void)
+void rk3568_lowlevel_init(void)
{
/*
* When perform idle operation, corresponding clock can
@@ -135,8 +135,6 @@ int rk3568_lowlevel_init(void)
writel(0x01ff01d1, USBPHY_U2_GRF_CON1);
qos_priority_init();
-
- return 0;
}
struct rk_bootsource {
@@ -145,12 +143,12 @@ struct rk_bootsource {
};
static struct rk_bootsource bootdev_map[] = {
- { .src = BOOTSOURCE_UNKNOWN, .instance = 0 },
- { .src = BOOTSOURCE_NAND, .instance = 0 },
- { .src = BOOTSOURCE_MMC, .instance = 0 },
- { .src = BOOTSOURCE_SPI_NOR, .instance = 0 },
- { .src = BOOTSOURCE_SPI_NAND, .instance = 0 },
- { .src = BOOTSOURCE_MMC, .instance = 1 },
+ [0x1] = { .src = BOOTSOURCE_NAND, .instance = 0 },
+ [0x2] = { .src = BOOTSOURCE_MMC, .instance = 0 },
+ [0x3] = { .src = BOOTSOURCE_SPI_NOR, .instance = 0 },
+ [0x4] = { .src = BOOTSOURCE_SPI_NAND, .instance = 0 },
+ [0x5] = { .src = BOOTSOURCE_MMC, .instance = 1 },
+ [0xa] = { .src = BOOTSOURCE_USB, .instance = 0 },
};
static enum bootsource rk3568_bootsource(void)
diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c
index f0b2484c68..c185b0cc2b 100644
--- a/arch/arm/mach-rockchip/rockchip.c
+++ b/arch/arm/mach-rockchip/rockchip.c
@@ -6,14 +6,13 @@
static int rockchip_init(void)
{
if (of_machine_is_compatible("rockchip,rk3188"))
- rk3188_init();
- else if (of_machine_is_compatible("rockchip,rk3288"))
- rk3288_init();
- else if (of_machine_is_compatible("rockchip,rk3568"))
- rk3568_init();
- else
- pr_err("Unknown rockchip SoC\n");
+ return rk3188_init();
+ if (of_machine_is_compatible("rockchip,rk3288"))
+ return rk3288_init();
+ if (of_machine_is_compatible("rockchip,rk3568"))
+ return rk3568_init();
- return 0;
+ pr_err("Unknown rockchip SoC\n");
+ return -ENODEV;
}
postcore_initcall(rockchip_init);
diff --git a/arch/sandbox/configs/hosttools_defconfig b/arch/sandbox/configs/hosttools_defconfig
index 7d33853124..0b62b648c7 100644
--- a/arch/sandbox/configs/hosttools_defconfig
+++ b/arch/sandbox/configs/hosttools_defconfig
@@ -4,3 +4,4 @@ CONFIG_ARCH_IMX_USBLOADER=y
CONFIG_MVEBU_HOSTTOOLS=y
CONFIG_OMAP3_USB_LOADER=y
CONFIG_OMAP4_HOSTTOOL_USBBOOT=y
+CONFIG_RK_USB_LOADER=y
diff --git a/arch/sandbox/configs/targettools_defconfig b/arch/sandbox/configs/targettools_defconfig
index d06074790c..22845def61 100644
--- a/arch/sandbox/configs/targettools_defconfig
+++ b/arch/sandbox/configs/targettools_defconfig
@@ -7,3 +7,4 @@ CONFIG_MVEBU_KWBOOT_TARGET=y
CONFIG_ARCH_IMX_USBLOADER_TARGET=y
CONFIG_OMAP3_USB_LOADER_TARGET=y
CONFIG_OMAP4_USBBOOT_TARGET=y
+CONFIG_RK_USB_LOADER_TARGET=y
diff --git a/commands/md.c b/commands/md.c
index d80c7cca0c..7a96634e27 100644
--- a/commands/md.c
+++ b/commands/md.c
@@ -88,7 +88,7 @@ out:
BAREBOX_CMD_HELP_START(md)
-BAREBOX_CMD_HELP_TEXT("Display (hex dump) a memory region.")
+BAREBOX_CMD_HELP_TEXT("Display (hex dump) a memory REGION.")
BAREBOX_CMD_HELP_TEXT("")
BAREBOX_CMD_HELP_TEXT("Options:")
BAREBOX_CMD_HELP_OPT ("-b", "byte access")
@@ -108,7 +108,7 @@ BAREBOX_CMD_HELP_END
BAREBOX_CMD_START(md)
.cmd = do_mem_md,
BAREBOX_CMD_DESC("memory display")
- BAREBOX_CMD_OPTS("[-bwlsx] REGION")
+ BAREBOX_CMD_OPTS("[-bwlqx] [-s FILE] REGION")
BAREBOX_CMD_GROUP(CMD_GRP_MEM)
BAREBOX_CMD_HELP(cmd_md_help)
BAREBOX_CMD_END
diff --git a/commands/memcmp.c b/commands/memcmp.c
index 2b3783d66a..8122b99f17 100644
--- a/commands/memcmp.c
+++ b/commands/memcmp.c
@@ -97,7 +97,7 @@ BAREBOX_CMD_HELP_END
BAREBOX_CMD_START(memcmp)
.cmd = do_memcmp,
BAREBOX_CMD_DESC("memory compare")
- BAREBOX_CMD_OPTS("[-bwlsd] ADDR1 ADDR2 COUNT")
+ BAREBOX_CMD_OPTS("[-bwlq] [-s FILE] [-d FILE] ADDR1 ADDR2 COUNT")
BAREBOX_CMD_GROUP(CMD_GRP_MEM)
BAREBOX_CMD_HELP(cmd_memcmp_help)
BAREBOX_CMD_END
diff --git a/commands/memcpy.c b/commands/memcpy.c
index 2477bba359..1b480f27f0 100644
--- a/commands/memcpy.c
+++ b/commands/memcpy.c
@@ -72,7 +72,9 @@ out:
}
BAREBOX_CMD_HELP_START(memcpy)
-BAREBOX_CMD_HELP_TEXT("Copy memory at SRC of COUNT bytes to DEST")
+BAREBOX_CMD_HELP_TEXT("Copy memory of COUNT bytes from offsets SRC to DEST.")
+BAREBOX_CMD_HELP_TEXT("If source is a file, COUNT can be left unspecified")
+BAREBOX_CMD_HELP_TEXT("in which case the whole file is copied.")
BAREBOX_CMD_HELP_TEXT("")
BAREBOX_CMD_HELP_TEXT("Options:")
BAREBOX_CMD_HELP_OPT ("-b", "byte access")
@@ -86,7 +88,7 @@ BAREBOX_CMD_HELP_END
BAREBOX_CMD_START(memcpy)
.cmd = do_memcpy,
BAREBOX_CMD_DESC("memory copy")
- BAREBOX_CMD_OPTS("[-bwlsd] SRC DEST COUNT")
+ BAREBOX_CMD_OPTS("[-bwlq] [-s FILE] [-d FILE] SRC DEST COUNT")
BAREBOX_CMD_GROUP(CMD_GRP_MEM)
BAREBOX_CMD_HELP(cmd_memcpy_help)
BAREBOX_CMD_END
diff --git a/commands/memset.c b/commands/memset.c
index 716cba26de..e4412533f1 100644
--- a/commands/memset.c
+++ b/commands/memset.c
@@ -84,7 +84,7 @@ BAREBOX_CMD_HELP_END
BAREBOX_CMD_START(memset)
.cmd = do_memset,
BAREBOX_CMD_DESC("memory fill")
- BAREBOX_CMD_OPTS("[-bwld] ADDR DATA COUNT")
+ BAREBOX_CMD_OPTS("[-bwlq [-d FILE] ADDR DATA COUNT")
BAREBOX_CMD_GROUP(CMD_GRP_MEM)
BAREBOX_CMD_HELP(cmd_memset_help)
BAREBOX_CMD_END
diff --git a/commands/mm.c b/commands/mm.c
index f6d66320fb..9ce8839644 100644
--- a/commands/mm.c
+++ b/commands/mm.c
@@ -116,7 +116,7 @@ BAREBOX_CMD_HELP_END
BAREBOX_CMD_START(mm)
.cmd = do_mem_mm,
BAREBOX_CMD_DESC("memory modify with mask")
- BAREBOX_CMD_OPTS("[-bwld] ADDR VAL MASK")
+ BAREBOX_CMD_OPTS("[-bwlq] [-d FILE] ADDR VAL MASK")
BAREBOX_CMD_GROUP(CMD_GRP_MEM)
BAREBOX_CMD_HELP(cmd_mm_help)
BAREBOX_CMD_END
diff --git a/commands/mw.c b/commands/mw.c
index 5bd4bdd58f..5dcef7e2fc 100644
--- a/commands/mw.c
+++ b/commands/mw.c
@@ -110,12 +110,17 @@ BAREBOX_CMD_HELP_OPT ("-l", "long access (32 bit)")
BAREBOX_CMD_HELP_OPT ("-q", "quad access (64 bit)")
BAREBOX_CMD_HELP_OPT ("-d FILE", "write file (default /dev/mem)")
BAREBOX_CMD_HELP_OPT ("-x", "swap bytes")
+BAREBOX_CMD_HELP_TEXT("")
+BAREBOX_CMD_HELP_TEXT("Memory regions can be specified in two different forms: START+SIZE")
+BAREBOX_CMD_HELP_TEXT("or START-END, If START is omitted it defaults to 0x100")
+BAREBOX_CMD_HELP_TEXT("Sizes can be specified as decimal, or if prefixed with 0x as hexadecimal.")
+BAREBOX_CMD_HELP_TEXT("An optional suffix of k, M or G is for kbytes, Megabytes or Gigabytes.")
BAREBOX_CMD_HELP_END
BAREBOX_CMD_START(mw)
.cmd = do_mem_mw,
BAREBOX_CMD_DESC("memory write")
- BAREBOX_CMD_OPTS("[-bwldx] REGION DATA...")
+ BAREBOX_CMD_OPTS("[-bwlqx] [-d FILE] REGION DATA...")
BAREBOX_CMD_GROUP(CMD_GRP_MEM)
BAREBOX_CMD_HELP(cmd_mw_help)
BAREBOX_CMD_END
diff --git a/commands/nandtest.c b/commands/nandtest.c
index 1bb59c7fdb..4a7db9cc74 100644
--- a/commands/nandtest.c
+++ b/commands/nandtest.c
@@ -169,8 +169,10 @@ static int erase_and_write(loff_t ofs, unsigned char *data,
printf("\ncompare failed. seed %d\n", seed);
for (i = 0; i < meminfo.erasesize; i++) {
if (data[i] != rbuf[i])
- printf("Byte 0x%x is %02x should be %02x\n",
- i, rbuf[i], data[i]);
+ printf("Block 0x%llx byte 0x%0x (page 0x%x offset 0x%x) is %02x should be %02x\n",
+ div64_ul(ofs, meminfo.erasesize), i,
+ i / meminfo.writesize, i % meminfo.writesize,
+ rbuf[i], data[i]);
}
return ret;
}
diff --git a/common/bootchooser.c b/common/bootchooser.c
index 2f22e03c47..75dfbc6166 100644
--- a/common/bootchooser.c
+++ b/common/bootchooser.c
@@ -13,7 +13,7 @@
#include <libfile.h>
#include <common.h>
#include <malloc.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <xfuncs.h>
#include <envfs.h>
#include <errno.h>
diff --git a/common/efi/efi-iomem.c b/common/efi/efi-iomem.c
index e223c595c4..4d34328a58 100644
--- a/common/efi/efi-iomem.c
+++ b/common/efi/efi-iomem.c
@@ -10,7 +10,7 @@
#include <memory.h>
#include <linux/sizes.h>
-static int efi_parse_mmap(struct efi_memory_desc *desc)
+static int efi_parse_mmap(struct efi_memory_desc *desc, bool verbose)
{
struct resource *res;
u32 flags;
@@ -30,77 +30,81 @@ static int efi_parse_mmap(struct efi_memory_desc *desc)
switch (desc->type) {
case EFI_RESERVED_TYPE:
- if (!IS_ENABLED(DEBUG))
+ if (verbose)
return 0;
name = "reserved";
flags = IORESOURCE_MEM | IORESOURCE_DISABLED;
break;
case EFI_LOADER_CODE:
- return barebox_add_memory_bank("loader code", va_base, va_size);
+ name = "loader code";
+ flags = IORESOURCE_MEM | IORESOURCE_READONLY;
+ break;
case EFI_LOADER_DATA:
- return barebox_add_memory_bank("loader data", va_base, va_size);
+ name = "loader data";
+ flags = IORESOURCE_MEM;
+ break;
case EFI_BOOT_SERVICES_CODE:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "boot services code";
flags = IORESOURCE_MEM | IORESOURCE_READONLY;
break;
case EFI_BOOT_SERVICES_DATA:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "boot services data";
flags = IORESOURCE_MEM;
break;
case EFI_RUNTIME_SERVICES_CODE:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "runtime services code";
flags = IORESOURCE_MEM | IORESOURCE_READONLY;
break;
case EFI_RUNTIME_SERVICES_DATA:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "runtime services data";
flags = IORESOURCE_MEM;
break;
case EFI_CONVENTIONAL_MEMORY:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "conventional memory";
flags = IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_CACHEABLE;
break;
case EFI_UNUSABLE_MEMORY:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "unusable";
flags = IORESOURCE_MEM | IORESOURCE_DISABLED;
break;
case EFI_ACPI_RECLAIM_MEMORY:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "ACPI reclaim memory";
flags = IORESOURCE_MEM | IORESOURCE_READONLY;
break;
case EFI_ACPI_MEMORY_NVS:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "ACPI NVS memory";
flags = IORESOURCE_MEM | IORESOURCE_READONLY;
break;
case EFI_MEMORY_MAPPED_IO:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "MMIO";
flags = IORESOURCE_MEM;
break;
case EFI_MEMORY_MAPPED_IO_PORT_SPACE:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "MMIOPORT";
flags = IORESOURCE_IO;
break;
case EFI_PAL_CODE:
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "PAL code";
flags = IORESOURCE_MEM | IORESOURCE_ROM_BIOS_COPY;
@@ -112,7 +116,7 @@ static int efi_parse_mmap(struct efi_memory_desc *desc)
return -EINVAL;
}
- if (!IS_ENABLED(DEBUG))
+ if (!verbose)
return 0;
name = "vendor reserved";
@@ -165,8 +169,8 @@ static int efi_barebox_populate_mmap(void)
goto out;
}
- for (desc = mmap_buf; (u8 *)desc < &mmap_buf[mmap_size]; desc += descsz)
- efi_parse_mmap(desc);
+ for (desc = mmap_buf; (u8 *)desc < mmap_buf + mmap_size; desc += descsz)
+ efi_parse_mmap(desc, __is_defined(DEBUG));
out:
free(mmap_buf);
diff --git a/common/imd.c b/common/imd.c
index e1d5733c6b..0295d84d34 100644
--- a/common/imd.c
+++ b/common/imd.c
@@ -317,7 +317,7 @@ static int imd_calculate_crc32(void *input, const struct imd_header *imd_start,
length = ALIGN(length, 4);
length += sizeof(struct imd_header);
- if (imd_read_type(imd) == IMD_TYPE_CRC32) {
+ if (imd_is_crc32(imd_read_type(imd))) {
*imd_crc = (struct imd_header *)imd;
debug("Found crc token at %d\n", end_ofs);
break;
diff --git a/common/optee.c b/common/optee.c
index d542dde118..b460fbcd01 100644
--- a/common/optee.c
+++ b/common/optee.c
@@ -3,7 +3,7 @@
#define pr_fmt(fmt) "optee: " fmt
#include <tee/optee.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <asm-generic/errno.h>
int optee_verify_header(struct optee_header *hdr)
diff --git a/common/partitions.c b/common/partitions.c
index d80878e065..b579559672 100644
--- a/common/partitions.c
+++ b/common/partitions.c
@@ -156,3 +156,30 @@ int partition_parser_register(struct partition_parser *p)
return 0;
}
+
+/**
+ * cdev_unallocated_space - return unallocated space
+ * cdev: The cdev
+ *
+ * This function returns the space that is not allocated by any partition
+ * at the start of a device.
+ *
+ * Return: The unallocated space at the start of the device in bytes
+ */
+loff_t cdev_unallocated_space(struct cdev *cdev)
+{
+ struct cdev *partcdev;
+ loff_t start;
+
+ if (!cdev)
+ return 0;
+
+ start = cdev->size;
+
+ list_for_each_entry(partcdev, &cdev->partitions, partition_entry) {
+ if (partcdev->offset < start)
+ start = partcdev->offset;
+ }
+
+ return start;
+}
diff --git a/common/startup.c b/common/startup.c
index f72902fc53..f53b73f81a 100644
--- a/common/startup.c
+++ b/common/startup.c
@@ -68,70 +68,6 @@ static int mount_root(void)
fs_initcall(mount_root);
#endif
-#ifdef CONFIG_ENV_HANDLING
-static bool region_overlap(loff_t starta, loff_t lena,
- loff_t startb, loff_t lenb)
-{
- if (starta + lena <= startb)
- return 0;
- if (startb + lenb <= starta)
- return 0;
- return 1;
-}
-
-static int check_overlap(const char *path)
-{
- struct cdev *cenv, *cdisk, *cpart;
- const char *name;
-
- name = devpath_to_name(path);
-
- if (name == path)
- /*
- * no /dev/ in front, so *path is some file. No need to
- * check further.
- */
- return 0;
-
- cenv = cdev_by_name(name);
- if (!cenv)
- return -EINVAL;
-
- if (cenv->mtd)
- return 0;
-
- cdisk = cenv->master;
-
- if (!cdisk)
- return 0;
-
- list_for_each_entry(cpart, &cdisk->partitions, partition_entry) {
- if (cpart == cenv)
- continue;
-
- if (region_overlap(cpart->offset, cpart->size,
- cenv->offset, cenv->size))
- goto conflict;
- }
-
- return 0;
-
-conflict:
- pr_err("Environment partition (0x%08llx-0x%08llx) "
- "overlaps with partition %s (0x%08llx-0x%08llx), not using it\n",
- cenv->offset, cenv->offset + cenv->size - 1,
- cpart->name,
- cpart->offset, cpart->offset + cpart->size - 1);
-
- return -EINVAL;
-}
-#else
-static int check_overlap(const char *path)
-{
- return 0;
-}
-#endif
-
static int load_environment(void)
{
const char *default_environment_path;
@@ -143,11 +79,7 @@ static int load_environment(void)
defaultenv_load("/env", 0);
if (IS_ENABLED(CONFIG_ENV_HANDLING)) {
- ret = check_overlap(default_environment_path);
- if (ret)
- default_environment_path_set(NULL);
- else
- envfs_load(default_environment_path, "/env", 0);
+ envfs_load(default_environment_path, "/env", 0);
} else {
if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT))
pr_notice("No support for persistent environment. Using default environment\n");
diff --git a/common/state/backend_bucket_direct.c b/common/state/backend_bucket_direct.c
index 4522f0170f..517aec6063 100644
--- a/common/state/backend_bucket_direct.c
+++ b/common/state/backend_bucket_direct.c
@@ -17,7 +17,7 @@
#include <libfile.h>
#include <linux/kernel.h>
#include <malloc.h>
-#include <printk.h>
+#include <linux/printk.h>
#include "state.h"
diff --git a/common/state/backend_storage.c b/common/state/backend_storage.c
index fe7e89e8fb..7fc7acfdcb 100644
--- a/common/state/backend_storage.c
+++ b/common/state/backend_storage.c
@@ -21,7 +21,7 @@
#include <linux/mtd/mtd-abi.h>
#include <sys/stat.h>
#include <malloc.h>
-#include <printk.h>
+#include <linux/printk.h>
#include "state.h"
diff --git a/common/state/state_variables.c b/common/state/state_variables.c
index 66c66f38bd..f112c60bf6 100644
--- a/common/state/state_variables.c
+++ b/common/state/state_variables.c
@@ -21,7 +21,7 @@
#include <linux/types.h>
#include <malloc.h>
#include <net.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <of.h>
#include <stdio.h>
diff --git a/drivers/aiodev/core.c b/drivers/aiodev/core.c
index 5181d4c107..945494a6e7 100644
--- a/drivers/aiodev/core.c
+++ b/drivers/aiodev/core.c
@@ -29,7 +29,7 @@ struct aiochannel *aiochannel_by_name(const char *name)
return ERR_PTR(-ENOENT);
}
-EXPORT_SYMBOL(aiochannel_get_by_name);
+EXPORT_SYMBOL(aiochannel_by_name);
struct aiochannel *aiochannel_get(struct device_d *dev, int index)
{
diff --git a/drivers/clk/analogbits/wrpll-cln28hpc.c b/drivers/clk/analogbits/wrpll-cln28hpc.c
index 640af533d6..5a3602649f 100644
--- a/drivers/clk/analogbits/wrpll-cln28hpc.c
+++ b/drivers/clk/analogbits/wrpll-cln28hpc.c
@@ -23,7 +23,7 @@
#include <linux/kernel.h>
#include <stdio.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <linux/bug.h>
#include <linux/err.h>
#include <linux/log2.h>
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 4e6ec8231e..f9b2324f6a 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -10,7 +10,7 @@
#include <io.h>
#include <linux/bitops.h>
-#include <printk.h>
+#include <linux/printk.h>
struct pmc_data {
unsigned int ncore;
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index fff1e21144..189c9c62df 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -845,9 +845,15 @@ int of_clk_init(struct device_node *root, const struct of_device_id *matches)
struct device_node *np = clk_provider->np;
if (force || parent_ready(np)) {
+ struct device_d *dev;
of_pinctrl_select_state_default(np);
- clk_provider->clk_init_cb(np);
+
+ dev = of_device_create_on_demand(np);
+
+ if (clk_provider->clk_init_cb(np) == 0 && dev)
+ of_platform_device_dummy_drv(dev);
+
of_clk_set_defaults(np, true);
list_del(&clk_provider->node);
diff --git a/drivers/clk/sifive/sifive-prci.c b/drivers/clk/sifive/sifive-prci.c
index 1701a2c5a0..fa0d1dc432 100644
--- a/drivers/clk/sifive/sifive-prci.c
+++ b/drivers/clk/sifive/sifive-prci.c
@@ -8,7 +8,7 @@
#include <linux/list.h>
#include <linux/clkdev.h>
#include <linux/overflow.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <clock.h>
#include <io.h>
#include <of.h>
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 181b48280f..951580a2e7 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -109,8 +109,8 @@ config RISCV_TIMER
required for all RISC-V systems.
config CLINT_TIMER
- bool "CLINT Timer for the RISC-V platform" if COMPILE_TEST
- depends on OFDEVICE
+ bool "CLINT Timer for the RISC-V platform"
+ depends on RISCV && OFDEVICE
help
This option enables the CLINT timer for RISC-V systems. The CLINT
driver is usually used for NoMMU RISC-V systems.
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index 857e3a5225..32f4b47a51 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
config DDR_FSL
- bool "Freescale DDR support" if COMPILE_TEST
- depends on ARM
+ bool "Freescale DDR support"
+ depends on ARCH_LAYERSCAPE
if DDR_FSL
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 2365e06c3f..371d2fce36 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -198,6 +198,13 @@ config GPIO_LIBFTDI1
bool "libftdi1 driver"
depends on SANDBOX
+config GPIO_ZYNQ
+ tristate "Xilinx Zynq GPIO support"
+ depends on ARCH_ZYNQ || ARCH_ZYNQMP || CROSS_COMPILE
+ depends on OFDEVICE
+ help
+ Say yes here to support Xilinx Zynq GPIO controller.
+
endmenu
endif
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 19e943fe3d..d77d819f99 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -27,3 +27,4 @@ obj-$(CONFIG_GPIO_VF610) += gpio-vf610.o
obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
obj-$(CONFIG_GPIO_SIFIVE) += gpio-sifive.o
obj-$(CONFIG_GPIO_STARFIVE) += gpio-starfive-vic.o
+obj-$(CONFIG_GPIO_ZYNQ) += gpio-zynq.o
diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c
index 63f2c097e4..58ffd87788 100644
--- a/drivers/gpio/gpio-sifive.c
+++ b/drivers/gpio/gpio-sifive.c
@@ -4,7 +4,7 @@
*/
#include <linux/basic_mmio_gpio.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <driver.h>
#include <errno.h>
diff --git a/drivers/gpio/gpio-starfive-vic.c b/drivers/gpio/gpio-starfive-vic.c
index baa4f584d5..4f8c0c6cd7 100644
--- a/drivers/gpio/gpio-starfive-vic.c
+++ b/drivers/gpio/gpio-starfive-vic.c
@@ -6,7 +6,7 @@
#include <linux/basic_mmio_gpio.h>
#include <linux/reset.h>
#include <linux/clk.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <driver.h>
#include <errno.h>
#include <pinctrl.h>
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
new file mode 100644
index 0000000000..bb77857611
--- /dev/null
+++ b/drivers/gpio/gpio-zynq.c
@@ -0,0 +1,436 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Xilinx Zynq GPIO device driver
+ *
+ * Copyright (C) 2009 - 2014 Xilinx, Inc.
+ *
+ * Based on the Linux kernel driver (drivers/gpio/gpio-zynq.c).
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <gpio.h>
+#include <init.h>
+#include <io.h>
+#include <of.h>
+
+/* Maximum banks */
+#define ZYNQ_GPIO_MAX_BANK 4
+#define ZYNQMP_GPIO_MAX_BANK 6
+
+#define ZYNQ_GPIO_BANK0_NGPIO 32
+#define ZYNQ_GPIO_BANK1_NGPIO 22
+#define ZYNQ_GPIO_BANK2_NGPIO 32
+#define ZYNQ_GPIO_BANK3_NGPIO 32
+
+#define ZYNQMP_GPIO_BANK0_NGPIO 26
+#define ZYNQMP_GPIO_BANK1_NGPIO 26
+#define ZYNQMP_GPIO_BANK2_NGPIO 26
+#define ZYNQMP_GPIO_BANK3_NGPIO 32
+#define ZYNQMP_GPIO_BANK4_NGPIO 32
+#define ZYNQMP_GPIO_BANK5_NGPIO 32
+
+#define ZYNQ_GPIO_NR_GPIOS 118
+#define ZYNQMP_GPIO_NR_GPIOS 174
+
+#define ZYNQ_GPIO_BANK0_PIN_MIN(str) 0
+#define ZYNQ_GPIO_BANK0_PIN_MAX(str) \
+ (ZYNQ_GPIO_BANK0_PIN_MIN(str) + ZYNQ##str##_GPIO_BANK0_NGPIO - 1)
+#define ZYNQ_GPIO_BANK1_PIN_MIN(str) (ZYNQ_GPIO_BANK0_PIN_MAX(str) + 1)
+#define ZYNQ_GPIO_BANK1_PIN_MAX(str) \
+ (ZYNQ_GPIO_BANK1_PIN_MIN(str) + ZYNQ##str##_GPIO_BANK1_NGPIO - 1)
+#define ZYNQ_GPIO_BANK2_PIN_MIN(str) (ZYNQ_GPIO_BANK1_PIN_MAX(str) + 1)
+#define ZYNQ_GPIO_BANK2_PIN_MAX(str) \
+ (ZYNQ_GPIO_BANK2_PIN_MIN(str) + ZYNQ##str##_GPIO_BANK2_NGPIO - 1)
+#define ZYNQ_GPIO_BANK3_PIN_MIN(str) (ZYNQ_GPIO_BANK2_PIN_MAX(str) + 1)
+#define ZYNQ_GPIO_BANK3_PIN_MAX(str) \
+ (ZYNQ_GPIO_BANK3_PIN_MIN(str) + ZYNQ##str##_GPIO_BANK3_NGPIO - 1)
+#define ZYNQ_GPIO_BANK4_PIN_MIN(str) (ZYNQ_GPIO_BANK3_PIN_MAX(str) + 1)
+#define ZYNQ_GPIO_BANK4_PIN_MAX(str) \
+ (ZYNQ_GPIO_BANK4_PIN_MIN(str) + ZYNQ##str##_GPIO_BANK4_NGPIO - 1)
+#define ZYNQ_GPIO_BANK5_PIN_MIN(str) (ZYNQ_GPIO_BANK4_PIN_MAX(str) + 1)
+#define ZYNQ_GPIO_BANK5_PIN_MAX(str) \
+ (ZYNQ_GPIO_BANK5_PIN_MIN(str) + ZYNQ##str##_GPIO_BANK5_NGPIO - 1)
+
+/* Register offsets for the GPIO device */
+/* LSW Mask & Data -WO */
+#define ZYNQ_GPIO_DATA_LSW_OFFSET(BANK) (0x000 + (8 * BANK))
+/* MSW Mask & Data -WO */
+#define ZYNQ_GPIO_DATA_MSW_OFFSET(BANK) (0x004 + (8 * BANK))
+/* Data Register-RW */
+#define ZYNQ_GPIO_DATA_OFFSET(BANK) (0x040 + (4 * BANK))
+#define ZYNQ_GPIO_DATA_RO_OFFSET(BANK) (0x060 + (4 * BANK))
+/* Direction mode reg-RW */
+#define ZYNQ_GPIO_DIRM_OFFSET(BANK) (0x204 + (0x40 * BANK))
+/* Output enable reg-RW */
+#define ZYNQ_GPIO_OUTEN_OFFSET(BANK) (0x208 + (0x40 * BANK))
+/* Interrupt mask reg-RO */
+#define ZYNQ_GPIO_INTMASK_OFFSET(BANK) (0x20C + (0x40 * BANK))
+/* Interrupt enable reg-WO */
+#define ZYNQ_GPIO_INTEN_OFFSET(BANK) (0x210 + (0x40 * BANK))
+/* Interrupt disable reg-WO */
+#define ZYNQ_GPIO_INTDIS_OFFSET(BANK) (0x214 + (0x40 * BANK))
+/* Interrupt status reg-RO */
+#define ZYNQ_GPIO_INTSTS_OFFSET(BANK) (0x218 + (0x40 * BANK))
+/* Interrupt type reg-RW */
+#define ZYNQ_GPIO_INTTYPE_OFFSET(BANK) (0x21C + (0x40 * BANK))
+/* Interrupt polarity reg-RW */
+#define ZYNQ_GPIO_INTPOL_OFFSET(BANK) (0x220 + (0x40 * BANK))
+/* Interrupt on any, reg-RW */
+#define ZYNQ_GPIO_INTANY_OFFSET(BANK) (0x224 + (0x40 * BANK))
+
+/* Disable all interrupts mask */
+#define ZYNQ_GPIO_IXR_DISABLE_ALL 0xFFFFFFFF
+
+/* Mid pin number of a bank */
+#define ZYNQ_GPIO_MID_PIN_NUM 16
+
+/* GPIO upper 16 bit mask */
+#define ZYNQ_GPIO_UPPER_MASK 0xFFFF0000
+
+/* set to differentiate zynq from zynqmp, 0=zynqmp, 1=zynq */
+#define ZYNQ_GPIO_QUIRK_IS_ZYNQ BIT(0)
+#define GPIO_QUIRK_DATA_RO_BUG BIT(1)
+
+/**
+ * struct zynq_gpio - GPIO device private data structure
+ * @chip: instance of the gpio_chip
+ * @base_addr: base address of the GPIO device
+ * @p_data: pointer to platform data
+ */
+struct zynq_gpio {
+ struct gpio_chip chip;
+ void __iomem *base_addr;
+ const struct zynq_platform_data *p_data;
+};
+
+/**
+ * struct zynq_platform_data - Zynq GPIO platform data structure
+ * @quirks: Flags is used to identify the platform
+ * @ngpio: max number of gpio pins
+ * @max_bank: maximum number of gpio banks
+ * @bank_min: this array represents bank's min pin
+ * @bank_max: this array represents bank's max pin
+ */
+struct zynq_platform_data {
+ u32 quirks;
+ u16 ngpio;
+ int max_bank;
+ int bank_min[ZYNQMP_GPIO_MAX_BANK];
+ int bank_max[ZYNQMP_GPIO_MAX_BANK];
+};
+
+/**
+ * zynq_gpio_is_zynq - Test if HW is Zynq or ZynqMP
+ * @gpio: Pointer to driver data struct
+ *
+ * Return: 0 if ZynqMP, 1 if Zynq.
+ */
+static int zynq_gpio_is_zynq(struct zynq_gpio *gpio)
+{
+ return !!(gpio->p_data->quirks & ZYNQ_GPIO_QUIRK_IS_ZYNQ);
+}
+
+/**
+ * gpio_data_ro_bug - Test if HW bug exists or not
+ * @gpio: Pointer to driver data struct
+ *
+ * Return: 0 if bug does not exist, 1 if bug exists.
+ */
+static int gpio_data_ro_bug(struct zynq_gpio *gpio)
+{
+ return !!(gpio->p_data->quirks & GPIO_QUIRK_DATA_RO_BUG);
+}
+
+/**
+ * zynq_gpio_get_bank_pin - Get the bank number and pin number within that bank
+ * for a given pin in the GPIO device
+ * @pin_num: gpio pin number within the device
+ * @bank_num: an output parameter used to return the bank number of the gpio
+ * pin
+ * @bank_pin_num: an output parameter used to return pin number within a bank
+ * for the given gpio pin
+ * @gpio: gpio device data structure
+ *
+ * Returns the bank number and pin offset within the bank.
+ */
+static int zynq_gpio_get_bank_pin(unsigned int pin_num, unsigned int *bank_num,
+ unsigned int *bank_pin_num,
+ struct zynq_gpio *gpio)
+{
+ int bank;
+
+ for (bank = 0; bank < gpio->p_data->max_bank; bank++) {
+ if ((pin_num >= gpio->p_data->bank_min[bank]) &&
+ (pin_num <= gpio->p_data->bank_max[bank])) {
+ *bank_num = bank;
+ *bank_pin_num = pin_num - gpio->p_data->bank_min[bank];
+ return 0;
+ }
+ }
+
+ *bank_num = 0;
+ *bank_pin_num = 0;
+ return -ENODEV;
+}
+
+/**
+ * zynq_gpio_get_value - Get the state of the specified pin of GPIO device
+ * @chip: gpio_chip instance to be worked on
+ * @pin: gpio pin number within the device
+ *
+ * This function reads the state of the specified pin of the GPIO device.
+ *
+ * Return: 0 if the pin is low, 1 if pin is high.
+ */
+static int zynq_gpio_get_value(struct gpio_chip *chip, unsigned int pin)
+{
+ u32 data;
+ unsigned int bank_num, bank_pin_num;
+ struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
+
+ if (zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio) < 0)
+ return -EINVAL;
+
+ if (gpio_data_ro_bug(gpio)) {
+ if (zynq_gpio_is_zynq(gpio)) {
+ if (bank_num <= 1) {
+ data = readl_relaxed(
+ gpio->base_addr +
+ ZYNQ_GPIO_DATA_RO_OFFSET(bank_num));
+ } else {
+ data = readl_relaxed(
+ gpio->base_addr +
+ ZYNQ_GPIO_DATA_OFFSET(bank_num));
+ }
+ } else {
+ if (bank_num <= 2) {
+ data = readl_relaxed(
+ gpio->base_addr +
+ ZYNQ_GPIO_DATA_RO_OFFSET(bank_num));
+ } else {
+ data = readl_relaxed(
+ gpio->base_addr +
+ ZYNQ_GPIO_DATA_OFFSET(bank_num));
+ }
+ }
+ } else {
+ data = readl_relaxed(gpio->base_addr +
+ ZYNQ_GPIO_DATA_RO_OFFSET(bank_num));
+ }
+ return (data >> bank_pin_num) & 1;
+}
+
+/**
+ * zynq_gpio_set_value - Modify the state of the pin with specified value
+ * @chip: gpio_chip instance to be worked on
+ * @pin: gpio pin number within the device
+ * @state: value used to modify the state of the specified pin
+ *
+ * This function calculates the register offset (i.e to lower 16 bits or
+ * upper 16 bits) based on the given pin number and sets the state of a
+ * gpio pin to the specified value. The state is either 0 or non-zero.
+ */
+static void zynq_gpio_set_value(struct gpio_chip *chip, unsigned int pin,
+ int state)
+{
+ unsigned int reg_offset, bank_num, bank_pin_num;
+ struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
+
+ if (zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio) < 0)
+ return;
+
+ if (bank_pin_num >= ZYNQ_GPIO_MID_PIN_NUM) {
+ bank_pin_num -= ZYNQ_GPIO_MID_PIN_NUM;
+ reg_offset = ZYNQ_GPIO_DATA_MSW_OFFSET(bank_num);
+ } else {
+ reg_offset = ZYNQ_GPIO_DATA_LSW_OFFSET(bank_num);
+ }
+
+ /*
+ * get the 32 bit value to be written to the mask/data register where
+ * the upper 16 bits is the mask and lower 16 bits is the data
+ */
+ state = !!state;
+ state = ~(1 << (bank_pin_num + ZYNQ_GPIO_MID_PIN_NUM)) &
+ ((state << bank_pin_num) | ZYNQ_GPIO_UPPER_MASK);
+
+ writel_relaxed(state, gpio->base_addr + reg_offset);
+}
+
+/**
+ * zynq_gpio_dir_in - Set the direction of the specified GPIO pin as input
+ * @chip: gpio_chip instance to be worked on
+ * @pin: gpio pin number within the device
+ *
+ * This function uses the read-modify-write sequence to set the direction of
+ * the gpio pin as input.
+ *
+ * Return: 0 always
+ */
+static int zynq_gpio_dir_in(struct gpio_chip *chip, unsigned int pin)
+{
+ u32 reg;
+ unsigned int bank_num, bank_pin_num;
+ struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
+
+ if (zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio) < 0)
+ return -EINVAL;
+ /*
+ * On zynq bank 0 pins 7 and 8 are special and cannot be used
+ * as inputs.
+ */
+ if (zynq_gpio_is_zynq(gpio) && bank_num == 0 &&
+ (bank_pin_num == 7 || bank_pin_num == 8))
+ return -EINVAL;
+
+ /* clear the bit in direction mode reg to set the pin as input */
+ reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
+ reg &= ~BIT(bank_pin_num);
+ writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
+
+ return 0;
+}
+
+/**
+ * zynq_gpio_dir_out - Set the direction of the specified GPIO pin as output
+ * @chip: gpio_chip instance to be worked on
+ * @pin: gpio pin number within the device
+ * @state: value to be written to specified pin
+ *
+ * This function sets the direction of specified GPIO pin as output, configures
+ * the Output Enable register for the pin and uses zynq_gpio_set to set
+ * the state of the pin to the value specified.
+ *
+ * Return: 0 always
+ */
+static int zynq_gpio_dir_out(struct gpio_chip *chip, unsigned int pin,
+ int state)
+{
+ u32 reg;
+ unsigned int bank_num, bank_pin_num;
+ struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
+
+ if (zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio) < 0)
+ return -EINVAL;
+
+ /* set the GPIO pin as output */
+ reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
+ reg |= BIT(bank_pin_num);
+ writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
+
+ /* configure the output enable reg for the pin */
+ reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));
+ reg |= BIT(bank_pin_num);
+ writel_relaxed(reg, gpio->base_addr + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));
+
+ /* set the state of the pin */
+ zynq_gpio_set_value(chip, pin, state);
+ return 0;
+}
+
+/**
+ * zynq_gpio_get_direction - Read the direction of the specified GPIO pin
+ * @chip: gpio_chip instance to be worked on
+ * @pin: gpio pin number within the device
+ *
+ * This function returns the direction of the specified GPIO.
+ *
+ * Return: 0 for output, 1 for input
+ */
+static int zynq_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
+{
+ u32 reg;
+ unsigned int bank_num, bank_pin_num;
+ struct zynq_gpio *gpio = container_of(chip, struct zynq_gpio, chip);
+
+ if (zynq_gpio_get_bank_pin(pin, &bank_num, &bank_pin_num, gpio) < 0)
+ return -EINVAL;
+
+ reg = readl_relaxed(gpio->base_addr + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
+
+ return !(reg & BIT(bank_pin_num));
+}
+
+static struct gpio_ops zynq_gpio_ops = {
+ .direction_input = zynq_gpio_dir_in,
+ .direction_output = zynq_gpio_dir_out,
+ .get = zynq_gpio_get_value,
+ .set = zynq_gpio_set_value,
+ .get_direction = zynq_gpio_get_direction,
+};
+
+static int zynqmp_gpio_probe(struct device_d *dev)
+{
+ struct resource *iores;
+ struct zynq_gpio *gpio;
+ const struct zynq_platform_data *p_data;
+ int ret;
+
+ gpio = xzalloc(sizeof(*gpio));
+ p_data = device_get_match_data(dev);
+ iores = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(iores)) {
+ ret = PTR_ERR(iores);
+ goto free_gpio;
+ }
+
+ gpio->base_addr = IOMEM(iores->start);
+ gpio->chip.base = of_alias_get_id(dev->device_node, "gpio");
+ gpio->chip.ops = &zynq_gpio_ops;
+ gpio->chip.ngpio = p_data->ngpio;
+ gpio->chip.dev = dev;
+ gpio->p_data = p_data;
+
+ return gpiochip_add(&gpio->chip);
+
+free_gpio:
+ kfree(gpio);
+ return ret;
+}
+
+static const struct zynq_platform_data zynqmp_gpio_def = {
+ .quirks = GPIO_QUIRK_DATA_RO_BUG,
+ .ngpio = ZYNQMP_GPIO_NR_GPIOS,
+ .max_bank = ZYNQMP_GPIO_MAX_BANK,
+ .bank_min[0] = ZYNQ_GPIO_BANK0_PIN_MIN(MP),
+ .bank_max[0] = ZYNQ_GPIO_BANK0_PIN_MAX(MP),
+ .bank_min[1] = ZYNQ_GPIO_BANK1_PIN_MIN(MP),
+ .bank_max[1] = ZYNQ_GPIO_BANK1_PIN_MAX(MP),
+ .bank_min[2] = ZYNQ_GPIO_BANK2_PIN_MIN(MP),
+ .bank_max[2] = ZYNQ_GPIO_BANK2_PIN_MAX(MP),
+ .bank_min[3] = ZYNQ_GPIO_BANK3_PIN_MIN(MP),
+ .bank_max[3] = ZYNQ_GPIO_BANK3_PIN_MAX(MP),
+ .bank_min[4] = ZYNQ_GPIO_BANK4_PIN_MIN(MP),
+ .bank_max[4] = ZYNQ_GPIO_BANK4_PIN_MAX(MP),
+ .bank_min[5] = ZYNQ_GPIO_BANK5_PIN_MIN(MP),
+ .bank_max[5] = ZYNQ_GPIO_BANK5_PIN_MAX(MP),
+};
+
+static const struct zynq_platform_data zynq_gpio_def = {
+ .quirks = ZYNQ_GPIO_QUIRK_IS_ZYNQ | GPIO_QUIRK_DATA_RO_BUG,
+ .ngpio = ZYNQ_GPIO_NR_GPIOS,
+ .max_bank = ZYNQ_GPIO_MAX_BANK,
+ .bank_min[0] = ZYNQ_GPIO_BANK0_PIN_MIN(),
+ .bank_max[0] = ZYNQ_GPIO_BANK0_PIN_MAX(),
+ .bank_min[1] = ZYNQ_GPIO_BANK1_PIN_MIN(),
+ .bank_max[1] = ZYNQ_GPIO_BANK1_PIN_MAX(),
+ .bank_min[2] = ZYNQ_GPIO_BANK2_PIN_MIN(),
+ .bank_max[2] = ZYNQ_GPIO_BANK2_PIN_MAX(),
+ .bank_min[3] = ZYNQ_GPIO_BANK3_PIN_MIN(),
+ .bank_max[3] = ZYNQ_GPIO_BANK3_PIN_MAX(),
+};
+
+static const struct of_device_id zynq_gpio_of_match[] = {
+ { .compatible = "xlnx,zynq-gpio-1.0", .data = &zynq_gpio_def },
+ { .compatible = "xlnx,zynqmp-gpio-1.0", .data = &zynqmp_gpio_def },
+ { /* end of table */ }
+};
+
+static struct driver_d zynqmp_gpio_driver = {
+ .name = "zynqmp-gpio",
+ .of_compatible = zynq_gpio_of_match,
+ .probe = zynqmp_gpio_probe,
+};
+
+postcore_platform_driver(zynqmp_gpio_driver);
diff --git a/drivers/i2c/busses/i2c-imx-early.c b/drivers/i2c/busses/i2c-imx-early.c
index 12c2572ac2..a79d7bd88c 100644
--- a/drivers/i2c/busses/i2c-imx-early.c
+++ b/drivers/i2c/busses/i2c-imx-early.c
@@ -117,7 +117,7 @@ static int i2c_fsl_start(struct fsl_i2c *fsl_i2c)
temp |= I2CR_MTX | I2CR_TXAK;
fsl_i2c_write_reg(temp, fsl_i2c, FSL_I2C_I2CR);
- return ret;
+ return 0;
}
static void i2c_fsl_stop(struct fsl_i2c *fsl_i2c)
diff --git a/drivers/i2c/i2c.c b/drivers/i2c/i2c.c
index c33ce81b18..432d0e2333 100644
--- a/drivers/i2c/i2c.c
+++ b/drivers/i2c/i2c.c
@@ -214,7 +214,8 @@ int i2c_write_reg(struct i2c_client *client, u32 addr, const u8 *buf, u16 count)
msgbuf[i++] = addr;
msg->len += i;
- memcpy(msg->buf + i, buf, count);
+ if (count)
+ memcpy(msg->buf + i, buf, count);
status = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
dev_dbg(&client->adapter->dev, "%s: %u@%u --> %d\n", __func__,
diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c
index 0d31804c10..5aec9fdd5f 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -207,10 +207,8 @@ static int pca954x_probe(struct device_d *dev)
* that the mux is in fact present. This also
* initializes the mux to disconnected state.
*/
- if (i2c_smbus_write_byte(client, 0) < 0) {
- dev_warn(&client->dev, "probe failed\n");
+ if (i2c_smbus_write_byte(client, 0) < 0)
goto exit_free;
- }
ret = dev_get_drvdata(dev, (const void **)&tmp);
data->type = tmp;
diff --git a/drivers/mci/dw_mmc.c b/drivers/mci/dw_mmc.c
index b402090ab3..86c4f43e88 100644
--- a/drivers/mci/dw_mmc.c
+++ b/drivers/mci/dw_mmc.c
@@ -572,7 +572,7 @@ static int dw_mmc_probe(struct device_d *dev)
rst = reset_control_get(dev, "reset");
if (IS_ERR(rst)) {
- return PTR_ERR(rst);
+ dev_warn(dev, "error claiming reset: %pe\n", rst);
} else if (rst) {
reset_control_assert(rst);
udelay(10);
diff --git a/drivers/misc/acpi-test.c b/drivers/misc/acpi-test.c
index 1d6814ebcf..784c80cc5b 100644
--- a/drivers/misc/acpi-test.c
+++ b/drivers/misc/acpi-test.c
@@ -47,7 +47,7 @@ static int acpi_test_probe(struct device_d *dev)
static void acpi_test_remove(struct device_d *dev)
{
- dev_info(dev, "FADT driver removed\n");
+ dev_dbg(dev, "FADT driver removed\n");
}
static struct acpi_driver acpi_test_driver = {
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 6bb41854e0..cbd03e581b 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -853,10 +853,6 @@ static int __init atmel_pmecc_nand_init_params(struct device_d *dev,
if (IS_ERR(iores))
return PTR_ERR(iores);
host->ecc = IOMEM(iores->start);
- if (IS_ERR(host->ecc)) {
- dev_err(host->dev, "ioremap failed\n");
- return -EIO;
- }
iores = dev_request_mem_resource(dev, 2);
if (IS_ERR(iores)) {
@@ -1210,10 +1206,6 @@ static int atmel_hw_nand_init_params(struct device_d *dev,
if (IS_ERR(iores))
return PTR_ERR(iores);
host->ecc = IOMEM(iores->start);
- if (IS_ERR(host->ecc)) {
- dev_err(host->dev, "ioremap failed\n");
- return -EIO;
- }
/* ECC is calculated for the whole page (1 step) */
nand_chip->ecc.size = mtd->writesize;
diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c
index 72d1f4e7ce..1142342169 100644
--- a/drivers/mtd/spi-nor/cadence-quadspi.c
+++ b/drivers/mtd/spi-nor/cadence-quadspi.c
@@ -1192,21 +1192,11 @@ static int cqspi_probe(struct device_d *dev)
if (IS_ERR(iores))
return PTR_ERR(iores);
cqspi->iobase = IOMEM(iores->start);
- if (IS_ERR(cqspi->iobase)) {
- dev_err(dev, "dev_request_mem_region 0 failed\n");
- ret = PTR_ERR(cqspi->iobase);
- goto probe_failed;
- }
iores = dev_request_mem_resource(dev, 1);
if (IS_ERR(iores))
return PTR_ERR(iores);
cqspi->ahb_base = IOMEM(iores->start);
- if (IS_ERR(cqspi->ahb_base)) {
- dev_err(dev, "dev_request_mem_region 0 failed\n");
- ret = PTR_ERR(cqspi->ahb_base);
- goto probe_failed;
- }
cqspi_wait_idle(cqspi);
cqspi_controller_init(cqspi);
diff --git a/drivers/net/designware_eqos.c b/drivers/net/designware_eqos.c
index f83e5d6d9b..399b5fa9e7 100644
--- a/drivers/net/designware_eqos.c
+++ b/drivers/net/designware_eqos.c
@@ -828,6 +828,7 @@ static void eqos_probe_dt(struct device_d *dev, struct eqos *eqos)
int eqos_probe(struct device_d *dev, const struct eqos_ops *ops, void *priv)
{
+ struct device_node *np = dev->device_node;
struct mii_bus *miibus;
struct resource *iores;
struct eqos *eqos;
@@ -866,7 +867,10 @@ int eqos_probe(struct device_d *dev, const struct eqos_ops *ops, void *priv)
miibus->read = eqos_mdio_read;
miibus->write = eqos_mdio_write;
miibus->priv = eqos;
- miibus->dev.device_node = of_get_child_by_name(dev->device_node, "mdio");
+
+ miibus->dev.device_node = of_get_compatible_child(np, "snps,dwmac-mdio");
+ if (!miibus->dev.device_node)
+ miibus->dev.device_node = of_get_child_by_name(np, "mdio");
ret = eqos_init(dev, eqos);
if (ret)
diff --git a/drivers/net/ksz8864rmn.c b/drivers/net/ksz8864rmn.c
index 85063ff0d8..72ab86579b 100644
--- a/drivers/net/ksz8864rmn.c
+++ b/drivers/net/ksz8864rmn.c
@@ -31,48 +31,55 @@
#define CMD_WRITE 0x02
#define CMD_READ 0x03
+enum ksz_type {
+ unknown,
+ ksz87,
+ ksz88
+};
+
struct micrel_switch_priv {
struct cdev cdev;
struct spi_device *spi;
unsigned int p_enable;
+ unsigned int addr_width;
+ unsigned int pad;
};
-static int micrel_switch_read_reg(struct spi_device *spi, uint8_t reg)
+static int micrel_switch_read_reg(const struct micrel_switch_priv *priv, uint8_t reg)
{
uint8_t tx[2];
uint8_t rx[1];
int ret;
- tx[0] = CMD_READ;
- tx[1] = reg;
+ tx[0] = CMD_READ << (priv->addr_width + priv->pad - 8) | reg >> (8 - priv->pad);
+ tx[1] = reg << priv->pad;
- ret = spi_write_then_read(spi, tx, 2, rx, 1);
+ ret = spi_write_then_read(priv->spi, tx, 2, rx, 1);
if (ret < 0)
return ret;
return rx[0];
}
-static void micrel_switch_write_reg(struct spi_device *spi, uint8_t reg, uint8_t val)
+static void micrel_switch_write_reg(const struct micrel_switch_priv *priv, uint8_t reg, uint8_t val)
{
uint8_t tx[3];
- tx[0] = CMD_WRITE;
- tx[1] = reg;
+ tx[0] = CMD_WRITE << (priv->addr_width + priv->pad - 8) | reg >> (8 - priv->pad);
+ tx[1] = reg << priv->pad;
tx[2] = val;
- spi_write_then_read(spi, tx, 3, NULL, 0);
+ spi_write_then_read(priv->spi, tx, 3, NULL, 0);
}
static int micrel_switch_enable_set(struct param_d *param, void *_priv)
{
struct micrel_switch_priv *priv = _priv;
- struct spi_device *spi = priv->spi;
if (priv->p_enable)
- micrel_switch_write_reg(spi, REG_ID1, 1);
+ micrel_switch_write_reg(priv, REG_ID1, 1);
else
- micrel_switch_write_reg(spi, REG_ID1, 0);
+ micrel_switch_write_reg(priv, REG_ID1, 0);
return 0;
}
@@ -84,7 +91,7 @@ static ssize_t micel_switch_read(struct cdev *cdev, void *_buf, size_t count, lo
struct micrel_switch_priv *priv = cdev->priv;
for (i = 0; i < count; i++) {
- ret = micrel_switch_read_reg(priv->spi, offset);
+ ret = micrel_switch_read_reg(priv, offset);
if (ret < 0)
return ret;
*buf = ret;
@@ -102,7 +109,7 @@ static ssize_t micel_switch_write(struct cdev *cdev, const void *_buf, size_t co
struct micrel_switch_priv *priv = cdev->priv;
for (i = 0; i < count; i++) {
- micrel_switch_write_reg(priv->spi, offset, *buf);
+ micrel_switch_write_reg(priv, offset, *buf);
buf++;
offset++;
}
@@ -119,6 +126,11 @@ static int micrel_switch_probe(struct device_d *dev)
{
struct micrel_switch_priv *priv;
int ret = 0;
+ enum ksz_type kind = (enum ksz_type)device_get_match_data(dev);
+ uint8_t id;
+
+ if (kind == unknown)
+ return -ENODEV;
priv = xzalloc(sizeof(*priv));
@@ -128,12 +140,27 @@ static int micrel_switch_probe(struct device_d *dev)
priv->spi->mode = SPI_MODE_0;
priv->spi->bits_per_word = 8;
- ret = micrel_switch_read_reg(priv->spi, REG_ID0);
+ switch (kind) {
+ case ksz87:
+ priv->addr_width = 12;
+ priv->pad = 1;
+ id = 0x87;
+ break;
+ case ksz88:
+ priv->addr_width = 8;
+ priv->pad = 0;
+ id = 0x95;
+ break;
+ default:
+ return -ENODEV;
+ };
+
+ ret = micrel_switch_read_reg(priv, REG_ID0);
if (ret < 0) {
dev_err(&priv->spi->dev, "failed to read device id\n");
return ret;
}
- if (ret != 0x95) {
+ if (ret != id) {
dev_err(&priv->spi->dev, "unknown device id: %02x\n", ret);
return -ENODEV;
}
@@ -149,13 +176,20 @@ static int micrel_switch_probe(struct device_d *dev)
NULL, &priv->p_enable, priv);
priv->p_enable = 1;
- micrel_switch_write_reg(priv->spi, REG_ID1, 1);
+ micrel_switch_write_reg(priv, REG_ID1, 1);
return 0;
}
+static const struct platform_device_id ksz_ids[] = {
+ { .name = "ksz8864rmn", .driver_data = ksz88 },
+ { .name = "ksz8795", .driver_data = ksz87 },
+ { }
+};
+
static struct driver_d micrel_switch_driver = {
.name = "ksz8864rmn",
.probe = micrel_switch_probe,
+ .id_table = ksz_ids,
};
device_spi_driver(micrel_switch_driver);
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index ea193c84a7..cf593ee6a6 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -14,6 +14,7 @@
#include <common.h>
#include <init.h>
+#include <linux/clk.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/phy.h>
@@ -24,16 +25,17 @@
/* Operation Mode Strap Override */
#define MII_KSZPHY_OMSO 0x16
#define KSZPHY_OMSO_B_CAST_OFF BIT(9)
+#define KSZPHY_OMSO_NAND_TREE_ON BIT(5)
#define KSZPHY_OMSO_RMII_OVERRIDE BIT(1)
#define KSZPHY_OMSO_MII_OVERRIDE BIT(0)
/* general PHY control reg in vendor specific block. */
-#define MII_KSZPHY_CTRL 0x1F
+#define MII_KSZPHY_CTRL 0x1f
/* bitmap of PHY register to set interrupt mode */
#define KSZPHY_CTRL_INT_ACTIVE_HIGH BIT(9)
#define KSZ9021_CTRL_INT_ACTIVE_HIGH BIT(14)
#define KS8737_CTRL_INT_ACTIVE_HIGH BIT(14)
-#define KSZ8051_RMII_50MHZ_CLK BIT(7)
+#define KSZPHY_RMII_REF_CLK_SEL BIT(7)
/* PHY Control 1 */
#define MII_KSZPHY_CTRL_1 0x1e
@@ -52,6 +54,47 @@
#define PS_TO_REG 200
+struct kszphy_type {
+ u32 led_mode_reg;
+ bool has_broadcast_disable;
+ bool has_nand_tree_disable;
+ bool has_rmii_ref_clk_sel;
+};
+
+struct kszphy_priv {
+ const struct kszphy_type *type;
+ int led_mode;
+ bool rmii_ref_clk_sel;
+ bool rmii_ref_clk_sel_val;
+};
+
+static const struct kszphy_type ksz8001_type = {
+ .led_mode_reg = MII_KSZPHY_CTRL_1,
+};
+
+static const struct kszphy_type ksz8021_type = {
+ .led_mode_reg = MII_KSZPHY_CTRL,
+ .has_broadcast_disable = true,
+ .has_nand_tree_disable = true,
+ .has_rmii_ref_clk_sel = true,
+};
+
+static const struct kszphy_type ksz8041_type = {
+ .led_mode_reg = MII_KSZPHY_CTRL_1,
+};
+
+static const struct kszphy_type ksz8051_type = {
+ .led_mode_reg = MII_KSZPHY_CTRL,
+ .has_nand_tree_disable = true,
+};
+
+static const struct kszphy_type ksz8081_type = {
+ .led_mode_reg = MII_KSZPHY_CTRL,
+ .has_broadcast_disable = true,
+ .has_nand_tree_disable = true,
+ .has_rmii_ref_clk_sel = true,
+};
+
static int kszphy_extended_write(struct phy_device *phydev,
u32 regnum, u16 val)
{
@@ -66,6 +109,22 @@ static int kszphy_extended_read(struct phy_device *phydev,
return phy_read(phydev, MII_KSZPHY_EXTREG_READ);
}
+static int kszphy_rmii_clk_sel(struct phy_device *phydev, bool val)
+{
+ int ctrl;
+
+ ctrl = phy_read(phydev, MII_KSZPHY_CTRL);
+ if (ctrl < 0)
+ return ctrl;
+
+ if (val)
+ ctrl |= KSZPHY_RMII_REF_CLK_SEL;
+ else
+ ctrl &= ~KSZPHY_RMII_REF_CLK_SEL;
+
+ return phy_write(phydev, MII_KSZPHY_CTRL, ctrl);
+}
+
/* Handle LED mode, shift = position of first led mode bit, usually 4 or 14 */
static int kszphy_led_mode(struct phy_device *phydev, int reg, int shift)
{
@@ -83,37 +142,119 @@ static int kszphy_led_mode(struct phy_device *phydev, int reg, int shift)
return 0;
}
-static int kszphy_config_init(struct phy_device *phydev)
+static int kszphy_setup_led(struct phy_device *phydev, u32 reg, int val)
{
- kszphy_led_mode(phydev, MII_KSZPHY_CTRL_1, 14);
+ const struct device_d *dev = &phydev->dev;
+ int rc, temp, shift;
- return 0;
+ switch (reg) {
+ case MII_KSZPHY_CTRL_1:
+ shift = 14;
+ break;
+ case MII_KSZPHY_CTRL:
+ shift = 4;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ temp = phy_read(phydev, reg);
+ if (temp < 0) {
+ rc = temp;
+ goto out;
+ }
+
+ temp &= ~(3 << shift);
+ temp |= val << shift;
+ rc = phy_write(phydev, reg, temp);
+out:
+ if (rc < 0)
+ dev_err(dev, "failed to set led mode\n");
+
+ return rc;
}
-static int ksz8021_config_init(struct phy_device *phydev)
+/* Disable PHY address 0 as the broadcast address, so that it can be used as a
+ * unique (non-broadcast) address on a shared bus.
+ */
+static int kszphy_broadcast_disable(struct phy_device *phydev)
{
- phy_set_bits(phydev, MII_KSZPHY_OMSO, KSZPHY_OMSO_B_CAST_OFF);
+ const struct device_d *dev = &phydev->dev;
+ int ret;
- kszphy_led_mode(phydev, MII_KSZPHY_CTRL, 4);
+ ret = phy_read(phydev, MII_KSZPHY_OMSO);
+ if (ret < 0)
+ goto out;
- return 0;
+ ret = phy_write(phydev, MII_KSZPHY_OMSO, ret | KSZPHY_OMSO_B_CAST_OFF);
+out:
+ if (ret)
+ dev_err(dev, "failed to disable broadcast address\n");
+
+ return ret;
}
-static int ks8051_config_init(struct phy_device *phydev)
+static int kszphy_nand_tree_disable(struct phy_device *phydev)
{
- int regval;
+ const struct device_d *dev = &phydev->dev;
+ int ret;
+
+ ret = phy_read(phydev, MII_KSZPHY_OMSO);
+ if (ret < 0)
+ goto out;
+
+ if (!(ret & KSZPHY_OMSO_NAND_TREE_ON))
+ return 0;
+
+ ret = phy_write(phydev, MII_KSZPHY_OMSO,
+ ret & ~KSZPHY_OMSO_NAND_TREE_ON);
+out:
+ if (ret)
+ dev_err(dev, "failed to disable NAND tree mode\n");
+
+ return ret;
+}
+
+/* Some config bits need to be set again on resume, handle them here. */
+static int kszphy_config_reset(struct phy_device *phydev)
+{
+ struct kszphy_priv *priv = phydev->priv;
+ int ret;
- if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) {
- regval = phy_read(phydev, MII_KSZPHY_CTRL);
- regval |= KSZ8051_RMII_50MHZ_CLK;
- phy_write(phydev, MII_KSZPHY_CTRL, regval);
+ if (priv->rmii_ref_clk_sel) {
+ ret = kszphy_rmii_clk_sel(phydev, priv->rmii_ref_clk_sel_val);
+ if (ret) {
+ dev_err(&phydev->dev,
+ "failed to set rmii reference clock\n");
+ return ret;
+ }
}
- kszphy_led_mode(phydev, MII_KSZPHY_CTRL, 4);
+ if (priv->led_mode >= 0)
+ kszphy_setup_led(phydev, priv->type->led_mode_reg, priv->led_mode);
return 0;
}
+static int kszphy_config_init(struct phy_device *phydev)
+{
+ struct kszphy_priv *priv = phydev->priv;
+ const struct kszphy_type *type;
+
+ if (!priv)
+ return 0;
+
+ type = priv->type;
+
+ if (type->has_broadcast_disable)
+ kszphy_broadcast_disable(phydev);
+
+ if (type->has_nand_tree_disable)
+ kszphy_nand_tree_disable(phydev);
+
+ return kszphy_config_reset(phydev);
+}
+
static int ksz9021_load_values_from_of(struct phy_device *phydev,
const struct device_node *of_node,
u16 reg, const char *field[])
@@ -468,13 +609,66 @@ static int ksz8873mll_config_init(struct phy_device *phydev)
return 0;
}
+static int kszphy_probe(struct phy_device *phydev)
+{
+ struct device_d *dev = &phydev->dev;
+ struct device_node *np = dev->device_node;
+ struct phy_driver *drv = to_phy_driver(dev->driver);
+ const struct kszphy_type *type = drv->driver_data;
+ struct kszphy_priv *priv;
+ struct clk *clk;
+ int ret;
+
+ priv = xzalloc(sizeof(*priv));
+
+ phydev->priv = priv;
+
+ priv->type = type;
+
+ if (type->led_mode_reg) {
+ ret = of_property_read_u32(np, "micrel,led-mode",
+ &priv->led_mode);
+ if (ret)
+ priv->led_mode = -1;
+
+ if (priv->led_mode > 3) {
+ dev_err(dev, "invalid led mode: 0x%02x\n",
+ priv->led_mode);
+ priv->led_mode = -1;
+ }
+ } else {
+ priv->led_mode = -1;
+ }
+
+ clk = clk_get(dev, "rmii-ref");
+ /* NOTE: clk may be NULL if building without CONFIG_HAVE_CLK */
+ if (!IS_ERR_OR_NULL(clk)) {
+ unsigned long rate = clk_get_rate(clk);
+ bool rmii_ref_clk_sel_25_mhz;
+
+ priv->rmii_ref_clk_sel = type->has_rmii_ref_clk_sel;
+ rmii_ref_clk_sel_25_mhz = of_property_read_bool(np,
+ "micrel,rmii-reference-clock-select-25-mhz");
+
+ if (rate > 24500000 && rate < 25500000) {
+ priv->rmii_ref_clk_sel_val = rmii_ref_clk_sel_25_mhz;
+ } else if (rate > 49500000 && rate < 50500000) {
+ priv->rmii_ref_clk_sel_val = !rmii_ref_clk_sel_25_mhz;
+ } else {
+ dev_err(dev, "Clock rate out of range: %ld\n", rate);
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+
static struct phy_driver ksphy_driver[] = {
{
.phy_id = PHY_ID_KS8737,
.phy_id_mask = 0x00fffff0,
.drv.name = "Micrel KS8737",
.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
- .config_init = kszphy_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
}, {
@@ -483,7 +677,9 @@ static struct phy_driver ksphy_driver[] = {
.drv.name = "Micrel KSZ8021",
.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
SUPPORTED_Asym_Pause),
- .config_init = ksz8021_config_init,
+ .driver_data = &ksz8021_type,
+ .probe = kszphy_probe,
+ .config_init = kszphy_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
}, {
@@ -492,7 +688,9 @@ static struct phy_driver ksphy_driver[] = {
.drv.name = "Micrel KSZ8031",
.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
SUPPORTED_Asym_Pause),
- .config_init = ksz8021_config_init,
+ .driver_data = &ksz8021_type,
+ .probe = kszphy_probe,
+ .config_init = kszphy_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
}, {
@@ -501,6 +699,8 @@ static struct phy_driver ksphy_driver[] = {
.drv.name = "Micrel KSZ8041",
.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
| SUPPORTED_Asym_Pause),
+ .driver_data = &ksz8041_type,
+ .probe = kszphy_probe,
.config_init = kszphy_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
@@ -510,22 +710,28 @@ static struct phy_driver ksphy_driver[] = {
.drv.name = "Micrel KSZ8051",
.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause
| SUPPORTED_Asym_Pause),
- .config_init = ks8051_config_init,
+ .driver_data = &ksz8051_type,
+ .probe = kszphy_probe,
+ .config_init = kszphy_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
}, {
.phy_id = PHY_ID_KSZ8081,
.phy_id_mask = MICREL_PHY_ID_MASK,
.drv.name = "Micrel KSZ8081/91",
+ .driver_data = &ksz8081_type,
.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
- .config_init = ksz8021_config_init,
+ .probe = kszphy_probe,
+ .config_init = kszphy_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
}, {
.phy_id = PHY_ID_KSZ8001,
- .drv.name = "Micrel KSZ8001 or KS8721",
.phy_id_mask = 0x00ffffff,
+ .drv.name = "Micrel KSZ8001 or KS8721",
+ .driver_data = &ksz8001_type,
.features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
+ .probe = kszphy_probe,
.config_init = kszphy_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig
index 6579bcd55e..e1f23729e9 100644
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -24,4 +24,11 @@ config NET_USB_SMSC95XX
select PHYLIB
bool "SMSC95xx"
+config NET_USB_RTL8152
+ bool "Realtek RTL8152B/RTL8153 support"
+ help
+ Say Y here if you would like to support Realtek RTL8152B/RTL8153 base
+ USB Ethernet Devices. This driver also supports compatible devices
+ from Samsung, Lenovo, TP-LINK and Nvidia.
+
endif
diff --git a/drivers/net/usb/Makefile b/drivers/net/usb/Makefile
index cde42d2955..ab1b8209df 100644
--- a/drivers/net/usb/Makefile
+++ b/drivers/net/usb/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_NET_USB) += usbnet.o
obj-$(CONFIG_NET_USB_ASIX) += asix.o
obj-$(CONFIG_USB_NET_AX88179_178A) += ax88179_178a.o
obj-$(CONFIG_NET_USB_SMSC95XX) += smsc95xx.o
+obj-$(CONFIG_NET_USB_RTL8152) += r8152.o r8152_fw.o
diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c
new file mode 100644
index 0000000000..3647be02c3
--- /dev/null
+++ b/drivers/net/usb/r8152.c
@@ -0,0 +1,1593 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright (c) 2015 Realtek Semiconductor Corp. All rights reserved. */
+
+#include <common.h>
+#include <dma.h>
+#include <errno.h>
+#include <init.h>
+#include <linux/ethtool.h>
+#include <linux/mii.h>
+#include <linux/phy.h>
+#include <usb/usb.h>
+#include <usb/usbnet.h>
+#include "r8152.h"
+
+#define R8152_TX_BURST_SIZE 512
+#define R8152_RX_BURST_SIZE 64
+
+struct r8152_version {
+ unsigned short tcr;
+ unsigned short version;
+ bool gmii;
+};
+
+static const struct r8152_version r8152_versions[] = {
+ { 0x4c00, RTL_VER_01, 0 },
+ { 0x4c10, RTL_VER_02, 0 },
+ { 0x5c00, RTL_VER_03, 1 },
+ { 0x5c10, RTL_VER_04, 1 },
+ { 0x5c20, RTL_VER_05, 1 },
+ { 0x5c30, RTL_VER_06, 1 },
+ { 0x4800, RTL_VER_07, 0 },
+ { 0x6000, RTL_VER_08, 1 },
+ { 0x6010, RTL_VER_09, 1 },
+};
+
+static inline struct r8152 *r8152_get_priv(struct usbnet *dev)
+{
+ return (struct r8152 *)dev->driver_priv;
+}
+
+static int r8152_get_registers(struct r8152 *tp, u16 value, u16 index, u16 size,
+ void *data)
+{
+ int ret;
+
+ if (WARN_ON(size > R8152_RX_BURST_SIZE))
+ return -EINVAL;
+
+ ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
+ RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
+ value, index, tp->rxbuf, size, 500);
+ memcpy(data, tp->rxbuf, size);
+
+ return ret;
+}
+
+static int r8152_set_registers(struct r8152 *tp, u16 value, u16 index, u16 size,
+ const void *data)
+{
+ int ret;
+
+ if (WARN_ON(size > R8152_TX_BURST_SIZE))
+ return -EINVAL;
+
+ memcpy(tp->txbuf, data, size);
+ ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
+ RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
+ value, index, tp->txbuf, size, 500);
+
+ return ret;
+}
+
+static int r8152_generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
+ void *data, u16 type)
+{
+ u16 burst_size = R8152_RX_BURST_SIZE;
+ int txsize;
+ int ret;
+
+ /* both size and index must be 4 bytes align */
+ if ((size & 3) || !size || (index & 3) || !data)
+ return -EINVAL;
+
+ if (index + size > 0xffff)
+ return -EINVAL;
+
+ while (size) {
+ txsize = min(size, burst_size);
+ ret = r8152_get_registers(tp, index, type, txsize, data);
+ if (ret < 0)
+ break;
+
+ index += txsize;
+ data += txsize;
+ size -= txsize;
+ }
+
+ return ret;
+}
+
+int r8152_generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
+ u16 size, const void *data, u16 type)
+{
+ u16 byteen_start, byteen_end, byte_en_to_hw;
+ u16 burst_size = R8152_TX_BURST_SIZE;
+ int txsize;
+ int ret;
+
+ /* both size and index must be 4 bytes align */
+ if ((size & 3) || !size || (index & 3) || !data)
+ return -EINVAL;
+
+ if (index + size > 0xffff)
+ return -EINVAL;
+
+ byteen_start = byteen & BYTE_EN_START_MASK;
+ byteen_end = byteen & BYTE_EN_END_MASK;
+
+ byte_en_to_hw = byteen_start | (byteen_start << 4);
+ ret = r8152_set_registers(tp, index, type | byte_en_to_hw, 4, data);
+ if (ret < 0)
+ return ret;
+
+ index += 4;
+ data += 4;
+ size -= 4;
+
+ if (size) {
+ size -= 4;
+
+ while (size) {
+ txsize = min(size, burst_size);
+
+ ret = r8152_set_registers(tp, index,
+ type | BYTE_EN_DWORD,
+ txsize, data);
+ if (ret < 0)
+ return ret;
+
+ index += txsize;
+ data += txsize;
+ size -= txsize;
+ }
+
+ byte_en_to_hw = byteen_end | (byteen_end >> 4);
+ ret = r8152_set_registers(tp, index, type | byte_en_to_hw, 4,
+ data);
+ if (ret < 0)
+ return ret;
+ }
+
+ return ret;
+}
+
+static int r8152_pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
+{
+ return r8152_generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
+}
+
+static int r8152_pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
+ u16 size, const void *data)
+{
+ return r8152_generic_ocp_write(tp, index, byteen, size, data,
+ MCU_TYPE_PLA);
+}
+
+static int r8152_usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
+ u16 size, const void *data)
+{
+ return r8152_generic_ocp_write(tp, index, byteen, size, data,
+ MCU_TYPE_USB);
+}
+
+static u32 r8152_ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
+{
+ __le32 data;
+
+ r8152_generic_ocp_read(tp, index, sizeof(data), &data, type);
+
+ return __le32_to_cpu(data);
+}
+
+static void r8152_ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
+{
+ __le32 tmp = __cpu_to_le32(data);
+
+ r8152_generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp,
+ type);
+}
+
+u16 r8152_ocp_read_word(struct r8152 *tp, u16 type, u16 index)
+{
+ u32 data;
+ __le32 tmp;
+ u8 shift = index & 2;
+
+ index &= ~3;
+
+ r8152_generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
+
+ data = __le32_to_cpu(tmp);
+ data >>= (shift * 8);
+ data &= 0xffff;
+
+ return data;
+}
+
+void r8152_ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
+{
+ u32 mask = 0xffff;
+ __le32 tmp;
+ u16 byen = BYTE_EN_WORD;
+ u8 shift = index & 2;
+
+ data &= mask;
+
+ if (index & 2) {
+ byen <<= shift;
+ mask <<= (shift * 8);
+ data <<= (shift * 8);
+ index &= ~3;
+ }
+
+ tmp = __cpu_to_le32(data);
+
+ r8152_generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
+}
+
+u8 r8152_ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
+{
+ u32 data;
+ __le32 tmp;
+ u8 shift = index & 3;
+
+ index &= ~3;
+
+ r8152_generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
+
+ data = __le32_to_cpu(tmp);
+ data >>= (shift * 8);
+ data &= 0xff;
+
+ return data;
+}
+
+void r8152_ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
+{
+ u32 mask = 0xff;
+ __le32 tmp;
+ u16 byen = BYTE_EN_BYTE;
+ u8 shift = index & 3;
+
+ data &= mask;
+
+ if (index & 3) {
+ byen <<= shift;
+ mask <<= (shift * 8);
+ data <<= (shift * 8);
+ index &= ~3;
+ }
+
+ tmp = __cpu_to_le32(data);
+
+ r8152_generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
+}
+
+u16 r8152_ocp_reg_read(struct r8152 *tp, u16 addr)
+{
+ u16 ocp_base, ocp_index;
+
+ ocp_base = addr & 0xf000;
+ if (ocp_base != tp->ocp_base) {
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE,
+ ocp_base);
+ tp->ocp_base = ocp_base;
+ }
+
+ ocp_index = (addr & 0x0fff) | 0xb000;
+ return r8152_ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
+}
+
+void r8152_ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
+{
+ u16 ocp_base, ocp_index;
+
+ ocp_base = addr & 0xf000;
+ if (ocp_base != tp->ocp_base) {
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE,
+ ocp_base);
+ tp->ocp_base = ocp_base;
+ }
+
+ ocp_index = (addr & 0x0fff) | 0xb000;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
+}
+
+static void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
+{
+ r8152_ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
+}
+
+static int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
+{
+ return r8152_ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
+}
+
+void r8152_sram_write(struct r8152 *tp, u16 addr, u16 data)
+{
+ r8152_ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
+ r8152_ocp_reg_write(tp, OCP_SRAM_DATA, data);
+}
+
+static u16 r8152_sram_read(struct r8152 *tp, u16 addr)
+{
+ r8152_ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
+ return r8152_ocp_reg_read(tp, OCP_SRAM_DATA);
+}
+
+static int r8152_wait_for_bit(struct r8152 *tp, bool ocp_reg, u16 type,
+ u16 index, const u32 mask, bool set,
+ unsigned int timeout)
+{
+ u32 val;
+ u64 start;
+
+ start = get_time_ns();
+ do {
+ if (ocp_reg)
+ val = r8152_ocp_reg_read(tp, index);
+ else
+ val = r8152_ocp_read_dword(tp, type, index);
+
+ if (!set)
+ val = ~val;
+
+ if ((val & mask) == mask)
+ return 0;
+
+ mdelay(2);
+ } while (!is_timeout(start, timeout * MSECOND));
+
+ dev_dbg(&tp->dev->edev.dev, "%s: Timeout (index=%04x mask=%08x timeout=%d)\n",
+ __func__, index, mask, timeout);
+
+ return -ETIMEDOUT;
+}
+
+static void r8152b_reset_packet_filter(struct r8152 *tp)
+{
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
+ ocp_data &= ~FMC_FCR_MCU_EN;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
+ ocp_data |= FMC_FCR_MCU_EN;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
+}
+
+static void r8152_wait_fifo_empty(struct r8152 *tp)
+{
+ int ret;
+
+ ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_PHY_PWR,
+ PLA_PHY_PWR_TXEMP, 1, R8152_WAIT_TIMEOUT);
+ if (ret)
+ dev_dbg(&tp->dev->edev.dev, "Timeout waiting for FIFO empty\n");
+
+ ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_TCR0,
+ TCR0_TX_EMPTY, 1, R8152_WAIT_TIMEOUT);
+ if (ret)
+ dev_dbg(&tp->dev->edev.dev, "Timeout waiting for TX empty\n");
+}
+
+static void r8152_nic_reset(struct r8152 *tp)
+{
+ int ret;
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_dword(tp, MCU_TYPE_PLA, BIST_CTRL);
+ ocp_data |= BIST_CTRL_SW_RESET;
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, BIST_CTRL, ocp_data);
+
+ ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, BIST_CTRL,
+ BIST_CTRL_SW_RESET, 0, R8152_WAIT_TIMEOUT);
+ if (ret)
+ dev_dbg(&tp->dev->edev.dev, "Timeout waiting for NIC reset\n");
+}
+
+static u8 r8152_get_speed(struct r8152 *tp)
+{
+ return r8152_ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
+}
+
+static void r8152_set_eee_plus(struct r8152 *tp)
+{
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
+ ocp_data &= ~EEEP_CR_EEEP_TX;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
+}
+
+static void rxdy_gated_en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
+ if (enable)
+ ocp_data |= RXDY_GATED_EN;
+ else
+ ocp_data &= ~RXDY_GATED_EN;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
+}
+
+static void rtl8152_set_rx_mode(struct r8152 *tp)
+{
+ u32 ocp_data;
+ __le32 tmp[2];
+
+ tmp[0] = 0xffffffff;
+ tmp[1] = 0xffffffff;
+
+ r8152_pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
+
+ ocp_data = r8152_ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
+ ocp_data |= RCR_APM | RCR_AM | RCR_AB;
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
+}
+
+static inline void r8153b_rx_agg_chg_indicate(struct r8152 *tp)
+{
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_UPT_RXDMA_OWN,
+ OWN_UPDATE | OWN_CLEAR);
+}
+
+static int rtl_enable(struct r8152 *tp)
+{
+ u32 ocp_data;
+
+ r8152b_reset_packet_filter(tp);
+
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
+ ocp_data |= PLA_CR_RE | PLA_CR_TE;
+ r8152_ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
+
+ switch (tp->version) {
+ case RTL_VER_08:
+ case RTL_VER_09:
+ r8153b_rx_agg_chg_indicate(tp);
+ break;
+ default:
+ break;
+ }
+
+ rxdy_gated_en(tp, false);
+
+ rtl8152_set_rx_mode(tp);
+
+ return 0;
+}
+
+static int rtl8152_enable(struct r8152 *tp)
+{
+ r8152_set_eee_plus(tp);
+
+ return rtl_enable(tp);
+}
+
+static void r8153_set_rx_early_timeout(struct r8152 *tp)
+{
+ u32 ocp_data = tp->coalesce / 8;
+
+ switch (tp->version) {
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
+ ocp_data);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ /* The RTL8153B uses USB_RX_EXTRA_AGGR_TMR for rx timeout
+ * primarily. For USB_RX_EARLY_TIMEOUT, we fix it to 1264ns.
+ */
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT,
+ RX_AUXILIARY_TIMER / 8);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EXTRA_AGGR_TMR,
+ ocp_data);
+ break;
+
+ default:
+ dev_dbg(&tp->dev->edev.dev, "** %s Invalid Device\n", __func__);
+ break;
+ }
+}
+
+static void r8153_set_rx_early_size(struct r8152 *tp)
+{
+ u32 ocp_data = (RTL8152_AGG_BUF_SZ - RTL8153_RMS -
+ sizeof(struct rx_desc));
+
+ switch (tp->version) {
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
+ ocp_data / 4);
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE,
+ ocp_data / 8);
+ break;
+
+ default:
+ dev_dbg(&tp->dev->edev.dev, "** %s Invalid Device\n", __func__);
+ break;
+ }
+}
+
+static int rtl8153_enable(struct r8152 *tp)
+{
+ r8152_set_eee_plus(tp);
+ r8153_set_rx_early_timeout(tp);
+ r8153_set_rx_early_size(tp);
+
+ return rtl_enable(tp);
+}
+
+static void rtl_disable(struct r8152 *tp)
+{
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
+ ocp_data &= ~RCR_ACPT_ALL;
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
+
+ rxdy_gated_en(tp, true);
+
+ r8152_wait_fifo_empty(tp);
+ r8152_nic_reset(tp);
+}
+
+static void r8152_power_cut_en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
+ if (enable)
+ ocp_data |= POWER_CUT;
+ else
+ ocp_data &= ~POWER_CUT;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
+ ocp_data &= ~RESUME_INDICATE;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
+}
+
+static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
+ if (enable)
+ ocp_data |= CPCR_RX_VLAN;
+ else
+ ocp_data &= ~CPCR_RX_VLAN;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
+}
+
+static void r8153_u1u2en(struct r8152 *tp, bool enable)
+{
+ u8 u1u2[8];
+
+ if (enable)
+ memset(u1u2, 0xff, sizeof(u1u2));
+ else
+ memset(u1u2, 0x00, sizeof(u1u2));
+
+ r8152_usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2),
+ u1u2);
+}
+
+static void r8153b_u1u2en(struct r8152 *tp, bool enable)
+{
+ u16 ocp_data;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG);
+ if (enable)
+ ocp_data |= LPM_U1U2_EN;
+ else
+ ocp_data &= ~LPM_U1U2_EN;
+
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_LPM_CONFIG, ocp_data);
+}
+
+static void r8153_u2p3en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
+ if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
+ ocp_data |= U2P3_ENABLE;
+ else
+ ocp_data &= ~U2P3_ENABLE;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
+}
+
+static void r8153_power_cut_en(struct r8152 *tp, bool enable)
+{
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
+ if (enable)
+ ocp_data |= PWR_EN | PHASE2_EN;
+ else
+ ocp_data &= ~(PWR_EN | PHASE2_EN);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
+ ocp_data &= ~PCUT_STATUS;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
+}
+
+static void rtl_reset_bmu(struct r8152 *tp)
+{
+ u8 ocp_data;
+
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
+ ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
+ ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
+}
+
+static int r8152_read_mac(struct r8152 *tp, unsigned char *macaddr)
+{
+ int ret;
+ unsigned char enetaddr[8] = {0};
+
+ ret = r8152_pla_ocp_read(tp, PLA_IDR, 8, enetaddr);
+ if (ret < 0)
+ return ret;
+
+ memcpy(macaddr, enetaddr, ETH_ALEN);
+ return 0;
+}
+
+static void r8152b_disable_aldps(struct r8152 *tp)
+{
+ r8152_ocp_reg_write(tp, OCP_ALDPS_CONFIG,
+ ENPDNPS | LINKENA | DIS_SDSAVE);
+ mdelay(20);
+}
+
+static void r8152b_enable_aldps(struct r8152 *tp)
+{
+ r8152_ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
+ LINKENA | DIS_SDSAVE);
+}
+
+static void rtl8152_disable(struct r8152 *tp)
+{
+ r8152b_disable_aldps(tp);
+ rtl_disable(tp);
+ r8152b_enable_aldps(tp);
+}
+
+static void r8152b_hw_phy_cfg(struct r8152 *tp)
+{
+ u16 data;
+
+ data = r8152_mdio_read(tp, MII_BMCR);
+ if (data & BMCR_PDOWN) {
+ data &= ~BMCR_PDOWN;
+ r8152_mdio_write(tp, MII_BMCR, data);
+ }
+
+ r8152b_firmware(tp);
+}
+
+static void rtl8152_reinit_ll(struct r8152 *tp)
+{
+ u32 ocp_data;
+ int ret;
+
+ ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_PHY_PWR,
+ PLA_PHY_PWR_LLR, 1, R8152_WAIT_TIMEOUT);
+ if (ret)
+ dev_dbg(&tp->dev->edev.dev, "Timeout waiting for link list ready\n");
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
+ ocp_data |= RE_INIT_LL;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
+
+ ret = r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_PHY_PWR,
+ PLA_PHY_PWR_LLR, 1, R8152_WAIT_TIMEOUT);
+ if (ret)
+ dev_dbg(&tp->dev->edev.dev, "Timeout waiting for link list ready\n");
+}
+
+static void r8152b_exit_oob(struct r8152 *tp)
+{
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
+ ocp_data &= ~RCR_ACPT_ALL;
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
+
+ rxdy_gated_en(tp, true);
+ r8152b_hw_phy_cfg(tp);
+
+ r8152_ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
+ r8152_ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
+
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
+ ocp_data &= ~NOW_IS_OOB;
+ r8152_ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
+ ocp_data &= ~MCU_BORW_EN;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
+
+ rtl8152_reinit_ll(tp);
+ r8152_nic_reset(tp);
+
+ /* rx share fifo credit full threshold */
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0,
+ RXFIFO_THR1_NORMAL);
+
+ if (tp->udev->speed == USB_SPEED_FULL ||
+ tp->udev->speed == USB_SPEED_LOW) {
+ /* rx share fifo credit near full threshold */
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
+ RXFIFO_THR2_FULL);
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
+ RXFIFO_THR3_FULL);
+ } else {
+ /* rx share fifo credit near full threshold */
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
+ RXFIFO_THR2_HIGH);
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
+ RXFIFO_THR3_HIGH);
+ }
+
+ /* TX share fifo free credit full threshold */
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL,
+ TXFIFO_THR_NORMAL);
+
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
+ r8152_ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
+ r8152_ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
+ TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
+ ocp_data |= TCR0_AUTO_FIFO;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
+}
+
+static void r8153_hw_phy_cfg(struct r8152 *tp)
+{
+ u32 ocp_data;
+ u16 data;
+
+ if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
+ tp->version == RTL_VER_05)
+ r8152_ocp_reg_write(tp, OCP_ADC_CFG,
+ CKADSEL_L | ADC_EN | EN_EMI_L);
+
+ data = r8152_mdio_read(tp, MII_BMCR);
+ if (data & BMCR_PDOWN) {
+ data &= ~BMCR_PDOWN;
+ r8152_mdio_write(tp, MII_BMCR, data);
+ }
+
+ r8153_firmware(tp);
+
+ if (tp->version == RTL_VER_03) {
+ data = r8152_ocp_reg_read(tp, OCP_EEE_CFG);
+ data &= ~CTAP_SHORT_EN;
+ r8152_ocp_reg_write(tp, OCP_EEE_CFG, data);
+ }
+
+ data = r8152_ocp_reg_read(tp, OCP_POWER_CFG);
+ data |= EEE_CLKDIV_EN;
+ r8152_ocp_reg_write(tp, OCP_POWER_CFG, data);
+
+ data = r8152_ocp_reg_read(tp, OCP_DOWN_SPEED);
+ data |= EN_10M_BGOFF;
+ r8152_ocp_reg_write(tp, OCP_DOWN_SPEED, data);
+ data = r8152_ocp_reg_read(tp, OCP_POWER_CFG);
+ data |= EN_10M_PLLOFF;
+ r8152_ocp_reg_write(tp, OCP_POWER_CFG, data);
+ r8152_sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
+ ocp_data |= PFM_PWM_SWITCH;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
+
+ /* Enable LPF corner auto tune */
+ r8152_sram_write(tp, SRAM_LPF_CFG, 0xf70f);
+
+ /* Adjust 10M Amplitude */
+ r8152_sram_write(tp, SRAM_10M_AMP1, 0x00af);
+ r8152_sram_write(tp, SRAM_10M_AMP2, 0x0208);
+}
+
+static u32 r8152_efuse_read(struct r8152 *tp, u8 addr)
+{
+ u32 ocp_data;
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD,
+ EFUSE_READ_CMD | addr);
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_CMD);
+ ocp_data = (ocp_data & EFUSE_DATA_BIT16) << 9; /* data of bit16 */
+ ocp_data |= r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_EFUSE_DATA);
+
+ return ocp_data;
+}
+
+static void r8153b_hw_phy_cfg(struct r8152 *tp)
+{
+ u32 ocp_data;
+ u16 data;
+
+ data = r8152_mdio_read(tp, MII_BMCR);
+ if (data & BMCR_PDOWN) {
+ data &= ~BMCR_PDOWN;
+ r8152_mdio_write(tp, MII_BMCR, data);
+ }
+
+ /* U1/U2/L1 idle timer. 500 us */
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_U1U2_TIMER, 500);
+
+ r8153b_firmware(tp);
+
+ data = r8152_sram_read(tp, SRAM_GREEN_CFG);
+ data |= R_TUNE_EN;
+ r8152_sram_write(tp, SRAM_GREEN_CFG, data);
+ data = r8152_ocp_reg_read(tp, OCP_NCTL_CFG);
+ data |= PGA_RETURN_EN;
+ r8152_ocp_reg_write(tp, OCP_NCTL_CFG, data);
+
+ /* ADC Bias Calibration:
+ * read efuse offset 0x7d to get a 17-bit data. Remove the dummy/fake
+ * bit (bit3) to rebuild the real 16-bit data. Write the data to the
+ * ADC ioffset.
+ */
+ ocp_data = r8152_efuse_read(tp, 0x7d);
+ ocp_data = ((ocp_data & 0x1fff0) >> 1) | (ocp_data & 0x7);
+ if (ocp_data != 0xffff)
+ r8152_ocp_reg_write(tp, OCP_ADC_IOFFSET, ocp_data);
+
+ /* ups mode tx-link-pulse timing adjustment:
+ * rg_saw_cnt = OCP reg 0xC426 Bit[13:0]
+ * swr_cnt_1ms_ini = 16000000 / rg_saw_cnt
+ */
+ ocp_data = r8152_ocp_reg_read(tp, 0xc426);
+ ocp_data &= 0x3fff;
+ if (ocp_data) {
+ u32 swr_cnt_1ms_ini;
+
+ swr_cnt_1ms_ini = (16000000 / ocp_data) & SAW_CNT_1MS_MASK;
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CFG);
+ ocp_data = (ocp_data & ~SAW_CNT_1MS_MASK) | swr_cnt_1ms_ini;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CFG, ocp_data);
+ }
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
+ ocp_data |= PFM_PWM_SWITCH;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
+}
+
+static void r8153_first_init(struct r8152 *tp)
+{
+ u32 ocp_data;
+
+ rxdy_gated_en(tp, true);
+
+ ocp_data = r8152_ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
+ ocp_data &= ~RCR_ACPT_ALL;
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
+
+ r8153_hw_phy_cfg(tp);
+
+ r8152_nic_reset(tp);
+ rtl_reset_bmu(tp);
+
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
+ ocp_data &= ~NOW_IS_OOB;
+ r8152_ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
+ ocp_data &= ~MCU_BORW_EN;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
+
+ rtl8152_reinit_ll(tp);
+
+ rtl_rx_vlan_en(tp, false);
+
+ ocp_data = RTL8153_RMS;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, ocp_data);
+ r8152_ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
+ ocp_data |= TCR0_AUTO_FIFO;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
+
+ r8152_nic_reset(tp);
+
+ /* rx share fifo credit full threshold */
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0,
+ RXFIFO_THR1_NORMAL);
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
+ RXFIFO_THR2_NORMAL);
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
+ RXFIFO_THR3_NORMAL);
+ /* TX share fifo free credit full threshold */
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL,
+ TXFIFO_THR_NORMAL2);
+
+ /* rx aggregation */
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
+
+ ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
+}
+
+static void r8153_disable_aldps(struct r8152 *tp)
+{
+ u16 data;
+
+ data = r8152_ocp_reg_read(tp, OCP_POWER_CFG);
+ data &= ~EN_ALDPS;
+ r8152_ocp_reg_write(tp, OCP_POWER_CFG, data);
+ mdelay(20);
+}
+
+static void rtl8153_disable(struct r8152 *tp)
+{
+ r8153_disable_aldps(tp);
+ rtl_disable(tp);
+ rtl_reset_bmu(tp);
+}
+
+static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
+{
+ u16 bmcr, anar, gbcr;
+
+ anar = r8152_mdio_read(tp, MII_ADVERTISE);
+ anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
+ ADVERTISE_100HALF | ADVERTISE_100FULL);
+ if (tp->supports_gmii) {
+ gbcr = r8152_mdio_read(tp, MII_CTRL1000);
+ gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
+ } else {
+ gbcr = 0;
+ }
+
+ if (autoneg == AUTONEG_DISABLE) {
+ if (speed == SPEED_10) {
+ bmcr = 0;
+ anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
+ } else if (speed == SPEED_100) {
+ bmcr = BMCR_SPEED100;
+ anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+ } else if (speed == SPEED_1000 && tp->supports_gmii) {
+ bmcr = BMCR_SPEED1000;
+ gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
+ } else {
+ return -EINVAL;
+ }
+
+ if (duplex == DUPLEX_FULL)
+ bmcr |= BMCR_FULLDPLX;
+ } else {
+ if (speed == SPEED_10) {
+ if (duplex == DUPLEX_FULL)
+ anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
+ else
+ anar |= ADVERTISE_10HALF;
+ } else if (speed == SPEED_100) {
+ if (duplex == DUPLEX_FULL) {
+ anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
+ anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+ } else {
+ anar |= ADVERTISE_10HALF;
+ anar |= ADVERTISE_100HALF;
+ }
+ } else if (speed == SPEED_1000 && tp->supports_gmii) {
+ if (duplex == DUPLEX_FULL) {
+ anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
+ anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+ gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
+ } else {
+ anar |= ADVERTISE_10HALF;
+ anar |= ADVERTISE_100HALF;
+ gbcr |= ADVERTISE_1000HALF;
+ }
+ } else {
+ return -EINVAL;
+ }
+
+ bmcr = BMCR_ANENABLE | BMCR_ANRESTART | BMCR_RESET;
+ }
+
+ if (tp->supports_gmii)
+ r8152_mdio_write(tp, MII_CTRL1000, gbcr);
+
+ r8152_mdio_write(tp, MII_ADVERTISE, anar);
+ r8152_mdio_write(tp, MII_BMCR, bmcr);
+
+ return 0;
+}
+
+static void rtl8152_up(struct r8152 *tp)
+{
+ r8152b_disable_aldps(tp);
+ r8152b_exit_oob(tp);
+ r8152b_enable_aldps(tp);
+}
+
+static void rtl8153_up(struct r8152 *tp)
+{
+ r8153_u1u2en(tp, false);
+ r8153_disable_aldps(tp);
+ r8153_first_init(tp);
+ r8153_u2p3en(tp, false);
+}
+
+static void rtl8153b_up(struct r8152 *tp)
+{
+ r8153_first_init(tp);
+}
+
+static void r8152_get_version(struct r8152 *tp)
+{
+ u32 ocp_data;
+ u16 tcr;
+ int i;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
+ tcr = (u16)(ocp_data & VERSION_MASK);
+
+ for (i = 0; i < ARRAY_SIZE(r8152_versions); i++) {
+ if (tcr == r8152_versions[i].tcr) {
+ /* Found a supported version */
+ tp->version = r8152_versions[i].version;
+ tp->supports_gmii = r8152_versions[i].gmii;
+ break;
+ }
+ }
+
+ if (tp->version == RTL_VER_UNKNOWN)
+ dev_dbg(&tp->dev->edev.dev,
+ "r8152 Unknown tcr version 0x%04x\n", tcr);
+}
+
+static void r8152b_enable_fc(struct r8152 *tp)
+{
+ u16 anar;
+
+ anar = r8152_mdio_read(tp, MII_ADVERTISE);
+ anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
+ r8152_mdio_write(tp, MII_ADVERTISE, anar);
+}
+
+static void rtl_tally_reset(struct r8152 *tp)
+{
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
+ ocp_data |= TALLY_RESET;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
+}
+
+static void rtl8152b_init(struct r8152 *tp)
+{
+ u32 ocp_data;
+
+ r8152b_disable_aldps(tp);
+
+ if (tp->version == RTL_VER_01) {
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA,
+ PLA_LED_FEATURE);
+ ocp_data &= ~LED_MODE_MASK;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
+ }
+
+ r8152_power_cut_en(tp, false);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
+ ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
+ ocp_data = r8152_ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
+ ocp_data &= ~MCU_CLK_RATIO_MASK;
+ ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
+ r8152_ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
+ ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
+ SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_USB_TIMER);
+ ocp_data |= BIT(15);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_USB_TIMER, ocp_data);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, 0xcbfc, 0x03e8);
+ ocp_data &= ~BIT(15);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_USB_TIMER, ocp_data);
+
+ r8152b_enable_fc(tp);
+ rtl_tally_reset(tp);
+
+ /* enable rx aggregation */
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
+
+ ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
+}
+
+static void rtl8153_init(struct r8152 *tp)
+{
+ int i;
+ u32 ocp_data;
+
+ r8153_disable_aldps(tp);
+ r8153_u1u2en(tp, false);
+
+ r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_BOOT_CTRL,
+ AUTOLOAD_DONE, 1, R8152_WAIT_TIMEOUT);
+
+ for (i = 0; i < R8152_WAIT_TIMEOUT; i++) {
+ ocp_data = r8152_ocp_reg_read(tp, OCP_PHY_STATUS) &
+ PHY_STAT_MASK;
+ if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
+ break;
+
+ mdelay(1);
+ }
+
+ r8153_u2p3en(tp, false);
+
+ if (tp->version == RTL_VER_04) {
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB,
+ USB_SSPHYLINK2);
+ ocp_data &= ~pwd_dn_scale_mask;
+ ocp_data |= pwd_dn_scale(96);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2,
+ ocp_data);
+
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
+ ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
+ } else if (tp->version == RTL_VER_05) {
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
+ ocp_data &= ~ECM_ALDPS;
+ r8152_ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
+
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_USB,
+ USB_CSR_DUMMY1);
+ if (r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
+ ocp_data &= ~DYNAMIC_BURST;
+ else
+ ocp_data |= DYNAMIC_BURST;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1,
+ ocp_data);
+ } else if (tp->version == RTL_VER_06) {
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_USB,
+ USB_CSR_DUMMY1);
+ if (r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
+ ocp_data &= ~DYNAMIC_BURST;
+ else
+ ocp_data |= DYNAMIC_BURST;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1,
+ ocp_data);
+ }
+
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
+ ocp_data |= EP4_FULL_FC;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
+ ocp_data &= ~TIMER11_EN;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
+ ocp_data &= ~LED_MODE_MASK;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
+
+ ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
+ if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
+ ocp_data |= LPM_TIMER_500MS;
+ else
+ ocp_data |= LPM_TIMER_500US;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
+ ocp_data &= ~SEN_VAL_MASK;
+ ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
+
+ r8153_power_cut_en(tp, false);
+
+ r8152b_enable_fc(tp);
+ rtl_tally_reset(tp);
+}
+
+static void r8153b_init(struct r8152 *tp)
+{
+ u32 ocp_data;
+ int i;
+
+ r8153_disable_aldps(tp);
+ r8153b_u1u2en(tp, false);
+
+ r8152_wait_for_bit(tp, 0, MCU_TYPE_PLA, PLA_BOOT_CTRL,
+ AUTOLOAD_DONE, 1, R8152_WAIT_TIMEOUT);
+
+ for (i = 0; i < R8152_WAIT_TIMEOUT; i++) {
+ ocp_data = r8152_ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
+ if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
+ break;
+
+ mdelay(1);
+ }
+
+ r8153_u2p3en(tp, false);
+
+ /* MSC timer = 0xfff * 8ms = 32760 ms */
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_MSC_TIMER, 0x0fff);
+
+ r8153_power_cut_en(tp, false);
+
+ /* MAC clock speed down */
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2);
+ ocp_data |= MAC_CLK_SPDWN_EN;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3);
+ ocp_data &= ~PLA_MCU_SPDWN_EN;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, ocp_data);
+
+ if (tp->version == RTL_VER_09) {
+ /* Disable Test IO for 32QFN */
+ if (r8152_ocp_read_byte(tp, MCU_TYPE_PLA, 0xdc00) & BIT(5)) {
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_PLA,
+ PLA_PHY_PWR);
+ ocp_data |= TEST_IO_OFF;
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR,
+ ocp_data);
+ }
+ }
+
+ /* rx aggregation */
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
+ ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
+
+ rtl_tally_reset(tp);
+ r8153b_hw_phy_cfg(tp);
+ r8152b_enable_fc(tp);
+}
+
+static int r8152_ops_init(struct r8152 *tp)
+{
+ struct rtl_ops *ops = &tp->rtl_ops;
+ int ret = 0;
+
+ switch (tp->version) {
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_07:
+ ops->init = rtl8152b_init;
+ ops->enable = rtl8152_enable;
+ ops->disable = rtl8152_disable;
+ ops->up = rtl8152_up;
+ break;
+
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ ops->init = rtl8153_init;
+ ops->enable = rtl8153_enable;
+ ops->disable = rtl8153_disable;
+ ops->up = rtl8153_up;
+ break;
+
+ case RTL_VER_08:
+ case RTL_VER_09:
+ ops->init = r8153b_init;
+ ops->enable = rtl8153_enable;
+ ops->disable = rtl8153_disable;
+ ops->up = rtl8153b_up;
+ break;
+
+ default:
+ ret = -ENODEV;
+ dev_warn(&tp->dev->edev.dev, "r8152 Unknown Device\n");
+ break;
+ }
+
+ return ret;
+}
+
+static int r8152_init_common(struct r8152 *tp)
+{
+ int link_detected;
+ u64 start;
+ u8 speed;
+
+ dev_dbg(&tp->dev->edev.dev, "** %s()\n", __func__);
+
+ dev_info(&tp->dev->edev.dev, "Waiting for Ethernet connection...\n");
+ start = get_time_ns();
+ while (1) {
+ speed = r8152_get_speed(tp);
+
+ link_detected = speed & LINK_STATUS;
+ if (link_detected) {
+ tp->rtl_ops.enable(tp);
+ dev_info(&tp->dev->edev.dev, "done.\n");
+ break;
+ }
+
+ mdelay(TIMEOUT_RESOLUTION);
+ if (is_timeout(start, PHY_CONNECT_TIMEOUT * MSECOND)) {
+ dev_warn(&tp->dev->edev.dev, "unable to connect.\n");
+ return -ETIMEDOUT;
+ }
+ };
+
+ return 0;
+}
+
+static int r8152_tx_fixup(struct usbnet *dev, void *buf, int len, void *nbuf,
+ int *nlen)
+{
+ struct tx_desc *tx_desc = (struct tx_desc *)nbuf;
+ u32 opts1;
+
+ dev_dbg(&dev->edev.dev, "** %s(), len %d\n", __func__, len);
+
+ opts1 = len | TX_FS | TX_LS;
+
+ tx_desc->opts1 = cpu_to_le32(opts1);
+ tx_desc->opts2 = 0;
+
+ memcpy(nbuf + sizeof(struct tx_desc), buf, len);
+
+ *nlen = len + sizeof(struct tx_desc);
+
+ return 0;
+}
+
+static int r8152_rx_fixup(struct usbnet *dev, void *buf, int len)
+{
+ struct rx_desc *rx_desc;
+ unsigned char *packet;
+ u16 packet_len;
+
+ rx_desc = (struct rx_desc *)buf;
+ packet_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
+ packet_len -= CRC_SIZE;
+
+ dev_dbg(&dev->edev.dev, "%s: buf len=%d, packet len=%d\n", __func__,
+ len, packet_len);
+
+ if (packet_len > len - (sizeof(struct rx_desc) + CRC_SIZE)) {
+ dev_dbg(&dev->edev.dev, "Rx: too large packet: %d\n",
+ packet_len);
+ return -EIO;
+ }
+
+ packet = buf + sizeof(struct rx_desc);
+ net_receive(&dev->edev, packet, len - sizeof(struct rx_desc));
+
+ return 0;
+}
+
+static int r8152_eth_reset(struct usbnet *dev)
+{
+ struct r8152 *tp = r8152_get_priv(dev);
+
+ dev_dbg(&tp->dev->edev.dev, "** %s (%d)\n", __func__, __LINE__);
+
+ tp->rtl_ops.disable(tp);
+ return r8152_init_common(tp);
+}
+
+static int r8152_common_mdio_read(struct mii_bus *bus, int phy_id, int idx)
+{
+ struct usbnet *dev = bus->priv;
+ struct r8152 *tp = r8152_get_priv(dev);
+ u32 val;
+
+ /* No phy_id is supported, so fake support of address 0 */
+ if (phy_id)
+ return 0xffff;
+
+ val = r8152_mdio_read(tp, idx);
+
+ return val & 0xffff;
+}
+
+static int r8152_common_mdio_write(struct mii_bus *bus, int phy_id, int idx,
+ u16 regval)
+{
+ struct usbnet *dev = bus->priv;
+ struct r8152 *tp = r8152_get_priv(dev);
+
+ /* No phy_id is supported, so fake support of address 0 */
+ if (phy_id)
+ return -EIO;
+
+ r8152_mdio_write(tp, idx, regval);
+
+ return 0;
+}
+
+static int r8152_init_mii(struct usbnet *dev)
+{
+ dev->miibus.read = r8152_common_mdio_read;
+ dev->miibus.write = r8152_common_mdio_write;
+ dev->phy_addr = 0;
+ dev->miibus.priv = dev;
+ dev->miibus.parent = &dev->udev->dev;
+
+ return mdiobus_register(&dev->miibus);
+}
+
+static int r8152_write_hwaddr(struct eth_device *edev, const unsigned char *adr)
+{
+ struct usbnet *dev = container_of(edev, struct usbnet, edev);
+ struct r8152 *tp = r8152_get_priv(dev);
+
+ dev_dbg(&tp->dev->edev.dev, "** %s (%d)\n", __func__, __LINE__);
+
+ r8152_ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
+ r8152_pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, ETH_ALEN, adr);
+ r8152_ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
+
+ dev_dbg(&tp->dev->edev.dev, "MAC %pM\n", adr);
+ return 0;
+}
+
+static int r8152_read_rom_hwaddr(struct eth_device *edev, unsigned char *adr)
+{
+ struct usbnet *dev = container_of(edev, struct usbnet, edev);
+ struct r8152 *tp = r8152_get_priv(dev);
+
+ dev_dbg(&tp->dev->edev.dev, "** %s (%d)\n", __func__, __LINE__);
+ return r8152_read_mac(tp, adr);
+}
+
+static int r8152_eth_bind(struct usbnet *dev)
+{
+ struct r8152 *tp;
+ int ret;
+
+ usbnet_get_endpoints(dev);
+
+ tp = xzalloc(sizeof(*tp));
+ if (!tp)
+ return -ENOMEM;
+
+ tp->txbuf = dma_alloc(R8152_TX_BURST_SIZE);
+ if (!tp->txbuf)
+ return -ENOMEM;
+
+ tp->rxbuf = dma_alloc(R8152_RX_BURST_SIZE);
+ if (!tp->rxbuf)
+ return -ENOMEM;
+
+ dev->driver_priv = tp;
+
+ dev->edev.set_ethaddr = r8152_write_hwaddr;
+ dev->edev.get_ethaddr = r8152_read_rom_hwaddr;
+
+ r8152_init_mii(dev);
+
+ tp->udev = dev->udev;
+ tp->dev = dev;
+
+ r8152_get_version(tp);
+
+ ret = r8152_ops_init(tp);
+ if (ret)
+ return ret;
+
+ tp->rtl_ops.init(tp);
+ tp->rtl_ops.up(tp);
+
+ dev->rx_urb_size = RTL8152_AGG_BUF_SZ;
+ return rtl8152_set_speed(tp, AUTONEG_ENABLE,
+ tp->supports_gmii ? SPEED_1000 : SPEED_100,
+ DUPLEX_FULL);
+}
+
+static void r8152_unbind(struct usbnet *dev)
+{
+ struct r8152 *tp = r8152_get_priv(dev);
+
+ tp->rtl_ops.disable(tp);
+ mdiobus_unregister(&dev->miibus);
+ free(tp->txbuf);
+ free(tp->rxbuf);
+ free(tp);
+}
+
+static struct driver_info r8152_info = {
+ .description = R8152_BASE_NAME,
+ .bind = r8152_eth_bind,
+ .reset = r8152_eth_reset,
+ .unbind = r8152_unbind,
+ .flags = FLAG_ETHER | FLAG_FRAMING_AX,
+ .rx_fixup = r8152_rx_fixup,
+ .tx_fixup = r8152_tx_fixup,
+};
+
+static const struct usb_device_id products[] = {
+{
+ /* Realtek */
+ USB_DEVICE(0x0bda, 0x8050),
+ .driver_info = &r8152_info,
+}, {
+ USB_DEVICE(0x0bda, 0x8152),
+ .driver_info = &r8152_info,
+}, {
+ USB_DEVICE(0x0bda, 0x8153),
+ .driver_info = &r8152_info,
+}, {
+ /* Samsung */
+ USB_DEVICE(0x04e8, 0xa101),
+ .driver_info = &r8152_info,
+}, {
+ /* Lenovo */
+ USB_DEVICE(0x17ef, 0x304f),
+ .driver_info = &r8152_info,
+}, {
+ USB_DEVICE(0x17ef, 0x3052),
+ .driver_info = &r8152_info,
+}, {
+ USB_DEVICE(0x17ef, 0x3054),
+ .driver_info = &r8152_info,
+}, {
+ USB_DEVICE(0x17ef, 0x3057),
+ .driver_info = &r8152_info,
+}, {
+ USB_DEVICE(0x17ef, 0x7205),
+ .driver_info = &r8152_info,
+}, {
+ USB_DEVICE(0x17ef, 0x720a),
+ .driver_info = &r8152_info,
+}, {
+ USB_DEVICE(0x17ef, 0x720b),
+ .driver_info = &r8152_info,
+}, {
+ USB_DEVICE(0x17ef, 0x720c),
+ .driver_info = &r8152_info,
+}, {
+ /* TP-LINK */
+ USB_DEVICE(0x2357, 0x0601),
+ .driver_info = &r8152_info,
+}, {
+ /* Nvidia */
+ USB_DEVICE(0x0955, 0x09ff),
+ .driver_info = &r8152_info,
+},
+
+ { } /* Terminating entry */
+};
+
+static struct usb_driver r8152_driver = {
+ .name = R8152_BASE_NAME,
+ .id_table = products,
+ .probe = usbnet_probe,
+ .disconnect = usbnet_disconnect,
+};
+
+static int __init r8152_init(void)
+{
+ return usb_driver_register(&r8152_driver);
+}
+device_initcall(r8152_init);
diff --git a/drivers/net/usb/r8152.h b/drivers/net/usb/r8152.h
new file mode 100644
index 0000000000..696a414660
--- /dev/null
+++ b/drivers/net/usb/r8152.h
@@ -0,0 +1,619 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2015 Realtek Semiconductor Corp. All rights reserved. */
+
+#ifndef _RTL8152_ETH_H
+#define _RTL8152_ETH_H
+
+#define R8152_BASE_NAME "r8152"
+
+#define PLA_IDR 0xc000
+#define PLA_RCR 0xc010
+#define PLA_RMS 0xc016
+#define PLA_RXFIFO_CTRL0 0xc0a0
+#define PLA_RXFIFO_CTRL1 0xc0a4
+#define PLA_RXFIFO_CTRL2 0xc0a8
+#define PLA_DMY_REG0 0xc0b0
+#define PLA_FMC 0xc0b4
+#define PLA_CFG_WOL 0xc0b6
+#define PLA_TEREDO_CFG 0xc0bc
+#define PLA_MAR 0xcd00
+#define PLA_BACKUP 0xd000
+#define PLA_BDC_CR 0xd1a0
+#define PLA_TEREDO_TIMER 0xd2cc
+#define PLA_REALWOW_TIMER 0xd2e8
+#define PLA_EXTRA_STATUS 0xd398
+#define PLA_EFUSE_DATA 0xdd00
+#define PLA_EFUSE_CMD 0xdd02
+#define PLA_LEDSEL 0xdd90
+#define PLA_LED_FEATURE 0xdd92
+#define PLA_PHYAR 0xde00
+#define PLA_BOOT_CTRL 0xe004
+#define PLA_GPHY_INTR_IMR 0xe022
+#define PLA_EEE_CR 0xe040
+#define PLA_EEEP_CR 0xe080
+#define PLA_MAC_PWR_CTRL 0xe0c0
+#define PLA_MAC_PWR_CTRL2 0xe0ca
+#define PLA_MAC_PWR_CTRL3 0xe0cc
+#define PLA_MAC_PWR_CTRL4 0xe0ce
+#define PLA_WDT6_CTRL 0xe428
+#define PLA_TCR0 0xe610
+#define PLA_TCR1 0xe612
+#define PLA_MTPS 0xe615
+#define PLA_TXFIFO_CTRL 0xe618
+#define PLA_RSTTALLY 0xe800
+#define BIST_CTRL 0xe810
+#define PLA_CR 0xe813
+#define PLA_CRWECR 0xe81c
+#define PLA_CONFIG12 0xe81e /* CONFIG1, CONFIG2 */
+#define PLA_CONFIG34 0xe820 /* CONFIG3, CONFIG4 */
+#define PLA_CONFIG5 0xe822
+#define PLA_PHY_PWR 0xe84c
+#define PLA_OOB_CTRL 0xe84f
+#define PLA_CPCR 0xe854
+#define PLA_MISC_0 0xe858
+#define PLA_MISC_1 0xe85a
+#define PLA_OCP_GPHY_BASE 0xe86c
+#define PLA_TALLYCNT 0xe890
+#define PLA_SFF_STS_7 0xe8de
+#define PLA_PHYSTATUS 0xe908
+#define PLA_BP_BA 0xfc26
+#define PLA_BP_0 0xfc28
+#define PLA_BP_1 0xfc2a
+#define PLA_BP_2 0xfc2c
+#define PLA_BP_3 0xfc2e
+#define PLA_BP_4 0xfc30
+#define PLA_BP_5 0xfc32
+#define PLA_BP_6 0xfc34
+#define PLA_BP_7 0xfc36
+#define PLA_BP_EN 0xfc38
+
+#define USB_USB2PHY 0xb41e
+#define USB_SSPHYLINK2 0xb428
+#define USB_U2P3_CTRL 0xb460
+#define USB_CSR_DUMMY1 0xb464
+#define USB_CSR_DUMMY2 0xb466
+#define USB_DEV_STAT 0xb808
+#define USB_CONNECT_TIMER 0xcbf8
+#define USB_MSC_TIMER 0xcbfc
+#define USB_BURST_SIZE 0xcfc0
+#define USB_FW_FIX_EN1 0xcfcc
+#define USB_LPM_CONFIG 0xcfd8
+#define USB_USB_CTRL 0xd406
+#define USB_PHY_CTRL 0xd408
+#define USB_TX_AGG 0xd40a
+#define USB_RX_BUF_TH 0xd40c
+#define USB_USB_TIMER 0xd428
+#define USB_RX_EARLY_TIMEOUT 0xd42c
+#define USB_RX_EARLY_SIZE 0xd42e
+#define USB_PM_CTRL_STATUS 0xd432 /* RTL8153A */
+#define USB_RX_EXTRA_AGGR_TMR 0xd432 /* RTL8153B */
+#define USB_TX_DMA 0xd434
+#define USB_UPT_RXDMA_OWN 0xd437
+#define USB_TOLERANCE 0xd490
+#define USB_LPM_CTRL 0xd41a
+#define USB_BMU_RESET 0xd4b0
+#define USB_U1U2_TIMER 0xd4da
+#define USB_UPS_CTRL 0xd800
+#define USB_POWER_CUT 0xd80a
+#define USB_MISC_0 0xd81a
+#define USB_AFE_CTRL2 0xd824
+#define USB_UPS_CFG 0xd842
+#define USB_WDT11_CTRL 0xe43c
+#define USB_BP_BA PLA_BP_BA
+#define USB_BP(n) (0xfc28 + 2 * (n))
+#define USB_BP_EN PLA_BP_EN /* RTL8153A */
+#define USB_BP2_EN 0xfc48
+
+/* OCP Registers */
+#define OCP_ALDPS_CONFIG 0x2010
+#define OCP_EEE_CONFIG1 0x2080
+#define OCP_EEE_CONFIG2 0x2092
+#define OCP_EEE_CONFIG3 0x2094
+#define OCP_BASE_MII 0xa400
+#define OCP_EEE_AR 0xa41a
+#define OCP_EEE_DATA 0xa41c
+#define OCP_PHY_STATUS 0xa420
+#define OCP_NCTL_CFG 0xa42c
+#define OCP_POWER_CFG 0xa430
+#define OCP_EEE_CFG 0xa432
+#define OCP_SRAM_ADDR 0xa436
+#define OCP_SRAM_DATA 0xa438
+#define OCP_DOWN_SPEED 0xa442
+#define OCP_EEE_ABLE 0xa5c4
+#define OCP_EEE_ADV 0xa5d0
+#define OCP_EEE_LPABLE 0xa5d2
+#define OCP_PHY_STATE 0xa708 /* nway state for 8153 */
+#define OCP_ADC_IOFFSET 0xbcfc
+#define OCP_ADC_CFG 0xbc06
+
+/* SRAM Register */
+#define SRAM_GREEN_CFG 0x8011
+#define SRAM_LPF_CFG 0x8012
+#define SRAM_10M_AMP1 0x8080
+#define SRAM_10M_AMP2 0x8082
+#define SRAM_IMPEDANCE 0x8084
+
+/* PLA_RCR */
+#define RCR_AAP 0x00000001
+#define RCR_APM 0x00000002
+#define RCR_AM 0x00000004
+#define RCR_AB 0x00000008
+#define RCR_ACPT_ALL (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
+
+/* PLA_RXFIFO_CTRL0 */
+#define RXFIFO_THR1_NORMAL 0x00080002
+#define RXFIFO_THR1_OOB 0x01800003
+
+/* PLA_RXFIFO_CTRL1 */
+#define RXFIFO_THR2_FULL 0x00000060
+#define RXFIFO_THR2_HIGH 0x00000038
+#define RXFIFO_THR2_OOB 0x0000004a
+#define RXFIFO_THR2_NORMAL 0x00a0
+
+/* PLA_RXFIFO_CTRL2 */
+#define RXFIFO_THR3_FULL 0x00000078
+#define RXFIFO_THR3_HIGH 0x00000048
+#define RXFIFO_THR3_OOB 0x0000005a
+#define RXFIFO_THR3_NORMAL 0x0110
+
+/* PLA_TXFIFO_CTRL */
+#define TXFIFO_THR_NORMAL 0x00400008
+#define TXFIFO_THR_NORMAL2 0x01000008
+
+/* PLA_DMY_REG0 */
+#define ECM_ALDPS 0x0002
+
+/* PLA_FMC */
+#define FMC_FCR_MCU_EN 0x0001
+
+/* PLA_EEEP_CR */
+#define EEEP_CR_EEEP_TX 0x0002
+
+/* PLA_WDT6_CTRL */
+#define WDT6_SET_MODE 0x0010
+
+/* PLA_TCR0 */
+#define TCR0_TX_EMPTY 0x0800
+#define TCR0_AUTO_FIFO 0x0080
+
+/* PLA_TCR1 */
+#define VERSION_MASK 0x7cf0
+
+/* PLA_MTPS */
+#define MTPS_JUMBO (12 * 1024 / 64)
+#define MTPS_DEFAULT (6 * 1024 / 64)
+
+/* PLA_RSTTALLY */
+#define TALLY_RESET 0x0001
+
+/* PLA_CR */
+#define PLA_CR_RST 0x10
+#define PLA_CR_RE 0x08
+#define PLA_CR_TE 0x04
+
+/* PLA_BIST_CTRL */
+#define BIST_CTRL_SW_RESET (0x10 << 24)
+
+/* PLA_CRWECR */
+#define CRWECR_NORAML 0x00
+#define CRWECR_CONFIG 0xc0
+
+/* PLA_OOB_CTRL */
+#define NOW_IS_OOB 0x80
+#define TXFIFO_EMPTY 0x20
+#define RXFIFO_EMPTY 0x10
+#define LINK_LIST_READY 0x02
+#define DIS_MCU_CLROOB 0x01
+#define FIFO_EMPTY (TXFIFO_EMPTY | RXFIFO_EMPTY)
+
+/* PLA_PHY_PWR */
+#define PLA_PHY_PWR_LLR (LINK_LIST_READY << 24)
+#define PLA_PHY_PWR_TXEMP (TXFIFO_EMPTY << 24)
+#define TEST_IO_OFF BIT(4)
+
+/* PLA_MISC_1 */
+#define RXDY_GATED_EN 0x0008
+
+/* PLA_SFF_STS_7 */
+#define RE_INIT_LL 0x8000
+#define MCU_BORW_EN 0x4000
+
+/* PLA_CPCR */
+#define CPCR_RX_VLAN 0x0040
+
+/* PLA_CFG_WOL */
+#define MAGIC_EN 0x0001
+
+/* PLA_TEREDO_CFG */
+#define TEREDO_SEL 0x8000
+#define TEREDO_WAKE_MASK 0x7f00
+#define TEREDO_RS_EVENT_MASK 0x00fe
+#define OOB_TEREDO_EN 0x0001
+
+/* PLA_BDC_CR */
+#define ALDPS_PROXY_MODE 0x0001
+
+/* PLA_EFUSE_CMD */
+#define EFUSE_READ_CMD BIT(15)
+#define EFUSE_DATA_BIT16 BIT(7)
+
+/* PLA_CONFIG34 */
+#define LINK_ON_WAKE_EN 0x0010
+#define LINK_OFF_WAKE_EN 0x0008
+
+/* PLA_CONFIG5 */
+#define BWF_EN 0x0040
+#define MWF_EN 0x0020
+#define UWF_EN 0x0010
+#define LAN_WAKE_EN 0x0002
+
+/* PLA_LED_FEATURE */
+#define LED_MODE_MASK 0x0700
+
+/* PLA_PHY_PWR */
+#define TX_10M_IDLE_EN 0x0080
+#define PFM_PWM_SWITCH 0x0040
+
+/* PLA_MAC_PWR_CTRL */
+#define D3_CLK_GATED_EN 0x00004000
+#define MCU_CLK_RATIO 0x07010f07
+#define MCU_CLK_RATIO_MASK 0x0f0f0f0f
+#define ALDPS_SPDWN_RATIO 0x0f87
+
+/* PLA_MAC_PWR_CTRL2 */
+#define EEE_SPDWN_RATIO 0x8007
+#define MAC_CLK_SPDWN_EN BIT(15)
+
+/* PLA_MAC_PWR_CTRL3 */
+#define PLA_MCU_SPDWN_EN BIT(14)
+#define PKT_AVAIL_SPDWN_EN 0x0100
+#define SUSPEND_SPDWN_EN 0x0004
+#define U1U2_SPDWN_EN 0x0002
+#define L1_SPDWN_EN 0x0001
+
+/* PLA_MAC_PWR_CTRL4 */
+#define PWRSAVE_SPDWN_EN 0x1000
+#define RXDV_SPDWN_EN 0x0800
+#define TX10MIDLE_EN 0x0100
+#define TP100_SPDWN_EN 0x0020
+#define TP500_SPDWN_EN 0x0010
+#define TP1000_SPDWN_EN 0x0008
+#define EEE_SPDWN_EN 0x0001
+
+/* PLA_GPHY_INTR_IMR */
+#define GPHY_STS_MSK 0x0001
+#define SPEED_DOWN_MSK 0x0002
+#define SPDWN_RXDV_MSK 0x0004
+#define SPDWN_LINKCHG_MSK 0x0008
+
+/* PLA_PHYAR */
+#define PHYAR_FLAG 0x80000000
+
+/* PLA_EEE_CR */
+#define EEE_RX_EN 0x0001
+#define EEE_TX_EN 0x0002
+
+/* PLA_BOOT_CTRL */
+#define AUTOLOAD_DONE 0x0002
+
+/* PLA_EXTRA_STATUS */
+#define U3P3_CHECK_EN BIT(7)
+
+/* USB_USB2PHY */
+#define USB2PHY_SUSPEND 0x0001
+#define USB2PHY_L1 0x0002
+
+/* USB_SSPHYLINK2 */
+#define pwd_dn_scale_mask 0x3ffe
+#define pwd_dn_scale(x) ((x) << 1)
+
+/* USB_CSR_DUMMY1 */
+#define DYNAMIC_BURST 0x0001
+
+/* USB_CSR_DUMMY2 */
+#define EP4_FULL_FC 0x0001
+
+/* USB_DEV_STAT */
+#define STAT_SPEED_MASK 0x0006
+#define STAT_SPEED_HIGH 0x0000
+#define STAT_SPEED_FULL 0x0002
+
+/* USB_FW_FIX_EN1 */
+#define FW_IP_RESET_EN BIT(9)
+
+/* USB_LPM_CONFIG */
+#define LPM_U1U2_EN BIT(0)
+
+/* USB_TX_AGG */
+#define TX_AGG_MAX_THRESHOLD 0x03
+
+/* USB_RX_BUF_TH */
+#define RX_THR_SUPPER 0x0c350180
+#define RX_THR_HIGH 0x7a120180
+#define RX_THR_SLOW 0xffff0180
+
+/* USB_RX_EARLY_TIMEOUT */
+#define RX_AUXILIARY_TIMER 1264
+
+/* USB_TX_DMA */
+#define TEST_MODE_DISABLE 0x00000001
+#define TX_SIZE_ADJUST1 0x00000100
+
+/* USB_BMU_RESET */
+#define BMU_RESET_EP_IN 0x01
+#define BMU_RESET_EP_OUT 0x02
+
+/* USB_UPT_RXDMA_OWN */
+#define OWN_UPDATE BIT(0)
+#define OWN_CLEAR BIT(1)
+
+/* USB_UPS_CTRL */
+#define POWER_CUT 0x0100
+
+/* USB_PM_CTRL_STATUS */
+#define RESUME_INDICATE 0x0001
+
+/* USB_USB_CTRL */
+#define RX_AGG_DISABLE 0x0010
+#define RX_ZERO_EN 0x0080
+
+/* USB_U2P3_CTRL */
+#define U2P3_ENABLE 0x0001
+
+/* USB_POWER_CUT */
+#define PWR_EN 0x0001
+#define PHASE2_EN 0x0008
+
+/* USB_MISC_0 */
+#define PCUT_STATUS 0x0001
+
+/* USB_RX_EARLY_TIMEOUT */
+#define COALESCE_SUPER 85000U
+#define COALESCE_HIGH 250000U
+#define COALESCE_SLOW 524280U
+
+/* USB_WDT11_CTRL */
+#define TIMER11_EN 0x0001
+
+/* USB_LPM_CTRL */
+/* bit 4 ~ 5: fifo empty boundary */
+#define FIFO_EMPTY_1FB 0x30 /* 0x1fb * 64 = 32448 bytes */
+/* bit 2 ~ 3: LMP timer */
+#define LPM_TIMER_MASK 0x0c
+#define LPM_TIMER_500MS 0x04 /* 500 ms */
+#define LPM_TIMER_500US 0x0c /* 500 us */
+#define ROK_EXIT_LPM 0x02
+
+/* USB_AFE_CTRL2 */
+#define SEN_VAL_MASK 0xf800
+#define SEN_VAL_NORMAL 0xa000
+#define SEL_RXIDLE 0x0100
+
+/* USB_UPS_CFG */
+#define SAW_CNT_1MS_MASK 0x0fff
+
+/* OCP_ALDPS_CONFIG */
+#define ENPWRSAVE 0x8000
+#define ENPDNPS 0x0200
+#define LINKENA 0x0100
+#define DIS_SDSAVE 0x0010
+
+/* OCP_PHY_STATUS */
+#define PHY_STAT_MASK 0x0007
+#define PHY_STAT_LAN_ON 3
+#define PHY_STAT_PWRDN 5
+
+/* OCP_NCTL_CFG */
+#define PGA_RETURN_EN BIT(1)
+
+/* OCP_POWER_CFG */
+#define EEE_CLKDIV_EN 0x8000
+#define EN_ALDPS 0x0004
+#define EN_10M_PLLOFF 0x0001
+
+/* OCP_EEE_CONFIG1 */
+#define RG_TXLPI_MSK_HFDUP 0x8000
+#define RG_MATCLR_EN 0x4000
+#define EEE_10_CAP 0x2000
+#define EEE_NWAY_EN 0x1000
+#define TX_QUIET_EN 0x0200
+#define RX_QUIET_EN 0x0100
+#define sd_rise_time_mask 0x0070
+#define sd_rise_time(x) (min((x), 7) << 4) /* bit 4 ~ 6 */
+#define RG_RXLPI_MSK_HFDUP 0x0008
+#define SDFALLTIME 0x0007 /* bit 0 ~ 2 */
+
+/* OCP_EEE_CONFIG2 */
+#define RG_LPIHYS_NUM 0x7000 /* bit 12 ~ 15 */
+#define RG_DACQUIET_EN 0x0400
+#define RG_LDVQUIET_EN 0x0200
+#define RG_CKRSEL 0x0020
+#define RG_EEEPRG_EN 0x0010
+
+/* OCP_EEE_CONFIG3 */
+#define fast_snr_mask 0xff80
+#define fast_snr(x) (min((x), 0x1ff) << 7) /* bit 7 ~ 15 */
+#define RG_LFS_SEL 0x0060 /* bit 6 ~ 5 */
+#define MSK_PH 0x0006 /* bit 0 ~ 3 */
+
+/* OCP_EEE_AR */
+/* bit[15:14] function */
+#define FUN_ADDR 0x0000
+#define FUN_DATA 0x4000
+/* bit[4:0] device addr */
+
+/* OCP_EEE_CFG */
+#define CTAP_SHORT_EN 0x0040
+#define EEE10_EN 0x0010
+
+/* OCP_DOWN_SPEED */
+#define EN_10M_BGOFF 0x0080
+
+/* OCP_PHY_STATE */
+#define TXDIS_STATE 0x01
+#define ABD_STATE 0x02
+
+/* OCP_ADC_CFG */
+#define CKADSEL_L 0x0100
+#define ADC_EN 0x0080
+#define EN_EMI_L 0x0040
+
+/* SRAM_GREEN_CFG */
+#define GREEN_ETH_EN BIT(15)
+#define R_TUNE_EN BIT(11)
+
+/* SRAM_LPF_CFG */
+#define LPF_AUTO_TUNE 0x8000
+
+/* SRAM_10M_AMP1 */
+#define GDAC_IB_UPALL 0x0008
+
+/* SRAM_10M_AMP2 */
+#define AMP_DN 0x0200
+
+/* SRAM_IMPEDANCE */
+#define RX_DRIVING_MASK 0x6000
+
+#define RTL8152_MAX_TX 4
+#define RTL8152_MAX_RX 10
+#define INTBUFSIZE 2
+#define CRC_SIZE 4
+#define TX_ALIGN 4
+#define RX_ALIGN 8
+
+#define INTR_LINK 0x0004
+
+#define RTL8152_REQT_READ 0xc0
+#define RTL8152_REQT_WRITE 0x40
+#define RTL8152_REQ_GET_REGS 0x05
+#define RTL8152_REQ_SET_REGS 0x05
+
+#define BYTE_EN_DWORD 0xff
+#define BYTE_EN_WORD 0x33
+#define BYTE_EN_BYTE 0x11
+#define BYTE_EN_SIX_BYTES 0x3f
+#define BYTE_EN_START_MASK 0x0f
+#define BYTE_EN_END_MASK 0xf0
+
+#define RTL8152_ETH_FRAME_LEN 1514
+#define RTL8152_AGG_BUF_SZ 2048
+
+#define RTL8152_RMS (RTL8152_ETH_FRAME_LEN + CRC_SIZE)
+#define RTL8153_RMS (RTL8152_ETH_FRAME_LEN + CRC_SIZE)
+#define RTL8152_TX_TIMEOUT (5 * HZ)
+
+#define MCU_TYPE_PLA 0x0100
+#define MCU_TYPE_USB 0x0000
+
+#define TIMEOUT_RESOLUTION 50
+#define PHY_CONNECT_TIMEOUT 5000
+#define USB_BULK_SEND_TIMEOUT 5000
+#define USB_BULK_RECV_TIMEOUT 5000
+#define R8152_WAIT_TIMEOUT 2000
+
+struct rx_desc {
+ __le32 opts1;
+#define RD_CRC BIT(15)
+#define RX_LEN_MASK 0x7fff
+
+ __le32 opts2;
+#define RD_UDP_CS BIT(23)
+#define RD_TCP_CS BIT(22)
+#define RD_IPV6_CS BIT(20)
+#define RD_IPV4_CS BIT(19)
+
+ __le32 opts3;
+#define IPF BIT(23) /* IP checksum fail */
+#define UDPF BIT(22) /* UDP checksum fail */
+#define TCPF BIT(21) /* TCP checksum fail */
+#define RX_VLAN_TAG BIT(16)
+
+ __le32 opts4;
+ __le32 opts5;
+ __le32 opts6;
+};
+
+struct tx_desc {
+ __le32 opts1;
+#define TX_FS BIT(31) /* First segment of a packet */
+#define TX_LS BIT(30) /* Final segment of a packet */
+#define LGSEND BIT(29)
+#define GTSENDV4 BIT(28)
+#define GTSENDV6 BIT(27)
+#define GTTCPHO_SHIFT 18
+#define GTTCPHO_MAX 0x7fU
+#define TX_LEN_MAX 0x3ffffU
+
+ __le32 opts2;
+#define UDP_CS BIT(31) /* Calculate UDP/IP checksum */
+#define TCP_CS BIT(30) /* Calculate TCP/IP checksum */
+#define IPV4_CS BIT(29) /* Calculate IPv4 checksum */
+#define IPV6_CS BIT(28) /* Calculate IPv6 checksum */
+#define MSS_SHIFT 17
+#define MSS_MAX 0x7ffU
+#define TCPHO_SHIFT 17
+#define TCPHO_MAX 0x7ffU
+#define TX_VLAN_TAG BIT(16)
+};
+
+enum rtl_version {
+ RTL_VER_UNKNOWN = 0,
+ RTL_VER_01,
+ RTL_VER_02,
+ RTL_VER_03,
+ RTL_VER_04,
+ RTL_VER_05,
+ RTL_VER_06,
+ RTL_VER_07,
+ RTL_VER_08,
+ RTL_VER_09,
+ RTL_VER_MAX
+};
+
+enum rtl_register_content {
+ _1000bps = 0x10,
+ _100bps = 0x08,
+ _10bps = 0x04,
+ LINK_STATUS = 0x02,
+ FULL_DUP = 0x01,
+};
+
+struct r8152 {
+ struct usb_device *udev;
+ struct usbnet *dev;
+ struct usb_interface *intf;
+ bool supports_gmii;
+ void *txbuf;
+ void *rxbuf;
+
+ struct rtl_ops {
+ void (*init)(struct r8152 *tp);
+ int (*enable)(struct r8152 *tp);
+ void (*disable)(struct r8152 *tp);
+ void (*up)(struct r8152 *tp);
+ } rtl_ops;
+
+ u32 coalesce;
+ u16 ocp_base;
+
+ u8 version;
+};
+
+int r8152_generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
+ u16 size, const void *data, u16 type);
+
+u16 r8152_ocp_read_word(struct r8152 *tp, u16 type, u16 index);
+void r8152_ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data);
+
+u8 r8152_ocp_read_byte(struct r8152 *tp, u16 type, u16 index);
+void r8152_ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data);
+
+u16 r8152_ocp_reg_read(struct r8152 *tp, u16 addr);
+void r8152_ocp_reg_write(struct r8152 *tp, u16 addr, u16 data);
+
+void r8152_sram_write(struct r8152 *tp, u16 addr, u16 data);
+
+void r8152b_firmware(struct r8152 *tp);
+void r8153_firmware(struct r8152 *tp);
+void r8153b_firmware(struct r8152 *tp);
+#endif
diff --git a/drivers/net/usb/r8152_fw.c b/drivers/net/usb/r8152_fw.c
new file mode 100644
index 0000000000..46f48d276b
--- /dev/null
+++ b/drivers/net/usb/r8152_fw.c
@@ -0,0 +1,1199 @@
+// SPDX-License-Identifier: GPL-2.0
+/* Copyright (c) 2015 Realtek Semiconductor Corp. All rights reserved. */
+
+#include <common.h>
+#include <usb/usb.h>
+#include <usb/usbnet.h>
+#include "r8152.h"
+
+static const u8 r8152b_pla_patch_a[] = {
+ 0x08, 0xe0, 0x40, 0xe0, 0x78, 0xe0, 0x85, 0xe0,
+ 0x5d, 0xe1, 0xa1, 0xe1, 0xa3, 0xe1, 0xab, 0xe1,
+ 0x31, 0xc3, 0x60, 0x72, 0xa0, 0x49, 0x10, 0xf0,
+ 0xa4, 0x49, 0x0e, 0xf0, 0x2c, 0xc3, 0x62, 0x72,
+ 0x26, 0x70, 0x80, 0x49, 0x05, 0xf0, 0x2f, 0x48,
+ 0x62, 0x9a, 0x24, 0x70, 0x60, 0x98, 0x24, 0xc3,
+ 0x60, 0x99, 0x23, 0xc3, 0x00, 0xbb, 0x2c, 0x75,
+ 0xdc, 0x21, 0xbc, 0x25, 0x04, 0x13, 0x0a, 0xf0,
+ 0x03, 0x13, 0x08, 0xf0, 0x02, 0x13, 0x06, 0xf0,
+ 0x01, 0x13, 0x04, 0xf0, 0x08, 0x13, 0x02, 0xf0,
+ 0x03, 0xe0, 0xd4, 0x49, 0x04, 0xf1, 0x14, 0xc2,
+ 0x12, 0xc3, 0x00, 0xbb, 0x12, 0xc3, 0x60, 0x75,
+ 0xd0, 0x49, 0x05, 0xf1, 0x50, 0x48, 0x60, 0x9d,
+ 0x09, 0xc6, 0x00, 0xbe, 0xd0, 0x48, 0x60, 0x9d,
+ 0xf3, 0xe7, 0xc2, 0xc0, 0x38, 0xd2, 0xc6, 0xd2,
+ 0x84, 0x17, 0xa2, 0x13, 0x0c, 0x17, 0xbc, 0xc0,
+ 0xa2, 0xd1, 0x33, 0xc5, 0xa0, 0x74, 0xc0, 0x49,
+ 0x1f, 0xf0, 0x30, 0xc5, 0xa0, 0x73, 0x00, 0x13,
+ 0x04, 0xf1, 0xa2, 0x73, 0x00, 0x13, 0x14, 0xf0,
+ 0x28, 0xc5, 0xa0, 0x74, 0xc8, 0x49, 0x1b, 0xf1,
+ 0x26, 0xc5, 0xa0, 0x76, 0xa2, 0x74, 0x01, 0x06,
+ 0x20, 0x37, 0xa0, 0x9e, 0xa2, 0x9c, 0x1e, 0xc5,
+ 0xa2, 0x73, 0x23, 0x40, 0x10, 0xf8, 0x04, 0xf3,
+ 0xa0, 0x73, 0x33, 0x40, 0x0c, 0xf8, 0x15, 0xc5,
+ 0xa0, 0x74, 0x41, 0x48, 0xa0, 0x9c, 0x14, 0xc5,
+ 0xa0, 0x76, 0x62, 0x48, 0xe0, 0x48, 0xa0, 0x9e,
+ 0x10, 0xc6, 0x00, 0xbe, 0x0a, 0xc5, 0xa0, 0x74,
+ 0x48, 0x48, 0xa0, 0x9c, 0x0b, 0xc5, 0x20, 0x1e,
+ 0xa0, 0x9e, 0xe5, 0x48, 0xa0, 0x9e, 0xf0, 0xe7,
+ 0xbc, 0xc0, 0xc8, 0xd2, 0xcc, 0xd2, 0x28, 0xe4,
+ 0x22, 0x02, 0xf0, 0xc0, 0x0b, 0xc0, 0x00, 0x71,
+ 0x0a, 0xc0, 0x00, 0x72, 0xa0, 0x49, 0x04, 0xf0,
+ 0xa4, 0x49, 0x02, 0xf0, 0x93, 0x48, 0x04, 0xc0,
+ 0x00, 0xb8, 0x00, 0xe4, 0xc2, 0xc0, 0x8c, 0x09,
+ 0x14, 0xc2, 0x40, 0x73, 0xba, 0x48, 0x40, 0x9b,
+ 0x11, 0xc2, 0x40, 0x73, 0xb0, 0x49, 0x17, 0xf0,
+ 0xbf, 0x49, 0x03, 0xf1, 0x09, 0xc5, 0x00, 0xbd,
+ 0xb1, 0x49, 0x11, 0xf0, 0xb1, 0x48, 0x40, 0x9b,
+ 0x02, 0xc2, 0x00, 0xba, 0x82, 0x18, 0x00, 0xa0,
+ 0x1e, 0xfc, 0xbc, 0xc0, 0xf0, 0xc0, 0xde, 0xe8,
+ 0x00, 0x80, 0x00, 0x60, 0x2c, 0x75, 0xd4, 0x49,
+ 0x12, 0xf1, 0x29, 0xe0, 0xf8, 0xc2, 0x46, 0x71,
+ 0xf7, 0xc2, 0x40, 0x73, 0xbe, 0x49, 0x03, 0xf1,
+ 0xf5, 0xc7, 0x02, 0xe0, 0xf2, 0xc7, 0x4f, 0x30,
+ 0x26, 0x62, 0xa1, 0x49, 0xf0, 0xf1, 0x22, 0x72,
+ 0xa0, 0x49, 0xed, 0xf1, 0x25, 0x25, 0x18, 0x1f,
+ 0x97, 0x30, 0x91, 0x30, 0x36, 0x9a, 0x2c, 0x75,
+ 0x32, 0xc3, 0x60, 0x73, 0xb1, 0x49, 0x0d, 0xf1,
+ 0xdc, 0x21, 0xbc, 0x25, 0x27, 0xc6, 0xc0, 0x77,
+ 0x04, 0x13, 0x18, 0xf0, 0x03, 0x13, 0x19, 0xf0,
+ 0x02, 0x13, 0x1a, 0xf0, 0x01, 0x13, 0x1b, 0xf0,
+ 0xd4, 0x49, 0x03, 0xf1, 0x1c, 0xc5, 0x00, 0xbd,
+ 0xcd, 0xc6, 0xc6, 0x67, 0x2e, 0x75, 0xd7, 0x22,
+ 0xdd, 0x26, 0x05, 0x15, 0x1a, 0xf0, 0x14, 0xc6,
+ 0x00, 0xbe, 0x13, 0xc5, 0x00, 0xbd, 0x12, 0xc5,
+ 0x00, 0xbd, 0xf1, 0x49, 0xfb, 0xf1, 0xef, 0xe7,
+ 0xf4, 0x49, 0xfa, 0xf1, 0xec, 0xe7, 0xf3, 0x49,
+ 0xf7, 0xf1, 0xe9, 0xe7, 0xf2, 0x49, 0xf4, 0xf1,
+ 0xe6, 0xe7, 0xb6, 0xc0, 0x6a, 0x14, 0xac, 0x13,
+ 0xd6, 0x13, 0xfa, 0x14, 0xa0, 0xd1, 0x00, 0x00,
+ 0xc0, 0x75, 0xd0, 0x49, 0x46, 0xf0, 0x26, 0x72,
+ 0xa7, 0x49, 0x43, 0xf0, 0x22, 0x72, 0x25, 0x25,
+ 0x20, 0x1f, 0x97, 0x30, 0x91, 0x30, 0x40, 0x73,
+ 0xf3, 0xc4, 0x1c, 0x40, 0x04, 0xf0, 0xd7, 0x49,
+ 0x05, 0xf1, 0x37, 0xe0, 0x53, 0x48, 0xc0, 0x9d,
+ 0x08, 0x02, 0x40, 0x66, 0x64, 0x27, 0x06, 0x16,
+ 0x30, 0xf1, 0x46, 0x63, 0x3b, 0x13, 0x2d, 0xf1,
+ 0x34, 0x9b, 0x18, 0x1b, 0x93, 0x30, 0x2b, 0xc3,
+ 0x10, 0x1c, 0x2b, 0xe8, 0x01, 0x14, 0x25, 0xf1,
+ 0x00, 0x1d, 0x26, 0x1a, 0x8a, 0x30, 0x22, 0x73,
+ 0xb5, 0x25, 0x0e, 0x0b, 0x00, 0x1c, 0x2c, 0xe8,
+ 0x1f, 0xc7, 0x27, 0x40, 0x1a, 0xf1, 0x38, 0xe8,
+ 0x32, 0x1f, 0x8f, 0x30, 0x08, 0x1b, 0x24, 0xe8,
+ 0x36, 0x72, 0x46, 0x77, 0x00, 0x17, 0x0d, 0xf0,
+ 0x13, 0xc3, 0x1f, 0x40, 0x03, 0xf1, 0x00, 0x1f,
+ 0x46, 0x9f, 0x44, 0x77, 0x9f, 0x44, 0x5f, 0x44,
+ 0x17, 0xe8, 0x0a, 0xc7, 0x27, 0x40, 0x05, 0xf1,
+ 0x02, 0xc3, 0x00, 0xbb, 0x50, 0x1a, 0x06, 0x1a,
+ 0xff, 0xc7, 0x00, 0xbf, 0xb8, 0xcd, 0xff, 0xff,
+ 0x02, 0x0c, 0x54, 0xa5, 0xdc, 0xa5, 0x2f, 0x40,
+ 0x05, 0xf1, 0x00, 0x14, 0xfa, 0xf1, 0x01, 0x1c,
+ 0x02, 0xe0, 0x00, 0x1c, 0x80, 0xff, 0xb0, 0x49,
+ 0x04, 0xf0, 0x01, 0x0b, 0xd3, 0xa1, 0x03, 0xe0,
+ 0x02, 0x0b, 0xd3, 0xa5, 0x27, 0x31, 0x20, 0x37,
+ 0x02, 0x0b, 0xd3, 0xa5, 0x27, 0x31, 0x20, 0x37,
+ 0x00, 0x13, 0xfb, 0xf1, 0x80, 0xff, 0x22, 0x73,
+ 0xb5, 0x25, 0x18, 0x1e, 0xde, 0x30, 0xd9, 0x30,
+ 0x64, 0x72, 0x11, 0x1e, 0x68, 0x23, 0x16, 0x31,
+ 0x80, 0xff, 0xd4, 0x49, 0x28, 0xf0, 0x02, 0xb4,
+ 0x2a, 0xc4, 0x00, 0x1d, 0x2e, 0xe8, 0xe0, 0x73,
+ 0xb9, 0x21, 0xbd, 0x25, 0x04, 0x13, 0x02, 0xf0,
+ 0x1a, 0xe0, 0x22, 0xc4, 0x23, 0xc3, 0x2f, 0xe8,
+ 0x23, 0xc3, 0x2d, 0xe8, 0x00, 0x1d, 0x21, 0xe8,
+ 0xe2, 0x73, 0xbb, 0x49, 0xfc, 0xf0, 0xe0, 0x73,
+ 0xb7, 0x48, 0x03, 0xb4, 0x81, 0x1d, 0x19, 0xe8,
+ 0x40, 0x1a, 0x84, 0x1d, 0x16, 0xe8, 0x12, 0xc3,
+ 0x1e, 0xe8, 0x03, 0xb0, 0x81, 0x1d, 0x11, 0xe8,
+ 0x0e, 0xc3, 0x19, 0xe8, 0x02, 0xb0, 0x06, 0xc7,
+ 0x04, 0x1e, 0xe0, 0x9e, 0x02, 0xc6, 0x00, 0xbe,
+ 0x22, 0x02, 0x20, 0xe4, 0x04, 0xb8, 0x34, 0xb0,
+ 0x00, 0x02, 0x00, 0x03, 0x00, 0x0e, 0x00, 0x0c,
+ 0x09, 0xc7, 0xe0, 0x9b, 0xe2, 0x9a, 0xe4, 0x9c,
+ 0xe6, 0x8d, 0xe6, 0x76, 0xef, 0x49, 0xfe, 0xf1,
+ 0x80, 0xff, 0x08, 0xea, 0x82, 0x1d, 0xf5, 0xef,
+ 0x00, 0x1a, 0x88, 0x1d, 0xf2, 0xef, 0xed, 0xc2,
+ 0xf0, 0xef, 0x80, 0xff, 0x02, 0xc6, 0x00, 0xbe,
+ 0x46, 0x06, 0x08, 0xc2, 0x40, 0x73, 0x3a, 0x48,
+ 0x40, 0x9b, 0x06, 0xff, 0x02, 0xc6, 0x00, 0xbe,
+ 0x86, 0x17, 0x1e, 0xfc, 0x36, 0xf0, 0x08, 0x1c,
+ 0xea, 0x8c, 0xe3, 0x64, 0xc7, 0x49, 0x25, 0xf1,
+ 0xe0, 0x75, 0xff, 0x1b, 0xeb, 0x47, 0xff, 0x1b,
+ 0x6b, 0x47, 0xe0, 0x9d, 0x15, 0xc3, 0x60, 0x75,
+ 0xd8, 0x49, 0x04, 0xf0, 0x81, 0x1d, 0xe2, 0x8d,
+ 0x05, 0xe0, 0xe2, 0x63, 0x81, 0x1d, 0xdd, 0x47,
+ 0xe2, 0x8b, 0x0b, 0xc3, 0x00, 0x1d, 0x61, 0x8d,
+ 0x3c, 0x03, 0x60, 0x75, 0xd8, 0x49, 0x06, 0xf1,
+ 0xdf, 0x48, 0x61, 0x95, 0x16, 0xe0, 0x4e, 0xe8,
+ 0x12, 0xe8, 0x21, 0xc5, 0xa0, 0x73, 0xb0, 0x49,
+ 0x03, 0xf0, 0x31, 0x48, 0xa0, 0x9b, 0x0d, 0xe0,
+ 0xc0, 0x49, 0x0b, 0xf1, 0xe2, 0x63, 0x7e, 0x1d,
+ 0xdd, 0x46, 0xe2, 0x8b, 0xe0, 0x75, 0x83, 0x1b,
+ 0xeb, 0x46, 0xfe, 0x1b, 0x6b, 0x46, 0xe0, 0x9d,
+ 0xe4, 0x49, 0x11, 0xf0, 0x10, 0x1d, 0xea, 0x8d,
+ 0xe3, 0x64, 0xc6, 0x49, 0x09, 0xf1, 0x07, 0xc5,
+ 0xa0, 0x73, 0xb1, 0x48, 0xa0, 0x9b, 0x02, 0xc5,
+ 0x00, 0xbd, 0xe6, 0x04, 0xa0, 0xd1, 0x02, 0xc5,
+ 0x00, 0xbd, 0xfe, 0x04, 0x02, 0xc5, 0x00, 0xbd,
+ 0x30, 0x05, 0x00, 0x00 };
+
+static const u16 r8152b_ram_code1[] = {
+ 0x9700, 0x7fe0, 0x4c00, 0x4007, 0x4400, 0x4800, 0x7c1f, 0x4c00,
+ 0x5310, 0x6000, 0x7c07, 0x6800, 0x673e, 0x0000, 0x0000, 0x571f,
+ 0x5ffb, 0xaa05, 0x5b58, 0x7d80, 0x6100, 0x3019, 0x5b64, 0x7d80,
+ 0x6080, 0xa6f8, 0xdcdb, 0x0015, 0xb915, 0xb511, 0xd16b, 0x000f,
+ 0xb40f, 0xd06b, 0x000d, 0xb206, 0x7c01, 0x5800, 0x7c04, 0x5c00,
+ 0x3011, 0x7c01, 0x5801, 0x7c04, 0x5c04, 0x3019, 0x30a5, 0x3127,
+ 0x31d5, 0x7fe0, 0x4c60, 0x7c07, 0x6803, 0x7d00, 0x6900, 0x65a0,
+ 0x0000, 0x0000, 0xaf03, 0x6015, 0x303e, 0x6017, 0x57e0, 0x580c,
+ 0x588c, 0x7fdd, 0x5fa2, 0x4827, 0x7c1f, 0x4c00, 0x7c1f, 0x4c10,
+ 0x8400, 0x7c30, 0x6020, 0x48bf, 0x7c1f, 0x4c00, 0x7c1f, 0x4c01,
+ 0x7c07, 0x6803, 0xb806, 0x7c08, 0x6800, 0x0000, 0x0000, 0x305c,
+ 0x7c08, 0x6808, 0x0000, 0x0000, 0xae06, 0x7c02, 0x5c02, 0x0000,
+ 0x0000, 0x3067, 0x8e05, 0x7c02, 0x5c00, 0x0000, 0x0000, 0xad06,
+ 0x7c20, 0x5c20, 0x0000, 0x0000, 0x3072, 0x8d05, 0x7c20, 0x5c00,
+ 0x0000, 0x0000, 0xa008, 0x7c07, 0x6800, 0xb8db, 0x7c07, 0x6803,
+ 0xd9b3, 0x00d7, 0x7fe0, 0x4c80, 0x7c08, 0x6800, 0x0000, 0x0000,
+ 0x7c23, 0x5c23, 0x481d, 0x7c1f, 0x4c00, 0x7c1f, 0x4c02, 0x5310,
+ 0x81ff, 0x30f5, 0x7fe0, 0x4d00, 0x4832, 0x7c1f, 0x4c00, 0x7c1f,
+ 0x4c10, 0x7c08, 0x6000, 0xa49e, 0x7c07, 0x6800, 0xb89b, 0x7c07,
+ 0x6803, 0xd9b3, 0x00f9, 0x7fe0, 0x4d20, 0x7e00, 0x6200, 0x3001,
+ 0x7fe0, 0x4dc0, 0xd09d, 0x0002, 0xb4fe, 0x7fe0, 0x4d80, 0x7c04,
+ 0x6004, 0x7c07, 0x6802, 0x6728, 0x0000, 0x0000, 0x7c08, 0x6000,
+ 0x486c, 0x7c1f, 0x4c00, 0x7c1f, 0x4c01, 0x9503, 0x7e00, 0x6200,
+ 0x571f, 0x5fbb, 0xaa05, 0x5b58, 0x7d80, 0x6100, 0x30c2, 0x5b64,
+ 0x7d80, 0x6080, 0xcdab, 0x0063, 0xcd8d, 0x0061, 0xd96b, 0x005f,
+ 0xd0a0, 0x00d7, 0xcba0, 0x0003, 0x80ec, 0x30cf, 0x30dc, 0x7fe0,
+ 0x4ce0, 0x4832, 0x7c1f, 0x4c00, 0x7c1f, 0x4c08, 0x7c08, 0x6008,
+ 0x8300, 0xb902, 0x30a5, 0x308a, 0x7fe0, 0x4da0, 0x65a8, 0x0000,
+ 0x0000, 0x56a0, 0x590c, 0x7ffd, 0x5fa2, 0xae06, 0x7c02, 0x5c02,
+ 0x0000, 0x0000, 0x30f0, 0x8e05, 0x7c02, 0x5c00, 0x0000, 0x0000,
+ 0xcba4, 0x0004, 0xcd8d, 0x0002, 0x80f1, 0x7fe0, 0x4ca0, 0x7c08,
+ 0x6408, 0x0000, 0x0000, 0x7d00, 0x6800, 0xb603, 0x7c10, 0x6010,
+ 0x7d1f, 0x551f, 0x5fb3, 0xaa07, 0x7c80, 0x5800, 0x5b58, 0x7d80,
+ 0x6100, 0x310f, 0x7c80, 0x5800, 0x5b64, 0x7d80, 0x6080, 0x4827,
+ 0x7c1f, 0x4c00, 0x7c1f, 0x4c10, 0x8400, 0x7c10, 0x6000, 0x7fe0,
+ 0x4cc0, 0x5fbb, 0x4824, 0x7c1f, 0x4c00, 0x7c1f, 0x4c04, 0x8200,
+ 0x7ce0, 0x5400, 0x6728, 0x0000, 0x0000, 0x30cf, 0x3001, 0x7fe0,
+ 0x4e00, 0x4007, 0x4400, 0x5310, 0x7c07, 0x6800, 0x673e, 0x0000,
+ 0x0000, 0x570f, 0x5fff, 0xaa05, 0x585b, 0x7d80, 0x6100, 0x313b,
+ 0x5867, 0x7d80, 0x6080, 0x9403, 0x7e00, 0x6200, 0xcda3, 0x00e7,
+ 0xcd85, 0x00e5, 0xd96b, 0x00e3, 0x96e3, 0x7c07, 0x6800, 0x673e,
+ 0x0000, 0x0000, 0x7fe0, 0x4e20, 0x96db, 0x8b04, 0x7c08, 0x5008,
+ 0xab03, 0x7c08, 0x5000, 0x7c07, 0x6801, 0x677e, 0x0000, 0x0000,
+ 0xdb7c, 0x00ec, 0x0000, 0x7fe1, 0x4f40, 0x4837, 0x4418, 0x41c7,
+ 0x7fe0, 0x4e40, 0x7c40, 0x5400, 0x7c1f, 0x4c01, 0x7c1f, 0x4c01,
+ 0x8fbf, 0xd2a0, 0x004b, 0x9204, 0xa042, 0x3168, 0x3127, 0x7fe1,
+ 0x4f60, 0x489c, 0x4628, 0x7fe0, 0x4e60, 0x7e28, 0x4628, 0x7c40,
+ 0x5400, 0x7c01, 0x5800, 0x7c04, 0x5c00, 0x41e8, 0x7c1f, 0x4c01,
+ 0x7c1f, 0x4c01, 0x8fa5, 0xb241, 0xa02a, 0x3182, 0x7fe0, 0x4ea0,
+ 0x7c02, 0x4402, 0x4448, 0x4894, 0x7c1f, 0x4c01, 0x7c1f, 0x4c03,
+ 0x4824, 0x7c1f, 0x4c07, 0x41ef, 0x41ff, 0x4891, 0x7c1f, 0x4c07,
+ 0x7c1f, 0x4c17, 0x8400, 0x8ef8, 0x41c7, 0x8f8a, 0x92d5, 0xa10f,
+ 0xd480, 0x0008, 0xd580, 0x00b8, 0xa202, 0x319d, 0x7c04, 0x4404,
+ 0x319d, 0xd484, 0x00f3, 0xd484, 0x00f1, 0x3127, 0x7fe0, 0x4ee0,
+ 0x7c40, 0x5400, 0x4488, 0x41cf, 0x3127, 0x7fe0, 0x4ec0, 0x48f3,
+ 0x7c1f, 0x4c01, 0x7c1f, 0x4c09, 0x4508, 0x41c7, 0x8fb0, 0xd218,
+ 0x00ae, 0xd2a4, 0x009e, 0x31be, 0x7fe0, 0x4e80, 0x4832, 0x7c1f,
+ 0x4c01, 0x7c1f, 0x4c11, 0x4428, 0x7c40, 0x5440, 0x7c01, 0x5801,
+ 0x7c04, 0x5c04, 0x41e8, 0xa4b3, 0x31d3, 0x7fe0, 0x4f20, 0x7c07,
+ 0x6800, 0x673e, 0x0000, 0x0000, 0x570f, 0x5fff, 0xaa04, 0x585b,
+ 0x6100, 0x31e4, 0x5867, 0x6080, 0xbcf1, 0x3001 };
+
+static const u16 r8152b_pla_patch_a_bp[] = {
+ 0xfc26, 0x8000, 0xfc28, 0x170b, 0xfc2a, 0x01e1, 0xfc2c, 0x0989,
+ 0xfc2e, 0x1349, 0xfc30, 0x01b7, 0xfc32, 0x061d, 0xe422, 0x0020,
+ 0xe420, 0x0018, 0xfc34, 0x1785, 0xfc36, 0x047b };
+
+static const u8 r8152b_pla_patch_a2[] = {
+ 0x08, 0xe0, 0x1a, 0xe0, 0xf2, 0xe0, 0xfa, 0xe0,
+ 0x32, 0xe1, 0x34, 0xe1, 0x36, 0xe1, 0x38, 0xe1,
+ 0x2c, 0x75, 0xdc, 0x21, 0xbc, 0x25, 0x04, 0x13,
+ 0x0b, 0xf0, 0x03, 0x13, 0x09, 0xf0, 0x02, 0x13,
+ 0x07, 0xf0, 0x01, 0x13, 0x05, 0xf0, 0x08, 0x13,
+ 0x03, 0xf0, 0x04, 0xc3, 0x00, 0xbb, 0x03, 0xc3,
+ 0x00, 0xbb, 0xd2, 0x17, 0xbc, 0x17, 0x14, 0xc2,
+ 0x40, 0x73, 0xba, 0x48, 0x40, 0x9b, 0x11, 0xc2,
+ 0x40, 0x73, 0xb0, 0x49, 0x17, 0xf0, 0xbf, 0x49,
+ 0x03, 0xf1, 0x09, 0xc5, 0x00, 0xbd, 0xb1, 0x49,
+ 0x11, 0xf0, 0xb1, 0x48, 0x40, 0x9b, 0x02, 0xc2,
+ 0x00, 0xba, 0x4e, 0x19, 0x00, 0xa0, 0x1e, 0xfc,
+ 0xbc, 0xc0, 0xf0, 0xc0, 0xde, 0xe8, 0x00, 0x80,
+ 0x00, 0x60, 0x2c, 0x75, 0xd4, 0x49, 0x12, 0xf1,
+ 0x29, 0xe0, 0xf8, 0xc2, 0x46, 0x71, 0xf7, 0xc2,
+ 0x40, 0x73, 0xbe, 0x49, 0x03, 0xf1, 0xf5, 0xc7,
+ 0x02, 0xe0, 0xf2, 0xc7, 0x4f, 0x30, 0x26, 0x62,
+ 0xa1, 0x49, 0xf0, 0xf1, 0x22, 0x72, 0xa0, 0x49,
+ 0xed, 0xf1, 0x25, 0x25, 0x18, 0x1f, 0x97, 0x30,
+ 0x91, 0x30, 0x36, 0x9a, 0x2c, 0x75, 0x32, 0xc3,
+ 0x60, 0x73, 0xb1, 0x49, 0x0d, 0xf1, 0xdc, 0x21,
+ 0xbc, 0x25, 0x27, 0xc6, 0xc0, 0x77, 0x04, 0x13,
+ 0x18, 0xf0, 0x03, 0x13, 0x19, 0xf0, 0x02, 0x13,
+ 0x1a, 0xf0, 0x01, 0x13, 0x1b, 0xf0, 0xd4, 0x49,
+ 0x03, 0xf1, 0x1c, 0xc5, 0x00, 0xbd, 0xcd, 0xc6,
+ 0xc6, 0x67, 0x2e, 0x75, 0xd7, 0x22, 0xdd, 0x26,
+ 0x05, 0x15, 0x1a, 0xf0, 0x14, 0xc6, 0x00, 0xbe,
+ 0x13, 0xc5, 0x00, 0xbd, 0x12, 0xc5, 0x00, 0xbd,
+ 0xf1, 0x49, 0xfb, 0xf1, 0xef, 0xe7, 0xf4, 0x49,
+ 0xfa, 0xf1, 0xec, 0xe7, 0xf3, 0x49, 0xf7, 0xf1,
+ 0xe9, 0xe7, 0xf2, 0x49, 0xf4, 0xf1, 0xe6, 0xe7,
+ 0xb6, 0xc0, 0xf6, 0x14, 0x36, 0x14, 0x62, 0x14,
+ 0x86, 0x15, 0xa0, 0xd1, 0x00, 0x00, 0xc0, 0x75,
+ 0xd0, 0x49, 0x46, 0xf0, 0x26, 0x72, 0xa7, 0x49,
+ 0x43, 0xf0, 0x22, 0x72, 0x25, 0x25, 0x20, 0x1f,
+ 0x97, 0x30, 0x91, 0x30, 0x40, 0x73, 0xf3, 0xc4,
+ 0x1c, 0x40, 0x04, 0xf0, 0xd7, 0x49, 0x05, 0xf1,
+ 0x37, 0xe0, 0x53, 0x48, 0xc0, 0x9d, 0x08, 0x02,
+ 0x40, 0x66, 0x64, 0x27, 0x06, 0x16, 0x30, 0xf1,
+ 0x46, 0x63, 0x3b, 0x13, 0x2d, 0xf1, 0x34, 0x9b,
+ 0x18, 0x1b, 0x93, 0x30, 0x2b, 0xc3, 0x10, 0x1c,
+ 0x2b, 0xe8, 0x01, 0x14, 0x25, 0xf1, 0x00, 0x1d,
+ 0x26, 0x1a, 0x8a, 0x30, 0x22, 0x73, 0xb5, 0x25,
+ 0x0e, 0x0b, 0x00, 0x1c, 0x2c, 0xe8, 0x1f, 0xc7,
+ 0x27, 0x40, 0x1a, 0xf1, 0x38, 0xe8, 0x32, 0x1f,
+ 0x8f, 0x30, 0x08, 0x1b, 0x24, 0xe8, 0x36, 0x72,
+ 0x46, 0x77, 0x00, 0x17, 0x0d, 0xf0, 0x13, 0xc3,
+ 0x1f, 0x40, 0x03, 0xf1, 0x00, 0x1f, 0x46, 0x9f,
+ 0x44, 0x77, 0x9f, 0x44, 0x5f, 0x44, 0x17, 0xe8,
+ 0x0a, 0xc7, 0x27, 0x40, 0x05, 0xf1, 0x02, 0xc3,
+ 0x00, 0xbb, 0x1c, 0x1b, 0xd2, 0x1a, 0xff, 0xc7,
+ 0x00, 0xbf, 0xb8, 0xcd, 0xff, 0xff, 0x02, 0x0c,
+ 0x54, 0xa5, 0xdc, 0xa5, 0x2f, 0x40, 0x05, 0xf1,
+ 0x00, 0x14, 0xfa, 0xf1, 0x01, 0x1c, 0x02, 0xe0,
+ 0x00, 0x1c, 0x80, 0xff, 0xb0, 0x49, 0x04, 0xf0,
+ 0x01, 0x0b, 0xd3, 0xa1, 0x03, 0xe0, 0x02, 0x0b,
+ 0xd3, 0xa5, 0x27, 0x31, 0x20, 0x37, 0x02, 0x0b,
+ 0xd3, 0xa5, 0x27, 0x31, 0x20, 0x37, 0x00, 0x13,
+ 0xfb, 0xf1, 0x80, 0xff, 0x22, 0x73, 0xb5, 0x25,
+ 0x18, 0x1e, 0xde, 0x30, 0xd9, 0x30, 0x64, 0x72,
+ 0x11, 0x1e, 0x68, 0x23, 0x16, 0x31, 0x80, 0xff,
+ 0x08, 0xc2, 0x40, 0x73, 0x3a, 0x48, 0x40, 0x9b,
+ 0x06, 0xff, 0x02, 0xc6, 0x00, 0xbe, 0x4e, 0x18,
+ 0x1e, 0xfc, 0x33, 0xc5, 0xa0, 0x74, 0xc0, 0x49,
+ 0x1f, 0xf0, 0x30, 0xc5, 0xa0, 0x73, 0x00, 0x13,
+ 0x04, 0xf1, 0xa2, 0x73, 0x00, 0x13, 0x14, 0xf0,
+ 0x28, 0xc5, 0xa0, 0x74, 0xc8, 0x49, 0x1b, 0xf1,
+ 0x26, 0xc5, 0xa0, 0x76, 0xa2, 0x74, 0x01, 0x06,
+ 0x20, 0x37, 0xa0, 0x9e, 0xa2, 0x9c, 0x1e, 0xc5,
+ 0xa2, 0x73, 0x23, 0x40, 0x10, 0xf8, 0x04, 0xf3,
+ 0xa0, 0x73, 0x33, 0x40, 0x0c, 0xf8, 0x15, 0xc5,
+ 0xa0, 0x74, 0x41, 0x48, 0xa0, 0x9c, 0x14, 0xc5,
+ 0xa0, 0x76, 0x62, 0x48, 0xe0, 0x48, 0xa0, 0x9e,
+ 0x10, 0xc6, 0x00, 0xbe, 0x0a, 0xc5, 0xa0, 0x74,
+ 0x48, 0x48, 0xa0, 0x9c, 0x0b, 0xc5, 0x20, 0x1e,
+ 0xa0, 0x9e, 0xe5, 0x48, 0xa0, 0x9e, 0xf0, 0xe7,
+ 0xbc, 0xc0, 0xc8, 0xd2, 0xcc, 0xd2, 0x28, 0xe4,
+ 0x22, 0x02, 0xf0, 0xc0, 0x02, 0xc6, 0x00, 0xbe,
+ 0x00, 0x00, 0x02, 0xc6, 0x00, 0xbe, 0x00, 0x00,
+ 0x02, 0xc6, 0x00, 0xbe, 0x00, 0x00, 0x02, 0xc6,
+ 0x00, 0xbe, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
+
+static const u16 r8152b_pla_patch_a2_bp[] = {
+ 0xfc26, 0x8000, 0xfc28, 0x17a5, 0xfc2a, 0x13ad,
+ 0xfc2c, 0x184d, 0xfc2e, 0x01e1 };
+
+static const u16 r8153_ram_code_a[] = {
+ 0xE86C, 0xA000, 0xB436, 0xB820, 0xB438, 0x0290, 0xB436, 0xA012,
+ 0xB438, 0x0000, 0xB436, 0xA014, 0xB438, 0x2c04, 0xB438, 0x2c18,
+ 0xB438, 0x2c45, 0xB438, 0x2c45, 0xB438, 0xd502, 0xB438, 0x8301,
+ 0xB438, 0x8306, 0xB438, 0xd500, 0xB438, 0x8208, 0xB438, 0xd501,
+ 0xB438, 0xe018, 0xB438, 0x0308, 0xB438, 0x60f2, 0xB438, 0x8404,
+ 0xB438, 0x607d, 0xB438, 0xc117, 0xB438, 0x2c16, 0xB438, 0xc116,
+ 0xB438, 0x2c16, 0xB438, 0x607d, 0xB438, 0xc117, 0xB438, 0xa404,
+ 0xB438, 0xd500, 0xB438, 0x0800, 0xB438, 0xd501, 0xB438, 0x62d2,
+ 0xB438, 0x615d, 0xB438, 0xc115, 0xB438, 0xa404, 0xB438, 0xc307,
+ 0xB438, 0xd502, 0xB438, 0x8301, 0xB438, 0x8306, 0xB438, 0xd500,
+ 0xB438, 0x8208, 0xB438, 0x2c42, 0xB438, 0xc114, 0xB438, 0x8404,
+ 0xB438, 0xc317, 0xB438, 0xd701, 0xB438, 0x435d, 0xB438, 0xd500,
+ 0xB438, 0xa208, 0xB438, 0xd502, 0xB438, 0xa306, 0xB438, 0xa301,
+ 0xB438, 0x2c42, 0xB438, 0x8404, 0xB438, 0x613d, 0xB438, 0xc115,
+ 0xB438, 0xc307, 0xB438, 0xd502, 0xB438, 0x8301, 0xB438, 0x8306,
+ 0xB438, 0xd500, 0xB438, 0x8208, 0xB438, 0x2c42, 0xB438, 0xc114,
+ 0xB438, 0xc317, 0xB438, 0xd701, 0xB438, 0x40dd, 0xB438, 0xd500,
+ 0xB438, 0xa208, 0xB438, 0xd502, 0xB438, 0xa306, 0xB438, 0xa301,
+ 0xB438, 0xd500, 0xB438, 0xd702, 0xB438, 0x0800, 0xB436, 0xA01A,
+ 0xB438, 0x0000, 0xB436, 0xA006, 0xB438, 0x0fff, 0xB436, 0xA004,
+ 0xB438, 0x0fff, 0xB436, 0xA002, 0xB438, 0x05a3, 0xB436, 0xA000,
+ 0xB438, 0x3591, 0xB436, 0xB820, 0xB438, 0x0210 };
+
+static const u8 r8153_usb_patch_c[] = {
+ 0x08, 0xe0, 0x0a, 0xe0, 0x14, 0xe0, 0x58, 0xe0,
+ 0x64, 0xe0, 0x79, 0xe0, 0xab, 0xe0, 0xb6, 0xe0,
+ 0x02, 0xc5, 0x00, 0xbd, 0x38, 0x3b, 0xdb, 0x49,
+ 0x04, 0xf1, 0x06, 0xc3, 0x00, 0xbb, 0x5a, 0x02,
+ 0x05, 0xc4, 0x03, 0xc3, 0x00, 0xbb, 0xa4, 0x04,
+ 0x7e, 0x02, 0x30, 0xd4, 0x65, 0xc6, 0x66, 0x61,
+ 0x92, 0x49, 0x12, 0xf1, 0x3e, 0xc0, 0x02, 0x61,
+ 0x97, 0x49, 0x05, 0xf0, 0x3c, 0xc0, 0x00, 0x61,
+ 0x90, 0x49, 0x0a, 0xf1, 0xca, 0x63, 0xb0, 0x49,
+ 0x09, 0xf1, 0xb1, 0x49, 0x05, 0xf0, 0x32, 0xc0,
+ 0x00, 0x71, 0x9e, 0x49, 0x03, 0xf1, 0xb0, 0x48,
+ 0x05, 0xe0, 0x30, 0x48, 0xda, 0x61, 0x10, 0x48,
+ 0xda, 0x89, 0x4a, 0xc6, 0xc0, 0x60, 0x85, 0x49,
+ 0x03, 0xf0, 0x31, 0x48, 0x04, 0xe0, 0xb1, 0x48,
+ 0xb2, 0x48, 0x0f, 0xe0, 0x30, 0x18, 0x1b, 0xc1,
+ 0x0f, 0xe8, 0x1a, 0xc6, 0xc7, 0x65, 0xd0, 0x49,
+ 0x05, 0xf0, 0x32, 0x48, 0x02, 0xc2, 0x00, 0xba,
+ 0x3e, 0x16, 0x02, 0xc2, 0x00, 0xba, 0x48, 0x16,
+ 0x02, 0xc2, 0x00, 0xba, 0x4a, 0x16, 0x02, 0xb4,
+ 0x09, 0xc2, 0x40, 0x99, 0x0e, 0x48, 0x42, 0x98,
+ 0x42, 0x70, 0x8e, 0x49, 0xfe, 0xf1, 0x02, 0xb0,
+ 0x80, 0xff, 0xc0, 0xd4, 0xe4, 0x40, 0x20, 0xd4,
+ 0xca, 0xcf, 0x00, 0xcf, 0x3c, 0xe4, 0x0c, 0xc0,
+ 0x00, 0x63, 0xb5, 0x49, 0x09, 0xc0, 0x30, 0x18,
+ 0x06, 0xc1, 0xea, 0xef, 0xf5, 0xc7, 0x02, 0xc0,
+ 0x00, 0xb8, 0xd0, 0x10, 0xe4, 0x4b, 0x00, 0xd8,
+ 0x14, 0xc3, 0x60, 0x61, 0x90, 0x49, 0x06, 0xf0,
+ 0x11, 0xc3, 0x70, 0x61, 0x12, 0x48, 0x70, 0x89,
+ 0x08, 0xe0, 0x0a, 0xc6, 0xd4, 0x61, 0x93, 0x48,
+ 0xd4, 0x89, 0x02, 0xc1, 0x00, 0xb9, 0x72, 0x17,
+ 0x02, 0xc1, 0x00, 0xb9, 0x9c, 0x15, 0x00, 0xd8,
+ 0xef, 0xcf, 0x20, 0xd4, 0x30, 0x18, 0xe7, 0xc1,
+ 0xcb, 0xef, 0x2b, 0xc5, 0xa0, 0x77, 0x00, 0x1c,
+ 0xa0, 0x9c, 0x28, 0xc5, 0xa0, 0x64, 0xc0, 0x48,
+ 0xc1, 0x48, 0xc2, 0x48, 0xa0, 0x8c, 0xb1, 0x64,
+ 0xc0, 0x48, 0xb1, 0x8c, 0x20, 0xc5, 0xa0, 0x64,
+ 0x40, 0x48, 0x41, 0x48, 0xc2, 0x48, 0xa0, 0x8c,
+ 0x19, 0xc5, 0xa4, 0x64, 0x44, 0x48, 0xa4, 0x8c,
+ 0xb1, 0x64, 0x40, 0x48, 0xb1, 0x8c, 0x14, 0xc4,
+ 0x80, 0x73, 0x13, 0xc4, 0x82, 0x9b, 0x11, 0x1b,
+ 0x80, 0x9b, 0x0c, 0xc5, 0xa0, 0x64, 0x40, 0x48,
+ 0x41, 0x48, 0x42, 0x48, 0xa0, 0x8c, 0x05, 0xc5,
+ 0xa0, 0x9f, 0x02, 0xc5, 0x00, 0xbd, 0x6c, 0x3a,
+ 0x1e, 0xfc, 0x10, 0xd8, 0x86, 0xd4, 0xf8, 0xcb,
+ 0x20, 0xe4, 0x0a, 0xc0, 0x16, 0x61, 0x91, 0x48,
+ 0x16, 0x89, 0x07, 0xc0, 0x11, 0x19, 0x0c, 0x89,
+ 0x02, 0xc1, 0x00, 0xb9, 0x02, 0x06, 0x00, 0xd4,
+ 0x40, 0xb4, 0xfe, 0xc0, 0x16, 0x61, 0x91, 0x48,
+ 0x16, 0x89, 0xfb, 0xc0, 0x11, 0x19, 0x0c, 0x89,
+ 0x02, 0xc1, 0x00, 0xb9, 0xd2, 0x05, 0x00, 0x00 };
+
+static const u16 r8153_usb_patch_c_bp[] = {
+ 0xfc26, 0xa000, 0xfc28, 0x3b34, 0xfc2a, 0x027c, 0xfc2c, 0x15de,
+ 0xfc2e, 0x10ce, 0xfc30, 0x1adc, 0xfc32, 0x3a28, 0xfc34, 0x05f8,
+ 0xfc36, 0x05c8, 0xfc38, 0x00f3 };
+
+static const u8 r8153_pla_patch_c[] = {
+ 0x5d, 0xe0, 0x07, 0xe0, 0x0f, 0xe0, 0x5a, 0xe0,
+ 0x59, 0xe0, 0x1f, 0xe0, 0x57, 0xe0, 0x3e, 0xe1,
+ 0x08, 0xc2, 0x40, 0x73, 0x3a, 0x48, 0x40, 0x9b,
+ 0x06, 0xff, 0x02, 0xc6, 0x00, 0xbe, 0xcc, 0x17,
+ 0x1e, 0xfc, 0x2c, 0x75, 0xdc, 0x21, 0xbc, 0x25,
+ 0x04, 0x13, 0x0b, 0xf0, 0x03, 0x13, 0x09, 0xf0,
+ 0x02, 0x13, 0x07, 0xf0, 0x01, 0x13, 0x05, 0xf0,
+ 0x08, 0x13, 0x03, 0xf0, 0x04, 0xc3, 0x00, 0xbb,
+ 0x03, 0xc3, 0x00, 0xbb, 0x50, 0x17, 0x3a, 0x17,
+ 0x33, 0xc5, 0xa0, 0x74, 0xc0, 0x49, 0x1f, 0xf0,
+ 0x30, 0xc5, 0xa0, 0x73, 0x00, 0x13, 0x04, 0xf1,
+ 0xa2, 0x73, 0x00, 0x13, 0x14, 0xf0, 0x28, 0xc5,
+ 0xa0, 0x74, 0xc8, 0x49, 0x1b, 0xf1, 0x26, 0xc5,
+ 0xa0, 0x76, 0xa2, 0x74, 0x01, 0x06, 0x20, 0x37,
+ 0xa0, 0x9e, 0xa2, 0x9c, 0x1e, 0xc5, 0xa2, 0x73,
+ 0x23, 0x40, 0x10, 0xf8, 0x04, 0xf3, 0xa0, 0x73,
+ 0x33, 0x40, 0x0c, 0xf8, 0x15, 0xc5, 0xa0, 0x74,
+ 0x41, 0x48, 0xa0, 0x9c, 0x14, 0xc5, 0xa0, 0x76,
+ 0x62, 0x48, 0xe0, 0x48, 0xa0, 0x9e, 0x10, 0xc6,
+ 0x00, 0xbe, 0x0a, 0xc5, 0xa0, 0x74, 0x48, 0x48,
+ 0xa0, 0x9c, 0x0b, 0xc5, 0x20, 0x1e, 0xa0, 0x9e,
+ 0xe5, 0x48, 0xa0, 0x9e, 0xf0, 0xe7, 0xbc, 0xc0,
+ 0xc8, 0xd2, 0xcc, 0xd2, 0x28, 0xe4, 0xfa, 0x01,
+ 0xf0, 0xc0, 0x18, 0x89, 0x74, 0xc0, 0xcd, 0xe8,
+ 0x80, 0x76, 0x00, 0x1d, 0x6e, 0xc3, 0x66, 0x62,
+ 0xa0, 0x49, 0x06, 0xf0, 0x64, 0xc0, 0x02, 0x71,
+ 0x60, 0x99, 0x62, 0xc1, 0x03, 0xe0, 0x5f, 0xc0,
+ 0x60, 0xc1, 0x02, 0x99, 0x00, 0x61, 0x0f, 0x1b,
+ 0x59, 0x41, 0x03, 0x13, 0x18, 0xf1, 0xe4, 0x49,
+ 0x20, 0xf1, 0xe5, 0x49, 0x1e, 0xf0, 0x59, 0xc6,
+ 0xd0, 0x73, 0xb7, 0x49, 0x08, 0xf0, 0x01, 0x0b,
+ 0x80, 0x13, 0x03, 0xf0, 0xd0, 0x8b, 0x03, 0xe0,
+ 0x3f, 0x48, 0xd0, 0x9b, 0x51, 0xc0, 0x10, 0x1a,
+ 0x84, 0x1b, 0xb1, 0xe8, 0x4b, 0xc2, 0x40, 0x63,
+ 0x30, 0x48, 0x0a, 0xe0, 0xe5, 0x49, 0x09, 0xf0,
+ 0x47, 0xc0, 0x00, 0x1a, 0x84, 0x1b, 0xa7, 0xe8,
+ 0x41, 0xc2, 0x40, 0x63, 0xb0, 0x48, 0x40, 0x8b,
+ 0x67, 0x11, 0x3f, 0xf1, 0x69, 0x33, 0x32, 0xc0,
+ 0x28, 0x40, 0xd2, 0xf1, 0x33, 0xc0, 0x00, 0x19,
+ 0x81, 0x1b, 0x99, 0xe8, 0x30, 0xc0, 0x04, 0x1a,
+ 0x84, 0x1b, 0x95, 0xe8, 0x8a, 0xe8, 0xa3, 0x49,
+ 0xfe, 0xf0, 0x2a, 0xc0, 0x86, 0xe8, 0xa1, 0x48,
+ 0x84, 0x1b, 0x8d, 0xe8, 0x00, 0x1d, 0x69, 0x33,
+ 0x00, 0x1e, 0x01, 0x06, 0xff, 0x18, 0x30, 0x40,
+ 0xfd, 0xf1, 0x1f, 0xc0, 0x00, 0x76, 0x2e, 0x40,
+ 0xf7, 0xf1, 0x21, 0x48, 0x19, 0xc0, 0x84, 0x1b,
+ 0x7e, 0xe8, 0x74, 0x08, 0x72, 0xe8, 0xa1, 0x49,
+ 0xfd, 0xf0, 0x11, 0xc0, 0x00, 0x1a, 0x84, 0x1b,
+ 0x76, 0xe8, 0x6b, 0xe8, 0xa5, 0x49, 0xfe, 0xf0,
+ 0x09, 0xc0, 0x01, 0x19, 0x81, 0x1b, 0x6f, 0xe8,
+ 0x5a, 0xe0, 0xb8, 0x0b, 0x50, 0xe8, 0x83, 0x00,
+ 0x82, 0x00, 0x20, 0xb4, 0x10, 0xd8, 0x84, 0xd4,
+ 0x88, 0xd3, 0x10, 0xe0, 0x00, 0xd8, 0x24, 0xd4,
+ 0xf9, 0xc0, 0x57, 0xe8, 0x48, 0x33, 0xf3, 0xc0,
+ 0x00, 0x61, 0x6a, 0xc0, 0x47, 0x11, 0x03, 0xf0,
+ 0x57, 0x11, 0x05, 0xf1, 0x00, 0x61, 0x17, 0x48,
+ 0x00, 0x89, 0x41, 0xe0, 0x9c, 0x20, 0x9c, 0x24,
+ 0xd0, 0x49, 0x09, 0xf0, 0x04, 0x11, 0x07, 0xf1,
+ 0x00, 0x61, 0x97, 0x49, 0x38, 0xf0, 0x97, 0x48,
+ 0x00, 0x89, 0x2b, 0xe0, 0x00, 0x11, 0x05, 0xf1,
+ 0x00, 0x61, 0x92, 0x48, 0x00, 0x89, 0x2f, 0xe0,
+ 0x06, 0x11, 0x05, 0xf1, 0x00, 0x61, 0x11, 0x48,
+ 0x00, 0x89, 0x29, 0xe0, 0x05, 0x11, 0x0f, 0xf1,
+ 0x00, 0x61, 0x93, 0x49, 0x1a, 0xf1, 0x91, 0x49,
+ 0x0a, 0xf0, 0x91, 0x48, 0x00, 0x89, 0x0f, 0xe0,
+ 0xc6, 0xc0, 0x00, 0x61, 0x98, 0x20, 0x98, 0x24,
+ 0x25, 0x11, 0x80, 0xff, 0xfa, 0xef, 0x17, 0xf1,
+ 0x38, 0xc0, 0x1f, 0xe8, 0x95, 0x49, 0x13, 0xf0,
+ 0xf4, 0xef, 0x11, 0xf1, 0x31, 0xc0, 0x00, 0x61,
+ 0x92, 0x49, 0x0d, 0xf1, 0x12, 0x48, 0x00, 0x89,
+ 0x29, 0xc0, 0x00, 0x19, 0x00, 0x89, 0x27, 0xc0,
+ 0x01, 0x89, 0x23, 0xc0, 0x0e, 0xe8, 0x12, 0x48,
+ 0x81, 0x1b, 0x15, 0xe8, 0xae, 0xc3, 0x66, 0x62,
+ 0xa0, 0x49, 0x04, 0xf0, 0x64, 0x71, 0xa3, 0xc0,
+ 0x02, 0x99, 0x02, 0xc0, 0x00, 0xb8, 0xd6, 0x07,
+ 0x13, 0xc4, 0x84, 0x98, 0x00, 0x1b, 0x86, 0x8b,
+ 0x86, 0x73, 0xbf, 0x49, 0xfe, 0xf1, 0x80, 0x71,
+ 0x82, 0x72, 0x80, 0xff, 0x09, 0xc4, 0x84, 0x98,
+ 0x80, 0x99, 0x82, 0x9a, 0x86, 0x8b, 0x86, 0x73,
+ 0xbf, 0x49, 0xfe, 0xf1, 0x80, 0xff, 0x08, 0xea,
+ 0x30, 0xd4, 0x10, 0xc0, 0x12, 0xe8, 0x8a, 0xd3,
+ 0x00, 0xd8, 0x02, 0xc6, 0x00, 0xbe, 0xe0, 0x08 };
+
+static const u16 r8153_pla_patch_c_bp[] = {
+ 0xfc26, 0x8000, 0xfc28, 0x1306, 0xfc2a, 0x17ca, 0xfc2c, 0x171e,
+ 0xfc2e, 0x0000, 0xfc30, 0x0000, 0xfc32, 0x01b4, 0xfc34, 0x07d4,
+ 0xfc36, 0x0894, 0xfc38, 0x00e6 };
+
+static const u16 r8153_ram_code_bc[] = {
+ 0xB436, 0xB820, 0xB438, 0x0290, 0xB436, 0xA012, 0xB438, 0x0000,
+ 0xB436, 0xA014, 0xB438, 0x2c04, 0xB438, 0x2c07, 0xB438, 0x2c0a,
+ 0xB438, 0x2c0d, 0xB438, 0xa240, 0xB438, 0xa104, 0xB438, 0x292d,
+ 0xB438, 0x8620, 0xB438, 0xa480, 0xB438, 0x2a2c, 0xB438, 0x8480,
+ 0xB438, 0xa101, 0xB438, 0x2a36, 0xB438, 0xd056, 0xB438, 0x2223,
+ 0xB436, 0xA01A, 0xB438, 0x0000, 0xB436, 0xA006, 0xB438, 0x0222,
+ 0xB436, 0xA004, 0xB438, 0x0a35, 0xB436, 0xA002, 0xB438, 0x0a2b,
+ 0xB436, 0xA000, 0xB438, 0xf92c, 0xB436, 0xB820, 0xB438, 0x0210 };
+
+static const u8 r8153_usb_patch_b[] = {
+ 0x08, 0xe0, 0x0f, 0xe0, 0x18, 0xe0, 0x24, 0xe0,
+ 0x26, 0xe0, 0x3a, 0xe0, 0x84, 0xe0, 0x9c, 0xe0,
+ 0xc2, 0x49, 0x04, 0xf0, 0x02, 0xc0, 0x00, 0xb8,
+ 0x14, 0x18, 0x02, 0xc0, 0x00, 0xb8, 0x2e, 0x18,
+ 0x06, 0x89, 0x08, 0xc0, 0x0c, 0x61, 0x92, 0x48,
+ 0x93, 0x48, 0x0c, 0x89, 0x02, 0xc0, 0x00, 0xb8,
+ 0x08, 0x05, 0x40, 0xb4, 0x16, 0x89, 0x6d, 0xc0,
+ 0x00, 0x61, 0x95, 0x49, 0x06, 0xf0, 0xfa, 0xc0,
+ 0x0c, 0x61, 0x92, 0x48, 0x93, 0x48, 0x0c, 0x89,
+ 0x02, 0xc0, 0x00, 0xb8, 0xe2, 0x04, 0x02, 0xc2,
+ 0x00, 0xba, 0xec, 0x11, 0x60, 0x60, 0x85, 0x49,
+ 0x0d, 0xf1, 0x11, 0xc6, 0xd2, 0x61, 0x91, 0x49,
+ 0xfd, 0xf0, 0x74, 0x60, 0x04, 0x48, 0x74, 0x88,
+ 0x08, 0xc6, 0x08, 0xc0, 0xc4, 0x98, 0x01, 0x18,
+ 0xc0, 0x88, 0x02, 0xc0, 0x00, 0xb8, 0x6e, 0x12,
+ 0x04, 0xe4, 0x0d, 0x00, 0x00, 0xd4, 0xd1, 0x49,
+ 0x3c, 0xf1, 0xd2, 0x49, 0x16, 0xf1, 0xd3, 0x49,
+ 0x18, 0xf1, 0xd4, 0x49, 0x19, 0xf1, 0xd5, 0x49,
+ 0x1a, 0xf1, 0xd6, 0x49, 0x1b, 0xf1, 0xd7, 0x49,
+ 0x1c, 0xf1, 0xd8, 0x49, 0x1d, 0xf1, 0xd9, 0x49,
+ 0x20, 0xf1, 0xda, 0x49, 0x23, 0xf1, 0xdb, 0x49,
+ 0x24, 0xf1, 0x02, 0xc4, 0x00, 0xbc, 0x20, 0x04,
+ 0xe5, 0x8e, 0x02, 0xc4, 0x00, 0xbc, 0x14, 0x02,
+ 0x02, 0xc4, 0x00, 0xbc, 0x16, 0x02, 0x02, 0xc4,
+ 0x00, 0xbc, 0x18, 0x02, 0x02, 0xc4, 0x00, 0xbc,
+ 0x1a, 0x02, 0x02, 0xc4, 0x00, 0xbc, 0x1c, 0x02,
+ 0x02, 0xc4, 0x00, 0xbc, 0x94, 0x02, 0x10, 0xc7,
+ 0xe0, 0x8e, 0x02, 0xc4, 0x00, 0xbc, 0x8a, 0x02,
+ 0x0b, 0xc7, 0xe4, 0x8e, 0x02, 0xc4, 0x00, 0xbc,
+ 0x88, 0x02, 0x02, 0xc4, 0x00, 0xbc, 0x6e, 0x02,
+ 0x02, 0xc4, 0x00, 0xbc, 0x5a, 0x02, 0x30, 0xe4,
+ 0x0c, 0xc3, 0x60, 0x64, 0xc5, 0x49, 0x04, 0xf1,
+ 0x74, 0x64, 0xc4, 0x48, 0x74, 0x8c, 0x06, 0xc3,
+ 0x64, 0x8e, 0x02, 0xc4, 0x00, 0xbc, 0x20, 0x04,
+ 0x00, 0xd8, 0x00, 0xe4, 0xb2, 0xc0, 0x00, 0x61,
+ 0x90, 0x49, 0x09, 0xf1, 0x8b, 0xc6, 0xca, 0x61,
+ 0x94, 0x49, 0x0e, 0xf1, 0xf6, 0xc6, 0xda, 0x60,
+ 0x81, 0x49, 0x0a, 0xf0, 0x65, 0x60, 0x03, 0x48,
+ 0x65, 0x88, 0xef, 0xc6, 0xdc, 0x60, 0x80, 0x48,
+ 0xdc, 0x88, 0x05, 0xc6, 0x00, 0xbe, 0x02, 0xc6,
+ 0x00, 0xbe, 0x36, 0x13, 0x4c, 0x17, 0x99, 0xc4,
+ 0x80, 0x65, 0xd0, 0x49, 0x04, 0xf1, 0xfa, 0x75,
+ 0x04, 0xc4, 0x00, 0xbc, 0x03, 0xc4, 0x00, 0xbc,
+ 0x9a, 0x00, 0xee, 0x01 };
+
+static const u16 r8153_usb_patch_b_bp[] = {
+ 0xfc26, 0xa000, 0xfc28, 0x180c, 0xfc2a, 0x0506, 0xfc2c, 0x04E0,
+ 0xfc2e, 0x11E4, 0xfc30, 0x125C, 0xfc32, 0x0232, 0xfc34, 0x131E,
+ 0xfc36, 0x0098, 0xfc38, 0x00FF };
+
+static const u8 r8153_pla_patch_b[] = {
+ 0x08, 0xe0, 0xea, 0xe0, 0xf2, 0xe0, 0x04, 0xe1,
+ 0x09, 0xe1, 0x0e, 0xe1, 0x46, 0xe1, 0xf7, 0xe1,
+ 0x14, 0xc2, 0x40, 0x73, 0xba, 0x48, 0x40, 0x9b,
+ 0x11, 0xc2, 0x40, 0x73, 0xb0, 0x49, 0x17, 0xf0,
+ 0xbf, 0x49, 0x03, 0xf1, 0x09, 0xc5, 0x00, 0xbd,
+ 0xb1, 0x49, 0x11, 0xf0, 0xb1, 0x48, 0x40, 0x9b,
+ 0x02, 0xc2, 0x00, 0xba, 0x1a, 0x17, 0x00, 0xe0,
+ 0x1e, 0xfc, 0xbc, 0xc0, 0xf0, 0xc0, 0xde, 0xe8,
+ 0x00, 0x80, 0x00, 0x20, 0x2c, 0x75, 0xd4, 0x49,
+ 0x12, 0xf1, 0x32, 0xe0, 0xf8, 0xc2, 0x46, 0x71,
+ 0xf7, 0xc2, 0x40, 0x73, 0xbe, 0x49, 0x03, 0xf1,
+ 0xf5, 0xc7, 0x02, 0xe0, 0xf2, 0xc7, 0x4f, 0x30,
+ 0x26, 0x62, 0xa1, 0x49, 0xf0, 0xf1, 0x22, 0x72,
+ 0xa0, 0x49, 0xed, 0xf1, 0x25, 0x25, 0x18, 0x1f,
+ 0x97, 0x30, 0x91, 0x30, 0x36, 0x9a, 0x2c, 0x75,
+ 0x3c, 0xc3, 0x60, 0x73, 0xb1, 0x49, 0x0d, 0xf1,
+ 0xdc, 0x21, 0xbc, 0x25, 0x30, 0xc6, 0xc0, 0x77,
+ 0x04, 0x13, 0x21, 0xf0, 0x03, 0x13, 0x22, 0xf0,
+ 0x02, 0x13, 0x23, 0xf0, 0x01, 0x13, 0x24, 0xf0,
+ 0x08, 0x13, 0x08, 0xf1, 0x2e, 0x73, 0xba, 0x21,
+ 0xbd, 0x25, 0x05, 0x13, 0x03, 0xf1, 0x24, 0xc5,
+ 0x00, 0xbd, 0xd4, 0x49, 0x03, 0xf1, 0x1c, 0xc5,
+ 0x00, 0xbd, 0xc4, 0xc6, 0xc6, 0x67, 0x2e, 0x75,
+ 0xd7, 0x22, 0xdd, 0x26, 0x05, 0x15, 0x1b, 0xf0,
+ 0x14, 0xc6, 0x00, 0xbe, 0x13, 0xc5, 0x00, 0xbd,
+ 0x12, 0xc5, 0x00, 0xbd, 0xf1, 0x49, 0xfb, 0xf1,
+ 0xef, 0xe7, 0xf4, 0x49, 0xfa, 0xf1, 0xec, 0xe7,
+ 0xf3, 0x49, 0xf7, 0xf1, 0xe9, 0xe7, 0xf2, 0x49,
+ 0xf4, 0xf1, 0xe6, 0xe7, 0xb6, 0xc0, 0x9e, 0x12,
+ 0xde, 0x11, 0x0a, 0x12, 0x3c, 0x13, 0x00, 0xa0,
+ 0xa0, 0xd1, 0x00, 0x00, 0xc0, 0x75, 0xd0, 0x49,
+ 0x46, 0xf0, 0x26, 0x72, 0xa7, 0x49, 0x43, 0xf0,
+ 0x22, 0x72, 0x25, 0x25, 0x20, 0x1f, 0x97, 0x30,
+ 0x91, 0x30, 0x40, 0x73, 0xf3, 0xc4, 0x1c, 0x40,
+ 0x04, 0xf0, 0xd7, 0x49, 0x05, 0xf1, 0x37, 0xe0,
+ 0x53, 0x48, 0xc0, 0x9d, 0x08, 0x02, 0x40, 0x66,
+ 0x64, 0x27, 0x06, 0x16, 0x30, 0xf1, 0x46, 0x63,
+ 0x3b, 0x13, 0x2d, 0xf1, 0x34, 0x9b, 0x18, 0x1b,
+ 0x93, 0x30, 0x2b, 0xc3, 0x10, 0x1c, 0x2b, 0xe8,
+ 0x01, 0x14, 0x25, 0xf1, 0x00, 0x1d, 0x26, 0x1a,
+ 0x8a, 0x30, 0x22, 0x73, 0xb5, 0x25, 0x0e, 0x0b,
+ 0x00, 0x1c, 0x2c, 0xe8, 0x1f, 0xc7, 0x27, 0x40,
+ 0x1a, 0xf1, 0x38, 0xe8, 0x32, 0x1f, 0x8f, 0x30,
+ 0x08, 0x1b, 0x24, 0xe8, 0x36, 0x72, 0x46, 0x77,
+ 0x00, 0x17, 0x0d, 0xf0, 0x13, 0xc3, 0x1f, 0x40,
+ 0x03, 0xf1, 0x00, 0x1f, 0x46, 0x9f, 0x44, 0x77,
+ 0x9f, 0x44, 0x5f, 0x44, 0x17, 0xe8, 0x0a, 0xc7,
+ 0x27, 0x40, 0x05, 0xf1, 0x02, 0xc3, 0x00, 0xbb,
+ 0xfa, 0x18, 0xb0, 0x18, 0xff, 0xc7, 0x00, 0xbf,
+ 0xb8, 0xcd, 0xff, 0xff, 0x02, 0x0c, 0x54, 0xa5,
+ 0xdc, 0xa5, 0x2f, 0x40, 0x05, 0xf1, 0x00, 0x14,
+ 0xfa, 0xf1, 0x01, 0x1c, 0x02, 0xe0, 0x00, 0x1c,
+ 0x80, 0xff, 0xb0, 0x49, 0x04, 0xf0, 0x01, 0x0b,
+ 0xd3, 0xa1, 0x03, 0xe0, 0x02, 0x0b, 0xd3, 0xa5,
+ 0x27, 0x31, 0x20, 0x37, 0x02, 0x0b, 0xd3, 0xa5,
+ 0x27, 0x31, 0x20, 0x37, 0x00, 0x13, 0xfb, 0xf1,
+ 0x80, 0xff, 0x22, 0x73, 0xb5, 0x25, 0x18, 0x1e,
+ 0xde, 0x30, 0xd9, 0x30, 0x64, 0x72, 0x11, 0x1e,
+ 0x68, 0x23, 0x16, 0x31, 0x80, 0xff, 0x08, 0xc2,
+ 0x40, 0x73, 0x3a, 0x48, 0x40, 0x9b, 0x06, 0xff,
+ 0x02, 0xc6, 0x00, 0xbe, 0x08, 0x16, 0x1e, 0xfc,
+ 0x2c, 0x75, 0xdc, 0x21, 0xbc, 0x25, 0x04, 0x13,
+ 0x0b, 0xf0, 0x03, 0x13, 0x09, 0xf0, 0x02, 0x13,
+ 0x07, 0xf0, 0x01, 0x13, 0x05, 0xf0, 0x08, 0x13,
+ 0x03, 0xf0, 0x04, 0xc3, 0x00, 0xbb, 0x03, 0xc3,
+ 0x00, 0xbb, 0x8c, 0x15, 0x76, 0x15, 0xa0, 0x64,
+ 0x40, 0x48, 0xa0, 0x8c, 0x02, 0xc4, 0x00, 0xbc,
+ 0x82, 0x00, 0xa0, 0x62, 0x21, 0x48, 0xa0, 0x8a,
+ 0x02, 0xc2, 0x00, 0xba, 0x40, 0x03, 0x33, 0xc5,
+ 0xa0, 0x74, 0xc0, 0x49, 0x1f, 0xf0, 0x30, 0xc5,
+ 0xa0, 0x73, 0x00, 0x13, 0x04, 0xf1, 0xa2, 0x73,
+ 0x00, 0x13, 0x14, 0xf0, 0x28, 0xc5, 0xa0, 0x74,
+ 0xc8, 0x49, 0x1b, 0xf1, 0x26, 0xc5, 0xa0, 0x76,
+ 0xa2, 0x74, 0x01, 0x06, 0x20, 0x37, 0xa0, 0x9e,
+ 0xa2, 0x9c, 0x1e, 0xc5, 0xa2, 0x73, 0x23, 0x40,
+ 0x10, 0xf8, 0x04, 0xf3, 0xa0, 0x73, 0x33, 0x40,
+ 0x0c, 0xf8, 0x15, 0xc5, 0xa0, 0x74, 0x41, 0x48,
+ 0xa0, 0x9c, 0x14, 0xc5, 0xa0, 0x76, 0x62, 0x48,
+ 0xe0, 0x48, 0xa0, 0x9e, 0x10, 0xc6, 0x00, 0xbe,
+ 0x0a, 0xc5, 0xa0, 0x74, 0x48, 0x48, 0xa0, 0x9c,
+ 0x0b, 0xc5, 0x20, 0x1e, 0xa0, 0x9e, 0xe5, 0x48,
+ 0xa0, 0x9e, 0xf0, 0xe7, 0xbc, 0xc0, 0xc8, 0xd2,
+ 0xcc, 0xd2, 0x28, 0xe4, 0xe6, 0x01, 0xf0, 0xc0,
+ 0x18, 0x89, 0x00, 0x1d, 0x3c, 0xc3, 0x64, 0x71,
+ 0x3c, 0xc0, 0x02, 0x99, 0x00, 0x61, 0x67, 0x11,
+ 0x3c, 0xf1, 0x69, 0x33, 0x35, 0xc0, 0x28, 0x40,
+ 0xf6, 0xf1, 0x34, 0xc0, 0x00, 0x19, 0x81, 0x1b,
+ 0x91, 0xe8, 0x31, 0xc0, 0x04, 0x1a, 0x84, 0x1b,
+ 0x8d, 0xe8, 0x82, 0xe8, 0xa3, 0x49, 0xfe, 0xf0,
+ 0x2b, 0xc0, 0x7e, 0xe8, 0xa1, 0x48, 0x28, 0xc0,
+ 0x84, 0x1b, 0x84, 0xe8, 0x00, 0x1d, 0x69, 0x33,
+ 0x00, 0x1e, 0x01, 0x06, 0xff, 0x18, 0x30, 0x40,
+ 0xfd, 0xf1, 0x19, 0xc0, 0x00, 0x76, 0x2e, 0x40,
+ 0xf7, 0xf1, 0x21, 0x48, 0x19, 0xc0, 0x84, 0x1b,
+ 0x75, 0xe8, 0x10, 0xc0, 0x69, 0xe8, 0xa1, 0x49,
+ 0xfd, 0xf0, 0x11, 0xc0, 0x00, 0x1a, 0x84, 0x1b,
+ 0x6d, 0xe8, 0x62, 0xe8, 0xa5, 0x49, 0xfe, 0xf0,
+ 0x09, 0xc0, 0x01, 0x19, 0x81, 0x1b, 0x66, 0xe8,
+ 0x54, 0xe0, 0x10, 0xd4, 0x88, 0xd3, 0xb8, 0x0b,
+ 0x50, 0xe8, 0x20, 0xb4, 0x10, 0xd8, 0x84, 0xd4,
+ 0xfd, 0xc0, 0x52, 0xe8, 0x48, 0x33, 0xf9, 0xc0,
+ 0x00, 0x61, 0x9c, 0x20, 0x9c, 0x24, 0xd0, 0x49,
+ 0x04, 0xf0, 0x04, 0x11, 0x02, 0xf1, 0x03, 0xe0,
+ 0x00, 0x11, 0x06, 0xf1, 0x5c, 0xc0, 0x00, 0x61,
+ 0x92, 0x48, 0x00, 0x89, 0x3a, 0xe0, 0x06, 0x11,
+ 0x06, 0xf1, 0x55, 0xc0, 0x00, 0x61, 0x11, 0x48,
+ 0x00, 0x89, 0x33, 0xe0, 0x05, 0x11, 0x08, 0xf1,
+ 0x4e, 0xc0, 0x00, 0x61, 0x91, 0x49, 0x04, 0xf0,
+ 0x91, 0x48, 0x00, 0x89, 0x11, 0xe0, 0xd9, 0xc0,
+ 0x00, 0x61, 0x98, 0x20, 0x98, 0x24, 0x25, 0x11,
+ 0x24, 0xf1, 0x44, 0xc0, 0x29, 0xe8, 0x95, 0x49,
+ 0x20, 0xf0, 0xcf, 0xc0, 0x00, 0x61, 0x98, 0x20,
+ 0x98, 0x24, 0x25, 0x11, 0x1a, 0xf1, 0x37, 0xc0,
+ 0x00, 0x61, 0x92, 0x49, 0x16, 0xf1, 0x12, 0x48,
+ 0x00, 0x89, 0x2f, 0xc0, 0x00, 0x19, 0x00, 0x89,
+ 0x2d, 0xc0, 0x01, 0x89, 0x2d, 0xc0, 0x04, 0x19,
+ 0x81, 0x1b, 0x1c, 0xe8, 0x2a, 0xc0, 0x14, 0x19,
+ 0x81, 0x1b, 0x18, 0xe8, 0x21, 0xc0, 0x0c, 0xe8,
+ 0x1f, 0xc0, 0x12, 0x48, 0x81, 0x1b, 0x12, 0xe8,
+ 0xae, 0xc3, 0x66, 0x71, 0xae, 0xc0, 0x02, 0x99,
+ 0x02, 0xc0, 0x00, 0xb8, 0x96, 0x07, 0x13, 0xc4,
+ 0x84, 0x98, 0x00, 0x1b, 0x86, 0x8b, 0x86, 0x73,
+ 0xbf, 0x49, 0xfe, 0xf1, 0x80, 0x71, 0x82, 0x72,
+ 0x80, 0xff, 0x09, 0xc4, 0x84, 0x98, 0x80, 0x99,
+ 0x82, 0x9a, 0x86, 0x8b, 0x86, 0x73, 0xbf, 0x49,
+ 0xfe, 0xf1, 0x80, 0xff, 0x08, 0xea, 0x30, 0xd4,
+ 0x10, 0xc0, 0x12, 0xe8, 0x8a, 0xd3, 0x28, 0xe4,
+ 0x2c, 0xe4, 0x00, 0xd8, 0x00, 0x00, 0x00, 0x00 };
+
+static const u16 r8153_pla_patch_b_bp[] = {
+ 0xfc26, 0x8000, 0xfc28, 0x1154, 0xfc2a, 0x1606, 0xfc2c, 0x155a,
+ 0xfc2e, 0x0080, 0xfc30, 0x033c, 0xfc32, 0x01a0, 0xfc34, 0x0794,
+ 0xfc36, 0x0000, 0xfc38, 0x007f };
+
+static const u16 r8153_ram_code_d[] = {
+ 0xB436, 0xB820, 0xB438, 0x0290, 0xB436, 0xA012, 0xB438, 0x0000,
+ 0xB436, 0xA014, 0xB438, 0x2c04, 0xB438, 0x2c07, 0xB438, 0x2c07,
+ 0xB438, 0x2c07, 0xB438, 0xa240, 0xB438, 0xa104, 0xB438, 0x2944,
+ 0xB436, 0xA01A, 0xB438, 0x0000, 0xB436, 0xA006, 0xB438, 0x0fff,
+ 0xB436, 0xA004, 0xB438, 0x0fff, 0xB436, 0xA002, 0xB438, 0x0fff,
+ 0xB436, 0xA000, 0xB438, 0x1943, 0xB436, 0xB820, 0xB438, 0x0210 };
+
+static const u8 usb_patch_d[] = {
+ 0x08, 0xe0, 0x0e, 0xe0, 0x11, 0xe0, 0x24, 0xe0,
+ 0x2b, 0xe0, 0x33, 0xe0, 0x3a, 0xe0, 0x3c, 0xe0,
+ 0x1e, 0xc3, 0x70, 0x61, 0x12, 0x48, 0x70, 0x89,
+ 0x02, 0xc3, 0x00, 0xbb, 0x02, 0x17, 0x32, 0x19,
+ 0x02, 0xc3, 0x00, 0xbb, 0x44, 0x14, 0x30, 0x18,
+ 0x11, 0xc1, 0x05, 0xe8, 0x10, 0xc6, 0x02, 0xc2,
+ 0x00, 0xba, 0x94, 0x17, 0x02, 0xb4, 0x09, 0xc2,
+ 0x40, 0x99, 0x0e, 0x48, 0x42, 0x98, 0x42, 0x70,
+ 0x8e, 0x49, 0xfe, 0xf1, 0x02, 0xb0, 0x80, 0xff,
+ 0xc0, 0xd4, 0xe4, 0x40, 0x20, 0xd4, 0x30, 0x18,
+ 0x06, 0xc1, 0xf1, 0xef, 0xfc, 0xc7, 0x02, 0xc0,
+ 0x00, 0xb8, 0x38, 0x12, 0xe4, 0x4b, 0x0c, 0x61,
+ 0x92, 0x48, 0x93, 0x48, 0x95, 0x48, 0x96, 0x48,
+ 0x0c, 0x89, 0x02, 0xc0, 0x00, 0xb8, 0x0e, 0x06,
+ 0x30, 0x18, 0xf5, 0xc1, 0xe0, 0xef, 0x04, 0xc5,
+ 0x02, 0xc4, 0x00, 0xbc, 0x76, 0x3c, 0x1e, 0xfc,
+ 0x02, 0xc6, 0x00, 0xbe, 0x00, 0x00, 0x02, 0xc6,
+ 0x00, 0xbe, 0x00, 0x00 };
+
+static const u16 r8153_usb_patch_d_bp[] = {
+ 0xfc26, 0xa000, 0xfc28, 0x16de, 0xfc2a, 0x1442, 0xfc2c, 0x1792,
+ 0xfc2e, 0x1236, 0xfc30, 0x0606, 0xfc32, 0x3c74, 0xfc34, 0x0000,
+ 0xfc36, 0x0000, 0xfc38, 0x003e };
+
+static const u8 pla_patch_d[] = {
+ 0x03, 0xe0, 0x16, 0xe0, 0x30, 0xe0, 0x12, 0xc2,
+ 0x40, 0x73, 0xb0, 0x49, 0x08, 0xf0, 0xb8, 0x49,
+ 0x06, 0xf0, 0xb8, 0x48, 0x40, 0x9b, 0x0b, 0xc2,
+ 0x40, 0x76, 0x05, 0xe0, 0x02, 0x61, 0x02, 0xc3,
+ 0x00, 0xbb, 0x54, 0x08, 0x02, 0xc3, 0x00, 0xbb,
+ 0x64, 0x08, 0x98, 0xd3, 0x1e, 0xfc, 0xfe, 0xc0,
+ 0x02, 0x62, 0xa0, 0x48, 0x02, 0x8a, 0x00, 0x72,
+ 0xa0, 0x49, 0x11, 0xf0, 0x13, 0xc1, 0x20, 0x62,
+ 0x2e, 0x21, 0x2f, 0x25, 0x00, 0x71, 0x9f, 0x24,
+ 0x0a, 0x40, 0x09, 0xf0, 0x00, 0x71, 0x18, 0x48,
+ 0xa0, 0x49, 0x03, 0xf1, 0x9f, 0x48, 0x02, 0xe0,
+ 0x1f, 0x48, 0x00, 0x99, 0x02, 0xc2, 0x00, 0xba,
+ 0xac, 0x0c, 0x08, 0xe9, 0x36, 0xc0, 0x00, 0x61,
+ 0x9c, 0x20, 0x9c, 0x24, 0x33, 0xc0, 0x07, 0x11,
+ 0x05, 0xf1, 0x00, 0x61, 0x17, 0x48, 0x00, 0x89,
+ 0x0d, 0xe0, 0x04, 0x11, 0x0b, 0xf1, 0x00, 0x61,
+ 0x97, 0x49, 0x08, 0xf0, 0x97, 0x48, 0x00, 0x89,
+ 0x23, 0xc0, 0x0e, 0xe8, 0x12, 0x48, 0x81, 0x1b,
+ 0x15, 0xe8, 0x1f, 0xc0, 0x00, 0x61, 0x67, 0x11,
+ 0x04, 0xf0, 0x02, 0xc0, 0x00, 0xb8, 0x42, 0x09,
+ 0x02, 0xc0, 0x00, 0xb8, 0x90, 0x08, 0x13, 0xc4,
+ 0x84, 0x98, 0x00, 0x1b, 0x86, 0x8b, 0x86, 0x73,
+ 0xbf, 0x49, 0xfe, 0xf1, 0x80, 0x71, 0x82, 0x72,
+ 0x80, 0xff, 0x09, 0xc4, 0x84, 0x98, 0x80, 0x99,
+ 0x82, 0x9a, 0x86, 0x8b, 0x86, 0x73, 0xbf, 0x49,
+ 0xfe, 0xf1, 0x80, 0xff, 0x08, 0xea, 0x30, 0xd4,
+ 0x50, 0xe8, 0x8a, 0xd3 };
+
+static const u16 r8153_pla_patch_d_bp[] = {
+ 0xfc26, 0x8000, 0xfc28, 0x0852, 0xfc2a, 0x0c92, 0xfc2c, 0x088c,
+ 0xfc2e, 0x0000, 0xfc30, 0x0000, 0xfc32, 0x0000, 0xfc34, 0x0000,
+ 0xfc36, 0x0000, 0xfc38, 0x0007 };
+
+static const u8 usb_patch2_b[] = {
+ 0x10, 0xe0, 0x26, 0xe0, 0x3a, 0xe0, 0x58, 0xe0,
+ 0x6c, 0xe0, 0x85, 0xe0, 0xa5, 0xe0, 0xbe, 0xe0,
+ 0xd8, 0xe0, 0xdb, 0xe0, 0xf3, 0xe0, 0xf5, 0xe0,
+ 0xf7, 0xe0, 0xf9, 0xe0, 0xfb, 0xe0, 0xfd, 0xe0,
+ 0x16, 0xc0, 0x00, 0x75, 0xd1, 0x49, 0x0d, 0xf0,
+ 0x0f, 0xc0, 0x0f, 0xc5, 0x00, 0x1e, 0x08, 0x9e,
+ 0x0c, 0x9d, 0x0c, 0xc6, 0x0a, 0x9e, 0x8f, 0x1c,
+ 0x0e, 0x8c, 0x0e, 0x74, 0xcf, 0x49, 0xfe, 0xf1,
+ 0x02, 0xc0, 0x00, 0xb8, 0x96, 0x31, 0x00, 0xdc,
+ 0x24, 0xe4, 0x80, 0x02, 0x34, 0xd3, 0xff, 0xc3,
+ 0x60, 0x72, 0xa1, 0x49, 0x0d, 0xf0, 0xf8, 0xc3,
+ 0xf8, 0xc2, 0x00, 0x1c, 0x68, 0x9c, 0xf6, 0xc4,
+ 0x6a, 0x9c, 0x6c, 0x9a, 0x8f, 0x1c, 0x6e, 0x8c,
+ 0x6e, 0x74, 0xcf, 0x49, 0xfe, 0xf1, 0x04, 0xc0,
+ 0x02, 0xc2, 0x00, 0xba, 0xa8, 0x28, 0xf8, 0xc7,
+ 0xea, 0xc0, 0x00, 0x75, 0xd1, 0x49, 0x15, 0xf0,
+ 0x19, 0xc7, 0x17, 0xc2, 0xec, 0x9a, 0x00, 0x19,
+ 0xee, 0x89, 0xee, 0x71, 0x9f, 0x49, 0xfe, 0xf1,
+ 0xea, 0x71, 0x9f, 0x49, 0x0a, 0xf0, 0xd9, 0xc2,
+ 0xec, 0x9a, 0x00, 0x19, 0xe8, 0x99, 0x81, 0x19,
+ 0xee, 0x89, 0xee, 0x71, 0x9f, 0x49, 0xfe, 0xf1,
+ 0x06, 0xc3, 0x02, 0xc2, 0x00, 0xba, 0xf0, 0x1d,
+ 0x4c, 0xe8, 0x00, 0xdc, 0x00, 0xd4, 0xcb, 0xc0,
+ 0x00, 0x75, 0xd1, 0x49, 0x0d, 0xf0, 0xc4, 0xc0,
+ 0xc4, 0xc5, 0x00, 0x1e, 0x08, 0x9e, 0xc2, 0xc6,
+ 0x0a, 0x9e, 0x0c, 0x9d, 0x8f, 0x1c, 0x0e, 0x8c,
+ 0x0e, 0x74, 0xcf, 0x49, 0xfe, 0xf1, 0x04, 0xc0,
+ 0x02, 0xc1, 0x00, 0xb9, 0xc4, 0x16, 0x20, 0xd4,
+ 0xb6, 0xc0, 0x00, 0x75, 0xd1, 0x48, 0x00, 0x9d,
+ 0xe5, 0xc7, 0xaf, 0xc2, 0xec, 0x9a, 0x00, 0x19,
+ 0xe8, 0x9a, 0x81, 0x19, 0xee, 0x89, 0xee, 0x71,
+ 0x9f, 0x49, 0xfe, 0xf1, 0x2c, 0xc1, 0xec, 0x99,
+ 0x81, 0x19, 0xee, 0x89, 0xee, 0x71, 0x9f, 0x49,
+ 0xfe, 0xf1, 0x04, 0xc3, 0x02, 0xc2, 0x00, 0xba,
+ 0x96, 0x1c, 0xc0, 0xd4, 0xc0, 0x88, 0x1e, 0xc6,
+ 0xc0, 0x70, 0x8f, 0x49, 0x0e, 0xf0, 0x8f, 0x48,
+ 0x93, 0xc6, 0xca, 0x98, 0x11, 0x18, 0xc8, 0x98,
+ 0x16, 0xc0, 0xcc, 0x98, 0x8f, 0x18, 0xce, 0x88,
+ 0xce, 0x70, 0x8f, 0x49, 0xfe, 0xf1, 0x0b, 0xe0,
+ 0x43, 0xc6, 0x00, 0x18, 0xc8, 0x98, 0x0b, 0xc0,
+ 0xcc, 0x98, 0x81, 0x18, 0xce, 0x88, 0xce, 0x70,
+ 0x8f, 0x49, 0xfe, 0xf1, 0x02, 0xc0, 0x00, 0xb8,
+ 0xf2, 0x19, 0x40, 0xd3, 0x20, 0xe4, 0x33, 0xc2,
+ 0x40, 0x71, 0x91, 0x48, 0x40, 0x99, 0x30, 0xc2,
+ 0x00, 0x19, 0x48, 0x99, 0xf8, 0xc1, 0x4c, 0x99,
+ 0x81, 0x19, 0x4e, 0x89, 0x4e, 0x71, 0x9f, 0x49,
+ 0xfe, 0xf1, 0x0b, 0xc1, 0x4c, 0x99, 0x81, 0x19,
+ 0x4e, 0x89, 0x4e, 0x71, 0x9f, 0x49, 0xfe, 0xf1,
+ 0x02, 0x71, 0x02, 0xc2, 0x00, 0xba, 0x0e, 0x34,
+ 0x24, 0xe4, 0x19, 0xc2, 0x40, 0x71, 0x91, 0x48,
+ 0x40, 0x99, 0x16, 0xc2, 0x00, 0x19, 0x48, 0x99,
+ 0xde, 0xc1, 0x4c, 0x99, 0x81, 0x19, 0x4e, 0x89,
+ 0x4e, 0x71, 0x9f, 0x49, 0xfe, 0xf1, 0xf1, 0xc1,
+ 0x4c, 0x99, 0x81, 0x19, 0x4e, 0x89, 0x4e, 0x71,
+ 0x9f, 0x49, 0xfe, 0xf1, 0x02, 0x71, 0x02, 0xc2,
+ 0x00, 0xba, 0x60, 0x33, 0x34, 0xd3, 0x00, 0xdc,
+ 0x1e, 0x89, 0x02, 0xc0, 0x00, 0xb8, 0xfa, 0x12,
+ 0x18, 0xc0, 0x00, 0x65, 0xd1, 0x49, 0x0e, 0xf0,
+ 0x11, 0xc0, 0x11, 0xc5, 0x00, 0x1e, 0x08, 0x9e,
+ 0x0c, 0x9d, 0x0e, 0xc6, 0x0a, 0x9e, 0x8f, 0x1c,
+ 0x0e, 0x8c, 0x0e, 0x74, 0xcf, 0x49, 0xfe, 0xf1,
+ 0x04, 0xc0, 0x02, 0xc2, 0x00, 0xba, 0xa0, 0x41,
+ 0x06, 0xd4, 0x00, 0xdc, 0x24, 0xe4, 0x80, 0x02,
+ 0x34, 0xd3, 0x02, 0xc0, 0x00, 0xb8, 0x00, 0x00,
+ 0x02, 0xc0, 0x00, 0xb8, 0x00, 0x00, 0x02, 0xc0,
+ 0x00, 0xb8, 0x00, 0x00, 0x02, 0xc0, 0x00, 0xb8,
+ 0x00, 0x00, 0x02, 0xc0, 0x00, 0xb8, 0x00, 0x00,
+ 0x02, 0xc0, 0x00, 0xb8, 0x00, 0x00, 0x00, 0x00 };
+
+static const u16 r8153b_usb_patch_b_bp[] = {
+ 0xfc26, 0xa000, 0xfc28, 0x2a20, 0xfc2a, 0x28a6, 0xfc2c, 0x1dee,
+ 0xfc2e, 0x16c2, 0xfc30, 0x1c94, 0xfc32, 0x19f0, 0xfc34, 0x340c,
+ 0xfc36, 0x335e, 0xfc38, 0x12f8, 0xfc3a, 0x419e, 0xfc3c, 0x0000,
+ 0xfc3e, 0x0000, 0xfc40, 0x0000, 0xfc42, 0x0000, 0xfc44, 0x0000,
+ 0xfc46, 0x0000, 0xfc48, 0x03ff };
+
+static const u8 pla_patch2_b[] = {
+ 0x05, 0xe0, 0x1b, 0xe0, 0x2c, 0xe0, 0x60, 0xe0,
+ 0x73, 0xe0, 0x15, 0xc6, 0xc2, 0x64, 0xd2, 0x49,
+ 0x06, 0xf1, 0xc4, 0x48, 0xc5, 0x48, 0xc6, 0x48,
+ 0xc7, 0x48, 0x05, 0xe0, 0x44, 0x48, 0x45, 0x48,
+ 0x46, 0x48, 0x47, 0x48, 0xc2, 0x8c, 0xc0, 0x64,
+ 0x46, 0x48, 0xc0, 0x8c, 0x05, 0xc5, 0x02, 0xc4,
+ 0x00, 0xbc, 0x18, 0x02, 0x06, 0xdc, 0xb0, 0xc0,
+ 0x10, 0xc5, 0xa0, 0x77, 0xa0, 0x74, 0x46, 0x48,
+ 0x47, 0x48, 0xa0, 0x9c, 0x0b, 0xc5, 0xa0, 0x74,
+ 0x44, 0x48, 0x43, 0x48, 0xa0, 0x9c, 0x05, 0xc5,
+ 0xa0, 0x9f, 0x02, 0xc5, 0x00, 0xbd, 0x3c, 0x03,
+ 0x1c, 0xe8, 0x20, 0xe8, 0xd4, 0x49, 0x04, 0xf1,
+ 0xd5, 0x49, 0x20, 0xf1, 0x28, 0xe0, 0x2a, 0xc7,
+ 0xe0, 0x75, 0xda, 0x49, 0x14, 0xf0, 0x27, 0xc7,
+ 0xe0, 0x75, 0xdc, 0x49, 0x10, 0xf1, 0x24, 0xc7,
+ 0xe0, 0x75, 0x25, 0xc7, 0xe0, 0x74, 0x2c, 0x40,
+ 0x0a, 0xfa, 0x1f, 0xc7, 0xe4, 0x75, 0xd0, 0x49,
+ 0x09, 0xf1, 0x1c, 0xc5, 0xe6, 0x9d, 0x11, 0x1d,
+ 0xe4, 0x8d, 0x04, 0xe0, 0x16, 0xc7, 0x00, 0x1d,
+ 0xe4, 0x8d, 0xe0, 0x8e, 0x11, 0x1d, 0xe0, 0x8d,
+ 0x07, 0xe0, 0x0c, 0xc7, 0xe0, 0x75, 0xda, 0x48,
+ 0xe0, 0x9d, 0x0b, 0xc7, 0xe4, 0x8e, 0x02, 0xc4,
+ 0x00, 0xbc, 0x28, 0x03, 0x02, 0xc4, 0x00, 0xbc,
+ 0x14, 0x03, 0x12, 0xe8, 0x4e, 0xe8, 0x1c, 0xe6,
+ 0x20, 0xe4, 0x80, 0x02, 0xa4, 0xc0, 0x12, 0xc2,
+ 0x40, 0x73, 0xb0, 0x49, 0x08, 0xf0, 0xb8, 0x49,
+ 0x06, 0xf0, 0xb8, 0x48, 0x40, 0x9b, 0x0b, 0xc2,
+ 0x40, 0x76, 0x05, 0xe0, 0x02, 0x61, 0x02, 0xc3,
+ 0x00, 0xbb, 0x0a, 0x0a, 0x02, 0xc3, 0x00, 0xbb,
+ 0x1a, 0x0a, 0x98, 0xd3, 0x1e, 0xfc, 0xfe, 0xc0,
+ 0x02, 0x62, 0xa0, 0x48, 0x02, 0x8a, 0x00, 0x72,
+ 0xa0, 0x49, 0x11, 0xf0, 0x13, 0xc1, 0x20, 0x62,
+ 0x2e, 0x21, 0x2f, 0x25, 0x00, 0x71, 0x9f, 0x24,
+ 0x0a, 0x40, 0x09, 0xf0, 0x00, 0x71, 0x18, 0x48,
+ 0xa0, 0x49, 0x03, 0xf1, 0x9f, 0x48, 0x02, 0xe0,
+ 0x1f, 0x48, 0x00, 0x99, 0x02, 0xc2, 0x00, 0xba,
+ 0xda, 0x0e, 0x08, 0xe9 };
+
+static const u16 r8153b_pla_patch_b_bp[] = {
+ 0xfc26, 0x8000, 0xfc28, 0x0216, 0xfc2a, 0x0332, 0xfc2c, 0x030c,
+ 0xfc2e, 0x0a08, 0xfc30, 0x0ec0, 0xfc32, 0x0000, 0xfc34, 0x0000,
+ 0xfc36, 0x0000, 0xfc38, 0x001e };
+
+static void rtl_clear_bp(struct r8152 *tp, u16 type)
+{
+ u8 zeros[16] = {0};
+
+ switch (tp->version) {
+ case RTL_VER_01:
+ case RTL_VER_02:
+ case RTL_VER_07:
+ break;
+ case RTL_VER_03:
+ case RTL_VER_04:
+ case RTL_VER_05:
+ case RTL_VER_06:
+ r8152_ocp_write_byte(tp, type, PLA_BP_EN, 0);
+ break;
+ case RTL_VER_08:
+ case RTL_VER_09:
+ default:
+ if (type == MCU_TYPE_USB) {
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_BP2_EN, 0);
+
+ r8152_generic_ocp_write(tp, USB_BP(8), 0xff,
+ sizeof(zeros), zeros, type);
+ } else {
+ r8152_ocp_write_byte(tp, MCU_TYPE_PLA, PLA_BP_EN, 0);
+ }
+ break;
+ }
+
+ r8152_generic_ocp_write(tp, USB_BP(0), 0xff, sizeof(zeros), zeros,
+ type);
+
+ mdelay(6);
+
+ r8152_ocp_write_word(tp, type, PLA_BP_BA, 0);
+}
+
+static void r8152b_set_dq_desc(struct r8152 *tp)
+{
+ u8 data;
+
+ data = r8152_ocp_read_byte(tp, MCU_TYPE_USB, 0xd429);
+ data |= 0x80;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, 0xd429, data);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, 0xc0ce, 0x0210);
+ data = r8152_ocp_read_byte(tp, MCU_TYPE_USB, 0xd429);
+ data &= ~0x80;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, 0xd429, data);
+}
+
+static void r8153_pre_ram_code(struct r8152 *tp, u16 patch_key)
+{
+ u64 start;
+ u16 data;
+
+ data = r8152_ocp_reg_read(tp, 0xb820);
+ data |= 0x0010;
+ r8152_ocp_reg_write(tp, 0xb820, data);
+
+ start = get_time_ns();
+ do {
+ mdelay(2);
+ data = r8152_ocp_reg_read(tp, 0xb800) & 0x0040;
+ if (is_timeout(start, 10 * SECOND)) {
+ dev_dbg(&tp->dev->edev.dev, "pre_ram_code timeout!\n");
+ break;
+ }
+ } while (!data);
+
+ r8152_sram_write(tp, 0x8146, patch_key);
+ r8152_sram_write(tp, 0xb82e, 0x0001);
+}
+
+static int r8153_post_ram_code(struct r8152 *tp)
+{
+ u16 data;
+
+ r8152_sram_write(tp, 0x0000, 0x0000);
+
+ data = r8152_ocp_reg_read(tp, 0xb82e);
+ data &= ~0x0001;
+ r8152_ocp_reg_write(tp, 0xb82e, data);
+
+ r8152_sram_write(tp, 0x8146, 0x0000);
+
+ data = r8152_ocp_reg_read(tp, 0xb820);
+ data &= ~0x0010;
+ r8152_ocp_reg_write(tp, 0xb820, data);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, tp->ocp_base);
+
+ return 0;
+}
+
+static void r8153_wdt1_end(struct r8152 *tp)
+{
+ u64 start;
+
+ start = get_time_ns();
+ do {
+ if (!(r8152_ocp_read_byte(tp, MCU_TYPE_USB, 0xe404) & 1))
+ break;
+ mdelay(2);
+ } while (!is_timeout(start, 208 * MSECOND));
+}
+
+void r8152b_firmware(struct r8152 *tp)
+{
+ int i;
+
+ if (tp->version == RTL_VER_01) {
+ int i;
+
+ r8152b_set_dq_desc(tp);
+ rtl_clear_bp(tp, MCU_TYPE_PLA);
+
+ r8152_generic_ocp_write(tp, 0xf800, 0x3f,
+ sizeof(r8152b_pla_patch_a),
+ r8152b_pla_patch_a, MCU_TYPE_PLA);
+
+ for (i = 0; i < ARRAY_SIZE(r8152b_pla_patch_a_bp); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA,
+ r8152b_pla_patch_a_bp[i],
+ r8152b_pla_patch_a_bp[i + 1]);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE,
+ 0x2000);
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, 0xb092, 0x7070);
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, 0xb098, 0x0600);
+ for (i = 0; i < ARRAY_SIZE(r8152b_ram_code1); i++)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, 0xb09a,
+ r8152b_ram_code1[i]);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, 0xb098, 0x0200);
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, 0xb092, 0x7030);
+ } else if (tp->version == RTL_VER_02) {
+ rtl_clear_bp(tp, MCU_TYPE_PLA);
+
+ r8152_generic_ocp_write(tp, 0xf800, 0xff,
+ sizeof(r8152b_pla_patch_a2),
+ r8152b_pla_patch_a2, MCU_TYPE_PLA);
+
+ for (i = 0; i < ARRAY_SIZE(r8152b_pla_patch_a2_bp);
+ i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA,
+ r8152b_pla_patch_a2_bp[i],
+ r8152b_pla_patch_a2_bp[i + 1]);
+ }
+}
+
+void r8153_firmware(struct r8152 *tp)
+{
+ int i;
+
+ if (tp->version == RTL_VER_03) {
+ r8153_pre_ram_code(tp, 0x7000);
+
+ for (i = 0; i < ARRAY_SIZE(r8153_ram_code_a); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA,
+ r8153_ram_code_a[i],
+ r8153_ram_code_a[i + 1]);
+
+ r8153_post_ram_code(tp);
+ } else if (tp->version == RTL_VER_04) {
+ r8153_pre_ram_code(tp, 0x7001);
+
+ for (i = 0; i < ARRAY_SIZE(r8153_ram_code_bc); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA,
+ r8153_ram_code_bc[i],
+ r8153_ram_code_bc[i + 1]);
+
+ r8153_post_ram_code(tp);
+
+ r8153_wdt1_end(tp);
+
+ rtl_clear_bp(tp, MCU_TYPE_USB);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN, 0x0000);
+ r8152_generic_ocp_write(tp, 0xf800, 0xff,
+ sizeof(r8153_usb_patch_b),
+ r8153_usb_patch_b, MCU_TYPE_USB);
+
+ for (i = 0; i < ARRAY_SIZE(r8153_usb_patch_b_bp); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_USB,
+ r8153_usb_patch_b_bp[i],
+ r8153_usb_patch_b_bp[i + 1]);
+
+ if (!(r8152_ocp_read_word(tp, MCU_TYPE_PLA, 0xd38e) & BIT(0))) {
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, 0xd38c, 0x0082);
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, 0xd38e, 0x0082);
+ }
+
+ rtl_clear_bp(tp, MCU_TYPE_PLA);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_EN, 0x0000);
+ r8152_generic_ocp_write(tp, 0xf800, 0xff,
+ sizeof(r8153_pla_patch_b),
+ r8153_pla_patch_b, MCU_TYPE_PLA);
+
+ for (i = 0; i < ARRAY_SIZE(r8153_pla_patch_b_bp); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA,
+ r8153_pla_patch_b_bp[i],
+ r8153_pla_patch_b_bp[i + 1]);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, 0xd388, 0x08ca);
+ } else if (tp->version == RTL_VER_05) {
+ u32 ocp_data;
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, 0xcfca);
+ ocp_data &= ~0x4000;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, 0xcfca, ocp_data);
+
+ r8153_pre_ram_code(tp, 0x7001);
+
+ for (i = 0; i < ARRAY_SIZE(r8153_ram_code_bc); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA,
+ r8153_ram_code_bc[i],
+ r8153_ram_code_bc[i + 1]);
+
+ r8153_post_ram_code(tp);
+
+ r8153_wdt1_end(tp);
+
+ rtl_clear_bp(tp, MCU_TYPE_USB);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN, 0x0000);
+ r8152_generic_ocp_write(tp, 0xf800, 0xff,
+ sizeof(r8153_usb_patch_c),
+ r8153_usb_patch_c, MCU_TYPE_USB);
+
+ for (i = 0; i < ARRAY_SIZE(r8153_usb_patch_c_bp); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_USB,
+ r8153_usb_patch_c_bp[i],
+ r8153_usb_patch_c_bp[i + 1]);
+
+ if (r8152_ocp_read_byte(tp, MCU_TYPE_USB, 0xcfef) & 1) {
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, 0xfc30, 0x1578);
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN,
+ 0x00ff);
+ } else {
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN,
+ 0x00ef);
+ }
+
+ rtl_clear_bp(tp, MCU_TYPE_PLA);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_EN, 0x0000);
+ r8152_generic_ocp_write(tp, 0xf800, 0xff,
+ sizeof(r8153_pla_patch_c),
+ r8153_pla_patch_c, MCU_TYPE_PLA);
+
+ for (i = 0; i < ARRAY_SIZE(r8153_pla_patch_c_bp); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA,
+ r8153_pla_patch_c_bp[i],
+ r8153_pla_patch_c_bp[i + 1]);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, 0xd388, 0x08ca);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_EXTRA_STATUS,
+ U3P3_CHECK_EN | 4);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, 0xcfca);
+ ocp_data |= 0x4000;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, 0xcfca, ocp_data);
+
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
+ ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
+ } else if (tp->version == RTL_VER_06) {
+ u32 ocp_data;
+
+ r8153_pre_ram_code(tp, 0x7002);
+
+ for (i = 0; i < ARRAY_SIZE(r8153_ram_code_d); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA,
+ r8153_ram_code_d[i],
+ r8153_ram_code_d[i + 1]);
+
+ r8153_post_ram_code(tp);
+
+ rtl_clear_bp(tp, MCU_TYPE_USB);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN, 0x0000);
+ r8152_generic_ocp_write(tp, 0xf800, 0xff, sizeof(usb_patch_d),
+ usb_patch_d, MCU_TYPE_USB);
+
+ for (i = 0; i < ARRAY_SIZE(r8153_usb_patch_d_bp); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_USB,
+ r8153_usb_patch_d_bp[i],
+ r8153_usb_patch_d_bp[i + 1]);
+
+ rtl_clear_bp(tp, MCU_TYPE_PLA);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_EN, 0x0000);
+ r8152_generic_ocp_write(tp, 0xf800, 0xff, sizeof(pla_patch_d),
+ pla_patch_d, MCU_TYPE_PLA);
+
+ for (i = 0; i < ARRAY_SIZE(r8153_pla_patch_d_bp); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA,
+ r8153_pla_patch_d_bp[i],
+ r8153_pla_patch_d_bp[i + 1]);
+
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
+ ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB,
+ USB_FW_FIX_EN1);
+ ocp_data |= FW_IP_RESET_EN;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1,
+ ocp_data);
+ }
+}
+
+void r8153b_firmware(struct r8152 *tp)
+{
+ u32 ocp_data;
+ int i;
+
+ if (tp->version != RTL_VER_09)
+ return;
+
+ rtl_clear_bp(tp, MCU_TYPE_USB);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_BP_EN, 0x0000);
+ r8152_generic_ocp_write(tp, 0xe600, 0xff, sizeof(usb_patch2_b),
+ usb_patch2_b, MCU_TYPE_USB);
+
+ for (i = 0; i < ARRAY_SIZE(r8153b_usb_patch_b_bp); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_USB,
+ r8153b_usb_patch_b_bp[i],
+ r8153b_usb_patch_b_bp[i + 1]);
+
+ rtl_clear_bp(tp, MCU_TYPE_PLA);
+
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA, PLA_BP_EN, 0x0000);
+ r8152_generic_ocp_write(tp, 0xf800, 0xff, sizeof(pla_patch2_b),
+ pla_patch2_b, MCU_TYPE_PLA);
+
+ for (i = 0; i < ARRAY_SIZE(r8153b_pla_patch_b_bp); i += 2)
+ r8152_ocp_write_word(tp, MCU_TYPE_PLA,
+ r8153b_pla_patch_b_bp[i],
+ r8153b_pla_patch_b_bp[i + 1]);
+
+ ocp_data = r8152_ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
+ ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
+ r8152_ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
+
+ ocp_data = r8152_ocp_read_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1);
+ ocp_data |= FW_IP_RESET_EN;
+ r8152_ocp_write_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1, ocp_data);
+}
diff --git a/drivers/of/partition.c b/drivers/of/partition.c
index 4e10b597d1..5c5b9ef2f6 100644
--- a/drivers/of/partition.c
+++ b/drivers/of/partition.c
@@ -248,6 +248,9 @@ static int of_partition_fixup(struct device_node *root, void *ctx)
if (!cdev->device_node)
return -EINVAL;
+ if (list_empty(&cdev->partitions))
+ return 0;
+
name = of_get_reproducible_name(cdev->device_node);
np = of_find_node_by_reproducible_name(root, name);
free(name);
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index ea9b8fd9ce..ca9b7d153a 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -365,11 +365,14 @@ int of_platform_populate(struct device_node *root,
}
EXPORT_SYMBOL_GPL(of_platform_populate);
-static struct device_d *of_device_create_on_demand(struct device_node *np)
+struct device_d *of_device_create_on_demand(struct device_node *np)
{
struct device_node *parent;
struct device_d *parent_dev, *dev;
+ if (!deep_probe_is_supported())
+ return NULL;
+
parent = of_get_parent(np);
if (!parent)
return NULL;
diff --git a/drivers/pci/pci-efi.c b/drivers/pci/pci-efi.c
index e1fe11d070..846449c4b0 100644
--- a/drivers/pci/pci-efi.c
+++ b/drivers/pci/pci-efi.c
@@ -209,15 +209,22 @@ static u8 *acpi_parse_resource(u8 *next, struct resource *out)
return next;
}
+static struct efi_driver efi_pci_driver;
+
/* EFI already enumerated the bus for us, match our new pci devices with the efi
* handles
*/
static void efi_pci_fixup_dev_parent(struct pci_dev *dev)
{
- struct efi_pci_priv *priv = host_to_efi_pci(dev->bus->host);
+ struct efi_pci_priv *priv;
struct pci_child *child;
struct pci_child_id id;
+ if (dev->dev.driver != &efi_pci_driver.driver)
+ return;
+
+ priv = host_to_efi_pci(dev->bus->host);
+
id.segmentno = priv->protocol->segmentno;
id.busno = dev->bus->number;
id.devno = PCI_SLOT(dev->devfn);
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index bb1a5c747e..6b9d54f344 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -264,6 +264,9 @@ static struct phy *rockchip_usb2phy_of_xlate(struct device_d *dev,
int port;
for (port = 0; port < 2; port++) {
+ if (!rphy->phys[port].phy)
+ continue;
+
if (phynode == rphy->phys[port].phy->dev.device_node) {
p = &rphy->phys[port];
return p->phy;
@@ -423,6 +426,7 @@ static int rockchip_usb2phy_probe(struct device_d *dev)
for_each_child_of_node(np, child) {
struct rockchip_usb2phy_phy *p;
struct phy *phy;
+ struct device_d *phydev;
if (!strcmp(child->name, "host-port")) {
port = USB2PHY_PORT_OTG;
@@ -436,7 +440,13 @@ static int rockchip_usb2phy_probe(struct device_d *dev)
if (rphy->phys[port].phy)
return -EINVAL;
- phy = phy_create(dev, child, &rockchip_usb2phy_ops);
+ phydev = of_platform_device_create(child, dev);
+ if (!phydev)
+ continue;
+
+ of_platform_device_dummy_drv(phydev);
+
+ phy = phy_create(phydev, child, &rockchip_usb2phy_ops);
if (IS_ERR(phy)) {
ret = PTR_ERR(phy);
if (ret != -EPROBE_DEFER)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 4f0951bb28..1fdb9a913a 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -334,6 +334,9 @@ static int rockchip_gpio_probe(struct device_d *dev)
int ret, bankno;
bankno = of_alias_get_id(dev->device_node, "gpio");
+ if (bankno < 0)
+ return bankno;
+
bank = &ctrl->pin_banks[bankno];
gpio = &bank->bgpio_chip.gc;
diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
index 574052a5e3..7b0e713710 100644
--- a/drivers/pwm/pwm-atmel.c
+++ b/drivers/pwm/pwm-atmel.c
@@ -11,7 +11,7 @@
#include <common.h>
#include <driver.h>
#include <module.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <stdio.h>
#include <init.h>
#include <pwm.h>
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index a9e25753fe..7eb849cd31 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -564,7 +564,7 @@ int regulator_get_voltage(struct regulator *regulator)
return ret;
}
-EXPORT_SYMBOL_GPL(regulator_get_voltage_rdev);
+EXPORT_SYMBOL_GPL(regulator_get_voltage);
static void regulator_print_one(struct regulator_internal *ri)
{
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
index fc5c50e13c..146cc92eb3 100644
--- a/drivers/reset/reset-socfpga.c
+++ b/drivers/reset/reset-socfpga.c
@@ -84,9 +84,10 @@ static int socfpga_reset_probe(struct device_d *dev)
data = xzalloc(sizeof(*data));
res = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(res))
+ return PTR_ERR(res);
+
data->membase = IOMEM(res->start);
- if (IS_ERR(data->membase))
- return PTR_ERR(data->membase);
if (of_property_read_u32(np, "altr,modrst-offset", &modrst_offset)) {
dev_warn(dev, "missing altr,modrst-offset property, assuming 0x10!\n");
diff --git a/drivers/serial/atmel.c b/drivers/serial/atmel.c
index 77150922f6..f83835da9a 100644
--- a/drivers/serial/atmel.c
+++ b/drivers/serial/atmel.c
@@ -416,6 +416,7 @@ static int atmel_serial_probe(struct device_d *dev)
{
struct atmel_uart_port *uart;
struct console_device *cdev;
+ int ret;
uart = xzalloc(sizeof(struct atmel_uart_port));
cdev = &uart->uart;
@@ -427,7 +428,9 @@ static int atmel_serial_probe(struct device_d *dev)
cdev->set_mode = atmel_serial_set_mode;
cdev->linux_console_name = "ttyAT";
- atmel_serial_init_port(cdev);
+ ret = atmel_serial_init_port(cdev);
+ if (ret)
+ return ret;
/* Enable UART */
diff --git a/drivers/soc/sifive/sifive_l2_cache.c b/drivers/soc/sifive/sifive_l2_cache.c
index a1e9a10622..c1b7fda9c8 100644
--- a/drivers/soc/sifive/sifive_l2_cache.c
+++ b/drivers/soc/sifive/sifive_l2_cache.c
@@ -9,7 +9,7 @@
#define pr_fmt(fmt) "sifive-l2: " fmt
#include <io.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <stdio.h>
#include <driver.h>
#include <init.h>
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index a329e5f4e9..7b0836ee70 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -107,6 +107,13 @@ config SPI_ZYNQ_QSPI
This enables support for the Zynq Quad SPI controller in master mode.
This controller only supports SPI memory interface.
+config DRIVER_SPI_STM32
+ bool "STM32 SPI driver"
+ depends on ARCH_STM32MP || COMPILE_TEST
+ help
+ Enable the STM32 Serial Peripheral Interface (SPI) driver for STM32MP
+ SoCs.
+
endif
endmenu
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index b3add95a9d..4fa4733a70 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_SPI_ATMEL_QUADSPI) += atmel-quadspi.o
obj-$(CONFIG_DRIVER_SPI_OMAP3) += omap3_spi.o
obj-$(CONFIG_DRIVER_SPI_DSPI) += dspi_spi.o
obj-$(CONFIG_SPI_ZYNQ_QSPI) += zynq_qspi.o
+obj-$(CONFIG_DRIVER_SPI_STM32) += stm32_spi.o
diff --git a/drivers/spi/stm32_spi.c b/drivers/spi/stm32_spi.c
new file mode 100644
index 0000000000..0cb04a968c
--- /dev/null
+++ b/drivers/spi/stm32_spi.c
@@ -0,0 +1,590 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2019, STMicroelectronics - All Rights Reserved
+ *
+ * Driver for STMicroelectronics Serial peripheral interface (SPI)
+ */
+
+#include <common.h>
+#include <linux/clk.h>
+#include <driver.h>
+#include <init.h>
+#include <errno.h>
+#include <linux/reset.h>
+#include <spi/spi.h>
+#include <linux/bitops.h>
+#include <clock.h>
+#include <gpio.h>
+#include <of_gpio.h>
+#include <linux/bitfield.h>
+#include <linux/iopoll.h>
+
+/* STM32 SPI registers */
+#define STM32_SPI_CR1 0x00
+#define STM32_SPI_CR2 0x04
+#define STM32_SPI_CFG1 0x08
+#define STM32_SPI_CFG2 0x0C
+#define STM32_SPI_SR 0x14
+#define STM32_SPI_IFCR 0x18
+#define STM32_SPI_TXDR 0x20
+#define STM32_SPI_RXDR 0x30
+#define STM32_SPI_I2SCFGR 0x50
+
+/* STM32_SPI_CR1 bit fields */
+#define SPI_CR1_SPE BIT(0)
+#define SPI_CR1_MASRX BIT(8)
+#define SPI_CR1_CSTART BIT(9)
+#define SPI_CR1_CSUSP BIT(10)
+#define SPI_CR1_HDDIR BIT(11)
+#define SPI_CR1_SSI BIT(12)
+
+/* STM32_SPI_CR2 bit fields */
+#define SPI_CR2_TSIZE GENMASK(15, 0)
+
+/* STM32_SPI_CFG1 bit fields */
+#define SPI_CFG1_DSIZE GENMASK(4, 0)
+#define SPI_CFG1_DSIZE_MIN 3
+#define SPI_CFG1_FTHLV_SHIFT 5
+#define SPI_CFG1_FTHLV GENMASK(8, 5)
+#define SPI_CFG1_MBR_SHIFT 28
+#define SPI_CFG1_MBR GENMASK(30, 28)
+#define SPI_CFG1_MBR_MIN 0
+#define SPI_CFG1_MBR_MAX FIELD_GET(SPI_CFG1_MBR, SPI_CFG1_MBR)
+
+/* STM32_SPI_CFG2 bit fields */
+#define SPI_CFG2_COMM_SHIFT 17
+#define SPI_CFG2_COMM GENMASK(18, 17)
+#define SPI_CFG2_MASTER BIT(22)
+#define SPI_CFG2_LSBFRST BIT(23)
+#define SPI_CFG2_CPHA BIT(24)
+#define SPI_CFG2_CPOL BIT(25)
+#define SPI_CFG2_SSM BIT(26)
+#define SPI_CFG2_AFCNTR BIT(31)
+
+/* STM32_SPI_SR bit fields */
+#define SPI_SR_RXP BIT(0)
+#define SPI_SR_TXP BIT(1)
+#define SPI_SR_EOT BIT(3)
+#define SPI_SR_TXTF BIT(4)
+#define SPI_SR_OVR BIT(6)
+#define SPI_SR_SUSP BIT(11)
+#define SPI_SR_RXPLVL_SHIFT 13
+#define SPI_SR_RXPLVL GENMASK(14, 13)
+#define SPI_SR_RXWNE BIT(15)
+
+/* STM32_SPI_IFCR bit fields */
+#define SPI_IFCR_ALL GENMASK(11, 3)
+
+/* STM32_SPI_I2SCFGR bit fields */
+#define SPI_I2SCFGR_I2SMOD BIT(0)
+
+/* SPI Master Baud Rate min/max divisor */
+#define STM32_MBR_DIV_MIN (2 << SPI_CFG1_MBR_MIN)
+#define STM32_MBR_DIV_MAX (2 << SPI_CFG1_MBR_MAX)
+
+/* SPI Communication mode */
+#define SPI_FULL_DUPLEX 0
+#define SPI_SIMPLEX_TX 1
+#define SPI_SIMPLEX_RX 2
+#define SPI_HALF_DUPLEX 3
+
+struct stm32_spi_priv {
+ struct spi_master master;
+ int *cs_gpios;
+ void __iomem *base;
+ struct clk *clk;
+ ulong bus_clk_rate;
+ unsigned int fifo_size;
+ unsigned int cur_bpw;
+ unsigned int cur_hz;
+ unsigned int cur_xferlen; /* current transfer length in bytes */
+ unsigned int tx_len; /* number of data to be written in bytes */
+ unsigned int rx_len; /* number of data to be read in bytes */
+ const void *tx_buf; /* data to be written, or NULL */
+ void *rx_buf; /* data to be read, or NULL */
+ u32 cur_mode;
+};
+
+static inline struct stm32_spi_priv *to_stm32_spi_priv(struct spi_master *master)
+{
+ return container_of(master, struct stm32_spi_priv, master);
+}
+
+static void stm32_spi_write_txfifo(struct stm32_spi_priv *priv)
+{
+ while ((priv->tx_len > 0) &&
+ (readl(priv->base + STM32_SPI_SR) & SPI_SR_TXP)) {
+ u32 offs = priv->cur_xferlen - priv->tx_len;
+
+ if (priv->tx_len >= sizeof(u32) &&
+ IS_ALIGNED((uintptr_t)(priv->tx_buf + offs), sizeof(u32))) {
+ const u32 *tx_buf32 = (const u32 *)(priv->tx_buf + offs);
+
+ writel(*tx_buf32, priv->base + STM32_SPI_TXDR);
+ priv->tx_len -= sizeof(u32);
+ } else if (priv->tx_len >= sizeof(u16) &&
+ IS_ALIGNED((uintptr_t)(priv->tx_buf + offs), sizeof(u16))) {
+ const u16 *tx_buf16 = (const u16 *)(priv->tx_buf + offs);
+
+ writew(*tx_buf16, priv->base + STM32_SPI_TXDR);
+ priv->tx_len -= sizeof(u16);
+ } else {
+ const u8 *tx_buf8 = (const u8 *)(priv->tx_buf + offs);
+
+ writeb(*tx_buf8, priv->base + STM32_SPI_TXDR);
+ priv->tx_len -= sizeof(u8);
+ }
+ }
+
+ dev_dbg(priv->master.dev, "%d bytes left\n", priv->tx_len);
+}
+
+static void stm32_spi_read_rxfifo(struct stm32_spi_priv *priv)
+{
+ u32 sr = readl(priv->base + STM32_SPI_SR);
+ u32 rxplvl = (sr & SPI_SR_RXPLVL) >> SPI_SR_RXPLVL_SHIFT;
+
+ while ((priv->rx_len > 0) &&
+ ((sr & SPI_SR_RXP) ||
+ ((sr & SPI_SR_EOT) && ((sr & SPI_SR_RXWNE) || (rxplvl > 0))))) {
+ u32 offs = priv->cur_xferlen - priv->rx_len;
+
+ if (IS_ALIGNED((uintptr_t)(priv->rx_buf + offs), sizeof(u32)) &&
+ (priv->rx_len >= sizeof(u32) || (sr & SPI_SR_RXWNE))) {
+ u32 *rx_buf32 = (u32 *)(priv->rx_buf + offs);
+
+ *rx_buf32 = readl(priv->base + STM32_SPI_RXDR);
+ priv->rx_len -= sizeof(u32);
+ } else if (IS_ALIGNED((uintptr_t)(priv->rx_buf + offs), sizeof(u16)) &&
+ (priv->rx_len >= sizeof(u16) ||
+ (!(sr & SPI_SR_RXWNE) &&
+ (rxplvl >= 2 || priv->cur_bpw > 8)))) {
+ u16 *rx_buf16 = (u16 *)(priv->rx_buf + offs);
+
+ *rx_buf16 = readw(priv->base + STM32_SPI_RXDR);
+ priv->rx_len -= sizeof(u16);
+ } else {
+ u8 *rx_buf8 = (u8 *)(priv->rx_buf + offs);
+
+ *rx_buf8 = readb(priv->base + STM32_SPI_RXDR);
+ priv->rx_len -= sizeof(u8);
+ }
+
+ sr = readl(priv->base + STM32_SPI_SR);
+ rxplvl = (sr & SPI_SR_RXPLVL) >> SPI_SR_RXPLVL_SHIFT;
+ }
+
+ dev_dbg(priv->master.dev, "%d bytes left\n", priv->rx_len);
+}
+
+static void stm32_spi_enable(struct stm32_spi_priv *priv)
+{
+ setbits_le32(priv->base + STM32_SPI_CR1, SPI_CR1_SPE);
+}
+
+static void stm32_spi_disable(struct stm32_spi_priv *priv)
+{
+ clrbits_le32(priv->base + STM32_SPI_CR1, SPI_CR1_SPE);
+}
+
+static void stm32_spi_stopxfer(struct stm32_spi_priv *priv)
+{
+ struct device_d *dev = priv->master.dev;
+ u32 cr1, sr;
+ int ret;
+
+ dev_dbg(dev, "%s\n", __func__);
+
+ cr1 = readl(priv->base + STM32_SPI_CR1);
+
+ if (!(cr1 & SPI_CR1_SPE))
+ return;
+
+ /* Wait on EOT or suspend the flow */
+ ret = readl_poll_timeout(priv->base + STM32_SPI_SR, sr,
+ !(sr & SPI_SR_EOT), USEC_PER_SEC);
+ if (ret < 0) {
+ if (cr1 & SPI_CR1_CSTART) {
+ writel(cr1 | SPI_CR1_CSUSP, priv->base + STM32_SPI_CR1);
+ if (readl_poll_timeout(priv->base + STM32_SPI_SR,
+ sr, !(sr & SPI_SR_SUSP),
+ 100000) < 0)
+ dev_err(dev, "Suspend request timeout\n");
+ }
+ }
+
+ /* clear status flags */
+ setbits_le32(priv->base + STM32_SPI_IFCR, SPI_IFCR_ALL);
+}
+
+static void stm32_spi_set_cs(struct spi_device *spi, bool en)
+{
+ struct stm32_spi_priv *priv = to_stm32_spi_priv(spi->master);
+ int gpio = priv->cs_gpios[spi->chip_select];
+ int ret = -EINVAL;
+
+ dev_dbg(priv->master.dev, "cs=%d en=%d\n", gpio, en);
+
+ if (gpio_is_valid(gpio))
+ ret = gpio_direction_output(gpio, (spi->mode & SPI_CS_HIGH) ? en : !en);
+
+ if (ret)
+ dev_warn(priv->master.dev, "couldn't toggle cs#%u\n", spi->chip_select);
+}
+
+static void stm32_spi_set_mode(struct stm32_spi_priv *priv, unsigned mode)
+{
+ u32 cfg2_clrb = 0, cfg2_setb = 0;
+
+ dev_dbg(priv->master.dev, "mode=%d\n", mode);
+
+ if (mode & SPI_CPOL)
+ cfg2_setb |= SPI_CFG2_CPOL;
+ else
+ cfg2_clrb |= SPI_CFG2_CPOL;
+
+ if (mode & SPI_CPHA)
+ cfg2_setb |= SPI_CFG2_CPHA;
+ else
+ cfg2_clrb |= SPI_CFG2_CPHA;
+
+ if (mode & SPI_LSB_FIRST)
+ cfg2_setb |= SPI_CFG2_LSBFRST;
+ else
+ cfg2_clrb |= SPI_CFG2_LSBFRST;
+
+ if (cfg2_clrb || cfg2_setb)
+ clrsetbits_le32(priv->base + STM32_SPI_CFG2,
+ cfg2_clrb, cfg2_setb);
+}
+
+static void stm32_spi_set_fthlv(struct stm32_spi_priv *priv, u32 xfer_len)
+{
+ u32 fthlv, half_fifo;
+
+ /* data packet should not exceed 1/2 of fifo space */
+ half_fifo = (priv->fifo_size / 2);
+
+ /* data_packet should not exceed transfer length */
+ fthlv = (half_fifo > xfer_len) ? xfer_len : half_fifo;
+
+ /* align packet size with data registers access */
+ fthlv -= (fthlv % 4);
+
+ if (!fthlv)
+ fthlv = 1;
+ clrsetbits_le32(priv->base + STM32_SPI_CFG1, SPI_CFG1_FTHLV,
+ (fthlv - 1) << SPI_CFG1_FTHLV_SHIFT);
+}
+
+static int stm32_spi_set_speed(struct stm32_spi_priv *priv, uint hz)
+{
+ u32 mbrdiv;
+ long div;
+
+ dev_dbg(priv->master.dev, "hz=%d\n", hz);
+
+ if (priv->cur_hz == hz)
+ return 0;
+
+ div = DIV_ROUND_UP(priv->bus_clk_rate, hz);
+
+ if (div < STM32_MBR_DIV_MIN || div > STM32_MBR_DIV_MAX)
+ return -EINVAL;
+
+ /* Determine the first power of 2 greater than or equal to div */
+ if (div & (div - 1))
+ mbrdiv = fls(div);
+ else
+ mbrdiv = fls(div) - 1;
+
+ if (!mbrdiv)
+ return -EINVAL;
+
+ clrsetbits_le32(priv->base + STM32_SPI_CFG1, SPI_CFG1_MBR,
+ (mbrdiv - 1) << SPI_CFG1_MBR_SHIFT);
+
+ priv->cur_hz = hz;
+
+ return 0;
+}
+
+static int stm32_spi_setup(struct spi_device *spi)
+{
+ struct stm32_spi_priv *priv = to_stm32_spi_priv(spi->master);
+ int ret;
+
+ stm32_spi_set_cs(spi, false);
+ stm32_spi_enable(priv);
+
+ stm32_spi_set_mode(priv, spi->mode);
+
+ ret = stm32_spi_set_speed(priv, spi->max_speed_hz);
+ if (ret)
+ goto out;
+
+ priv->cur_bpw = spi->bits_per_word;
+ clrsetbits_le32(priv->base + STM32_SPI_CFG1, SPI_CFG1_DSIZE,
+ priv->cur_bpw - 1);
+
+ dev_dbg(priv->master.dev, "%s mode 0x%08x bits_per_word: %d speed: %d\n",
+ __func__, spi->mode, spi->bits_per_word,
+ spi->max_speed_hz);
+out:
+ stm32_spi_disable(priv);
+ return ret;
+}
+
+static int stm32_spi_transfer_one(struct stm32_spi_priv *priv,
+ struct spi_transfer *t)
+{
+ struct device_d *dev = priv->master.dev;
+ u32 sr;
+ u32 ifcr = 0;
+ u32 mode;
+ int xfer_status = 0;
+
+ if (t->len <= SPI_CR2_TSIZE)
+ writel(t->len, priv->base + STM32_SPI_CR2);
+ else
+ return -EMSGSIZE;
+
+ priv->tx_buf = t->tx_buf;
+ priv->rx_buf = t->rx_buf;
+ priv->tx_len = priv->tx_buf ? t->len : 0;
+ priv->rx_len = priv->rx_buf ? t->len : 0;
+
+ mode = SPI_FULL_DUPLEX;
+ if (!priv->tx_buf)
+ mode = SPI_SIMPLEX_RX;
+ else if (!priv->rx_buf)
+ mode = SPI_SIMPLEX_TX;
+
+ if (priv->cur_xferlen != t->len || priv->cur_mode != mode) {
+ priv->cur_mode = mode;
+ priv->cur_xferlen = t->len;
+
+ /* Disable the SPI hardware to unlock CFG1/CFG2 registers */
+ stm32_spi_disable(priv);
+
+ clrsetbits_le32(priv->base + STM32_SPI_CFG2, SPI_CFG2_COMM,
+ mode << SPI_CFG2_COMM_SHIFT);
+
+ stm32_spi_set_fthlv(priv, t->len);
+
+ /* Enable the SPI hardware */
+ stm32_spi_enable(priv);
+ }
+
+ dev_dbg(dev, "priv->tx_len=%d priv->rx_len=%d\n",
+ priv->tx_len, priv->rx_len);
+
+ /* Be sure to have data in fifo before starting data transfer */
+ if (priv->tx_buf)
+ stm32_spi_write_txfifo(priv);
+
+ setbits_le32(priv->base + STM32_SPI_CR1, SPI_CR1_CSTART);
+
+ while (1) {
+ sr = readl(priv->base + STM32_SPI_SR);
+
+ if (sr & SPI_SR_OVR) {
+ dev_err(dev, "Overrun: RX data lost\n");
+ xfer_status = -EIO;
+ break;
+ }
+
+ if (sr & SPI_SR_SUSP) {
+ dev_warn(dev, "System too slow is limiting data throughput\n");
+
+ if (priv->rx_buf && priv->rx_len > 0)
+ stm32_spi_read_rxfifo(priv);
+
+ ifcr |= SPI_SR_SUSP;
+ }
+
+ if (sr & SPI_SR_TXTF)
+ ifcr |= SPI_SR_TXTF;
+
+ if (sr & SPI_SR_TXP)
+ if (priv->tx_buf && priv->tx_len > 0)
+ stm32_spi_write_txfifo(priv);
+
+ if (sr & SPI_SR_RXP)
+ if (priv->rx_buf && priv->rx_len > 0)
+ stm32_spi_read_rxfifo(priv);
+
+ if (sr & SPI_SR_EOT) {
+ if (priv->rx_buf && priv->rx_len > 0)
+ stm32_spi_read_rxfifo(priv);
+ break;
+ }
+
+ writel(ifcr, priv->base + STM32_SPI_IFCR);
+ }
+
+ /* clear status flags */
+ setbits_le32(priv->base + STM32_SPI_IFCR, SPI_IFCR_ALL);
+ stm32_spi_stopxfer(priv);
+
+ return xfer_status;
+}
+
+static int stm32_spi_transfer(struct spi_device *spi, struct spi_message *mesg)
+{
+ struct stm32_spi_priv *priv = to_stm32_spi_priv(spi->master);
+ struct spi_transfer *t;
+ unsigned int cs_change;
+ const int nsecs = 50;
+ int ret = 0;
+
+ stm32_spi_enable(priv);
+
+ stm32_spi_set_cs(spi, true);
+
+ cs_change = 0;
+
+ mesg->actual_length = 0;
+
+ list_for_each_entry(t, &mesg->transfers, transfer_list) {
+ if (cs_change) {
+ ndelay(nsecs);
+ stm32_spi_set_cs(spi, false);
+ ndelay(nsecs);
+ stm32_spi_set_cs(spi, true);
+ }
+
+ cs_change = t->cs_change;
+
+ ret = stm32_spi_transfer_one(priv, t);
+ if (ret)
+ goto out;
+
+ mesg->actual_length += t->len;
+
+ if (cs_change)
+ stm32_spi_set_cs(spi, true);
+ }
+
+ if (!cs_change)
+ stm32_spi_set_cs(spi, false);
+
+out:
+ stm32_spi_disable(priv);
+ return ret;
+}
+
+static int stm32_spi_get_fifo_size(struct stm32_spi_priv *priv)
+{
+ u32 count = 0;
+
+ stm32_spi_enable(priv);
+
+ while (readl(priv->base + STM32_SPI_SR) & SPI_SR_TXP)
+ writeb(++count, priv->base + STM32_SPI_TXDR);
+
+ stm32_spi_disable(priv);
+
+ dev_dbg(priv->master.dev, "%d x 8-bit fifo size\n", count);
+
+ return count;
+}
+
+static void stm32_spi_dt_probe(struct stm32_spi_priv *priv)
+{
+ struct device_node *node = priv->master.dev->device_node;
+ int i;
+
+ priv->master.num_chipselect = of_gpio_named_count(node, "cs-gpios");
+ priv->cs_gpios = xzalloc(sizeof(u32) * priv->master.num_chipselect);
+
+ for (i = 0; i < priv->master.num_chipselect; i++)
+ priv->cs_gpios[i] = of_get_named_gpio(node, "cs-gpios", i);
+}
+
+static int stm32_spi_probe(struct device_d *dev)
+{
+ struct resource *iores;
+ struct spi_master *master;
+ struct stm32_spi_priv *priv;
+ int ret;
+
+ iores = dev_request_mem_resource(dev, 0);
+ if (IS_ERR(iores))
+ return PTR_ERR(iores);
+
+ priv = dev->priv = xzalloc(sizeof(*priv));
+
+ priv->base = IOMEM(iores->start);
+
+ master = &priv->master;
+ master->dev = dev;
+
+ master->setup = stm32_spi_setup;
+ master->transfer = stm32_spi_transfer;
+
+ master->bus_num = -1;
+ stm32_spi_dt_probe(priv);
+
+ priv->clk = clk_get(dev, NULL);
+ if (IS_ERR(priv->clk))
+ return PTR_ERR(priv->clk);
+
+ ret = clk_enable(priv->clk);
+ if (ret)
+ return ret;
+
+ priv->bus_clk_rate = clk_get_rate(priv->clk);
+
+ ret = device_reset_us(dev, 2);
+ if (ret)
+ return ret;
+
+ priv->fifo_size = stm32_spi_get_fifo_size(priv);
+
+ priv->cur_mode = SPI_FULL_DUPLEX;
+ priv->cur_xferlen = 0;
+
+ /* Ensure I2SMOD bit is kept cleared */
+ clrbits_le32(priv->base + STM32_SPI_I2SCFGR, SPI_I2SCFGR_I2SMOD);
+
+ /*
+ * - SS input value high
+ * - transmitter half duplex direction
+ * - automatic communication suspend when RX-Fifo is full
+ */
+ setbits_le32(priv->base + STM32_SPI_CR1,
+ SPI_CR1_SSI | SPI_CR1_HDDIR | SPI_CR1_MASRX);
+
+ /*
+ * - Set the master mode (default Motorola mode)
+ * - Consider 1 master/n slaves configuration and
+ * SS input value is determined by the SSI bit
+ * - keep control of all associated GPIOs
+ */
+ setbits_le32(priv->base + STM32_SPI_CFG2,
+ SPI_CFG2_MASTER | SPI_CFG2_SSM | SPI_CFG2_AFCNTR);
+
+ return spi_register_master(master);
+}
+
+static void stm32_spi_remove(struct device_d *dev)
+{
+ struct stm32_spi_priv *priv = dev->priv;
+
+ stm32_spi_stopxfer(priv);
+ stm32_spi_disable(priv);
+};
+
+static const struct of_device_id stm32_spi_ids[] = {
+ { .compatible = "st,stm32h7-spi", },
+ { /* sentinel */ }
+};
+
+static struct driver_d stm32_spi_driver = {
+ .name = "stm32_spi",
+ .probe = stm32_spi_probe,
+ .remove = stm32_spi_remove,
+ .of_compatible = stm32_spi_ids,
+};
+coredevice_platform_driver(stm32_spi_driver);
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index d01e4a8e6c..bd3418a3fb 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -559,13 +559,13 @@ static int zynq_qspi_probe(struct device_d *dev)
xqspi->regs = IOMEM(iores->start);
xqspi->pclk = clk_get(dev, "pclk");
- if (IS_ERR_OR_NULL(xqspi->pclk)) {
+ if (IS_ERR(xqspi->pclk)) {
dev_err(dev, "pclk clock not found.\n");
return PTR_ERR(xqspi->pclk);
}
xqspi->refclk = clk_get(dev, "ref_clk");
- if (IS_ERR_OR_NULL(xqspi->refclk)) {
+ if (IS_ERR(xqspi->refclk)) {
dev_err(dev, "ref_clk clock not found.\n");
return PTR_ERR(xqspi->refclk);
}
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 04b700d12d..fb3cae4de9 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -14,6 +14,7 @@
#include <dma.h>
#include <driver.h>
#include <init.h>
+#include <linux/reset.h>
#include "gadget.h"
#include "core.h"
@@ -1114,8 +1115,6 @@ static int dwc3_probe(struct device_d *dev)
if (of_find_property(dev->device_node, "clocks", NULL)) {
ret = clk_bulk_get(dev, dwc->num_clks, dwc->clks);
- if (ret == -EPROBE_DEFER)
- return ret;
if (ret)
return ret;
}
@@ -1125,6 +1124,16 @@ static int dwc3_probe(struct device_d *dev)
if (ret)
return ret;
+ dwc->reset = reset_control_get(dev, NULL);
+ if (IS_ERR(dwc->reset)) {
+ dev_err(dev, "Failed to get reset control: %pe\n", dwc->reset);
+ return PTR_ERR(dwc->reset);
+ }
+
+ reset_control_assert(dwc->reset);
+ mdelay(1);
+ reset_control_deassert(dwc->reset);
+
dwc3_coresoft_reset(dwc);
dwc3_cache_hwparams(dwc);
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index f2f7a311d1..94cc594920 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -1003,6 +1003,8 @@ struct dwc3 {
struct clk_bulk_data *clks;
int num_clks;
+ struct reset_control *reset;
+
struct phy *usb2_generic_phy;
struct phy *usb3_generic_phy;
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
index 925c2f809d..b2cf0f8ddd 100644
--- a/drivers/watchdog/f71808e_wdt.c
+++ b/drivers/watchdog/f71808e_wdt.c
@@ -13,7 +13,7 @@
#include <asm/io.h>
#include <driver.h>
#include <watchdog.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <reset_source.h>
#include <superio.h>
#include <common.h>
diff --git a/dts/Bindings/display/bridge/ti,sn65dsi83.yaml b/dts/Bindings/display/bridge/ti,sn65dsi83.yaml
index 07b20383cb..b446d0f0f1 100644
--- a/dts/Bindings/display/bridge/ti,sn65dsi83.yaml
+++ b/dts/Bindings/display/bridge/ti,sn65dsi83.yaml
@@ -50,7 +50,6 @@ properties:
data-lanes:
description: array of physical DSI data lane indexes.
minItems: 1
- maxItems: 4
items:
- const: 1
- const: 2
@@ -71,7 +70,6 @@ properties:
data-lanes:
description: array of physical DSI data lane indexes.
minItems: 1
- maxItems: 4
items:
- const: 1
- const: 2
diff --git a/dts/Bindings/display/bridge/ti,sn65dsi86.yaml b/dts/Bindings/display/bridge/ti,sn65dsi86.yaml
index 1c2daf7c24..911564468c 100644
--- a/dts/Bindings/display/bridge/ti,sn65dsi86.yaml
+++ b/dts/Bindings/display/bridge/ti,sn65dsi86.yaml
@@ -18,7 +18,7 @@ properties:
const: ti,sn65dsi86
reg:
- const: 0x2d
+ enum: [ 0x2c, 0x2d ]
enable-gpios:
maxItems: 1
diff --git a/dts/Bindings/display/panel/ilitek,ili9341.yaml b/dts/Bindings/display/panel/ilitek,ili9341.yaml
index 2ed010f91e..20ce88ab4b 100644
--- a/dts/Bindings/display/panel/ilitek,ili9341.yaml
+++ b/dts/Bindings/display/panel/ilitek,ili9341.yaml
@@ -22,7 +22,7 @@ properties:
items:
- enum:
# ili9341 240*320 Color on stm32f429-disco board
- - st,sf-tc240t-9370-t
+ - st,sf-tc240t-9370-t
- const: ilitek,ili9341
reg: true
diff --git a/dts/Bindings/media/i2c/ovti,ov5647.yaml b/dts/Bindings/media/i2c/ovti,ov5647.yaml
index 3e5d82df90..a2abed06a0 100644
--- a/dts/Bindings/media/i2c/ovti,ov5647.yaml
+++ b/dts/Bindings/media/i2c/ovti,ov5647.yaml
@@ -31,7 +31,7 @@ properties:
maxItems: 1
port:
- $ref: /schemas/graph.yaml#/properties/port
+ $ref: /schemas/graph.yaml#/$defs/port-base
additionalProperties: false
properties:
diff --git a/dts/Bindings/media/i2c/ovti,ov9282.yaml b/dts/Bindings/media/i2c/ovti,ov9282.yaml
index ad42992c6d..bf115ab9d9 100644
--- a/dts/Bindings/media/i2c/ovti,ov9282.yaml
+++ b/dts/Bindings/media/i2c/ovti,ov9282.yaml
@@ -38,7 +38,7 @@ properties:
port:
additionalProperties: false
- $ref: /schemas/graph.yaml#/properties/port
+ $ref: /schemas/graph.yaml#/$defs/port-base
properties:
endpoint:
diff --git a/dts/Bindings/media/i2c/sony,imx335.yaml b/dts/Bindings/media/i2c/sony,imx335.yaml
index 881f795325..cf2ca2702c 100644
--- a/dts/Bindings/media/i2c/sony,imx335.yaml
+++ b/dts/Bindings/media/i2c/sony,imx335.yaml
@@ -38,7 +38,7 @@ properties:
port:
additionalProperties: false
- $ref: /schemas/graph.yaml#/properties/port
+ $ref: /schemas/graph.yaml#/$defs/port-base
properties:
endpoint:
diff --git a/dts/Bindings/media/i2c/sony,imx412.yaml b/dts/Bindings/media/i2c/sony,imx412.yaml
index 1edeabf39e..afcf70947f 100644
--- a/dts/Bindings/media/i2c/sony,imx412.yaml
+++ b/dts/Bindings/media/i2c/sony,imx412.yaml
@@ -38,7 +38,7 @@ properties:
port:
additionalProperties: false
- $ref: /schemas/graph.yaml#/properties/port
+ $ref: /schemas/graph.yaml#/$defs/port-base
properties:
endpoint:
diff --git a/dts/Bindings/mfd/brcm,cru.yaml b/dts/Bindings/mfd/brcm,cru.yaml
index fc1317ab32..28ac60acf4 100644
--- a/dts/Bindings/mfd/brcm,cru.yaml
+++ b/dts/Bindings/mfd/brcm,cru.yaml
@@ -32,13 +32,13 @@ properties:
"#size-cells":
const: 1
- pinctrl:
- $ref: ../pinctrl/brcm,ns-pinmux.yaml
-
patternProperties:
'^clock-controller@[a-f0-9]+$':
$ref: ../clock/brcm,iproc-clocks.yaml
+ '^pin-controller@[a-f0-9]+$':
+ $ref: ../pinctrl/brcm,ns-pinmux.yaml
+
'^thermal@[a-f0-9]+$':
$ref: ../thermal/brcm,ns-thermal.yaml
@@ -73,9 +73,10 @@ examples:
"iprocfast", "sata1", "sata2";
};
- pinctrl {
+ pin-controller@1c0 {
compatible = "brcm,bcm4708-pinmux";
- offset = <0x1c0>;
+ reg = <0x1c0 0x24>;
+ reg-names = "cru_gpio_control";
};
thermal@2c0 {
diff --git a/dts/Bindings/mmc/snps,dwcmshc-sdhci.yaml b/dts/Bindings/mmc/snps,dwcmshc-sdhci.yaml
index e6c9a2f77c..f300ced4cd 100644
--- a/dts/Bindings/mmc/snps,dwcmshc-sdhci.yaml
+++ b/dts/Bindings/mmc/snps,dwcmshc-sdhci.yaml
@@ -20,9 +20,7 @@ properties:
- snps,dwcmshc-sdhci
reg:
- minItems: 1
- items:
- - description: Offset and length of the register set for the device
+ maxItems: 1
interrupts:
maxItems: 1
diff --git a/dts/Bindings/net/dsa/marvell.txt b/dts/Bindings/net/dsa/marvell.txt
index 30c11fea49..2363b41241 100644
--- a/dts/Bindings/net/dsa/marvell.txt
+++ b/dts/Bindings/net/dsa/marvell.txt
@@ -83,7 +83,7 @@ Example:
#interrupt-cells = <2>;
switch0: switch@0 {
- compatible = "marvell,mv88e6390";
+ compatible = "marvell,mv88e6190";
reg = <0>;
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
diff --git a/dts/Bindings/net/nxp,dwmac-imx.yaml b/dts/Bindings/net/nxp,dwmac-imx.yaml
index 5629b2e4cc..ee4afe361f 100644
--- a/dts/Bindings/net/nxp,dwmac-imx.yaml
+++ b/dts/Bindings/net/nxp,dwmac-imx.yaml
@@ -34,7 +34,6 @@ properties:
clocks:
minItems: 3
- maxItems: 5
items:
- description: MAC host clock
- description: MAC apb clock
diff --git a/dts/Bindings/net/snps,dwmac.yaml b/dts/Bindings/net/snps,dwmac.yaml
index 42689b7d03..c115c95ee5 100644
--- a/dts/Bindings/net/snps,dwmac.yaml
+++ b/dts/Bindings/net/snps,dwmac.yaml
@@ -21,6 +21,7 @@ select:
contains:
enum:
- snps,dwmac
+ - snps,dwmac-3.40a
- snps,dwmac-3.50a
- snps,dwmac-3.610
- snps,dwmac-3.70a
@@ -76,6 +77,7 @@ properties:
- rockchip,rk3399-gmac
- rockchip,rv1108-gmac
- snps,dwmac
+ - snps,dwmac-3.40a
- snps,dwmac-3.50a
- snps,dwmac-3.610
- snps,dwmac-3.70a
diff --git a/dts/Bindings/pci/fsl,imx6q-pcie.yaml b/dts/Bindings/pci/fsl,imx6q-pcie.yaml
index 2911e565b2..acea1cd444 100644
--- a/dts/Bindings/pci/fsl,imx6q-pcie.yaml
+++ b/dts/Bindings/pci/fsl,imx6q-pcie.yaml
@@ -41,7 +41,6 @@ properties:
- description: builtin MSI controller.
interrupt-names:
- minItems: 1
items:
- const: msi
diff --git a/dts/Bindings/pinctrl/brcm,ns-pinmux.yaml b/dts/Bindings/pinctrl/brcm,ns-pinmux.yaml
index 470aff599c..fc39e3e9f7 100644
--- a/dts/Bindings/pinctrl/brcm,ns-pinmux.yaml
+++ b/dts/Bindings/pinctrl/brcm,ns-pinmux.yaml
@@ -17,9 +17,6 @@ description:
A list of pins varies across chipsets so few bindings are available.
- Node of the pinmux must be nested in the CRU (Central Resource Unit) "syscon"
- node.
-
properties:
compatible:
enum:
@@ -27,10 +24,11 @@ properties:
- brcm,bcm4709-pinmux
- brcm,bcm53012-pinmux
- offset:
- description: offset of pin registers in the CRU block
+ reg:
maxItems: 1
- $ref: /schemas/types.yaml#/definitions/uint32-array
+
+ reg-names:
+ const: cru_gpio_control
patternProperties:
'-pins$':
@@ -72,23 +70,20 @@ allOf:
uart1_grp ]
required:
- - offset
+ - reg
+ - reg-names
additionalProperties: false
examples:
- |
- cru@1800c100 {
- compatible = "syscon", "simple-mfd";
- reg = <0x1800c100 0x1a4>;
-
- pinctrl {
- compatible = "brcm,bcm4708-pinmux";
- offset = <0xc0>;
-
- spi-pins {
- function = "spi";
- groups = "spi_grp";
- };
+ pin-controller@1800c1c0 {
+ compatible = "brcm,bcm4708-pinmux";
+ reg = <0x1800c1c0 0x24>;
+ reg-names = "cru_gpio_control";
+
+ spi-pins {
+ function = "spi";
+ groups = "spi_grp";
};
};
diff --git a/dts/Bindings/spi/snps,dw-apb-ssi.yaml b/dts/Bindings/spi/snps,dw-apb-ssi.yaml
index ca91201a99..d7e08b03e2 100644
--- a/dts/Bindings/spi/snps,dw-apb-ssi.yaml
+++ b/dts/Bindings/spi/snps,dw-apb-ssi.yaml
@@ -171,7 +171,7 @@ examples:
cs-gpios = <&gpio0 13 0>,
<&gpio0 14 0>;
rx-sample-delay-ns = <3>;
- spi-flash@1 {
+ flash@1 {
compatible = "spi-nand";
reg = <1>;
rx-sample-delay-ns = <7>;
diff --git a/dts/src/arm/at91-sama5d27_som1_ek.dts b/dts/src/arm/at91-sama5d27_som1_ek.dts
index 614999dcb9..cd4672501a 100644
--- a/dts/src/arm/at91-sama5d27_som1_ek.dts
+++ b/dts/src/arm/at91-sama5d27_som1_ek.dts
@@ -71,7 +71,6 @@
isc: isc@f0008000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_isc_base &pinctrl_isc_data_8bit &pinctrl_isc_data_9_10 &pinctrl_isc_data_11_12>;
- status = "okay";
};
qspi1: spi@f0024000 {
diff --git a/dts/src/arm/at91-sama7g5ek.dts b/dts/src/arm/at91-sama7g5ek.dts
index 4cbed98cc2..f3d6aaa3a7 100644
--- a/dts/src/arm/at91-sama7g5ek.dts
+++ b/dts/src/arm/at91-sama7g5ek.dts
@@ -196,11 +196,13 @@
regulator-state-standby {
regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1350000>;
regulator-mode = <4>;
};
regulator-state-mem {
regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1350000>;
regulator-mode = <4>;
};
};
@@ -353,7 +355,10 @@
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txck_default &pinctrl_gmac0_phy_irq>;
+ pinctrl-0 = <&pinctrl_gmac0_default
+ &pinctrl_gmac0_mdio_default
+ &pinctrl_gmac0_txck_default
+ &pinctrl_gmac0_phy_irq>;
phy-mode = "rgmii-id";
status = "okay";
@@ -368,7 +373,9 @@
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gmac1_default &pinctrl_gmac1_phy_irq>;
+ pinctrl-0 = <&pinctrl_gmac1_default
+ &pinctrl_gmac1_mdio_default
+ &pinctrl_gmac1_phy_irq>;
phy-mode = "rmii";
status = "okay";
@@ -423,14 +430,20 @@
<PIN_PA15__G0_TXEN>,
<PIN_PA30__G0_RXCK>,
<PIN_PA18__G0_RXDV>,
- <PIN_PA22__G0_MDC>,
- <PIN_PA23__G0_MDIO>,
<PIN_PA25__G0_125CK>;
+ slew-rate = <0>;
+ bias-disable;
+ };
+
+ pinctrl_gmac0_mdio_default: gmac0_mdio_default {
+ pinmux = <PIN_PA22__G0_MDC>,
+ <PIN_PA23__G0_MDIO>;
bias-disable;
};
pinctrl_gmac0_txck_default: gmac0_txck_default {
pinmux = <PIN_PA24__G0_TXCK>;
+ slew-rate = <0>;
bias-pull-up;
};
@@ -447,8 +460,13 @@
<PIN_PD25__G1_RX0>,
<PIN_PD26__G1_RX1>,
<PIN_PD27__G1_RXER>,
- <PIN_PD24__G1_RXDV>,
- <PIN_PD28__G1_MDC>,
+ <PIN_PD24__G1_RXDV>;
+ slew-rate = <0>;
+ bias-disable;
+ };
+
+ pinctrl_gmac1_mdio_default: gmac1_mdio_default {
+ pinmux = <PIN_PD28__G1_MDC>,
<PIN_PD29__G1_MDIO>;
bias-disable;
};
@@ -540,6 +558,7 @@
<PIN_PA8__SDMMC0_DAT5>,
<PIN_PA9__SDMMC0_DAT6>,
<PIN_PA10__SDMMC0_DAT7>;
+ slew-rate = <0>;
bias-pull-up;
};
@@ -547,6 +566,7 @@
pinmux = <PIN_PA0__SDMMC0_CK>,
<PIN_PA2__SDMMC0_RSTN>,
<PIN_PA11__SDMMC0_DS>;
+ slew-rate = <0>;
bias-pull-up;
};
};
@@ -558,6 +578,7 @@
<PIN_PC0__SDMMC1_DAT1>,
<PIN_PC1__SDMMC1_DAT2>,
<PIN_PC2__SDMMC1_DAT3>;
+ slew-rate = <0>;
bias-pull-up;
};
@@ -566,6 +587,7 @@
<PIN_PB28__SDMMC1_RSTN>,
<PIN_PC5__SDMMC1_1V8SEL>,
<PIN_PC4__SDMMC1_CD>;
+ slew-rate = <0>;
bias-pull-up;
};
};
@@ -577,11 +599,13 @@
<PIN_PD6__SDMMC2_DAT1>,
<PIN_PD7__SDMMC2_DAT2>,
<PIN_PD8__SDMMC2_DAT3>;
+ slew-rate = <0>;
bias-pull-up;
};
ck {
pinmux = <PIN_PD4__SDMMC2_CK>;
+ slew-rate = <0>;
bias-pull-up;
};
};
@@ -634,6 +658,15 @@
pinctrl-0 = <&pinctrl_sdmmc2_default>;
};
+&shdwc {
+ atmel,shdwc-debouncer = <976>;
+ status = "okay";
+
+ input@0 {
+ reg = <0>;
+ };
+};
+
&spdifrx {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spdifrx_default>;
diff --git a/dts/src/arm/bcm2711-rpi-4-b.dts b/dts/src/arm/bcm2711-rpi-4-b.dts
index f24bdd0870..72ce80fbf2 100644
--- a/dts/src/arm/bcm2711-rpi-4-b.dts
+++ b/dts/src/arm/bcm2711-rpi-4-b.dts
@@ -40,8 +40,8 @@
regulator-always-on;
regulator-settling-time-us = <5000>;
gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
- states = <1800000 0x1
- 3300000 0x0>;
+ states = <1800000 0x1>,
+ <3300000 0x0>;
status = "okay";
};
@@ -217,15 +217,16 @@
};
&pcie0 {
- pci@1,0 {
+ pci@0,0 {
+ device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
ranges;
reg = <0 0 0 0 0>;
- usb@1,0 {
- reg = <0x10000 0 0 0 0>;
+ usb@0,0 {
+ reg = <0 0 0 0 0>;
resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
};
};
diff --git a/dts/src/arm/bcm2711.dtsi b/dts/src/arm/bcm2711.dtsi
index b8a4096192..3b60297af7 100644
--- a/dts/src/arm/bcm2711.dtsi
+++ b/dts/src/arm/bcm2711.dtsi
@@ -300,6 +300,14 @@
status = "disabled";
};
+ vec: vec@7ec13000 {
+ compatible = "brcm,bcm2711-vec";
+ reg = <0x7ec13000 0x1000>;
+ clocks = <&clocks BCM2835_CLOCK_VEC>;
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+
dvp: clock@7ef00000 {
compatible = "brcm,brcm2711-dvp";
reg = <0x7ef00000 0x10>;
@@ -532,8 +540,8 @@
compatible = "brcm,genet-mdio-v5";
reg = <0xe14 0x8>;
reg-names = "mdio";
- #address-cells = <0x0>;
- #size-cells = <0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
};
};
};
diff --git a/dts/src/arm/bcm2835-common.dtsi b/dts/src/arm/bcm2835-common.dtsi
index 4119271c97..c25e797b90 100644
--- a/dts/src/arm/bcm2835-common.dtsi
+++ b/dts/src/arm/bcm2835-common.dtsi
@@ -106,6 +106,14 @@
status = "okay";
};
+ vec: vec@7e806000 {
+ compatible = "brcm,bcm2835-vec";
+ reg = <0x7e806000 0x1000>;
+ clocks = <&clocks BCM2835_CLOCK_VEC>;
+ interrupts = <2 27>;
+ status = "disabled";
+ };
+
pixelvalve@7e807000 {
compatible = "brcm,bcm2835-pixelvalve2";
reg = <0x7e807000 0x100>;
diff --git a/dts/src/arm/bcm283x.dtsi b/dts/src/arm/bcm283x.dtsi
index 0f3be55201..a3e06b6809 100644
--- a/dts/src/arm/bcm283x.dtsi
+++ b/dts/src/arm/bcm283x.dtsi
@@ -464,14 +464,6 @@
status = "disabled";
};
- vec: vec@7e806000 {
- compatible = "brcm,bcm2835-vec";
- reg = <0x7e806000 0x1000>;
- clocks = <&clocks BCM2835_CLOCK_VEC>;
- interrupts = <2 27>;
- status = "disabled";
- };
-
usb: usb@7e980000 {
compatible = "brcm,bcm2835-usb";
reg = <0x7e980000 0x10000>;
diff --git a/dts/src/arm/imx53-m53menlo.dts b/dts/src/arm/imx53-m53menlo.dts
index d3082b9774..4f88e96d81 100644
--- a/dts/src/arm/imx53-m53menlo.dts
+++ b/dts/src/arm/imx53-m53menlo.dts
@@ -56,6 +56,7 @@
panel {
compatible = "edt,etm0700g0dh6";
pinctrl-0 = <&pinctrl_display_gpio>;
+ pinctrl-names = "default";
enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
port {
@@ -76,8 +77,7 @@
regulator-name = "vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
- enable-active-high;
+ gpio = <&gpio1 2 0>;
};
};
diff --git a/dts/src/arm/imx6dl-yapp4-common.dtsi b/dts/src/arm/imx6dl-yapp4-common.dtsi
index cb8b539eb2..e5c4dc65fb 100644
--- a/dts/src/arm/imx6dl-yapp4-common.dtsi
+++ b/dts/src/arm/imx6dl-yapp4-common.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
#include <dt-bindings/pwm/pwm.h>
/ {
@@ -277,6 +278,7 @@
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
reg = <0>;
+ color = <LED_COLOR_ID_RED>;
};
chan@1 {
@@ -284,6 +286,7 @@
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
reg = <1>;
+ color = <LED_COLOR_ID_GREEN>;
};
chan@2 {
@@ -291,6 +294,7 @@
led-cur = /bits/ 8 <0x20>;
max-cur = /bits/ 8 <0x60>;
reg = <2>;
+ color = <LED_COLOR_ID_BLUE>;
};
chan@3 {
@@ -298,6 +302,7 @@
led-cur = /bits/ 8 <0x0>;
max-cur = /bits/ 8 <0x0>;
reg = <3>;
+ color = <LED_COLOR_ID_WHITE>;
};
};
diff --git a/dts/src/arm/imx6qdl-pico.dtsi b/dts/src/arm/imx6qdl-pico.dtsi
index 5de4ccb979..f7a56d6b16 100644
--- a/dts/src/arm/imx6qdl-pico.dtsi
+++ b/dts/src/arm/imx6qdl-pico.dtsi
@@ -176,7 +176,18 @@
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
+ phy-handle = <&phy>;
status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: ethernet-phy@1 {
+ reg = <1>;
+ qca,clk-out-frequency = <125000000>;
+ };
+ };
};
&hdmi {
diff --git a/dts/src/arm/imx6sx-sdb.dts b/dts/src/arm/imx6sx-sdb.dts
index 5a63ca6157..99f4cf777a 100644
--- a/dts/src/arm/imx6sx-sdb.dts
+++ b/dts/src/arm/imx6sx-sdb.dts
@@ -114,7 +114,7 @@
compatible = "micron,n25q256a", "jedec,spi-nor";
spi-max-frequency = <29000000>;
spi-rx-bus-width = <4>;
- spi-tx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
reg = <0>;
};
@@ -124,7 +124,7 @@
compatible = "micron,n25q256a", "jedec,spi-nor";
spi-max-frequency = <29000000>;
spi-rx-bus-width = <4>;
- spi-tx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
reg = <2>;
};
};
diff --git a/dts/src/arm/imx6ul-14x14-evk.dtsi b/dts/src/arm/imx6ul-14x14-evk.dtsi
index 779cc53656..a3fde3316c 100644
--- a/dts/src/arm/imx6ul-14x14-evk.dtsi
+++ b/dts/src/arm/imx6ul-14x14-evk.dtsi
@@ -292,7 +292,7 @@
compatible = "micron,n25q256a", "jedec,spi-nor";
spi-max-frequency = <29000000>;
spi-rx-bus-width = <4>;
- spi-tx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
reg = <0>;
};
};
diff --git a/dts/src/arm/omap3430-sdp.dts b/dts/src/arm/omap3430-sdp.dts
index c5b9037184..7d530ae348 100644
--- a/dts/src/arm/omap3430-sdp.dts
+++ b/dts/src/arm/omap3430-sdp.dts
@@ -101,7 +101,7 @@
nand@1,0 {
compatible = "ti,omap2-nand";
- reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+ reg = <1 0 4>; /* CS1, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
diff --git a/dts/src/arm/qcom-apq8064.dtsi b/dts/src/arm/qcom-apq8064.dtsi
index 0b2bed6e7a..d1c1c6aab2 100644
--- a/dts/src/arm/qcom-apq8064.dtsi
+++ b/dts/src/arm/qcom-apq8064.dtsi
@@ -198,7 +198,7 @@
clock-frequency = <19200000>;
};
- pxo_board {
+ pxo_board: pxo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
@@ -1148,22 +1148,21 @@
};
gpu: adreno-3xx@4300000 {
- compatible = "qcom,adreno-3xx";
+ compatible = "qcom,adreno-320.2", "qcom,adreno";
reg = <0x04300000 0x20000>;
reg-names = "kgsl_3d0_reg_memory";
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "kgsl_3d0_irq";
clock-names =
- "core_clk",
- "iface_clk",
- "mem_clk",
- "mem_iface_clk";
+ "core",
+ "iface",
+ "mem",
+ "mem_iface";
clocks =
<&mmcc GFX3D_CLK>,
<&mmcc GFX3D_AHB_CLK>,
<&mmcc GFX3D_AXI_CLK>,
<&mmcc MMSS_IMEM_AHB_CLK>;
- qcom,chipid = <0x03020002>;
iommus = <&gfx3d 0
&gfx3d 1
@@ -1306,7 +1305,7 @@
reg-names = "dsi_pll", "dsi_phy", "dsi_phy_regulator";
clock-names = "iface_clk", "ref";
clocks = <&mmcc DSI_M_AHB_CLK>,
- <&cxo_board>;
+ <&pxo_board>;
};
diff --git a/dts/src/arm/sama7g5.dtsi b/dts/src/arm/sama7g5.dtsi
index cc6be6db7b..6c58c151c6 100644
--- a/dts/src/arm/sama7g5.dtsi
+++ b/dts/src/arm/sama7g5.dtsi
@@ -75,6 +75,17 @@
#size-cells = <1>;
ranges;
+ securam: securam@e0000000 {
+ compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram";
+ reg = <0xe0000000 0x4000>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xe0000000 0x4000>;
+ no-memory-wc;
+ status = "okay";
+ };
+
secumod: secumod@e0004000 {
compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon";
reg = <0xe0004000 0x4000>;
@@ -111,6 +122,17 @@
clock-names = "td_slck", "md_slck", "main_xtal";
};
+ shdwc: shdwc@e001d010 {
+ compatible = "microchip,sama7g5-shdwc", "syscon";
+ reg = <0xe001d010 0x10>;
+ clocks = <&clk32k 0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ atmel,wakeup-rtc-timer;
+ atmel,wakeup-rtt-timer;
+ status = "disabled";
+ };
+
rtt: rtt@e001d020 {
compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt";
reg = <0xe001d020 0x30>;
@@ -137,6 +159,11 @@
clocks = <&clk32k 0>;
};
+ chipid@e0020000 {
+ compatible = "microchip,sama7g5-chipid";
+ reg = <0xe0020000 0x8>;
+ };
+
sdmmc0: mmc@e1204000 {
compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
reg = <0xe1204000 0x4000>;
@@ -515,6 +542,18 @@
};
};
+ uddrc: uddrc@e3800000 {
+ compatible = "microchip,sama7g5-uddrc";
+ reg = <0xe3800000 0x4000>;
+ status = "okay";
+ };
+
+ ddr3phy: ddr3phy@e3804000 {
+ compatible = "microchip,sama7g5-ddr3phy";
+ reg = <0xe3804000 0x1000>;
+ status = "okay";
+ };
+
gic: interrupt-controller@e8c11000 {
compatible = "arm,cortex-a7-gic";
#interrupt-cells = <3>;
diff --git a/dts/src/arm/spear3xx.dtsi b/dts/src/arm/spear3xx.dtsi
index f266b7b034..cc88ebe7a6 100644
--- a/dts/src/arm/spear3xx.dtsi
+++ b/dts/src/arm/spear3xx.dtsi
@@ -47,7 +47,7 @@
};
gmac: eth@e0800000 {
- compatible = "st,spear600-gmac";
+ compatible = "snps,dwmac-3.40a";
reg = <0xe0800000 0x8000>;
interrupts = <23 22>;
interrupt-names = "macirq", "eth_wake_irq";
diff --git a/dts/src/arm/sun7i-a20-olinuxino-lime2.dts b/dts/src/arm/sun7i-a20-olinuxino-lime2.dts
index 8077f1716f..ecb91fb899 100644
--- a/dts/src/arm/sun7i-a20-olinuxino-lime2.dts
+++ b/dts/src/arm/sun7i-a20-olinuxino-lime2.dts
@@ -112,7 +112,7 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};
diff --git a/dts/src/arm/vexpress-v2m-rs1.dtsi b/dts/src/arm/vexpress-v2m-rs1.dtsi
index 2ad9fd7c94..8af4b77fe6 100644
--- a/dts/src/arm/vexpress-v2m-rs1.dtsi
+++ b/dts/src/arm/vexpress-v2m-rs1.dtsi
@@ -17,6 +17,7 @@
* TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
* CHANGES TO vexpress-v2m.dtsi!
*/
+#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
v2m_fixed_3v3: fixed-regulator-0 {
@@ -101,16 +102,68 @@
};
bus@8000000 {
- motherboard-bus {
- model = "V2M-P1";
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 63>;
+ interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+ <0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+ <0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+ <0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+ <0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+ <0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+ <0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+ <0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+ <0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+
+ motherboard-bus@8000000 {
arm,hbi = <0x190>;
arm,vexpress,site = <0>;
- arm,v2m-memory-map = "rs1";
compatible = "arm,vexpress,v2m-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
#size-cells = <1>;
- #interrupt-cells = <1>;
- ranges;
+ ranges = <0 0 0x08000000 0x04000000>,
+ <1 0 0x14000000 0x04000000>,
+ <2 0 0x18000000 0x04000000>,
+ <3 0 0x1c000000 0x04000000>,
+ <4 0 0x0c000000 0x04000000>,
+ <5 0 0x10000000 0x04000000>;
nor_flash: flash@0 {
compatible = "arm,vexpress-flash", "cfi-flash";
@@ -215,7 +268,7 @@
clock-names = "apb_pclk";
};
- mmci@50000 {
+ mmc@50000 {
compatible = "arm,pl180", "arm,primecell";
reg = <0x050000 0x1000>;
interrupts = <9>, <10>;
@@ -275,7 +328,7 @@
clock-names = "uartclk", "apb_pclk";
};
- wdt@f0000 {
+ watchdog@f0000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0f0000 0x1000>;
interrupts = <0>;
diff --git a/dts/src/arm/vexpress-v2m.dtsi b/dts/src/arm/vexpress-v2m.dtsi
index ec13ceb9ed..f434fe5cf4 100644
--- a/dts/src/arm/vexpress-v2m.dtsi
+++ b/dts/src/arm/vexpress-v2m.dtsi
@@ -17,18 +17,73 @@
* TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
* CHANGES TO vexpress-v2m-rs1.dtsi!
*/
+#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
- bus@4000000 {
- motherboard {
- model = "V2M-P1";
+ bus@40000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x40000000 0x40000000 0x10000000>,
+ <0x10000000 0x10000000 0x00020000>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 63>;
+ interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+ <0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+ <0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+ <0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+ <0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+ <0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+ <0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+ <0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+ <0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+
+ motherboard-bus@40000000 {
arm,hbi = <0x190>;
arm,vexpress,site = <0>;
compatible = "arm,vexpress,v2m-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
#size-cells = <1>;
- #interrupt-cells = <1>;
- ranges;
+ ranges = <0 0 0x40000000 0x04000000>,
+ <1 0 0x44000000 0x04000000>,
+ <2 0 0x48000000 0x04000000>,
+ <3 0 0x4c000000 0x04000000>,
+ <7 0 0x10000000 0x00020000>;
flash@0,00000000 {
compatible = "arm,vexpress-flash", "cfi-flash";
diff --git a/dts/src/arm/vexpress-v2p-ca15-tc1.dts b/dts/src/arm/vexpress-v2p-ca15-tc1.dts
index e63c5c0bfb..679537e17f 100644
--- a/dts/src/arm/vexpress-v2p-ca15-tc1.dts
+++ b/dts/src/arm/vexpress-v2p-ca15-tc1.dts
@@ -237,62 +237,7 @@
};
bus@8000000 {
- compatible = "simple-bus";
-
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0 0x08000000 0x04000000>,
- <1 0 0 0x14000000 0x04000000>,
- <2 0 0 0x18000000 0x04000000>,
- <3 0 0 0x1c000000 0x04000000>,
- <4 0 0 0x0c000000 0x04000000>,
- <5 0 0 0x10000000 0x04000000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 63>;
- interrupt-map = <0 0 0 &gic 0 0 4>,
- <0 0 1 &gic 0 1 4>,
- <0 0 2 &gic 0 2 4>,
- <0 0 3 &gic 0 3 4>,
- <0 0 4 &gic 0 4 4>,
- <0 0 5 &gic 0 5 4>,
- <0 0 6 &gic 0 6 4>,
- <0 0 7 &gic 0 7 4>,
- <0 0 8 &gic 0 8 4>,
- <0 0 9 &gic 0 9 4>,
- <0 0 10 &gic 0 10 4>,
- <0 0 11 &gic 0 11 4>,
- <0 0 12 &gic 0 12 4>,
- <0 0 13 &gic 0 13 4>,
- <0 0 14 &gic 0 14 4>,
- <0 0 15 &gic 0 15 4>,
- <0 0 16 &gic 0 16 4>,
- <0 0 17 &gic 0 17 4>,
- <0 0 18 &gic 0 18 4>,
- <0 0 19 &gic 0 19 4>,
- <0 0 20 &gic 0 20 4>,
- <0 0 21 &gic 0 21 4>,
- <0 0 22 &gic 0 22 4>,
- <0 0 23 &gic 0 23 4>,
- <0 0 24 &gic 0 24 4>,
- <0 0 25 &gic 0 25 4>,
- <0 0 26 &gic 0 26 4>,
- <0 0 27 &gic 0 27 4>,
- <0 0 28 &gic 0 28 4>,
- <0 0 29 &gic 0 29 4>,
- <0 0 30 &gic 0 30 4>,
- <0 0 31 &gic 0 31 4>,
- <0 0 32 &gic 0 32 4>,
- <0 0 33 &gic 0 33 4>,
- <0 0 34 &gic 0 34 4>,
- <0 0 35 &gic 0 35 4>,
- <0 0 36 &gic 0 36 4>,
- <0 0 37 &gic 0 37 4>,
- <0 0 38 &gic 0 38 4>,
- <0 0 39 &gic 0 39 4>,
- <0 0 40 &gic 0 40 4>,
- <0 0 41 &gic 0 41 4>,
- <0 0 42 &gic 0 42 4>;
+ ranges = <0x8000000 0 0x8000000 0x18000000>;
};
site2: hsb@40000000 {
diff --git a/dts/src/arm/vexpress-v2p-ca15_a7.dts b/dts/src/arm/vexpress-v2p-ca15_a7.dts
index 012d40a722..511e87cc2b 100644
--- a/dts/src/arm/vexpress-v2p-ca15_a7.dts
+++ b/dts/src/arm/vexpress-v2p-ca15_a7.dts
@@ -609,62 +609,7 @@
};
smb: bus@8000000 {
- compatible = "simple-bus";
-
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0 0x08000000 0x04000000>,
- <1 0 0 0x14000000 0x04000000>,
- <2 0 0 0x18000000 0x04000000>,
- <3 0 0 0x1c000000 0x04000000>,
- <4 0 0 0x0c000000 0x04000000>,
- <5 0 0 0x10000000 0x04000000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 63>;
- interrupt-map = <0 0 0 &gic 0 0 4>,
- <0 0 1 &gic 0 1 4>,
- <0 0 2 &gic 0 2 4>,
- <0 0 3 &gic 0 3 4>,
- <0 0 4 &gic 0 4 4>,
- <0 0 5 &gic 0 5 4>,
- <0 0 6 &gic 0 6 4>,
- <0 0 7 &gic 0 7 4>,
- <0 0 8 &gic 0 8 4>,
- <0 0 9 &gic 0 9 4>,
- <0 0 10 &gic 0 10 4>,
- <0 0 11 &gic 0 11 4>,
- <0 0 12 &gic 0 12 4>,
- <0 0 13 &gic 0 13 4>,
- <0 0 14 &gic 0 14 4>,
- <0 0 15 &gic 0 15 4>,
- <0 0 16 &gic 0 16 4>,
- <0 0 17 &gic 0 17 4>,
- <0 0 18 &gic 0 18 4>,
- <0 0 19 &gic 0 19 4>,
- <0 0 20 &gic 0 20 4>,
- <0 0 21 &gic 0 21 4>,
- <0 0 22 &gic 0 22 4>,
- <0 0 23 &gic 0 23 4>,
- <0 0 24 &gic 0 24 4>,
- <0 0 25 &gic 0 25 4>,
- <0 0 26 &gic 0 26 4>,
- <0 0 27 &gic 0 27 4>,
- <0 0 28 &gic 0 28 4>,
- <0 0 29 &gic 0 29 4>,
- <0 0 30 &gic 0 30 4>,
- <0 0 31 &gic 0 31 4>,
- <0 0 32 &gic 0 32 4>,
- <0 0 33 &gic 0 33 4>,
- <0 0 34 &gic 0 34 4>,
- <0 0 35 &gic 0 35 4>,
- <0 0 36 &gic 0 36 4>,
- <0 0 37 &gic 0 37 4>,
- <0 0 38 &gic 0 38 4>,
- <0 0 39 &gic 0 39 4>,
- <0 0 40 &gic 0 40 4>,
- <0 0 41 &gic 0 41 4>,
- <0 0 42 &gic 0 42 4>;
+ ranges = <0x8000000 0 0x8000000 0x18000000>;
};
site2: hsb@40000000 {
diff --git a/dts/src/arm/vexpress-v2p-ca5s.dts b/dts/src/arm/vexpress-v2p-ca5s.dts
index 7aa64ae257..3b88209bac 100644
--- a/dts/src/arm/vexpress-v2p-ca5s.dts
+++ b/dts/src/arm/vexpress-v2p-ca5s.dts
@@ -207,62 +207,7 @@
};
smb: bus@8000000 {
- compatible = "simple-bus";
-
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0x08000000 0x04000000>,
- <1 0 0x14000000 0x04000000>,
- <2 0 0x18000000 0x04000000>,
- <3 0 0x1c000000 0x04000000>,
- <4 0 0x0c000000 0x04000000>,
- <5 0 0x10000000 0x04000000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 63>;
- interrupt-map = <0 0 0 &gic 0 0 4>,
- <0 0 1 &gic 0 1 4>,
- <0 0 2 &gic 0 2 4>,
- <0 0 3 &gic 0 3 4>,
- <0 0 4 &gic 0 4 4>,
- <0 0 5 &gic 0 5 4>,
- <0 0 6 &gic 0 6 4>,
- <0 0 7 &gic 0 7 4>,
- <0 0 8 &gic 0 8 4>,
- <0 0 9 &gic 0 9 4>,
- <0 0 10 &gic 0 10 4>,
- <0 0 11 &gic 0 11 4>,
- <0 0 12 &gic 0 12 4>,
- <0 0 13 &gic 0 13 4>,
- <0 0 14 &gic 0 14 4>,
- <0 0 15 &gic 0 15 4>,
- <0 0 16 &gic 0 16 4>,
- <0 0 17 &gic 0 17 4>,
- <0 0 18 &gic 0 18 4>,
- <0 0 19 &gic 0 19 4>,
- <0 0 20 &gic 0 20 4>,
- <0 0 21 &gic 0 21 4>,
- <0 0 22 &gic 0 22 4>,
- <0 0 23 &gic 0 23 4>,
- <0 0 24 &gic 0 24 4>,
- <0 0 25 &gic 0 25 4>,
- <0 0 26 &gic 0 26 4>,
- <0 0 27 &gic 0 27 4>,
- <0 0 28 &gic 0 28 4>,
- <0 0 29 &gic 0 29 4>,
- <0 0 30 &gic 0 30 4>,
- <0 0 31 &gic 0 31 4>,
- <0 0 32 &gic 0 32 4>,
- <0 0 33 &gic 0 33 4>,
- <0 0 34 &gic 0 34 4>,
- <0 0 35 &gic 0 35 4>,
- <0 0 36 &gic 0 36 4>,
- <0 0 37 &gic 0 37 4>,
- <0 0 38 &gic 0 38 4>,
- <0 0 39 &gic 0 39 4>,
- <0 0 40 &gic 0 40 4>,
- <0 0 41 &gic 0 41 4>,
- <0 0 42 &gic 0 42 4>;
+ ranges = <0 0x8000000 0x18000000>;
};
site2: hsb@40000000 {
diff --git a/dts/src/arm/vexpress-v2p-ca9.dts b/dts/src/arm/vexpress-v2p-ca9.dts
index 4c58479558..5916e4877e 100644
--- a/dts/src/arm/vexpress-v2p-ca9.dts
+++ b/dts/src/arm/vexpress-v2p-ca9.dts
@@ -295,64 +295,6 @@
};
};
- smb: bus@4000000 {
- compatible = "simple-bus";
-
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0x40000000 0x04000000>,
- <1 0 0x44000000 0x04000000>,
- <2 0 0x48000000 0x04000000>,
- <3 0 0x4c000000 0x04000000>,
- <7 0 0x10000000 0x00020000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 63>;
- interrupt-map = <0 0 0 &gic 0 0 4>,
- <0 0 1 &gic 0 1 4>,
- <0 0 2 &gic 0 2 4>,
- <0 0 3 &gic 0 3 4>,
- <0 0 4 &gic 0 4 4>,
- <0 0 5 &gic 0 5 4>,
- <0 0 6 &gic 0 6 4>,
- <0 0 7 &gic 0 7 4>,
- <0 0 8 &gic 0 8 4>,
- <0 0 9 &gic 0 9 4>,
- <0 0 10 &gic 0 10 4>,
- <0 0 11 &gic 0 11 4>,
- <0 0 12 &gic 0 12 4>,
- <0 0 13 &gic 0 13 4>,
- <0 0 14 &gic 0 14 4>,
- <0 0 15 &gic 0 15 4>,
- <0 0 16 &gic 0 16 4>,
- <0 0 17 &gic 0 17 4>,
- <0 0 18 &gic 0 18 4>,
- <0 0 19 &gic 0 19 4>,
- <0 0 20 &gic 0 20 4>,
- <0 0 21 &gic 0 21 4>,
- <0 0 22 &gic 0 22 4>,
- <0 0 23 &gic 0 23 4>,
- <0 0 24 &gic 0 24 4>,
- <0 0 25 &gic 0 25 4>,
- <0 0 26 &gic 0 26 4>,
- <0 0 27 &gic 0 27 4>,
- <0 0 28 &gic 0 28 4>,
- <0 0 29 &gic 0 29 4>,
- <0 0 30 &gic 0 30 4>,
- <0 0 31 &gic 0 31 4>,
- <0 0 32 &gic 0 32 4>,
- <0 0 33 &gic 0 33 4>,
- <0 0 34 &gic 0 34 4>,
- <0 0 35 &gic 0 35 4>,
- <0 0 36 &gic 0 36 4>,
- <0 0 37 &gic 0 37 4>,
- <0 0 38 &gic 0 38 4>,
- <0 0 39 &gic 0 39 4>,
- <0 0 40 &gic 0 40 4>,
- <0 0 41 &gic 0 41 4>,
- <0 0 42 &gic 0 42 4>;
- };
-
site2: hsb@e0000000 {
compatible = "simple-bus";
#address-cells = <1>;
diff --git a/dts/src/arm64/allwinner/sun50i-h5-nanopi-neo2.dts b/dts/src/arm64/allwinner/sun50i-h5-nanopi-neo2.dts
index 02f8e72f0c..05486cccee 100644
--- a/dts/src/arm64/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/dts/src/arm64/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -75,7 +75,7 @@
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};
diff --git a/dts/src/arm64/arm/foundation-v8.dtsi b/dts/src/arm64/arm/foundation-v8.dtsi
index 05ae893d1b..fbf13f7c2b 100644
--- a/dts/src/arm64/arm/foundation-v8.dtsi
+++ b/dts/src/arm64/arm/foundation-v8.dtsi
@@ -115,7 +115,6 @@
bus@8000000 {
compatible = "arm,vexpress,v2m-p1", "simple-bus";
- arm,v2m-memory-map = "rs1";
#address-cells = <2>; /* SMB chipselect number and offset */
#size-cells = <1>;
diff --git a/dts/src/arm64/arm/fvp-base-revc.dts b/dts/src/arm64/arm/fvp-base-revc.dts
index b8a21092db..269b649934 100644
--- a/dts/src/arm64/arm/fvp-base-revc.dts
+++ b/dts/src/arm64/arm/fvp-base-revc.dts
@@ -192,32 +192,9 @@
remote-endpoint = <&clcd_pads>;
};
};
-
- panel-timing {
- clock-frequency = <63500127>;
- hactive = <1024>;
- hback-porch = <152>;
- hfront-porch = <48>;
- hsync-len = <104>;
- vactive = <768>;
- vback-porch = <23>;
- vfront-porch = <3>;
- vsync-len = <4>;
- };
};
bus@8000000 {
- compatible = "simple-bus";
-
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0 0x08000000 0x04000000>,
- <1 0 0 0x14000000 0x04000000>,
- <2 0 0 0x18000000 0x04000000>,
- <3 0 0 0x1c000000 0x04000000>,
- <4 0 0 0x0c000000 0x04000000>,
- <5 0 0 0x10000000 0x04000000>;
-
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 63>;
interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/dts/src/arm64/arm/juno-base.dtsi b/dts/src/arm64/arm/juno-base.dtsi
index 8e7a66943b..6288e104a0 100644
--- a/dts/src/arm64/arm/juno-base.dtsi
+++ b/dts/src/arm64/arm/juno-base.dtsi
@@ -27,8 +27,6 @@
reg = <0x0 0x2b1f0000 0x0 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "mhu_lpri_rx",
- "mhu_hpri_rx";
#mbox-cells = <1>;
clocks = <&soc_refclk100mhz>;
clock-names = "apb_pclk";
@@ -804,16 +802,6 @@
};
bus@8000000 {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0 0x08000000 0x04000000>,
- <1 0 0 0x14000000 0x04000000>,
- <2 0 0 0x18000000 0x04000000>,
- <3 0 0 0x1c000000 0x04000000>,
- <4 0 0 0x0c000000 0x04000000>,
- <5 0 0 0x10000000 0x04000000>;
-
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 15>;
interrupt-map = <0 0 0 &gic 0 GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/dts/src/arm64/arm/juno-motherboard.dtsi b/dts/src/arm64/arm/juno-motherboard.dtsi
index 40d95c58b5..fefd2b5f01 100644
--- a/dts/src/arm64/arm/juno-motherboard.dtsi
+++ b/dts/src/arm64/arm/juno-motherboard.dtsi
@@ -92,16 +92,23 @@
};
bus@8000000 {
- motherboard-bus {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0x8000000 0 0x8000000 0x18000000>;
+
+ motherboard-bus@8000000 {
compatible = "arm,vexpress,v2p-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
#size-cells = <1>;
- #interrupt-cells = <1>;
- ranges;
- model = "V2M-Juno";
+ ranges = <0 0 0 0x08000000 0x04000000>,
+ <1 0 0 0x14000000 0x04000000>,
+ <2 0 0 0x18000000 0x04000000>,
+ <3 0 0 0x1c000000 0x04000000>,
+ <4 0 0 0x0c000000 0x04000000>,
+ <5 0 0 0x10000000 0x04000000>;
arm,hbi = <0x252>;
arm,vexpress,site = <0>;
- arm,v2m-memory-map = "rs1";
flash@0 {
/* 2 * 32MiB NOR Flash memory mounted on CS0 */
@@ -218,7 +225,7 @@
};
};
- mmci@50000 {
+ mmc@50000 {
compatible = "arm,pl180", "arm,primecell";
reg = <0x050000 0x1000>;
interrupts = <5>;
@@ -246,7 +253,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
- wdt@f0000 {
+ watchdog@f0000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0f0000 0x10000>;
interrupts = <7>;
diff --git a/dts/src/arm64/arm/rtsm_ve-aemv8a.dts b/dts/src/arm64/arm/rtsm_ve-aemv8a.dts
index 3050f45bad..258991ad7c 100644
--- a/dts/src/arm64/arm/rtsm_ve-aemv8a.dts
+++ b/dts/src/arm64/arm/rtsm_ve-aemv8a.dts
@@ -133,17 +133,6 @@
};
bus@8000000 {
- compatible = "simple-bus";
-
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0 0x08000000 0x04000000>,
- <1 0 0 0x14000000 0x04000000>,
- <2 0 0 0x18000000 0x04000000>,
- <3 0 0 0x1c000000 0x04000000>,
- <4 0 0 0x0c000000 0x04000000>,
- <5 0 0 0x10000000 0x04000000>;
-
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 63>;
interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
diff --git a/dts/src/arm64/arm/rtsm_ve-motherboard-rs2.dtsi b/dts/src/arm64/arm/rtsm_ve-motherboard-rs2.dtsi
index b917d9d3f1..33182d9e58 100644
--- a/dts/src/arm64/arm/rtsm_ve-motherboard-rs2.dtsi
+++ b/dts/src/arm64/arm/rtsm_ve-motherboard-rs2.dtsi
@@ -6,7 +6,7 @@
*/
/ {
bus@8000000 {
- motherboard-bus {
+ motherboard-bus@8000000 {
arm,v2m-memory-map = "rs2";
iofpga-bus@300000000 {
diff --git a/dts/src/arm64/arm/rtsm_ve-motherboard.dtsi b/dts/src/arm64/arm/rtsm_ve-motherboard.dtsi
index 4c4a381d2c..5f6cab668a 100644
--- a/dts/src/arm64/arm/rtsm_ve-motherboard.dtsi
+++ b/dts/src/arm64/arm/rtsm_ve-motherboard.dtsi
@@ -77,13 +77,21 @@
};
bus@8000000 {
- motherboard-bus {
- arm,v2m-memory-map = "rs1";
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0x8000000 0 0x8000000 0x18000000>;
+
+ motherboard-bus@8000000 {
compatible = "arm,vexpress,v2m-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
#size-cells = <1>;
- #interrupt-cells = <1>;
- ranges;
+ ranges = <0 0 0 0x08000000 0x04000000>,
+ <1 0 0 0x14000000 0x04000000>,
+ <2 0 0 0x18000000 0x04000000>,
+ <3 0 0 0x1c000000 0x04000000>,
+ <4 0 0 0x0c000000 0x04000000>,
+ <5 0 0 0x10000000 0x04000000>;
flash@0 {
compatible = "arm,vexpress-flash", "cfi-flash";
@@ -130,7 +138,7 @@
clock-names = "apb_pclk";
};
- mmci@50000 {
+ mmc@50000 {
compatible = "arm,pl180", "arm,primecell";
reg = <0x050000 0x1000>;
interrupts = <9>, <10>;
@@ -190,7 +198,7 @@
clock-names = "uartclk", "apb_pclk";
};
- wdt@f0000 {
+ watchdog@f0000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0f0000 0x1000>;
interrupts = <0>;
diff --git a/dts/src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts b/dts/src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
index d859914500..5b6d9d8e93 100644
--- a/dts/src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
+++ b/dts/src/arm64/arm/vexpress-v2f-1xv7-ca53x2.dts
@@ -145,61 +145,6 @@
};
smb: bus@8000000 {
- compatible = "simple-bus";
-
- #address-cells = <2>;
- #size-cells = <1>;
- ranges = <0 0 0 0x08000000 0x04000000>,
- <1 0 0 0x14000000 0x04000000>,
- <2 0 0 0x18000000 0x04000000>,
- <3 0 0 0x1c000000 0x04000000>,
- <4 0 0 0x0c000000 0x04000000>,
- <5 0 0 0x10000000 0x04000000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 63>;
- interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
- <0 0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ ranges = <0x8000000 0 0x8000000 0x18000000>;
};
};
diff --git a/dts/src/arm64/arm/vexpress-v2m-rs1.dtsi b/dts/src/arm64/arm/vexpress-v2m-rs1.dtsi
index 2ad9fd7c94..8af4b77fe6 100644
--- a/dts/src/arm64/arm/vexpress-v2m-rs1.dtsi
+++ b/dts/src/arm64/arm/vexpress-v2m-rs1.dtsi
@@ -17,6 +17,7 @@
* TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
* CHANGES TO vexpress-v2m.dtsi!
*/
+#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
v2m_fixed_3v3: fixed-regulator-0 {
@@ -101,16 +102,68 @@
};
bus@8000000 {
- motherboard-bus {
- model = "V2M-P1";
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 63>;
+ interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ <0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ <0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
+ <0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+ <0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+ <0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+ <0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
+ <0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
+ <0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
+ <0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
+ <0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
+ <0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
+ <0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+ <0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+ <0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+ <0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+ <0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+ <0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+ <0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+
+ motherboard-bus@8000000 {
arm,hbi = <0x190>;
arm,vexpress,site = <0>;
- arm,v2m-memory-map = "rs1";
compatible = "arm,vexpress,v2m-p1", "simple-bus";
#address-cells = <2>; /* SMB chipselect number and offset */
#size-cells = <1>;
- #interrupt-cells = <1>;
- ranges;
+ ranges = <0 0 0x08000000 0x04000000>,
+ <1 0 0x14000000 0x04000000>,
+ <2 0 0x18000000 0x04000000>,
+ <3 0 0x1c000000 0x04000000>,
+ <4 0 0x0c000000 0x04000000>,
+ <5 0 0x10000000 0x04000000>;
nor_flash: flash@0 {
compatible = "arm,vexpress-flash", "cfi-flash";
@@ -215,7 +268,7 @@
clock-names = "apb_pclk";
};
- mmci@50000 {
+ mmc@50000 {
compatible = "arm,pl180", "arm,primecell";
reg = <0x050000 0x1000>;
interrupts = <9>, <10>;
@@ -275,7 +328,7 @@
clock-names = "uartclk", "apb_pclk";
};
- wdt@f0000 {
+ watchdog@f0000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x0f0000 0x1000>;
interrupts = <0>;
diff --git a/dts/src/arm64/freescale/fsl-ls1028a.dtsi b/dts/src/arm64/freescale/fsl-ls1028a.dtsi
index 343ecf0e89..06b36cc658 100644
--- a/dts/src/arm64/freescale/fsl-ls1028a.dtsi
+++ b/dts/src/arm64/freescale/fsl-ls1028a.dtsi
@@ -405,9 +405,9 @@
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; /* fixed up by bootloader */
clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
- voltage-ranges = <1800 1800 3300 3300>;
+ voltage-ranges = <1800 1800>;
sdhci,auto-cmd12;
- broken-cd;
+ non-removable;
little-endian;
bus-width = <4>;
status = "disabled";
diff --git a/dts/src/arm64/freescale/imx8mm-beacon-som.dtsi b/dts/src/arm64/freescale/imx8mm-beacon-som.dtsi
index 988f8ab679..40f5e7a3b0 100644
--- a/dts/src/arm64/freescale/imx8mm-beacon-som.dtsi
+++ b/dts/src/arm64/freescale/imx8mm-beacon-som.dtsi
@@ -91,7 +91,7 @@
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <80000000>;
- spi-tx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
};
};
diff --git a/dts/src/arm64/freescale/imx8mm-evk.dts b/dts/src/arm64/freescale/imx8mm-evk.dts
index 4e2820d192..a2b24d4d4e 100644
--- a/dts/src/arm64/freescale/imx8mm-evk.dts
+++ b/dts/src/arm64/freescale/imx8mm-evk.dts
@@ -48,7 +48,7 @@
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <80000000>;
- spi-tx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
};
};
diff --git a/dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts b/dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts
index d17abb5158..e99e7644ff 100644
--- a/dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts
+++ b/dts/src/arm64/freescale/imx8mm-kontron-n801x-s.dts
@@ -70,7 +70,9 @@
regulator-name = "rst-usb-eth2";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_eth2>;
- gpio = <&gpio3 2 GPIO_ACTIVE_LOW>;
+ gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ regulator-always-on;
};
reg_vdd_5v: regulator-5v {
@@ -95,7 +97,7 @@
clocks = <&osc_can>;
interrupt-parent = <&gpio4>;
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
- spi-max-frequency = <100000>;
+ spi-max-frequency = <10000000>;
vdd-supply = <&reg_vdd_3v3>;
xceiver-supply = <&reg_vdd_5v>;
};
@@ -111,7 +113,7 @@
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
- phy-connection-type = "rgmii";
+ phy-connection-type = "rgmii-rxid";
phy-handle = <&ethphy>;
status = "okay";
diff --git a/dts/src/arm64/freescale/imx8mm-kontron-n801x-som.dtsi b/dts/src/arm64/freescale/imx8mm-kontron-n801x-som.dtsi
index d0456daefd..42bbbb3f53 100644
--- a/dts/src/arm64/freescale/imx8mm-kontron-n801x-som.dtsi
+++ b/dts/src/arm64/freescale/imx8mm-kontron-n801x-som.dtsi
@@ -91,10 +91,12 @@
reg_vdd_soc: BUCK1 {
regulator-name = "buck1";
regulator-min-microvolt = <800000>;
- regulator-max-microvolt = <900000>;
+ regulator-max-microvolt = <850000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <3125>;
+ nxp,dvs-run-voltage = <850000>;
+ nxp,dvs-standby-voltage = <800000>;
};
reg_vdd_arm: BUCK2 {
@@ -102,6 +104,7 @@
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <950000>;
regulator-boot-on;
+ regulator-always-on;
regulator-ramp-delay = <3125>;
nxp,dvs-run-voltage = <950000>;
nxp,dvs-standby-voltage = <850000>;
@@ -110,7 +113,7 @@
reg_vdd_dram: BUCK3 {
regulator-name = "buck3";
regulator-min-microvolt = <850000>;
- regulator-max-microvolt = <900000>;
+ regulator-max-microvolt = <950000>;
regulator-boot-on;
regulator-always-on;
};
@@ -149,7 +152,7 @@
reg_vdd_snvs: LDO2 {
regulator-name = "ldo2";
- regulator-min-microvolt = <850000>;
+ regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-boot-on;
regulator-always-on;
diff --git a/dts/src/arm64/freescale/imx8mm-venice-gw7902.dts b/dts/src/arm64/freescale/imx8mm-venice-gw7902.dts
index 05cb60991f..d52686f4c0 100644
--- a/dts/src/arm64/freescale/imx8mm-venice-gw7902.dts
+++ b/dts/src/arm64/freescale/imx8mm-venice-gw7902.dts
@@ -647,7 +647,7 @@
pinctrl_hog: hoggrp {
fsl,pins = <
MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
- MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* M2_RST# */
+ MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */
MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x40000041 /* AMP GPIO1 */
diff --git a/dts/src/arm64/freescale/imx8mn-beacon-som.dtsi b/dts/src/arm64/freescale/imx8mn-beacon-som.dtsi
index 54eaf3d605..3b2d627a03 100644
--- a/dts/src/arm64/freescale/imx8mn-beacon-som.dtsi
+++ b/dts/src/arm64/freescale/imx8mn-beacon-som.dtsi
@@ -101,7 +101,7 @@
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <80000000>;
- spi-tx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
};
};
diff --git a/dts/src/arm64/freescale/imx8mn-venice-gw7902.dts b/dts/src/arm64/freescale/imx8mn-venice-gw7902.dts
index e77db4996e..236f425e15 100644
--- a/dts/src/arm64/freescale/imx8mn-venice-gw7902.dts
+++ b/dts/src/arm64/freescale/imx8mn-venice-gw7902.dts
@@ -633,7 +633,7 @@
pinctrl_hog: hoggrp {
fsl,pins = <
MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */
- MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x40000041 /* M2_RST# */
+ MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RST# */
MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */
diff --git a/dts/src/arm64/freescale/imx8mp-phycore-som.dtsi b/dts/src/arm64/freescale/imx8mp-phycore-som.dtsi
index aa78e0d8c7..fc178eebf8 100644
--- a/dts/src/arm64/freescale/imx8mp-phycore-som.dtsi
+++ b/dts/src/arm64/freescale/imx8mp-phycore-som.dtsi
@@ -74,7 +74,7 @@
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
- spi-tx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
};
};
diff --git a/dts/src/arm64/freescale/imx8mq-evk.dts b/dts/src/arm64/freescale/imx8mq-evk.dts
index 49f9db971f..b83df77195 100644
--- a/dts/src/arm64/freescale/imx8mq-evk.dts
+++ b/dts/src/arm64/freescale/imx8mq-evk.dts
@@ -337,6 +337,8 @@
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
spi-max-frequency = <29000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
};
};
diff --git a/dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts b/dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts
index f593e4ff62..564746d500 100644
--- a/dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts
+++ b/dts/src/arm64/freescale/imx8mq-kontron-pitx-imx8m.dts
@@ -281,7 +281,7 @@
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
- spi-tx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
m25p,fast-read;
spi-max-frequency = <50000000>;
diff --git a/dts/src/arm64/qcom/pm8150.dtsi b/dts/src/arm64/qcom/pm8150.dtsi
index c566a64b13..0df76f7b1c 100644
--- a/dts/src/arm64/qcom/pm8150.dtsi
+++ b/dts/src/arm64/qcom/pm8150.dtsi
@@ -48,8 +48,10 @@
#size-cells = <0>;
pon: power-on@800 {
- compatible = "qcom,pm8916-pon";
+ compatible = "qcom,pm8998-pon";
reg = <0x0800>;
+ mode-bootloader = <0x2>;
+ mode-recovery = <0x1>;
pon_pwrkey: pwrkey {
compatible = "qcom,pm8941-pwrkey";
diff --git a/dts/src/arm64/qcom/qrb5165-rb5.dts b/dts/src/arm64/qcom/qrb5165-rb5.dts
index 8ac96f8e79..28d5b55285 100644
--- a/dts/src/arm64/qcom/qrb5165-rb5.dts
+++ b/dts/src/arm64/qcom/qrb5165-rb5.dts
@@ -804,6 +804,16 @@
};
};
+&pon_pwrkey {
+ status = "okay";
+};
+
+&pon_resin {
+ status = "okay";
+
+ linux,code = <KEY_VOLUMEDOWN>;
+};
+
&qupv3_id_0 {
status = "okay";
};
diff --git a/dts/src/arm64/qcom/sc7180-trogdor.dtsi b/dts/src/arm64/qcom/sc7180-trogdor.dtsi
index 0f2b3c00e4..70c88c37de 100644
--- a/dts/src/arm64/qcom/sc7180-trogdor.dtsi
+++ b/dts/src/arm64/qcom/sc7180-trogdor.dtsi
@@ -273,7 +273,6 @@
"Headphone Jack", "HPOL",
"Headphone Jack", "HPOR";
- #sound-dai-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
@@ -301,11 +300,11 @@
};
};
- dai-link@2 {
+ dai-link@5 {
link-name = "MultiMedia2";
- reg = <2>;
+ reg = <LPASS_DP_RX>;
cpu {
- sound-dai = <&lpass_cpu 2>;
+ sound-dai = <&lpass_cpu LPASS_DP_RX>;
};
codec {
@@ -782,7 +781,7 @@ hp_i2c: &i2c9 {
qcom,playback-sd-lines = <0>;
};
- hdmi-primary@0 {
+ hdmi@5 {
reg = <LPASS_DP_RX>;
};
};
diff --git a/dts/src/arm64/qcom/sc7280.dtsi b/dts/src/arm64/qcom/sc7280.dtsi
index 53a21d0861..fd78f16181 100644
--- a/dts/src/arm64/qcom/sc7280.dtsi
+++ b/dts/src/arm64/qcom/sc7280.dtsi
@@ -1850,9 +1850,9 @@
cpufreq_hw: cpufreq@18591000 {
compatible = "qcom,cpufreq-epss";
- reg = <0 0x18591100 0 0x900>,
- <0 0x18592100 0 0x900>,
- <0 0x18593100 0 0x900>;
+ reg = <0 0x18591000 0 0x1000>,
+ <0 0x18592000 0 0x1000>,
+ <0 0x18593000 0 0x1000>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
clock-names = "xo", "alternate";
#freq-domain-cells = <1>;
diff --git a/dts/src/arm64/qcom/sdm630.dtsi b/dts/src/arm64/qcom/sdm630.dtsi
index 9153e6616b..9c7f87e42f 100644
--- a/dts/src/arm64/qcom/sdm630.dtsi
+++ b/dts/src/arm64/qcom/sdm630.dtsi
@@ -654,9 +654,20 @@
compatible = "qcom,sdm660-a2noc";
reg = <0x01704000 0xc100>;
#interconnect-cells = <1>;
- clock-names = "bus", "bus_a";
+ clock-names = "bus",
+ "bus_a",
+ "ipa",
+ "ufs_axi",
+ "aggre2_ufs_axi",
+ "aggre2_usb3_axi",
+ "cfg_noc_usb2_axi";
clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
- <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>;
+ <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
+ <&rpmcc RPM_SMD_IPA_CLK>,
+ <&gcc GCC_UFS_AXI_CLK>,
+ <&gcc GCC_AGGRE2_UFS_AXI_CLK>,
+ <&gcc GCC_AGGRE2_USB3_AXI_CLK>,
+ <&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
};
mnoc: interconnect@1745000 {
diff --git a/dts/src/arm64/qcom/sdm845.dtsi b/dts/src/arm64/qcom/sdm845.dtsi
index 6d7172e6f4..b3b9119261 100644
--- a/dts/src/arm64/qcom/sdm845.dtsi
+++ b/dts/src/arm64/qcom/sdm845.dtsi
@@ -128,23 +128,28 @@
no-map;
};
- wlan_msa_mem: memory@8c400000 {
- reg = <0 0x8c400000 0 0x100000>;
+ ipa_fw_mem: memory@8c400000 {
+ reg = <0 0x8c400000 0 0x10000>;
no-map;
};
- gpu_mem: memory@8c515000 {
- reg = <0 0x8c515000 0 0x2000>;
+ ipa_gsi_mem: memory@8c410000 {
+ reg = <0 0x8c410000 0 0x5000>;
no-map;
};
- ipa_fw_mem: memory@8c517000 {
- reg = <0 0x8c517000 0 0x5a000>;
+ gpu_mem: memory@8c415000 {
+ reg = <0 0x8c415000 0 0x2000>;
no-map;
};
- adsp_mem: memory@8c600000 {
- reg = <0 0x8c600000 0 0x1a00000>;
+ adsp_mem: memory@8c500000 {
+ reg = <0 0x8c500000 0 0x1a00000>;
+ no-map;
+ };
+
+ wlan_msa_mem: memory@8df00000 {
+ reg = <0 0x8df00000 0 0x100000>;
no-map;
};
diff --git a/dts/src/arm64/qcom/sdm850-lenovo-yoga-c630.dts b/dts/src/arm64/qcom/sdm850-lenovo-yoga-c630.dts
index 385e502943..2ba23aa582 100644
--- a/dts/src/arm64/qcom/sdm850-lenovo-yoga-c630.dts
+++ b/dts/src/arm64/qcom/sdm850-lenovo-yoga-c630.dts
@@ -16,6 +16,17 @@
#include "sdm850.dtsi"
#include "pm8998.dtsi"
+/*
+ * Update following upstream (sdm845.dtsi) reserved
+ * memory mappings for firmware loading to succeed
+ * and enable the IPA device.
+ */
+/delete-node/ &ipa_fw_mem;
+/delete-node/ &ipa_gsi_mem;
+/delete-node/ &gpu_mem;
+/delete-node/ &adsp_mem;
+/delete-node/ &wlan_msa_mem;
+
/ {
model = "Lenovo Yoga C630";
compatible = "lenovo,yoga-c630", "qcom,sdm845";
@@ -58,6 +69,29 @@
};
};
+ /* Reserved memory changes for IPA */
+ reserved-memory {
+ wlan_msa_mem: memory@8c400000 {
+ reg = <0 0x8c400000 0 0x100000>;
+ no-map;
+ };
+
+ gpu_mem: memory@8c515000 {
+ reg = <0 0x8c515000 0 0x2000>;
+ no-map;
+ };
+
+ ipa_fw_mem: memory@8c517000 {
+ reg = <0 0x8c517000 0 0x5a000>;
+ no-map;
+ };
+
+ adsp_mem: memory@8c600000 {
+ reg = <0 0x8c600000 0 0x1a00000>;
+ no-map;
+ };
+ };
+
sn65dsi86_refclk: sn65dsi86-refclk {
compatible = "fixed-clock";
#clock-cells = <0>;
diff --git a/dts/src/arm64/qcom/sm8250.dtsi b/dts/src/arm64/qcom/sm8250.dtsi
index 8c15d9fed0..d12e4cbfc8 100644
--- a/dts/src/arm64/qcom/sm8250.dtsi
+++ b/dts/src/arm64/qcom/sm8250.dtsi
@@ -2590,9 +2590,10 @@
power-domains = <&dispcc MDSS_GDSC>;
clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_DISP_HF_AXI_CLK>,
<&gcc GCC_DISP_SF_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>;
- clock-names = "iface", "nrt_bus", "core";
+ clock-names = "iface", "bus", "nrt_bus", "core";
assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
assigned-clock-rates = <460000000>;
diff --git a/dts/src/powerpc/fsl/t1023rdb.dts b/dts/src/powerpc/fsl/t1023rdb.dts
index 5ba6fbfca2..f82f85c659 100644
--- a/dts/src/powerpc/fsl/t1023rdb.dts
+++ b/dts/src/powerpc/fsl/t1023rdb.dts
@@ -154,7 +154,7 @@
fm1mac3: ethernet@e4000 {
phy-handle = <&sgmii_aqr_phy3>;
- phy-connection-type = "sgmii-2500";
+ phy-connection-type = "2500base-x";
sleep = <&rcpm 0x20000000>;
};
diff --git a/fs/devfs-core.c b/fs/devfs-core.c
index 30ad0e0508..3715e543e6 100644
--- a/fs/devfs-core.c
+++ b/fs/devfs-core.c
@@ -301,6 +301,37 @@ int devfs_remove(struct cdev *cdev)
return 0;
}
+static bool region_overlap(loff_t starta, loff_t lena,
+ loff_t startb, loff_t lenb)
+{
+ if (starta + lena <= startb)
+ return 0;
+ if (startb + lenb <= starta)
+ return 0;
+ return 1;
+}
+
+static int check_overlap(struct cdev *cdev, const char *name, loff_t offset, loff_t size)
+{
+ struct cdev *cpart;
+
+ list_for_each_entry(cpart, &cdev->partitions, partition_entry) {
+ if (region_overlap(cpart->offset, cpart->size,
+ offset, size))
+ goto conflict;
+ }
+
+ return 0;
+
+conflict:
+ pr_err("New partition %s (0x%08llx-0x%08llx) on %s "
+ "overlaps with partition %s (0x%08llx-0x%08llx), not creating it\n",
+ name, offset, offset + size - 1, cpart->name,
+ cpart->name, cpart->offset, cpart->offset + cpart->size - 1);
+
+ return -EINVAL;
+}
+
static struct cdev *__devfs_add_partition(struct cdev *cdev,
const struct devfs_partition *partinfo, loff_t *end)
{
@@ -336,6 +367,9 @@ static struct cdev *__devfs_add_partition(struct cdev *cdev,
return ERR_PTR(-EINVAL);
}
+ if (check_overlap(cdev, partinfo->name, offset, size))
+ return ERR_PTR(-EINVAL);
+
if (IS_ENABLED(CONFIG_MTD) && cdev->mtd) {
struct mtd_info *mtd;
diff --git a/fs/pstore/platform.c b/fs/pstore/platform.c
index f4b77226d9..50a1bffdd0 100644
--- a/fs/pstore/platform.c
+++ b/fs/pstore/platform.c
@@ -27,7 +27,7 @@
#include <linux/mutex.h>
#include <console.h>
#include <malloc.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <module.h>
#include "internal.h"
diff --git a/fs/pstore/ram.c b/fs/pstore/ram.c
index 958f46b0ea..0d8bb8f418 100644
--- a/fs/pstore/ram.c
+++ b/fs/pstore/ram.c
@@ -31,7 +31,7 @@
#include <linux/log2.h>
#include <linux/spinlock.h>
#include <malloc.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <stdio.h>
#include <globalvar.h>
#include <init.h>
diff --git a/fs/ramfs.c b/fs/ramfs.c
index 14ba877660..bdaa91dd9e 100644
--- a/fs/ramfs.c
+++ b/fs/ramfs.c
@@ -447,7 +447,6 @@ static int ramfs_probe(struct device_d *dev)
static void ramfs_remove(struct device_d *dev)
{
- free(dev->priv);
}
static struct fs_driver_d ramfs_driver = {
diff --git a/fs/squashfs/squashfs.h b/fs/squashfs/squashfs.h
index 825df2aedd..9ddcfbf1c2 100644
--- a/fs/squashfs/squashfs.h
+++ b/fs/squashfs/squashfs.h
@@ -17,7 +17,7 @@
* squashfs.h
*/
-#include <printk.h>
+#include <linux/printk.h>
#include <fs.h>
#include <linux/fs.h>
#include <linux/kernel.h>
diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h
index 82b78261fc..6aa3eada0e 100644
--- a/include/asm-generic/bug.h
+++ b/include/asm-generic/bug.h
@@ -2,6 +2,8 @@
#define _ASM_GENERIC_BUG_H
#include <linux/compiler.h>
+#include <linux/kernel.h>
+#include <printk.h>
#define BUG() do { \
printf("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \
@@ -28,8 +30,7 @@
int __ret_warn_on = !!(condition); \
if (unlikely(__ret_warn_on)) { \
__WARN(); \
- puts("WARNING: "); \
- printf(format); \
+ printf("WARNING: " format); \
} \
unlikely(__ret_warn_on); \
})
diff --git a/include/common.h b/include/common.h
index 693f5bf970..4167d4676e 100644
--- a/include/common.h
+++ b/include/common.h
@@ -18,7 +18,7 @@
#include <linux/stddef.h>
#include <asm/common.h>
#include <asm/io.h>
-#include <printk.h>
+#include <linux/printk.h>
/*
* sanity check. The Linux Kernel defines only one of __LITTLE_ENDIAN and
@@ -62,15 +62,6 @@ void ctrlc_handled(void);
static inline void ctrlc_handled(void) { }
#endif
-#ifdef CONFIG_ARCH_HAS_STACK_DUMP
-void dump_stack(void);
-#else
-static inline void dump_stack(void)
-{
- printf("no stack data available\n");
-}
-#endif
-
int parse_area_spec(const char *str, loff_t *start, loff_t *size);
/* Just like simple_strtoul(), but this one honors a K/M/G suffix */
@@ -97,8 +88,6 @@ enum autoboot_state do_autoboot_countdown(void);
void __noreturn start_barebox(void);
void shutdown_barebox(void);
-#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
-
/*
* The STACK_ALIGN_ARRAY macro is used to allocate a buffer on the stack that
* meets a minimum alignment requirement.
diff --git a/include/driver.h b/include/driver.h
index c7f5903fce..4f6d40e17c 100644
--- a/include/driver.h
+++ b/include/driver.h
@@ -494,6 +494,7 @@ ssize_t cdev_read(struct cdev *cdev, void *buf, size_t count, loff_t offset, ulo
ssize_t cdev_write(struct cdev *cdev, const void *buf, size_t count, loff_t offset, ulong flags);
int cdev_ioctl(struct cdev *cdev, int cmd, void *buf);
int cdev_erase(struct cdev *cdev, loff_t count, loff_t offset);
+loff_t cdev_unallocated_space(struct cdev *cdev);
#define DEVFS_PARTITION_FIXED (1U << 0)
#define DEVFS_PARTITION_READONLY (1U << 1)
diff --git a/include/image-metadata.h b/include/image-metadata.h
index a9cb9cfe8f..bf4e08d98a 100644
--- a/include/image-metadata.h
+++ b/include/image-metadata.h
@@ -67,7 +67,7 @@ struct imd_entry_crc32 {
static inline int imd_is_crc32(uint32_t type)
{
- return (type & IMD_TYPE_CRC32) ? 1 : 0;
+ return type == IMD_TYPE_CRC32;
}
static inline int imd_crc32_is_valid(uint32_t flags)
@@ -139,12 +139,12 @@ int imd_verify_crc32(void *buf, size_t size);
}
#define BAREBOX_IMD_CRC(_name, _crc, _keep_if_unused) \
- const struct imd_entry_crc32 __barebox_imd_##__name \
- __BAREBOX_IMD_SECTION(.barebox_imd_ ## _keep_if_unused ## _ ## _name) = { \
+ const struct imd_entry_crc32 __barebox_imd_##__name \
+ __BAREBOX_IMD_SECTION(.barebox_imd_ ## _keep_if_unused ## _ ## _name) = { \
.header.type = cpu_to_le32(IMD_TYPE_CRC32), \
.header.datalength = cpu_to_le32(sizeof(uint32_t) * 2), \
.data = _crc, \
- }
+ }
#ifdef CONFIG_IMD
void imd_used(const void *);
diff --git a/include/linux/barebox-wrapper.h b/include/linux/barebox-wrapper.h
index 82c52dd933..83fa9223de 100644
--- a/include/linux/barebox-wrapper.h
+++ b/include/linux/barebox-wrapper.h
@@ -4,6 +4,7 @@
#include <malloc.h>
#include <xfuncs.h>
#include <linux/slab.h>
+#include <printk.h>
#define vmalloc(len) malloc(len)
#define __vmalloc(len, mode, pgsz) malloc(len)
@@ -13,20 +14,6 @@ static inline void vfree(const void *addr)
free((void *)addr);
}
-#define KERN_EMERG "" /* system is unusable */
-#define KERN_ALERT "" /* action must be taken immediately */
-#define KERN_CRIT "" /* critical conditions */
-#define KERN_ERR "" /* error conditions */
-#define KERN_WARNING "" /* warning conditions */
-#define KERN_NOTICE "" /* normal but significant condition */
-#define KERN_INFO "" /* informational */
-#define KERN_DEBUG "" /* debug-level messages */
-#define KERN_CONT ""
-
-#define printk printf
-
-#define pr_warn pr_warning
-
#define __init
#define MODULE_AUTHOR(x)
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index 31345c219d..dd13bf9311 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -24,11 +24,6 @@
#define GENMASK_ULL(h, l) \
(((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
-extern unsigned int __sw_hweight8(unsigned int w);
-extern unsigned int __sw_hweight16(unsigned int w);
-extern unsigned int __sw_hweight32(unsigned int w);
-extern unsigned long __sw_hweight64(__u64 w);
-
/*
* Include this here because some architectures need generic_ffs/fls in
* scope
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 9ccdd60224..4483d33e65 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -15,6 +15,7 @@
#define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0)
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
+#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
/*
* This looks more complex than it should be. But we need to
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index b17e590f5e..f9c4645180 100644
--- a/include/linux/mtd/mtd.h
+++ b/include/linux/mtd/mtd.h
@@ -11,7 +11,7 @@
#include <driver.h>
#include <errno.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <linux/types.h>
#include <linux/list.h>
#include <linux/mtd/mtd-abi.h>
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 97c8554826..d9fb514277 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -207,6 +207,7 @@ struct phy_device {
* phy_id_mask: Defines the important bits of the phy_id
* features: A list of features (speed, duplex, etc) supported
* by this PHY
+ * @driver_data: Static driver data
*
* The drivers must implement config_aneg and read_status. All
* other functions are optional. Note that none of these
@@ -220,6 +221,7 @@ struct phy_driver {
u32 phy_id;
unsigned int phy_id_mask;
u32 features;
+ const void *driver_data;
/*
* Called to initialize the PHY,
diff --git a/include/linux/printk.h b/include/linux/printk.h
new file mode 100644
index 0000000000..3f370adb90
--- /dev/null
+++ b/include/linux/printk.h
@@ -0,0 +1,173 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __LINUX_PRINTK_H
+#define __LINUX_PRINTK_H
+
+#include <linux/list.h>
+#include <printk.h>
+
+#define MSG_EMERG 0 /* system is unusable */
+#define MSG_ALERT 1 /* action must be taken immediately */
+#define MSG_CRIT 2 /* critical conditions */
+#define MSG_ERR 3 /* error conditions */
+#define MSG_WARNING 4 /* warning conditions */
+#define MSG_NOTICE 5 /* normal but significant condition */
+#define MSG_INFO 6 /* informational */
+#define MSG_DEBUG 7 /* debug-level messages */
+#define MSG_VDEBUG 8 /* verbose debug messages */
+
+#ifdef VERBOSE_DEBUG
+#define LOGLEVEL MSG_VDEBUG
+#elif defined DEBUG
+#define LOGLEVEL MSG_DEBUG
+#else
+#define LOGLEVEL CONFIG_COMPILE_LOGLEVEL
+#endif
+
+/* debugging and troubleshooting/diagnostic helpers. */
+struct device_d;
+
+#ifndef CONFIG_CONSOLE_NONE
+int dev_printf(int level, const struct device_d *dev, const char *format, ...)
+ __attribute__ ((format(__printf__, 3, 4)));
+#else
+static inline int dev_printf(int level, const struct device_d *dev, const char *format, ...)
+{
+ return 0;
+}
+#endif
+
+#if (!defined(__PBL__) && !defined(CONFIG_CONSOLE_NONE)) || \
+ (defined(__PBL__) && defined(CONFIG_PBL_CONSOLE))
+int pr_print(int level, const char *format, ...)
+ __attribute__ ((format(__printf__, 2, 3)));
+#else
+static int pr_print(int level, const char *format, ...)
+ __attribute__ ((format(__printf__, 2, 3)));
+static inline int pr_print(int level, const char *format, ...)
+{
+ return 0;
+}
+#endif
+
+#define __dev_printf(level, dev, format, args...) \
+ ({ \
+ (level) <= LOGLEVEL ? dev_printf((level), (dev), (format), ##args) : 0; \
+ })
+
+
+#define dev_emerg(dev, format, arg...) \
+ __dev_printf(0, (dev) , format , ## arg)
+#define dev_alert(dev, format, arg...) \
+ __dev_printf(1, (dev) , format , ## arg)
+#define dev_crit(dev, format, arg...) \
+ __dev_printf(2, (dev) , format , ## arg)
+#define dev_err(dev, format, arg...) \
+ __dev_printf(3, (dev) , format , ## arg)
+#define dev_warn(dev, format, arg...) \
+ __dev_printf(4, (dev) , format , ## arg)
+#define dev_notice(dev, format, arg...) \
+ __dev_printf(5, (dev) , format , ## arg)
+#define dev_info(dev, format, arg...) \
+ __dev_printf(6, (dev) , format , ## arg)
+#define dev_dbg(dev, format, arg...) \
+ __dev_printf(7, (dev) , format , ## arg)
+#define dev_vdbg(dev, format, arg...) \
+ __dev_printf(8, (dev) , format , ## arg)
+
+#define __pr_printk(level, format, args...) \
+ ({ \
+ (level) <= LOGLEVEL ? pr_print((level), (format), ##args) : 0; \
+ })
+
+#ifndef pr_fmt
+#define pr_fmt(fmt) fmt
+#endif
+
+#define pr_emerg(fmt, arg...) __pr_printk(0, pr_fmt(fmt), ##arg)
+#define pr_alert(fmt, arg...) __pr_printk(1, pr_fmt(fmt), ##arg)
+#define pr_crit(fmt, arg...) __pr_printk(2, pr_fmt(fmt), ##arg)
+#define pr_err(fmt, arg...) __pr_printk(3, pr_fmt(fmt), ##arg)
+#define pr_warning(fmt, arg...) __pr_printk(4, pr_fmt(fmt), ##arg)
+#define pr_notice(fmt, arg...) __pr_printk(5, pr_fmt(fmt), ##arg)
+#define pr_info(fmt, arg...) __pr_printk(6, pr_fmt(fmt), ##arg)
+#define pr_debug(fmt, arg...) __pr_printk(7, pr_fmt(fmt), ##arg)
+#define debug(fmt, arg...) __pr_printk(7, pr_fmt(fmt), ##arg)
+#define pr_vdebug(fmt, arg...) __pr_printk(8, pr_fmt(fmt), ##arg)
+#define pr_cont(fmt, arg...) __pr_printk(-1, fmt, ##arg)
+
+#define pr_warn pr_warning
+
+int memory_display(const void *addr, loff_t offs, unsigned nbytes, int size,
+ int swab);
+int __pr_memory_display(int level, const void *addr, loff_t offs, unsigned nbytes,
+ int size, int swab, const char *format, ...);
+
+#define pr_memory_display(level, addr, offs, nbytes, size, swab) \
+ ({ \
+ (level) <= LOGLEVEL ? __pr_memory_display((level), (addr), \
+ (offs), (nbytes), (size), (swab), pr_fmt("")) : 0; \
+ })
+
+struct log_entry {
+ struct list_head list;
+ char *msg;
+ void *dummy;
+ uint64_t timestamp;
+ int level;
+};
+
+extern struct list_head barebox_logbuf;
+
+extern void log_clean(unsigned int limit);
+
+#define BAREBOX_LOG_PRINT_RAW BIT(2)
+#define BAREBOX_LOG_DIFF_TIME BIT(1)
+#define BAREBOX_LOG_PRINT_TIME BIT(0)
+
+#define BAREBOX_LOG_PRINT_VDEBUG BIT(8)
+#define BAREBOX_LOG_PRINT_DEBUG BIT(7)
+#define BAREBOX_LOG_PRINT_INFO BIT(6)
+#define BAREBOX_LOG_PRINT_NOTICE BIT(5)
+#define BAREBOX_LOG_PRINT_WARNING BIT(4)
+#define BAREBOX_LOG_PRINT_ERR BIT(3)
+#define BAREBOX_LOG_PRINT_CRIT BIT(2)
+#define BAREBOX_LOG_PRINT_ALERT BIT(1)
+#define BAREBOX_LOG_PRINT_EMERG BIT(0)
+
+int log_writefile(const char *filepath);
+void log_print(unsigned flags, unsigned levels);
+
+struct va_format {
+ const char *fmt;
+ va_list *va;
+};
+
+#if LOGLEVEL >= MSG_DEBUG
+#define print_hex_dump_debug(prefix_str, prefix_type, rowsize, \
+ groupsize, buf, len, ascii) \
+ print_hex_dump(KERN_DEBUG, prefix_str, prefix_type, rowsize, \
+ groupsize, buf, len, ascii)
+#else
+static inline void print_hex_dump_debug(const char *prefix_str, int prefix_type,
+ int rowsize, int groupsize,
+ const void *buf, size_t len, bool ascii)
+{
+}
+#endif
+
+/**
+ * print_hex_dump_bytes - shorthand form of print_hex_dump() with default params
+ * @prefix_str: string to prefix each line with;
+ * caller supplies trailing spaces for alignment if desired
+ * @prefix_type: controls whether prefix of an offset, address, or none
+ * is printed (%DUMP_PREFIX_OFFSET, %DUMP_PREFIX_ADDRESS, %DUMP_PREFIX_NONE)
+ * @buf: data blob to dump
+ * @len: number of bytes in the @buf
+ *
+ * Calls print_hex_dump(), with log level of KERN_DEBUG,
+ * rowsize of 16, groupsize of 1, and ASCII output included.
+ */
+#define print_hex_dump_bytes(prefix_str, prefix_type, buf, len) \
+ print_hex_dump_debug(prefix_str, prefix_type, 16, 1, buf, len, true)
+
+#endif
diff --git a/include/of.h b/include/of.h
index f9c2b283de..1b7392cdb3 100644
--- a/include/of.h
+++ b/include/of.h
@@ -279,6 +279,7 @@ extern struct device_d *of_device_enable_and_register_by_name(const char *name);
extern struct device_d *of_device_enable_and_register_by_alias(
const char *alias);
+extern struct device_d *of_device_create_on_demand(struct device_node *np);
extern int of_device_ensure_probed(struct device_node *np);
extern int of_device_ensure_probed_by_alias(const char *alias);
extern int of_devices_ensure_probed_by_property(const char *property_name);
@@ -372,6 +373,11 @@ static inline void of_platform_device_dummy_drv(struct device_d *dev)
{
}
+static inline struct device_d *of_device_create_on_demand(struct device_node *np)
+{
+ return NULL;
+}
+
static inline int of_device_ensure_probed(struct device_node *np)
{
return 0;
diff --git a/include/printk.h b/include/printk.h
index f83ad3bf07..baf2cca202 100644
--- a/include/printk.h
+++ b/include/printk.h
@@ -2,97 +2,28 @@
#ifndef __PRINTK_H
#define __PRINTK_H
-#include <linux/list.h>
-
-#define MSG_EMERG 0 /* system is unusable */
-#define MSG_ALERT 1 /* action must be taken immediately */
-#define MSG_CRIT 2 /* critical conditions */
-#define MSG_ERR 3 /* error conditions */
-#define MSG_WARNING 4 /* warning conditions */
-#define MSG_NOTICE 5 /* normal but significant condition */
-#define MSG_INFO 6 /* informational */
-#define MSG_DEBUG 7 /* debug-level messages */
-#define MSG_VDEBUG 8 /* verbose debug messages */
-
-#ifdef VERBOSE_DEBUG
-#define LOGLEVEL MSG_VDEBUG
-#elif defined DEBUG
-#define LOGLEVEL MSG_DEBUG
-#else
-#define LOGLEVEL CONFIG_COMPILE_LOGLEVEL
-#endif
-
-/* debugging and troubleshooting/diagnostic helpers. */
-struct device_d;
-
-#ifndef CONFIG_CONSOLE_NONE
-int dev_printf(int level, const struct device_d *dev, const char *format, ...)
- __attribute__ ((format(__printf__, 3, 4)));
-#else
-static inline int dev_printf(int level, const struct device_d *dev, const char *format, ...)
-{
- return 0;
-}
-#endif
+#define KERN_EMERG "" /* system is unusable */
+#define KERN_ALERT "" /* action must be taken immediately */
+#define KERN_CRIT "" /* critical conditions */
+#define KERN_ERR "" /* error conditions */
+#define KERN_WARNING "" /* warning conditions */
+#define KERN_NOTICE "" /* normal but significant condition */
+#define KERN_INFO "" /* informational */
+#define KERN_DEBUG "" /* debug-level messages */
+#define KERN_CONT ""
#if (!defined(__PBL__) && !defined(CONFIG_CONSOLE_NONE)) || \
(defined(__PBL__) && defined(CONFIG_PBL_CONSOLE))
-int pr_print(int level, const char *format, ...)
- __attribute__ ((format(__printf__, 2, 3)));
+int printf(const char *fmt, ...) __attribute__ ((format(__printf__, 1, 2)));
#else
-static int pr_print(int level, const char *format, ...)
- __attribute__ ((format(__printf__, 2, 3)));
-static inline int pr_print(int level, const char *format, ...)
+static int printf(const char *fmt, ...) __attribute__ ((format(__printf__, 1, 2)));
+static inline int printf(const char *fmt, ...)
{
return 0;
}
#endif
-#define __dev_printf(level, dev, format, args...) \
- ({ \
- (level) <= LOGLEVEL ? dev_printf((level), (dev), (format), ##args) : 0; \
- })
-
-
-#define dev_emerg(dev, format, arg...) \
- __dev_printf(0, (dev) , format , ## arg)
-#define dev_alert(dev, format, arg...) \
- __dev_printf(1, (dev) , format , ## arg)
-#define dev_crit(dev, format, arg...) \
- __dev_printf(2, (dev) , format , ## arg)
-#define dev_err(dev, format, arg...) \
- __dev_printf(3, (dev) , format , ## arg)
-#define dev_warn(dev, format, arg...) \
- __dev_printf(4, (dev) , format , ## arg)
-#define dev_notice(dev, format, arg...) \
- __dev_printf(5, (dev) , format , ## arg)
-#define dev_info(dev, format, arg...) \
- __dev_printf(6, (dev) , format , ## arg)
-#define dev_dbg(dev, format, arg...) \
- __dev_printf(7, (dev) , format , ## arg)
-#define dev_vdbg(dev, format, arg...) \
- __dev_printf(8, (dev) , format , ## arg)
-
-#define __pr_printk(level, format, args...) \
- ({ \
- (level) <= LOGLEVEL ? pr_print((level), (format), ##args) : 0; \
- })
-
-#ifndef pr_fmt
-#define pr_fmt(fmt) fmt
-#endif
-
-#define pr_emerg(fmt, arg...) __pr_printk(0, pr_fmt(fmt), ##arg)
-#define pr_alert(fmt, arg...) __pr_printk(1, pr_fmt(fmt), ##arg)
-#define pr_crit(fmt, arg...) __pr_printk(2, pr_fmt(fmt), ##arg)
-#define pr_err(fmt, arg...) __pr_printk(3, pr_fmt(fmt), ##arg)
-#define pr_warning(fmt, arg...) __pr_printk(4, pr_fmt(fmt), ##arg)
-#define pr_notice(fmt, arg...) __pr_printk(5, pr_fmt(fmt), ##arg)
-#define pr_info(fmt, arg...) __pr_printk(6, pr_fmt(fmt), ##arg)
-#define pr_debug(fmt, arg...) __pr_printk(7, pr_fmt(fmt), ##arg)
-#define debug(fmt, arg...) __pr_printk(7, pr_fmt(fmt), ##arg)
-#define pr_vdebug(fmt, arg...) __pr_printk(8, pr_fmt(fmt), ##arg)
-#define pr_cont(fmt, arg...) __pr_printk(-1, fmt, ##arg)
+#define printk printf
#define printk_once(fmt, ...) \
({ \
@@ -104,51 +35,6 @@ static inline int pr_print(int level, const char *format, ...)
} \
})
-int memory_display(const void *addr, loff_t offs, unsigned nbytes, int size,
- int swab);
-int __pr_memory_display(int level, const void *addr, loff_t offs, unsigned nbytes,
- int size, int swab, const char *format, ...);
-
-#define pr_memory_display(level, addr, offs, nbytes, size, swab) \
- ({ \
- (level) <= LOGLEVEL ? __pr_memory_display((level), (addr), \
- (offs), (nbytes), (size), (swab), pr_fmt("")) : 0; \
- })
-
-struct log_entry {
- struct list_head list;
- char *msg;
- void *dummy;
- uint64_t timestamp;
- int level;
-};
-
-extern struct list_head barebox_logbuf;
-
-extern void log_clean(unsigned int limit);
-
-#define BAREBOX_LOG_PRINT_RAW BIT(2)
-#define BAREBOX_LOG_DIFF_TIME BIT(1)
-#define BAREBOX_LOG_PRINT_TIME BIT(0)
-
-#define BAREBOX_LOG_PRINT_VDEBUG BIT(8)
-#define BAREBOX_LOG_PRINT_DEBUG BIT(7)
-#define BAREBOX_LOG_PRINT_INFO BIT(6)
-#define BAREBOX_LOG_PRINT_NOTICE BIT(5)
-#define BAREBOX_LOG_PRINT_WARNING BIT(4)
-#define BAREBOX_LOG_PRINT_ERR BIT(3)
-#define BAREBOX_LOG_PRINT_CRIT BIT(2)
-#define BAREBOX_LOG_PRINT_ALERT BIT(1)
-#define BAREBOX_LOG_PRINT_EMERG BIT(0)
-
-int log_writefile(const char *filepath);
-void log_print(unsigned flags, unsigned levels);
-
-struct va_format {
- const char *fmt;
- va_list *va;
-};
-
enum {
DUMP_PREFIX_NONE,
DUMP_PREFIX_ADDRESS,
@@ -161,32 +47,14 @@ extern void print_hex_dump(const char *level, const char *prefix_str,
int prefix_type, int rowsize, int groupsize,
const void *buf, size_t len, bool ascii);
-#if LOGLEVEL >= MSG_DEBUG
-#define print_hex_dump_debug(prefix_str, prefix_type, rowsize, \
- groupsize, buf, len, ascii) \
- print_hex_dump(KERN_DEBUG, prefix_str, prefix_type, rowsize, \
- groupsize, buf, len, ascii)
+#ifdef CONFIG_ARCH_HAS_STACK_DUMP
+void dump_stack(void);
#else
-static inline void print_hex_dump_debug(const char *prefix_str, int prefix_type,
- int rowsize, int groupsize,
- const void *buf, size_t len, bool ascii)
+static inline void dump_stack(void)
{
+ printf("no stack data available\n");
}
#endif
-/**
- * print_hex_dump_bytes - shorthand form of print_hex_dump() with default params
- * @prefix_str: string to prefix each line with;
- * caller supplies trailing spaces for alignment if desired
- * @prefix_type: controls whether prefix of an offset, address, or none
- * is printed (%DUMP_PREFIX_OFFSET, %DUMP_PREFIX_ADDRESS, %DUMP_PREFIX_NONE)
- * @buf: data blob to dump
- * @len: number of bytes in the @buf
- *
- * Calls print_hex_dump(), with log level of KERN_DEBUG,
- * rowsize of 16, groupsize of 1, and ASCII output included.
- */
-#define print_hex_dump_bytes(prefix_str, prefix_type, buf, len) \
- print_hex_dump_debug(prefix_str, prefix_type, 16, 1, buf, len, true)
#endif
diff --git a/include/stdio.h b/include/stdio.h
index 1cb11e88de..49f3d0cf77 100644
--- a/include/stdio.h
+++ b/include/stdio.h
@@ -4,6 +4,7 @@
#include <stdarg.h>
#include <console.h>
+#include <printk.h>
/*
* STDIO based functions (can always be used)
@@ -71,8 +72,6 @@ static inline int ctrlc (void)
#if (!defined(__PBL__) && !defined(CONFIG_CONSOLE_NONE)) || \
(defined(__PBL__) && defined(CONFIG_PBL_CONSOLE))
-int printf(const char *fmt, ...) __attribute__ ((format(__printf__, 1, 2)));
-
static inline int puts(const char *s)
{
return console_puts(CONSOLE_STDOUT, s);
@@ -83,11 +82,6 @@ static inline void putchar(char c)
console_putc(CONSOLE_STDOUT, c);
}
#else
-static int printf(const char *fmt, ...) __attribute__ ((format(__printf__, 1, 2)));
-static inline int printf(const char *fmt, ...)
-{
- return 0;
-}
static inline int puts(const char *s)
{
return 0;
diff --git a/lib/hexdump.c b/lib/hexdump.c
index 93f345e881..fb80ef9724 100644
--- a/lib/hexdump.c
+++ b/lib/hexdump.c
@@ -7,7 +7,7 @@
#include <linux/types.h>
#include <linux/ctype.h>
#include <linux/log2.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <asm/unaligned.h>
const char hex_asc[] = "0123456789abcdef";
diff --git a/lib/kasan/report.c b/lib/kasan/report.c
index b7b2d032ee..79442c00f4 100644
--- a/lib/kasan/report.c
+++ b/lib/kasan/report.c
@@ -17,7 +17,7 @@
#include <common.h>
#include <linux/bitops.h>
#include <linux/kernel.h>
-#include <printk.h>
+#include <linux/printk.h>
#include <asm-generic/sections.h>
#include "kasan.h"
diff --git a/lib/logo/Kconfig b/lib/logo/Kconfig
index 0718053e5c..7d55f7fa27 100644
--- a/lib/logo/Kconfig
+++ b/lib/logo/Kconfig
@@ -1,9 +1,9 @@
menuconfig BAREBOX_LOGO
bool "include barebox logos in build"
help
- Say yes here to build the barebox logos. This adds inkscape to the build
- dependencies. The logo can be found under /logo/barebox-logo-<width>.png
- in the running barebox.
+ Say yes here to build the barebox logos. This adds ImageMagick's
+ convert tool to the build dependencies. The logo can be found under
+ /logo/barebox-logo-<width>.png in the running barebox.
if BAREBOX_LOGO
diff --git a/lib/logo/Makefile b/lib/logo/Makefile
index 4149d4ff6c..f08beef76b 100644
--- a/lib/logo/Makefile
+++ b/lib/logo/Makefile
@@ -1,17 +1,17 @@
-OPTS_barebox-logo-w64.bblogo = --export-width=64
+OPTS_barebox-logo-w64.bblogo = -resize 64
bblogo-$(CONFIG_BAREBOX_LOGO_64) += barebox-logo-w64
-OPTS_barebox-logo-w240.bblogo = --export-width=240
+OPTS_barebox-logo-w240.bblogo = -resize 240
bblogo-$(CONFIG_BAREBOX_LOGO_240) += barebox-logo-w240
-OPTS_barebox-logo-w320.bblogo = --export-width=320
+OPTS_barebox-logo-w320.bblogo = -resize 320
bblogo-$(CONFIG_BAREBOX_LOGO_320) += barebox-logo-w320
-OPTS_barebox-logo-w400.bblogo = --export-width=400
+OPTS_barebox-logo-w400.bblogo = -resize 400
bblogo-$(CONFIG_BAREBOX_LOGO_400) += barebox-logo-w400
-OPTS_barebox-logo-w640.bblogo = --export-width=640
+OPTS_barebox-logo-w640.bblogo = -resize 640
bblogo-$(CONFIG_BAREBOX_LOGO_640) += barebox-logo-w640
obj-y += $(patsubst %,%.bblogo.o,$(bblogo-y))
@@ -38,15 +38,12 @@ cmd_logo_S = \
%.bblogo.S: %.bblogo FORCE
$(call if_changed,logo_S)
-# Inkscape 0.92.4 supports -z -e but Inkscape 1.0 uses --export-type=png
-INKSCAPEOPTS += $(call try-run, inkscape -z -e -,-z -e -,--export-type=png)
-# Inkscape 1.0 supports -o -
-INKSCAPEOPTS += $(call try-run, inkscape -o -,-o -,)
+CONVERTOPTS += -background none
-quiet_cmd_logo = LOGO.S $@
+quiet_cmd_logo = PNG $@
cmd_logo = \
( \
- inkscape $(OPTS_$(@F)) $(INKSCAPEOPTS) $< > $@; \
+ convert $(OPTS_$(@F)) $(CONVERTOPTS) $< png:$@; \
)
%.bblogo: $(srctree)/Documentation/barebox.svg FORCE
diff --git a/pbl/fdt.c b/pbl/fdt.c
index 18ddb9f48a..7a913c546a 100644
--- a/pbl/fdt.c
+++ b/pbl/fdt.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
#include <linux/libfdt.h>
#include <pbl.h>
-#include <printk.h>
+#include <linux/printk.h>
void fdt_find_mem(const void *fdt, unsigned long *membase, unsigned long *memsize)
{
diff --git a/scripts/.gitignore b/scripts/.gitignore
index cf645ec746..ae70c92af8 100644
--- a/scripts/.gitignore
+++ b/scripts/.gitignore
@@ -31,6 +31,8 @@ omap4_usbboot
omap4_usbboot-target
omap3-usb-loader
omap3-usb-loader-target
+rk-usb-loader
+rk-usb-loader-target
mips-relocs
rsatoc
stm32image
diff --git a/scripts/Kconfig b/scripts/Kconfig
index a490aaa44e..9b744deba9 100644
--- a/scripts/Kconfig
+++ b/scripts/Kconfig
@@ -12,6 +12,69 @@ config COMPILE_HOST_TOOLS
source "scripts/imx/Kconfig"
+config SOCFPGA_MKIMAGE
+ bool "SoCFPGA mkimage" if COMPILE_HOST_TOOLS
+ depends on ARCH_SOCFPGA || COMPILE_HOST_TOOLS
+ default y if ARCH_SOCFPGA
+ help
+ This enables building the image creation tool for SoCFPGA
+
+config ZYNQ_MKIMAGE
+ bool "Zynq mkimage" if COMPILE_HOST_TOOLS
+ depends on ARCH_ZYNQ || COMPILE_HOST_TOOLS
+ default y if ARCH_ZYNQ
+ help
+ This enables building the image creation tool for Zynq
+
+config MXS_HOSTTOOLS
+ bool "MXS host tools" if COMPILE_HOST_TOOLS
+ depends on ARCH_MXS || COMPILE_HOST_TOOLS
+ default y if ARCH_MXS
+ help
+ This enables building the host tools for Freescale MXS SoCs
+
+config LAYERSCAPE_PBLIMAGE
+ bool "Layerscape PBL image tool" if COMPILE_HOST_TOOLS
+ depends on ARCH_LAYERSCAPE || COMPILE_HOST_TOOLS
+ default y if ARCH_LAYERSCAPE
+ help
+ This enables building the PBL image tool for Freescale Layerscape SoCs
+
+config STM32_IMAGE
+ bool "STM32MP image tool" if COMPILE_HOST_TOOLS
+ depends on ARCH_STM32MP || COMPILE_HOST_TOOLS
+ default y if ARCH_STM32MP
+ help
+ This enables building the image creation tool for STM32MP SoCs
+
+config RK_IMAGE
+ bool "Rockchip image tool" if COMPILE_HOST_TOOLS
+ depends on ARCH_ROCKCHIP || COMPILE_HOST_TOOLS
+ default y if ARCH_ROCKCHIP
+ help
+ This enables building the image creation tool for Rockchip SoCs
+
+config OMAP_IMAGE
+ bool "TI OMAP image tools" if COMPILE_HOST_TOOLS
+ depends on ARCH_OMAP || COMPILE_HOST_TOOLS
+ default y if ARCH_OMAP
+ help
+ This enables building the image creation tools for TI OMAP SoCs
+
+config S5P_IMAGE
+ bool "S5P image tool" if COMPILE_HOST_TOOLS
+ depends on ARCH_S5PCxx || COMPILE_HOST_TOOLS
+ default y if ARCH_S5PCxx
+ help
+ This enables building the image creation tool for S5P SoCs
+
+config DAVINCI_IMAGE
+ bool "Davinci image tool" if COMPILE_HOST_TOOLS
+ depends on ARCH_DAVINCI || COMPILE_HOST_TOOLS
+ default y if ARCH_DAVINCI
+ help
+ This enables building the image creation tool for Davinci SoCs
+
config MVEBU_HOSTTOOLS
bool "mvebu hosttools" if COMPILE_HOST_TOOLS
depends on ARCH_MVEBU || COMPILE_HOST_TOOLS
@@ -39,6 +102,14 @@ config OMAP4_HOSTTOOL_USBBOOT
You need libusb-1.0 to compile this tool.
+config RK_USB_LOADER
+ bool "Rockchip USB loader"
+ depends on ARCH_ROCKCHIP || COMPILE_HOST_TOOLS
+ help
+ Say Y here to build the rockchip usb loader tool.
+
+ You need libusb-1.0 to compile this tool.
+
endmenu
menu "Target Tools"
@@ -104,4 +175,11 @@ config OMAP4_USBBOOT_TARGET
Say Y here to build the omap4 usb loader tool for the target.
The cross toolchain needs libusb-1.0 to compile this tool.
+config RK_USB_LOADER_TARGET
+ bool "Rockchip USB loader for target"
+ depends on HAS_TARGET_LIBUSB_1_0
+ help
+ Say Y here to build the rockchip usb loader tool for the target.
+ The cross toolchain needs libusb-1.0 to compile this tool.
+
endmenu
diff --git a/scripts/Makefile b/scripts/Makefile
index 1527b07d47..dc5fa75f90 100644
--- a/scripts/Makefile
+++ b/scripts/Makefile
@@ -15,17 +15,17 @@ hostprogs-always-$(CONFIG_IMD) += bareboximd
hostprogs-always-$(CONFIG_KALLSYMS) += kallsyms
hostprogs-always-$(CONFIG_MIPS) += mips-relocs
hostprogs-always-$(CONFIG_MVEBU_HOSTTOOLS) += kwbimage kwboot mvebuimg
-hostprogs-always-$(CONFIG_ARCH_OMAP) += omap_signGP mk-omap-image
-hostprogs-always-$(CONFIG_ARCH_S5PCxx) += s5p_cksum
-hostprogs-always-$(CONFIG_ARCH_DAVINCI) += mkublheader
+hostprogs-always-$(CONFIG_OMAP_IMAGE) += omap_signGP mk-omap-image
+hostprogs-always-$(CONFIG_S5P_IMAGE) += s5p_cksum
+hostprogs-always-$(CONFIG_DAVINCI_IMAGE) += mkublheader
HOSTCFLAGS_zynq_mkimage.o = -I$(srctree) -I$(srctree)/arch/arm/mach-zynq/include
-hostprogs-always-$(CONFIG_ARCH_ZYNQ) += zynq_mkimage
-hostprogs-always-$(CONFIG_ARCH_SOCFPGA) += socfpga_mkimage
-hostprogs-always-$(CONFIG_ARCH_MXS) += mxsimage mxsboot
-hostprogs-always-$(CONFIG_ARCH_LAYERSCAPE) += pblimage
-hostprogs-always-$(CONFIG_ARCH_STM32MP) += stm32image
+hostprogs-always-$(CONFIG_ZYNQ_MKIMAGE) += zynq_mkimage
+hostprogs-always-$(CONFIG_SOCFPGA_MKIMAGE) += socfpga_mkimage
+hostprogs-always-$(CONFIG_MXS_HOSTTOOLS) += mxsimage mxsboot
+hostprogs-always-$(CONFIG_LAYERSCAPE_PBLIMAGE) += pblimage
+hostprogs-always-$(CONFIG_STM32_IMAGE) += stm32image
hostprogs-always-$(CONFIG_RISCV) += prelink-riscv
-hostprogs-always-$(CONFIG_ARCH_ROCKCHIP) += rkimage
+hostprogs-always-$(CONFIG_RK_IMAGE) += rkimage
HOSTCFLAGS_rkimage = `pkg-config --cflags openssl`
HOSTLDLIBS_rkimage = `pkg-config --libs openssl`
KBUILD_HOSTCFLAGS += -I$(srctree)/scripts/include/
@@ -36,6 +36,9 @@ hostprogs-always-$(CONFIG_OMAP3_USB_LOADER) += omap3-usb-loader
HOSTCFLAGS_omap4_usbboot.o = `pkg-config --cflags libusb-1.0`
HOSTLDLIBS_omap4_usbboot = -lpthread `pkg-config --libs libusb-1.0`
hostprogs-always-$(CONFIG_OMAP4_HOSTTOOL_USBBOOT) += omap4_usbboot
+HOSTCFLAGS_rk-usb-loader.o = `pkg-config --cflags libusb-1.0`
+HOSTLDLIBS_rk-usb-loader = `pkg-config --libs libusb-1.0`
+hostprogs-always-$(CONFIG_RK_USB_LOADER) += rk-usb-loader
userprogs-always-$(CONFIG_BAREBOXENV_TARGET) += bareboxenv-target
userprogs-always-$(CONFIG_KERNEL_INSTALL_TARGET) += kernel-install-target
@@ -44,11 +47,14 @@ userprogs-always-$(CONFIG_IMD_TARGET) += bareboximd-target
userprogs-always-$(CONFIG_OMAP3_USB_LOADER_TARGET) += omap3-usb-loader-target
userprogs-always-$(CONFIG_OMAP4_USBBOOT_TARGET) += omap4_usbboot-target
userprogs-always-$(CONFIG_MVEBU_KWBOOT_TARGET) += kwboot-target
+userprogs-always-$(CONFIG_RK_USB_LOADER_TARGET) += rk-usb-loader-target
omap3-usb-loader-target-userccflags += `$(CROSS_PKG_CONFIG) --cflags libusb-1.0`
omap3-usb-loader-target-userldlibs += `$(CROSS_PKG_CONFIG) --libs libusb-1.0`
omap4_usbboot-target-userccflags += `$(CROSS_PKG_CONFIG) --cflags libusb-1.0`
omap4_usbboot-target-userldlibs += -lpthread `$(CROSS_PKG_CONFIG) --libs libusb-1.0`
+rk-usb-loader-target-userccflags += `$(CROSS_PKG_CONFIG) --cflags libusb-1.0`
+rk-usb-loader-target-userldlibs += `$(CROSS_PKG_CONFIG) --libs libusb-1.0`
userccflags += -I $(srctree)/$(src)/include -isystem $(srctree)/scripts/include
diff --git a/scripts/bareboximd.c b/scripts/bareboximd.c
index c3dcb4dcf0..a734399aa5 100644
--- a/scripts/bareboximd.c
+++ b/scripts/bareboximd.c
@@ -17,6 +17,8 @@
#include <linux/kernel.h>
#include <sys/mman.h>
+#include "common.h"
+#include "common.c"
#include "../include/image-metadata.h"
#define eprintf(args...) fprintf(stderr, ## args)
@@ -40,104 +42,6 @@ int imd_command_setenv(const char *variable_name, const char *value)
return -EINVAL;
}
-static int write_file(const char *filename, const void *buf, size_t size)
-{
- int fd, ret = 0;
- int now;
-
- fd = open(filename, O_WRONLY | O_TRUNC | O_CREAT, S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
- if (fd < 0)
- return fd;
-
- while (size) {
- now = write(fd, buf, size);
- if (now < 0) {
- ret = now;
- goto out;
- }
- size -= now;
- buf += now;
- }
-
-out:
- close(fd);
-
- return ret;
-}
-
-static int read_file_2(const char *filename, size_t *size, void **outbuf, size_t max_size)
-{
- off_t fsize;
- ssize_t rsize;
- int ret, fd;
- void *buf;
-
- *size = 0;
- *outbuf = NULL;
-
- fd = open(filename, O_RDONLY);
- if (fd < 0) {
- fprintf(stderr, "Cannot open %s: %s\n", filename, strerror(errno));
- return -errno;
- }
-
- fsize = lseek(fd, 0, SEEK_END);
- if (fsize == -1) {
- fprintf(stderr, "Cannot get size %s: %s\n", filename, strerror(errno));
- ret = -errno;
- goto close;
- }
-
- if (fsize < max_size)
- max_size = fsize;
-
- if (lseek(fd, 0, SEEK_SET) == -1) {
- fprintf(stderr, "Cannot seek to start %s: %s\n", filename, strerror(errno));
- ret = -errno;
- goto close;
- }
-
- buf = mmap(NULL, max_size, PROT_READ, MAP_SHARED, fd, 0);
- if (buf == MAP_FAILED ) {
- buf = malloc(max_size);
- if (!buf) {
- fprintf(stderr, "Cannot allocate memory\n");
- ret = -ENOMEM;
- goto close;
- }
-
- *outbuf = buf;
-
- while (*size < max_size) {
- rsize = read(fd, buf, max_size - *size);
- if (rsize == 0) {
- ret = -EIO;
- goto free;
- }
-
- if (rsize < 0) {
- ret = -errno;
- goto free;
- }
-
- buf += rsize;
- *size += rsize;
- }
- } else {
- *outbuf = buf;
- *size = max_size;
- }
-
- ret = 0;
- goto close;
-free:
- *outbuf = NULL;
- free(buf);
-close:
- close(fd);
- return ret;
-}
-
static inline void read_file_2_free(void *buf)
{
/*
diff --git a/scripts/common.c b/scripts/common.c
new file mode 100644
index 0000000000..b780b09941
--- /dev/null
+++ b/scripts/common.c
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+#include <stdio.h>
+#include <sys/types.h>
+#include <stdint.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include <errno.h>
+#include <stdarg.h>
+#include <sys/mman.h>
+
+#include "common.h"
+
+int read_file_2(const char *filename, size_t *size, void **outbuf, size_t max_size)
+{
+ off_t fsize;
+ ssize_t rsize;
+ int ret, fd;
+ void *buf;
+
+ *size = 0;
+ *outbuf = NULL;
+
+ fd = open(filename, O_RDONLY);
+ if (fd < 0) {
+ fprintf(stderr, "Cannot open %s: %s\n", filename, strerror(errno));
+ return -errno;
+ }
+
+ fsize = lseek(fd, 0, SEEK_END);
+ if (fsize == -1) {
+ fprintf(stderr, "Cannot get size %s: %s\n", filename, strerror(errno));
+ ret = -errno;
+ goto close;
+ }
+
+ if (fsize < max_size)
+ max_size = fsize;
+
+ if (lseek(fd, 0, SEEK_SET) == -1) {
+ fprintf(stderr, "Cannot seek to start %s: %s\n", filename, strerror(errno));
+ ret = -errno;
+ goto close;
+ }
+
+ buf = mmap(NULL, max_size, PROT_READ | PROT_WRITE, MAP_PRIVATE, fd, 0);
+ if (buf == MAP_FAILED ) {
+ buf = malloc(max_size);
+ if (!buf) {
+ fprintf(stderr, "Cannot allocate memory\n");
+ ret = -ENOMEM;
+ goto close;
+ }
+
+ *outbuf = buf;
+
+ while (*size < max_size) {
+ rsize = read(fd, buf, max_size - *size);
+ if (rsize == 0) {
+ ret = -EIO;
+ goto free;
+ }
+
+ if (rsize < 0) {
+ ret = -errno;
+ goto free;
+ }
+
+ buf += rsize;
+ *size += rsize;
+ }
+ } else {
+ *outbuf = buf;
+ *size = max_size;
+ }
+
+ ret = 0;
+ goto close;
+free:
+ *outbuf = NULL;
+ free(buf);
+close:
+ close(fd);
+ return ret;
+}
+
+void *read_file(const char *filename, size_t *size)
+{
+ int ret;
+ void *buf;
+
+ ret = read_file_2(filename, size, &buf, (size_t)-1);
+ if (!ret)
+ return buf;
+
+ errno = -ret;
+
+ return NULL;
+}
+
+int write_file(const char *filename, const void *buf, size_t size)
+{
+ int fd, ret = 0;
+ int now;
+
+ fd = open(filename, O_WRONLY | O_TRUNC | O_CREAT,
+ S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
+ if (fd < 0) {
+ fprintf(stderr, "Cannot open %s: %s\n", filename, strerror(errno));
+ return -errno;
+ }
+
+ while (size) {
+ now = write(fd, buf, size);
+ if (now < 0) {
+ fprintf(stderr, "Cannot write to %s: %s\n", filename,
+ strerror(errno));
+ ret = -errno;
+ goto out;
+ }
+ size -= now;
+ buf += now;
+ }
+
+out:
+ close(fd);
+
+ return ret;
+}
+
+int read_full(int fd, void *buf, size_t size)
+{
+ size_t insize = size;
+ int now;
+ int total = 0;
+
+ while (size) {
+ now = read(fd, buf, size);
+ if (now == 0)
+ return total;
+ if (now < 0)
+ return now;
+ total += now;
+ size -= now;
+ buf += now;
+ }
+
+ return insize;
+}
+
+int write_full(int fd, void *buf, size_t size)
+{
+ size_t insize = size;
+ int now;
+
+ while (size) {
+ now = write(fd, buf, size);
+ if (now <= 0)
+ return now;
+ size -= now;
+ buf += now;
+ }
+
+ return insize;
+}
diff --git a/scripts/common.h b/scripts/common.h
new file mode 100644
index 0000000000..820108c52c
--- /dev/null
+++ b/scripts/common.h
@@ -0,0 +1,10 @@
+#ifndef __COMMON_H
+#define __COMMON_H
+
+int read_file_2(const char *filename, size_t *size, void **outbuf, size_t max_size);
+void *read_file(const char *filename, size_t *size);
+int write_file(const char *filename, const void *buf, size_t size);
+int read_full(int fd, void *buf, size_t size);
+int write_full(int fd, void *buf, size_t size);
+
+#endif /* __COMMON_H */
diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c
index b97f561897..439912a805 100644
--- a/scripts/imx/imx-image.c
+++ b/scripts/imx/imx-image.c
@@ -15,6 +15,7 @@
#include <linux/kernel.h>
#include <sys/file.h>
#include "../compiler.h"
+#include "../common.h"
#include "imx.h"
@@ -23,6 +24,8 @@
#define FLASH_HEADER_OFFSET 0x400
#define ARM_HEAD_SIZE_INDEX (ARM_HEAD_SIZE_OFFSET / sizeof(uint32_t))
+#include "../common.c"
+
/*
* Conservative DCD element limit set to restriction v2 header size to
* HEADER_SIZE
@@ -721,38 +724,6 @@ static int hab_sign(struct config_data *data)
return 0;
}
-static void *xread_file(const char *filename, size_t *size)
-{
- int fd, ret;
- void *buf;
- struct stat s;
-
- fd = open(filename, O_RDONLY);
- if (fd < 0) {
- fprintf(stderr, "Cannot open %s: %s\n", filename, strerror(errno));
- exit(1);
- }
-
- ret = fstat(fd, &s);
- if (ret) {
- fprintf(stderr, "Cannot stat %s: %s\n", filename, strerror(errno));
- exit(1);
- }
-
- *size = s.st_size;
- buf = malloc(*size);
- if (!buf) {
- perror("malloc");
- exit(1);
- }
-
- xread(fd, buf, *size);
-
- close(fd);
-
- return buf;
-}
-
static bool cpu_is_aarch64(const struct config_data *data)
{
return cpu_is_mx8m(data);
@@ -914,8 +885,10 @@ int main(int argc, char *argv[])
if (data.signed_hdmi_firmware_file) {
free(buf);
- buf = xread_file(data.signed_hdmi_firmware_file,
+ buf = read_file(data.signed_hdmi_firmware_file,
&signed_hdmi_firmware_size);
+ if (!buf)
+ exit(1);
signed_hdmi_firmware_size =
roundup(signed_hdmi_firmware_size,
@@ -957,7 +930,9 @@ int main(int argc, char *argv[])
bb_header[0] = data.first_opcode;
bb_header[ARM_HEAD_SIZE_INDEX] = barebox_image_size;
- infile = xread_file(imagename, &insize);
+ infile = read_file(imagename, &insize);
+ if (!infile)
+ exit(1);
outfd = open(data.outfile, O_WRONLY | O_CREAT | O_TRUNC, S_IRUSR | S_IWUSR);
if (outfd < 0) {
@@ -1024,7 +999,9 @@ int main(int argc, char *argv[])
if (create_usb_image) {
uint32_t *dcd;
- infile = xread_file(data.outfile, &insize);
+ infile = read_file(data.outfile, &insize);
+ if (!infile)
+ exit(1);
dcd = infile + dcd_ptr_offset;
*dcd = dcd_ptr_content;
diff --git a/scripts/imx/imx-usb-loader.c b/scripts/imx/imx-usb-loader.c
index cff77f27f2..d8b2842989 100644
--- a/scripts/imx/imx-usb-loader.c
+++ b/scripts/imx/imx-usb-loader.c
@@ -34,9 +34,12 @@
#include <arpa/inet.h>
#include <linux/kernel.h>
+#include "../common.h"
#include "../compiler.h"
#include "imx.h"
+#include "../common.c"
+
#define get_min(a, b) (((a) < (b)) ? (a) : (b))
#define FT_APP 0xaa
@@ -409,61 +412,6 @@ static void dump_bytes(const void *src, unsigned cnt, unsigned addr)
}
}
-static long get_file_size(FILE *xfile)
-{
- long size;
- fseek(xfile, 0, SEEK_END);
- size = ftell(xfile);
- rewind(xfile);
-
- return size;
-}
-
-static int read_file(const char *name, unsigned char **buffer, unsigned *size)
-{
- FILE *xfile;
- unsigned fsize;
- int cnt;
- unsigned char *buf;
- xfile = fopen(name, "rb");
- if (!xfile) {
- printf("error, can not open input file: %s\n", name);
- return -5;
- }
-
- fsize = get_file_size(xfile);
- if (fsize < 0x20) {
- printf("error, file: %s is too small\n", name);
- fclose(xfile);
- return -2;
- }
-
- buf = malloc(ALIGN(fsize, 4));
- if (!buf) {
- printf("error, out of memory\n");
- fclose(xfile);
- return -2;
- }
-
- cnt = fread(buf, 1 , fsize, xfile);
- if (cnt < fsize) {
- printf("error, cannot read %s\n", name);
- fclose(xfile);
- free(buf);
- return -1;
- }
-
- if (size)
- *size = fsize;
-
- if (buffer)
- *buffer = buf;
- else
- free(buf);
-
- return 0;
-}
-
/*
* HID Class-Specific Requests values. See section 7.2 of the HID specifications
*/
@@ -1381,7 +1329,7 @@ static int do_irom_download(struct usb_work *curr, int verify)
{
int ret;
unsigned char type;
- unsigned fsize = 0;
+ size_t fsize = 0;
unsigned header_offset;
unsigned char *buf = NULL;
unsigned char *image;
@@ -1391,9 +1339,9 @@ static int do_irom_download(struct usb_work *curr, int verify)
unsigned header_addr = 0;
unsigned total_size = 0;
- ret = read_file(curr->filename, &buf, &fsize);
- if (ret < 0)
- return ret;
+ buf = read_file(curr->filename, &fsize);
+ if (!buf)
+ return -errno;
max_length = fsize;
@@ -1436,7 +1384,7 @@ static int do_irom_download(struct usb_work *curr, int verify)
}
}
- printf("loading binary file(%s) to 0x%08x, fsize=%u type=%d...\n",
+ printf("loading binary file(%s) to 0x%08x, fsize=%zu type=%d...\n",
curr->filename, header_addr, fsize, type);
ret = load_file(image, fsize, header_addr, type, false);
@@ -1552,13 +1500,12 @@ static int mxs_load_file(libusb_device_handle *dev, uint8_t *data, int size)
static int mxs_work(struct usb_work *curr)
{
- unsigned fsize = 0;
+ size_t fsize = 0;
unsigned char *buf = NULL;
- int ret;
- ret = read_file(curr->filename, &buf, &fsize);
- if (ret < 0)
- return ret;
+ buf = read_file(curr->filename, &fsize);
+ if (!buf)
+ return -errno;
return mxs_load_file(usb_dev_handle, buf, fsize);
}
diff --git a/scripts/include/asm-generic/bitops/__ffs.h b/scripts/include/asm-generic/bitops/__ffs.h
index c94175015a..15ffaa12c5 100644
--- a/scripts/include/asm-generic/bitops/__ffs.h
+++ b/scripts/include/asm-generic/bitops/__ffs.h
@@ -2,6 +2,7 @@
#define _TOOLS_LINUX_ASM_GENERIC_BITOPS___FFS_H_
#include <asm/types.h>
+#include <asm-generic/bitsperlong.h>
/**
* __ffs - find first bit in word.
@@ -13,7 +14,7 @@ static __always_inline unsigned long __ffs(unsigned long word)
{
int num = 0;
-#if __BITS_PER_LONG == 64
+#if BITS_PER_LONG == 64
if ((word & 0xffffffff) == 0) {
num += 32;
word >>= 32;
diff --git a/scripts/include/asm-generic/bitops/arch_hweight.h b/scripts/include/asm-generic/bitops/arch_hweight.h
deleted file mode 100644
index 318bb2b202..0000000000
--- a/scripts/include/asm-generic/bitops/arch_hweight.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../../../include/asm-generic/bitops/arch_hweight.h"
diff --git a/scripts/include/asm-generic/bitops/atomic.h b/scripts/include/asm-generic/bitops/atomic.h
index 4bccd7c3d5..03fe804024 100644
--- a/scripts/include/asm-generic/bitops/atomic.h
+++ b/scripts/include/asm-generic/bitops/atomic.h
@@ -2,21 +2,22 @@
#define _TOOLS_LINUX_ASM_GENERIC_BITOPS_ATOMIC_H_
#include <asm/types.h>
+#include <asm-generic/bitsperlong.h>
static inline void set_bit(int nr, unsigned long *addr)
{
- addr[nr / __BITS_PER_LONG] |= 1UL << (nr % __BITS_PER_LONG);
+ addr[nr / BITS_PER_LONG] |= 1UL << (nr % BITS_PER_LONG);
}
static inline void clear_bit(int nr, unsigned long *addr)
{
- addr[nr / __BITS_PER_LONG] &= ~(1UL << (nr % __BITS_PER_LONG));
+ addr[nr / BITS_PER_LONG] &= ~(1UL << (nr % BITS_PER_LONG));
}
static __always_inline int test_bit(unsigned int nr, const unsigned long *addr)
{
- return ((1UL << (nr % __BITS_PER_LONG)) &
- (((unsigned long *)addr)[nr / __BITS_PER_LONG])) != 0;
+ return ((1UL << (nr % BITS_PER_LONG)) &
+ (((unsigned long *)addr)[nr / BITS_PER_LONG])) != 0;
}
#endif /* _TOOLS_LINUX_ASM_GENERIC_BITOPS_ATOMIC_H_ */
diff --git a/scripts/include/asm-generic/bitops/const_hweight.h b/scripts/include/asm-generic/bitops/const_hweight.h
deleted file mode 100644
index 0afd644aff..0000000000
--- a/scripts/include/asm-generic/bitops/const_hweight.h
+++ /dev/null
@@ -1 +0,0 @@
-#include "../../../../include/asm-generic/bitops/const_hweight.h"
diff --git a/scripts/include/asm-generic/bitops/hweight.h b/scripts/include/asm-generic/bitops/hweight.h
index 290120c01a..eb95ca33d5 100644
--- a/scripts/include/asm-generic/bitops/hweight.h
+++ b/scripts/include/asm-generic/bitops/hweight.h
@@ -1,7 +1,6 @@
#ifndef _TOOLS_LINUX_ASM_GENERIC_BITOPS_HWEIGHT_H_
#define _TOOLS_LINUX_ASM_GENERIC_BITOPS_HWEIGHT_H_
-#include <asm-generic/bitops/arch_hweight.h>
-#include <asm-generic/bitops/const_hweight.h>
+#include "../../../../include/asm-generic/bitops/hweight.h"
#endif /* _TOOLS_LINUX_ASM_GENERIC_BITOPS_HWEIGHT_H_ */
diff --git a/scripts/include/asm-generic/bitsperlong.h b/scripts/include/asm-generic/bitsperlong.h
new file mode 100644
index 0000000000..eb2dfd9065
--- /dev/null
+++ b/scripts/include/asm-generic/bitsperlong.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __BITS_PER_LONG_H_
+#define __BITS_PER_LONG_H_
+
+#ifndef __WORDSIZE
+#define __WORDSIZE (__SIZEOF_LONG__ * 8)
+#endif
+
+#define BITS_PER_LONG __WORDSIZE
+
+#endif
diff --git a/scripts/include/linux/bitops.h b/scripts/include/linux/bitops.h
index 5ad9ee1dd7..60f5c5b4f9 100644
--- a/scripts/include/linux/bitops.h
+++ b/scripts/include/linux/bitops.h
@@ -4,12 +4,7 @@
#include <asm/types.h>
#include <linux/kernel.h>
#include <linux/compiler.h>
-
-#ifndef __WORDSIZE
-#define __WORDSIZE (__SIZEOF_LONG__ * 8)
-#endif
-
-#define BITS_PER_LONG __WORDSIZE
+#include <asm-generic/bitsperlong.h>
#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
@@ -19,10 +14,6 @@
#define BITS_TO_U32(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(u32))
#define BITS_TO_BYTES(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE)
-extern unsigned int __sw_hweight8(unsigned int w);
-extern unsigned int __sw_hweight16(unsigned int w);
-extern unsigned int __sw_hweight32(unsigned int w);
-extern unsigned long __sw_hweight64(__u64 w);
/*
* Include this here because some architectures need generic_ffs/fls in
diff --git a/scripts/include/linux/kernel.h b/scripts/include/linux/kernel.h
index dc2e64e164..f3083ff354 100644
--- a/scripts/include/linux/kernel.h
+++ b/scripts/include/linux/kernel.h
@@ -9,6 +9,7 @@
#define __ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask))
#define ALIGN(x, a) __ALIGN_MASK(x, (typeof(x))(a) - 1)
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
+#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
diff --git a/scripts/omap3-usb-loader.c b/scripts/omap3-usb-loader.c
index 0f352c8453..a8d626c32f 100644
--- a/scripts/omap3-usb-loader.c
+++ b/scripts/omap3-usb-loader.c
@@ -30,6 +30,9 @@
#include <libusb.h> /* the main event */
+#include "common.h"
+#include "common.c"
+
/* Device specific defines (OMAP)
* Primary source: http://www.ti.com/lit/pdf/sprugn4
* Section 26.4.5 "Peripheral Booting"
@@ -325,50 +328,6 @@ found:
return handle;
}
-static unsigned char *read_file(char *path, size_t *readamt)
-{
- FILE *fp = fopen(path, "rb");
-
- if (!fp) {
- log_error("failed to open file \'%s\': %s\n", path,
- strerror(errno));
- return NULL;
- }
-
- unsigned char *data = NULL;
- size_t allocsize = 0;
- size_t iter = 0;
-
- while (1) {
- allocsize += 1024;
- data = realloc(data, allocsize);
- if (!data)
- return NULL;
-
- size_t readsize = allocsize - iter;
- size_t ret = fread(data + iter, sizeof (unsigned char), readsize, fp);
-
- iter += ret;
-
- if (ret != readsize) {
- if (feof(fp)) {
- break;
- } else if (ferror(fp)) {
- log_error("error file reading file \'%s\': %s\n",
- path, strerror(errno));
- free(data);
- return NULL;
- }
- }
- }
-
- /* trim the allocation down to size */
- data = realloc(data, iter);
- *readamt = iter;
-
- return data;
-}
-
static int transfer_first_stage(libusb_device_handle * handle, struct arg_state *args)
{
unsigned char *buffer = NULL;
diff --git a/scripts/rk-usb-loader-target.c b/scripts/rk-usb-loader-target.c
new file mode 100644
index 0000000000..fe1540d752
--- /dev/null
+++ b/scripts/rk-usb-loader-target.c
@@ -0,0 +1 @@
+#include "rk-usb-loader.c"
diff --git a/scripts/rk-usb-loader.c b/scripts/rk-usb-loader.c
new file mode 100644
index 0000000000..9c2367ed28
--- /dev/null
+++ b/scripts/rk-usb-loader.c
@@ -0,0 +1,328 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/*
+ * rk-usb-loader: A tool to USB Bootstrap Rockchip SoCs
+ *
+ * This tool bootstraps Rockchip SoCs via USB. It is known to work
+ * on these SoCs:
+ *
+ * - RK3568
+ * - RK3566
+ *
+ * rk-usb-loader takes the barebox images the barebox build process
+ * generates as input. The upload protocol has been taken from the
+ * rkdevelop tool, but it's not a full replacement of that tool.
+ */
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stdarg.h>
+#include <string.h>
+#include <stdbool.h>
+#include <unistd.h>
+#include <getopt.h>
+#include <errno.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <libusb.h>
+
+#include "common.h"
+#include "common.c"
+#include "rockchip.h"
+
+static void log_error(char *fmt, ...)
+{
+ va_list va;
+
+ va_start(va, fmt);
+ fprintf(stdout, "[-] ");
+ vfprintf(stdout, fmt, va);
+ va_end(va);
+}
+
+static void log_info(char *fmt, ...)
+{
+ va_list va;
+
+ va_start(va, fmt);
+ fprintf(stdout, "[+] ");
+ vfprintf(stdout, fmt, va);
+ va_end(va);
+}
+
+static int debug;
+
+static void log_debug(char *fmt, ...)
+{
+ va_list va;
+
+ if (!debug)
+ return;
+
+ va_start(va, fmt);
+ fprintf(stdout, "[D] ");
+ vfprintf(stdout, fmt, va);
+ va_end(va);
+}
+
+static libusb_device_handle *rk_usb_open(libusb_context *ctx, uint16_t vendor, uint16_t product)
+{
+ libusb_device **devlist;
+ libusb_device_handle *handle;
+ struct libusb_device_descriptor desc;
+ ssize_t count, i;
+ int ret;
+
+ log_info("scanning for USB device matching %04hx:%04hx...\n",
+ vendor, product);
+
+ while (1) {
+ if ((count = libusb_get_device_list(ctx, &devlist)) < 0) {
+ log_error("failed to gather USB device list: %s\n",
+ libusb_error_name(count));
+ return NULL;
+ }
+
+ for (i = 0; i < count; i++) {
+ ret = libusb_get_device_descriptor(devlist[i], &desc);
+ if (ret < 0) {
+ log_error("failed to get USB device descriptor: %s\n",
+ libusb_error_name(ret));
+ libusb_free_device_list(devlist, 1);
+ return NULL;
+ }
+
+ if (desc.idVendor != vendor)
+ continue;
+
+ if (product) {
+ if (desc.idProduct != product)
+ continue;
+ goto found;
+ }
+ }
+
+ libusb_free_device_list(devlist, 1);
+
+ /* nothing found yet. have a 10ms nap */
+ usleep(10000);
+ }
+found:
+
+ ret = libusb_open(devlist[i], &handle);
+ if (ret < 0) {
+ log_error("failed to open USB device %04hx:%04hx: %s\n",
+ vendor, product, libusb_error_name(ret));
+ libusb_free_device_list(devlist, 1);
+ return NULL;
+ }
+
+ ret = libusb_claim_interface(handle, 0);
+ if (ret) {
+ printf("Claim failed\n");
+ return NULL;
+ }
+
+ log_info("successfully opened %04hx:%04hx\n", vendor, product);
+
+ return handle;
+}
+
+#define poly16_CCITT 0x1021 /* crc-ccitt mask */
+
+static uint16_t crc_calculate(uint16_t crc, unsigned char ch)
+{
+ unsigned int i;
+
+ for (i = 0x80; i != 0; i >>= 1) {
+ if (crc & 0x8000) {
+ crc <<= 1;
+ crc ^= poly16_CCITT;
+ } else {
+ crc <<= 1;
+ }
+
+ if (ch & i)
+ crc ^= poly16_CCITT;
+ }
+ return crc;
+}
+
+static uint16_t crc_ccitt(unsigned char *p, int n)
+{
+ uint16_t crc = 0xffff;
+
+ while (n--) {
+ crc = crc_calculate(crc, *p);
+ p++;
+ }
+
+ return crc;
+}
+
+static int upload(libusb_device_handle *dev, unsigned int dwRequest, void *buf, int n_bytes)
+{
+ uint16_t crc;
+ uint8_t *data;
+ int sent = 0, ret;
+
+ data = calloc(n_bytes + 5, 1);
+ memcpy(data, buf, n_bytes);
+
+ crc = crc_ccitt(data, n_bytes);
+ data[n_bytes] = (crc & 0xff00) >> 8;
+ data[n_bytes + 1] = crc & 0x00ff;
+ n_bytes += 2;
+
+ while (sent < n_bytes) {
+ int now;
+
+ if (n_bytes - sent > 4096)
+ now = 4096;
+ else
+ now = n_bytes - sent;
+
+ ret = libusb_control_transfer(dev, 0x40, 0xC, 0, dwRequest,
+ data + sent, now, 0);
+ if (ret != now) {
+ log_error("DeviceRequest 0x%x failed, err=%d",
+ dwRequest, ret);
+
+ ret = -EIO;
+ goto err;
+ }
+ sent += now;
+ }
+
+ ret = 0;
+err:
+ free(data);
+
+ return ret;
+}
+
+static int upload_image(const char *filename)
+{
+ libusb_context *ctx;
+ libusb_device_handle *dev;
+ int ret;
+ void *buf;
+ struct newidb *hdr;
+ int i, n_files;
+ size_t size;
+
+ buf = read_file(filename, &size);
+ if (!buf)
+ exit(1);
+
+ hdr = buf;
+
+ if (hdr->magic != NEWIDB_MAGIC) {
+ log_error("%s has invalid magic 0x%08x ( != 0x%08x )\n", filename,
+ hdr->magic, NEWIDB_MAGIC);
+ exit(1);
+ }
+
+ ret = libusb_init(&ctx);
+ if (ret < 0) {
+ log_error("failed to initialize libusb context: %s\n",
+ libusb_error_name(ret));
+ return ret;
+ }
+
+ dev = rk_usb_open(ctx, 0x2207, 0x350a);
+ if (!dev) {
+ libusb_exit(ctx);
+ return 1;
+ }
+
+ n_files = hdr->n_files >> 16;
+
+ if (n_files > 2) {
+ /*
+ * This tool is designed for barebox images generated with rkimage.
+ * These have one blob containing the SDRAM setup sent with the
+ * CODE471_OPTION and one blob containing the barebox image sent with
+ * the CODE472_OPTION.
+ */
+ log_error("Invalid image with %d blobs\n", n_files);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ for (i = 0; i < n_files; i++) {
+ struct newidb_entry *entry = &hdr->entries[i];
+ int foffset, fsize, wIndex;
+
+ if (i)
+ wIndex = 0x472;
+ else
+ wIndex = 0x471;
+
+ log_info("Uploading %d/%d\n", i + 1, n_files);
+
+ foffset = (entry->sector & 0xffff) * SECTOR_SIZE;
+ fsize = (entry->sector >> 16) * SECTOR_SIZE;
+
+ log_debug("image starting at offset 0x%08x, size 0x%08x\n", foffset, fsize);
+
+ ret = upload(dev, wIndex, buf + foffset, fsize);
+ if (ret)
+ goto err;
+ }
+
+ ret = 0;
+err:
+ libusb_close(dev);
+ libusb_exit(ctx);
+
+ return ret;
+}
+
+static void usage(const char *prgname)
+{
+ printf(
+"Usage: %s [OPTIONS] <IMAGE>\n"
+"\n"
+"Options:\n"
+" -d Enable debugging output\n"
+" -h This help\n",
+ prgname);
+}
+
+static struct option cbootcmd[] = {
+ {"debug", 0, NULL, 'd'},
+ {"help", 0, NULL, 'h'},
+ {0, 0, 0, 0},
+};
+
+int main(int argc, char **argv)
+{
+ int opt, ret;
+ const char *filename;
+
+ while ((opt = getopt_long(argc, argv, "hd", cbootcmd, NULL)) > 0) {
+ switch (opt) {
+ case 'h':
+ usage(argv[0]);
+ exit(0);
+ case 'd':
+ debug = 1;
+ break;
+ }
+ }
+
+ if (argc == optind) {
+ usage(argv[0]);
+ exit(1);
+ }
+
+ filename = argv[optind];
+
+ ret = upload_image(filename);
+ if (ret)
+ exit(1);
+
+ exit(0);
+}
diff --git a/scripts/rkimage.c b/scripts/rkimage.c
index dde9724886..6e68d508ac 100644
--- a/scripts/rkimage.c
+++ b/scripts/rkimage.c
@@ -13,6 +13,10 @@
#include <errno.h>
#include <stdbool.h>
+#include "common.h"
+#include "common.c"
+#include "rockchip.h"
+
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof(arr[0]))
#define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
@@ -34,37 +38,6 @@ static void sha512(const void *buf, int len, void *out)
SHA512_Final(out, &sha512);
}
-#define NEWIDB_MAGIC 0x534e4b52 /* 'RKNS' */
-
-struct newidb_entry {
- uint32_t sector;
- uint32_t unknown_ffffffff;
- uint32_t unknown1;
- uint32_t image_number;
- unsigned char unknown2[8];
- unsigned char hash[64];
-};
-
-struct newidb {
- uint32_t magic;
- unsigned char unknown1[4];
- uint32_t n_files;
- uint32_t hashtype;
- unsigned char unknown2[8];
- unsigned char unknown3[8];
- unsigned char unknown4[88];
- struct newidb_entry entries[4];
- unsigned char unknown5[40];
- unsigned char unknown6[512];
- unsigned char unknown7[16];
- unsigned char unknown8[32];
- unsigned char unknown9[464];
- unsigned char hash[512];
-};
-
-#define SECTOR_SIZE 512
-#define PAGE_SIZE 2048
-
typedef enum {
HASH_TYPE_SHA256 = 1,
HASH_TYPE_SHA512 = 2,
@@ -149,42 +122,6 @@ static void usage(const char *prgname)
prgname);
}
-static int read_full(int fd, void *buf, size_t size)
-{
- size_t insize = size;
- int now;
- int total = 0;
-
- while (size) {
- now = read(fd, buf, size);
- if (now == 0)
- return total;
- if (now < 0)
- return now;
- total += now;
- size -= now;
- buf += now;
- }
-
- return insize;
-}
-
-static int write_full(int fd, void *buf, size_t size)
-{
- size_t insize = size;
- int now;
-
- while (size) {
- now = write(fd, buf, size);
- if (now <= 0)
- return now;
- size -= now;
- buf += now;
- }
-
- return insize;
-}
-
int main(int argc, char *argv[])
{
int opt, i, fd;
diff --git a/scripts/rockchip.h b/scripts/rockchip.h
new file mode 100644
index 0000000000..8cc14f8f2f
--- /dev/null
+++ b/scripts/rockchip.h
@@ -0,0 +1,35 @@
+#ifndef __ROCKCHIP_H
+#define __ROCKCHIP_H
+
+#define NEWIDB_MAGIC 0x534e4b52 /* 'RKNS' */
+
+struct newidb_entry {
+ uint32_t sector;
+ uint32_t unknown_ffffffff;
+ uint32_t unknown1;
+ uint32_t image_number;
+ unsigned char unknown2[8];
+ unsigned char hash[64];
+};
+
+struct newidb {
+ uint32_t magic;
+ unsigned char unknown1[4];
+ uint32_t n_files;
+ uint32_t hashtype;
+ unsigned char unknown2[8];
+ unsigned char unknown3[8];
+ unsigned char unknown4[88];
+ struct newidb_entry entries[4];
+ unsigned char unknown5[40];
+ unsigned char unknown6[512];
+ unsigned char unknown7[16];
+ unsigned char unknown8[32];
+ unsigned char unknown9[464];
+ unsigned char hash[512];
+};
+
+#define SECTOR_SIZE 512
+#define PAGE_SIZE 2048
+
+#endif /* __ROCKCHIP_H */
diff --git a/scripts/socfpga_mkimage.c b/scripts/socfpga_mkimage.c
index 73dfbeae3a..e88e75962f 100644
--- a/scripts/socfpga_mkimage.c
+++ b/scripts/socfpga_mkimage.c
@@ -10,6 +10,9 @@
#include <fcntl.h>
#include <endian.h>
+#include "common.h"
+#include "common.c"
+
#define VALIDATION_WORD 0x31305341
#define BRANCH_INST 0xea /* ARM opcode for "b" (unconditional branch) */
@@ -65,42 +68,6 @@ static uint32_t bb_header[] = {
0xea00006b, /* entry. b 0x200 (offset may be adjusted) */
};
-static int read_full(int fd, void *buf, size_t size)
-{
- size_t insize = size;
- int now;
- int total = 0;
-
- while (size) {
- now = read(fd, buf, size);
- if (now == 0)
- return total;
- if (now < 0)
- return now;
- total += now;
- size -= now;
- buf += now;
- }
-
- return insize;
-}
-
-static int write_full(int fd, void *buf, size_t size)
-{
- size_t insize = size;
- int now;
-
- while (size) {
- now = write(fd, buf, size);
- if (now <= 0)
- return now;
- size -= now;
- buf += now;
- }
-
- return insize;
-}
-
static const uint32_t crc_table[256] = {
0x00000000, 0x04c11db7, 0x09823b6e, 0x0d4326d9, 0x130476dc, 0x17c56b6b,
0x1a864db2, 0x1e475005, 0x2608edb8, 0x22c9f00f, 0x2f8ad6d6, 0x2b4bcb61,
@@ -381,17 +348,9 @@ int main(int argc, char *argv[])
if (ret)
exit(1);
- fd = open(outfile, O_WRONLY | O_CREAT | O_TRUNC, 0644);
- if (fd < 0) {
- perror("open outfile");
- exit(1);
- }
-
- ret = write_full(fd, buf, s.st_size + 4 + addsize + pad);
- if (ret < 0) {
- perror("write outfile");
+ ret = write_file(outfile, buf, s.st_size + 4 + addsize + pad);
+ if (ret)
exit(1);
- }
exit(0);
}