diff options
287 files changed, 13083 insertions, 6582 deletions
@@ -34,7 +34,7 @@ usage() { echo "The cross-compiler can be specify via" echo " CROSS_COMPILE default" echo " CROSS_COMPILE_<arch> arch default" - echo " CROSS_COMPILE_<target> deconfig specifc" + echo " CROSS_COMPILE_<target> defconfig specific" echo "" echo "it will be evaluated in the invert order" echo "" @@ -70,7 +70,7 @@ stats() { time_diff=$((${time_stop} - ${time_start})) printf "compiled in %4is\n" ${time_diff} if [ ${nb_errors} -gt 0 ] ; then - echo "defcongids with warnings or errors: ${nb_errors} (${errors_list} )" + echo "defconfigs with warnings or errors: ${nb_errors} (${errors_list} )" fi echo "----------------------------------------------------------" @@ -1,5 +1,5 @@ VERSION = 2013 -PATCHLEVEL = 06 +PATCHLEVEL = 07 SUBLEVEL = 0 EXTRAVERSION = NAME = Amissive Actinocutious Kiwi @@ -481,7 +481,16 @@ export KBUILD_BINARY ?= barebox.bin barebox-flash-image: $(KBUILD_IMAGE) FORCE $(call if_changed,ln) +images: barebox.bin FORCE + $(Q)$(MAKE) $(build)=images $@ +images/%.s: barebox.bin FORCE + $(Q)$(MAKE) $(build)=images $@ + +ifdef CONFIG_PBL_MULTI_IMAGES +all: $(KBUILD_DTBS) barebox.bin images +else all: barebox-flash-image $(KBUILD_DTBS) +endif common-$(CONFIG_PBL_IMAGE) += pbl/ @@ -898,7 +907,7 @@ all: modules PHONY += modules modules: $(barebox-dirs) $(if $(KBUILD_BUILTIN),barebox) - @echo ' Building modules, stage 2.'; + @$(kecho) ' Building modules, stage 2.'; $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost @@ -987,6 +996,7 @@ clean-dirs := $(addprefix _clean_,$(srctree) $(barebox-alldirs)) PHONY += $(clean-dirs) clean archclean $(clean-dirs): + $(Q)$(MAKE) $(clean)=images $(Q)$(MAKE) $(clean)=$(patsubst _clean_%,%,$@) clean: archclean $(clean-dirs) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cfb82b0515..af5d8cd18d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -88,6 +88,8 @@ config ARCH_MVEBU config ARCH_MXS bool "Freescale i.MX23/28 (mxs) based" select GENERIC_GPIO + select COMMON_CLK + select CLKDEV_LOOKUP config ARCH_NETX bool "Hilscher NetX based" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 32bdd65a21..658b1a5cc0 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -328,7 +328,7 @@ endif common-y += $(BOARD) $(MACH) common-y += arch/arm/lib/ arch/arm/cpu/ -common-$(CONFIG_BUILTIN_DTB) += arch/arm/dts/ +common-$(CONFIG_OFTREE) += arch/arm/dts/ lds-y := arch/arm/lib/barebox.lds diff --git a/arch/arm/boards/archosg9/lowlevel.c b/arch/arm/boards/archosg9/lowlevel.c index 0334693966..49c1541a4e 100644 --- a/arch/arm/boards/archosg9/lowlevel.c +++ b/arch/arm/boards/archosg9/lowlevel.c @@ -48,8 +48,7 @@ static noinline void archosg9_init_lowlevel(void) set_muxconf_regs(); - /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */ - omap4_scale_vcores(TPS62361_VSEL0_GPIO); + omap4460_scale_vcores(TPS62361_VSEL0_GPIO, 1380); /* Enable all clocks */ omap4_enable_all_clocks(); diff --git a/arch/arm/boards/ccxmx51/ccxmx51.c b/arch/arm/boards/ccxmx51/ccxmx51.c index 7f92043727..ba1d99e897 100644 --- a/arch/arm/boards/ccxmx51/ccxmx51.c +++ b/arch/arm/boards/ccxmx51/ccxmx51.c @@ -176,6 +176,30 @@ static iomux_v3_cfg_t ccxmx51_pads[] = { MX51_PAD_GPIO1_7__GPIO1_7, /* MMA7455LR IRQ2 (GPIO1.6) */ MX51_PAD_GPIO1_6__GPIO1_6, + /* User GPIOs */ + MX51_PAD_GPIO1_0__GPIO1_0, + MX51_PAD_GPIO1_1__GPIO1_1, + MX51_PAD_GPIO1_8__GPIO1_8, + MX51_PAD_DI1_PIN11__GPIO3_0, + MX51_PAD_DI1_PIN12__GPIO3_1, + MX51_PAD_DI1_PIN13__GPIO3_2, + MX51_PAD_DI1_D0_CS__GPIO3_3, + MX51_PAD_DI1_D1_CS__GPIO3_4, + MX51_PAD_DISPB2_SER_DIN__GPIO3_5, + MX51_PAD_DISPB2_SER_DIO__GPIO3_6, + MX51_PAD_DISPB2_SER_CLK__GPIO3_7, + MX51_PAD_DISPB2_SER_RS__GPIO3_8, + MX51_PAD_NANDF_RB1__GPIO3_9, + MX51_PAD_NANDF_RB2__GPIO3_10, + MX51_PAD_NANDF_RB3__GPIO3_11, + MX51_PAD_CSI1_D8__GPIO3_12, + MX51_PAD_CSI1_D9__GPIO3_13, + MX51_PAD_NANDF_CS1__GPIO3_17, + MX51_PAD_NANDF_CS2__GPIO3_18, + MX51_PAD_NANDF_CS3__GPIO3_19, + MX51_PAD_NANDF_CS4__GPIO3_20, + MX51_PAD_NANDF_CS5__GPIO3_21, + MX51_PAD_NANDF_CS6__GPIO3_22, }; #define CCXMX51_ECSPI1_CS0 IMX_GPIO_NR(4, 24) @@ -226,13 +250,13 @@ static int ccxmx51_power_init(void) val = 0x238033; mc13xxx_reg_write(mc13xxx_dev, MC13892_REG_CHARGE, val); - /* Set core voltage (SW1) to 1.1V */ - mc13xxx_reg_read(mc13xxx_dev, MC13892_REG_SW_0, &val); - val &= ~0x00001f; - val |= 0x000014; - mc13xxx_reg_write(mc13xxx_dev, MC13892_REG_SW_0, val); - if (imx_silicon_revision() < IMX_CHIP_REV_3_0) { + /* Set core voltage (SW1) to 1.1V */ + mc13xxx_reg_read(mc13xxx_dev, MC13892_REG_SW_0, &val); + val &= ~0x00001f; + val |= 0x000014; + mc13xxx_reg_write(mc13xxx_dev, MC13892_REG_SW_0, val); + /* Setup VCC (SW2) to 1.25 */ mc13xxx_reg_read(mc13xxx_dev, MC13892_REG_SW_1, &val); val &= ~0x00001f; @@ -391,7 +415,8 @@ static int ccxmx51_devices_init(void) printf("Module Serial : %c%d\n", manloc, ((hwid[2] & 0x3f) << 24) | (hwid[3] << 16) | (hwid[4] << 8) | hwid[5]); if ((ccxmx51_id->mem_sz - SZ_128M) > 0) arm_add_mem_device("ram1", MX51_CSD0_BASE_ADDR + SZ_128M, ccxmx51_id->mem_sz - SZ_128M); - } + } else + return -ENOSYS; imx51_add_uart1(); imx51_add_uart2(); diff --git a/arch/arm/boards/ccxmx51/ccxmx51js.c b/arch/arm/boards/ccxmx51/ccxmx51js.c index ae31cafedf..3bd50ac369 100644 --- a/arch/arm/boards/ccxmx51/ccxmx51js.c +++ b/arch/arm/boards/ccxmx51/ccxmx51js.c @@ -29,7 +29,8 @@ #include "ccxmx51.h" -#define CCXMX51JS_USBHOST1_RESET IMX_GPIO_NR(3, 8) +#define CCXMX51JS_USBH1_RESET IMX_GPIO_NR(3, 8) +#define CCXMX51JS_SD3_WP IMX_GPIO_NR(3, 17) static iomux_v3_cfg_t ccxmx51js_pads[] = { /* SD1 */ @@ -63,19 +64,19 @@ static iomux_v3_cfg_t ccxmx51js_pads[] = { MX51_PAD_USBH1_DATA5__USBH1_DATA5, MX51_PAD_USBH1_DATA6__USBH1_DATA6, MX51_PAD_USBH1_DATA7__USBH1_DATA7, - MX51_PAD_DISPB2_SER_RS__GPIO3_8, /* Reset */ }; static struct esdhc_platform_data sdhc1_pdata = { .cd_type = ESDHC_CD_NONE, .wp_type = ESDHC_WP_NONE, - .caps = MMC_MODE_4BIT, + .caps = MMC_CAP_4_BIT_DATA, }; static struct esdhc_platform_data sdhc3_pdata = { .cd_type = ESDHC_CD_NONE, - .wp_type = ESDHC_WP_NONE, - .caps = MMC_MODE_4BIT | MMC_MODE_8BIT, + .wp_type = ESDHC_WP_GPIO, + .wp_gpio = CCXMX51JS_SD3_WP, + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, }; static struct imxusb_platformdata ccxmx51js_usbhost1_pdata = { @@ -92,9 +93,9 @@ static int ccxmx51js_init(void) imx51_add_mmc2(&sdhc3_pdata); } - gpio_direction_output(CCXMX51JS_USBHOST1_RESET, 0); + gpio_direction_output(CCXMX51JS_USBH1_RESET, 0); mdelay(10); - gpio_set_value(CCXMX51JS_USBHOST1_RESET, 1); + gpio_set_value(CCXMX51JS_USBH1_RESET, 1); mdelay(10); imx51_add_usbh1(&ccxmx51js_usbhost1_pdata); diff --git a/arch/arm/boards/chumby_falconwing/falconwing.c b/arch/arm/boards/chumby_falconwing/falconwing.c index 720fe325d4..b0292618f3 100644 --- a/arch/arm/boards/chumby_falconwing/falconwing.c +++ b/arch/arm/boards/chumby_falconwing/falconwing.c @@ -32,7 +32,7 @@ #include <mach/usb.h> static struct mxs_mci_platform_data mci_pdata = { - .caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz, + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, /* fixed to 3.3 V */ }; @@ -290,9 +290,6 @@ static int falconwing_devices_init(void) for (i = 0; i < ARRAY_SIZE(pad_setup); i++) imx_gpio_mode(pad_setup[i]); - imx_set_ioclk(480000000); /* enable IOCLK to run at the PLL frequency */ - /* run the SSP unit clock at 100,000 kHz */ - imx_set_sspclk(0, 100000000, 1); add_generic_device("mxs_mci", 0, NULL, IMX_SSP1_BASE, 0x2000, IORESOURCE_MEM, &mci_pdata); add_generic_device("stmfb", 0, NULL, IMX_FB_BASE, 4096, diff --git a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c index a37b0898eb..fc3bb9e606 100644 --- a/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c +++ b/arch/arm/boards/crystalfontz-cfa10036/cfa10036.c @@ -72,7 +72,7 @@ static const uint32_t cfa10036_pads[] = { }; static struct mxs_mci_platform_data mci_pdata = { - .caps = MMC_MODE_8BIT, + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, /* fixed to 3.3 V */ .f_min = 400 * 1000, .f_max = 25000000, @@ -122,11 +122,6 @@ static int cfa10036_devices_init(void) for (i = 0; i < ARRAY_SIZE(cfa10036_pads); i++) imx_gpio_mode(cfa10036_pads[i]); - /* enable IOCLK0 to run at the PLL frequency */ - imx_set_ioclk(0, 480000000); - /* run the SSP unit clock at 100 MHz */ - imx_set_sspclk(0, 100000000, 1); - armlinux_set_bootparams((void *)IMX_MEMORY_BASE + 0x100); armlinux_set_architecture(MACH_TYPE_CFA10036); diff --git a/arch/arm/boards/dmo-mx6-realq7/Makefile b/arch/arm/boards/dmo-mx6-realq7/Makefile index e143009589..bb6d9d848d 100644 --- a/arch/arm/boards/dmo-mx6-realq7/Makefile +++ b/arch/arm/boards/dmo-mx6-realq7/Makefile @@ -1,2 +1,2 @@ -obj-y += board.o flash_header.o lowlevel.o -pbl-y += flash_header.o lowlevel.o +obj-y += board.o lowlevel.o +pbl-y += lowlevel.o diff --git a/arch/arm/boards/dmo-mx6-realq7/board.c b/arch/arm/boards/dmo-mx6-realq7/board.c index 35ef72cde2..b2a27a425b 100644 --- a/arch/arm/boards/dmo-mx6-realq7/board.c +++ b/arch/arm/boards/dmo-mx6-realq7/board.c @@ -17,206 +17,30 @@ * */ -#include <common.h> -#include <init.h> -#include <environment.h> -#include <mach/imx6-regs.h> -#include <asm/armlinux.h> -#include <fec.h> #include <generated/mach-types.h> +#include <environment.h> +#include <bootsource.h> #include <partition.h> -#include <spi/spi.h> +#include <common.h> +#include <envfs.h> #include <sizes.h> +#include <init.h> #include <gpio.h> -#include <mci.h> -#include <bootsource.h> -#include <mfd/stmpe-i2c.h> +#include <fec.h> + #include <linux/micrel_phy.h> +#include <mfd/stmpe-i2c.h> +#include <asm/armlinux.h> #include <asm/io.h> -#include <asm/mmu.h> #include <mach/devices-imx6.h> +#include <mach/imx6-regs.h> #include <mach/iomux-mx6.h> #include <mach/imx6-mmdc.h> -#include <mach/imx6-regs.h> #include <mach/generic.h> #include <mach/imx6.h> #include <mach/bbu.h> -#include <mach/spi.h> - -static iomux_v3_cfg_t realq7_pads[] = { - MX6Q_PAD_SD2_CMD__AUDMUX_AUD4_RXC, - MX6Q_PAD_SD2_DAT0__AUDMUX_AUD4_RXD, - MX6Q_PAD_SD2_CLK__AUDMUX_AUD4_RXFS, - MX6Q_PAD_SD2_DAT2__AUDMUX_AUD4_TXD, - MX6Q_PAD_SD2_DAT1__AUDMUX_AUD4_TXFS, - MX6Q_PAD_KEY_ROW2__CAN1_RXCAN, - MX6Q_PAD_GPIO_7__CAN1_TXCAN, - MX6Q_PAD_CSI0_VSYNC__CHEETAH_TRACE_0, - MX6Q_PAD_CSI0_DAT4__CHEETAH_TRACE_1, - MX6Q_PAD_CSI0_DAT13__CHEETAH_TRACE_10, - MX6Q_PAD_CSI0_DAT14__CHEETAH_TRACE_11, - MX6Q_PAD_CSI0_DAT15__CHEETAH_TRACE_12, - MX6Q_PAD_CSI0_DAT16__CHEETAH_TRACE_13, - MX6Q_PAD_CSI0_DAT17__CHEETAH_TRACE_14, - MX6Q_PAD_CSI0_DAT18__CHEETAH_TRACE_15, - MX6Q_PAD_CSI0_DAT5__CHEETAH_TRACE_2, - MX6Q_PAD_CSI0_DAT6__CHEETAH_TRACE_3, - MX6Q_PAD_CSI0_DAT7__CHEETAH_TRACE_4, - MX6Q_PAD_CSI0_DAT8__CHEETAH_TRACE_5, - MX6Q_PAD_CSI0_DAT9__CHEETAH_TRACE_6, - MX6Q_PAD_CSI0_DAT10__CHEETAH_TRACE_7, - MX6Q_PAD_CSI0_DAT11__CHEETAH_TRACE_8, - MX6Q_PAD_CSI0_DAT12__CHEETAH_TRACE_9, - MX6Q_PAD_CSI0_DATA_EN__CHEETAH_TRCLK, - MX6Q_PAD_CSI0_MCLK__CHEETAH_TRCTL, - MX6Q_PAD_EIM_OE__ECSPI2_MISO, - MX6Q_PAD_EIM_CS1__ECSPI2_MOSI, - MX6Q_PAD_EIM_CS0__ECSPI2_SCLK, - MX6Q_PAD_EIM_D24__ECSPI2_SS2, - MX6Q_PAD_EIM_D25__ECSPI2_SS3, - MX6Q_PAD_SD1_DAT0__ECSPI5_MISO, - MX6Q_PAD_SD1_CMD__ECSPI5_MOSI, - MX6Q_PAD_SD1_CLK__ECSPI5_SCLK, - MX6Q_PAD_SD2_DAT3__GPIO_1_12, - MX6Q_PAD_ENET_MDC__ENET_MDC, - MX6Q_PAD_ENET_MDIO__ENET_MDIO, - /* IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII = 0x80000, done in flash_header.c */ - MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0, - MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1, - MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2, - MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3, - MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL, - MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC, - MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK, - MX6Q_PAD_GPIO_0__GPIO_1_0, - MX6Q_PAD_GPIO_2__GPIO_1_2, - MX6Q_PAD_ENET_CRS_DV__GPIO_1_25, - MX6Q_PAD_ENET_RXD0__GPIO_1_27, - MX6Q_PAD_ENET_TX_EN__GPIO_1_28, - MX6Q_PAD_GPIO_3__GPIO_1_3, - MX6Q_PAD_GPIO_4__GPIO_1_4, - MX6Q_PAD_GPIO_5__GPIO_1_5, - MX6Q_PAD_GPIO_8__GPIO_1_8, - MX6Q_PAD_GPIO_9__GPIO_1_9, - MX6Q_PAD_NANDF_D0__GPIO_2_0, - MX6Q_PAD_NANDF_D1__GPIO_2_1, - MX6Q_PAD_NANDF_D2__GPIO_2_2, - MX6Q_PAD_EIM_A17__GPIO_2_21, - MX6Q_PAD_EIM_A16__GPIO_2_22, - MX6Q_PAD_EIM_LBA__GPIO_2_27, - MX6Q_PAD_NANDF_D3__GPIO_2_3, - MX6Q_PAD_NANDF_D4__GPIO_2_4, - MX6Q_PAD_NANDF_D5__GPIO_2_5, - MX6Q_PAD_NANDF_D6__GPIO_2_6, - MX6Q_PAD_NANDF_D7__GPIO_2_7, - MX6Q_PAD_EIM_DA10__GPIO_3_10, - MX6Q_PAD_EIM_DA11__GPIO_3_11, - MX6Q_PAD_EIM_DA12__GPIO_3_12, - MX6Q_PAD_EIM_DA13__GPIO_3_13, - MX6Q_PAD_EIM_DA14__GPIO_3_14, - MX6Q_PAD_EIM_DA15__GPIO_3_15, - MX6Q_PAD_EIM_D16__GPIO_3_16, - MX6Q_PAD_EIM_D18__GPIO_3_18, - MX6Q_PAD_EIM_D19__GPIO_3_19, - MX6Q_PAD_EIM_D20__GPIO_3_20, - MX6Q_PAD_EIM_D23__GPIO_3_23, - MX6Q_PAD_EIM_D29__GPIO_3_29, - MX6Q_PAD_EIM_D30__GPIO_3_30, - MX6Q_PAD_EIM_DA8__GPIO_3_8, - MX6Q_PAD_EIM_DA9__GPIO_3_9, - MX6Q_PAD_KEY_COL2__GPIO_4_10, - MX6Q_PAD_KEY_COL4__GPIO_4_14, - MX6Q_PAD_KEY_ROW4__GPIO_4_15, - MX6Q_PAD_GPIO_19__GPIO_4_5, - MX6Q_PAD_KEY_COL0__GPIO_4_6, - MX6Q_PAD_KEY_ROW0__GPIO_4_7, - MX6Q_PAD_KEY_COL1__GPIO_4_8, - MX6Q_PAD_KEY_ROW1__GPIO_4_9, - MX6Q_PAD_EIM_WAIT__GPIO_5_0, - MX6Q_PAD_EIM_A25__GPIO_5_2, - MX6Q_PAD_EIM_A24__GPIO_5_4, - MX6Q_PAD_EIM_BCLK__GPIO_6_31, - MX6Q_PAD_SD3_DAT5__GPIO_7_0, - MX6Q_PAD_SD3_DAT4__GPIO_7_1, - MX6Q_PAD_GPIO_17__GPIO_7_12, - MX6Q_PAD_GPIO_18__GPIO_7_13, - MX6Q_PAD_SD3_RST__GPIO_7_8, - MX6Q_PAD_EIM_D21__I2C1_SCL, - MX6Q_PAD_EIM_D28__I2C1_SDA, - MX6Q_PAD_EIM_EB2__I2C2_SCL, - MX6Q_PAD_KEY_ROW3__I2C2_SDA, - MX6Q_PAD_EIM_D17__I2C3_SCL, - MX6Q_PAD_GPIO_6__I2C3_SDA, - MX6Q_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, - MX6Q_PAD_DI0_PIN15__IPU1_DI0_PIN15, - MX6Q_PAD_DI0_PIN2__IPU1_DI0_PIN2, - MX6Q_PAD_DI0_PIN3__IPU1_DI0_PIN3, - MX6Q_PAD_DI0_PIN4__IPU1_DI0_PIN4, - MX6Q_PAD_DISP0_DAT0__IPU1_DISP0_DAT_0, - MX6Q_PAD_DISP0_DAT1__IPU1_DISP0_DAT_1, - MX6Q_PAD_DISP0_DAT10__IPU1_DISP0_DAT_10, - MX6Q_PAD_DISP0_DAT11__IPU1_DISP0_DAT_11, - MX6Q_PAD_DISP0_DAT12__IPU1_DISP0_DAT_12, - MX6Q_PAD_DISP0_DAT13__IPU1_DISP0_DAT_13, - MX6Q_PAD_DISP0_DAT14__IPU1_DISP0_DAT_14, - MX6Q_PAD_DISP0_DAT15__IPU1_DISP0_DAT_15, - MX6Q_PAD_DISP0_DAT16__IPU1_DISP0_DAT_16, - MX6Q_PAD_DISP0_DAT17__IPU1_DISP0_DAT_17, - MX6Q_PAD_DISP0_DAT18__IPU1_DISP0_DAT_18, - MX6Q_PAD_DISP0_DAT19__IPU1_DISP0_DAT_19, - MX6Q_PAD_DISP0_DAT2__IPU1_DISP0_DAT_2, - MX6Q_PAD_DISP0_DAT20__IPU1_DISP0_DAT_20, - MX6Q_PAD_DISP0_DAT21__IPU1_DISP0_DAT_21, - MX6Q_PAD_DISP0_DAT22__IPU1_DISP0_DAT_22, - MX6Q_PAD_DISP0_DAT23__IPU1_DISP0_DAT_23, - MX6Q_PAD_DISP0_DAT3__IPU1_DISP0_DAT_3, - MX6Q_PAD_DISP0_DAT4__IPU1_DISP0_DAT_4, - MX6Q_PAD_DISP0_DAT5__IPU1_DISP0_DAT_5, - MX6Q_PAD_DISP0_DAT6__IPU1_DISP0_DAT_6, - MX6Q_PAD_DISP0_DAT7__IPU1_DISP0_DAT_7, - MX6Q_PAD_DISP0_DAT8__IPU1_DISP0_DAT_8, - MX6Q_PAD_DISP0_DAT9__IPU1_DISP0_DAT_9, - MX6Q_PAD_SD1_DAT2__PWM2_PWMO, - MX6Q_PAD_SD1_DAT1__PWM3_PWMO, - MX6Q_PAD_GPIO_16__SJC_DE_B, - MX6Q_PAD_KEY_COL3__SPDIF_IN1, - MX6Q_PAD_EIM_D22__SPDIF_OUT1, - MX6Q_PAD_SD3_DAT6__UART1_RXD, - MX6Q_PAD_SD3_DAT7__UART1_TXD, - MX6Q_PAD_EIM_D27__UART2_RXD, - MX6Q_PAD_EIM_D26__UART2_TXD, - MX6Q_PAD_EIM_D31__GPIO_3_31, - MX6Q_PAD_SD3_CLK__USDHC3_CLK, - MX6Q_PAD_SD3_CMD__USDHC3_CMD, - MX6Q_PAD_SD3_DAT0__USDHC3_DAT0, - MX6Q_PAD_SD3_DAT1__USDHC3_DAT1, - MX6Q_PAD_SD3_DAT2__USDHC3_DAT2, - MX6Q_PAD_SD3_DAT3__USDHC3_DAT3, - MX6Q_PAD_SD4_CLK__USDHC4_CLK, - MX6Q_PAD_SD4_CMD__USDHC4_CMD, - MX6Q_PAD_SD4_DAT0__USDHC4_DAT0, - MX6Q_PAD_SD4_DAT1__USDHC4_DAT1, - MX6Q_PAD_SD4_DAT2__USDHC4_DAT2, - MX6Q_PAD_SD4_DAT3__USDHC4_DAT3, - MX6Q_PAD_SD4_DAT4__USDHC4_DAT4, - MX6Q_PAD_SD4_DAT5__USDHC4_DAT5, - MX6Q_PAD_SD4_DAT6__USDHC4_DAT6, - MX6Q_PAD_SD4_DAT7__USDHC4_DAT7, - MX6Q_PAD_NANDF_ALE__USDHC4_RST, - MX6Q_PAD_NANDF_CS1__GPIO_6_14, - MX6Q_PAD_NANDF_CS2__GPIO_6_15, -}; - -static iomux_v3_cfg_t realq7_pads_enet[] = { - MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC, - MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0, - MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1, - MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2, - MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3, - MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL, -}; #define RQ7_GPIO_ENET_PHYADD2 IMX_GPIO_NR(6, 30) #define RQ7_GPIO_ENET_MODE0 IMX_GPIO_NR(6, 25) @@ -224,8 +48,6 @@ static iomux_v3_cfg_t realq7_pads_enet[] = { #define RQ7_GPIO_ENET_MODE2 IMX_GPIO_NR(6, 28) #define RQ7_GPIO_ENET_MODE3 IMX_GPIO_NR(6, 29) #define RQ7_GPIO_ENET_EN_CLK125 IMX_GPIO_NR(6, 24) -#define RQ7_GPIO_SD3_CD IMX_GPIO_NR(6, 14) -#define RQ7_GPIO_SD3_WP IMX_GPIO_NR(6, 15) static iomux_v3_cfg_t realq7_pads_gpio[] = { MX6Q_PAD_RGMII_RXC__GPIO_6_30, @@ -257,12 +79,7 @@ static int ksz9031rn_phy_fixup(struct phy_device *dev) return 0; } -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_RGMII, - .phy_addr = -1, -}; - -static void realq7_enet_init(void) +static int realq7_enet_init(void) { mxc_iomux_v3_setup_multiple_pads(realq7_pads_gpio, ARRAY_SIZE(realq7_pads_gpio)); gpio_direction_output(RQ7_GPIO_ENET_PHYADD2, 0); @@ -278,87 +95,18 @@ static void realq7_enet_init(void) gpio_direction_output(25, 1); mdelay(50); - mxc_iomux_v3_setup_multiple_pads(realq7_pads_enet, ARRAY_SIZE(realq7_pads_enet)); - phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK, ksz9031rn_phy_fixup); - imx6_add_fec(&fec_info); -} - -static int realq7_mem_init(void) -{ - arm_add_mem_device("ram0", 0x10000000, SZ_2G); - return 0; } -mem_initcall(realq7_mem_init); - -static int realq7_spi_cs[] = { IMX_GPIO_NR(1, 12), }; - -static struct spi_imx_master realq7_spi_0_data = { - .chipselect = realq7_spi_cs, - .num_chipselect = ARRAY_SIZE(realq7_spi_cs), -}; - -static const struct spi_board_info realq7_spi_board_info[] = { - { - .name = "m25p80", - .max_speed_hz = 40000000, - .bus_num = 4, - .chip_select = 0, - } -}; - -static struct esdhc_platform_data realq7_emmc_data = { - .cd_type = ESDHC_CD_PERMANENT, - .caps = MMC_MODE_8BIT, - .devname = "emmc", -}; - -static struct stmpe_platform_data stmpe1_pdata = { - .gpio_base = 224, - .blocks = STMPE_BLOCK_GPIO, -}; - -static struct stmpe_platform_data stmpe2_pdata = { - .gpio_base = 240, - .blocks = STMPE_BLOCK_GPIO, -}; - -static struct i2c_board_info realq7_i2c2_devices[] = { - { - I2C_BOARD_INFO("stmpe-i2c", 0x40), - .platform_data = &stmpe1_pdata, - }, { - I2C_BOARD_INFO("stmpe-i2c", 0x44), - .platform_data = &stmpe2_pdata, - }, -}; +fs_initcall(realq7_enet_init); static int realq7_devices_init(void) { - imx6_add_mmc2(NULL); - imx6_add_mmc3(&realq7_emmc_data); - - realq7_enet_init(); - - i2c_register_board_info(1, realq7_i2c2_devices, - ARRAY_SIZE(realq7_i2c2_devices)); - - imx6_add_i2c0(NULL); - imx6_add_i2c1(NULL); - imx6_add_i2c2(NULL); - - spi_register_board_info(realq7_spi_board_info, - ARRAY_SIZE(realq7_spi_board_info)); - imx6_add_spi4(&realq7_spi_0_data); - - imx6_add_sata(); - - imx6_bbu_internal_spi_i2c_register_handler("spiflash", "/dev/m25p0", + imx6_bbu_internal_spi_i2c_register_handler("spiflash", "/dev/m25p0.barebox", BBU_HANDLER_FLAG_DEFAULT, NULL, 0, 0x00907000); - imx6_bbu_internal_mmc_register_handler("mmc", "/dev/disk0", + imx6_bbu_internal_mmc_register_handler("mmc", "/dev/mmc3.barebox", 0, NULL, 0, 0x00907000); return 0; @@ -367,41 +115,33 @@ device_initcall(realq7_devices_init); static int realq7_env_init(void) { - char *source_str = NULL; - switch (bootsource_get()) { case BOOTSOURCE_MMC: - if (!IS_ENABLED(CONFIG_MCI_STARTUP)) - setenv("mci0.probe", "1"); - devfs_add_partition("disk0", 0, SZ_1M, DEVFS_PARTITION_FIXED, "self0"); - devfs_add_partition("disk0", SZ_1M, SZ_1M, DEVFS_PARTITION_FIXED, "env0"); - source_str = "SD/MMC"; - break; - case BOOTSOURCE_SPI: - devfs_add_partition("m25p0", 0, SZ_256K, DEVFS_PARTITION_FIXED, "self0"); - devfs_add_partition("m25p0", SZ_256K, SZ_256K, DEVFS_PARTITION_FIXED, "env0"); - source_str = "SPI flash"; + if (!IS_ENABLED(CONFIG_MCI_STARTUP)) { + struct device_d *dev = get_device_by_name("mmc3"); + if (dev) + device_detect(dev); + } + devfs_add_partition("mmc3", 0, SZ_1M, DEVFS_PARTITION_FIXED, "mmc3.barebox"); + devfs_add_partition("mmc3", SZ_1M, SZ_1M, DEVFS_PARTITION_FIXED, "mmc3.bareboxenv"); + default_environment_path = "/dev/mmc3.bareboxenv"; break; default: - printf("unknown Bootsource, no persistent environment\n"); + case BOOTSOURCE_SPI: + devfs_add_partition("m25p0", 0, SZ_256K, DEVFS_PARTITION_FIXED, "m25p0.barebox"); + devfs_add_partition("m25p0", SZ_256K, SZ_256K, DEVFS_PARTITION_FIXED, "m25p0.bareboxenv"); + default_environment_path = "/dev/m25p0.bareboxenv"; break; } - if (source_str) - printf("Using environment from %s\n", source_str); - return 0; } late_initcall(realq7_env_init); static int realq7_console_init(void) { - mxc_iomux_v3_setup_multiple_pads(realq7_pads, ARRAY_SIZE(realq7_pads)); - imx6_init_lowlevel(); - imx6_add_uart1(); - return 0; } -console_initcall(realq7_console_init); +core_initcall(realq7_console_init); diff --git a/arch/arm/boards/dmo-mx6-realq7/flash-header.imxcfg b/arch/arm/boards/dmo-mx6-realq7/flash-header.imxcfg new file mode 100644 index 0000000000..400a870154 --- /dev/null +++ b/arch/arm/boards/dmo-mx6-realq7/flash-header.imxcfg @@ -0,0 +1,3 @@ +soc imx6 +loadaddr 0x00907000 +dcdofs 0x400 diff --git a/arch/arm/boards/dmo-mx6-realq7/flash_header.c b/arch/arm/boards/dmo-mx6-realq7/flash_header.c deleted file mode 100644 index 88227a759f..0000000000 --- a/arch/arm/boards/dmo-mx6-realq7/flash_header.c +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (C) 2011 Marc Kleine-Budde <mkl@pengutronix.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <common.h> -#include <asm/byteorder.h> -#include <mach/imx-flash-header.h> -#include <mach/imx6-regs.h> -#include <asm/barebox-arm-head.h> - -void __naked __flash_header_start go(void) -{ - barebox_arm_head(); -} - -#define APP_DEST 0x00907000 - -struct imx_flash_header_v2 __flash_header_section flash_header = { - .header.tag = IVT_HEADER_TAG, - .header.length = cpu_to_be16(32), - .header.version = IVT_VERSION, - .entry = APP_DEST + 0x2000, - .dcd_ptr = 0, - .boot_data_ptr = APP_DEST + FLASH_HEADER_OFFSET + offsetof(struct imx_flash_header_v2, boot_data), - .self = APP_DEST + FLASH_HEADER_OFFSET, - - .boot_data.start = APP_DEST, - .boot_data.size = barebox_image_size, -}; diff --git a/arch/arm/boards/efika-mx-smartbook/board.c b/arch/arm/boards/efika-mx-smartbook/board.c index e9b6062872..0e6694bc69 100644 --- a/arch/arm/boards/efika-mx-smartbook/board.c +++ b/arch/arm/boards/efika-mx-smartbook/board.c @@ -13,42 +13,31 @@ * */ -#include <common.h> -#include <bootsource.h> -#include <net.h> -#include <init.h> #include <environment.h> -#include <mach/gpio.h> -#include <asm/armlinux.h> +#include <bootsource.h> #include <partition.h> -#include <notifier.h> -#include <fs.h> -#include <led.h> +#include <common.h> #include <fcntl.h> -#include <nand.h> -#include <usb/ulpi.h> -#include <usb/chipidea-imx.h> +#include <gpio.h> +#include <init.h> +#include <led.h> +#include <fs.h> +#include <io.h> + #include <spi/spi.h> #include <mfd/mc13xxx.h> #include <mfd/mc13892.h> -#include <asm/io.h> -#include <asm/mmu.h> -#include <mach/imx-nand.h> -#include <mach/spi.h> + +#include <asm/armlinux.h> + +#include <mach/imx-flash-header.h> +#include <mach/devices-imx51.h> +#include <mach/imx51-regs.h> +#include <mach/iomux-mx51.h> +#include <mach/revision.h> #include <mach/generic.h> #include <mach/imx5.h> #include <mach/bbu.h> -#include <mach/iomux-mx51.h> -#include <mach/imx51-regs.h> -#include <mach/devices-imx51.h> -#include <mach/imx-flash-header.h> -#include <mach/revision.h> - -#define GPIO_EFIKA_SDHC1_WP IMX_GPIO_NR(1, 1) -#define GPIO_EFIKAMX_SDHC1_CD IMX_GPIO_NR(1, 0) -#define GPIO_EFIKASB_SDHC1_CD IMX_GPIO_NR(2, 27) -#define GPIO_EFIKASB_SDHC2_CD IMX_GPIO_NR(1, 8) -#define GPIO_EFIKASB_SDHC2_WP IMX_GPIO_NR(1, 7) #define GPIO_BACKLIGHT_POWER IMX_GPIO_NR(4, 12) #define GPIO_BACKLIGHT_PWM IMX_GPIO_NR(1, 2) @@ -63,128 +52,6 @@ #define GPIO_HUB_RESET IMX_GPIO_NR(1, 5) #define GPIO_SMSC3317_RESET IMX_GPIO_NR(2, 9) -static iomux_v3_cfg_t efika_pads[] = { - /* ECSPI1 */ - MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI, - MX51_PAD_CSPI1_MISO__ECSPI1_MISO, - MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, - MX51_PAD_CSPI1_SS0__GPIO4_24, - MX51_PAD_CSPI1_SS1__GPIO4_25, - MX51_PAD_GPIO1_6__GPIO1_6, - - /* ESDHC1 */ - MX51_PAD_SD1_CMD__SD1_CMD, - MX51_PAD_SD1_CLK__SD1_CLK, - MX51_PAD_SD1_DATA0__SD1_DATA0, - MX51_PAD_SD1_DATA1__SD1_DATA1, - MX51_PAD_SD1_DATA2__SD1_DATA2, - MX51_PAD_SD1_DATA3__SD1_DATA3, - MX51_PAD_GPIO1_1__GPIO1_1, - - /* USB HOST1 */ - MX51_PAD_USBH1_CLK__USBH1_CLK, - MX51_PAD_USBH1_DIR__USBH1_DIR, - MX51_PAD_USBH1_NXT__USBH1_NXT, - MX51_PAD_USBH1_DATA0__USBH1_DATA0, - MX51_PAD_USBH1_DATA1__USBH1_DATA1, - MX51_PAD_USBH1_DATA2__USBH1_DATA2, - MX51_PAD_USBH1_DATA3__USBH1_DATA3, - MX51_PAD_USBH1_DATA4__USBH1_DATA4, - MX51_PAD_USBH1_DATA5__USBH1_DATA5, - MX51_PAD_USBH1_DATA6__USBH1_DATA6, - MX51_PAD_USBH1_DATA7__USBH1_DATA7, - MX51_PAD_USBH1_STP__GPIO1_27, - MX51_PAD_EIM_A16__GPIO2_10, - - /* USB HOST2 */ - MX51_PAD_EIM_D27__GPIO2_9, - MX51_PAD_GPIO1_5__GPIO1_5, - MX51_PAD_EIM_D16__USBH2_DATA0, - MX51_PAD_EIM_D17__USBH2_DATA1, - MX51_PAD_EIM_D18__USBH2_DATA2, - MX51_PAD_EIM_D19__USBH2_DATA3, - MX51_PAD_EIM_D20__USBH2_DATA4, - MX51_PAD_EIM_D21__USBH2_DATA5, - MX51_PAD_EIM_D22__USBH2_DATA6, - MX51_PAD_EIM_D23__USBH2_DATA7, - MX51_PAD_EIM_A24__USBH2_CLK, - MX51_PAD_EIM_A25__USBH2_DIR, - MX51_PAD_EIM_A26__GPIO2_20, - MX51_PAD_EIM_A27__USBH2_NXT, - - /* PATA */ - MX51_PAD_NANDF_WE_B__PATA_DIOW, - MX51_PAD_NANDF_RE_B__PATA_DIOR, - MX51_PAD_NANDF_ALE__PATA_BUFFER_EN, - MX51_PAD_NANDF_CLE__PATA_RESET_B, - MX51_PAD_NANDF_WP_B__PATA_DMACK, - MX51_PAD_NANDF_RB0__PATA_DMARQ, - MX51_PAD_NANDF_RB1__PATA_IORDY, - MX51_PAD_GPIO_NAND__PATA_INTRQ, - MX51_PAD_NANDF_CS2__PATA_CS_0, - MX51_PAD_NANDF_CS3__PATA_CS_1, - MX51_PAD_NANDF_CS4__PATA_DA_0, - MX51_PAD_NANDF_CS5__PATA_DA_1, - MX51_PAD_NANDF_CS6__PATA_DA_2, - MX51_PAD_NANDF_D15__PATA_DATA15, - MX51_PAD_NANDF_D14__PATA_DATA14, - MX51_PAD_NANDF_D13__PATA_DATA13, - MX51_PAD_NANDF_D12__PATA_DATA12, - MX51_PAD_NANDF_D11__PATA_DATA11, - MX51_PAD_NANDF_D10__PATA_DATA10, - MX51_PAD_NANDF_D9__PATA_DATA9, - MX51_PAD_NANDF_D8__PATA_DATA8, - MX51_PAD_NANDF_D7__PATA_DATA7, - MX51_PAD_NANDF_D6__PATA_DATA6, - MX51_PAD_NANDF_D5__PATA_DATA5, - MX51_PAD_NANDF_D4__PATA_DATA4, - MX51_PAD_NANDF_D3__PATA_DATA3, - MX51_PAD_NANDF_D2__PATA_DATA2, - MX51_PAD_NANDF_D1__PATA_DATA1, - MX51_PAD_NANDF_D0__PATA_DATA0, - - MX51_PAD_EIM_A22__GPIO2_16, /* WLAN enable (1 = on) */ - MX51_PAD_EIM_A17__GPIO2_11, - - /* I2C2 */ - MX51_PAD_KEY_COL4__I2C2_SCL, - MX51_PAD_KEY_COL5__I2C2_SDA, - - MX51_PAD_GPIO1_2__GPIO1_2, /* Backlight (should be pwm) (1 = on) */ - MX51_PAD_CSI2_D19__GPIO4_12, /* Backlight power (0 = on) */ - - MX51_PAD_DISPB2_SER_CLK__GPIO3_7, /* LVDS power (1 = on) */ - MX51_PAD_DISPB2_SER_DIN__GPIO3_5, /* LVDS reset (1 = reset) */ - MX51_PAD_CSI1_D8__GPIO3_12, /* LVDS enable (1 = enable) */ - MX51_PAD_CSI1_D9__GPIO3_13, /* LCD enable (1 = on) */ - - MX51_PAD_DI1_PIN12__GPIO3_1, /* WLAN switch (0 = on) */ - - MX51_PAD_GPIO1_4__WDOG1_WDOG_B, -}; - -static iomux_v3_cfg_t efikasb_pads[] = { - /* LEDs */ - MX51_PAD_EIM_CS0__GPIO2_25, - MX51_PAD_GPIO1_3__GPIO1_3, - - /* ESHC2 */ - MX51_PAD_SD2_CMD__SD2_CMD, - MX51_PAD_SD2_CLK__SD2_CLK, - MX51_PAD_SD2_DATA0__SD2_DATA0, - MX51_PAD_SD2_DATA1__SD2_DATA1, - MX51_PAD_SD2_DATA2__SD2_DATA2, - MX51_PAD_SD2_DATA3__SD2_DATA3, - MX51_PAD_GPIO1_7__GPIO1_7, - MX51_PAD_GPIO1_8__GPIO1_8, - - MX51_PAD_EIM_CS2__GPIO2_27, -}; - -static iomux_v3_cfg_t efikamx_pads[] = { - MX51_PAD_GPIO1_0__GPIO1_0, -}; - /* * Generally this should work on the Efika MX smarttop aswell, * but I do not have the hardware to test it, so hardcode this @@ -195,36 +62,7 @@ static inline int machine_is_efikasb(void) return 1; } -static int efikamx_mem_init(void) -{ - arm_add_mem_device("ram0", 0x90000000, SZ_512M); - - return 0; -} -mem_initcall(efikamx_mem_init); - -static int spi_0_cs[] = { IMX_GPIO_NR(4, 24), IMX_GPIO_NR(4, 25) }; - -static struct spi_imx_master spi_0_data = { - .chipselect = spi_0_cs, - .num_chipselect = ARRAY_SIZE(spi_0_cs), -}; - -static const struct spi_board_info efikamx_spi_board_info[] = { - { - .name = "mc13xxx-spi", - .max_speed_hz = 30 * 1000 * 1000, - .bus_num = 0, - .chip_select = 0, - }, { - .name = "m25p80", - .chip_select = 1, - .max_speed_hz = 20 * 1000 * 1000, - .bus_num = 0, - }, -}; - -static void efikamx_power_init(void) +static int efikamx_power_init(void) { unsigned int val; struct mc13xxx *mc; @@ -232,7 +70,7 @@ static void efikamx_power_init(void) mc = mc13xxx_get(); if (!mc) { printf("could not get mc13892\n"); - return; + return -ENODEV; } /* Write needed to Power Gate 2 register */ @@ -270,11 +108,6 @@ static void efikamx_power_init(void) mc13xxx_reg_write(mc, MC13892_REG_SW_2, val); udelay(50); - /* Raise the core frequency to 800MHz */ - console_flush(); - imx51_init_lowlevel(800); - clock_notifier_call_chain(); - /* Set switchers in Auto in NORMAL mode & STANDBY mode */ /* Setup the switcher mode for SW1 & SW2*/ mc13xxx_reg_read(mc, MC13892_REG_SW_4, &val); @@ -343,35 +176,9 @@ static void efikamx_power_init(void) mc13xxx_reg_write(mc, MC13892_REG_POWER_CTL2, val); udelay(2500); -} - -static struct esdhc_platform_data efikasb_sd2_data = { - .cd_gpio = GPIO_EFIKASB_SDHC2_CD, - .wp_gpio = GPIO_EFIKASB_SDHC2_WP, - .cd_type = ESDHC_CD_GPIO, - .wp_type = ESDHC_WP_GPIO, - .devname = "mmc_left", -}; -static struct esdhc_platform_data efikamx_sd1_data = { - .cd_gpio = GPIO_EFIKAMX_SDHC1_CD, - .wp_gpio = GPIO_EFIKA_SDHC1_WP, - .cd_type = ESDHC_CD_GPIO, - .wp_type = ESDHC_WP_GPIO, -}; - -static struct esdhc_platform_data efikasb_sd1_data = { - .cd_gpio = GPIO_EFIKASB_SDHC1_CD, - .wp_gpio = GPIO_EFIKA_SDHC1_WP, - .cd_type = ESDHC_CD_GPIO, - .wp_type = ESDHC_WP_GPIO, - .devname = "mmc_back", -}; - -struct imxusb_platformdata efikamx_usbh1_pdata = { - .flags = MXC_EHCI_MODE_ULPI | MXC_EHCI_INTERFACE_DIFF_UNI, - .mode = IMX_USB_MODE_HOST, -}; + return 0; +} static int efikamx_usb_init(void) { @@ -400,18 +207,9 @@ static int efikamx_usb_init(void) mxc_iomux_v3_setup_pad(MX51_PAD_EIM_A26__USBH2_STP); } - imx51_add_usbh1(&efikamx_usbh1_pdata); - - /* - * At least for the EfikaSB these do not seem to be interesting. - * The external ports are all connected to host1. - * - * imx51_add_usbotg(pdata); - * imx51_add_usbh2(pdate); - */ - return 0; } +console_initcall(efikamx_usb_init); static struct gpio_led leds[] = { { @@ -428,45 +226,21 @@ static struct gpio_led leds[] = { #include "dcd-data.h" -static int efikamx_devices_init(void) +static int efikamx_late_init(void) { + enum bootsource bootsource; int i; - mxc_iomux_v3_setup_multiple_pads(efika_pads, ARRAY_SIZE(efika_pads)); - if (machine_is_efikasb()) { - gpio_direction_output(GPIO_BACKLIGHT_POWER, 1); - mxc_iomux_v3_setup_multiple_pads(efikasb_pads, - ARRAY_SIZE(efikasb_pads)); - } else { - mxc_iomux_v3_setup_multiple_pads(efikamx_pads, - ARRAY_SIZE(efikamx_pads)); - } - - spi_register_board_info(efikamx_spi_board_info, - ARRAY_SIZE(efikamx_spi_board_info)); - imx51_add_spi0(&spi_0_data); - efikamx_power_init(); - if (machine_is_efikasb()) - imx51_add_mmc0(&efikasb_sd1_data); - else - imx51_add_mmc0(&efikamx_sd1_data); - - imx51_add_mmc1(&efikasb_sd2_data); + gpio_direction_output(GPIO_BACKLIGHT_POWER, 1); for (i = 0; i < ARRAY_SIZE(leds); i++) led_gpio_register(&leds[i]); - imx51_add_i2c1(NULL); - - efikamx_usb_init(); - - imx51_add_pata(); - writew(0x0, MX51_WDOG_BASE_ADDR + 0x8); - imx51_bbu_internal_mmc_register_handler("mmc", "/dev/mmc_left", + imx51_bbu_internal_mmc_register_handler("mmc", "/dev/mmc1", BBU_HANDLER_FLAG_DEFAULT, dcd_entry, sizeof(dcd_entry), 0); @@ -474,38 +248,24 @@ static int efikamx_devices_init(void) armlinux_set_architecture(2370); armlinux_set_revision(0x5100 | imx_silicon_revision()); - return 0; -} -device_initcall(efikamx_devices_init); + bootsource = bootsource_get(); -static int efikamx_part_init(void) -{ - if (bootsource_get() == BOOTSOURCE_MMC) { - devfs_add_partition("mmc_left", 0x00000, 0x80000, + switch (bootsource) { + case BOOTSOURCE_MMC: + device_detect_by_name("mmc1"); + + devfs_add_partition("mmc1", 0x00000, 0x80000, DEVFS_PARTITION_FIXED, "self0"); - devfs_add_partition("mmc_left", 0x80000, 0x80000, + devfs_add_partition("mmc1", 0x80000, 0x80000, + DEVFS_PARTITION_FIXED, "env0"); + break; + case BOOTSOURCE_SPI: + default: + devfs_add_partition("m25p0", 0x80000, 0x20000, DEVFS_PARTITION_FIXED, "env0"); + break; } return 0; } -late_initcall(efikamx_part_init); - -static iomux_v3_cfg_t efika_uart_pads[] = { - /* UART */ - MX51_PAD_UART1_RXD__UART1_RXD, - MX51_PAD_UART1_TXD__UART1_TXD, - MX51_PAD_UART1_RTS__UART1_RTS, - MX51_PAD_UART1_CTS__UART1_CTS, -}; - -static int efikamx_console_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(efika_uart_pads, - ARRAY_SIZE(efika_uart_pads)); - - imx51_add_uart0(); - - return 0; -} -console_initcall(efikamx_console_init); +late_initcall(efikamx_late_init); diff --git a/arch/arm/boards/efika-mx-smartbook/lowlevel.c b/arch/arm/boards/efika-mx-smartbook/lowlevel.c index 3e6a0ee328..11abc938ad 100644 --- a/arch/arm/boards/efika-mx-smartbook/lowlevel.c +++ b/arch/arm/boards/efika-mx-smartbook/lowlevel.c @@ -1,9 +1,12 @@ #include <common.h> #include <mach/esdctl.h> #include <asm/barebox-arm-head.h> +#include <mach/imx5.h> void __naked barebox_arm_reset_vector(void) { arm_cpu_lowlevel_init(); + arm_setup_stack(0x20000000 - 16); + imx51_init_lowlevel(800); imx51_barebox_entry(0); } diff --git a/arch/arm/boards/eukrea_cpuimx25/config.h b/arch/arm/boards/eukrea_cpuimx25/config.h deleted file mode 100644 index 12ec627e43..0000000000 --- a/arch/arm/boards/eukrea_cpuimx25/config.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * (c) 2010 Eukrea Electromatique, Eric Bénard <eric@eukrea.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MX25_HCLK_FREQ 24000000 - -#endif - -/* nothing to do here yet */ diff --git a/arch/arm/boards/eukrea_cpuimx35/config.h b/arch/arm/boards/eukrea_cpuimx35/config.h deleted file mode 100644 index 070b3147b9..0000000000 --- a/arch/arm/boards/eukrea_cpuimx35/config.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MX35_HCLK_FREQ 24000000 - -#endif /* __CONFIG_H */ diff --git a/arch/arm/boards/freescale-mx23-evk/mx23-evk.c b/arch/arm/boards/freescale-mx23-evk/mx23-evk.c index 76377b1a36..47f7031668 100644 --- a/arch/arm/boards/freescale-mx23-evk/mx23-evk.c +++ b/arch/arm/boards/freescale-mx23-evk/mx23-evk.c @@ -28,7 +28,7 @@ #include <mach/usb.h> static struct mxs_mci_platform_data mci_pdata = { - .caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz, + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, /* fixed to 3.3 V */ .f_min = 400000, }; @@ -109,9 +109,6 @@ static int mx23_evk_devices_init(void) armlinux_set_bootparams((void*)IMX_MEMORY_BASE + 0x100); armlinux_set_architecture(MACH_TYPE_MX23EVK); - imx_set_ioclk(480000000); /* enable IOCLK to run at the PLL frequency */ - imx_set_sspclk(0, 100000000, 1); - add_generic_device("mxs_mci", DEVICE_ID_DYNAMIC, NULL, IMX_SSP1_BASE, 0x8000, IORESOURCE_MEM, &mci_pdata); diff --git a/arch/arm/boards/freescale-mx25-3-stack/3stack.c b/arch/arm/boards/freescale-mx25-3-stack/3stack.c index ea4d4ba4f4..6620a86770 100644 --- a/arch/arm/boards/freescale-mx25-3-stack/3stack.c +++ b/arch/arm/boards/freescale-mx25-3-stack/3stack.c @@ -186,7 +186,7 @@ static int imx25_3ds_fec_init(void) } late_initcall(imx25_3ds_fec_init); -static int imx25_devices_init(void) +static int imx25_3ds_devices_init(void) { #ifdef CONFIG_USB /* USB does not work yet. Don't know why. Maybe @@ -222,7 +222,7 @@ static int imx25_devices_init(void) return 0; } -device_initcall(imx25_devices_init); +device_initcall(imx25_3ds_devices_init); static iomux_v3_cfg_t imx25_pads[] = { MX25_PAD_FEC_MDC__FEC_MDC, diff --git a/arch/arm/boards/freescale-mx25-3-stack/config.h b/arch/arm/boards/freescale-mx25-3-stack/config.h deleted file mode 100644 index f5d05be7a4..0000000000 --- a/arch/arm/boards/freescale-mx25-3-stack/config.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * (C) Copyright 2007 Juergen Beisert <jbe@pengutronix.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Definitions related to passing arguments to kernel. - */ - -#define CONFIG_MX25_HCLK_FREQ 24000000 - -#endif - -/* nothing to do here yet */ diff --git a/arch/arm/boards/freescale-mx28-evk/mx28-evk.c b/arch/arm/boards/freescale-mx28-evk/mx28-evk.c index 364b6ee23e..687d3f77b6 100644 --- a/arch/arm/boards/freescale-mx28-evk/mx28-evk.c +++ b/arch/arm/boards/freescale-mx28-evk/mx28-evk.c @@ -136,7 +136,7 @@ static const uint32_t mx28evk_pads[] = { }; static struct mxs_mci_platform_data mci_pdata = { - .caps = MMC_MODE_8BIT, + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, /* fixed to 3.3 V */ .f_min = 400 * 1000, .f_max = 25000000, @@ -253,14 +253,6 @@ static int mx28_evk_devices_init(void) for (i = 0; i < ARRAY_SIZE(mx28evk_pads); i++) imx_gpio_mode(mx28evk_pads[i]); - /* enable IOCLK0 to run at the PLL frequency */ - imx_set_ioclk(0, 480000000); - imx_set_ioclk(1, 320000000); - /* run the SSP unit clock at 100 MHz */ - imx_set_sspclk(0, 100000000, 1); - /* run the SSP unit 2 clock at 160Mhz */ - imx_set_sspclk(2, 160000000, 1); - armlinux_set_bootparams((void *)IMX_MEMORY_BASE + 0x100); armlinux_set_architecture(MACH_TYPE_MX28EVK); @@ -274,7 +266,6 @@ static int mx28_evk_devices_init(void) IORESOURCE_MEM, NULL); mx28_evk_get_ethaddr(); /* must be after registering ocotp */ - imx_enable_enetclk(); mx28_evk_fec_reset(); add_generic_device("imx28-fec", 0, NULL, IMX_FEC0_BASE, 0x4000, IORESOURCE_MEM, &fec_info); diff --git a/arch/arm/boards/freescale-mx35-3-stack/config.h b/arch/arm/boards/freescale-mx35-3-stack/config.h deleted file mode 100644 index 39832d9900..0000000000 --- a/arch/arm/boards/freescale-mx35-3-stack/config.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -/** - * @file - * @brief Global defintions for the Freescale i.MX35 3-stack board - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MX35_HCLK_FREQ 24000000 - -#endif /* __CONFIG_H */ diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c index 6807796ab9..fc7e17568b 100644 --- a/arch/arm/boards/freescale-mx51-pdk/board.c +++ b/arch/arm/boards/freescale-mx51-pdk/board.c @@ -181,6 +181,8 @@ device_initcall(f3s_devices_init); static int f3s_part_init(void) { + device_detect_by_name("mmc0"); + devfs_add_partition("mmc0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); devfs_add_partition("mmc0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0"); diff --git a/arch/arm/boards/freescale-mx53-loco/board.c b/arch/arm/boards/freescale-mx53-loco/board.c index e041de6a5a..2f5112801e 100644 --- a/arch/arm/boards/freescale-mx53-loco/board.c +++ b/arch/arm/boards/freescale-mx53-loco/board.c @@ -14,99 +14,30 @@ * */ -#include <common.h> #include <environment.h> -#include <fcntl.h> -#include <fec.h> -#include <fs.h> -#include <init.h> -#include <nand.h> -#include <net.h> #include <partition.h> +#include <common.h> #include <sizes.h> +#include <gpio.h> +#include <init.h> +#include <fs.h> +#include <io.h> + +#include <mfd/mc34708.h> +#include <i2c/i2c.h> + +#include <asm/armlinux.h> +#include <asm/mmu.h> #include <generated/mach-types.h> +#include <mach/imx-flash-header.h> #include <mach/imx53-regs.h> -#include <mach/iomux-mx53.h> -#include <mach/devices-imx53.h> +#include <mach/revision.h> #include <mach/generic.h> -#include <mach/gpio.h> -#include <mach/imx-nand.h> -#include <mach/iim.h> #include <mach/imx5.h> -#include <mach/revision.h> #include <mach/bbu.h> -#include <mach/imx-flash-header.h> - -#include <i2c/i2c.h> -#include <mfd/mc34708.h> - -#include <asm/armlinux.h> -#include <io.h> -#include <asm/mmu.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_RMII, -}; - -static iomux_v3_cfg_t loco_pads[] = { - /* UART1 */ - MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, - MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, - - /* FEC */ - MX53_PAD_FEC_MDC__FEC_MDC, - MX53_PAD_FEC_MDIO__FEC_MDIO, - MX53_PAD_FEC_REF_CLK__FEC_TX_CLK, - MX53_PAD_FEC_RX_ER__FEC_RX_ER, - MX53_PAD_FEC_CRS_DV__FEC_RX_DV, - MX53_PAD_FEC_RXD1__FEC_RDATA_1, - MX53_PAD_FEC_RXD0__FEC_RDATA_0, - MX53_PAD_FEC_TX_EN__FEC_TX_EN, - MX53_PAD_FEC_TXD1__FEC_TDATA_1, - MX53_PAD_FEC_TXD0__FEC_TDATA_0, - /* FEC_nRST */ - MX53_PAD_PATA_DA_0__GPIO7_6, - - /* SD1 */ - MX53_PAD_SD1_CMD__ESDHC1_CMD, - MX53_PAD_SD1_CLK__ESDHC1_CLK, - MX53_PAD_SD1_DATA0__ESDHC1_DAT0, - MX53_PAD_SD1_DATA1__ESDHC1_DAT1, - MX53_PAD_SD1_DATA2__ESDHC1_DAT2, - MX53_PAD_SD1_DATA3__ESDHC1_DAT3, - /* SD1_CD */ - MX53_PAD_EIM_DA13__GPIO3_13, - - /* SD3 */ - MX53_PAD_PATA_DATA8__ESDHC3_DAT0, - MX53_PAD_PATA_DATA9__ESDHC3_DAT1, - MX53_PAD_PATA_DATA10__ESDHC3_DAT2, - MX53_PAD_PATA_DATA11__ESDHC3_DAT3, - MX53_PAD_PATA_DATA0__ESDHC3_DAT4, - MX53_PAD_PATA_DATA1__ESDHC3_DAT5, - MX53_PAD_PATA_DATA2__ESDHC3_DAT6, - MX53_PAD_PATA_DATA3__ESDHC3_DAT7, - MX53_PAD_PATA_IORDY__ESDHC3_CLK, - MX53_PAD_PATA_RESET_B__ESDHC3_CMD, - /* SD3_CD */ - MX53_PAD_EIM_DA11__GPIO3_11, - /* SD3_WP */ - MX53_PAD_EIM_DA12__GPIO3_12, - - /* I2C0 */ - MX53_PAD_CSI0_DAT8__I2C1_SDA, - MX53_PAD_CSI0_DAT9__I2C1_SCL, - - MX53_PAD_PATA_DA_2__GPIO7_8, -}; - -static struct i2c_board_info i2c_devices[] = { - { - I2C_BOARD_INFO("mc34708-i2c", 0x08), - }, -}; +#include <mach/iim.h> /* * Revision to be passed to kernel. The kernel provided @@ -142,106 +73,60 @@ static void loco_fec_reset(void) gpio_set_value(LOCO_FEC_PHY_RST, 1); } -#define LOCO_SD3_CD IMX_GPIO_NR(3, 11) -#define LOCO_SD3_WP IMX_GPIO_NR(3, 12) -#define LOCO_SD1_CD IMX_GPIO_NR(3, 13) #define MX53_LOCO_USB_PWREN IMX_GPIO_NR(7, 8) -static struct esdhc_platform_data loco_sd1_data = { - .cd_gpio = LOCO_SD1_CD, - .cd_type = ESDHC_CD_GPIO, - .wp_type = ESDHC_WP_NONE, -}; +#define DCD_NAME static struct imx_dcd_v2_entry dcd_entry -static struct esdhc_platform_data loco_sd3_data = { - .cd_gpio = LOCO_SD3_CD, - .wp_gpio = LOCO_SD3_WP, - .cd_type = ESDHC_CD_GPIO, - .wp_type = ESDHC_WP_GPIO, -}; +#include "dcd-data.h" -static void loco_ehci_init(void) +static int loco_late_init(void) { - /* USB PWR enable */ - gpio_direction_output(MX53_LOCO_USB_PWREN, 0); - gpio_set_value(MX53_LOCO_USB_PWREN, 1); + struct device_d *dev = get_device_by_name("mmc0"); + struct mc34708 *mc34708; + int rev; - writel(0, MX53_OTG_BASE_ADDR + 0x384); /* setup portsc */ - add_generic_usb_ehci_device(1, MX53_OTG_BASE_ADDR + 0x200, NULL); -} + if (dev) + device_detect(dev); -#define DCD_NAME static struct imx_dcd_v2_entry dcd_entry + devfs_add_partition("mmc0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0"); -#include "dcd-data.h" + mc34708 = mc34708_get(); + if (mc34708) { + /* get the board revision from fuse */ + rev = readl(MX53_IIM_BASE_ADDR + 0x878); + set_board_rev(rev); + printf("MCIMX53-START-R board 1.0 rev %c\n", (rev == 1) ? 'A' : 'B' ); + armlinux_set_revision(loco_system_rev); + } else { + /* so we have a DA9053 based board */ + printf("MCIMX53-START board 1.0\n"); + armlinux_set_revision(loco_system_rev); + return 0; + } -static int loco_devices_init(void) -{ + /* USB PWR enable */ + gpio_direction_output(MX53_LOCO_USB_PWREN, 0); + gpio_set_value(MX53_LOCO_USB_PWREN, 1); - imx53_iim_register_fec_ethaddr(); loco_fec_reset(); - imx53_add_fec(&fec_info); - imx53_add_mmc0(&loco_sd1_data); - imx53_add_mmc2(&loco_sd3_data); - i2c_register_board_info(0, i2c_devices, ARRAY_SIZE(i2c_devices)); - imx53_add_i2c0(NULL); - - if (IS_ENABLED(CONFIG_USB_EHCI)) - loco_ehci_init(); set_silicon_rev(imx_silicon_revision()); armlinux_set_bootparams((void *)0x70000100); armlinux_set_architecture(MACH_TYPE_MX53_LOCO); - imx53_bbu_internal_mmc_register_handler("mmc", "/dev/disk0", + imx53_bbu_internal_mmc_register_handler("mmc", "/dev/mmc0", BBU_HANDLER_FLAG_DEFAULT, dcd_entry, sizeof(dcd_entry), 0); - return 0; -} - -device_initcall(loco_devices_init); - -static int loco_part_init(void) -{ - devfs_add_partition("disk0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self0"); - devfs_add_partition("disk0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env0"); return 0; } -late_initcall(loco_part_init); +late_initcall(loco_late_init); -static int loco_console_init(void) +static int loco_core_init(void) { - mxc_iomux_v3_setup_multiple_pads(loco_pads, ARRAY_SIZE(loco_pads)); - imx53_init_lowlevel(1000); - imx53_add_uart0(); - return 0; -} - -console_initcall(loco_console_init); - -static int loco_pmic_init(void) -{ - struct mc34708 *mc34708; - int rev; - - mc34708 = mc34708_get(); - if (!mc34708) { - /* so we have a DA9053 based board */ - printf("MCIMX53-START board 1.0\n"); - armlinux_set_revision(loco_system_rev); - return 0; - } - - /* get the board revision from fuse */ - rev = readl(MX53_IIM_BASE_ADDR + 0x878); - set_board_rev(rev); - printf("MCIMX53-START-R board 1.0 rev %c\n", (rev == 1) ? 'A' : 'B' ); - armlinux_set_revision(loco_system_rev); - return 0; } - -late_initcall(loco_pmic_init); +core_initcall(loco_core_init); diff --git a/arch/arm/boards/friendlyarm-mini2440/mini2440.c b/arch/arm/boards/friendlyarm-mini2440/mini2440.c index c4b97a2bb8..de07bda755 100644 --- a/arch/arm/boards/friendlyarm-mini2440/mini2440.c +++ b/arch/arm/boards/friendlyarm-mini2440/mini2440.c @@ -62,7 +62,7 @@ static struct dm9000_platform_data dm9000_data = { }; static struct s3c_mci_platform_data mci_data = { - .caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz, + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, .gpio_detect = 232, /* GPG8_GPIO */ .detect_invert = 0, diff --git a/arch/arm/boards/globalscale-guruplug/config.h b/arch/arm/boards/globalscale-guruplug/config.h deleted file mode 100644 index ca15136817..0000000000 --- a/arch/arm/boards/globalscale-guruplug/config.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __CONFIG_H -#define __CONFIG_H - -#endif /* __CONFIG_H */ diff --git a/arch/arm/boards/globalscale-mirabox/Makefile b/arch/arm/boards/globalscale-mirabox/Makefile index 9320510bab..dcfc2937d3 100644 --- a/arch/arm/boards/globalscale-mirabox/Makefile +++ b/arch/arm/boards/globalscale-mirabox/Makefile @@ -1 +1 @@ -obj-y += board.c +obj-y += board.o diff --git a/arch/arm/boards/globalscale-mirabox/config.h b/arch/arm/boards/globalscale-mirabox/config.h deleted file mode 100644 index ca15136817..0000000000 --- a/arch/arm/boards/globalscale-mirabox/config.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __CONFIG_H -#define __CONFIG_H - -#endif /* __CONFIG_H */ diff --git a/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c b/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c index 9620e85f9a..ce59a2ae56 100644 --- a/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c +++ b/arch/arm/boards/imx233-olinuxino/imx23-olinuxino.c @@ -37,7 +37,7 @@ #include <mach/mci.h> static struct mxs_mci_platform_data mci_pdata = { - .caps = MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz, + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, /* fixed to 3.3 V */ .f_min = 400000, }; @@ -124,12 +124,6 @@ static int imx23_olinuxino_devices_init(void) armlinux_set_bootparams((void *)IMX_MEMORY_BASE + 0x100); armlinux_set_architecture(MACH_TYPE_IMX233_OLINUXINO); - /* enable IOCLK to run at the PLL frequency */ - imx_set_ioclk(480000000); - - /* run the SSP unit clock at 100,000 kHz */ - imx_set_sspclk(0, 100000000, 1); - add_generic_device("mxs_mci", DEVICE_ID_DYNAMIC, NULL, IMX_SSP1_BASE, 0x8000, IORESOURCE_MEM, &mci_pdata); diff --git a/arch/arm/boards/imx27ads/lowlevel_init.S b/arch/arm/boards/imx27ads/lowlevel_init.S index ce276a9328..465f3ebb62 100644 --- a/arch/arm/boards/imx27ads/lowlevel_init.S +++ b/arch/arm/boards/imx27ads/lowlevel_init.S @@ -15,7 +15,7 @@ #define CRM_PLL_PCTL_PARAM(pd, fd, fi, fn) (((pd-1)<<26) + ((fd-1)<<16) + (fi<<10) + (fn<<0)) -.macro sdram_init_sha +.macro sdram_init /* * DDR on CSD0 */ @@ -49,69 +49,6 @@ writel(0x82226080, 0xD8001000) .endm -.macro sdram_init_mx27_manual - /* - * sdram init sequence, as defined in 18.5.4 of the i.MX27 reference manual - */ -1: - ldr r2, =ESD_ESDCTL0 /* base address of registers */ - ldr r3, =PRE_ALL_CMD /* SMODE=001 */ - str r3,(r2,#0x0) /* put CSD0 in precharge command mode */ - ldr r4, =SDRAM_CSD0 /* CSD0 precharge address (A10=1) */ - str r1,(r4,#0x0) /* precharge CSD0 all banks */ - ldr r3, =AUTO_REF_CMD /* SMODE=010 */ - str r3,(r2,#0x0) /* put array 0 in auto-refresh mode */ - ldr r4, =SDRAM_CSD0_BASE /* CSD0 base address */ - ldr r6,=0x7 /* load loop counter */ -1: ldr r5,(r4,#0x0) /* run auto-refresh cycle to array 0 */ - subs r6,r6,#1 /* decrease counter value */ - bne 1b - ldr r3, =SET_MODE_REG_CMD /* SMODE=011 */ - str r3,(r2,#0x0) /* setup CSD0 for mode register write */ - ldr r3, =MODE_REG_VAL0 /* array 0 mode register value */ - ldrb r5,(r3,#0x0) /* New mode register value on address bus */ - ldr r3, =NORMAL_MODE /* SMODE=000 */ - str r3,(r2,#0x0) /* setup CSD0 for normal operation */ - -ESD_ESDCTL0 .long 0xD8001000 // system/external device dependent data -SDRAM_CSD0 .long 0x00000000 // system/external device dependent data -SDRAM_CSD0_BASE .long 0x00000000 // system/external device dependent data -PRE_ALL_CMD .long 0x00000000 // system/external device dependent data (SMODE=001) -AUTO_REF_CMD .long 0x00000000 // system/external device dependent data (SMODE=010) -SET_MODE_REG_CMD .long 0x00000000 // system/external device dependent data (SMODE=011) -MODE_REG_VAL0 .long 0x00000000 // system/external device dependent data -NORMAL_MODE .long 0x00000000 // system/external device dependent data (SMODE=000) -.endm - -.macro sdram_init_barebox - /* configure 16 bit nor flash on cs0 */ - writel(0x0000CC03, 0xd8002000) - writel(0xa0330D01, 0xd8002004) - writel(0x00220800, 0xd8002008) - - /* ddr on csd0 - initial reset */ - writel(0x00000008, 0xD8001010) - - /* configure ddr on csd0 - wait 5000 cycles */ - writel(0x00000004, 0xD8001010) - writel(0x006ac73a, 0xD8001004) - writel(0x92100000, 0xD8001000) - writel(0x12344321, 0xA0000f00) - writel(0xa2100000, 0xD8001000) - writel(0x12344321, 0xA0000000) - writel(0x12344321, 0xA0000000) - writel(0xb2100000, 0xD8001000) - ldr r0, =0xA0000033 - mov r1, #0xda - strb r1, [r0] - ldr r0, =0xA1000000 - mov r1, #0xff - strb r1, [r0] - writel(0x82226080, 0xD8001000) - writel(0xDEADBEEF, 0xA0000000) - writel(0x0000000c, 0xD8001010) -.endm - .globl barebox_arm_reset_vector barebox_arm_reset_vector: @@ -169,7 +106,7 @@ barebox_arm_reset_vector: b imx27_barebox_entry 1: - sdram_init_sha + sdram_init b imx27_barebox_entry diff --git a/arch/arm/boards/karo-tx25/config.h b/arch/arm/boards/karo-tx25/config.h deleted file mode 100644 index 4cbb4f6665..0000000000 --- a/arch/arm/boards/karo-tx25/config.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * (C) Copyright 2011 Sascha Hauer <s.hauer@pengutronix.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Definitions related to passing arguments to kernel. - */ - -#define CONFIG_MX25_HCLK_FREQ 24000000 - -#endif - -/* nothing to do here yet */ diff --git a/arch/arm/boards/karo-tx28/tx28-stk5.c b/arch/arm/boards/karo-tx28/tx28-stk5.c index a0109d6b98..a1b161a5c5 100644 --- a/arch/arm/boards/karo-tx28/tx28-stk5.c +++ b/arch/arm/boards/karo-tx28/tx28-stk5.c @@ -30,7 +30,7 @@ #include <mach/ocotp.h> static struct mxs_mci_platform_data mci_pdata = { - .caps = MMC_MODE_4BIT, + .caps = MMC_CAP_4_BIT_DATA, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, /* fixed to 3.3 V */ .f_min = 400 * 1000, .f_max = 25000000, @@ -371,11 +371,6 @@ void base_board_init(void) for (i = 0; i < ARRAY_SIZE(tx28_starterkit_pad_setup); i++) imx_gpio_mode(tx28_starterkit_pad_setup[i]); - /* enable IOCLK0 to run at the PLL frequency */ - imx_set_ioclk(0, 480000000); - /* run the SSP unit clock at 100 MHz */ - imx_set_sspclk(0, 100000000, 1); - add_generic_device("mxs_mci", 0, NULL, IMX_SSP0_BASE, 0x2000, IORESOURCE_MEM, &mci_pdata); @@ -392,7 +387,6 @@ void base_board_init(void) tx28_get_ethaddr(); - imx_enable_enetclk(); add_generic_device("imx28-fec", 0, NULL, IMX_FEC0_BASE, 0x4000, IORESOURCE_MEM, &fec_info); diff --git a/arch/arm/boards/marvell-armada-xp-gp/config.h b/arch/arm/boards/marvell-armada-xp-gp/config.h deleted file mode 100644 index ca15136817..0000000000 --- a/arch/arm/boards/marvell-armada-xp-gp/config.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __CONFIG_H -#define __CONFIG_H - -#endif /* __CONFIG_H */ diff --git a/arch/arm/boards/panda/lowlevel.c b/arch/arm/boards/panda/lowlevel.c index ed1dc6f5f1..5d3490f822 100644 --- a/arch/arm/boards/panda/lowlevel.c +++ b/arch/arm/boards/panda/lowlevel.c @@ -52,6 +52,7 @@ static void noinline panda_init_lowlevel(void) struct dpll_param per = OMAP4_PER_DPLL_PARAM_38M4; struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_38M4; struct dpll_param usb = OMAP4_USB_DPLL_PARAM_38M4; + unsigned int rev = omap4_revision(); writel(CM_SYS_CLKSEL_38M4, CM_SYS_CLKSEL); @@ -69,8 +70,10 @@ static void noinline panda_init_lowlevel(void) omap4_ddr_init(&ddr_regs_400_mhz_2cs, &core); - /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */ - omap4_scale_vcores(TPS62361_VSEL0_GPIO); + if (rev < OMAP4460_ES1_0) + omap4430_scale_vcores(); + else + omap4460_scale_vcores(TPS62361_VSEL0_GPIO, 1210); } void barebox_arm_reset_vector(void) diff --git a/arch/arm/boards/pcm037/config.h b/arch/arm/boards/pcm037/config.h deleted file mode 100644 index ca62df6b7a..0000000000 --- a/arch/arm/boards/pcm037/config.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * (C) Copyright 2007 Juergen Beisert <jbe@pengutronix.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Definitions related to passing arguments to kernel. - */ - -/* #define CONFIG_SYSPLL_CLK_FREQ 26000000 */ - -/* FIXME */ -#define CONFIG_MX31_HCLK_FREQ 26000000 -#define CONFIG_MX31_CLK32 32000 - -#endif - -/* nothing to do here yet */ diff --git a/arch/arm/boards/pcm037/pcm037.c b/arch/arm/boards/pcm037/pcm037.c index 9361a9d523..de83c99b93 100644 --- a/arch/arm/boards/pcm037/pcm037.c +++ b/arch/arm/boards/pcm037/pcm037.c @@ -146,7 +146,7 @@ static struct smc911x_plat smsc9217_pdata = { .flags = SMC911X_FORCE_INTERNAL_PHY, }; -static int imx31_devices_init(void) +static int pcm037_devices_init(void) { /* CS0: Nor Flash */ imx31_setup_weimcs(0, 0x0000cf03, 0x10000d03, 0x00720900); @@ -202,7 +202,7 @@ static int imx31_devices_init(void) return 0; } -device_initcall(imx31_devices_init); +device_initcall(pcm037_devices_init); static unsigned int pcm037_iomux[] = { /* UART1 */ diff --git a/arch/arm/boards/pcm038/lowlevel.c b/arch/arm/boards/pcm038/lowlevel.c index 0ea293981b..a3b2d1315a 100644 --- a/arch/arm/boards/pcm038/lowlevel.c +++ b/arch/arm/boards/pcm038/lowlevel.c @@ -33,11 +33,13 @@ #define ESDCTL0_VAL (ESDCTL0_SDE | ESDCTL0_ROW13 | ESDCTL0_COL10) -void __bare_init __naked barebox_arm_reset_vector(void) +ENTRY_FUNCTION(start_imx27_pcm038)(void) { uint32_t r; int i; + __barebox_arm_head(); + arm_cpu_lowlevel_init(); /* ahb lite ip interface */ diff --git a/arch/arm/boards/pcm038/pcm038.c b/arch/arm/boards/pcm038/pcm038.c index 49677c299b..f6a3e171eb 100644 --- a/arch/arm/boards/pcm038/pcm038.c +++ b/arch/arm/boards/pcm038/pcm038.c @@ -46,9 +46,10 @@ #include "pll.h" +#define PCM038_GPIO_PMIC_IRQ (GPIO_PORTB + 23) #define PCM038_GPIO_FEC_RST (GPIO_PORTC + 30) -#define PCM038_GPIO_SPI_CS0 (GPIO_PORTD + 28) #define PCM970_GPIO_SPI_CS1 (GPIO_PORTD + 27) +#define PCM038_GPIO_SPI_CS0 (GPIO_PORTD + 28) #define PCM038_GPIO_OTG_STP (GPIO_PORTE + 1) static struct fec_platform_data fec_info = { @@ -225,7 +226,6 @@ static int pcm038_devices_init(void) PD15_AOUT_FEC_COL, PD16_AIN_FEC_TX_ER, PF23_AIN_FEC_TX_EN, - PCM038_GPIO_FEC_RST | GPIO_GPIO | GPIO_OUT, /* UART1 */ PE12_PF_UART1_TXD, PE13_PF_UART1_RXD, @@ -236,10 +236,6 @@ static int pcm038_devices_init(void) PD29_PF_CSPI1_SCLK, PD30_PF_CSPI1_MISO, PD31_PF_CSPI1_MOSI, - PCM038_GPIO_SPI_CS0 | GPIO_GPIO | GPIO_OUT, -#ifdef CONFIG_MACH_PCM970_BASEBOARD - PCM970_GPIO_SPI_CS1 | GPIO_GPIO | GPIO_OUT, -#endif /* Display */ PA5_PF_LSCLK, PA6_PF_LD0, @@ -287,6 +283,13 @@ static int pcm038_devices_init(void) /* I2C2 */ PC5_PF_I2C2_SDA, PC6_PF_I2C2_SCL, + /* Misc */ + PCM038_GPIO_FEC_RST | GPIO_GPIO | GPIO_OUT, + PCM038_GPIO_SPI_CS0 | GPIO_GPIO | GPIO_OUT, +#ifdef CONFIG_MACH_PCM970_BASEBOARD + PCM970_GPIO_SPI_CS1 | GPIO_GPIO | GPIO_OUT, +#endif + PCM038_GPIO_PMIC_IRQ | GPIO_GPIO | GPIO_IN, }; /* configure 16 bit nor flash on cs0 */ @@ -328,7 +331,8 @@ static int pcm038_devices_init(void) mdelay(1); imx_gpio_mode(PE1_PF_USBOTG_STP); - imx27_add_usbotg(&pcm038_otg_pdata); + if (IS_ENABLED(CONFIG_USB_GADGET_DRIVER_ARC)) + imx27_add_usbotg(&pcm038_otg_pdata); switch (bootsource_get()) { case BOOTSOURCE_NAND: diff --git a/arch/arm/boards/pcm043/config.h b/arch/arm/boards/pcm043/config.h deleted file mode 100644 index 501a44df40..0000000000 --- a/arch/arm/boards/pcm043/config.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * (C) Copyright 2007 Juergen Beisert <jbe@pengutronix.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Definitions related to passing arguments to kernel. - */ - -#define CONFIG_MX35_HCLK_FREQ 24000000 - -#endif - -/* nothing to do here yet */ diff --git a/arch/arm/boards/pcm043/pcm043.c b/arch/arm/boards/pcm043/pcm043.c index b2726dffc8..68b7864aa1 100644 --- a/arch/arm/boards/pcm043/pcm043.c +++ b/arch/arm/boards/pcm043/pcm043.c @@ -113,7 +113,7 @@ struct gpio_led led0 = { .gpio = 1 * 32 + 6, }; -static int imx35_devices_init(void) +static int pcm043_devices_init(void) { uint32_t reg; char *envstr; @@ -173,7 +173,7 @@ static int imx35_devices_init(void) return 0; } -device_initcall(imx35_devices_init); +device_initcall(pcm043_devices_init); static iomux_v3_cfg_t pcm043_pads[] = { MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, diff --git a/arch/arm/boards/pcm049/lowlevel.c b/arch/arm/boards/pcm049/lowlevel.c index 8bcecb14b1..6b12fa40a9 100644 --- a/arch/arm/boards/pcm049/lowlevel.c +++ b/arch/arm/boards/pcm049/lowlevel.c @@ -67,6 +67,7 @@ static void noinline pcm049_init_lowlevel(void) struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2; struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2; struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2; + unsigned int rev = omap4_revision(); set_muxconf_regs(); @@ -77,12 +78,15 @@ static void noinline pcm049_init_lowlevel(void) #endif /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */ - omap4_scale_vcores(TPS62361_VSEL0_GPIO); + if (rev < OMAP4460_ES1_0) + omap4430_scale_vcores(); + else + omap4460_scale_vcores(TPS62361_VSEL0_GPIO, 1320); writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL); /* Configure all DPLL's at 100% OPP */ - if (omap4_revision() < OMAP4460_ES1_0) + if (rev < OMAP4460_ES1_0) omap4_configure_mpu_dpll(&mpu44xx); else omap4_configure_mpu_dpll(&mpu4460); diff --git a/arch/arm/boards/pcm051/board.c b/arch/arm/boards/pcm051/board.c index 8754ba5f1a..eea5ebb575 100644 --- a/arch/arm/boards/pcm051/board.c +++ b/arch/arm/boards/pcm051/board.c @@ -19,13 +19,21 @@ #include <common.h> #include <init.h> +#include <io.h> #include <sizes.h> #include <ns16550.h> #include <asm/armlinux.h> #include <generated/mach-types.h> +#include <linux/phy.h> #include <mach/am33xx-devices.h> +#include <mach/am33xx-generic.h> #include <mach/am33xx-mux.h> #include <mach/am33xx-silicon.h> +#include <mach/cpsw.h> +#include <spi/spi.h> +#include <spi/flash.h> +#include <i2c/i2c.h> +#include <i2c/at24.h> #include "mux.h" @@ -52,12 +60,91 @@ static int pcm051_mem_init(void) } mem_initcall(pcm051_mem_init); +static struct flash_platform_data pcm051_spi_flash = { + .name = "nor", + .type = "w25q64", +}; + +/* +* SPI Flash works at 80Mhz however the SPI controller runs with 48MHz. +* So setup Max speed to be less than the controller speed. +*/ +static struct spi_board_info pcm051_spi_board_info[] = { + { + .name = "m25p80", + .platform_data = &pcm051_spi_flash, + .max_speed_hz = 24000000, + .bus_num = 0, + .chip_select = 0, + }, +}; + +static struct cpsw_slave_data cpsw_slaves[] = { + { + .phy_id = 0, + .phy_if = PHY_INTERFACE_MODE_RMII, + }, +}; + +static struct cpsw_platform_data cpsw_data = { + .slave_data = cpsw_slaves, + .num_slaves = ARRAY_SIZE(cpsw_slaves), +}; + +static struct i2c_board_info i2c0_devices[] = { + { + I2C_BOARD_INFO("24c32", 0x52), + }, +}; + +static void pcm051_spi_init(void) +{ + int ret; + + am33xx_enable_spi0_pin_mux(); + + ret = spi_register_board_info(pcm051_spi_board_info, + ARRAY_SIZE(pcm051_spi_board_info)); + am33xx_add_spi0(); +} + +static void pcm051_eth_init(void) +{ + am33xx_register_ethaddr(0, 0); + + writel(0x49, AM33XX_MAC_MII_SEL); + + am33xx_enable_rmii1_pin_mux(); + + am33xx_add_cpsw(&cpsw_data); +} + +static void pcm051_i2c_init(void) +{ + am33xx_enable_i2c0_pin_mux(); + + i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices)); + + am33xx_add_i2c0(NULL); +} + static int pcm051_devices_init(void) { pcm051_enable_mmc0_pin_mux(); am33xx_add_mmc0(NULL); + pcm051_spi_init(); + pcm051_eth_init(); + pcm051_i2c_init(); + + devfs_add_partition("nor0", 0x00000, SZ_128K, + DEVFS_PARTITION_FIXED, "xload"); + devfs_add_partition("nor0", SZ_128K, SZ_512K, + DEVFS_PARTITION_FIXED, "self0"); + devfs_add_partition("nor0", SZ_128K + SZ_512K, SZ_128K, + DEVFS_PARTITION_FIXED, "env0"); + armlinux_set_bootparams((void *)(AM33XX_DRAM_ADDR_SPACE_START + 0x100)); armlinux_set_architecture(MACH_TYPE_PCM051); diff --git a/arch/arm/boards/pcm051/env/boot/spi-nor b/arch/arm/boards/pcm051/env/boot/spi-nor new file mode 100644 index 0000000000..d5f77c80cf --- /dev/null +++ b/arch/arm/boards/pcm051/env/boot/spi-nor @@ -0,0 +1,12 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + boot-menu-add-entry "$0" "SPI NOR Flash" + exit +fi + +global.bootm.image="/dev/nor0.kernel" + +# Use rootfs form SD-Card for now as rootfs partition < 4MB +global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootfstype=ext3 rootwait" + diff --git a/arch/arm/boards/pcm051/env/init/mtdparts-nor b/arch/arm/boards/pcm051/env/init/mtdparts-nor new file mode 100644 index 0000000000..91aa847851 --- /dev/null +++ b/arch/arm/boards/pcm051/env/init/mtdparts-nor @@ -0,0 +1,12 @@ +#!/bin/sh + +if [ "$1" = menu ]; then + init-menu-add-entry "$0" "NOR partitions" + exit +fi + +mtdparts="128k(nor0.xload),512k(nor0.barebox),128k(nor0.bareboxenv),4M(nor0.kernel),-(nor0.root)" +kernelname="spi_flash" + +mtdparts-add -d nor0 -k ${kernelname} -p ${mtdparts} + diff --git a/arch/arm/boards/phycard-a-xl2/lowlevel.c b/arch/arm/boards/phycard-a-xl2/lowlevel.c index 07505ffbc0..010171a04c 100644 --- a/arch/arm/boards/phycard-a-xl2/lowlevel.c +++ b/arch/arm/boards/phycard-a-xl2/lowlevel.c @@ -52,18 +52,21 @@ static noinline void pcaaxl2_init_lowlevel(void) struct dpll_param per = OMAP4_PER_DPLL_PARAM_19M2; struct dpll_param abe = OMAP4_ABE_DPLL_PARAM_19M2; struct dpll_param usb = OMAP4_USB_DPLL_PARAM_19M2; + unsigned int rev = omap4_revision(); set_muxconf_regs(); omap4_ddr_init(&ddr_regs_mt42L64M64_25_400_mhz, &core); - /* Set VCORE1 = 1.3 V, VCORE2 = VCORE3 = 1.21V */ - omap4_scale_vcores(TPS62361_VSEL0_GPIO); + if (rev < OMAP4460_ES1_0) + omap4430_scale_vcores(); + else + omap4460_scale_vcores(TPS62361_VSEL0_GPIO, 1320); writel(CM_SYS_CLKSEL_19M2, CM_SYS_CLKSEL); /* Configure all DPLL's at 100% OPP */ - if (omap4_revision() < OMAP4460_ES1_0) + if (rev < OMAP4460_ES1_0) omap4_configure_mpu_dpll(&mpu44xx); else omap4_configure_mpu_dpll(&mpu4460); diff --git a/arch/arm/boards/plathome-openblocks-ax3/config.h b/arch/arm/boards/plathome-openblocks-ax3/config.h deleted file mode 100644 index ca15136817..0000000000 --- a/arch/arm/boards/plathome-openblocks-ax3/config.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __CONFIG_H -#define __CONFIG_H - -#endif /* __CONFIG_H */ diff --git a/arch/arm/boards/scb9328/config.h b/arch/arm/boards/scb9328/config.h deleted file mode 100644 index e825482c8e..0000000000 --- a/arch/arm/boards/scb9328/config.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2003 ETC s.r.o. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * Written by Peter Figuli <peposh@etc.sk>, 2003. - * - * 2003/13/06 Initial MP10 Support copied from wepep250 - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_SYSPLL_CLK_FREQ 16000000 - -#endif /* __CONFIG_H */ - diff --git a/arch/arm/boards/scb9328/lowlevel_init.S b/arch/arm/boards/scb9328/lowlevel_init.S index d7afa21b23..4250c95dfb 100644 --- a/arch/arm/boards/scb9328/lowlevel_init.S +++ b/arch/arm/boards/scb9328/lowlevel_init.S @@ -15,61 +15,10 @@ #include <mach/imx1-regs.h> #include <asm/barebox-arm-head.h> -#define CPU200 - -#ifdef CPU200 #define CFG_MPCTL0_VAL 0x00321431 -#else -#define CFG_MPCTL0_VAL 0x040e200e -#endif - -#define BUS72 - -#ifdef BUS72 #define CFG_SPCTL0_VAL 0x04002400 -#endif - -#ifdef BUS96 -#define CFG_SPCTL0_VAL 0x04001800 -#endif - -#ifdef BUS64 -#define CFG_SPCTL0_VAL 0x08001800 -#endif - -/* Das ist der BCLK Divider, der aus der System PLL - BCLK und HCLK erzeugt: - 31 | xxxx xxxx xxxx xxxx xx10 11xx xxxx xxxx | 0 - 0x2f008403 : 192MHz/2=96MHz, 144MHz/2=72MHz PRESC=1->BCLKDIV=2 - 0x2f008803 : 192MHz/3=64MHz, 240MHz/3=80MHz PRESC=1->BCLKDIV=2 - 0x2f001003 : 192MHz/5=38,4MHz - 0x2f000003 : 64MHz/1 - Bit 22: SPLL Restart - Bit 21: MPLL Restart */ - -#ifdef BUS64 -#define CFG_CSCR_VAL 0x2f030003 -#endif - -#ifdef BUS72 #define CFG_CSCR_VAL 0x2f030403 -#endif -/* Bit[0:3] contain PERCLK1DIV for UART 1 - 0x000b00b ->b<- -> 192MHz/12=16MHz - 0x000b00b ->8<- -> 144MHz/09=16MHz - 0x000b00b ->3<- -> 64MHz/4=16MHz */ - -#ifdef BUS96 -#define CFG_PCDR_VAL 0x000b00b5 -#endif - -#ifdef BUS64 -#define CFG_PCDR_VAL 0x000b00b3 -#endif - -#ifdef BUS72 #define CFG_PCDR_VAL 0x000b00b8 -#endif #define writel(val, reg) \ ldr r0, =reg; \ diff --git a/arch/arm/boards/solidrun-cubox/Makefile b/arch/arm/boards/solidrun-cubox/Makefile index 9320510bab..dcfc2937d3 100644 --- a/arch/arm/boards/solidrun-cubox/Makefile +++ b/arch/arm/boards/solidrun-cubox/Makefile @@ -1 +1 @@ -obj-y += board.c +obj-y += board.o diff --git a/arch/arm/boards/tqma53/board.c b/arch/arm/boards/tqma53/board.c index 0054a7e93f..19ad37efcf 100644 --- a/arch/arm/boards/tqma53/board.c +++ b/arch/arm/boards/tqma53/board.c @@ -220,7 +220,7 @@ static struct esdhc_platform_data tqma53_sd2_data = { static struct esdhc_platform_data tqma53_sd3_data = { .cd_type = ESDHC_CD_PERMANENT, .wp_type = ESDHC_WP_NONE, - .caps = MMC_MODE_8BIT | MMC_MODE_4BIT, + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, }; static int tqma53_devices_init(void) diff --git a/arch/arm/configs/dmo-realq7_defconfig b/arch/arm/configs/dmo-realq7_defconfig index d063e9757d..5501683576 100644 --- a/arch/arm/configs/dmo-realq7_defconfig +++ b/arch/arm/configs/dmo-realq7_defconfig @@ -1,3 +1,5 @@ +CONFIG_BUILTIN_DTB=y +CONFIG_BUILTIN_DTB_NAME="imx6q-dmo-realq7" CONFIG_ARCH_IMX=y CONFIG_ARCH_IMX6=y CONFIG_MACH_REALQ7=y @@ -18,6 +20,7 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y +CONFIG_CONSOLE_ACTIVATE_NONE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/dmo-mx6-realq7/env" CONFIG_RESET_SOURCE=y @@ -50,7 +53,6 @@ CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y CONFIG_CMD_RESET=y CONFIG_CMD_GO=y CONFIG_CMD_OFTREE=y -CONFIG_CMD_OFTREE_PROBE=y CONFIG_CMD_OF_PROPERTY=y CONFIG_CMD_OF_NODE=y CONFIG_CMD_BAREBOX_UPDATE=y @@ -64,12 +66,14 @@ CONFIG_CMD_I2C=y CONFIG_CMD_SPI=y CONFIG_CMD_MIITOOL=y CONFIG_CMD_CLK=y +CONFIG_CMD_DETECT=y CONFIG_CMD_WD=y CONFIG_NET=y CONFIG_NET_DHCP=y CONFIG_NET_NFS=y CONFIG_NET_PING=y CONFIG_NET_RESOLV=y +CONFIG_OFDEVICE=y CONFIG_DRIVER_NET_FEC_IMX=y CONFIG_DRIVER_SPI_IMX=y CONFIG_I2C=y diff --git a/arch/arm/configs/efika-mx-smartbook_defconfig b/arch/arm/configs/efika-mx-smartbook_defconfig index 2ef33b448f..8e14466963 100644 --- a/arch/arm/configs/efika-mx-smartbook_defconfig +++ b/arch/arm/configs/efika-mx-smartbook_defconfig @@ -1,3 +1,5 @@ +CONFIG_BUILTIN_DTB=y +CONFIG_BUILTIN_DTB_NAME="imx51-genesi-efika-sb" CONFIG_ARCH_IMX=y CONFIG_ARCH_IMX51=y CONFIG_MACH_EFIKA_MX_SMARTBOOK=y @@ -30,9 +32,7 @@ CONFIG_CMD_READLINE=y CONFIG_CMD_MENU=y CONFIG_CMD_MENU_MANAGEMENT=y CONFIG_CMD_TIME=y -CONFIG_CMD_DIRNAME=y CONFIG_CMD_LN=y -CONFIG_CMD_READLINK=y CONFIG_CMD_TFTP=y CONFIG_CMD_FILETYPE=y CONFIG_CMD_ECHO_E=y @@ -52,7 +52,8 @@ CONFIG_CMD_UIMAGE=y CONFIG_CMD_RESET=y CONFIG_CMD_GO=y CONFIG_CMD_OFTREE=y -CONFIG_CMD_OFTREE_PROBE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OF_NODE=y CONFIG_CMD_BAREBOX_UPDATE=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y @@ -66,6 +67,7 @@ CONFIG_CMD_LED=y CONFIG_CMD_LED_TRIGGER=y CONFIG_CMD_MIITOOL=y CONFIG_CMD_CLK=y +CONFIG_CMD_DETECT=y CONFIG_CMD_WD=y CONFIG_NET=y CONFIG_NET_DHCP=y @@ -73,16 +75,17 @@ CONFIG_NET_NFS=y CONFIG_NET_PING=y CONFIG_NET_NETCONSOLE=y CONFIG_NET_RESOLV=y +CONFIG_OFDEVICE=y CONFIG_NET_USB=y CONFIG_NET_USB_ASIX=y CONFIG_NET_USB_SMSC95XX=y CONFIG_DRIVER_SPI_IMX=y CONFIG_I2C=y CONFIG_I2C_IMX=y -CONFIG_DRIVER_CFI=y -CONFIG_CFI_BUFFER_WRITE=y CONFIG_MTD=y CONFIG_MTD_M25P80=y +CONFIG_DRIVER_CFI=y +CONFIG_CFI_BUFFER_WRITE=y CONFIG_DISK_INTF_PLATFORM_IDE=y CONFIG_DISK_PATA_IMX=y CONFIG_USB=y diff --git a/arch/arm/configs/freescale_mx53_loco_defconfig b/arch/arm/configs/freescale_mx53_loco_defconfig index fb6fcf8d36..e45863c262 100644 --- a/arch/arm/configs/freescale_mx53_loco_defconfig +++ b/arch/arm/configs/freescale_mx53_loco_defconfig @@ -1,3 +1,5 @@ +CONFIG_BUILTIN_DTB=y +CONFIG_BUILTIN_DTB_NAME="imx53-qsb" CONFIG_ARCH_IMX=y CONFIG_ARCH_IMX53=y CONFIG_IMX_IIM=y @@ -8,8 +10,7 @@ CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y CONFIG_ARM_UNWIND=y CONFIG_PBL_IMAGE=y CONFIG_MMU=y -CONFIG_TEXT_BASE=0x7ff00000 -CONFIG_MALLOC_SIZE=0x2000000 +CONFIG_MALLOC_SIZE=0x0 CONFIG_MALLOC_TLSF=y CONFIG_KALLSYMS=y CONFIG_LONGHELP=y @@ -17,6 +18,7 @@ CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y +CONFIG_CONSOLE_ACTIVATE_NONE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/freescale-mx53-loco/env/" CONFIG_RESET_SOURCE=y @@ -31,9 +33,7 @@ CONFIG_CMD_READLINE=y CONFIG_CMD_MENU=y CONFIG_CMD_MENU_MANAGEMENT=y CONFIG_CMD_TIME=y -CONFIG_CMD_DIRNAME=y CONFIG_CMD_LN=y -CONFIG_CMD_READLINK=y CONFIG_CMD_TFTP=y CONFIG_CMD_FILETYPE=y CONFIG_CMD_ECHO_E=y @@ -62,11 +62,13 @@ CONFIG_CMD_UNCOMPRESS=y CONFIG_CMD_I2C=y CONFIG_CMD_MIITOOL=y CONFIG_CMD_CLK=y +CONFIG_CMD_DETECT=y CONFIG_CMD_WD=y CONFIG_NET=y CONFIG_NET_DHCP=y CONFIG_NET_PING=y CONFIG_NET_NETCONSOLE=y +CONFIG_OFDEVICE=y CONFIG_SMSC_PHY=y CONFIG_DRIVER_NET_FEC_IMX=y # CONFIG_SPI is not set @@ -77,7 +79,6 @@ CONFIG_USB=y CONFIG_USB_EHCI=y CONFIG_USB_STORAGE=y CONFIG_MCI=y -CONFIG_MCI_STARTUP=y CONFIG_MCI_IMX_ESDHC=y CONFIG_MFD_MC34708=y CONFIG_WATCHDOG=y diff --git a/arch/arm/configs/pcm051_defconfig b/arch/arm/configs/pcm051_defconfig index 4da0ed43e5..8de3714da9 100644 --- a/arch/arm/configs/pcm051_defconfig +++ b/arch/arm/configs/pcm051_defconfig @@ -42,15 +42,25 @@ CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y CONFIG_CMD_GPIO=y CONFIG_CMD_UNCOMPRESS=y +CONFIG_CMD_I2C=y +CONFIG_NET=y +CONFIG_NET_DHCP=y +CONFIG_NET_NFS=y +CONFIG_NET_PING=y CONFIG_DRIVER_SERIAL_NS16550=y CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y -# CONFIG_SPI is not set +CONFIG_DRIVER_NET_CPSW=y +CONFIG_DRIVER_SPI_OMAP3=y +CONFIG_I2C=y +CONFIG_I2C_OMAP=y CONFIG_MTD=y +CONFIG_MTD_M25P80=y CONFIG_NAND=y CONFIG_USB=y CONFIG_MCI=y CONFIG_MCI_STARTUP=y CONFIG_MCI_OMAP_HSMMC=y +CONFIG_EEPROM_AT24=y CONFIG_FS_FAT=y CONFIG_FS_FAT_WRITE=y CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile index c442b35797..fba8ff2784 100644 --- a/arch/arm/cpu/Makefile +++ b/arch/arm/cpu/Makefile @@ -8,7 +8,7 @@ obj-y += start.o setupc.o # obj-$(CONFIG_CMD_ARM_CPUINFO) += cpuinfo.o obj-$(CONFIG_CMD_ARM_MMUINFO) += mmuinfo.o -obj-$(CONFIG_BUILTIN_DTB) += dtb.o +obj-$(CONFIG_OFDEVICE) += dtb.o obj-$(CONFIG_MMU) += mmu.o cache.o mmu-early.o pbl-$(CONFIG_MMU) += cache.o mmu-early.o obj-$(CONFIG_CPU_32v4T) += cache-armv4.o @@ -21,7 +21,9 @@ obj-$(CONFIG_CPU_32v7) += cache-armv7.o pbl-$(CONFIG_CPU_32v7) += cache-armv7.o obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o -pbl-y += start-pbl.o setupc.o +pbl-y += setupc.o +pbl-$(CONFIG_PBL_SINGLE_IMAGE) += start-pbl.o +pbl-$(CONFIG_PBL_MULTI_IMAGES) += start-images.o uncompress.o obj-y += common.o pbl-y += common.o diff --git a/arch/arm/cpu/dtb.c b/arch/arm/cpu/dtb.c index 10b73bd519..a5881dd721 100644 --- a/arch/arm/cpu/dtb.c +++ b/arch/arm/cpu/dtb.c @@ -17,20 +17,38 @@ #include <common.h> #include <init.h> #include <of.h> +#include <asm/barebox-arm.h> extern char __dtb_start[]; static int of_arm_init(void) { struct device_node *root; + void *fdt; + /* See if we already have a dtb */ root = of_get_root_node(); if (root) return 0; - root = of_unflatten_dtb(NULL, __dtb_start); - if (root) { + /* See if we are provided a dtb in boarddata */ + fdt = barebox_arm_boot_dtb(); + if (fdt) + pr_debug("using boarddata provided DTB\n"); + + /* Next see if we have a builtin dtb */ + if (!fdt && IS_ENABLED(CONFIG_BUILTIN_DTB)) { + fdt = __dtb_start; pr_debug("using internal DTB\n"); + } + + if (!fdt) { + pr_debug("No DTB found\n"); + return 0; + } + + root = of_unflatten_dtb(NULL, fdt); + if (root) { of_set_root_node(root); if (IS_ENABLED(CONFIG_OFDEVICE)) of_probe(); diff --git a/arch/arm/cpu/start-images.c b/arch/arm/cpu/start-images.c new file mode 100644 index 0000000000..d48d245294 --- /dev/null +++ b/arch/arm/cpu/start-images.c @@ -0,0 +1,49 @@ +/* + * start-pbl.c + * + * Copyright (c) 2010-2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * Copyright (c) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <common.h> +#include <init.h> +#include <sizes.h> +#include <pbl.h> +#include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> +#include <asm-generic/memory_layout.h> +#include <asm/sections.h> +#include <asm/pgtable.h> +#include <debug_ll.h> + +void __naked __noreturn barebox_arm_entry(uint32_t membase, uint32_t memsize, + uint32_t boarddata) +{ + unsigned long barebox_base; + void __noreturn (*barebox)(uint32_t, uint32_t, uint32_t); + + barebox_base = ld_var(__image_end) - get_runtime_offset() + 4; + + if (IS_ENABLED(CONFIG_THUMB2_BAREBOX)) + barebox = (void *)(barebox_base + 1); + else + barebox = (void *)barebox_base; + + barebox(membase, memsize, boarddata); +} diff --git a/arch/arm/cpu/start.c b/arch/arm/cpu/start.c index 5a3c629c73..1f397ec789 100644 --- a/arch/arm/cpu/start.c +++ b/arch/arm/cpu/start.c @@ -24,6 +24,7 @@ #include <asm/barebox-arm-head.h> #include <asm-generic/memory_layout.h> #include <asm/sections.h> +#include <asm/unaligned.h> #include <asm/cache.h> #include <memory.h> @@ -40,6 +41,13 @@ unsigned long barebox_arm_boarddata(void) return barebox_boarddata; } +static void *barebox_boot_dtb; + +void *barebox_arm_boot_dtb(void) +{ + return barebox_boot_dtb; +} + static noinline __noreturn void __start(uint32_t membase, uint32_t memsize, uint32_t boarddata) { @@ -66,6 +74,18 @@ static noinline __noreturn void __start(uint32_t membase, uint32_t memsize, mmu_early_enable(membase, memsize, endmem); } + /* + * If boarddata is a pointer inside valid memory and contains a + * FDT magic then use it as later to probe devices + */ + if (boarddata > membase && boarddata < membase + memsize && + get_unaligned_be32((void *)boarddata) == FDT_MAGIC) { + uint32_t totalsize = get_unaligned_be32((void *)boarddata + 4); + endmem -= ALIGN(totalsize, 64); + barebox_boot_dtb = (void *)endmem; + memcpy(barebox_boot_dtb, (void *)boarddata, totalsize); + } + if ((unsigned long)_text > membase + memsize || (unsigned long)_text < membase) /* diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c new file mode 100644 index 0000000000..b401f8efe2 --- /dev/null +++ b/arch/arm/cpu/uncompress.c @@ -0,0 +1,108 @@ +/* + * uncompress.c - uncompressor code for self extracing pbl image + * + * Copyright (c) 2010-2013 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * Copyright (c) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <common.h> +#include <init.h> +#include <sizes.h> +#include <pbl.h> +#include <asm/barebox-arm.h> +#include <asm/barebox-arm-head.h> +#include <asm-generic/memory_layout.h> +#include <asm/sections.h> +#include <asm/pgtable.h> +#include <asm/cache.h> + +#include <debug_ll.h> + +#include "mmu-early.h" + +unsigned long free_mem_ptr; +unsigned long free_mem_end_ptr; + +static int __attribute__((__used__)) + __attribute__((__section__(".image_end"))) + __image_end_dummy = 0xdeadbeef; + +static void noinline uncompress(uint32_t membase, + uint32_t memsize, uint32_t boarddata) +{ + uint32_t offset; + uint32_t pg_len; + void __noreturn (*barebox)(uint32_t, uint32_t, uint32_t); + uint32_t endmem = membase + memsize; + unsigned long barebox_base; + uint32_t *ptr; + void *pg_start; + + endmem -= STACK_SIZE; /* stack */ + + if (IS_ENABLED(CONFIG_PBL_RELOCATABLE)) + relocate_to_current_adr(); + + /* Get offset between linked address and runtime address */ + offset = get_runtime_offset(); + + if (IS_ENABLED(CONFIG_RELOCATABLE)) + barebox_base = arm_barebox_image_place(membase + memsize); + else + barebox_base = TEXT_BASE; + + setup_c(); + + if (IS_ENABLED(CONFIG_MMU_EARLY)) { + endmem &= ~0x3fff; + endmem -= SZ_16K; /* ttb */ + mmu_early_enable(membase, memsize, endmem); + } + + endmem -= SZ_128K; /* early malloc */ + free_mem_ptr = endmem; + free_mem_end_ptr = free_mem_ptr + SZ_128K; + + ptr = (void *)__image_end; + pg_start = ptr + 1; + pg_len = *(ptr); + + pbl_barebox_uncompress((void*)barebox_base, pg_start, pg_len); + + arm_early_mmu_cache_flush(); + flush_icache(); + + if (IS_ENABLED(CONFIG_THUMB2_BAREBOX)) + barebox = (void *)(barebox_base + 1); + else + barebox = (void *)barebox_base; + + barebox(membase, memsize, boarddata); +} + +/* + * Generic second stage pbl uncompressor entry + */ +ENTRY_FUNCTION(start_uncompress)(uint32_t membase, uint32_t memsize, + uint32_t boarddata) +{ + arm_setup_stack(membase + memsize - 16); + + uncompress(membase, memsize, boarddata); +} diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index fa6a330aa8..678f910c50 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1,11 +1,15 @@ -dtb-$(CONFIG_ARCH_IMX51) += imx51-babbage.dtb -dtb-$(CONFIG_ARCH_IMX6) += imx6q-sabrelite.dtb \ +dtb-$(CONFIG_ARCH_IMX51) += imx51-babbage.dtb \ + imx51-genesi-efika-sb.dtb +dtb-$(CONFIG_ARCH_IMX53) += imx53-qsb.dtb +dtb-$(CONFIG_ARCH_IMX6) += imx6q-dmo-realq7.dtb \ + imx6q-sabrelite.dtb \ imx6q-sabresd.dtb BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_NAME)) obj-$(CONFIG_BUILTIN_DTB) += $(BUILTIN_DTB).dtb.o .SECONDARY: $(obj)/$(BUILTIN_DTB).dtb.S +.SECONDARY: $(patsubst %,$(obj)/%.S,$(dtb-y)) targets += dtbs targets += $(dtb-y) diff --git a/arch/arm/dts/imx51-genesi-efika-sb.dts b/arch/arm/dts/imx51-genesi-efika-sb.dts new file mode 100644 index 0000000000..dc92b2a11f --- /dev/null +++ b/arch/arm/dts/imx51-genesi-efika-sb.dts @@ -0,0 +1,328 @@ +/* + * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "imx51.dtsi" + +/ { + model = "Genesi Efika MX Smartbook"; + compatible = "genesi,imx51-sb", "fsl,imx51"; + + chosen { + linux,stdout-path = "/soc/aips@70000000/serial@73fbc000"; + }; + + memory { + reg = <0x90000000 0x20000000>; + }; + + leds { + compatible = "gpio-leds"; + + mail { + label = "mail"; + gpios = <&gpio1 3 1>; + linux,default-trigger = "heartbeat"; + }; + + white { + label = "white"; + gpios = <&gpio2 25 0>; + linux,default-trigger = "none"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power"; + gpios = <&gpio2 31 0>; + linux,code = <116>; /* KEY_POWER */ + gpio-key,wakeup; + }; + + lid { + label = "Lid"; + gpios = <&gpio3 14 0>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0>; /* SW_LID */ + debounce-interval = <1>; + gpio-key,wakeup; + }; + }; + + sound { + compatible = "fsl,imx51-efikasb-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx51-efikasb-sgtl5000"; + ssi-controller = <&ssi1>; + audio-codec = <&sgtl5000>; + audio-routing = + "Headphone Jack", "HP_OUT"; + mux-int-port = <1>; + mux-ext-port = <3>; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 78770>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; +}; + +&ssi1 { + fsl,mode = "i2s-slave"; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + hog { + pinctrl_hog: hoggrp { + fsl,pins = < + MX51_PAD_EIM_DTACK__GPIO2_31 0x800000c0 /* Power button */ + MX51_PAD_EIM_A16__GPIO2_10 0x80000000 /* WLAN reset */ + MX51_PAD_EIM_A22__GPIO2_16 0x80000000 /* WLAN power */ + MX51_PAD_CSI2_D13__GPIO4_10 0x80000000 /* WWAN power? */ + MX51_PAD_DI1_PIN12__GPIO3_1 0x80000000 /* WLAN switch */ + MX51_PAD_EIM_A17__GPIO2_11 0x80000000 /* Bluetooth power */ + MX51_PAD_EIM_A23__GPIO2_17 0x80000000 /* Audio amp enable, 1 = on */ + MX51_PAD_GPIO1_6__REF_EN_B 0x80000000 /* PMIC interrupt */ + MX51_PAD_DI1_PIN11__GPIO3_0 0x80000000 /* Battery low */ + MX51_PAD_CSI2_PIXCLK__GPIO4_15 0x80000000 /* Power good */ + MX51_PAD_CSI1_VSYNC__GPIO3_14 0x80000000 /* Lid switch, 0 = closed */ + MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 + MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 + MX51_PAD_CSI1_D8__GPIO3_12 0x80000000 /* LVDS enable, 1 = on */ + MX51_PAD_GPIO1_2__GPIO1_2 0x80000000 /* Backlight PWM */ + MX51_PAD_CSI2_D19__GPIO4_12 0x80000000 /* Backlight power, 0 = on */ + MX51_PAD_DISPB2_SER_DIO__GPIO3_6 0x80000000 /* LVDS reset, 1 = reset */ + MX51_PAD_DISPB2_SER_DIN__GPIO3_5 0x80000000 /* LVDS reset (1 = reset) */ + MX51_PAD_DISPB2_SER_CLK__GPIO3_7 0x80000000 /* LVDS power, 1 = on */ + MX51_PAD_CSI1_D9__GPIO3_13 0x80000000 /* LCD enable (1 = on */ + MX51_PAD_NANDF_CS0__GPIO3_16 0x80000000 /* Camera power, 0 = on */ + MX51_PAD_GPIO1_5__GPIO1_5 0x80000000 /* USB hub reset, 0 = reset */ + MX51_PAD_EIM_D27__GPIO2_9 0x80000000 /* USB phy reset, 0 = reset */ + MX51_PAD_DISPB2_SER_DIO__GPIO3_6 0x80000000 /* Battery, 0 = inserted */ + MX51_PAD_GPIO1_3__GPIO1_3 0x80000000 /* Alarm LED, 0 = on */ + MX51_PAD_EIM_CS0__GPIO2_25 0x80000000 /* Caps LED, 1 = on */ + MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 /* Audio clk enable */ + MX51_PAD_EIM_A26__GPIO2_20 0x80000000 + MX51_PAD_USBH1_STP__GPIO1_27 0x80000000 + >; + }; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_1>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2_1>; + clock-frequency = <100000>; + status = "okay"; + + sgtl5000: codec@0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + clock-frequency = <12288000>; + VDDA-supply = <&vdig_reg>; + VDDD-supply = <&vdig_reg>; + VDDIO-supply = <&vvideo_reg>; + }; + + battery: battery@0b { + compatible = "sbs,sbs-battery"; + reg = <0x0b>; + sbs,battery-detect-gpios = <&gpio3 6 1>; + }; + + lvds: mtl017@3a { + compatible = "mtl017"; + reg = <0x3a>; + crtcs = <&ipu 1>; + edid-i2c = <&i2c2>; + interface-pix-fmt = "rgb565"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu_disp1_1>; + }; +}; + +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1_1>; + cd-gpios = <&gpio2 27 0>; + wp-gpios = <&gpio1 1 0>; + status = "okay"; +}; + +&esdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc2_1>; + cd-gpios = <&gpio1 8 0>; + wp-gpios = <&gpio1 7 0>; + status = "okay"; +}; + +&ecspi1 { + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio4 23 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1_1>; + fsl,spi-num-chipselects = <2>; + cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>; + status = "okay"; + + pmic: mc13892@0 { + compatible = "fsl,mc13892"; + spi-max-frequency = <20000000>; + reg = <0>; + spi-cs-high; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <&gpio1>; + interrupts = <6 0x4>; + + regulators { + sw1_reg: sw1 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1375000>; + regulator-boot-on; + regulator-always-on; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1850000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3_reg: sw3 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1850000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1850000>; + regulator-boot-on; + regulator-always-on; + }; + + vpll_reg: vpll { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + vdig_reg: vdig { + regulator-min-microvolt = <1650000>; + regulator-max-microvolt = <1650000>; + }; + + vsd_reg: vsd { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3150000>; + }; + + vusb2_reg: vusb2 { + regulator-min-microvolt = <2400000>; + regulator-max-microvolt = <2775000>; + regulator-boot-on; + regulator-always-on; + }; + + vvideo_reg: vvideo { + regulator-min-microvolt = <2775000>; + regulator-max-microvolt = <2775000>; + }; + + vaudio_reg: vaudio { + regulator-min-microvolt = <2300000>; + regulator-max-microvolt = <3000000>; + }; + + vcam_reg: vcam { + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <3000000>; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3150000>; + regulator-always-on; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2900000>; + regulator-always-on; + }; + }; + }; + + flash: m25p80 { + compatible = "sst,sst25vf032b", "m25p80"; + spi-max-frequency = <15000000>; + reg = <1>; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux_1>; + status = "okay"; +}; + +&pata { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pata_1>; + status = "okay"; +}; + +&usbotg { + barebox,phy_type = "utmi_wide"; + phy_type = "ulpi"; + status = "okay"; +}; + +&usbh1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1_1>; + barebox,phy_type = "ulpi"; + phy_type = "ulpi"; + status = "okay"; +}; + +&usbh2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh2_1>; + barebox,phy_type = "ulpi"; + phy_type = "ulpi"; + status = "okay"; +}; diff --git a/arch/arm/dts/imx51.dtsi b/arch/arm/dts/imx51.dtsi index a9002878ba..1a71ec9302 100644 --- a/arch/arm/dts/imx51.dtsi +++ b/arch/arm/dts/imx51.dtsi @@ -26,6 +26,7 @@ mmc1 = &esdhc2; mmc2 = &esdhc3; mmc3 = &esdhc4; + pata0 = &pata; }; tzic: tz-interrupt-controller@e0000000 { @@ -183,6 +184,7 @@ compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80000 0x0200>; interrupts = <18>; + fsl,usbmisc = <&usbmisc 0>; status = "disabled"; }; @@ -190,6 +192,7 @@ compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80200 0x0200>; interrupts = <14>; + fsl,usbmisc = <&usbmisc 1>; status = "disabled"; }; @@ -197,6 +200,7 @@ compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80400 0x0200>; interrupts = <16>; + fsl,usbmisc = <&usbmisc 2>; status = "disabled"; }; @@ -207,6 +211,12 @@ status = "disabled"; }; + usbmisc: usbmisc@73f80800 { + #index-cells = <1>; + compatible = "fsl,imx51-usbmisc"; + reg = <0x73f80800 0x0200>; + }; + gpio1: gpio@73f84000 { compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; reg = <0x73f84000 0x4000>; @@ -537,6 +547,45 @@ }; }; + usbh1 { + pinctrl_usbh1_1: usbh1grp-1 { + fsl,pins = < + MX51_PAD_USBH1_DATA0__USBH1_DATA0 0x1e5 + MX51_PAD_USBH1_DATA1__USBH1_DATA1 0x1e5 + MX51_PAD_USBH1_DATA2__USBH1_DATA2 0x1e5 + MX51_PAD_USBH1_DATA3__USBH1_DATA3 0x1e5 + MX51_PAD_USBH1_DATA4__USBH1_DATA4 0x1e5 + MX51_PAD_USBH1_DATA5__USBH1_DATA5 0x1e5 + MX51_PAD_USBH1_DATA6__USBH1_DATA6 0x1e5 + MX51_PAD_USBH1_DATA7__USBH1_DATA7 0x1e5 + MX51_PAD_USBH1_CLK__USBH1_CLK 0x1e5 + MX51_PAD_USBH1_DIR__USBH1_DIR 0x1e5 + MX51_PAD_USBH1_NXT__USBH1_NXT 0x1e5 + MX51_PAD_USBH1_STP__USBH1_STP 0x1e5 + >; + }; + }; + + + usbh2 { + pinctrl_usbh2_1: usbh2grp-1 { + fsl,pins = < + MX51_PAD_EIM_D16__USBH2_DATA0 0x1e5 + MX51_PAD_EIM_D17__USBH2_DATA1 0x1e5 + MX51_PAD_EIM_D18__USBH2_DATA2 0x1e5 + MX51_PAD_EIM_D19__USBH2_DATA3 0x1e5 + MX51_PAD_EIM_D20__USBH2_DATA4 0x1e5 + MX51_PAD_EIM_D21__USBH2_DATA5 0x1e5 + MX51_PAD_EIM_D22__USBH2_DATA6 0x1e5 + MX51_PAD_EIM_D23__USBH2_DATA7 0x1e5 + MX51_PAD_EIM_A24__USBH2_CLK 0x1e5 + MX51_PAD_EIM_A25__USBH2_DIR 0x1e5 + MX51_PAD_EIM_A27__USBH2_NXT 0x1e5 + MX51_PAD_EIM_A26__USBH2_STP 0x1e5 + >; + }; + }; + kpp { pinctrl_kpp_1: kppgrp-1 { fsl,pins = < diff --git a/arch/arm/dts/imx53-pinfunc.h b/arch/arm/dts/imx53-pinfunc.h new file mode 100644 index 0000000000..aec406bc65 --- /dev/null +++ b/arch/arm/dts/imx53-pinfunc.h @@ -0,0 +1,1189 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __DTS_IMX53_PINFUNC_H +#define __DTS_IMX53_PINFUNC_H + +/* + * The pin function ID is a tuple of + * <mux_reg conf_reg input_reg mux_mode input_val> + */ +#define MX53_PAD_GPIO_19__KPP_COL_5 0x020 0x348 0x840 0x0 0x0 +#define MX53_PAD_GPIO_19__GPIO4_5 0x020 0x348 0x000 0x1 0x0 +#define MX53_PAD_GPIO_19__CCM_CLKO 0x020 0x348 0x000 0x2 0x0 +#define MX53_PAD_GPIO_19__SPDIF_OUT1 0x020 0x348 0x000 0x3 0x0 +#define MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2 0x020 0x348 0x000 0x4 0x0 +#define MX53_PAD_GPIO_19__ECSPI1_RDY 0x020 0x348 0x000 0x5 0x0 +#define MX53_PAD_GPIO_19__FEC_TDATA_3 0x020 0x348 0x000 0x6 0x0 +#define MX53_PAD_GPIO_19__SRC_INT_BOOT 0x020 0x348 0x000 0x7 0x0 +#define MX53_PAD_KEY_COL0__KPP_COL_0 0x024 0x34c 0x000 0x0 0x0 +#define MX53_PAD_KEY_COL0__GPIO4_6 0x024 0x34c 0x000 0x1 0x0 +#define MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x024 0x34c 0x758 0x2 0x0 +#define MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x024 0x34c 0x000 0x4 0x0 +#define MX53_PAD_KEY_COL0__ECSPI1_SCLK 0x024 0x34c 0x79c 0x5 0x0 +#define MX53_PAD_KEY_COL0__FEC_RDATA_3 0x024 0x34c 0x000 0x6 0x0 +#define MX53_PAD_KEY_COL0__SRC_ANY_PU_RST 0x024 0x34c 0x000 0x7 0x0 +#define MX53_PAD_KEY_ROW0__KPP_ROW_0 0x028 0x350 0x000 0x0 0x0 +#define MX53_PAD_KEY_ROW0__GPIO4_7 0x028 0x350 0x000 0x1 0x0 +#define MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x028 0x350 0x74c 0x2 0x0 +#define MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x028 0x350 0x890 0x4 0x1 +#define MX53_PAD_KEY_ROW0__ECSPI1_MOSI 0x028 0x350 0x7a4 0x5 0x0 +#define MX53_PAD_KEY_ROW0__FEC_TX_ER 0x028 0x350 0x000 0x6 0x0 +#define MX53_PAD_KEY_COL1__KPP_COL_1 0x02c 0x354 0x000 0x0 0x0 +#define MX53_PAD_KEY_COL1__GPIO4_8 0x02c 0x354 0x000 0x1 0x0 +#define MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x02c 0x354 0x75c 0x2 0x0 +#define MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x02c 0x354 0x000 0x4 0x0 +#define MX53_PAD_KEY_COL1__ECSPI1_MISO 0x02c 0x354 0x7a0 0x5 0x0 +#define MX53_PAD_KEY_COL1__FEC_RX_CLK 0x02c 0x354 0x808 0x6 0x0 +#define MX53_PAD_KEY_COL1__USBPHY1_TXREADY 0x02c 0x354 0x000 0x7 0x0 +#define MX53_PAD_KEY_ROW1__KPP_ROW_1 0x030 0x358 0x000 0x0 0x0 +#define MX53_PAD_KEY_ROW1__GPIO4_9 0x030 0x358 0x000 0x1 0x0 +#define MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x030 0x358 0x748 0x2 0x0 +#define MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x030 0x358 0x898 0x4 0x1 +#define MX53_PAD_KEY_ROW1__ECSPI1_SS0 0x030 0x358 0x7a8 0x5 0x0 +#define MX53_PAD_KEY_ROW1__FEC_COL 0x030 0x358 0x800 0x6 0x0 +#define MX53_PAD_KEY_ROW1__USBPHY1_RXVALID 0x030 0x358 0x000 0x7 0x0 +#define MX53_PAD_KEY_COL2__KPP_COL_2 0x034 0x35c 0x000 0x0 0x0 +#define MX53_PAD_KEY_COL2__GPIO4_10 0x034 0x35c 0x000 0x1 0x0 +#define MX53_PAD_KEY_COL2__CAN1_TXCAN 0x034 0x35c 0x000 0x2 0x0 +#define MX53_PAD_KEY_COL2__FEC_MDIO 0x034 0x35c 0x804 0x4 0x0 +#define MX53_PAD_KEY_COL2__ECSPI1_SS1 0x034 0x35c 0x7ac 0x5 0x0 +#define MX53_PAD_KEY_COL2__FEC_RDATA_2 0x034 0x35c 0x000 0x6 0x0 +#define MX53_PAD_KEY_COL2__USBPHY1_RXACTIVE 0x034 0x35c 0x000 0x7 0x0 +#define MX53_PAD_KEY_ROW2__KPP_ROW_2 0x038 0x360 0x000 0x0 0x0 +#define MX53_PAD_KEY_ROW2__GPIO4_11 0x038 0x360 0x000 0x1 0x0 +#define MX53_PAD_KEY_ROW2__CAN1_RXCAN 0x038 0x360 0x760 0x2 0x0 +#define MX53_PAD_KEY_ROW2__FEC_MDC 0x038 0x360 0x000 0x4 0x0 +#define MX53_PAD_KEY_ROW2__ECSPI1_SS2 0x038 0x360 0x7b0 0x5 0x0 +#define MX53_PAD_KEY_ROW2__FEC_TDATA_2 0x038 0x360 0x000 0x6 0x0 +#define MX53_PAD_KEY_ROW2__USBPHY1_RXERROR 0x038 0x360 0x000 0x7 0x0 +#define MX53_PAD_KEY_COL3__KPP_COL_3 0x03c 0x364 0x000 0x0 0x0 +#define MX53_PAD_KEY_COL3__GPIO4_12 0x03c 0x364 0x000 0x1 0x0 +#define MX53_PAD_KEY_COL3__USBOH3_H2_DP 0x03c 0x364 0x000 0x2 0x0 +#define MX53_PAD_KEY_COL3__SPDIF_IN1 0x03c 0x364 0x870 0x3 0x0 +#define MX53_PAD_KEY_COL3__I2C2_SCL 0x03c 0x364 0x81c 0x4 0x0 +#define MX53_PAD_KEY_COL3__ECSPI1_SS3 0x03c 0x364 0x7b4 0x5 0x0 +#define MX53_PAD_KEY_COL3__FEC_CRS 0x03c 0x364 0x000 0x6 0x0 +#define MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK 0x03c 0x364 0x000 0x7 0x0 +#define MX53_PAD_KEY_ROW3__KPP_ROW_3 0x040 0x368 0x000 0x0 0x0 +#define MX53_PAD_KEY_ROW3__GPIO4_13 0x040 0x368 0x000 0x1 0x0 +#define MX53_PAD_KEY_ROW3__USBOH3_H2_DM 0x040 0x368 0x000 0x2 0x0 +#define MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK 0x040 0x368 0x768 0x3 0x0 +#define MX53_PAD_KEY_ROW3__I2C2_SDA 0x040 0x368 0x820 0x4 0x0 +#define MX53_PAD_KEY_ROW3__OSC32K_32K_OUT 0x040 0x368 0x000 0x5 0x0 +#define MX53_PAD_KEY_ROW3__CCM_PLL4_BYP 0x040 0x368 0x77c 0x6 0x0 +#define MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0 0x040 0x368 0x000 0x7 0x0 +#define MX53_PAD_KEY_COL4__KPP_COL_4 0x044 0x36c 0x000 0x0 0x0 +#define MX53_PAD_KEY_COL4__GPIO4_14 0x044 0x36c 0x000 0x1 0x0 +#define MX53_PAD_KEY_COL4__CAN2_TXCAN 0x044 0x36c 0x000 0x2 0x0 +#define MX53_PAD_KEY_COL4__IPU_SISG_4 0x044 0x36c 0x000 0x3 0x0 +#define MX53_PAD_KEY_COL4__UART5_RTS 0x044 0x36c 0x894 0x4 0x0 +#define MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC 0x044 0x36c 0x89c 0x5 0x0 +#define MX53_PAD_KEY_COL4__USBPHY1_LINESTATE_1 0x044 0x36c 0x000 0x7 0x0 +#define MX53_PAD_KEY_ROW4__KPP_ROW_4 0x048 0x370 0x000 0x0 0x0 +#define MX53_PAD_KEY_ROW4__GPIO4_15 0x048 0x370 0x000 0x1 0x0 +#define MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x048 0x370 0x764 0x2 0x0 +#define MX53_PAD_KEY_ROW4__IPU_SISG_5 0x048 0x370 0x000 0x3 0x0 +#define MX53_PAD_KEY_ROW4__UART5_CTS 0x048 0x370 0x000 0x4 0x0 +#define MX53_PAD_KEY_ROW4__USBOH3_USBOTG_PWR 0x048 0x370 0x000 0x5 0x0 +#define MX53_PAD_KEY_ROW4__USBPHY1_VBUSVALID 0x048 0x370 0x000 0x7 0x0 +#define MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x04c 0x378 0x000 0x0 0x0 +#define MX53_PAD_DI0_DISP_CLK__GPIO4_16 0x04c 0x378 0x000 0x1 0x0 +#define MX53_PAD_DI0_DISP_CLK__USBOH3_USBH2_DIR 0x04c 0x378 0x000 0x2 0x0 +#define MX53_PAD_DI0_DISP_CLK__SDMA_DEBUG_CORE_STATE_0 0x04c 0x378 0x000 0x5 0x0 +#define MX53_PAD_DI0_DISP_CLK__EMI_EMI_DEBUG_0 0x04c 0x378 0x000 0x6 0x0 +#define MX53_PAD_DI0_DISP_CLK__USBPHY1_AVALID 0x04c 0x378 0x000 0x7 0x0 +#define MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x050 0x37c 0x000 0x0 0x0 +#define MX53_PAD_DI0_PIN15__GPIO4_17 0x050 0x37c 0x000 0x1 0x0 +#define MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC 0x050 0x37c 0x000 0x2 0x0 +#define MX53_PAD_DI0_PIN15__SDMA_DEBUG_CORE_STATE_1 0x050 0x37c 0x000 0x5 0x0 +#define MX53_PAD_DI0_PIN15__EMI_EMI_DEBUG_1 0x050 0x37c 0x000 0x6 0x0 +#define MX53_PAD_DI0_PIN15__USBPHY1_BVALID 0x050 0x37c 0x000 0x7 0x0 +#define MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x054 0x380 0x000 0x0 0x0 +#define MX53_PAD_DI0_PIN2__GPIO4_18 0x054 0x380 0x000 0x1 0x0 +#define MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD 0x054 0x380 0x000 0x2 0x0 +#define MX53_PAD_DI0_PIN2__SDMA_DEBUG_CORE_STATE_2 0x054 0x380 0x000 0x5 0x0 +#define MX53_PAD_DI0_PIN2__EMI_EMI_DEBUG_2 0x054 0x380 0x000 0x6 0x0 +#define MX53_PAD_DI0_PIN2__USBPHY1_ENDSESSION 0x054 0x380 0x000 0x7 0x0 +#define MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x058 0x384 0x000 0x0 0x0 +#define MX53_PAD_DI0_PIN3__GPIO4_19 0x058 0x384 0x000 0x1 0x0 +#define MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS 0x058 0x384 0x000 0x2 0x0 +#define MX53_PAD_DI0_PIN3__SDMA_DEBUG_CORE_STATE_3 0x058 0x384 0x000 0x5 0x0 +#define MX53_PAD_DI0_PIN3__EMI_EMI_DEBUG_3 0x058 0x384 0x000 0x6 0x0 +#define MX53_PAD_DI0_PIN3__USBPHY1_IDDIG 0x058 0x384 0x000 0x7 0x0 +#define MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x05c 0x388 0x000 0x0 0x0 +#define MX53_PAD_DI0_PIN4__GPIO4_20 0x05c 0x388 0x000 0x1 0x0 +#define MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD 0x05c 0x388 0x000 0x2 0x0 +#define MX53_PAD_DI0_PIN4__ESDHC1_WP 0x05c 0x388 0x7fc 0x3 0x0 +#define MX53_PAD_DI0_PIN4__SDMA_DEBUG_YIELD 0x05c 0x388 0x000 0x5 0x0 +#define MX53_PAD_DI0_PIN4__EMI_EMI_DEBUG_4 0x05c 0x388 0x000 0x6 0x0 +#define MX53_PAD_DI0_PIN4__USBPHY1_HOSTDISCONNECT 0x05c 0x388 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x060 0x38c 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT0__GPIO4_21 0x060 0x38c 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT0__CSPI_SCLK 0x060 0x38c 0x780 0x2 0x0 +#define MX53_PAD_DISP0_DAT0__USBOH3_USBH2_DATA_0 0x060 0x38c 0x000 0x3 0x0 +#define MX53_PAD_DISP0_DAT0__SDMA_DEBUG_CORE_RUN 0x060 0x38c 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT0__EMI_EMI_DEBUG_5 0x060 0x38c 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT0__USBPHY2_TXREADY 0x060 0x38c 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x064 0x390 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT1__GPIO4_22 0x064 0x390 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT1__CSPI_MOSI 0x064 0x390 0x788 0x2 0x0 +#define MX53_PAD_DISP0_DAT1__USBOH3_USBH2_DATA_1 0x064 0x390 0x000 0x3 0x0 +#define MX53_PAD_DISP0_DAT1__SDMA_DEBUG_EVENT_CHANNEL_SEL 0x064 0x390 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT1__EMI_EMI_DEBUG_6 0x064 0x390 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT1__USBPHY2_RXVALID 0x064 0x390 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x068 0x394 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT2__GPIO4_23 0x068 0x394 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT2__CSPI_MISO 0x068 0x394 0x784 0x2 0x0 +#define MX53_PAD_DISP0_DAT2__USBOH3_USBH2_DATA_2 0x068 0x394 0x000 0x3 0x0 +#define MX53_PAD_DISP0_DAT2__SDMA_DEBUG_MODE 0x068 0x394 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT2__EMI_EMI_DEBUG_7 0x068 0x394 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT2__USBPHY2_RXACTIVE 0x068 0x394 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x06c 0x398 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT3__GPIO4_24 0x06c 0x398 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT3__CSPI_SS0 0x06c 0x398 0x78c 0x2 0x0 +#define MX53_PAD_DISP0_DAT3__USBOH3_USBH2_DATA_3 0x06c 0x398 0x000 0x3 0x0 +#define MX53_PAD_DISP0_DAT3__SDMA_DEBUG_BUS_ERROR 0x06c 0x398 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT3__EMI_EMI_DEBUG_8 0x06c 0x398 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT3__USBPHY2_RXERROR 0x06c 0x398 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x070 0x39c 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT4__GPIO4_25 0x070 0x39c 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT4__CSPI_SS1 0x070 0x39c 0x790 0x2 0x0 +#define MX53_PAD_DISP0_DAT4__USBOH3_USBH2_DATA_4 0x070 0x39c 0x000 0x3 0x0 +#define MX53_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB 0x070 0x39c 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT4__EMI_EMI_DEBUG_9 0x070 0x39c 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT4__USBPHY2_SIECLOCK 0x070 0x39c 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x074 0x3a0 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT5__GPIO4_26 0x074 0x3a0 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT5__CSPI_SS2 0x074 0x3a0 0x794 0x2 0x0 +#define MX53_PAD_DISP0_DAT5__USBOH3_USBH2_DATA_5 0x074 0x3a0 0x000 0x3 0x0 +#define MX53_PAD_DISP0_DAT5__SDMA_DEBUG_MATCHED_DMBUS 0x074 0x3a0 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT5__EMI_EMI_DEBUG_10 0x074 0x3a0 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT5__USBPHY2_LINESTATE_0 0x074 0x3a0 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x078 0x3a4 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT6__GPIO4_27 0x078 0x3a4 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT6__CSPI_SS3 0x078 0x3a4 0x798 0x2 0x0 +#define MX53_PAD_DISP0_DAT6__USBOH3_USBH2_DATA_6 0x078 0x3a4 0x000 0x3 0x0 +#define MX53_PAD_DISP0_DAT6__SDMA_DEBUG_RTBUFFER_WRITE 0x078 0x3a4 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT6__EMI_EMI_DEBUG_11 0x078 0x3a4 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT6__USBPHY2_LINESTATE_1 0x078 0x3a4 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x07c 0x3a8 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT7__GPIO4_28 0x07c 0x3a8 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT7__CSPI_RDY 0x07c 0x3a8 0x000 0x2 0x0 +#define MX53_PAD_DISP0_DAT7__USBOH3_USBH2_DATA_7 0x07c 0x3a8 0x000 0x3 0x0 +#define MX53_PAD_DISP0_DAT7__SDMA_DEBUG_EVENT_CHANNEL_0 0x07c 0x3a8 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT7__EMI_EMI_DEBUG_12 0x07c 0x3a8 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT7__USBPHY2_VBUSVALID 0x07c 0x3a8 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x080 0x3ac 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT8__GPIO4_29 0x080 0x3ac 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x080 0x3ac 0x000 0x2 0x0 +#define MX53_PAD_DISP0_DAT8__WDOG1_WDOG_B 0x080 0x3ac 0x000 0x3 0x0 +#define MX53_PAD_DISP0_DAT8__SDMA_DEBUG_EVENT_CHANNEL_1 0x080 0x3ac 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT8__EMI_EMI_DEBUG_13 0x080 0x3ac 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT8__USBPHY2_AVALID 0x080 0x3ac 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x084 0x3b0 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT9__GPIO4_30 0x084 0x3b0 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT9__PWM2_PWMO 0x084 0x3b0 0x000 0x2 0x0 +#define MX53_PAD_DISP0_DAT9__WDOG2_WDOG_B 0x084 0x3b0 0x000 0x3 0x0 +#define MX53_PAD_DISP0_DAT9__SDMA_DEBUG_EVENT_CHANNEL_2 0x084 0x3b0 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT9__EMI_EMI_DEBUG_14 0x084 0x3b0 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT9__USBPHY2_VSTATUS_0 0x084 0x3b0 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x088 0x3b4 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT10__GPIO4_31 0x088 0x3b4 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT10__USBOH3_USBH2_STP 0x088 0x3b4 0x000 0x2 0x0 +#define MX53_PAD_DISP0_DAT10__SDMA_DEBUG_EVENT_CHANNEL_3 0x088 0x3b4 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT10__EMI_EMI_DEBUG_15 0x088 0x3b4 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT10__USBPHY2_VSTATUS_1 0x088 0x3b4 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x08c 0x3b8 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT11__GPIO5_5 0x08c 0x3b8 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT11__USBOH3_USBH2_NXT 0x08c 0x3b8 0x000 0x2 0x0 +#define MX53_PAD_DISP0_DAT11__SDMA_DEBUG_EVENT_CHANNEL_4 0x08c 0x3b8 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT11__EMI_EMI_DEBUG_16 0x08c 0x3b8 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT11__USBPHY2_VSTATUS_2 0x08c 0x3b8 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x090 0x3bc 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT12__GPIO5_6 0x090 0x3bc 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT12__USBOH3_USBH2_CLK 0x090 0x3bc 0x000 0x2 0x0 +#define MX53_PAD_DISP0_DAT12__SDMA_DEBUG_EVENT_CHANNEL_5 0x090 0x3bc 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT12__EMI_EMI_DEBUG_17 0x090 0x3bc 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT12__USBPHY2_VSTATUS_3 0x090 0x3bc 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x094 0x3c0 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT13__GPIO5_7 0x094 0x3c0 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS 0x094 0x3c0 0x754 0x3 0x0 +#define MX53_PAD_DISP0_DAT13__SDMA_DEBUG_EVT_CHN_LINES_0 0x094 0x3c0 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT13__EMI_EMI_DEBUG_18 0x094 0x3c0 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT13__USBPHY2_VSTATUS_4 0x094 0x3c0 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x098 0x3c4 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT14__GPIO5_8 0x098 0x3c4 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC 0x098 0x3c4 0x750 0x3 0x0 +#define MX53_PAD_DISP0_DAT14__SDMA_DEBUG_EVT_CHN_LINES_1 0x098 0x3c4 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT14__EMI_EMI_DEBUG_19 0x098 0x3c4 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT14__USBPHY2_VSTATUS_5 0x098 0x3c4 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x09c 0x3c8 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT15__GPIO5_9 0x09c 0x3c8 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT15__ECSPI1_SS1 0x09c 0x3c8 0x7ac 0x2 0x1 +#define MX53_PAD_DISP0_DAT15__ECSPI2_SS1 0x09c 0x3c8 0x7c8 0x3 0x0 +#define MX53_PAD_DISP0_DAT15__SDMA_DEBUG_EVT_CHN_LINES_2 0x09c 0x3c8 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT15__EMI_EMI_DEBUG_20 0x09c 0x3c8 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT15__USBPHY2_VSTATUS_6 0x09c 0x3c8 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x0a0 0x3cc 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT16__GPIO5_10 0x0a0 0x3cc 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT16__ECSPI2_MOSI 0x0a0 0x3cc 0x7c0 0x2 0x0 +#define MX53_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC 0x0a0 0x3cc 0x758 0x3 0x1 +#define MX53_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0 0x0a0 0x3cc 0x868 0x4 0x0 +#define MX53_PAD_DISP0_DAT16__SDMA_DEBUG_EVT_CHN_LINES_3 0x0a0 0x3cc 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT16__EMI_EMI_DEBUG_21 0x0a0 0x3cc 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT16__USBPHY2_VSTATUS_7 0x0a0 0x3cc 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x0a4 0x3d0 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT17__GPIO5_11 0x0a4 0x3d0 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT17__ECSPI2_MISO 0x0a4 0x3d0 0x7bc 0x2 0x0 +#define MX53_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD 0x0a4 0x3d0 0x74c 0x3 0x1 +#define MX53_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1 0x0a4 0x3d0 0x86c 0x4 0x0 +#define MX53_PAD_DISP0_DAT17__SDMA_DEBUG_EVT_CHN_LINES_4 0x0a4 0x3d0 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT17__EMI_EMI_DEBUG_22 0x0a4 0x3d0 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x0a8 0x3d4 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT18__GPIO5_12 0x0a8 0x3d4 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT18__ECSPI2_SS0 0x0a8 0x3d4 0x7c4 0x2 0x0 +#define MX53_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS 0x0a8 0x3d4 0x75c 0x3 0x1 +#define MX53_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS 0x0a8 0x3d4 0x73c 0x4 0x0 +#define MX53_PAD_DISP0_DAT18__SDMA_DEBUG_EVT_CHN_LINES_5 0x0a8 0x3d4 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT18__EMI_EMI_DEBUG_23 0x0a8 0x3d4 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT18__EMI_WEIM_CS_2 0x0a8 0x3d4 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x0ac 0x3d8 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT19__GPIO5_13 0x0ac 0x3d8 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT19__ECSPI2_SCLK 0x0ac 0x3d8 0x7b8 0x2 0x0 +#define MX53_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD 0x0ac 0x3d8 0x748 0x3 0x1 +#define MX53_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC 0x0ac 0x3d8 0x738 0x4 0x0 +#define MX53_PAD_DISP0_DAT19__SDMA_DEBUG_EVT_CHN_LINES_6 0x0ac 0x3d8 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT19__EMI_EMI_DEBUG_24 0x0ac 0x3d8 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT19__EMI_WEIM_CS_3 0x0ac 0x3d8 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x0b0 0x3dc 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT20__GPIO5_14 0x0b0 0x3dc 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT20__ECSPI1_SCLK 0x0b0 0x3dc 0x79c 0x2 0x1 +#define MX53_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC 0x0b0 0x3dc 0x740 0x3 0x0 +#define MX53_PAD_DISP0_DAT20__SDMA_DEBUG_EVT_CHN_LINES_7 0x0b0 0x3dc 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT20__EMI_EMI_DEBUG_25 0x0b0 0x3dc 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT20__SATA_PHY_TDI 0x0b0 0x3dc 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x0b4 0x3e0 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT21__GPIO5_15 0x0b4 0x3e0 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT21__ECSPI1_MOSI 0x0b4 0x3e0 0x7a4 0x2 0x1 +#define MX53_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD 0x0b4 0x3e0 0x734 0x3 0x0 +#define MX53_PAD_DISP0_DAT21__SDMA_DEBUG_BUS_DEVICE_0 0x0b4 0x3e0 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT21__EMI_EMI_DEBUG_26 0x0b4 0x3e0 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT21__SATA_PHY_TDO 0x0b4 0x3e0 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x0b8 0x3e4 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT22__GPIO5_16 0x0b8 0x3e4 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT22__ECSPI1_MISO 0x0b8 0x3e4 0x7a0 0x2 0x1 +#define MX53_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS 0x0b8 0x3e4 0x744 0x3 0x0 +#define MX53_PAD_DISP0_DAT22__SDMA_DEBUG_BUS_DEVICE_1 0x0b8 0x3e4 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT22__EMI_EMI_DEBUG_27 0x0b8 0x3e4 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT22__SATA_PHY_TCK 0x0b8 0x3e4 0x000 0x7 0x0 +#define MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x0bc 0x3e8 0x000 0x0 0x0 +#define MX53_PAD_DISP0_DAT23__GPIO5_17 0x0bc 0x3e8 0x000 0x1 0x0 +#define MX53_PAD_DISP0_DAT23__ECSPI1_SS0 0x0bc 0x3e8 0x7a8 0x2 0x1 +#define MX53_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD 0x0bc 0x3e8 0x730 0x3 0x0 +#define MX53_PAD_DISP0_DAT23__SDMA_DEBUG_BUS_DEVICE_2 0x0bc 0x3e8 0x000 0x5 0x0 +#define MX53_PAD_DISP0_DAT23__EMI_EMI_DEBUG_28 0x0bc 0x3e8 0x000 0x6 0x0 +#define MX53_PAD_DISP0_DAT23__SATA_PHY_TMS 0x0bc 0x3e8 0x000 0x7 0x0 +#define MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x0c0 0x3ec 0x000 0x0 0x0 +#define MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x0c0 0x3ec 0x000 0x1 0x0 +#define MX53_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0 0x0c0 0x3ec 0x000 0x5 0x0 +#define MX53_PAD_CSI0_PIXCLK__EMI_EMI_DEBUG_29 0x0c0 0x3ec 0x000 0x6 0x0 +#define MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC 0x0c4 0x3f0 0x000 0x0 0x0 +#define MX53_PAD_CSI0_MCLK__GPIO5_19 0x0c4 0x3f0 0x000 0x1 0x0 +#define MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK 0x0c4 0x3f0 0x000 0x2 0x0 +#define MX53_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1 0x0c4 0x3f0 0x000 0x5 0x0 +#define MX53_PAD_CSI0_MCLK__EMI_EMI_DEBUG_30 0x0c4 0x3f0 0x000 0x6 0x0 +#define MX53_PAD_CSI0_MCLK__TPIU_TRCTL 0x0c4 0x3f0 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 0x0c8 0x3f4 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x0c8 0x3f4 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2 0x0c8 0x3f4 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DATA_EN__EMI_EMI_DEBUG_31 0x0c8 0x3f4 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DATA_EN__TPIU_TRCLK 0x0c8 0x3f4 0x000 0x7 0x0 +#define MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC 0x0cc 0x3f8 0x000 0x0 0x0 +#define MX53_PAD_CSI0_VSYNC__GPIO5_21 0x0cc 0x3f8 0x000 0x1 0x0 +#define MX53_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3 0x0cc 0x3f8 0x000 0x5 0x0 +#define MX53_PAD_CSI0_VSYNC__EMI_EMI_DEBUG_32 0x0cc 0x3f8 0x000 0x6 0x0 +#define MX53_PAD_CSI0_VSYNC__TPIU_TRACE_0 0x0cc 0x3f8 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT4__IPU_CSI0_D_4 0x0d0 0x3fc 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT4__GPIO5_22 0x0d0 0x3fc 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT4__KPP_COL_5 0x0d0 0x3fc 0x840 0x2 0x1 +#define MX53_PAD_CSI0_DAT4__ECSPI1_SCLK 0x0d0 0x3fc 0x79c 0x3 0x2 +#define MX53_PAD_CSI0_DAT4__USBOH3_USBH3_STP 0x0d0 0x3fc 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 0x0d0 0x3fc 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT4__EMI_EMI_DEBUG_33 0x0d0 0x3fc 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT4__TPIU_TRACE_1 0x0d0 0x3fc 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT5__IPU_CSI0_D_5 0x0d4 0x400 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT5__GPIO5_23 0x0d4 0x400 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT5__KPP_ROW_5 0x0d4 0x400 0x84c 0x2 0x0 +#define MX53_PAD_CSI0_DAT5__ECSPI1_MOSI 0x0d4 0x400 0x7a4 0x3 0x2 +#define MX53_PAD_CSI0_DAT5__USBOH3_USBH3_NXT 0x0d4 0x400 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 0x0d4 0x400 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT5__EMI_EMI_DEBUG_34 0x0d4 0x400 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT5__TPIU_TRACE_2 0x0d4 0x400 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT6__IPU_CSI0_D_6 0x0d8 0x404 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT6__GPIO5_24 0x0d8 0x404 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT6__KPP_COL_6 0x0d8 0x404 0x844 0x2 0x0 +#define MX53_PAD_CSI0_DAT6__ECSPI1_MISO 0x0d8 0x404 0x7a0 0x3 0x2 +#define MX53_PAD_CSI0_DAT6__USBOH3_USBH3_CLK 0x0d8 0x404 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 0x0d8 0x404 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT6__EMI_EMI_DEBUG_35 0x0d8 0x404 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT6__TPIU_TRACE_3 0x0d8 0x404 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT7__IPU_CSI0_D_7 0x0dc 0x408 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT7__GPIO5_25 0x0dc 0x408 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT7__KPP_ROW_6 0x0dc 0x408 0x850 0x2 0x0 +#define MX53_PAD_CSI0_DAT7__ECSPI1_SS0 0x0dc 0x408 0x7a8 0x3 0x2 +#define MX53_PAD_CSI0_DAT7__USBOH3_USBH3_DIR 0x0dc 0x408 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 0x0dc 0x408 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT7__EMI_EMI_DEBUG_36 0x0dc 0x408 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT7__TPIU_TRACE_4 0x0dc 0x408 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT8__IPU_CSI0_D_8 0x0e0 0x40c 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT8__GPIO5_26 0x0e0 0x40c 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT8__KPP_COL_7 0x0e0 0x40c 0x848 0x2 0x0 +#define MX53_PAD_CSI0_DAT8__ECSPI2_SCLK 0x0e0 0x40c 0x7b8 0x3 0x1 +#define MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC 0x0e0 0x40c 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT8__I2C1_SDA 0x0e0 0x40c 0x818 0x5 0x0 +#define MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 0x0e0 0x40c 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 0x0e0 0x40c 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 0x0e4 0x410 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT9__GPIO5_27 0x0e4 0x410 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT9__KPP_ROW_7 0x0e4 0x410 0x854 0x2 0x0 +#define MX53_PAD_CSI0_DAT9__ECSPI2_MOSI 0x0e4 0x410 0x7c0 0x3 0x1 +#define MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR 0x0e4 0x410 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT9__I2C1_SCL 0x0e4 0x410 0x814 0x5 0x0 +#define MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 0x0e4 0x410 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 0x0e4 0x410 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 0x0e8 0x414 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT10__GPIO5_28 0x0e8 0x414 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x0e8 0x414 0x000 0x2 0x0 +#define MX53_PAD_CSI0_DAT10__ECSPI2_MISO 0x0e8 0x414 0x7bc 0x3 0x1 +#define MX53_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC 0x0e8 0x414 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4 0x0e8 0x414 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT10__EMI_EMI_DEBUG_39 0x0e8 0x414 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT10__TPIU_TRACE_7 0x0e8 0x414 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT11__IPU_CSI0_D_11 0x0ec 0x418 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT11__GPIO5_29 0x0ec 0x418 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x0ec 0x418 0x878 0x2 0x1 +#define MX53_PAD_CSI0_DAT11__ECSPI2_SS0 0x0ec 0x418 0x7c4 0x3 0x1 +#define MX53_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS 0x0ec 0x418 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5 0x0ec 0x418 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT11__EMI_EMI_DEBUG_40 0x0ec 0x418 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT11__TPIU_TRACE_8 0x0ec 0x418 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 0x0f0 0x41c 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT12__GPIO5_30 0x0f0 0x41c 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT12__UART4_TXD_MUX 0x0f0 0x41c 0x000 0x2 0x0 +#define MX53_PAD_CSI0_DAT12__USBOH3_USBH3_DATA_0 0x0f0 0x41c 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6 0x0f0 0x41c 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT12__EMI_EMI_DEBUG_41 0x0f0 0x41c 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT12__TPIU_TRACE_9 0x0f0 0x41c 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 0x0f4 0x420 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT13__GPIO5_31 0x0f4 0x420 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT13__UART4_RXD_MUX 0x0f4 0x420 0x890 0x2 0x3 +#define MX53_PAD_CSI0_DAT13__USBOH3_USBH3_DATA_1 0x0f4 0x420 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7 0x0f4 0x420 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT13__EMI_EMI_DEBUG_42 0x0f4 0x420 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT13__TPIU_TRACE_10 0x0f4 0x420 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 0x0f8 0x424 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT14__GPIO6_0 0x0f8 0x424 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT14__UART5_TXD_MUX 0x0f8 0x424 0x000 0x2 0x0 +#define MX53_PAD_CSI0_DAT14__USBOH3_USBH3_DATA_2 0x0f8 0x424 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8 0x0f8 0x424 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT14__EMI_EMI_DEBUG_43 0x0f8 0x424 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT14__TPIU_TRACE_11 0x0f8 0x424 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 0x0fc 0x428 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT15__GPIO6_1 0x0fc 0x428 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT15__UART5_RXD_MUX 0x0fc 0x428 0x898 0x2 0x3 +#define MX53_PAD_CSI0_DAT15__USBOH3_USBH3_DATA_3 0x0fc 0x428 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9 0x0fc 0x428 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT15__EMI_EMI_DEBUG_44 0x0fc 0x428 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT15__TPIU_TRACE_12 0x0fc 0x428 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 0x100 0x42c 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT16__GPIO6_2 0x100 0x42c 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT16__UART4_RTS 0x100 0x42c 0x88c 0x2 0x0 +#define MX53_PAD_CSI0_DAT16__USBOH3_USBH3_DATA_4 0x100 0x42c 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10 0x100 0x42c 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT16__EMI_EMI_DEBUG_45 0x100 0x42c 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT16__TPIU_TRACE_13 0x100 0x42c 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 0x104 0x430 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT17__GPIO6_3 0x104 0x430 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT17__UART4_CTS 0x104 0x430 0x000 0x2 0x0 +#define MX53_PAD_CSI0_DAT17__USBOH3_USBH3_DATA_5 0x104 0x430 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11 0x104 0x430 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT17__EMI_EMI_DEBUG_46 0x104 0x430 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT17__TPIU_TRACE_14 0x104 0x430 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 0x108 0x434 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT18__GPIO6_4 0x108 0x434 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT18__UART5_RTS 0x108 0x434 0x894 0x2 0x2 +#define MX53_PAD_CSI0_DAT18__USBOH3_USBH3_DATA_6 0x108 0x434 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12 0x108 0x434 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT18__EMI_EMI_DEBUG_47 0x108 0x434 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT18__TPIU_TRACE_15 0x108 0x434 0x000 0x7 0x0 +#define MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 0x10c 0x438 0x000 0x0 0x0 +#define MX53_PAD_CSI0_DAT19__GPIO6_5 0x10c 0x438 0x000 0x1 0x0 +#define MX53_PAD_CSI0_DAT19__UART5_CTS 0x10c 0x438 0x000 0x2 0x0 +#define MX53_PAD_CSI0_DAT19__USBOH3_USBH3_DATA_7 0x10c 0x438 0x000 0x4 0x0 +#define MX53_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13 0x10c 0x438 0x000 0x5 0x0 +#define MX53_PAD_CSI0_DAT19__EMI_EMI_DEBUG_48 0x10c 0x438 0x000 0x6 0x0 +#define MX53_PAD_CSI0_DAT19__USBPHY2_BISTOK 0x10c 0x438 0x000 0x7 0x0 +#define MX53_PAD_EIM_A25__EMI_WEIM_A_25 0x110 0x458 0x000 0x0 0x0 +#define MX53_PAD_EIM_A25__GPIO5_2 0x110 0x458 0x000 0x1 0x0 +#define MX53_PAD_EIM_A25__ECSPI2_RDY 0x110 0x458 0x000 0x2 0x0 +#define MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x110 0x458 0x000 0x3 0x0 +#define MX53_PAD_EIM_A25__CSPI_SS1 0x110 0x458 0x790 0x4 0x1 +#define MX53_PAD_EIM_A25__IPU_DI0_D1_CS 0x110 0x458 0x000 0x6 0x0 +#define MX53_PAD_EIM_A25__USBPHY1_BISTOK 0x110 0x458 0x000 0x7 0x0 +#define MX53_PAD_EIM_EB2__EMI_WEIM_EB_2 0x114 0x45c 0x000 0x0 0x0 +#define MX53_PAD_EIM_EB2__GPIO2_30 0x114 0x45c 0x000 0x1 0x0 +#define MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK 0x114 0x45c 0x76c 0x2 0x0 +#define MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS 0x114 0x45c 0x000 0x3 0x0 +#define MX53_PAD_EIM_EB2__ECSPI1_SS0 0x114 0x45c 0x7a8 0x4 0x3 +#define MX53_PAD_EIM_EB2__I2C2_SCL 0x114 0x45c 0x81c 0x5 0x1 +#define MX53_PAD_EIM_D16__EMI_WEIM_D_16 0x118 0x460 0x000 0x0 0x0 +#define MX53_PAD_EIM_D16__GPIO3_16 0x118 0x460 0x000 0x1 0x0 +#define MX53_PAD_EIM_D16__IPU_DI0_PIN5 0x118 0x460 0x000 0x2 0x0 +#define MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK 0x118 0x460 0x000 0x3 0x0 +#define MX53_PAD_EIM_D16__ECSPI1_SCLK 0x118 0x460 0x79c 0x4 0x3 +#define MX53_PAD_EIM_D16__I2C2_SDA 0x118 0x460 0x820 0x5 0x1 +#define MX53_PAD_EIM_D17__EMI_WEIM_D_17 0x11c 0x464 0x000 0x0 0x0 +#define MX53_PAD_EIM_D17__GPIO3_17 0x11c 0x464 0x000 0x1 0x0 +#define MX53_PAD_EIM_D17__IPU_DI0_PIN6 0x11c 0x464 0x000 0x2 0x0 +#define MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN 0x11c 0x464 0x830 0x3 0x0 +#define MX53_PAD_EIM_D17__ECSPI1_MISO 0x11c 0x464 0x7a0 0x4 0x3 +#define MX53_PAD_EIM_D17__I2C3_SCL 0x11c 0x464 0x824 0x5 0x0 +#define MX53_PAD_EIM_D18__EMI_WEIM_D_18 0x120 0x468 0x000 0x0 0x0 +#define MX53_PAD_EIM_D18__GPIO3_18 0x120 0x468 0x000 0x1 0x0 +#define MX53_PAD_EIM_D18__IPU_DI0_PIN7 0x120 0x468 0x000 0x2 0x0 +#define MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO 0x120 0x468 0x830 0x3 0x1 +#define MX53_PAD_EIM_D18__ECSPI1_MOSI 0x120 0x468 0x7a4 0x4 0x3 +#define MX53_PAD_EIM_D18__I2C3_SDA 0x120 0x468 0x828 0x5 0x0 +#define MX53_PAD_EIM_D18__IPU_DI1_D0_CS 0x120 0x468 0x000 0x6 0x0 +#define MX53_PAD_EIM_D19__EMI_WEIM_D_19 0x124 0x46c 0x000 0x0 0x0 +#define MX53_PAD_EIM_D19__GPIO3_19 0x124 0x46c 0x000 0x1 0x0 +#define MX53_PAD_EIM_D19__IPU_DI0_PIN8 0x124 0x46c 0x000 0x2 0x0 +#define MX53_PAD_EIM_D19__IPU_DISPB1_SER_RS 0x124 0x46c 0x000 0x3 0x0 +#define MX53_PAD_EIM_D19__ECSPI1_SS1 0x124 0x46c 0x7ac 0x4 0x2 +#define MX53_PAD_EIM_D19__EPIT1_EPITO 0x124 0x46c 0x000 0x5 0x0 +#define MX53_PAD_EIM_D19__UART1_CTS 0x124 0x46c 0x000 0x6 0x0 +#define MX53_PAD_EIM_D19__USBOH3_USBH2_OC 0x124 0x46c 0x8a4 0x7 0x0 +#define MX53_PAD_EIM_D20__EMI_WEIM_D_20 0x128 0x470 0x000 0x0 0x0 +#define MX53_PAD_EIM_D20__GPIO3_20 0x128 0x470 0x000 0x1 0x0 +#define MX53_PAD_EIM_D20__IPU_DI0_PIN16 0x128 0x470 0x000 0x2 0x0 +#define MX53_PAD_EIM_D20__IPU_SER_DISP0_CS 0x128 0x470 0x000 0x3 0x0 +#define MX53_PAD_EIM_D20__CSPI_SS0 0x128 0x470 0x78c 0x4 0x1 +#define MX53_PAD_EIM_D20__EPIT2_EPITO 0x128 0x470 0x000 0x5 0x0 +#define MX53_PAD_EIM_D20__UART1_RTS 0x128 0x470 0x874 0x6 0x1 +#define MX53_PAD_EIM_D20__USBOH3_USBH2_PWR 0x128 0x470 0x000 0x7 0x0 +#define MX53_PAD_EIM_D21__EMI_WEIM_D_21 0x12c 0x474 0x000 0x0 0x0 +#define MX53_PAD_EIM_D21__GPIO3_21 0x12c 0x474 0x000 0x1 0x0 +#define MX53_PAD_EIM_D21__IPU_DI0_PIN17 0x12c 0x474 0x000 0x2 0x0 +#define MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK 0x12c 0x474 0x000 0x3 0x0 +#define MX53_PAD_EIM_D21__CSPI_SCLK 0x12c 0x474 0x780 0x4 0x1 +#define MX53_PAD_EIM_D21__I2C1_SCL 0x12c 0x474 0x814 0x5 0x1 +#define MX53_PAD_EIM_D21__USBOH3_USBOTG_OC 0x12c 0x474 0x89c 0x6 0x1 +#define MX53_PAD_EIM_D22__EMI_WEIM_D_22 0x130 0x478 0x000 0x0 0x0 +#define MX53_PAD_EIM_D22__GPIO3_22 0x130 0x478 0x000 0x1 0x0 +#define MX53_PAD_EIM_D22__IPU_DI0_PIN1 0x130 0x478 0x000 0x2 0x0 +#define MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN 0x130 0x478 0x82c 0x3 0x0 +#define MX53_PAD_EIM_D22__CSPI_MISO 0x130 0x478 0x784 0x4 0x1 +#define MX53_PAD_EIM_D22__USBOH3_USBOTG_PWR 0x130 0x478 0x000 0x6 0x0 +#define MX53_PAD_EIM_D23__EMI_WEIM_D_23 0x134 0x47c 0x000 0x0 0x0 +#define MX53_PAD_EIM_D23__GPIO3_23 0x134 0x47c 0x000 0x1 0x0 +#define MX53_PAD_EIM_D23__UART3_CTS 0x134 0x47c 0x000 0x2 0x0 +#define MX53_PAD_EIM_D23__UART1_DCD 0x134 0x47c 0x000 0x3 0x0 +#define MX53_PAD_EIM_D23__IPU_DI0_D0_CS 0x134 0x47c 0x000 0x4 0x0 +#define MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x134 0x47c 0x000 0x5 0x0 +#define MX53_PAD_EIM_D23__IPU_CSI1_DATA_EN 0x134 0x47c 0x834 0x6 0x0 +#define MX53_PAD_EIM_D23__IPU_DI1_PIN14 0x134 0x47c 0x000 0x7 0x0 +#define MX53_PAD_EIM_EB3__EMI_WEIM_EB_3 0x138 0x480 0x000 0x0 0x0 +#define MX53_PAD_EIM_EB3__GPIO2_31 0x138 0x480 0x000 0x1 0x0 +#define MX53_PAD_EIM_EB3__UART3_RTS 0x138 0x480 0x884 0x2 0x1 +#define MX53_PAD_EIM_EB3__UART1_RI 0x138 0x480 0x000 0x3 0x0 +#define MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x138 0x480 0x000 0x5 0x0 +#define MX53_PAD_EIM_EB3__IPU_CSI1_HSYNC 0x138 0x480 0x838 0x6 0x0 +#define MX53_PAD_EIM_EB3__IPU_DI1_PIN16 0x138 0x480 0x000 0x7 0x0 +#define MX53_PAD_EIM_D24__EMI_WEIM_D_24 0x13c 0x484 0x000 0x0 0x0 +#define MX53_PAD_EIM_D24__GPIO3_24 0x13c 0x484 0x000 0x1 0x0 +#define MX53_PAD_EIM_D24__UART3_TXD_MUX 0x13c 0x484 0x000 0x2 0x0 +#define MX53_PAD_EIM_D24__ECSPI1_SS2 0x13c 0x484 0x7b0 0x3 0x1 +#define MX53_PAD_EIM_D24__CSPI_SS2 0x13c 0x484 0x794 0x4 0x1 +#define MX53_PAD_EIM_D24__AUDMUX_AUD5_RXFS 0x13c 0x484 0x754 0x5 0x1 +#define MX53_PAD_EIM_D24__ECSPI2_SS2 0x13c 0x484 0x000 0x6 0x0 +#define MX53_PAD_EIM_D24__UART1_DTR 0x13c 0x484 0x000 0x7 0x0 +#define MX53_PAD_EIM_D25__EMI_WEIM_D_25 0x140 0x488 0x000 0x0 0x0 +#define MX53_PAD_EIM_D25__GPIO3_25 0x140 0x488 0x000 0x1 0x0 +#define MX53_PAD_EIM_D25__UART3_RXD_MUX 0x140 0x488 0x888 0x2 0x1 +#define MX53_PAD_EIM_D25__ECSPI1_SS3 0x140 0x488 0x7b4 0x3 0x1 +#define MX53_PAD_EIM_D25__CSPI_SS3 0x140 0x488 0x798 0x4 0x1 +#define MX53_PAD_EIM_D25__AUDMUX_AUD5_RXC 0x140 0x488 0x750 0x5 0x1 +#define MX53_PAD_EIM_D25__ECSPI2_SS3 0x140 0x488 0x000 0x6 0x0 +#define MX53_PAD_EIM_D25__UART1_DSR 0x140 0x488 0x000 0x7 0x0 +#define MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x144 0x48c 0x000 0x0 0x0 +#define MX53_PAD_EIM_D26__GPIO3_26 0x144 0x48c 0x000 0x1 0x0 +#define MX53_PAD_EIM_D26__UART2_TXD_MUX 0x144 0x48c 0x000 0x2 0x0 +#define MX53_PAD_EIM_D26__FIRI_RXD 0x144 0x48c 0x80c 0x3 0x0 +#define MX53_PAD_EIM_D26__IPU_CSI0_D_1 0x144 0x48c 0x000 0x4 0x0 +#define MX53_PAD_EIM_D26__IPU_DI1_PIN11 0x144 0x48c 0x000 0x5 0x0 +#define MX53_PAD_EIM_D26__IPU_SISG_2 0x144 0x48c 0x000 0x6 0x0 +#define MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x144 0x48c 0x000 0x7 0x0 +#define MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x148 0x490 0x000 0x0 0x0 +#define MX53_PAD_EIM_D27__GPIO3_27 0x148 0x490 0x000 0x1 0x0 +#define MX53_PAD_EIM_D27__UART2_RXD_MUX 0x148 0x490 0x880 0x2 0x1 +#define MX53_PAD_EIM_D27__FIRI_TXD 0x148 0x490 0x000 0x3 0x0 +#define MX53_PAD_EIM_D27__IPU_CSI0_D_0 0x148 0x490 0x000 0x4 0x0 +#define MX53_PAD_EIM_D27__IPU_DI1_PIN13 0x148 0x490 0x000 0x5 0x0 +#define MX53_PAD_EIM_D27__IPU_SISG_3 0x148 0x490 0x000 0x6 0x0 +#define MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x148 0x490 0x000 0x7 0x0 +#define MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x14c 0x494 0x000 0x0 0x0 +#define MX53_PAD_EIM_D28__GPIO3_28 0x14c 0x494 0x000 0x1 0x0 +#define MX53_PAD_EIM_D28__UART2_CTS 0x14c 0x494 0x000 0x2 0x0 +#define MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO 0x14c 0x494 0x82c 0x3 0x1 +#define MX53_PAD_EIM_D28__CSPI_MOSI 0x14c 0x494 0x788 0x4 0x1 +#define MX53_PAD_EIM_D28__I2C1_SDA 0x14c 0x494 0x818 0x5 0x1 +#define MX53_PAD_EIM_D28__IPU_EXT_TRIG 0x14c 0x494 0x000 0x6 0x0 +#define MX53_PAD_EIM_D28__IPU_DI0_PIN13 0x14c 0x494 0x000 0x7 0x0 +#define MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x150 0x498 0x000 0x0 0x0 +#define MX53_PAD_EIM_D29__GPIO3_29 0x150 0x498 0x000 0x1 0x0 +#define MX53_PAD_EIM_D29__UART2_RTS 0x150 0x498 0x87c 0x2 0x1 +#define MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS 0x150 0x498 0x000 0x3 0x0 +#define MX53_PAD_EIM_D29__CSPI_SS0 0x150 0x498 0x78c 0x4 0x2 +#define MX53_PAD_EIM_D29__IPU_DI1_PIN15 0x150 0x498 0x000 0x5 0x0 +#define MX53_PAD_EIM_D29__IPU_CSI1_VSYNC 0x150 0x498 0x83c 0x6 0x0 +#define MX53_PAD_EIM_D29__IPU_DI0_PIN14 0x150 0x498 0x000 0x7 0x0 +#define MX53_PAD_EIM_D30__EMI_WEIM_D_30 0x154 0x49c 0x000 0x0 0x0 +#define MX53_PAD_EIM_D30__GPIO3_30 0x154 0x49c 0x000 0x1 0x0 +#define MX53_PAD_EIM_D30__UART3_CTS 0x154 0x49c 0x000 0x2 0x0 +#define MX53_PAD_EIM_D30__IPU_CSI0_D_3 0x154 0x49c 0x000 0x3 0x0 +#define MX53_PAD_EIM_D30__IPU_DI0_PIN11 0x154 0x49c 0x000 0x4 0x0 +#define MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x154 0x49c 0x000 0x5 0x0 +#define MX53_PAD_EIM_D30__USBOH3_USBH1_OC 0x154 0x49c 0x8a0 0x6 0x0 +#define MX53_PAD_EIM_D30__USBOH3_USBH2_OC 0x154 0x49c 0x8a4 0x7 0x1 +#define MX53_PAD_EIM_D31__EMI_WEIM_D_31 0x158 0x4a0 0x000 0x0 0x0 +#define MX53_PAD_EIM_D31__GPIO3_31 0x158 0x4a0 0x000 0x1 0x0 +#define MX53_PAD_EIM_D31__UART3_RTS 0x158 0x4a0 0x884 0x2 0x3 +#define MX53_PAD_EIM_D31__IPU_CSI0_D_2 0x158 0x4a0 0x000 0x3 0x0 +#define MX53_PAD_EIM_D31__IPU_DI0_PIN12 0x158 0x4a0 0x000 0x4 0x0 +#define MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x158 0x4a0 0x000 0x5 0x0 +#define MX53_PAD_EIM_D31__USBOH3_USBH1_PWR 0x158 0x4a0 0x000 0x6 0x0 +#define MX53_PAD_EIM_D31__USBOH3_USBH2_PWR 0x158 0x4a0 0x000 0x7 0x0 +#define MX53_PAD_EIM_A24__EMI_WEIM_A_24 0x15c 0x4a8 0x000 0x0 0x0 +#define MX53_PAD_EIM_A24__GPIO5_4 0x15c 0x4a8 0x000 0x1 0x0 +#define MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x15c 0x4a8 0x000 0x2 0x0 +#define MX53_PAD_EIM_A24__IPU_CSI1_D_19 0x15c 0x4a8 0x000 0x3 0x0 +#define MX53_PAD_EIM_A24__IPU_SISG_2 0x15c 0x4a8 0x000 0x6 0x0 +#define MX53_PAD_EIM_A24__USBPHY2_BVALID 0x15c 0x4a8 0x000 0x7 0x0 +#define MX53_PAD_EIM_A23__EMI_WEIM_A_23 0x160 0x4ac 0x000 0x0 0x0 +#define MX53_PAD_EIM_A23__GPIO6_6 0x160 0x4ac 0x000 0x1 0x0 +#define MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x160 0x4ac 0x000 0x2 0x0 +#define MX53_PAD_EIM_A23__IPU_CSI1_D_18 0x160 0x4ac 0x000 0x3 0x0 +#define MX53_PAD_EIM_A23__IPU_SISG_3 0x160 0x4ac 0x000 0x6 0x0 +#define MX53_PAD_EIM_A23__USBPHY2_ENDSESSION 0x160 0x4ac 0x000 0x7 0x0 +#define MX53_PAD_EIM_A22__EMI_WEIM_A_22 0x164 0x4b0 0x000 0x0 0x0 +#define MX53_PAD_EIM_A22__GPIO2_16 0x164 0x4b0 0x000 0x1 0x0 +#define MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x164 0x4b0 0x000 0x2 0x0 +#define MX53_PAD_EIM_A22__IPU_CSI1_D_17 0x164 0x4b0 0x000 0x3 0x0 +#define MX53_PAD_EIM_A22__SRC_BT_CFG1_7 0x164 0x4b0 0x000 0x7 0x0 +#define MX53_PAD_EIM_A21__EMI_WEIM_A_21 0x168 0x4b4 0x000 0x0 0x0 +#define MX53_PAD_EIM_A21__GPIO2_17 0x168 0x4b4 0x000 0x1 0x0 +#define MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x168 0x4b4 0x000 0x2 0x0 +#define MX53_PAD_EIM_A21__IPU_CSI1_D_16 0x168 0x4b4 0x000 0x3 0x0 +#define MX53_PAD_EIM_A21__SRC_BT_CFG1_6 0x168 0x4b4 0x000 0x7 0x0 +#define MX53_PAD_EIM_A20__EMI_WEIM_A_20 0x16c 0x4b8 0x000 0x0 0x0 +#define MX53_PAD_EIM_A20__GPIO2_18 0x16c 0x4b8 0x000 0x1 0x0 +#define MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x16c 0x4b8 0x000 0x2 0x0 +#define MX53_PAD_EIM_A20__IPU_CSI1_D_15 0x16c 0x4b8 0x000 0x3 0x0 +#define MX53_PAD_EIM_A20__SRC_BT_CFG1_5 0x16c 0x4b8 0x000 0x7 0x0 +#define MX53_PAD_EIM_A19__EMI_WEIM_A_19 0x170 0x4bc 0x000 0x0 0x0 +#define MX53_PAD_EIM_A19__GPIO2_19 0x170 0x4bc 0x000 0x1 0x0 +#define MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x170 0x4bc 0x000 0x2 0x0 +#define MX53_PAD_EIM_A19__IPU_CSI1_D_14 0x170 0x4bc 0x000 0x3 0x0 +#define MX53_PAD_EIM_A19__SRC_BT_CFG1_4 0x170 0x4bc 0x000 0x7 0x0 +#define MX53_PAD_EIM_A18__EMI_WEIM_A_18 0x174 0x4c0 0x000 0x0 0x0 +#define MX53_PAD_EIM_A18__GPIO2_20 0x174 0x4c0 0x000 0x1 0x0 +#define MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x174 0x4c0 0x000 0x2 0x0 +#define MX53_PAD_EIM_A18__IPU_CSI1_D_13 0x174 0x4c0 0x000 0x3 0x0 +#define MX53_PAD_EIM_A18__SRC_BT_CFG1_3 0x174 0x4c0 0x000 0x7 0x0 +#define MX53_PAD_EIM_A17__EMI_WEIM_A_17 0x178 0x4c4 0x000 0x0 0x0 +#define MX53_PAD_EIM_A17__GPIO2_21 0x178 0x4c4 0x000 0x1 0x0 +#define MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x178 0x4c4 0x000 0x2 0x0 +#define MX53_PAD_EIM_A17__IPU_CSI1_D_12 0x178 0x4c4 0x000 0x3 0x0 +#define MX53_PAD_EIM_A17__SRC_BT_CFG1_2 0x178 0x4c4 0x000 0x7 0x0 +#define MX53_PAD_EIM_A16__EMI_WEIM_A_16 0x17c 0x4c8 0x000 0x0 0x0 +#define MX53_PAD_EIM_A16__GPIO2_22 0x17c 0x4c8 0x000 0x1 0x0 +#define MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x17c 0x4c8 0x000 0x2 0x0 +#define MX53_PAD_EIM_A16__IPU_CSI1_PIXCLK 0x17c 0x4c8 0x000 0x3 0x0 +#define MX53_PAD_EIM_A16__SRC_BT_CFG1_1 0x17c 0x4c8 0x000 0x7 0x0 +#define MX53_PAD_EIM_CS0__EMI_WEIM_CS_0 0x180 0x4cc 0x000 0x0 0x0 +#define MX53_PAD_EIM_CS0__GPIO2_23 0x180 0x4cc 0x000 0x1 0x0 +#define MX53_PAD_EIM_CS0__ECSPI2_SCLK 0x180 0x4cc 0x7b8 0x2 0x2 +#define MX53_PAD_EIM_CS0__IPU_DI1_PIN5 0x180 0x4cc 0x000 0x3 0x0 +#define MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 0x184 0x4d0 0x000 0x0 0x0 +#define MX53_PAD_EIM_CS1__GPIO2_24 0x184 0x4d0 0x000 0x1 0x0 +#define MX53_PAD_EIM_CS1__ECSPI2_MOSI 0x184 0x4d0 0x7c0 0x2 0x2 +#define MX53_PAD_EIM_CS1__IPU_DI1_PIN6 0x184 0x4d0 0x000 0x3 0x0 +#define MX53_PAD_EIM_OE__EMI_WEIM_OE 0x188 0x4d4 0x000 0x0 0x0 +#define MX53_PAD_EIM_OE__GPIO2_25 0x188 0x4d4 0x000 0x1 0x0 +#define MX53_PAD_EIM_OE__ECSPI2_MISO 0x188 0x4d4 0x7bc 0x2 0x2 +#define MX53_PAD_EIM_OE__IPU_DI1_PIN7 0x188 0x4d4 0x000 0x3 0x0 +#define MX53_PAD_EIM_OE__USBPHY2_IDDIG 0x188 0x4d4 0x000 0x7 0x0 +#define MX53_PAD_EIM_RW__EMI_WEIM_RW 0x18c 0x4d8 0x000 0x0 0x0 +#define MX53_PAD_EIM_RW__GPIO2_26 0x18c 0x4d8 0x000 0x1 0x0 +#define MX53_PAD_EIM_RW__ECSPI2_SS0 0x18c 0x4d8 0x7c4 0x2 0x2 +#define MX53_PAD_EIM_RW__IPU_DI1_PIN8 0x18c 0x4d8 0x000 0x3 0x0 +#define MX53_PAD_EIM_RW__USBPHY2_HOSTDISCONNECT 0x18c 0x4d8 0x000 0x7 0x0 +#define MX53_PAD_EIM_LBA__EMI_WEIM_LBA 0x190 0x4dc 0x000 0x0 0x0 +#define MX53_PAD_EIM_LBA__GPIO2_27 0x190 0x4dc 0x000 0x1 0x0 +#define MX53_PAD_EIM_LBA__ECSPI2_SS1 0x190 0x4dc 0x7c8 0x2 0x1 +#define MX53_PAD_EIM_LBA__IPU_DI1_PIN17 0x190 0x4dc 0x000 0x3 0x0 +#define MX53_PAD_EIM_LBA__SRC_BT_CFG1_0 0x190 0x4dc 0x000 0x7 0x0 +#define MX53_PAD_EIM_EB0__EMI_WEIM_EB_0 0x194 0x4e4 0x000 0x0 0x0 +#define MX53_PAD_EIM_EB0__GPIO2_28 0x194 0x4e4 0x000 0x1 0x0 +#define MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x194 0x4e4 0x000 0x3 0x0 +#define MX53_PAD_EIM_EB0__IPU_CSI1_D_11 0x194 0x4e4 0x000 0x4 0x0 +#define MX53_PAD_EIM_EB0__GPC_PMIC_RDY 0x194 0x4e4 0x810 0x5 0x0 +#define MX53_PAD_EIM_EB0__SRC_BT_CFG2_7 0x194 0x4e4 0x000 0x7 0x0 +#define MX53_PAD_EIM_EB1__EMI_WEIM_EB_1 0x198 0x4e8 0x000 0x0 0x0 +#define MX53_PAD_EIM_EB1__GPIO2_29 0x198 0x4e8 0x000 0x1 0x0 +#define MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x198 0x4e8 0x000 0x3 0x0 +#define MX53_PAD_EIM_EB1__IPU_CSI1_D_10 0x198 0x4e8 0x000 0x4 0x0 +#define MX53_PAD_EIM_EB1__SRC_BT_CFG2_6 0x198 0x4e8 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x19c 0x4ec 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA0__GPIO3_0 0x19c 0x4ec 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x19c 0x4ec 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA0__IPU_CSI1_D_9 0x19c 0x4ec 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA0__SRC_BT_CFG2_5 0x19c 0x4ec 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x1a0 0x4f0 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA1__GPIO3_1 0x1a0 0x4f0 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x1a0 0x4f0 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA1__IPU_CSI1_D_8 0x1a0 0x4f0 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA1__SRC_BT_CFG2_4 0x1a0 0x4f0 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x1a4 0x4f4 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA2__GPIO3_2 0x1a4 0x4f4 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x1a4 0x4f4 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA2__IPU_CSI1_D_7 0x1a4 0x4f4 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA2__SRC_BT_CFG2_3 0x1a4 0x4f4 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x1a8 0x4f8 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA3__GPIO3_3 0x1a8 0x4f8 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x1a8 0x4f8 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA3__IPU_CSI1_D_6 0x1a8 0x4f8 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA3__SRC_BT_CFG2_2 0x1a8 0x4f8 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x1ac 0x4fc 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA4__GPIO3_4 0x1ac 0x4fc 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x1ac 0x4fc 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA4__IPU_CSI1_D_5 0x1ac 0x4fc 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA4__SRC_BT_CFG3_7 0x1ac 0x4fc 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x1b0 0x500 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA5__GPIO3_5 0x1b0 0x500 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x1b0 0x500 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA5__IPU_CSI1_D_4 0x1b0 0x500 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 0x1b0 0x500 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x1b4 0x504 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA6__GPIO3_6 0x1b4 0x504 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x1b4 0x504 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA6__IPU_CSI1_D_3 0x1b4 0x504 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA6__SRC_BT_CFG3_5 0x1b4 0x504 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0x1b8 0x508 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA7__GPIO3_7 0x1b8 0x508 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x1b8 0x508 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA7__IPU_CSI1_D_2 0x1b8 0x508 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA7__SRC_BT_CFG3_4 0x1b8 0x508 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA8__EMI_NAND_WEIM_DA_8 0x1bc 0x50c 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA8__GPIO3_8 0x1bc 0x50c 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x1bc 0x50c 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA8__IPU_CSI1_D_1 0x1bc 0x50c 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA8__SRC_BT_CFG3_3 0x1bc 0x50c 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA9__EMI_NAND_WEIM_DA_9 0x1c0 0x510 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA9__GPIO3_9 0x1c0 0x510 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x1c0 0x510 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA9__IPU_CSI1_D_0 0x1c0 0x510 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA9__SRC_BT_CFG3_2 0x1c0 0x510 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA10__EMI_NAND_WEIM_DA_10 0x1c4 0x514 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA10__GPIO3_10 0x1c4 0x514 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x1c4 0x514 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA10__IPU_CSI1_DATA_EN 0x1c4 0x514 0x834 0x4 0x1 +#define MX53_PAD_EIM_DA10__SRC_BT_CFG3_1 0x1c4 0x514 0x000 0x7 0x0 +#define MX53_PAD_EIM_DA11__EMI_NAND_WEIM_DA_11 0x1c8 0x518 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA11__GPIO3_11 0x1c8 0x518 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x1c8 0x518 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA11__IPU_CSI1_HSYNC 0x1c8 0x518 0x838 0x4 0x1 +#define MX53_PAD_EIM_DA12__EMI_NAND_WEIM_DA_12 0x1cc 0x51c 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA12__GPIO3_12 0x1cc 0x51c 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x1cc 0x51c 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA12__IPU_CSI1_VSYNC 0x1cc 0x51c 0x83c 0x4 0x1 +#define MX53_PAD_EIM_DA13__EMI_NAND_WEIM_DA_13 0x1d0 0x520 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA13__GPIO3_13 0x1d0 0x520 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x1d0 0x520 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA13__CCM_DI1_EXT_CLK 0x1d0 0x520 0x76c 0x4 0x1 +#define MX53_PAD_EIM_DA14__EMI_NAND_WEIM_DA_14 0x1d4 0x524 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA14__GPIO3_14 0x1d4 0x524 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x1d4 0x524 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA14__CCM_DI0_EXT_CLK 0x1d4 0x524 0x000 0x4 0x0 +#define MX53_PAD_EIM_DA15__EMI_NAND_WEIM_DA_15 0x1d8 0x528 0x000 0x0 0x0 +#define MX53_PAD_EIM_DA15__GPIO3_15 0x1d8 0x528 0x000 0x1 0x0 +#define MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x1d8 0x528 0x000 0x3 0x0 +#define MX53_PAD_EIM_DA15__IPU_DI1_PIN4 0x1d8 0x528 0x000 0x4 0x0 +#define MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x1dc 0x52c 0x000 0x0 0x0 +#define MX53_PAD_NANDF_WE_B__GPIO6_12 0x1dc 0x52c 0x000 0x1 0x0 +#define MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x1e0 0x530 0x000 0x0 0x0 +#define MX53_PAD_NANDF_RE_B__GPIO6_13 0x1e0 0x530 0x000 0x1 0x0 +#define MX53_PAD_EIM_WAIT__EMI_WEIM_WAIT 0x1e4 0x534 0x000 0x0 0x0 +#define MX53_PAD_EIM_WAIT__GPIO5_0 0x1e4 0x534 0x000 0x1 0x0 +#define MX53_PAD_EIM_WAIT__EMI_WEIM_DTACK_B 0x1e4 0x534 0x000 0x2 0x0 +#define MX53_PAD_LVDS1_TX3_P__GPIO6_22 0x1ec 0x000 0x000 0x0 0x0 +#define MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x1ec 0x000 0x000 0x1 0x0 +#define MX53_PAD_LVDS1_TX2_P__GPIO6_24 0x1f0 0x000 0x000 0x0 0x0 +#define MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x1f0 0x000 0x000 0x1 0x0 +#define MX53_PAD_LVDS1_CLK_P__GPIO6_26 0x1f4 0x000 0x000 0x0 0x0 +#define MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x1f4 0x000 0x000 0x1 0x0 +#define MX53_PAD_LVDS1_TX1_P__GPIO6_28 0x1f8 0x000 0x000 0x0 0x0 +#define MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x1f8 0x000 0x000 0x1 0x0 +#define MX53_PAD_LVDS1_TX0_P__GPIO6_30 0x1fc 0x000 0x000 0x0 0x0 +#define MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x1fc 0x000 0x000 0x1 0x0 +#define MX53_PAD_LVDS0_TX3_P__GPIO7_22 0x200 0x000 0x000 0x0 0x0 +#define MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x200 0x000 0x000 0x1 0x0 +#define MX53_PAD_LVDS0_CLK_P__GPIO7_24 0x204 0x000 0x000 0x0 0x0 +#define MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x204 0x000 0x000 0x1 0x0 +#define MX53_PAD_LVDS0_TX2_P__GPIO7_26 0x208 0x000 0x000 0x0 0x0 +#define MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x208 0x000 0x000 0x1 0x0 +#define MX53_PAD_LVDS0_TX1_P__GPIO7_28 0x20c 0x000 0x000 0x0 0x0 +#define MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x20c 0x000 0x000 0x1 0x0 +#define MX53_PAD_LVDS0_TX0_P__GPIO7_30 0x210 0x000 0x000 0x0 0x0 +#define MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x210 0x000 0x000 0x1 0x0 +#define MX53_PAD_GPIO_10__GPIO4_0 0x214 0x540 0x000 0x0 0x0 +#define MX53_PAD_GPIO_10__OSC32k_32K_OUT 0x214 0x540 0x000 0x1 0x0 +#define MX53_PAD_GPIO_11__GPIO4_1 0x218 0x544 0x000 0x0 0x0 +#define MX53_PAD_GPIO_12__GPIO4_2 0x21c 0x548 0x000 0x0 0x0 +#define MX53_PAD_GPIO_13__GPIO4_3 0x220 0x54c 0x000 0x0 0x0 +#define MX53_PAD_GPIO_14__GPIO4_4 0x224 0x550 0x000 0x0 0x0 +#define MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x228 0x5a0 0x000 0x0 0x0 +#define MX53_PAD_NANDF_CLE__GPIO6_7 0x228 0x5a0 0x000 0x1 0x0 +#define MX53_PAD_NANDF_CLE__USBPHY1_VSTATUS_0 0x228 0x5a0 0x000 0x7 0x0 +#define MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x22c 0x5a4 0x000 0x0 0x0 +#define MX53_PAD_NANDF_ALE__GPIO6_8 0x22c 0x5a4 0x000 0x1 0x0 +#define MX53_PAD_NANDF_ALE__USBPHY1_VSTATUS_1 0x22c 0x5a4 0x000 0x7 0x0 +#define MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0x230 0x5a8 0x000 0x0 0x0 +#define MX53_PAD_NANDF_WP_B__GPIO6_9 0x230 0x5a8 0x000 0x1 0x0 +#define MX53_PAD_NANDF_WP_B__USBPHY1_VSTATUS_2 0x230 0x5a8 0x000 0x7 0x0 +#define MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0x234 0x5ac 0x000 0x0 0x0 +#define MX53_PAD_NANDF_RB0__GPIO6_10 0x234 0x5ac 0x000 0x1 0x0 +#define MX53_PAD_NANDF_RB0__USBPHY1_VSTATUS_3 0x234 0x5ac 0x000 0x7 0x0 +#define MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x238 0x5b0 0x000 0x0 0x0 +#define MX53_PAD_NANDF_CS0__GPIO6_11 0x238 0x5b0 0x000 0x1 0x0 +#define MX53_PAD_NANDF_CS0__USBPHY1_VSTATUS_4 0x238 0x5b0 0x000 0x7 0x0 +#define MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1 0x23c 0x5b4 0x000 0x0 0x0 +#define MX53_PAD_NANDF_CS1__GPIO6_14 0x23c 0x5b4 0x000 0x1 0x0 +#define MX53_PAD_NANDF_CS1__MLB_MLBCLK 0x23c 0x5b4 0x858 0x6 0x0 +#define MX53_PAD_NANDF_CS1__USBPHY1_VSTATUS_5 0x23c 0x5b4 0x000 0x7 0x0 +#define MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2 0x240 0x5b8 0x000 0x0 0x0 +#define MX53_PAD_NANDF_CS2__GPIO6_15 0x240 0x5b8 0x000 0x1 0x0 +#define MX53_PAD_NANDF_CS2__IPU_SISG_0 0x240 0x5b8 0x000 0x2 0x0 +#define MX53_PAD_NANDF_CS2__ESAI1_TX0 0x240 0x5b8 0x7e4 0x3 0x0 +#define MX53_PAD_NANDF_CS2__EMI_WEIM_CRE 0x240 0x5b8 0x000 0x4 0x0 +#define MX53_PAD_NANDF_CS2__CCM_CSI0_MCLK 0x240 0x5b8 0x000 0x5 0x0 +#define MX53_PAD_NANDF_CS2__MLB_MLBSIG 0x240 0x5b8 0x860 0x6 0x0 +#define MX53_PAD_NANDF_CS2__USBPHY1_VSTATUS_6 0x240 0x5b8 0x000 0x7 0x0 +#define MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3 0x244 0x5bc 0x000 0x0 0x0 +#define MX53_PAD_NANDF_CS3__GPIO6_16 0x244 0x5bc 0x000 0x1 0x0 +#define MX53_PAD_NANDF_CS3__IPU_SISG_1 0x244 0x5bc 0x000 0x2 0x0 +#define MX53_PAD_NANDF_CS3__ESAI1_TX1 0x244 0x5bc 0x7e8 0x3 0x0 +#define MX53_PAD_NANDF_CS3__EMI_WEIM_A_26 0x244 0x5bc 0x000 0x4 0x0 +#define MX53_PAD_NANDF_CS3__MLB_MLBDAT 0x244 0x5bc 0x85c 0x6 0x0 +#define MX53_PAD_NANDF_CS3__USBPHY1_VSTATUS_7 0x244 0x5bc 0x000 0x7 0x0 +#define MX53_PAD_FEC_MDIO__FEC_MDIO 0x248 0x5c4 0x804 0x0 0x1 +#define MX53_PAD_FEC_MDIO__GPIO1_22 0x248 0x5c4 0x000 0x1 0x0 +#define MX53_PAD_FEC_MDIO__ESAI1_SCKR 0x248 0x5c4 0x7dc 0x2 0x0 +#define MX53_PAD_FEC_MDIO__FEC_COL 0x248 0x5c4 0x800 0x3 0x1 +#define MX53_PAD_FEC_MDIO__RTC_CE_RTC_PS2 0x248 0x5c4 0x000 0x4 0x0 +#define MX53_PAD_FEC_MDIO__SDMA_DEBUG_BUS_DEVICE_3 0x248 0x5c4 0x000 0x5 0x0 +#define MX53_PAD_FEC_MDIO__EMI_EMI_DEBUG_49 0x248 0x5c4 0x000 0x6 0x0 +#define MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x24c 0x5c8 0x000 0x0 0x0 +#define MX53_PAD_FEC_REF_CLK__GPIO1_23 0x24c 0x5c8 0x000 0x1 0x0 +#define MX53_PAD_FEC_REF_CLK__ESAI1_FSR 0x24c 0x5c8 0x7cc 0x2 0x0 +#define MX53_PAD_FEC_REF_CLK__SDMA_DEBUG_BUS_DEVICE_4 0x24c 0x5c8 0x000 0x5 0x0 +#define MX53_PAD_FEC_REF_CLK__EMI_EMI_DEBUG_50 0x24c 0x5c8 0x000 0x6 0x0 +#define MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x250 0x5cc 0x000 0x0 0x0 +#define MX53_PAD_FEC_RX_ER__GPIO1_24 0x250 0x5cc 0x000 0x1 0x0 +#define MX53_PAD_FEC_RX_ER__ESAI1_HCKR 0x250 0x5cc 0x7d4 0x2 0x0 +#define MX53_PAD_FEC_RX_ER__FEC_RX_CLK 0x250 0x5cc 0x808 0x3 0x1 +#define MX53_PAD_FEC_RX_ER__RTC_CE_RTC_PS3 0x250 0x5cc 0x000 0x4 0x0 +#define MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x254 0x5d0 0x000 0x0 0x0 +#define MX53_PAD_FEC_CRS_DV__GPIO1_25 0x254 0x5d0 0x000 0x1 0x0 +#define MX53_PAD_FEC_CRS_DV__ESAI1_SCKT 0x254 0x5d0 0x7e0 0x2 0x0 +#define MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x258 0x5d4 0x000 0x0 0x0 +#define MX53_PAD_FEC_RXD1__GPIO1_26 0x258 0x5d4 0x000 0x1 0x0 +#define MX53_PAD_FEC_RXD1__ESAI1_FST 0x258 0x5d4 0x7d0 0x2 0x0 +#define MX53_PAD_FEC_RXD1__MLB_MLBSIG 0x258 0x5d4 0x860 0x3 0x1 +#define MX53_PAD_FEC_RXD1__RTC_CE_RTC_PS1 0x258 0x5d4 0x000 0x4 0x0 +#define MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x25c 0x5d8 0x000 0x0 0x0 +#define MX53_PAD_FEC_RXD0__GPIO1_27 0x25c 0x5d8 0x000 0x1 0x0 +#define MX53_PAD_FEC_RXD0__ESAI1_HCKT 0x25c 0x5d8 0x7d8 0x2 0x0 +#define MX53_PAD_FEC_RXD0__OSC32k_32K_OUT 0x25c 0x5d8 0x000 0x3 0x0 +#define MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x260 0x5dc 0x000 0x0 0x0 +#define MX53_PAD_FEC_TX_EN__GPIO1_28 0x260 0x5dc 0x000 0x1 0x0 +#define MX53_PAD_FEC_TX_EN__ESAI1_TX3_RX2 0x260 0x5dc 0x7f0 0x2 0x0 +#define MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x264 0x5e0 0x000 0x0 0x0 +#define MX53_PAD_FEC_TXD1__GPIO1_29 0x264 0x5e0 0x000 0x1 0x0 +#define MX53_PAD_FEC_TXD1__ESAI1_TX2_RX3 0x264 0x5e0 0x7ec 0x2 0x0 +#define MX53_PAD_FEC_TXD1__MLB_MLBCLK 0x264 0x5e0 0x858 0x3 0x1 +#define MX53_PAD_FEC_TXD1__RTC_CE_RTC_PRSC_CLK 0x264 0x5e0 0x000 0x4 0x0 +#define MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x268 0x5e4 0x000 0x0 0x0 +#define MX53_PAD_FEC_TXD0__GPIO1_30 0x268 0x5e4 0x000 0x1 0x0 +#define MX53_PAD_FEC_TXD0__ESAI1_TX4_RX1 0x268 0x5e4 0x7f4 0x2 0x0 +#define MX53_PAD_FEC_TXD0__USBPHY2_DATAOUT_0 0x268 0x5e4 0x000 0x7 0x0 +#define MX53_PAD_FEC_MDC__FEC_MDC 0x26c 0x5e8 0x000 0x0 0x0 +#define MX53_PAD_FEC_MDC__GPIO1_31 0x26c 0x5e8 0x000 0x1 0x0 +#define MX53_PAD_FEC_MDC__ESAI1_TX5_RX0 0x26c 0x5e8 0x7f8 0x2 0x0 +#define MX53_PAD_FEC_MDC__MLB_MLBDAT 0x26c 0x5e8 0x85c 0x3 0x1 +#define MX53_PAD_FEC_MDC__RTC_CE_RTC_ALARM1_TRIG 0x26c 0x5e8 0x000 0x4 0x0 +#define MX53_PAD_FEC_MDC__USBPHY2_DATAOUT_1 0x26c 0x5e8 0x000 0x7 0x0 +#define MX53_PAD_PATA_DIOW__PATA_DIOW 0x270 0x5f0 0x000 0x0 0x0 +#define MX53_PAD_PATA_DIOW__GPIO6_17 0x270 0x5f0 0x000 0x1 0x0 +#define MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x270 0x5f0 0x000 0x3 0x0 +#define MX53_PAD_PATA_DIOW__USBPHY2_DATAOUT_2 0x270 0x5f0 0x000 0x7 0x0 +#define MX53_PAD_PATA_DMACK__PATA_DMACK 0x274 0x5f4 0x000 0x0 0x0 +#define MX53_PAD_PATA_DMACK__GPIO6_18 0x274 0x5f4 0x000 0x1 0x0 +#define MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x274 0x5f4 0x878 0x3 0x3 +#define MX53_PAD_PATA_DMACK__USBPHY2_DATAOUT_3 0x274 0x5f4 0x000 0x7 0x0 +#define MX53_PAD_PATA_DMARQ__PATA_DMARQ 0x278 0x5f8 0x000 0x0 0x0 +#define MX53_PAD_PATA_DMARQ__GPIO7_0 0x278 0x5f8 0x000 0x1 0x0 +#define MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x278 0x5f8 0x000 0x3 0x0 +#define MX53_PAD_PATA_DMARQ__CCM_CCM_OUT_0 0x278 0x5f8 0x000 0x5 0x0 +#define MX53_PAD_PATA_DMARQ__USBPHY2_DATAOUT_4 0x278 0x5f8 0x000 0x7 0x0 +#define MX53_PAD_PATA_BUFFER_EN__PATA_BUFFER_EN 0x27c 0x5fc 0x000 0x0 0x0 +#define MX53_PAD_PATA_BUFFER_EN__GPIO7_1 0x27c 0x5fc 0x000 0x1 0x0 +#define MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x27c 0x5fc 0x880 0x3 0x3 +#define MX53_PAD_PATA_BUFFER_EN__CCM_CCM_OUT_1 0x27c 0x5fc 0x000 0x5 0x0 +#define MX53_PAD_PATA_BUFFER_EN__USBPHY2_DATAOUT_5 0x27c 0x5fc 0x000 0x7 0x0 +#define MX53_PAD_PATA_INTRQ__PATA_INTRQ 0x280 0x600 0x000 0x0 0x0 +#define MX53_PAD_PATA_INTRQ__GPIO7_2 0x280 0x600 0x000 0x1 0x0 +#define MX53_PAD_PATA_INTRQ__UART2_CTS 0x280 0x600 0x000 0x3 0x0 +#define MX53_PAD_PATA_INTRQ__CAN1_TXCAN 0x280 0x600 0x000 0x4 0x0 +#define MX53_PAD_PATA_INTRQ__CCM_CCM_OUT_2 0x280 0x600 0x000 0x5 0x0 +#define MX53_PAD_PATA_INTRQ__USBPHY2_DATAOUT_6 0x280 0x600 0x000 0x7 0x0 +#define MX53_PAD_PATA_DIOR__PATA_DIOR 0x284 0x604 0x000 0x0 0x0 +#define MX53_PAD_PATA_DIOR__GPIO7_3 0x284 0x604 0x000 0x1 0x0 +#define MX53_PAD_PATA_DIOR__UART2_RTS 0x284 0x604 0x87c 0x3 0x3 +#define MX53_PAD_PATA_DIOR__CAN1_RXCAN 0x284 0x604 0x760 0x4 0x1 +#define MX53_PAD_PATA_DIOR__USBPHY2_DATAOUT_7 0x284 0x604 0x000 0x7 0x0 +#define MX53_PAD_PATA_RESET_B__PATA_PATA_RESET_B 0x288 0x608 0x000 0x0 0x0 +#define MX53_PAD_PATA_RESET_B__GPIO7_4 0x288 0x608 0x000 0x1 0x0 +#define MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x288 0x608 0x000 0x2 0x0 +#define MX53_PAD_PATA_RESET_B__UART1_CTS 0x288 0x608 0x000 0x3 0x0 +#define MX53_PAD_PATA_RESET_B__CAN2_TXCAN 0x288 0x608 0x000 0x4 0x0 +#define MX53_PAD_PATA_RESET_B__USBPHY1_DATAOUT_0 0x288 0x608 0x000 0x7 0x0 +#define MX53_PAD_PATA_IORDY__PATA_IORDY 0x28c 0x60c 0x000 0x0 0x0 +#define MX53_PAD_PATA_IORDY__GPIO7_5 0x28c 0x60c 0x000 0x1 0x0 +#define MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x28c 0x60c 0x000 0x2 0x0 +#define MX53_PAD_PATA_IORDY__UART1_RTS 0x28c 0x60c 0x874 0x3 0x3 +#define MX53_PAD_PATA_IORDY__CAN2_RXCAN 0x28c 0x60c 0x764 0x4 0x1 +#define MX53_PAD_PATA_IORDY__USBPHY1_DATAOUT_1 0x28c 0x60c 0x000 0x7 0x0 +#define MX53_PAD_PATA_DA_0__PATA_DA_0 0x290 0x610 0x000 0x0 0x0 +#define MX53_PAD_PATA_DA_0__GPIO7_6 0x290 0x610 0x000 0x1 0x0 +#define MX53_PAD_PATA_DA_0__ESDHC3_RST 0x290 0x610 0x000 0x2 0x0 +#define MX53_PAD_PATA_DA_0__OWIRE_LINE 0x290 0x610 0x864 0x4 0x0 +#define MX53_PAD_PATA_DA_0__USBPHY1_DATAOUT_2 0x290 0x610 0x000 0x7 0x0 +#define MX53_PAD_PATA_DA_1__PATA_DA_1 0x294 0x614 0x000 0x0 0x0 +#define MX53_PAD_PATA_DA_1__GPIO7_7 0x294 0x614 0x000 0x1 0x0 +#define MX53_PAD_PATA_DA_1__ESDHC4_CMD 0x294 0x614 0x000 0x2 0x0 +#define MX53_PAD_PATA_DA_1__UART3_CTS 0x294 0x614 0x000 0x4 0x0 +#define MX53_PAD_PATA_DA_1__USBPHY1_DATAOUT_3 0x294 0x614 0x000 0x7 0x0 +#define MX53_PAD_PATA_DA_2__PATA_DA_2 0x298 0x618 0x000 0x0 0x0 +#define MX53_PAD_PATA_DA_2__GPIO7_8 0x298 0x618 0x000 0x1 0x0 +#define MX53_PAD_PATA_DA_2__ESDHC4_CLK 0x298 0x618 0x000 0x2 0x0 +#define MX53_PAD_PATA_DA_2__UART3_RTS 0x298 0x618 0x884 0x4 0x5 +#define MX53_PAD_PATA_DA_2__USBPHY1_DATAOUT_4 0x298 0x618 0x000 0x7 0x0 +#define MX53_PAD_PATA_CS_0__PATA_CS_0 0x29c 0x61c 0x000 0x0 0x0 +#define MX53_PAD_PATA_CS_0__GPIO7_9 0x29c 0x61c 0x000 0x1 0x0 +#define MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x29c 0x61c 0x000 0x4 0x0 +#define MX53_PAD_PATA_CS_0__USBPHY1_DATAOUT_5 0x29c 0x61c 0x000 0x7 0x0 +#define MX53_PAD_PATA_CS_1__PATA_CS_1 0x2a0 0x620 0x000 0x0 0x0 +#define MX53_PAD_PATA_CS_1__GPIO7_10 0x2a0 0x620 0x000 0x1 0x0 +#define MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x2a0 0x620 0x888 0x4 0x3 +#define MX53_PAD_PATA_CS_1__USBPHY1_DATAOUT_6 0x2a0 0x620 0x000 0x7 0x0 +#define MX53_PAD_PATA_DATA0__PATA_DATA_0 0x2a4 0x628 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA0__GPIO2_0 0x2a4 0x628 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0x2a4 0x628 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x2a4 0x628 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA0__GPU3d_GPU_DEBUG_OUT_0 0x2a4 0x628 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA0__IPU_DIAG_BUS_0 0x2a4 0x628 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA0__USBPHY1_DATAOUT_7 0x2a4 0x628 0x000 0x7 0x0 +#define MX53_PAD_PATA_DATA1__PATA_DATA_1 0x2a8 0x62c 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA1__GPIO2_1 0x2a8 0x62c 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0x2a8 0x62c 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x2a8 0x62c 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA1__GPU3d_GPU_DEBUG_OUT_1 0x2a8 0x62c 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA1__IPU_DIAG_BUS_1 0x2a8 0x62c 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA2__PATA_DATA_2 0x2ac 0x630 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA2__GPIO2_2 0x2ac 0x630 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0x2ac 0x630 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x2ac 0x630 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA2__GPU3d_GPU_DEBUG_OUT_2 0x2ac 0x630 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA2__IPU_DIAG_BUS_2 0x2ac 0x630 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA3__PATA_DATA_3 0x2b0 0x634 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA3__GPIO2_3 0x2b0 0x634 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0x2b0 0x634 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x2b0 0x634 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA3__GPU3d_GPU_DEBUG_OUT_3 0x2b0 0x634 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA3__IPU_DIAG_BUS_3 0x2b0 0x634 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA4__PATA_DATA_4 0x2b4 0x638 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA4__GPIO2_4 0x2b4 0x638 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0x2b4 0x638 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA4__ESDHC4_DAT4 0x2b4 0x638 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA4__GPU3d_GPU_DEBUG_OUT_4 0x2b4 0x638 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA4__IPU_DIAG_BUS_4 0x2b4 0x638 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA5__PATA_DATA_5 0x2b8 0x63c 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA5__GPIO2_5 0x2b8 0x63c 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0x2b8 0x63c 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA5__ESDHC4_DAT5 0x2b8 0x63c 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 0x2b8 0x63c 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 0x2b8 0x63c 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA6__PATA_DATA_6 0x2bc 0x640 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA6__GPIO2_6 0x2bc 0x640 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0x2bc 0x640 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA6__ESDHC4_DAT6 0x2bc 0x640 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 0x2bc 0x640 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 0x2bc 0x640 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA7__PATA_DATA_7 0x2c0 0x644 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA7__GPIO2_7 0x2c0 0x644 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0x2c0 0x644 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA7__ESDHC4_DAT7 0x2c0 0x644 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA7__GPU3d_GPU_DEBUG_OUT_7 0x2c0 0x644 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA7__IPU_DIAG_BUS_7 0x2c0 0x644 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA8__PATA_DATA_8 0x2c4 0x648 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA8__GPIO2_8 0x2c4 0x648 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA8__ESDHC1_DAT4 0x2c4 0x648 0x000 0x2 0x0 +#define MX53_PAD_PATA_DATA8__EMI_NANDF_D_8 0x2c4 0x648 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x2c4 0x648 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA8__GPU3d_GPU_DEBUG_OUT_8 0x2c4 0x648 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA8__IPU_DIAG_BUS_8 0x2c4 0x648 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA9__PATA_DATA_9 0x2c8 0x64c 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA9__GPIO2_9 0x2c8 0x64c 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA9__ESDHC1_DAT5 0x2c8 0x64c 0x000 0x2 0x0 +#define MX53_PAD_PATA_DATA9__EMI_NANDF_D_9 0x2c8 0x64c 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x2c8 0x64c 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA9__GPU3d_GPU_DEBUG_OUT_9 0x2c8 0x64c 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA9__IPU_DIAG_BUS_9 0x2c8 0x64c 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA10__PATA_DATA_10 0x2cc 0x650 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA10__GPIO2_10 0x2cc 0x650 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA10__ESDHC1_DAT6 0x2cc 0x650 0x000 0x2 0x0 +#define MX53_PAD_PATA_DATA10__EMI_NANDF_D_10 0x2cc 0x650 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x2cc 0x650 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA10__GPU3d_GPU_DEBUG_OUT_10 0x2cc 0x650 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA10__IPU_DIAG_BUS_10 0x2cc 0x650 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA11__PATA_DATA_11 0x2d0 0x654 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA11__GPIO2_11 0x2d0 0x654 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA11__ESDHC1_DAT7 0x2d0 0x654 0x000 0x2 0x0 +#define MX53_PAD_PATA_DATA11__EMI_NANDF_D_11 0x2d0 0x654 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x2d0 0x654 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA11__GPU3d_GPU_DEBUG_OUT_11 0x2d0 0x654 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA11__IPU_DIAG_BUS_11 0x2d0 0x654 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA12__PATA_DATA_12 0x2d4 0x658 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA12__GPIO2_12 0x2d4 0x658 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA12__ESDHC2_DAT4 0x2d4 0x658 0x000 0x2 0x0 +#define MX53_PAD_PATA_DATA12__EMI_NANDF_D_12 0x2d4 0x658 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA12__ESDHC4_DAT0 0x2d4 0x658 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA12__GPU3d_GPU_DEBUG_OUT_12 0x2d4 0x658 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA12__IPU_DIAG_BUS_12 0x2d4 0x658 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA13__PATA_DATA_13 0x2d8 0x65c 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA13__GPIO2_13 0x2d8 0x65c 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA13__ESDHC2_DAT5 0x2d8 0x65c 0x000 0x2 0x0 +#define MX53_PAD_PATA_DATA13__EMI_NANDF_D_13 0x2d8 0x65c 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA13__ESDHC4_DAT1 0x2d8 0x65c 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA13__GPU3d_GPU_DEBUG_OUT_13 0x2d8 0x65c 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA13__IPU_DIAG_BUS_13 0x2d8 0x65c 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA14__PATA_DATA_14 0x2dc 0x660 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA14__GPIO2_14 0x2dc 0x660 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA14__ESDHC2_DAT6 0x2dc 0x660 0x000 0x2 0x0 +#define MX53_PAD_PATA_DATA14__EMI_NANDF_D_14 0x2dc 0x660 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA14__ESDHC4_DAT2 0x2dc 0x660 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA14__GPU3d_GPU_DEBUG_OUT_14 0x2dc 0x660 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA14__IPU_DIAG_BUS_14 0x2dc 0x660 0x000 0x6 0x0 +#define MX53_PAD_PATA_DATA15__PATA_DATA_15 0x2e0 0x664 0x000 0x0 0x0 +#define MX53_PAD_PATA_DATA15__GPIO2_15 0x2e0 0x664 0x000 0x1 0x0 +#define MX53_PAD_PATA_DATA15__ESDHC2_DAT7 0x2e0 0x664 0x000 0x2 0x0 +#define MX53_PAD_PATA_DATA15__EMI_NANDF_D_15 0x2e0 0x664 0x000 0x3 0x0 +#define MX53_PAD_PATA_DATA15__ESDHC4_DAT3 0x2e0 0x664 0x000 0x4 0x0 +#define MX53_PAD_PATA_DATA15__GPU3d_GPU_DEBUG_OUT_15 0x2e0 0x664 0x000 0x5 0x0 +#define MX53_PAD_PATA_DATA15__IPU_DIAG_BUS_15 0x2e0 0x664 0x000 0x6 0x0 +#define MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x2e4 0x66c 0x000 0x0 0x0 +#define MX53_PAD_SD1_DATA0__GPIO1_16 0x2e4 0x66c 0x000 0x1 0x0 +#define MX53_PAD_SD1_DATA0__GPT_CAPIN1 0x2e4 0x66c 0x000 0x3 0x0 +#define MX53_PAD_SD1_DATA0__CSPI_MISO 0x2e4 0x66c 0x784 0x5 0x2 +#define MX53_PAD_SD1_DATA0__CCM_PLL3_BYP 0x2e4 0x66c 0x778 0x7 0x0 +#define MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x2e8 0x670 0x000 0x0 0x0 +#define MX53_PAD_SD1_DATA1__GPIO1_17 0x2e8 0x670 0x000 0x1 0x0 +#define MX53_PAD_SD1_DATA1__GPT_CAPIN2 0x2e8 0x670 0x000 0x3 0x0 +#define MX53_PAD_SD1_DATA1__CSPI_SS0 0x2e8 0x670 0x78c 0x5 0x3 +#define MX53_PAD_SD1_DATA1__CCM_PLL4_BYP 0x2e8 0x670 0x77c 0x7 0x1 +#define MX53_PAD_SD1_CMD__ESDHC1_CMD 0x2ec 0x674 0x000 0x0 0x0 +#define MX53_PAD_SD1_CMD__GPIO1_18 0x2ec 0x674 0x000 0x1 0x0 +#define MX53_PAD_SD1_CMD__GPT_CMPOUT1 0x2ec 0x674 0x000 0x3 0x0 +#define MX53_PAD_SD1_CMD__CSPI_MOSI 0x2ec 0x674 0x788 0x5 0x2 +#define MX53_PAD_SD1_CMD__CCM_PLL1_BYP 0x2ec 0x674 0x770 0x7 0x0 +#define MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x2f0 0x678 0x000 0x0 0x0 +#define MX53_PAD_SD1_DATA2__GPIO1_19 0x2f0 0x678 0x000 0x1 0x0 +#define MX53_PAD_SD1_DATA2__GPT_CMPOUT2 0x2f0 0x678 0x000 0x2 0x0 +#define MX53_PAD_SD1_DATA2__PWM2_PWMO 0x2f0 0x678 0x000 0x3 0x0 +#define MX53_PAD_SD1_DATA2__WDOG1_WDOG_B 0x2f0 0x678 0x000 0x4 0x0 +#define MX53_PAD_SD1_DATA2__CSPI_SS1 0x2f0 0x678 0x790 0x5 0x2 +#define MX53_PAD_SD1_DATA2__WDOG1_WDOG_RST_B_DEB 0x2f0 0x678 0x000 0x6 0x0 +#define MX53_PAD_SD1_DATA2__CCM_PLL2_BYP 0x2f0 0x678 0x774 0x7 0x0 +#define MX53_PAD_SD1_CLK__ESDHC1_CLK 0x2f4 0x67c 0x000 0x0 0x0 +#define MX53_PAD_SD1_CLK__GPIO1_20 0x2f4 0x67c 0x000 0x1 0x0 +#define MX53_PAD_SD1_CLK__OSC32k_32K_OUT 0x2f4 0x67c 0x000 0x2 0x0 +#define MX53_PAD_SD1_CLK__GPT_CLKIN 0x2f4 0x67c 0x000 0x3 0x0 +#define MX53_PAD_SD1_CLK__CSPI_SCLK 0x2f4 0x67c 0x780 0x5 0x2 +#define MX53_PAD_SD1_CLK__SATA_PHY_DTB_0 0x2f4 0x67c 0x000 0x7 0x0 +#define MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x2f8 0x680 0x000 0x0 0x0 +#define MX53_PAD_SD1_DATA3__GPIO1_21 0x2f8 0x680 0x000 0x1 0x0 +#define MX53_PAD_SD1_DATA3__GPT_CMPOUT3 0x2f8 0x680 0x000 0x2 0x0 +#define MX53_PAD_SD1_DATA3__PWM1_PWMO 0x2f8 0x680 0x000 0x3 0x0 +#define MX53_PAD_SD1_DATA3__WDOG2_WDOG_B 0x2f8 0x680 0x000 0x4 0x0 +#define MX53_PAD_SD1_DATA3__CSPI_SS2 0x2f8 0x680 0x794 0x5 0x2 +#define MX53_PAD_SD1_DATA3__WDOG2_WDOG_RST_B_DEB 0x2f8 0x680 0x000 0x6 0x0 +#define MX53_PAD_SD1_DATA3__SATA_PHY_DTB_1 0x2f8 0x680 0x000 0x7 0x0 +#define MX53_PAD_SD2_CLK__ESDHC2_CLK 0x2fc 0x688 0x000 0x0 0x0 +#define MX53_PAD_SD2_CLK__GPIO1_10 0x2fc 0x688 0x000 0x1 0x0 +#define MX53_PAD_SD2_CLK__KPP_COL_5 0x2fc 0x688 0x840 0x2 0x2 +#define MX53_PAD_SD2_CLK__AUDMUX_AUD4_RXFS 0x2fc 0x688 0x73c 0x3 0x1 +#define MX53_PAD_SD2_CLK__CSPI_SCLK 0x2fc 0x688 0x780 0x5 0x3 +#define MX53_PAD_SD2_CLK__SCC_RANDOM_V 0x2fc 0x688 0x000 0x7 0x0 +#define MX53_PAD_SD2_CMD__ESDHC2_CMD 0x300 0x68c 0x000 0x0 0x0 +#define MX53_PAD_SD2_CMD__GPIO1_11 0x300 0x68c 0x000 0x1 0x0 +#define MX53_PAD_SD2_CMD__KPP_ROW_5 0x300 0x68c 0x84c 0x2 0x1 +#define MX53_PAD_SD2_CMD__AUDMUX_AUD4_RXC 0x300 0x68c 0x738 0x3 0x1 +#define MX53_PAD_SD2_CMD__CSPI_MOSI 0x300 0x68c 0x788 0x5 0x3 +#define MX53_PAD_SD2_CMD__SCC_RANDOM 0x300 0x68c 0x000 0x7 0x0 +#define MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x304 0x690 0x000 0x0 0x0 +#define MX53_PAD_SD2_DATA3__GPIO1_12 0x304 0x690 0x000 0x1 0x0 +#define MX53_PAD_SD2_DATA3__KPP_COL_6 0x304 0x690 0x844 0x2 0x1 +#define MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x304 0x690 0x740 0x3 0x1 +#define MX53_PAD_SD2_DATA3__CSPI_SS2 0x304 0x690 0x794 0x5 0x3 +#define MX53_PAD_SD2_DATA3__SJC_DONE 0x304 0x690 0x000 0x7 0x0 +#define MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x308 0x694 0x000 0x0 0x0 +#define MX53_PAD_SD2_DATA2__GPIO1_13 0x308 0x694 0x000 0x1 0x0 +#define MX53_PAD_SD2_DATA2__KPP_ROW_6 0x308 0x694 0x850 0x2 0x1 +#define MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x308 0x694 0x734 0x3 0x1 +#define MX53_PAD_SD2_DATA2__CSPI_SS1 0x308 0x694 0x790 0x5 0x3 +#define MX53_PAD_SD2_DATA2__SJC_FAIL 0x308 0x694 0x000 0x7 0x0 +#define MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x30c 0x698 0x000 0x0 0x0 +#define MX53_PAD_SD2_DATA1__GPIO1_14 0x30c 0x698 0x000 0x1 0x0 +#define MX53_PAD_SD2_DATA1__KPP_COL_7 0x30c 0x698 0x848 0x2 0x1 +#define MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x30c 0x698 0x744 0x3 0x1 +#define MX53_PAD_SD2_DATA1__CSPI_SS0 0x30c 0x698 0x78c 0x5 0x4 +#define MX53_PAD_SD2_DATA1__RTIC_SEC_VIO 0x30c 0x698 0x000 0x7 0x0 +#define MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x310 0x69c 0x000 0x0 0x0 +#define MX53_PAD_SD2_DATA0__GPIO1_15 0x310 0x69c 0x000 0x1 0x0 +#define MX53_PAD_SD2_DATA0__KPP_ROW_7 0x310 0x69c 0x854 0x2 0x1 +#define MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x310 0x69c 0x730 0x3 0x1 +#define MX53_PAD_SD2_DATA0__CSPI_MISO 0x310 0x69c 0x784 0x5 0x3 +#define MX53_PAD_SD2_DATA0__RTIC_DONE_INT 0x310 0x69c 0x000 0x7 0x0 +#define MX53_PAD_GPIO_0__CCM_CLKO 0x314 0x6a4 0x000 0x0 0x0 +#define MX53_PAD_GPIO_0__GPIO1_0 0x314 0x6a4 0x000 0x1 0x0 +#define MX53_PAD_GPIO_0__KPP_COL_5 0x314 0x6a4 0x840 0x2 0x3 +#define MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x314 0x6a4 0x000 0x3 0x0 +#define MX53_PAD_GPIO_0__EPIT1_EPITO 0x314 0x6a4 0x000 0x4 0x0 +#define MX53_PAD_GPIO_0__SRTC_ALARM_DEB 0x314 0x6a4 0x000 0x5 0x0 +#define MX53_PAD_GPIO_0__USBOH3_USBH1_PWR 0x314 0x6a4 0x000 0x6 0x0 +#define MX53_PAD_GPIO_0__CSU_TD 0x314 0x6a4 0x000 0x7 0x0 +#define MX53_PAD_GPIO_1__ESAI1_SCKR 0x318 0x6a8 0x7dc 0x0 0x1 +#define MX53_PAD_GPIO_1__GPIO1_1 0x318 0x6a8 0x000 0x1 0x0 +#define MX53_PAD_GPIO_1__KPP_ROW_5 0x318 0x6a8 0x84c 0x2 0x2 +#define MX53_PAD_GPIO_1__CCM_SSI_EXT2_CLK 0x318 0x6a8 0x000 0x3 0x0 +#define MX53_PAD_GPIO_1__PWM2_PWMO 0x318 0x6a8 0x000 0x4 0x0 +#define MX53_PAD_GPIO_1__WDOG2_WDOG_B 0x318 0x6a8 0x000 0x5 0x0 +#define MX53_PAD_GPIO_1__ESDHC1_CD 0x318 0x6a8 0x000 0x6 0x0 +#define MX53_PAD_GPIO_1__SRC_TESTER_ACK 0x318 0x6a8 0x000 0x7 0x0 +#define MX53_PAD_GPIO_9__ESAI1_FSR 0x31c 0x6ac 0x7cc 0x0 0x1 +#define MX53_PAD_GPIO_9__GPIO1_9 0x31c 0x6ac 0x000 0x1 0x0 +#define MX53_PAD_GPIO_9__KPP_COL_6 0x31c 0x6ac 0x844 0x2 0x2 +#define MX53_PAD_GPIO_9__CCM_REF_EN_B 0x31c 0x6ac 0x000 0x3 0x0 +#define MX53_PAD_GPIO_9__PWM1_PWMO 0x31c 0x6ac 0x000 0x4 0x0 +#define MX53_PAD_GPIO_9__WDOG1_WDOG_B 0x31c 0x6ac 0x000 0x5 0x0 +#define MX53_PAD_GPIO_9__ESDHC1_WP 0x31c 0x6ac 0x7fc 0x6 0x1 +#define MX53_PAD_GPIO_9__SCC_FAIL_STATE 0x31c 0x6ac 0x000 0x7 0x0 +#define MX53_PAD_GPIO_3__ESAI1_HCKR 0x320 0x6b0 0x7d4 0x0 0x1 +#define MX53_PAD_GPIO_3__GPIO1_3 0x320 0x6b0 0x000 0x1 0x0 +#define MX53_PAD_GPIO_3__I2C3_SCL 0x320 0x6b0 0x824 0x2 0x1 +#define MX53_PAD_GPIO_3__DPLLIP1_TOG_EN 0x320 0x6b0 0x000 0x3 0x0 +#define MX53_PAD_GPIO_3__CCM_CLKO2 0x320 0x6b0 0x000 0x4 0x0 +#define MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 0x320 0x6b0 0x000 0x5 0x0 +#define MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x320 0x6b0 0x8a0 0x6 0x1 +#define MX53_PAD_GPIO_3__MLB_MLBCLK 0x320 0x6b0 0x858 0x7 0x2 +#define MX53_PAD_GPIO_6__ESAI1_SCKT 0x324 0x6b4 0x7e0 0x0 0x1 +#define MX53_PAD_GPIO_6__GPIO1_6 0x324 0x6b4 0x000 0x1 0x0 +#define MX53_PAD_GPIO_6__I2C3_SDA 0x324 0x6b4 0x828 0x2 0x1 +#define MX53_PAD_GPIO_6__CCM_CCM_OUT_0 0x324 0x6b4 0x000 0x3 0x0 +#define MX53_PAD_GPIO_6__CSU_CSU_INT_DEB 0x324 0x6b4 0x000 0x4 0x0 +#define MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1 0x324 0x6b4 0x000 0x5 0x0 +#define MX53_PAD_GPIO_6__ESDHC2_LCTL 0x324 0x6b4 0x000 0x6 0x0 +#define MX53_PAD_GPIO_6__MLB_MLBSIG 0x324 0x6b4 0x860 0x7 0x2 +#define MX53_PAD_GPIO_2__ESAI1_FST 0x328 0x6b8 0x7d0 0x0 0x1 +#define MX53_PAD_GPIO_2__GPIO1_2 0x328 0x6b8 0x000 0x1 0x0 +#define MX53_PAD_GPIO_2__KPP_ROW_6 0x328 0x6b8 0x850 0x2 0x2 +#define MX53_PAD_GPIO_2__CCM_CCM_OUT_1 0x328 0x6b8 0x000 0x3 0x0 +#define MX53_PAD_GPIO_2__CSU_CSU_ALARM_AUT_0 0x328 0x6b8 0x000 0x4 0x0 +#define MX53_PAD_GPIO_2__OBSERVE_MUX_OBSRV_INT_OUT2 0x328 0x6b8 0x000 0x5 0x0 +#define MX53_PAD_GPIO_2__ESDHC2_WP 0x328 0x6b8 0x000 0x6 0x0 +#define MX53_PAD_GPIO_2__MLB_MLBDAT 0x328 0x6b8 0x85c 0x7 0x2 +#define MX53_PAD_GPIO_4__ESAI1_HCKT 0x32c 0x6bc 0x7d8 0x0 0x1 +#define MX53_PAD_GPIO_4__GPIO1_4 0x32c 0x6bc 0x000 0x1 0x0 +#define MX53_PAD_GPIO_4__KPP_COL_7 0x32c 0x6bc 0x848 0x2 0x2 +#define MX53_PAD_GPIO_4__CCM_CCM_OUT_2 0x32c 0x6bc 0x000 0x3 0x0 +#define MX53_PAD_GPIO_4__CSU_CSU_ALARM_AUT_1 0x32c 0x6bc 0x000 0x4 0x0 +#define MX53_PAD_GPIO_4__OBSERVE_MUX_OBSRV_INT_OUT3 0x32c 0x6bc 0x000 0x5 0x0 +#define MX53_PAD_GPIO_4__ESDHC2_CD 0x32c 0x6bc 0x000 0x6 0x0 +#define MX53_PAD_GPIO_4__SCC_SEC_STATE 0x32c 0x6bc 0x000 0x7 0x0 +#define MX53_PAD_GPIO_5__ESAI1_TX2_RX3 0x330 0x6c0 0x7ec 0x0 0x1 +#define MX53_PAD_GPIO_5__GPIO1_5 0x330 0x6c0 0x000 0x1 0x0 +#define MX53_PAD_GPIO_5__KPP_ROW_7 0x330 0x6c0 0x854 0x2 0x2 +#define MX53_PAD_GPIO_5__CCM_CLKO 0x330 0x6c0 0x000 0x3 0x0 +#define MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 0x330 0x6c0 0x000 0x4 0x0 +#define MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4 0x330 0x6c0 0x000 0x5 0x0 +#define MX53_PAD_GPIO_5__I2C3_SCL 0x330 0x6c0 0x824 0x6 0x2 +#define MX53_PAD_GPIO_5__CCM_PLL1_BYP 0x330 0x6c0 0x770 0x7 0x1 +#define MX53_PAD_GPIO_7__ESAI1_TX4_RX1 0x334 0x6c4 0x7f4 0x0 0x1 +#define MX53_PAD_GPIO_7__GPIO1_7 0x334 0x6c4 0x000 0x1 0x0 +#define MX53_PAD_GPIO_7__EPIT1_EPITO 0x334 0x6c4 0x000 0x2 0x0 +#define MX53_PAD_GPIO_7__CAN1_TXCAN 0x334 0x6c4 0x000 0x3 0x0 +#define MX53_PAD_GPIO_7__UART2_TXD_MUX 0x334 0x6c4 0x000 0x4 0x0 +#define MX53_PAD_GPIO_7__FIRI_RXD 0x334 0x6c4 0x80c 0x5 0x1 +#define MX53_PAD_GPIO_7__SPDIF_PLOCK 0x334 0x6c4 0x000 0x6 0x0 +#define MX53_PAD_GPIO_7__CCM_PLL2_BYP 0x334 0x6c4 0x774 0x7 0x1 +#define MX53_PAD_GPIO_8__ESAI1_TX5_RX0 0x338 0x6c8 0x7f8 0x0 0x1 +#define MX53_PAD_GPIO_8__GPIO1_8 0x338 0x6c8 0x000 0x1 0x0 +#define MX53_PAD_GPIO_8__EPIT2_EPITO 0x338 0x6c8 0x000 0x2 0x0 +#define MX53_PAD_GPIO_8__CAN1_RXCAN 0x338 0x6c8 0x760 0x3 0x2 +#define MX53_PAD_GPIO_8__UART2_RXD_MUX 0x338 0x6c8 0x880 0x4 0x5 +#define MX53_PAD_GPIO_8__FIRI_TXD 0x338 0x6c8 0x000 0x5 0x0 +#define MX53_PAD_GPIO_8__SPDIF_SRCLK 0x338 0x6c8 0x000 0x6 0x0 +#define MX53_PAD_GPIO_8__CCM_PLL3_BYP 0x338 0x6c8 0x778 0x7 0x1 +#define MX53_PAD_GPIO_16__ESAI1_TX3_RX2 0x33c 0x6cc 0x7f0 0x0 0x1 +#define MX53_PAD_GPIO_16__GPIO7_11 0x33c 0x6cc 0x000 0x1 0x0 +#define MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT 0x33c 0x6cc 0x000 0x2 0x0 +#define MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1 0x33c 0x6cc 0x000 0x4 0x0 +#define MX53_PAD_GPIO_16__SPDIF_IN1 0x33c 0x6cc 0x870 0x5 0x1 +#define MX53_PAD_GPIO_16__I2C3_SDA 0x33c 0x6cc 0x828 0x6 0x2 +#define MX53_PAD_GPIO_16__SJC_DE_B 0x33c 0x6cc 0x000 0x7 0x0 +#define MX53_PAD_GPIO_17__ESAI1_TX0 0x340 0x6d0 0x7e4 0x0 0x1 +#define MX53_PAD_GPIO_17__GPIO7_12 0x340 0x6d0 0x000 0x1 0x0 +#define MX53_PAD_GPIO_17__SDMA_EXT_EVENT_0 0x340 0x6d0 0x868 0x2 0x1 +#define MX53_PAD_GPIO_17__GPC_PMIC_RDY 0x340 0x6d0 0x810 0x3 0x1 +#define MX53_PAD_GPIO_17__RTC_CE_RTC_FSV_TRIG 0x340 0x6d0 0x000 0x4 0x0 +#define MX53_PAD_GPIO_17__SPDIF_OUT1 0x340 0x6d0 0x000 0x5 0x0 +#define MX53_PAD_GPIO_17__IPU_SNOOP2 0x340 0x6d0 0x000 0x6 0x0 +#define MX53_PAD_GPIO_17__SJC_JTAG_ACT 0x340 0x6d0 0x000 0x7 0x0 +#define MX53_PAD_GPIO_18__ESAI1_TX1 0x344 0x6d4 0x7e8 0x0 0x1 +#define MX53_PAD_GPIO_18__GPIO7_13 0x344 0x6d4 0x000 0x1 0x0 +#define MX53_PAD_GPIO_18__SDMA_EXT_EVENT_1 0x344 0x6d4 0x86c 0x2 0x1 +#define MX53_PAD_GPIO_18__OWIRE_LINE 0x344 0x6d4 0x864 0x3 0x1 +#define MX53_PAD_GPIO_18__RTC_CE_RTC_ALARM2_TRIG 0x344 0x6d4 0x000 0x4 0x0 +#define MX53_PAD_GPIO_18__CCM_ASRC_EXT_CLK 0x344 0x6d4 0x768 0x5 0x1 +#define MX53_PAD_GPIO_18__ESDHC1_LCTL 0x344 0x6d4 0x000 0x6 0x0 +#define MX53_PAD_GPIO_18__SRC_SYSTEM_RST 0x344 0x6d4 0x000 0x7 0x0 + +#endif /* __DTS_IMX53_PINFUNC_H */ diff --git a/arch/arm/dts/imx53-qsb.dts b/arch/arm/dts/imx53-qsb.dts new file mode 100644 index 0000000000..1dfb48b216 --- /dev/null +++ b/arch/arm/dts/imx53-qsb.dts @@ -0,0 +1,314 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "imx53.dtsi" + +/ { + model = "Freescale i.MX53 Quick Start Board"; + compatible = "fsl,imx53-qsb", "fsl,imx53"; + + chosen { + linux,stdout-path = "/soc/aips@50000000/serial@53fbc000"; + }; + + memory { + reg = <0x70000000 0x40000000>; + }; + + display@di0 { + compatible = "fsl,imx-parallel-display"; + crtcs = <&ipu 0>; + interface-pix-fmt = "rgb565"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ipu_disp0_1>; + status = "disabled"; + display-timings { + claawvga { + native-mode; + clock-frequency = <27000000>; + hactive = <800>; + vactive = <480>; + hback-porch = <40>; + hfront-porch = <60>; + vback-porch = <10>; + vfront-porch = <10>; + hsync-len = <20>; + vsync-len = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + }; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + power { + label = "Power Button"; + gpios = <&gpio1 8 0>; + linux,code = <116>; /* KEY_POWER */ + gpio-key,wakeup; + }; + + volume-up { + label = "Volume Up"; + gpios = <&gpio2 14 0>; + linux,code = <115>; /* KEY_VOLUMEUP */ + }; + + volume-down { + label = "Volume Down"; + gpios = <&gpio2 15 0>; + linux,code = <114>; /* KEY_VOLUMEDOWN */ + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pin_gpio7_7>; + + user { + label = "Heartbeat"; + gpios = <&gpio7 7 0>; + linux,default-trigger = "heartbeat"; + }; + }; + + regulators { + compatible = "simple-bus"; + + reg_3p2v: 3p2v { + compatible = "regulator-fixed"; + regulator-name = "3P2V"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-always-on; + }; + }; + + sound { + compatible = "fsl,imx53-qsb-sgtl5000", + "fsl,imx-audio-sgtl5000"; + model = "imx53-qsb-sgtl5000"; + ssi-controller = <&ssi2>; + audio-codec = <&sgtl5000>; + audio-routing = + "MIC_IN", "Mic Jack", + "Mic Jack", "Mic Bias", + "Headphone Jack", "HP_OUT"; + mux-int-port = <2>; + mux-ext-port = <5>; + }; +}; + +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1_1>; + cd-gpios = <&gpio3 13 0>; + status = "okay"; +}; + +&ssi2 { + fsl,mode = "i2s-slave"; + status = "okay"; +}; + +&esdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc3_1>; + cd-gpios = <&gpio3 11 0>; + wp-gpios = <&gpio3 12 0>; + status = "okay"; +}; + +&iim { + barebox,provide-mac-address = <&fec 1 9>; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + hog { + pinctrl_hog: hoggrp { + fsl,pins = < + MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 + MX53_PAD_GPIO_8__GPIO1_8 0x80000000 + MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 + MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 + MX53_PAD_EIM_DA11__GPIO3_11 0x80000000 + MX53_PAD_EIM_DA12__GPIO3_12 0x80000000 + MX53_PAD_EIM_DA13__GPIO3_13 0x80000000 + MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 + MX53_PAD_GPIO_16__GPIO7_11 0x80000000 + >; + }; + + led_pin_gpio7_7: led_gpio7_7@0 { + fsl,pins = < + MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 + >; + }; + }; + +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_1>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2_1>; + status = "okay"; + + sgtl5000: codec@0a { + compatible = "fsl,sgtl5000"; + reg = <0x0a>; + VDDA-supply = <®_3p2v>; + VDDIO-supply = <®_3p2v>; + clocks = <&clks 150>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_1>; + status = "okay"; + + accelerometer: mma8450@1c { + compatible = "fsl,mma8450"; + reg = <0x1c>; + }; + + pmic: dialog@48 { + compatible = "dlg,da9053-aa", "dlg,da9052"; + reg = <0x48>; + interrupt-parent = <&gpio7>; + interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */ + + regulators { + buck1_reg: buck1 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + buck4_reg: buck4 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + ldo1_reg: ldo1 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo2_reg: ldo2 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo3_reg: ldo3 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo4_reg: ldo4 { + regulator-min-microvolt = <1725000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo5_reg: ldo5 { + regulator-min-microvolt = <1725000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo6_reg: ldo6 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + }; + + ldo7_reg: ldo7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + }; + + ldo8_reg: ldo8 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + }; + + ldo9_reg: ldo9 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + }; + + ldo10_reg: ldo10 { + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <3650000>; + regulator-always-on; + }; + }; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux_1>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec_1>; + phy-mode = "rmii"; + phy-reset-gpios = <&gpio7 6 0>; + status = "okay"; +}; + +&usbh1 { + status = "okay"; +}; + +&usbotg { + status = "okay"; +}; diff --git a/arch/arm/dts/imx53.dtsi b/arch/arm/dts/imx53.dtsi new file mode 100644 index 0000000000..5c8608b328 --- /dev/null +++ b/arch/arm/dts/imx53.dtsi @@ -0,0 +1,1092 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include "skeleton.dtsi" +#include "imx53-pinfunc.h" + +/ { + aliases { + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + serial3 = &uart4; + serial4 = &uart5; + gpio0 = &gpio1; + gpio1 = &gpio2; + gpio2 = &gpio3; + gpio3 = &gpio4; + gpio4 = &gpio5; + gpio5 = &gpio6; + gpio6 = &gpio7; + mmc0 = &esdhc1; + mmc1 = &esdhc2; + mmc2 = &esdhc3; + mmc3 = &esdhc4; + i2c0 = &i2c1; + i2c1 = &i2c2; + i2c2 = &i2c3; + }; + + tzic: tz-interrupt-controller@0fffc000 { + compatible = "fsl,imx53-tzic", "fsl,tzic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x0fffc000 0x4000>; + }; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + ckil { + compatible = "fsl,imx-ckil", "fixed-clock"; + clock-frequency = <32768>; + }; + + ckih1 { + compatible = "fsl,imx-ckih1", "fixed-clock"; + clock-frequency = <22579200>; + }; + + ckih2 { + compatible = "fsl,imx-ckih2", "fixed-clock"; + clock-frequency = <0>; + }; + + osc { + compatible = "fsl,imx-osc", "fixed-clock"; + clock-frequency = <24000000>; + }; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + interrupt-parent = <&tzic>; + ranges; + + ipu: ipu@18000000 { + #crtc-cells = <1>; + compatible = "fsl,imx53-ipu"; + reg = <0x18000000 0x080000000>; + interrupts = <11 10>; + clocks = <&clks 59>, <&clks 110>, <&clks 61>; + clock-names = "bus", "di0", "di1"; + resets = <&src 2>; + }; + + aips@50000000 { /* AIPS1 */ + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x50000000 0x10000000>; + ranges; + + spba@50000000 { + compatible = "fsl,spba-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x50000000 0x40000>; + ranges; + + esdhc1: esdhc@50004000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x50004000 0x4000>; + interrupts = <1>; + clocks = <&clks 44>, <&clks 0>, <&clks 71>; + clock-names = "ipg", "ahb", "per"; + bus-width = <4>; + status = "disabled"; + }; + + esdhc2: esdhc@50008000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x50008000 0x4000>; + interrupts = <2>; + clocks = <&clks 45>, <&clks 0>, <&clks 72>; + clock-names = "ipg", "ahb", "per"; + bus-width = <4>; + status = "disabled"; + }; + + uart3: serial@5000c000 { + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; + reg = <0x5000c000 0x4000>; + interrupts = <33>; + clocks = <&clks 32>, <&clks 33>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + ecspi1: ecspi@50010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; + reg = <0x50010000 0x4000>; + interrupts = <36>; + clocks = <&clks 51>, <&clks 52>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + ssi2: ssi@50014000 { + compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; + reg = <0x50014000 0x4000>; + interrupts = <30>; + clocks = <&clks 49>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */ + status = "disabled"; + }; + + esdhc3: esdhc@50020000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x50020000 0x4000>; + interrupts = <3>; + clocks = <&clks 46>, <&clks 0>, <&clks 73>; + clock-names = "ipg", "ahb", "per"; + bus-width = <4>; + status = "disabled"; + }; + + esdhc4: esdhc@50024000 { + compatible = "fsl,imx53-esdhc"; + reg = <0x50024000 0x4000>; + interrupts = <4>; + clocks = <&clks 47>, <&clks 0>, <&clks 74>; + clock-names = "ipg", "ahb", "per"; + bus-width = <4>; + status = "disabled"; + }; + }; + + usbphy0: usbphy@0 { + compatible = "usb-nop-xceiv"; + clocks = <&clks 124>; + clock-names = "main_clk"; + status = "okay"; + }; + + usbphy1: usbphy@1 { + compatible = "usb-nop-xceiv"; + clocks = <&clks 125>; + clock-names = "main_clk"; + status = "okay"; + }; + + usbotg: usb@53f80000 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80000 0x0200>; + interrupts = <18>; + clocks = <&clks 108>; + fsl,usbmisc = <&usbmisc 0>; + fsl,usbphy = <&usbphy0>; + status = "disabled"; + }; + + usbh1: usb@53f80200 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80200 0x0200>; + interrupts = <14>; + clocks = <&clks 108>; + fsl,usbmisc = <&usbmisc 1>; + fsl,usbphy = <&usbphy1>; + status = "disabled"; + }; + + usbh2: usb@53f80400 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80400 0x0200>; + interrupts = <16>; + clocks = <&clks 108>; + fsl,usbmisc = <&usbmisc 2>; + status = "disabled"; + }; + + usbh3: usb@53f80600 { + compatible = "fsl,imx53-usb", "fsl,imx27-usb"; + reg = <0x53f80600 0x0200>; + interrupts = <17>; + clocks = <&clks 108>; + fsl,usbmisc = <&usbmisc 3>; + status = "disabled"; + }; + + usbmisc: usbmisc@53f80800 { + #index-cells = <1>; + compatible = "fsl,imx53-usbmisc"; + reg = <0x53f80800 0x200>; + clocks = <&clks 108>; + }; + + gpio1: gpio@53f84000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53f84000 0x4000>; + interrupts = <50 51>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@53f88000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53f88000 0x4000>; + interrupts = <52 53>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio3: gpio@53f8c000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53f8c000 0x4000>; + interrupts = <54 55>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio4: gpio@53f90000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53f90000 0x4000>; + interrupts = <56 57>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + wdog1: wdog@53f98000 { + compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; + reg = <0x53f98000 0x4000>; + interrupts = <58>; + clocks = <&clks 0>; + }; + + wdog2: wdog@53f9c000 { + compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; + reg = <0x53f9c000 0x4000>; + interrupts = <59>; + clocks = <&clks 0>; + status = "disabled"; + }; + + gpt: timer@53fa0000 { + compatible = "fsl,imx53-gpt", "fsl,imx31-gpt"; + reg = <0x53fa0000 0x4000>; + interrupts = <39>; + clocks = <&clks 36>, <&clks 41>; + clock-names = "ipg", "per"; + }; + + iomuxc: iomuxc@53fa8000 { + compatible = "fsl,imx53-iomuxc"; + reg = <0x53fa8000 0x4000>; + + audmux { + pinctrl_audmux_1: audmuxgrp-1 { + fsl,pins = < + MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000 + MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000 + MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000 + MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000 + >; + }; + + pinctrl_audmux_2: audmuxgrp-2 { + fsl,pins = < + MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x80000000 + MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x80000000 + MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x80000000 + MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x80000000 + >; + }; + + pinctrl_audmux_3: audmuxgrp-3 { + fsl,pins = < + MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 0x80000000 + MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 0x80000000 + MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 0x80000000 + MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 0x80000000 + >; + }; + }; + + fec { + pinctrl_fec_1: fecgrp-1 { + fsl,pins = < + MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 + MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 + MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 + MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 + MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 + MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 + MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 + MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 + MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 + MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 + >; + }; + + pinctrl_fec_2: fecgrp-2 { + fsl,pins = < + MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 + MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 + MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 + MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 + MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 + MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 + MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 + MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 + MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 + MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 + MX53_PAD_KEY_ROW1__FEC_COL 0x80000000 + MX53_PAD_KEY_COL3__FEC_CRS 0x80000000 + MX53_PAD_KEY_COL2__FEC_RDATA_2 0x80000000 + MX53_PAD_KEY_COL0__FEC_RDATA_3 0x80000000 + MX53_PAD_KEY_COL1__FEC_RX_CLK 0x80000000 + MX53_PAD_KEY_ROW2__FEC_TDATA_2 0x80000000 + MX53_PAD_GPIO_19__FEC_TDATA_3 0x80000000 + MX53_PAD_KEY_ROW0__FEC_TX_ER 0x80000000 + >; + }; + }; + + csi { + pinctrl_csi_1: csigrp-1 { + fsl,pins = < + MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN 0x1d5 + MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC 0x1d5 + MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC 0x1d5 + MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1d5 + MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 0x1d5 + MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 0x1d5 + MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 0x1d5 + MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 0x1d5 + MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 0x1d5 + MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 0x1d5 + MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 0x1d5 + MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 0x1d5 + MX53_PAD_CSI0_DAT11__IPU_CSI0_D_11 0x1d5 + MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 0x1d5 + MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 0x1d5 + MX53_PAD_CSI0_DAT8__IPU_CSI0_D_8 0x1d5 + MX53_PAD_CSI0_DAT7__IPU_CSI0_D_7 0x1d5 + MX53_PAD_CSI0_DAT6__IPU_CSI0_D_6 0x1d5 + MX53_PAD_CSI0_DAT5__IPU_CSI0_D_5 0x1d5 + MX53_PAD_CSI0_DAT4__IPU_CSI0_D_4 0x1d5 + MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1d5 + >; + }; + + pinctrl_csi_2: csigrp-2 { + fsl,pins = < + MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC 0x1d5 + MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC 0x1d5 + MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK 0x1d5 + MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 0x1d5 + MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 0x1d5 + MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 0x1d5 + MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 0x1d5 + MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 0x1d5 + MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 0x1d5 + MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 0x1d5 + MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 0x1d5 + >; + }; + }; + + cspi { + pinctrl_cspi_1: cspigrp-1 { + fsl,pins = < + MX53_PAD_SD1_DATA0__CSPI_MISO 0x1d5 + MX53_PAD_SD1_CMD__CSPI_MOSI 0x1d5 + MX53_PAD_SD1_CLK__CSPI_SCLK 0x1d5 + >; + }; + + pinctrl_cspi_2: cspigrp-2 { + fsl,pins = < + MX53_PAD_EIM_D22__CSPI_MISO 0x1d5 + MX53_PAD_EIM_D28__CSPI_MOSI 0x1d5 + MX53_PAD_EIM_D21__CSPI_SCLK 0x1d5 + >; + }; + }; + + ecspi1 { + pinctrl_ecspi1_1: ecspi1grp-1 { + fsl,pins = < + MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000 + MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000 + MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000 + >; + }; + + pinctrl_ecspi1_2: ecspi1grp-2 { + fsl,pins = < + MX53_PAD_GPIO_19__ECSPI1_RDY 0x80000000 + MX53_PAD_EIM_EB2__ECSPI1_SS0 0x80000000 + MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000 + MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000 + MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000 + MX53_PAD_EIM_D19__ECSPI1_SS1 0x80000000 + >; + }; + }; + + ecspi2 { + pinctrl_ecspi2_1: ecspi2grp-1 { + fsl,pins = < + MX53_PAD_EIM_OE__ECSPI2_MISO 0x80000000 + MX53_PAD_EIM_CS1__ECSPI2_MOSI 0x80000000 + MX53_PAD_EIM_CS0__ECSPI2_SCLK 0x80000000 + >; + }; + }; + + esdhc1 { + pinctrl_esdhc1_1: esdhc1grp-1 { + fsl,pins = < + MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 + MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 + MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 + MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 + MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 + MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 + >; + }; + + pinctrl_esdhc1_2: esdhc1grp-2 { + fsl,pins = < + MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 + MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 + MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 + MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 + MX53_PAD_PATA_DATA8__ESDHC1_DAT4 0x1d5 + MX53_PAD_PATA_DATA9__ESDHC1_DAT5 0x1d5 + MX53_PAD_PATA_DATA10__ESDHC1_DAT6 0x1d5 + MX53_PAD_PATA_DATA11__ESDHC1_DAT7 0x1d5 + MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 + MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 + >; + }; + }; + + esdhc2 { + pinctrl_esdhc2_1: esdhc2grp-1 { + fsl,pins = < + MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5 + MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5 + MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5 + MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5 + MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5 + MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5 + >; + }; + }; + + esdhc3 { + pinctrl_esdhc3_1: esdhc3grp-1 { + fsl,pins = < + MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 + MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 + MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 + MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 + MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 + MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 + MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 + MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 + MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 + MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 + >; + }; + }; + + can1 { + pinctrl_can1_1: can1grp-1 { + fsl,pins = < + MX53_PAD_PATA_INTRQ__CAN1_TXCAN 0x80000000 + MX53_PAD_PATA_DIOR__CAN1_RXCAN 0x80000000 + >; + }; + + pinctrl_can1_2: can1grp-2 { + fsl,pins = < + MX53_PAD_KEY_COL2__CAN1_TXCAN 0x80000000 + MX53_PAD_KEY_ROW2__CAN1_RXCAN 0x80000000 + >; + }; + + pinctrl_can1_3: can1grp-3 { + fsl,pins = < + MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000 + MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000 + >; + }; + }; + + can2 { + pinctrl_can2_1: can2grp-1 { + fsl,pins = < + MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000 + MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000 + >; + }; + }; + + i2c1 { + pinctrl_i2c1_1: i2c1grp-1 { + fsl,pins = < + MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000 + MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000 + >; + }; + + pinctrl_i2c1_2: i2c1grp-2 { + fsl,pins = < + MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000 + MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000 + >; + }; + }; + + i2c2 { + pinctrl_i2c2_1: i2c2grp-1 { + fsl,pins = < + MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 + MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 + >; + }; + + pinctrl_i2c2_2: i2c2grp-2 { + fsl,pins = < + MX53_PAD_EIM_D16__I2C2_SDA 0xc0000000 + MX53_PAD_EIM_EB2__I2C2_SCL 0xc0000000 + >; + }; + }; + + i2c3 { + pinctrl_i2c3_1: i2c3grp-1 { + fsl,pins = < + MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000 + MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000 + >; + }; + }; + + ipu_disp0 { + pinctrl_ipu_disp0_1: ipudisp0grp-1 { + fsl,pins = < + MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5 + MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 + MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 + MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 + MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 + MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 + MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 + MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 + MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 + MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 + MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5 + MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5 + MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5 + MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5 + MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5 + MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5 + MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5 + MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5 + MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5 + MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5 + MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5 + MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5 + MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5 + MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5 + MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5 + MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5 + MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5 + MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5 + >; + }; + }; + + ipu_disp1 { + pinctrl_ipu_disp1_1: ipudisp1grp-1 { + fsl,pins = < + MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x5 + MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x5 + MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x5 + MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x5 + MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x5 + MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x5 + MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x5 + MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x5 + MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x5 + MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x5 + MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x5 + MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x5 + MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x5 + MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x5 + MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x5 + MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x5 + MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x5 + MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x5 + MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x5 + MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x5 + MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x5 + MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x5 + MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x5 + MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x5 + MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x5 + MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x5 + MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x5 + MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x5 + MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x5 + MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x5 + MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x5 + MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x5 + >; + }; + }; + + ipu_disp2 { + pinctrl_ipu_disp2_1: ipudisp2grp-1 { + fsl,pins = < + MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000 + MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000 + MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000 + MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000 + MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000 + MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000 + MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000 + MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000 + MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000 + MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000 + >; + }; + }; + + nand { + pinctrl_nand_1: nandgrp-1 { + fsl,pins = < + MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4 + MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4 + MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4 + MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4 + MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0 + MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0 + MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4 + MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 0xa4 + MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 0xa4 + MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 0xa4 + MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 0xa4 + MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 0xa4 + MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 0xa4 + MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 0xa4 + MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 0xa4 + >; + }; + }; + + owire { + pinctrl_owire_1: owiregrp-1 { + fsl,pins = < + MX53_PAD_GPIO_18__OWIRE_LINE 0x80000000 + >; + }; + }; + + pwm1 { + pinctrl_pwm1_1: pwm1grp-1 { + fsl,pins = < + MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x5 + >; + }; + }; + + pwm2 { + pinctrl_pwm2_1: pwm2grp-1 { + fsl,pins = < + MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000 + >; + }; + }; + + uart1 { + pinctrl_uart1_1: uart1grp-1 { + fsl,pins = < + MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1c5 + MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1c5 + >; + }; + + pinctrl_uart1_2: uart1grp-2 { + fsl,pins = < + MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1c5 + MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1c5 + >; + }; + + pinctrl_uart1_3: uart1grp-3 { + fsl,pins = < + MX53_PAD_PATA_RESET_B__UART1_CTS 0x1c5 + MX53_PAD_PATA_IORDY__UART1_RTS 0x1c5 + >; + }; + }; + + uart2 { + pinctrl_uart2_1: uart2grp-1 { + fsl,pins = < + MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5 + MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5 + >; + }; + + pinctrl_uart2_2: uart2grp-2 { + fsl,pins = < + MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5 + MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5 + MX53_PAD_PATA_DIOR__UART2_RTS 0x1c5 + MX53_PAD_PATA_INTRQ__UART2_CTS 0x1c5 + >; + }; + }; + + uart3 { + pinctrl_uart3_1: uart3grp-1 { + fsl,pins = < + MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5 + MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5 + MX53_PAD_PATA_DA_1__UART3_CTS 0x1c5 + MX53_PAD_PATA_DA_2__UART3_RTS 0x1c5 + >; + }; + + pinctrl_uart3_2: uart3grp-2 { + fsl,pins = < + MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5 + MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5 + >; + }; + + }; + + uart4 { + pinctrl_uart4_1: uart4grp-1 { + fsl,pins = < + MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1c5 + MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1c5 + >; + }; + }; + + uart5 { + pinctrl_uart5_1: uart5grp-1 { + fsl,pins = < + MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1c5 + MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1c5 + >; + }; + }; + }; + + gpr: iomuxc-gpr@53fa8000 { + compatible = "fsl,imx53-iomuxc-gpr", "syscon"; + reg = <0x53fa8000 0xc>; + }; + + ldb: ldb@53fa8008 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ldb"; + reg = <0x53fa8008 0x4>; + gpr = <&gpr>; + clocks = <&clks 122>, <&clks 120>, + <&clks 115>, <&clks 116>, + <&clks 123>, <&clks 85>; + clock-names = "di0_pll", "di1_pll", + "di0_sel", "di1_sel", + "di0", "di1"; + status = "disabled"; + + lvds-channel@0 { + reg = <0>; + crtcs = <&ipu 0>; + status = "disabled"; + }; + + lvds-channel@1 { + reg = <1>; + crtcs = <&ipu 1>; + status = "disabled"; + }; + }; + + pwm1: pwm@53fb4000 { + #pwm-cells = <2>; + compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; + reg = <0x53fb4000 0x4000>; + clocks = <&clks 37>, <&clks 38>; + clock-names = "ipg", "per"; + interrupts = <61>; + }; + + pwm2: pwm@53fb8000 { + #pwm-cells = <2>; + compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; + reg = <0x53fb8000 0x4000>; + clocks = <&clks 39>, <&clks 40>; + clock-names = "ipg", "per"; + interrupts = <94>; + }; + + uart1: serial@53fbc000 { + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; + reg = <0x53fbc000 0x4000>; + interrupts = <31>; + clocks = <&clks 28>, <&clks 29>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + uart2: serial@53fc0000 { + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; + reg = <0x53fc0000 0x4000>; + interrupts = <32>; + clocks = <&clks 30>, <&clks 31>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + can1: can@53fc8000 { + compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; + reg = <0x53fc8000 0x4000>; + interrupts = <82>; + clocks = <&clks 158>, <&clks 157>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + can2: can@53fcc000 { + compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; + reg = <0x53fcc000 0x4000>; + interrupts = <83>; + clocks = <&clks 87>, <&clks 86>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + src: src@53fd0000 { + compatible = "fsl,imx53-src", "fsl,imx51-src"; + reg = <0x53fd0000 0x4000>; + #reset-cells = <1>; + }; + + clks: ccm@53fd4000{ + compatible = "fsl,imx53-ccm"; + reg = <0x53fd4000 0x4000>; + interrupts = <0 71 0x04 0 72 0x04>; + #clock-cells = <1>; + }; + + gpio5: gpio@53fdc000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53fdc000 0x4000>; + interrupts = <103 104>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio6: gpio@53fe0000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53fe0000 0x4000>; + interrupts = <105 106>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio7: gpio@53fe4000 { + compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; + reg = <0x53fe4000 0x4000>; + interrupts = <107 108>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + i2c3: i2c@53fec000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + reg = <0x53fec000 0x4000>; + interrupts = <64>; + clocks = <&clks 88>; + status = "disabled"; + }; + + uart4: serial@53ff0000 { + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; + reg = <0x53ff0000 0x4000>; + interrupts = <13>; + clocks = <&clks 65>, <&clks 66>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + }; + + aips@60000000 { /* AIPS2 */ + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x60000000 0x10000000>; + ranges; + + iim: iim@63f98000 { + compatible = "fsl,imx53-iim", "fsl,imx-iim"; + reg = <0x63f98000 0x4000>; + interrupts = <69>; + clocks = <&clks 107>; + }; + + uart5: serial@63f90000 { + compatible = "fsl,imx53-uart", "fsl,imx21-uart"; + reg = <0x63f90000 0x4000>; + interrupts = <86>; + clocks = <&clks 67>, <&clks 68>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + owire: owire@63fa4000 { + compatible = "fsl,imx53-owire", "fsl,imx21-owire"; + reg = <0x63fa4000 0x4000>; + clocks = <&clks 159>; + status = "disabled"; + }; + + ecspi2: ecspi@63fac000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; + reg = <0x63fac000 0x4000>; + interrupts = <37>; + clocks = <&clks 53>, <&clks 54>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + sdma: sdma@63fb0000 { + compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; + reg = <0x63fb0000 0x4000>; + interrupts = <6>; + clocks = <&clks 56>, <&clks 56>; + clock-names = "ipg", "ahb"; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; + }; + + cspi: cspi@63fc0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; + reg = <0x63fc0000 0x4000>; + interrupts = <38>; + clocks = <&clks 55>, <&clks 55>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + i2c2: i2c@63fc4000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + reg = <0x63fc4000 0x4000>; + interrupts = <63>; + clocks = <&clks 35>; + status = "disabled"; + }; + + i2c1: i2c@63fc8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; + reg = <0x63fc8000 0x4000>; + interrupts = <62>; + clocks = <&clks 34>; + status = "disabled"; + }; + + ssi1: ssi@63fcc000 { + compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; + reg = <0x63fcc000 0x4000>; + interrupts = <29>; + clocks = <&clks 48>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <29 28 27 26>; /* TX0 RX0 TX1 RX1 */ + status = "disabled"; + }; + + audmux: audmux@63fd0000 { + compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; + reg = <0x63fd0000 0x4000>; + status = "disabled"; + }; + + nfc: nand@63fdb000 { + compatible = "fsl,imx53-nand"; + reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; + interrupts = <8>; + clocks = <&clks 60>; + status = "disabled"; + }; + + ssi3: ssi@63fe8000 { + compatible = "fsl,imx53-ssi", "fsl,imx21-ssi"; + reg = <0x63fe8000 0x4000>; + interrupts = <96>; + clocks = <&clks 50>; + fsl,fifo-depth = <15>; + fsl,ssi-dma-events = <47 46 45 44>; /* TX0 RX0 TX1 RX1 */ + status = "disabled"; + }; + + fec: ethernet@63fec000 { + compatible = "fsl,imx53-fec", "fsl,imx25-fec"; + reg = <0x63fec000 0x4000>; + interrupts = <87>; + clocks = <&clks 42>, <&clks 42>, <&clks 42>; + clock-names = "ipg", "ahb", "ptp"; + status = "disabled"; + }; + + tve: tve@63ff0000 { + compatible = "fsl,imx53-tve"; + reg = <0x63ff0000 0x1000>; + interrupts = <92>; + clocks = <&clks 69>, <&clks 116>; + clock-names = "tve", "di_sel"; + crtcs = <&ipu 1>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm/dts/imx6q-dmo-realq7.dts b/arch/arm/dts/imx6q-dmo-realq7.dts new file mode 100644 index 0000000000..a33a700548 --- /dev/null +++ b/arch/arm/dts/imx6q-dmo-realq7.dts @@ -0,0 +1,354 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ +/dts-v1/; + +#include "imx6q.dtsi" + +/ { + model = "Data Modul RealQ7 Board"; + compatible = "dmo,imx6q-realq7", "fsl,imx6q"; + + chosen { + linux,stdout-path = "/soc/aips-bus@02100000/serial@021e8000"; + }; + + aliases { + stmpe0 = &stmpe_1; + stmpe1 = &stmpe_2; + gpio7 = &stmpe_gpio_1; + gpio8 = &stmpe_gpio_2; + }; + + memory { + reg = <0x10000000 0x80000000>; + }; + + di0 { + compatible = "fsl,imx-parallel-display"; + interface-pix-fmt = "rgb24"; + crtcs = <&ipu1 0>; + }; + + regulators { + compatible = "simple-bus"; + + reg_2p5v: 2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + reg_3p3v: 3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_otg_vbus: usb_otg_vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio7 12 0>; + }; + + reg_usb_host1: usb_host1_en { + compatible = "regulator-fixed"; + regulator-name = "usb_host1_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 31 0>; + enable-active-high; + }; + }; +}; + +&ecspi5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi_5_1>; + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio1 12 0>; + status = "okay"; + + flash: m25p80@0 { + compatible = "m25p80"; + spi-max-frequency = <40000000>; + reg = <0>; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet_1>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio3 23 0>; + status = "okay"; +}; + +&i2c2 { + status = "okay"; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2 + &pinctrl_stmpe_1_1 + &pinctrl_stmpe_2_1>; + + stmpe_1: stmpe1601@40 { + compatible = "stmpe1601"; + reg = <0x40>; + interrupts = <30 0>; + interrupt-parent = <&gpio3>; + stmpe_gpio_1: stmpe_gpio { + compatible = "st,stmpe-gpio"; + }; + }; + + stmpe_2: stmpe1601@44 { + compatible = "stmpe1601"; + reg = <0x44>; + interrupts = <2 0>; + interrupt-parent = <&gpio5>; + stmpe_gpio_2: stmpe_gpio { + compatible = "st,stmpe-gpio"; + }; + }; + + temp1: ad7414@4c { + compatible = "ad7414"; + reg = <0x4c>; + }; + + temp2: ad7414@4d { + compatible = "ad7414"; + reg = <0x4d>; + }; + + rtc: m41t62@68 { + compatible = "m41t62"; + reg = <0x68>; + }; + + pmic: pf0100@08 { + compatible = "pf0100-regulator"; + reg = <0x08>; + interrupt-parent = <&gpio3>; + interrupts = <20 8>; + + regulators { + reg_vddcore: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-always-on; + }; + + reg_vddsoc: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-always-on; + }; + + reg_gen_3v3: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_ddr_1v5a: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_ddr_1v5b: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_ddr_vtt: sw4 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-always-on; + }; + + reg_5v_600mA: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + regulator-always-on; + }; + + reg_snvs_3v: vsnvs { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + }; + + reg_vrefddr: vrefddr { + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-always-on; + }; + + reg_vgen1_1v5: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + /* not used */ + }; + + reg_vgen2_1v2_eth: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-always-on; + }; + + reg_vgen3_2v8: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen4_1v8: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen5_1v8_eth: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_vgen6_3v3: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>, <&pinctrl_pfuze_1>; + + hog { + pinctrl_hog: hoggrp-1 { + fsl,pins = < + MX6Q_PAD_EIM_A16__GPIO2_IO22 0x80000000 + MX6Q_PAD_EIM_A17__GPIO2_IO21 0x80000000 + >; + }; + }; + + i2c2 { + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6Q_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 + MX6Q_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + }; + + uart { + pinctrl_uart1_2: uart1grp-2 { + fsl,pins = < + MX6Q_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 + MX6Q_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 + >; + }; + }; + + pfuze { + pinctrl_pfuze_1: pfuze100grp1 { + fsl,pins = < + MX6Q_PAD_EIM_D20__GPIO3_IO20 0x198c0 + >; + }; + }; + + stmpe_1 { + pinctrl_stmpe_1_1: stmpe1grp-1 { + fsl,pins = < + MX6Q_PAD_EIM_D30__GPIO3_IO30 0x80000000 + >; + }; + }; + + stmpe_2 { + pinctrl_stmpe_2_1: stmpe2grp-1 { + fsl,pins = < + MX6Q_PAD_EIM_A25__GPIO5_IO02 0x80000000 + >; + }; + }; + + ecspi5 { + pinctrl_ecspi_5_1: ecspi5rp-1 { + fsl,pins = < + MX6Q_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000 + MX6Q_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000 + MX6Q_PAD_SD2_DAT3__GPIO1_IO12 0x80000000 /* cs0: m25p80 */ + >; + }; + }; +}; + +&sata { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_2>; + status = "okay"; +}; + +&uart2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2_1>; +}; + +&usbh1 { + vbus-supply = <®_usb_host1>; + status = "okay"; + disable-over-current; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg_1>; + disable-over-current; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3_2>; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4_1>; + vmmc-supply = <®_3p3v>; + non-removable; + bus-width = <8>; + status = "okay"; +}; diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi index b6360027b3..86084bed8b 100644 --- a/arch/arm/dts/imx6qdl.dtsi +++ b/arch/arm/dts/imx6qdl.dtsi @@ -827,6 +827,16 @@ }; }; + sata: sata@02200000 { + compatible = "fsl,imx6q-ahci"; + reg = <0x02200000 0x4000>; + interrupts = <0 39 0x04>; + clocks = <&clks 154 &clks 105 &clks 187>; + clock-names = "ipg", "ahb", "per"; + gprreg = <&gpr>; + status = "disabled"; + }; + ipu1: ipu@02400000 { #crtc-cells = <1>; compatible = "fsl,imx6q-ipu"; diff --git a/arch/arm/include/asm/barebox-arm-head.h b/arch/arm/include/asm/barebox-arm-head.h index 9a8cc87716..af7164a2eb 100644 --- a/arch/arm/include/asm/barebox-arm-head.h +++ b/arch/arm/include/asm/barebox-arm-head.h @@ -43,7 +43,7 @@ static inline void arm_cpu_lowlevel_init(void) #ifdef CONFIG_HAVE_MACH_ARM_HEAD #include <mach/barebox-arm-head.h> #else -static inline void barebox_arm_head(void) +static inline void __barebox_arm_head(void) { __asm__ __volatile__ ( #ifdef CONFIG_THUMB2_BAREBOX @@ -52,12 +52,12 @@ static inline void barebox_arm_head(void) "bx r9\n" ".thumb\n" "1:\n" - "bl barebox_arm_reset_vector\n" + "bl 2f\n" ".rept 10\n" "1: b 1b\n" ".endr\n" #else - "b barebox_arm_reset_vector\n" + "b 2f\n" "1: b 1b\n" "1: b 1b\n" "1: b 1b\n" @@ -74,6 +74,14 @@ static inline void barebox_arm_head(void) ".rept 8\n" ".word 0x55555555\n" ".endr\n" + "2:\n" + ); +} +static inline void barebox_arm_head(void) +{ + __barebox_arm_head(); + __asm__ __volatile__ ( + "b barebox_arm_reset_vector\n" ); } #endif diff --git a/arch/arm/include/asm/barebox-arm.h b/arch/arm/include/asm/barebox-arm.h index cd8decfccd..622bd13622 100644 --- a/arch/arm/include/asm/barebox-arm.h +++ b/arch/arm/include/asm/barebox-arm.h @@ -54,6 +54,8 @@ static inline void arm_fixup_vectors(void) } #endif +void *barebox_arm_boot_dtb(void); + /* * For relocatable binaries find a suitable start address for the * relocated binary. Beginning at the memory end substract the reserved @@ -77,4 +79,8 @@ static inline unsigned long arm_barebox_image_place(unsigned long endmem) return endmem; } +#define ENTRY_FUNCTION(name) \ + void __naked __section(.text_head_entry_##name) \ + name + #endif /* _BAREBOX_ARM_H_ */ diff --git a/arch/arm/pbl/zbarebox.lds.S b/arch/arm/lib/pbl.lds.S index 6b23bbe79c..1eae8298ee 100644 --- a/arch/arm/pbl/zbarebox.lds.S +++ b/arch/arm/lib/pbl.lds.S @@ -26,7 +26,6 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) -ENTRY(pbl_start) SECTIONS { #ifdef CONFIG_PBL_RELOCATABLE @@ -87,6 +86,12 @@ SECTIONS } __piggydata_end = .; - _barebox_image_size = __piggydata_end - (TEXT_BASE - SZ_2M); + . = ALIGN(4); + .image_end : { + KEEP(*(.image_end)) + } + __image_end = .; + + _barebox_image_size = __image_end - (TEXT_BASE - SZ_2M); _barebox_pbl_size = __bss_start - (TEXT_BASE - SZ_2M); } diff --git a/arch/arm/lib/runtime-offset.S b/arch/arm/lib/runtime-offset.S index 15bf4149b7..f10c4c8469 100644 --- a/arch/arm/lib/runtime-offset.S +++ b/arch/arm/lib/runtime-offset.S @@ -42,6 +42,9 @@ ld_var_entry __dynsym_end ld_var_entry _barebox_image_size ld_var_entry __bss_start ld_var_entry __bss_stop +#ifdef __PBL__ +ld_var_entry __image_end +#endif 1: ldr r1, =__ld_var_base diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index b13fa99ba9..b80e88564d 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -67,6 +67,7 @@ config BOARDINFO choice prompt "Select boot mode" depends on !ARCH_IMX_INTERNAL_BOOT_USE_IMXIMAGE + depends on !HAVE_PBL_MULTI_IMAGES help i.MX processors support two different boot modes. With the internal boot mode the boot medium contains a header describing the image to @@ -329,6 +330,7 @@ config MACH_PCM038 select DRIVER_SPI_IMX select MFD_MC13XXX select HAVE_DEFAULT_ENVIRONMENT_NEW + select HAVE_PBL_MULTI_IMAGES help Say Y here if you are using Phytec's phyCORE-i.MX27 (pcm038) equipped with a Freescale i.MX27 Processor @@ -527,6 +529,7 @@ config MACH_SABRESD config MACH_REALQ7 bool "DataModul i.MX6Q Real Qseven Board" + select ARCH_IMX_INTERNAL_BOOT_USE_IMXIMAGE select HAVE_DEFAULT_ENVIRONMENT_NEW endchoice diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 72125e775b..db74d4e51a 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_IMX27) += imx27.o clk-imx27.o obj-$(CONFIG_ARCH_IMX31) += imx31.o clk-imx31.o obj-$(CONFIG_ARCH_IMX35) += imx35.o clk-imx35.o obj-$(CONFIG_ARCH_IMX51) += imx51.o imx5.o clk-imx5.o +pbl-$(CONFIG_ARCH_IMX51) += imx51.o imx5.o obj-$(CONFIG_ARCH_IMX53) += imx53.o imx5.o clk-imx5.o esdctl-v4.o pbl-$(CONFIG_ARCH_IMX53) += imx53.o imx5.o esdctl-v4.o obj-$(CONFIG_ARCH_IMX6) += imx6.o usb-imx6.o clk-imx6.o diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c index 0d04a92f36..6fcd6fa074 100644 --- a/arch/arm/mach-imx/clk-imx1.c +++ b/arch/arm/mach-imx/clk-imx1.c @@ -114,4 +114,4 @@ static int imx1_ccm_init(void) { return platform_driver_register(&imx1_ccm_driver); } -postcore_initcall(imx1_ccm_init); +core_initcall(imx1_ccm_init); diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c index 6e91424638..295ef3aeed 100644 --- a/arch/arm/mach-imx/clk-imx21.c +++ b/arch/arm/mach-imx/clk-imx21.c @@ -189,4 +189,4 @@ static int imx21_ccm_init(void) { return platform_driver_register(&imx21_ccm_driver); } -postcore_initcall(imx21_ccm_init); +core_initcall(imx21_ccm_init); diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index 95b105dc46..9817990667 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -174,4 +174,4 @@ static int imx25_ccm_init(void) { return platform_driver_register(&imx25_ccm_driver); } -postcore_initcall(imx25_ccm_init); +core_initcall(imx25_ccm_init); diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index e221928a3b..6fd3cd6fc8 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -229,4 +229,4 @@ static int imx27_ccm_init(void) { return platform_driver_register(&imx27_ccm_driver); } -postcore_initcall(imx27_ccm_init); +core_initcall(imx27_ccm_init); diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c index aa1b652ddd..4935595355 100644 --- a/arch/arm/mach-imx/clk-imx31.c +++ b/arch/arm/mach-imx/clk-imx31.c @@ -139,4 +139,4 @@ static int imx31_ccm_init(void) { return platform_driver_register(&imx31_ccm_driver); } -postcore_initcall(imx31_ccm_init); +core_initcall(imx31_ccm_init); diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index f50c07d30f..6ea4577478 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -192,4 +192,4 @@ static int imx35_ccm_init(void) { return platform_driver_register(&imx35_ccm_driver); } -postcore_initcall(imx35_ccm_init); +core_initcall(imx35_ccm_init); diff --git a/arch/arm/mach-imx/clk-imx5.c b/arch/arm/mach-imx/clk-imx5.c index 8b5bffd6c6..8c7ed1cbe5 100644 --- a/arch/arm/mach-imx/clk-imx5.c +++ b/arch/arm/mach-imx/clk-imx5.c @@ -253,7 +253,7 @@ static int imx51_ccm_init(void) { return platform_driver_register(&imx51_ccm_driver); } -postcore_initcall(imx51_ccm_init); +core_initcall(imx51_ccm_init); #endif #ifdef CONFIG_ARCH_IMX53 @@ -316,5 +316,5 @@ static int imx53_ccm_init(void) { return platform_driver_register(&imx53_ccm_driver); } -postcore_initcall(imx53_ccm_init); +core_initcall(imx53_ccm_init); #endif diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-imx/clk-imx6.c index 5c84df264a..3061779f1a 100644 --- a/arch/arm/mach-imx/clk-imx6.c +++ b/arch/arm/mach-imx/clk-imx6.c @@ -337,4 +337,4 @@ static int imx6_ccm_init(void) { return platform_driver_register(&imx6_ccm_driver); } -postcore_initcall(imx6_ccm_init); +core_initcall(imx6_ccm_init); diff --git a/arch/arm/mach-imx/clocksource.c b/arch/arm/mach-imx/clocksource.c index e18685ec29..c04af630c3 100644 --- a/arch/arm/mach-imx/clocksource.c +++ b/arch/arm/mach-imx/clocksource.c @@ -165,4 +165,4 @@ static int imx_gpt_init(void) { return platform_driver_register(&imx_gpt_driver); } -coredevice_initcall(imx_gpt_init); +postcore_initcall(imx_gpt_init); diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c index d36f3d9443..be44339f7d 100644 --- a/arch/arm/mach-imx/imx.c +++ b/arch/arm/mach-imx/imx.c @@ -12,7 +12,9 @@ */ #include <common.h> +#include <init.h> #include <mach/revision.h> +#include <mach/generic.h> static int __imx_silicon_revision = IMX_CHIP_REV_UNKNOWN; @@ -29,3 +31,92 @@ void imx_set_silicon_revision(const char *soc, int revision) (revision >> 4) & 0xf, revision & 0xf); } + +unsigned int __imx_cpu_type; + +static int imx_soc_from_dt(void) +{ + if (of_machine_is_compatible("fsl,imx1")) + return IMX_CPU_IMX1; + if (of_machine_is_compatible("fsl,imx21")) + return IMX_CPU_IMX21; + if (of_machine_is_compatible("fsl,imx25")) + return IMX_CPU_IMX25; + if (of_machine_is_compatible("fsl,imx27")) + return IMX_CPU_IMX27; + if (of_machine_is_compatible("fsl,imx31")) + return IMX_CPU_IMX31; + if (of_machine_is_compatible("fsl,imx35")) + return IMX_CPU_IMX35; + if (of_machine_is_compatible("fsl,imx51")) + return IMX_CPU_IMX51; + if (of_machine_is_compatible("fsl,imx53")) + return IMX_CPU_IMX53; + if (of_machine_is_compatible("fsl,imx6q")) + return IMX_CPU_IMX6; + if (of_machine_is_compatible("fsl,imx6dl")) + return IMX_CPU_IMX6; + + return 0; +} + +static int imx_init(void) +{ + int ret; + struct device_node *root; + + root = of_get_root_node(); + if (root) { + __imx_cpu_type = imx_soc_from_dt(); + if (!__imx_cpu_type) + hang(); + } + + if (cpu_is_mx1()) + ret = imx1_init(); + else if (cpu_is_mx21()) + ret = imx21_init(); + else if (cpu_is_mx25()) + ret = imx25_init(); + else if (cpu_is_mx27()) + ret = imx27_init(); + else if (cpu_is_mx31()) + ret = imx31_init(); + else if (cpu_is_mx35()) + ret = imx35_init(); + else if (cpu_is_mx51()) + ret = imx51_init(); + else if (cpu_is_mx53()) + ret = imx53_init(); + else if (cpu_is_mx6()) + ret = imx6_init(); + else + return -EINVAL; + + if (root) + return ret; + + if (cpu_is_mx1()) + ret = imx1_devices_init(); + else if (cpu_is_mx21()) + ret = imx21_devices_init(); + else if (cpu_is_mx25()) + ret = imx25_devices_init(); + else if (cpu_is_mx27()) + ret = imx27_devices_init(); + else if (cpu_is_mx31()) + ret = imx31_devices_init(); + else if (cpu_is_mx35()) + ret = imx35_devices_init(); + else if (cpu_is_mx51()) + ret = imx51_devices_init(); + else if (cpu_is_mx53()) + ret = imx53_devices_init(); + else if (cpu_is_mx6()) + ret = imx6_devices_init(); + else + return -EINVAL; + + return ret; +} +postcore_initcall(imx_init); diff --git a/arch/arm/mach-imx/imx1.c b/arch/arm/mach-imx/imx1.c index 588ac02c9c..ecd71b865c 100644 --- a/arch/arm/mach-imx/imx1.c +++ b/arch/arm/mach-imx/imx1.c @@ -17,6 +17,7 @@ #include <mach/imx1-regs.h> #include <mach/weim.h> #include <mach/iomux-v1.h> +#include <mach/generic.h> #include <reset_source.h> #define MX1_RSR MX1_SCM_BASE_ADDR @@ -51,11 +52,17 @@ void imx1_setup_eimcs(size_t cs, unsigned upper, unsigned lower) #include <mach/esdctl.h> -static int imx1_init(void) +int imx1_init(void) { - imx_iomuxv1_init((void *)MX1_GPIO1_BASE_ADDR); imx1_detect_reset_source(); + return 0; +} + +int imx1_devices_init(void) +{ + imx_iomuxv1_init((void *)MX1_GPIO1_BASE_ADDR); + add_generic_device("imx1-ccm", 0, NULL, MX1_CCM_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL); add_generic_device("imx1-gpt", 0, NULL, MX1_TIM1_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL); add_generic_device("imx1-gpio", 0, NULL, MX1_GPIO1_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL); @@ -67,4 +74,3 @@ static int imx1_init(void) return 0; } -postcore_initcall(imx1_init); diff --git a/arch/arm/mach-imx/imx21.c b/arch/arm/mach-imx/imx21.c index 91cd4bde48..ca074dd4c4 100644 --- a/arch/arm/mach-imx/imx21.c +++ b/arch/arm/mach-imx/imx21.c @@ -17,6 +17,7 @@ #include <mach/imx21-regs.h> #include <mach/weim.h> #include <mach/iomux-v1.h> +#include <mach/generic.h> void imx21_setup_eimcs(size_t cs, unsigned upper, unsigned lower) { @@ -24,7 +25,12 @@ void imx21_setup_eimcs(size_t cs, unsigned upper, unsigned lower) writel(lower, MX21_EIM_BASE_ADDR + 4 + cs * 8); } -static int imx21_init(void) +int imx21_init(void) +{ + return 0; +} + +int imx21_devices_init(void) { imx_iomuxv1_init((void *)MX21_GPIO1_BASE_ADDR); @@ -40,4 +46,3 @@ static int imx21_init(void) return 0; } -postcore_initcall(imx21_init); diff --git a/arch/arm/mach-imx/imx25.c b/arch/arm/mach-imx/imx25.c index 63e91a51f0..1d944199e5 100644 --- a/arch/arm/mach-imx/imx25.c +++ b/arch/arm/mach-imx/imx25.c @@ -53,10 +53,15 @@ u64 imx_uid(void) return uid; } -static int imx25_init(void) +int imx25_init(void) { imx25_boot_save_loc((void *)MX25_CCM_BASE_ADDR); + return 0; +} + +int imx25_devices_init(void) +{ add_generic_device("imx_iim", 0, NULL, MX25_IIM_BASE_ADDR, SZ_4K, IORESOURCE_MEM, NULL); @@ -72,4 +77,3 @@ static int imx25_init(void) return 0; } -postcore_initcall(imx25_init); diff --git a/arch/arm/mach-imx/imx27.c b/arch/arm/mach-imx/imx27.c index 45436be889..e0f4765da3 100644 --- a/arch/arm/mach-imx/imx27.c +++ b/arch/arm/mach-imx/imx27.c @@ -20,6 +20,7 @@ #include <mach/generic.h> #include <init.h> #include <io.h> +#include <mach/generic.h> static int imx27_silicon_revision(void) { @@ -96,11 +97,16 @@ static void imx27_init_max(void) writel(val, max_base + MAX_SLAVE_PORT2_OFFSET + MAX_SLAVE_AMPR_OFFSET); } -static int imx27_init(void) +int imx27_init(void) { imx27_silicon_revision(); imx27_boot_save_loc((void *)MX27_SYSCTRL_BASE_ADDR); + return 0; +} + +int imx27_devices_init(void) +{ imx_iomuxv1_init((void *)MX27_GPIO1_BASE_ADDR); add_generic_device("imx_iim", DEVICE_ID_SINGLE, NULL, @@ -124,4 +130,3 @@ static int imx27_init(void) return 0; } -postcore_initcall(imx27_init); diff --git a/arch/arm/mach-imx/imx31.c b/arch/arm/mach-imx/imx31.c index f0954b5d54..eb0c4150e7 100644 --- a/arch/arm/mach-imx/imx31.c +++ b/arch/arm/mach-imx/imx31.c @@ -17,6 +17,7 @@ #include <io.h> #include <mach/imx31-regs.h> #include <mach/weim.h> +#include <mach/generic.h> void imx31_setup_weimcs(size_t cs, unsigned upper, unsigned lower, unsigned additional) @@ -26,7 +27,12 @@ void imx31_setup_weimcs(size_t cs, unsigned upper, unsigned lower, writel(additional, MX31_WEIM_BASE_ADDR + (cs * 0x10) + 0x8); } -static int imx31_init(void) +int imx31_init(void) +{ + return 0; +} + +int imx31_devices_init(void) { add_generic_device("imx_iim", 0, NULL, MX31_IIM_BASE_ADDR, SZ_4K, IORESOURCE_MEM, NULL); @@ -43,4 +49,3 @@ static int imx31_init(void) return 0; } -postcore_initcall(imx31_init); diff --git a/arch/arm/mach-imx/imx35.c b/arch/arm/mach-imx/imx35.c index 92f6964c45..14ddba3c7a 100644 --- a/arch/arm/mach-imx/imx35.c +++ b/arch/arm/mach-imx/imx35.c @@ -49,20 +49,19 @@ static void imx35_silicon_revision(void) #define L2_MEM_VAL 0x10 -static int imx35_l2_fix(void) +int imx35_init(void) { writel(0x515, MX35_CLKCTL_BASE_ADDR + L2_MEM_VAL); - return 0; -} -core_initcall(imx35_l2_fix); - -static int imx35_init(void) -{ imx35_silicon_revision(); imx35_boot_save_loc((void *)MX35_CCM_BASE_ADDR); + return 0; +} + +int imx35_devices_init(void) +{ add_generic_device("imx_iim", 0, NULL, MX35_IIM_BASE_ADDR, SZ_4K, IORESOURCE_MEM, NULL); @@ -77,4 +76,3 @@ static int imx35_init(void) return 0; } -postcore_initcall(imx35_init); diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c index fdf2374402..bcb3a763cd 100644 --- a/arch/arm/mach-imx/imx51.c +++ b/arch/arm/mach-imx/imx51.c @@ -22,45 +22,35 @@ #include <mach/clock-imx51_53.h> #include <mach/generic.h> -#define SI_REV 0x48 +#define IIM_SREV 0x24 static int imx51_silicon_revision(void) { - void __iomem *rom = MX51_IROM_BASE_ADDR; - u32 mx51_silicon_revision; - u32 rev; + void __iomem *iim_base = IOMEM(MX51_IIM_BASE_ADDR); + u32 rev = readl(iim_base + IIM_SREV) & 0xff; - rev = readl(rom + SI_REV); switch (rev) { - case 0x1: - mx51_silicon_revision = IMX_CHIP_REV_1_0; - break; - case 0x2: - mx51_silicon_revision = IMX_CHIP_REV_1_1; - break; + case 0x0: + return IMX_CHIP_REV_2_0; case 0x10: - mx51_silicon_revision = IMX_CHIP_REV_2_0; - break; - case 0x20: - mx51_silicon_revision = IMX_CHIP_REV_3_0; - break; + return IMX_CHIP_REV_3_0; default: - mx51_silicon_revision = 0; + return IMX_CHIP_REV_UNKNOWN; } - imx_set_silicon_revision("i.MX51", mx51_silicon_revision); - return 0; } -static int imx51_init(void) +int imx51_init(void) { - imx51_silicon_revision(); + imx_set_silicon_revision("i.MX51", imx51_silicon_revision()); imx51_boot_save_loc((void *)MX51_SRC_BASE_ADDR); - if (of_get_root_node()) - return 0; + return 0; +} +int imx51_devices_init(void) +{ add_generic_device("imx_iim", 0, NULL, MX51_IIM_BASE_ADDR, SZ_4K, IORESOURCE_MEM, NULL); @@ -77,7 +67,6 @@ static int imx51_init(void) return 0; } -postcore_initcall(imx51_init); /* * Saves the boot source media into the $bootsource environment variable @@ -149,7 +138,7 @@ void imx51_init_lowlevel(unsigned int cpufreq_mhz) { void __iomem *ccm = (void __iomem *)MX51_CCM_BASE_ADDR; u32 r; - int rev = imx_silicon_revision(); + int rev = imx51_silicon_revision(); imx5_init_lowlevel(); @@ -208,7 +197,7 @@ void imx51_init_lowlevel(unsigned int cpufreq_mhz) imx5_setup_pll_216((void __iomem *)MX51_PLL3_BASE_ADDR); /* Set the platform clock dividers */ - writel(0x00000124, MX51_ARM_BASE_ADDR + 0x14); + writel(0x00000125, MX51_ARM_BASE_ADDR + 0x14); /* Run at Full speed */ writel(0x0, ccm + MX5_CCM_CACRR); diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c index 193406f670..3e1b7fc18d 100644 --- a/arch/arm/mach-imx/imx53.c +++ b/arch/arm/mach-imx/imx53.c @@ -50,11 +50,16 @@ static int imx53_silicon_revision(void) return 0; } -static int imx53_init(void) +int imx53_init(void) { imx53_silicon_revision(); imx53_boot_save_loc((void *)MX53_SRC_BASE_ADDR); + return 0; +} + +int imx53_devices_init(void) +{ add_generic_device("imx_iim", 0, NULL, MX53_IIM_BASE_ADDR, SZ_4K, IORESOURCE_MEM, NULL); @@ -73,7 +78,6 @@ static int imx53_init(void) return 0; } -postcore_initcall(imx53_init); void imx53_init_lowlevel_early(unsigned int cpufreq_mhz) { diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c index 5c20aa1841..ed1edd7adc 100644 --- a/arch/arm/mach-imx/imx6.c +++ b/arch/arm/mach-imx/imx6.c @@ -15,8 +15,13 @@ #include <common.h> #include <io.h> #include <sizes.h> +#include <mach/imx6.h> #include <mach/generic.h> +#include <mach/revision.h> #include <mach/imx6-regs.h> +#include <mach/generic.h> + +#define SI_REV 0x260 void imx6_init_lowlevel(void) { @@ -53,13 +58,51 @@ void imx6_init_lowlevel(void) writel(0xffffffff, 0x020c4080); } -static int imx6_init(void) +int imx6_init(void) { + const char *cputypestr; + u32 rev; + u32 mx6_silicon_revision; + imx6_boot_save_loc((void *)MX6_SRC_BASE_ADDR); - if (of_get_root_node()) - return 0; + rev = readl(MX6_ANATOP_BASE_ADDR + SI_REV); + switch (rev & 0xff) { + case 0x00: + mx6_silicon_revision = IMX_CHIP_REV_1_0; + break; + + case 0x01: + mx6_silicon_revision = IMX_CHIP_REV_1_1; + break; + + case 0x02: + mx6_silicon_revision = IMX_CHIP_REV_1_2; + break; + + default: + mx6_silicon_revision = IMX_CHIP_REV_UNKNOWN; + } + switch (imx6_cpu_type()) { + case IMX6_CPUTYPE_IMX6Q: + cputypestr = "i.MX6 Dual/Quad"; + break; + case IMX6_CPUTYPE_IMX6DL: + cputypestr = "i.MX6 Solo/DualLite"; + break; + default: + cputypestr = "unknown i.MX6"; + break; + } + + imx_set_silicon_revision(cputypestr, mx6_silicon_revision); + + return 0; +} + +int imx6_devices_init(void) +{ add_generic_device("imx-iomuxv3", 0, NULL, MX6_IOMUXC_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL); add_generic_device("imx6-ccm", 0, NULL, MX6_CCM_BASE_ADDR, 0x4000, IORESOURCE_MEM, NULL); add_generic_device("imx31-gpt", 0, NULL, MX6_GPT_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL); @@ -75,4 +118,3 @@ static int imx6_init(void) return 0; } -postcore_initcall(imx6_init); diff --git a/arch/arm/mach-imx/include/mach/debug_ll.h b/arch/arm/mach-imx/include/mach/debug_ll.h index cb6dd039bc..0bb28ee6ea 100644 --- a/arch/arm/mach-imx/include/mach/debug_ll.h +++ b/arch/arm/mach-imx/include/mach/debug_ll.h @@ -13,13 +13,31 @@ #include <mach/imx53-regs.h> #include <mach/imx6-regs.h> -/* #define IMX_DEBUG_LL_UART_BASE MXxy_UARTx_BASE_ADDR */ - -#ifndef IMX_DEBUG_LL_UART_BASE -#warning define IMX_DEBUG_LL_UART_BASE properly for debug_ll -#define IMX_DEBUG_LL_UART_BASE 0 +#ifdef CONFIG_DEBUG_IMX1_UART +#define IMX_DEBUG_SOC MX1 +#elif defined CONFIG_DEBUG_IMX21_UART +#define IMX_DEBUG_SOC MX21 +#elif defined CONFIG_DEBUG_IMX25_UART +#define IMX_DEBUG_SOC MX25 +#elif defined CONFIG_DEBUG_IMX27_UART +#define IMX_DEBUG_SOC MX27 +#elif defined CONFIG_DEBUG_IMX31_UART +#define IMX_DEBUG_SOC MX31 +#elif defined CONFIG_DEBUG_IMX35_UART +#define IMX_DEBUG_SOC MX35 +#elif defined CONFIG_DEBUG_IMX51_UART +#define IMX_DEBUG_SOC MX51 +#elif defined CONFIG_DEBUG_IMX53_UART +#define IMX_DEBUG_SOC MX53 +#elif defined CONFIG_DEBUG_IMX6Q_UART +#define IMX_DEBUG_SOC MX6 +#else +#error "unknown i.MX debug uart soc type" #endif +#define __IMX_UART_BASE(soc, num) soc##_UART##num##_BASE_ADDR +#define IMX_UART_BASE(soc, num) __IMX_UART_BASE(soc, num) + #define URTX0 0x40 /* Transmitter Register */ #define UCR1 0x80 /* Control Register 1 */ @@ -30,7 +48,8 @@ static inline void PUTC_LL(int c) { - void __iomem *base = (void *)IMX_DEBUG_LL_UART_BASE; + void __iomem *base = (void *)IMX_UART_BASE(IMX_DEBUG_SOC, + CONFIG_DEBUG_IMX_UART_PORT); if (!base) return; diff --git a/arch/arm/mach-imx/include/mach/esdhc.h b/arch/arm/mach-imx/include/mach/esdhc.h index 06863c8f1b..add1691c4b 100644 --- a/arch/arm/mach-imx/include/mach/esdhc.h +++ b/arch/arm/mach-imx/include/mach/esdhc.h @@ -32,7 +32,7 @@ enum cd_types { * @cd_gpio: gpio for card_detect interrupt * @wp_type: type of write_protect method (see wp_types enum above) * @cd_type: type of card_detect method (see cd_types enum above) - * @caps: supported bus width capabilities (MMC_MODE_4BIT | MMC_MODE_8BIT) + * @caps: supported bus width capabilities (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA) */ struct esdhc_platform_data { diff --git a/arch/arm/mach-imx/include/mach/generic.h b/arch/arm/mach-imx/include/mach/generic.h index 9958cb2f3f..506b1daaa3 100644 --- a/arch/arm/mach-imx/include/mach/generic.h +++ b/arch/arm/mach-imx/include/mach/generic.h @@ -13,62 +13,148 @@ void imx51_boot_save_loc(void __iomem *src_base); void imx53_boot_save_loc(void __iomem *src_base); void imx6_boot_save_loc(void __iomem *src_base); +int imx1_init(void); +int imx21_init(void); +int imx25_init(void); +int imx27_init(void); +int imx31_init(void); +int imx35_init(void); +int imx51_init(void); +int imx53_init(void); +int imx6_init(void); + +int imx1_devices_init(void); +int imx21_devices_init(void); +int imx25_devices_init(void); +int imx27_devices_init(void); +int imx31_devices_init(void); +int imx35_devices_init(void); +int imx51_devices_init(void); +int imx53_devices_init(void); +int imx6_devices_init(void); + /* There's a off-by-one betweem the gpio bank number and the gpiochip */ /* range e.g. GPIO_1_5 is gpio 5 under linux */ #define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr)) +#define IMX_CPU_IMX1 1 +#define IMX_CPU_IMX21 21 +#define IMX_CPU_IMX25 25 +#define IMX_CPU_IMX27 27 +#define IMX_CPU_IMX31 31 +#define IMX_CPU_IMX35 35 +#define IMX_CPU_IMX51 51 +#define IMX_CPU_IMX53 53 +#define IMX_CPU_IMX6 6 + +extern unsigned int __imx_cpu_type; + #ifdef CONFIG_ARCH_IMX1 -#define cpu_is_mx1() (1) +# ifdef imx_cpu_type +# undef imx_cpu_type +# define imx_cpu_type __imx_cpu_type +# else +# define imx_cpu_type IMX_CPU_IMX1 +# endif +# define cpu_is_mx1() (imx_cpu_type == IMX_CPU_IMX1) #else -#define cpu_is_mx1() (0) +# define cpu_is_mx1() (0) #endif #ifdef CONFIG_ARCH_IMX21 -#define cpu_is_mx21() (1) +# ifdef imx_cpu_type +# undef imx_cpu_type +# define imx_cpu_type __imx_cpu_type +# else +# define imx_cpu_type IMX_CPU_IMX21 +# endif +# define cpu_is_mx21() (imx_cpu_type == IMX_CPU_IMX21) #else -#define cpu_is_mx21() (0) +# define cpu_is_mx21() (0) #endif #ifdef CONFIG_ARCH_IMX25 -#define cpu_is_mx25() (1) +# ifdef imx_cpu_type +# undef imx_cpu_type +# define imx_cpu_type __imx_cpu_type +# else +# define imx_cpu_type IMX_CPU_IMX25 +# endif +# define cpu_is_mx25() (imx_cpu_type == IMX_CPU_IMX25) #else -#define cpu_is_mx25() (0) +# define cpu_is_mx25() (0) #endif #ifdef CONFIG_ARCH_IMX27 -#define cpu_is_mx27() (1) +# ifdef imx_cpu_type +# undef imx_cpu_type +# define imx_cpu_type __imx_cpu_type +# else +# define imx_cpu_type IMX_CPU_IMX27 +# endif +# define cpu_is_mx27() (imx_cpu_type == IMX_CPU_IMX27) #else -#define cpu_is_mx27() (0) +# define cpu_is_mx27() (0) #endif #ifdef CONFIG_ARCH_IMX31 -#define cpu_is_mx31() (1) +# ifdef imx_cpu_type +# undef imx_cpu_type +# define imx_cpu_type __imx_cpu_type +# else +# define imx_cpu_type IMX_CPU_IMX31 +# endif +# define cpu_is_mx31() (imx_cpu_type == IMX_CPU_IMX31) #else -#define cpu_is_mx31() (0) +# define cpu_is_mx31() (0) #endif #ifdef CONFIG_ARCH_IMX35 -#define cpu_is_mx35() (1) +# ifdef imx_cpu_type +# undef imx_cpu_type +# define imx_cpu_type __imx_cpu_type +# else +# define imx_cpu_type IMX_CPU_IMX35 +# endif +# define cpu_is_mx35() (imx_cpu_type == IMX_CPU_IMX35) #else -#define cpu_is_mx35() (0) +# define cpu_is_mx35() (0) #endif #ifdef CONFIG_ARCH_IMX51 -#define cpu_is_mx51() (1) +# ifdef imx_cpu_type +# undef imx_cpu_type +# define imx_cpu_type __imx_cpu_type +# else +# define imx_cpu_type IMX_CPU_IMX51 +# endif +# define cpu_is_mx51() (imx_cpu_type == IMX_CPU_IMX51) #else -#define cpu_is_mx51() (0) +# define cpu_is_mx51() (0) #endif #ifdef CONFIG_ARCH_IMX53 -#define cpu_is_mx53() (1) +# ifdef imx_cpu_type +# undef imx_cpu_type +# define imx_cpu_type __imx_cpu_type +# else +# define imx_cpu_type IMX_CPU_IMX53 +# endif +# define cpu_is_mx53() (imx_cpu_type == IMX_CPU_IMX53) #else -#define cpu_is_mx53() (0) +# define cpu_is_mx53() (0) #endif #ifdef CONFIG_ARCH_IMX6 -#define cpu_is_mx6() (1) +# ifdef imx_cpu_type +# undef imx_cpu_type +# define imx_cpu_type __imx_cpu_type +# else +# define imx_cpu_type IMX_CPU_IMX6 +# endif +# define cpu_is_mx6() (imx_cpu_type == IMX_CPU_IMX6) #else -#define cpu_is_mx6() (0) +# define cpu_is_mx6() (0) #endif #define cpu_is_mx23() (0) diff --git a/arch/arm/mach-imx/include/mach/imx6.h b/arch/arm/mach-imx/include/mach/imx6.h index 518cf98978..4b2b1c7a69 100644 --- a/arch/arm/mach-imx/include/mach/imx6.h +++ b/arch/arm/mach-imx/include/mach/imx6.h @@ -1,6 +1,37 @@ #ifndef __MACH_IMX6_H #define __MACH_IMX6_H +#include <io.h> +#include <mach/generic.h> +#include <mach/imx6-regs.h> + void imx6_init_lowlevel(void); +#define IMX6_ANATOP_SI_REV 0x260 + +#define IMX6_CPUTYPE_IMX6Q 0x63 +#define IMX6_CPUTYPE_IMX6DL 0x61 + +static inline int imx6_cpu_type(void) +{ + uint32_t val; + + if (!cpu_is_mx6()) + return 0; + + val = readl(MX6_ANATOP_BASE_ADDR + IMX6_ANATOP_SI_REV); + + return (val >> 16) & 0xff; +} + +static inline int cpu_is_mx6q(void) +{ + return imx6_cpu_type() == IMX6_CPUTYPE_IMX6Q; +} + +static inline int cpu_is_mx6dl(void) +{ + return imx6_cpu_type() == IMX6_CPUTYPE_IMX6DL; +} + #endif /* __MACH_IMX6_H */ diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index fe93096dad..a183987285 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile @@ -1,6 +1,5 @@ obj-y += imx.o iomux-imx.o power.o common.o -obj-$(CONFIG_DRIVER_VIDEO_STM) += imx_lcd_clk.o -obj-$(CONFIG_ARCH_IMX23) += speed-imx23.o clocksource-imx23.o usb-imx23.o soc-imx23.o -obj-$(CONFIG_ARCH_IMX28) += speed-imx28.o clocksource-imx28.o usb-imx28.o soc-imx28.o +obj-$(CONFIG_ARCH_IMX23) += clocksource-imx23.o usb-imx23.o soc-imx23.o +obj-$(CONFIG_ARCH_IMX28) += clocksource-imx28.o usb-imx28.o soc-imx28.o obj-$(CONFIG_MXS_OCOTP) += ocotp.o obj-$(CONFIG_MXS_CMD_BCB) += bcb.o diff --git a/arch/arm/mach-mxs/imx.c b/arch/arm/mach-mxs/imx.c index 5acce9376a..9f195e4dd3 100644 --- a/arch/arm/mach-mxs/imx.c +++ b/arch/arm/mach-mxs/imx.c @@ -45,22 +45,6 @@ static int imx_reset_usb_bootstrap(void) } device_initcall(imx_reset_usb_bootstrap); -extern void imx_dump_clocks(void); - -static int do_clocks(int argc, char *argv[]) -{ - imx_dump_clocks(); - - return 0; -} - -BAREBOX_CMD_START(dump_clocks) - .cmd = do_clocks, - .usage = "show clock frequencies", - BAREBOX_CMD_COMPLETE(empty_complete) -BAREBOX_CMD_END - - static int __silicon_revision = SILICON_REVISION_UNKNOWN; int silicon_revision_get(void) diff --git a/arch/arm/mach-mxs/imx_lcd_clk.c b/arch/arm/mach-mxs/imx_lcd_clk.c deleted file mode 100644 index 455dfcb9c7..0000000000 --- a/arch/arm/mach-mxs/imx_lcd_clk.c +++ /dev/null @@ -1,150 +0,0 @@ -/* - * (C) Copyright 2010 Juergen Beisert - Pengutronix <kernel@pengutronix.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <common.h> -#include <init.h> -#include <mach/imx-regs.h> -#include <mach/clock.h> -#include <io.h> - -#ifdef CONFIG_ARCH_IMX23 - -# define HW_CLKCTRL_DIS_LCDIF 0x060 -# define CLKCTRL_DIS_LCDIF_GATE (1 << 31) -# define CLKCTRL_DIS_LCDIF_BUSY (1 << 29) -# define MASK_DIS_LCDIF_DIV 0xfff -# define SET_DIS_LCDIF_DIV(x) ((x) & MASK_DIS_LCDIF_DIV) -# define GET_DIS_LCDIF_DIV(x) ((x) & MASK_DIS_LCDIF_DIV) - -# define HW_CLKCTRL_FRAC 0xf0 -# define MASK_PIXFRAC 0x3f -# define GET_PIXFRAC(x) (((x) >> 16) & MASK_PIXFRAC) -# define SET_PIXFRAC(x) (((x) & MASK_PIXFRAC) << 16) -# define CLKCTRL_FRAC_CLKGATEPIX (1 << 23) - -# define HW_CLKCTRL_CLKSEQ 0x110 -# define CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF (1 << 1) - -#endif - -#ifdef CONFIG_ARCH_IMX28 - -# define HW_CLKCTRL_DIS_LCDIF 0x120 -# define CLKCTRL_DIS_LCDIF_GATE (1 << 31) -# define CLKCTRL_DIS_LCDIF_BUSY (1 << 29) -# define MASK_DIS_LCDIF_DIV 0x1fff -# define SET_DIS_LCDIF_DIV(x) ((x) & MASK_DIS_LCDIF_DIV) -# define GET_DIS_LCDIF_DIV(x) ((x) & MASK_DIS_LCDIF_DIV) - -/* note: On i.MX28 this is called 'FRAC1' */ -# define HW_CLKCTRL_FRAC 0x1c0 -# define MASK_PIXFRAC 0x3f -# define GET_PIXFRAC(x) ((x) & MASK_PIXFRAC) -# define SET_PIXFRAC(x) ((x) & MASK_PIXFRAC) -# define CLKCTRL_FRAC_CLKGATEPIX (1 << 7) - -# define HW_CLKCTRL_CLKSEQ 0x1d0 -# define CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF (1 << 14) - -#endif - -unsigned imx_get_lcdifclk(void) -{ - unsigned rate = (imx_get_mpllclk() / 1000) * 18U; - unsigned div; - - div = GET_PIXFRAC(readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC)); - if (div != 0U) { - rate /= div; - div = GET_DIS_LCDIF_DIV(readl(IMX_CCM_BASE + - HW_CLKCTRL_DIS_LCDIF)); - if (div != 0U) - rate /= div; - else - pr_debug("LCDIF clock has divisor 0!\n"); - } else - pr_debug("LCDIF clock has frac divisor 0!\n"); - - return rate * 1000; -} - -/* - * The source of the pixel clock can be the external 24 MHz crystal or the - * internal PLL running at 480 MHz. In order to support at least VGA sized - * displays/resolutions this routine forces the PLL as the clock source. - */ -unsigned imx_set_lcdifclk(unsigned nc) -{ - unsigned frac, best_frac = 0, div, best_div = 0, result; - int delta, best_delta = 0xffffff; - unsigned i, parent_rate = imx_get_mpllclk() / 1000; - uint32_t reg; - -#define SH_DIV(NOM, DEN, LSH) ((((NOM) / (DEN)) << (LSH)) + \ - DIV_ROUND_CLOSEST(((NOM) % (DEN)) << (LSH), DEN)) -#define SHIFT 4 - - nc /= 1000; - nc <<= SHIFT; - - for (frac = 18; frac <= 35; ++frac) { - for (div = 1; div <= 255; ++div) { - result = DIV_ROUND_CLOSEST(parent_rate * - SH_DIV(18U, frac, SHIFT), div); - delta = nc - result; - if (abs(delta) < abs(best_delta)) { - best_delta = delta; - best_frac = frac; - best_div = div; - } - } - } - - if (best_delta == 0xffffff) { - pr_debug("Unable to match the pixelclock\n"); - return 0; - } - - pr_debug("Programming PFD=%u,DIV=%u ref_pix=%u MHz PIXCLK=%u kHz\n", - best_frac, best_div, 480 * 18 / best_frac, - 480000 * 18 / best_frac / best_div); - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC); - reg &= ~SET_PIXFRAC(MASK_PIXFRAC); - reg |= SET_PIXFRAC(best_frac); - writel(reg, IMX_CCM_BASE + HW_CLKCTRL_FRAC); - writel(reg & ~CLKCTRL_FRAC_CLKGATEPIX, IMX_CCM_BASE + HW_CLKCTRL_FRAC); - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_DIS_LCDIF) & ~MASK_DIS_LCDIF_DIV; - reg &= ~CLKCTRL_DIS_LCDIF_GATE; - reg |= SET_DIS_LCDIF_DIV(best_div); - writel(reg, IMX_CCM_BASE + HW_CLKCTRL_DIS_LCDIF); - - /* Wait for divider update */ - for (i = 0; i < 10000; i++) { - if (!(readl(IMX_CCM_BASE + HW_CLKCTRL_DIS_LCDIF) & - CLKCTRL_DIS_LCDIF_BUSY)) - break; - } - - if (i >= 10000) { - pr_debug("Setting LCD clock failed\n"); - return 0; - } - - writel(CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF, - IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ + BIT_CLR); - - return imx_get_lcdifclk(); -} diff --git a/arch/arm/mach-mxs/include/mach/clock-imx23.h b/arch/arm/mach-mxs/include/mach/clock-imx23.h deleted file mode 100644 index 650779278d..0000000000 --- a/arch/arm/mach-mxs/include/mach/clock-imx23.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MACH_CLOCK_IMX23_H -# define MACH_CLOCK_IMX23_H - -unsigned imx_get_mpllclk(void); -unsigned imx_get_emiclk(void); -unsigned imx_get_ioclk(void); -unsigned imx_get_armclk(void); -unsigned imx_get_hclk(void); -unsigned imx_set_hclk(unsigned); -unsigned imx_get_xclk(void); -unsigned imx_get_sspclk(unsigned); -unsigned imx_set_sspclk(unsigned, unsigned, int); -unsigned imx_set_ioclk(unsigned); -unsigned imx_set_lcdifclk(unsigned); -unsigned imx_get_lcdifclk(void); -void imx_enable_nandclk(void); - -#endif /* MACH_CLOCK_IMX23_H */ diff --git a/arch/arm/mach-mxs/include/mach/clock-imx28.h b/arch/arm/mach-mxs/include/mach/clock-imx28.h deleted file mode 100644 index 0604f0a557..0000000000 --- a/arch/arm/mach-mxs/include/mach/clock-imx28.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef MACH_CLOCK_IMX28_H -#define MACH_CLOCK_IMX28_H - -unsigned imx_get_mpllclk(void); -unsigned imx_get_emiclk(void); -unsigned imx_get_ioclk(unsigned); -unsigned imx_get_armclk(void); -unsigned imx_get_hclk(void); -unsigned imx_set_hclk(unsigned); -unsigned imx_get_xclk(void); -unsigned imx_get_sspclk(unsigned); -unsigned imx_set_sspclk(unsigned, unsigned, int); -unsigned imx_set_ioclk(unsigned, unsigned); -unsigned imx_set_lcdifclk(unsigned); -unsigned imx_get_lcdifclk(void); -unsigned imx_get_fecclk(void); -void imx_enable_enetclk(void); -void imx_enable_nandclk(void); - -#endif /* MACH_CLOCK_IMX28_H */ - diff --git a/arch/arm/mach-mxs/include/mach/clock.h b/arch/arm/mach-mxs/include/mach/clock.h index 367297b1ca..adbc3304f8 100644 --- a/arch/arm/mach-mxs/include/mach/clock.h +++ b/arch/arm/mach-mxs/include/mach/clock.h @@ -16,11 +16,4 @@ #ifndef __MACH_CLOCK_H # define __MACH_CLOCK_H -#if defined CONFIG_ARCH_IMX23 -# include <mach/clock-imx23.h> -#endif -#if defined CONFIG_ARCH_IMX28 -# include <mach/clock-imx28.h> -#endif - #endif /* __MACH_CLOCK_H */ diff --git a/arch/arm/mach-mxs/ocotp.c b/arch/arm/mach-mxs/ocotp.c index dd984467ef..6bfa3e2d96 100644 --- a/arch/arm/mach-mxs/ocotp.c +++ b/arch/arm/mach-mxs/ocotp.c @@ -21,11 +21,12 @@ #include <malloc.h> #include <io.h> #include <clock.h> +#include <linux/clk.h> +#include <linux/err.h> #include <mach/generic.h> #include <mach/ocotp.h> #include <mach/imx-regs.h> -#include <mach/clock-imx28.h> #include <mach/power.h> #define DRIVERNAME "ocotp" @@ -45,6 +46,7 @@ struct ocotp_priv { struct cdev cdev; void __iomem *base; unsigned int write_enable; + struct clk *clk; }; static int mxs_ocotp_wait_busy(struct ocotp_priv *priv) @@ -131,10 +133,10 @@ static ssize_t mxs_ocotp_cdev_write(struct cdev *cdev, const void *buf, size_t c work_buf[offset - aligned_offset + i] |= ((u8 *)buf)[i]; /* prepare system for OTP write */ - old_hclk = imx_get_hclk(); + old_hclk = clk_get_rate(priv->clk); old_vddio = imx_get_vddio(); - imx_set_hclk(24000000); + clk_set_rate(priv->clk, 24000000); imx_set_vddio(2800000); writel(OCOTP_CTRL_RD_BANK_OPEN, base + OCOTP_CTRL + BIT_CLR); @@ -162,7 +164,7 @@ static ssize_t mxs_ocotp_cdev_write(struct cdev *cdev, const void *buf, size_t c restore_system: imx_set_vddio(old_vddio); - imx_set_hclk(old_hclk); + clk_set_rate(priv->clk, old_hclk); free_mem: free(work_buf); @@ -180,6 +182,9 @@ static int mxs_ocotp_probe(struct device_d *dev) struct ocotp_priv *priv = xzalloc(sizeof (*priv)); priv->base = dev_request_mem_region(dev, 0); + priv->clk = clk_get(dev, NULL); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); priv->cdev.dev = dev; priv->cdev.ops = &mxs_ocotp_ops; priv->cdev.priv = priv; diff --git a/arch/arm/mach-mxs/soc-imx23.c b/arch/arm/mach-mxs/soc-imx23.c index 6819b3cf2e..4e450643a2 100644 --- a/arch/arm/mach-mxs/soc-imx23.c +++ b/arch/arm/mach-mxs/soc-imx23.c @@ -35,3 +35,12 @@ void __noreturn reset_cpu(unsigned long addr) /*NOTREACHED*/ } EXPORT_SYMBOL(reset_cpu); + +static int imx23_devices_init(void) +{ + + add_generic_device("imx23-clkctrl", 0, NULL, IMX_CCM_BASE, 0x100, IORESOURCE_MEM, NULL); + + return 0; +} +postcore_initcall(imx23_devices_init); diff --git a/arch/arm/mach-mxs/soc-imx28.c b/arch/arm/mach-mxs/soc-imx28.c index ed931afc32..426f8ac38a 100644 --- a/arch/arm/mach-mxs/soc-imx28.c +++ b/arch/arm/mach-mxs/soc-imx28.c @@ -53,3 +53,12 @@ static int imx28_init(void) return 0; } postcore_initcall(imx28_init); + +static int imx28_devices_init(void) +{ + + add_generic_device("imx28-clkctrl", 0, NULL, IMX_CCM_BASE, 0x100, IORESOURCE_MEM, NULL); + + return 0; +} +postcore_initcall(imx28_devices_init); diff --git a/arch/arm/mach-mxs/speed-imx23.c b/arch/arm/mach-mxs/speed-imx23.c deleted file mode 100644 index 14885d5c41..0000000000 --- a/arch/arm/mach-mxs/speed-imx23.c +++ /dev/null @@ -1,315 +0,0 @@ -/* - * (C) Copyright 2010 Juergen Beisert - Pengutronix - * - * This code is based partially on code of: - * - * (c) 2008 Embedded Alley Solutions, Inc. - * (C) Copyright 2009-2010 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <common.h> -#include <init.h> -#include <io.h> -#include <mach/imx-regs.h> -#include <mach/generic.h> -#include <mach/clock.h> - -#define HW_CLKCTRL_PLLCTRL0 0x000 -#define HW_CLKCTRL_PLLCTRL1 0x010 -#define HW_CLKCTRL_CPU 0x20 -# define GET_CPU_XTAL_DIV(x) (((x) >> 16) & 0x3ff) -# define GET_CPU_PLL_DIV(x) ((x) & 0x3f) -#define HW_CLKCTRL_HBUS 0x30 -#define HW_CLKCTRL_XBUS 0x40 -#define HW_CLKCTRL_XTAL 0x050 -#define HW_CLKCTRL_PIX 0x060 -/* note: no set/clear register! */ -#define HW_CLKCTRL_SSP 0x070 -/* note: no set/clear register! */ -# define CLKCTRL_SSP_CLKGATE (1 << 31) -# define CLKCTRL_SSP_BUSY (1 << 29) -# define CLKCTRL_SSP_DIV_MASK 0x1ff -# define GET_SSP_DIV(x) ((x) & CLKCTRL_SSP_DIV_MASK) -# define SET_SSP_DIV(x) ((x) & CLKCTRL_SSP_DIV_MASK) -#define HW_CLKCTRL_GPMI 0x080 -# define CLKCTRL_GPMI_CLKGATE (1 << 31) -# define CLKCTRL_GPMI_DIV_MASK 0x3ff -/* note: no set/clear register! */ -#define HW_CLKCTRL_SPDIF 0x090 -/* note: no set/clear register! */ -#define HW_CLKCTRL_EMI 0xa0 -/* note: no set/clear register! */ -# define CLKCTRL_EMI_CLKGATE (1 << 31) -# define GET_EMI_XTAL_DIV(x) (((x) >> 8) & 0xf) -# define GET_EMI_PLL_DIV(x) ((x) & 0x3f) -#define HW_CLKCTRL_SAIF 0x0c0 -#define HW_CLKCTRL_TV 0x0d0 -#define HW_CLKCTRL_ETM 0x0e0 -#define HW_CLKCTRL_FRAC 0xf0 -# define CLKCTRL_FRAC_CLKGATEIO (1 << 31) -# define GET_IOFRAC(x) (((x) >> 24) & 0x3f) -# define SET_IOFRAC(x) (((x) & 0x3f) << 24) -# define CLKCTRL_FRAC_CLKGATEPIX (1 << 23) -# define GET_PIXFRAC(x) (((x) >> 16) & 0x3f) -# define CLKCTRL_FRAC_CLKGATEEMI (1 << 15) -# define GET_EMIFRAC(x) (((x) >> 8) & 0x3f) -# define CLKCTRL_FRAC_CLKGATECPU (1 << 7) -# define GET_CPUFRAC(x) ((x) & 0x3f) -#define HW_CLKCTRL_FRAC1 0x100 -#define HW_CLKCTRL_CLKSEQ 0x110 -# define CLKCTRL_CLKSEQ_BYPASS_ETM (1 << 8) -# define CLKCTRL_CLKSEQ_BYPASS_CPU (1 << 7) -# define CLKCTRL_CLKSEQ_BYPASS_EMI (1 << 6) -# define CLKCTRL_CLKSEQ_BYPASS_SSP (1 << 5) -# define CLKCTRL_CLKSEQ_BYPASS_GPMI (1 << 4) -#define HW_CLKCTRL_RESET 0x120 -#define HW_CLKCTRL_STATUS 0x130 -#define HW_CLKCTRL_VERSION 0x140 - -unsigned imx_get_mpllclk(void) -{ - /* the main PLL runs at 480 MHz */ - return 480000000; -} - -unsigned imx_get_xtalclk(void) -{ - /* the external reference runs at 24 MHz */ - return 24000000; -} - -/* used for the SDRAM controller */ -unsigned imx_get_emiclk(void) -{ - uint32_t reg; - unsigned rate; - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_EMI) & CLKCTRL_EMI_CLKGATE) - return 0U; /* clock is off */ - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ) & CLKCTRL_CLKSEQ_BYPASS_EMI) - return imx_get_xtalclk() / GET_EMI_XTAL_DIV(readl(IMX_CCM_BASE + HW_CLKCTRL_EMI)); - - rate = imx_get_mpllclk() / 1000; - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC); - if (!(reg & CLKCTRL_FRAC_CLKGATEEMI)) { - rate *= 18U; - rate /= GET_EMIFRAC(reg); - } - - return (rate / GET_EMI_PLL_DIV(readl(IMX_CCM_BASE + HW_CLKCTRL_EMI))) - * 1000; -} - -/* - * Source of ssp, gpmi, ir - */ -unsigned imx_get_ioclk(void) -{ - uint32_t reg; - unsigned rate = imx_get_mpllclk() / 1000; - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC); - if (reg & CLKCTRL_FRAC_CLKGATEIO) - return 0U; /* clock is off */ - - rate *= 18U; - rate /= GET_IOFRAC(reg); - return rate * 1000; -} - -/** - * Setup a new frequency to the IOCLK domain. - * @param nc New frequency in [Hz] - * - * The FRAC divider for the IOCLK must be between 18 (* 18/18) and 35 (* 18/35) - */ -unsigned imx_set_ioclk(unsigned nc) -{ - uint32_t reg; - unsigned div; - - nc /= 1000; - div = (imx_get_mpllclk() / 1000) * 18; - div = DIV_ROUND_CLOSEST(div, nc); - if (div > 0x3f) - div = 0x3f; - /* mask the current settings */ - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC) & ~(SET_IOFRAC(0x3f)); - writel(reg | SET_IOFRAC(div), IMX_CCM_BASE + HW_CLKCTRL_FRAC); - /* enable the IO clock at its new frequency */ - writel(CLKCTRL_FRAC_CLKGATEIO, IMX_CCM_BASE + HW_CLKCTRL_FRAC + 8); - - return imx_get_ioclk(); -} - -/* this is CPU core clock */ -unsigned imx_get_armclk(void) -{ - uint32_t reg; - unsigned rate; - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ) & CLKCTRL_CLKSEQ_BYPASS_CPU) - return imx_get_xtalclk() / GET_CPU_XTAL_DIV(readl(IMX_CCM_BASE + HW_CLKCTRL_CPU)); - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC); - if (reg & CLKCTRL_FRAC_CLKGATECPU) - return 0U; /* should not possible, shouldn't it? */ - - rate = imx_get_mpllclk() / 1000; - rate *= 18U; - rate /= GET_CPUFRAC(reg); - - return (rate / GET_CPU_PLL_DIV(readl(IMX_CCM_BASE + HW_CLKCTRL_CPU))) - * 1000; -} - -/* this is the AHB and APBH bus clock */ -unsigned imx_get_hclk(void) -{ - unsigned rate = imx_get_armclk() / 1000; - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_HBUS) & 0x20) { - rate *= readl(IMX_CCM_BASE + HW_CLKCTRL_HBUS) & 0x1f; - rate = DIV_ROUND_UP(rate, 32); - } else - rate = DIV_ROUND_UP(rate, - readl(IMX_CCM_BASE + HW_CLKCTRL_HBUS) & 0x1f); - return rate * 1000; -} - -unsigned imx_set_hclk(unsigned nc) -{ - unsigned root_rate = imx_get_armclk(); - unsigned reg, div; - - div = DIV_ROUND_UP(root_rate, nc); - if ((div == 0) || (div >= 32)) - return 0; - - if ((root_rate < nc) && (root_rate == 64000000)) - div = 3; - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_HBUS) & ~0x3f; - writel(reg | div, IMX_CCM_BASE + HW_CLKCTRL_HBUS); - - while (readl(IMX_CCM_BASE + HW_CLKCTRL_HBUS) & (1 << 31)) - ; - - return imx_get_hclk(); -} - -/* - * Source of UART, debug UART, audio, PWM, dri, timer, digctl - */ -unsigned imx_get_xclk(void) -{ - unsigned rate = imx_get_xtalclk(); /* runs from the 24 MHz crystal reference */ - - return rate / (readl(IMX_CCM_BASE + HW_CLKCTRL_XBUS) & 0x3ff); -} - -/* 'index' gets ignored on i.MX23 */ -unsigned imx_get_sspclk(unsigned index) -{ - unsigned rate; - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_SSP) & CLKCTRL_SSP_CLKGATE) - return 0U; /* clock is off */ - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ) & CLKCTRL_CLKSEQ_BYPASS_SSP) - rate = imx_get_xtalclk(); - else - rate = imx_get_ioclk(); - - return rate / GET_SSP_DIV(readl(IMX_CCM_BASE + HW_CLKCTRL_SSP)); -} - -/** - * @param index Unit index (ignored on i.MX23) - * @param nc New frequency in [Hz] - * @param high != 0 if ioclk should be the source - * @return The new possible frequency in [kHz] - */ -unsigned imx_set_sspclk(unsigned index, unsigned nc, int high) -{ - uint32_t reg; - unsigned ssp_div; - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_SSP) & ~CLKCTRL_SSP_CLKGATE; - /* Datasheet says: Do not change the DIV setting if the clock is off */ - writel(reg, IMX_CCM_BASE + HW_CLKCTRL_SSP); - /* Wait while clock is gated */ - while (readl(IMX_CCM_BASE + HW_CLKCTRL_SSP) & CLKCTRL_SSP_CLKGATE) - ; - - if (high) - ssp_div = imx_get_ioclk(); - else - ssp_div = imx_get_xtalclk(); - - if (nc > ssp_div) { - printf("Cannot setup SSP unit clock to %u Hz, base clock is only %u Hz\n", nc, ssp_div); - ssp_div = 1U; - } else { - ssp_div = DIV_ROUND_UP(ssp_div, nc); - if (ssp_div > CLKCTRL_SSP_DIV_MASK) - ssp_div = CLKCTRL_SSP_DIV_MASK; - } - - /* Set new divider value */ - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_SSP) & ~CLKCTRL_SSP_DIV_MASK; - writel(reg | SET_SSP_DIV(ssp_div), IMX_CCM_BASE + HW_CLKCTRL_SSP); - - /* Wait until new divider value is set */ - while (readl(IMX_CCM_BASE + HW_CLKCTRL_SSP) & CLKCTRL_SSP_BUSY) - ; - - if (high) - /* switch to ioclock */ - writel(CLKCTRL_CLKSEQ_BYPASS_SSP, IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ + 8); - else - /* switch to 24 MHz crystal */ - writel(CLKCTRL_CLKSEQ_BYPASS_SSP, IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ + 4); - - return imx_get_sspclk(index); -} - -void imx_enable_nandclk(void) -{ - uint32_t reg; - - /* Clear bypass bit; refman says clear, but fsl-code does set. Hooray! */ - writel(CLKCTRL_CLKSEQ_BYPASS_GPMI, - IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ + BIT_SET); - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_GPMI) & ~CLKCTRL_GPMI_CLKGATE; - writel(reg, IMX_CCM_BASE + HW_CLKCTRL_GPMI); - udelay(1000); - /* Initialize DIV to 1 */ - reg &= ~CLKCTRL_GPMI_DIV_MASK; - reg |= 1; - writel(reg, IMX_CCM_BASE + HW_CLKCTRL_GPMI); -} - -void imx_dump_clocks(void) -{ - printf("mpll: %10u kHz\n", imx_get_mpllclk() / 1000); - printf("arm: %10u kHz\n", imx_get_armclk() / 1000); - printf("ioclk: %10u kHz\n", imx_get_ioclk() / 1000); - printf("emiclk: %10u kHz\n", imx_get_emiclk() / 1000); - printf("hclk: %10u kHz\n", imx_get_hclk() / 1000); - printf("xclk: %10u kHz\n", imx_get_xclk() / 1000); - printf("ssp: %10u kHz\n", imx_get_sspclk(0) / 1000); -} diff --git a/arch/arm/mach-mxs/speed-imx28.c b/arch/arm/mach-mxs/speed-imx28.c deleted file mode 100644 index 2cab42d8f5..0000000000 --- a/arch/arm/mach-mxs/speed-imx28.c +++ /dev/null @@ -1,432 +0,0 @@ -/* - * (C) Copyright 2010 Juergen Beisert - Pengutronix <kernel@pengutronix.de> - * - * This code is based partially on code that has: - * - * (c) 2008 Embedded Alley Solutions, Inc. - * (C) Copyright 2009-2010 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include <common.h> -#include <init.h> -#include <io.h> -#include <mach/imx-regs.h> -#include <mach/generic.h> -#include <mach/clock.h> - -#define HW_CLKCTRL_PLL0CTRL0 0x000 -#define HW_CLKCTRL_PLL0CTRL1 0x010 -#define HW_CLKCTRL_PLL1CTRL0 0x020 -#define HW_CLKCTRL_PLL1CTRL1 0x030 -#define HW_CLKCTRL_PLL2CTRL0 0x040 -# define CLKCTRL_PLL2CTRL0_CLKGATE (1 << 31) -# define CLKCTRL_PLL2CTRL0_POWER (1 << 23) -#define HW_CLKCTRL_CPU 0x50 -# define GET_CPU_XTAL_DIV(x) (((x) >> 16) & 0x3ff) -# define GET_CPU_PLL_DIV(x) ((x) & 0x3f) -#define HW_CLKCTRL_HBUS 0x60 -#define HW_CLKCTRL_XBUS 0x70 -#define HW_CLKCTRL_XTAL 0x080 -#define HW_CLKCTRL_SSP0 0x090 -#define HW_CLKCTRL_SSP1 0x0a0 -#define HW_CLKCTRL_SSP2 0x0b0 -#define HW_CLKCTRL_SSP3 0x0c0 -/* note: no set/clear register! */ -# define CLKCTRL_SSP_CLKGATE (1 << 31) -# define CLKCTRL_SSP_BUSY (1 << 29) -# define CLKCTRL_SSP_DIV_FRAC_EN (1 << 9) -# define CLKCTRL_SSP_DIV_MASK 0x1ff -# define GET_SSP_DIV(x) ((x) & CLKCTRL_SSP_DIV_MASK) -# define SET_SSP_DIV(x) ((x) & CLKCTRL_SSP_DIV_MASK) -#define HW_CLKCTRL_GPMI 0x0d0 -# define CLKCTRL_GPMI_CLKGATE (1 << 31) -# define CLKCTRL_GPMI_DIV_MASK 0x3ff -/* note: no set/clear register! */ -#define HW_CLKCTRL_SPDIF 0x0e0 -/* note: no set/clear register! */ -#define HW_CLKCTRL_EMI 0xf0 -/* note: no set/clear register! */ -# define CLKCTRL_EMI_CLKGATE (1 << 31) -# define GET_EMI_XTAL_DIV(x) (((x) >> 8) & 0xf) -# define GET_EMI_PLL_DIV(x) ((x) & 0x3f) -#define HW_CLKCTRL_SAIF0 0x100 -#define HW_CLKCTRL_SAIF1 0x110 -#define HW_CLKCTRL_DIS_LCDIF 0x120 -# define CLKCTRL_DIS_LCDIF_GATE (1 << 31) -# define CLKCTRL_DIS_LCDIF_BUSY (1 << 29) -# define SET_DIS_LCDIF_DIV(x) ((x) & 0x1fff) -# define GET_DIS_LCDIF_DIV(x) ((x) & 0x1fff) -#define HW_CLKCTRL_ETM 0x130 -#define HW_CLKCTRL_ENET 0x140 -# define SET_CLKCTRL_ENET_DIV(x) (((x) & 0x3f) << 21) -# define SET_CLKCTRL_ENET_SEL(x) (((x) & 0x3) << 19) -# define CLKCTRL_ENET_CLK_OUT_EN (1 << 18) -#define HW_CLKCTRL_HSADC 0x150 -#define HW_CLKCTRL_FLEXCAN 0x160 -#define HW_CLKCTRL_FRAC0 0x1b0 -# define CLKCTRL_FRAC_CLKGATEIO0 (1 << 31) -# define GET_IO0FRAC(x) (((x) >> 24) & 0x3f) -# define SET_IO0FRAC(x) (((x) & 0x3f) << 24) -# define CLKCTRL_FRAC_CLKGATEIO1 (1 << 23) -# define GET_IO1FRAC(x) (((x) >> 16) & 0x3f) -# define SET_IO1FRAC(x) (((x) & 0x3f) << 16) -# define CLKCTRL_FRAC_CLKGATEEMI (1 << 15) -# define GET_EMIFRAC(x) (((x) >> 8) & 0x3f) -# define CLKCTRL_FRAC_CLKGATECPU (1 << 7) -# define GET_CPUFRAC(x) ((x) & 0x3f) -#define HW_CLKCTRL_FRAC1 0x1c0 -# define CLKCTRL_FRAC_CLKGATEGPMI (1 << 23) -# define GET_GPMIFRAC(x) (((x) >> 16) & 0x3f) -# define CLKCTRL_FRAC_CLKGATEHSADC (1 << 15) -# define GET_HSADCFRAC(x) (((x) >> 8) & 0x3f) -# define CLKCTRL_FRAC_CLKGATEPIX (1 << 7) -# define GET_PIXFRAC(x) ((x) & 0x3f) -# define SET_PIXFRAC(x) ((x) & 0x3f) -#define HW_CLKCTRL_CLKSEQ 0x1d0 -# define CLKCTRL_CLKSEQ_BYPASS_CPU (1 << 18) -# define CLKCTRL_CLKSEQ_BYPASS_DIS_LCDIF (1 << 14) -# define CLKCTRL_CLKSEQ_BYPASS_ETM (1 << 8) -# define CLKCTRL_CLKSEQ_BYPASS_EMI (1 << 7) -# define CLKCTRL_CLKSEQ_BYPASS_SSP3 (1 << 6) -# define CLKCTRL_CLKSEQ_BYPASS_SSP2 (1 << 5) -# define CLKCTRL_CLKSEQ_BYPASS_SSP1 (1 << 4) -# define CLKCTRL_CLKSEQ_BYPASS_SSP0 (1 << 3) -# define CLKCTRL_CLKSEQ_BYPASS_GPMI (1 << 2) -# define CLKCTRL_CLKSEQ_BYPASS_SAIF1 (1 << 1) -# define CLKCTRL_CLKSEQ_BYPASS_SAIF0 (1 << 0) -#define HW_CLKCTRL_RESET 0x1e0 -#define HW_CLKCTRL_STATUS 0x1f0 -#define HW_CLKCTRL_VERSION 0x200 - -unsigned imx_get_mpllclk(void) -{ - /* the main PLL runs at 480 MHz */ - return 480000000; -} - -unsigned imx_get_xtalclk(void) -{ - /* the external reference runs at 24 MHz */ - return 24000000; -} - -unsigned imx_get_fecclk(void) -{ - return imx_get_hclk(); -} - - -/* used for the SDRAM controller */ -unsigned imx_get_emiclk(void) -{ - uint32_t reg; - unsigned rate; - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_EMI) & CLKCTRL_EMI_CLKGATE) - return 0; /* clock is off */ - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ) & CLKCTRL_CLKSEQ_BYPASS_EMI) - return imx_get_xtalclk() / - GET_EMI_XTAL_DIV(readl(IMX_CCM_BASE + HW_CLKCTRL_EMI)); - - rate = imx_get_mpllclk() / 1000; - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC0); - if (!(reg & CLKCTRL_FRAC_CLKGATEEMI)) { - rate *= 18; - rate /= GET_EMIFRAC(reg); - } - - return (rate / GET_EMI_PLL_DIV(readl(IMX_CCM_BASE + HW_CLKCTRL_EMI))) - * 1000; -} - -/* - * Source of ssp, gpmi, ir - * @param index 0 or 1 for ioclk0 or ioclock1 - */ -unsigned imx_get_ioclk(unsigned index) -{ - uint32_t reg; - unsigned rate = imx_get_mpllclk() / 1000; - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC0); - switch (index) { - case 0: - if (reg & CLKCTRL_FRAC_CLKGATEIO0) - return 0; /* clock is off */ - - rate *= 18; - rate /= GET_IO0FRAC(reg); - break; - case 1: - if (reg & CLKCTRL_FRAC_CLKGATEIO1) - return 0; /* clock is off */ - - rate *= 18; - rate /= GET_IO1FRAC(reg); - break; - } - - return rate * 1000; -} - -/** - * Setup a new frequency to the IOCLK domain. - * @param index 0 or 1 for ioclk0 or ioclock1 - * @param nc New frequency in [Hz] - * - * The FRAC divider for the IOCLK must be between 18 (* 18/18) and 35 (* 18/35) - * - * ioclock0 is the shared clock source of SSP0/SSP1, ioclock1 the shared clock - * source of SSP2/SSP3 - */ -unsigned imx_set_ioclk(unsigned index, unsigned nc) -{ - uint32_t reg; - unsigned div; - - nc /= 1000; - div = (imx_get_mpllclk() / 1000) * 18; - div = DIV_ROUND_CLOSEST(div, nc); - if (div > 0x3f) - div = 0x3f; - - switch (index) { - case 0: - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC0) & - ~(SET_IO0FRAC(0x3f)); - /* mask the current settings */ - writel(reg | SET_IO0FRAC(div), IMX_CCM_BASE + HW_CLKCTRL_FRAC0); - /* enable the IO clock at its new frequency */ - writel(CLKCTRL_FRAC_CLKGATEIO0, - IMX_CCM_BASE + HW_CLKCTRL_FRAC0 + BIT_CLR); - break; - case 1: - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC0) & - ~(SET_IO1FRAC(0x3f)); - /* mask the current settings */ - writel(reg | SET_IO1FRAC(div), IMX_CCM_BASE + HW_CLKCTRL_FRAC0); - /* enable the IO clock at its new frequency */ - writel(CLKCTRL_FRAC_CLKGATEIO1, - IMX_CCM_BASE + HW_CLKCTRL_FRAC0 + BIT_CLR); - break; - } - - return imx_get_ioclk(index); -} - -/* this is CPU core clock */ -unsigned imx_get_armclk(void) -{ - uint32_t reg; - unsigned rate; - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ) & CLKCTRL_CLKSEQ_BYPASS_CPU) - return imx_get_xtalclk() / - GET_CPU_XTAL_DIV(readl(IMX_CCM_BASE + HW_CLKCTRL_CPU)); - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_FRAC0); - if (reg & CLKCTRL_FRAC_CLKGATECPU) - return 0; /* should not possible, shouldn't it? */ - - rate = (imx_get_mpllclk() / 1000) * 18; - rate /= GET_CPUFRAC(reg); - - return (rate / GET_CPU_PLL_DIV(readl(IMX_CCM_BASE + HW_CLKCTRL_CPU))) - * 1000; -} - -/* this is the AHB and APBH bus clock */ -unsigned imx_get_hclk(void) -{ - unsigned rate = imx_get_armclk() / 1000; - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_HBUS) & 0x20) { - rate *= readl(IMX_CCM_BASE + HW_CLKCTRL_HBUS) & 0x1f; - rate = DIV_ROUND_UP(rate, 32); - } else - rate = DIV_ROUND_UP(rate, - readl(IMX_CCM_BASE + HW_CLKCTRL_HBUS) & 0x1f); - return rate * 1000; -} - -unsigned imx_set_hclk(unsigned nc) -{ - unsigned root_rate = imx_get_armclk(); - unsigned reg, div; - - div = DIV_ROUND_UP(root_rate, nc); - if ((div == 0) || (div >= 32)) - return 0; - - if ((root_rate < nc) && (root_rate == 64000000)) - div = 3; - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_HBUS) & ~0x3f; - writel(reg | div, IMX_CCM_BASE + HW_CLKCTRL_HBUS); - - while (readl(IMX_CCM_BASE + HW_CLKCTRL_HBUS) & (1 << 31)) - ; - - return imx_get_hclk(); -} - -/* - * Source of UART, debug UART, audio, PWM, dri, timer, digctl - */ -unsigned imx_get_xclk(void) -{ - /* runs from the 24 MHz crystal reference */ - unsigned rate = imx_get_xtalclk(); - - return rate / (readl(IMX_CCM_BASE + HW_CLKCTRL_XBUS) & 0x3ff); -} - -/** - * @param index The SSP unit (0...3) - */ -unsigned imx_get_sspclk(unsigned index) -{ - unsigned rate, offset, shift, ioclk_index; - - if (index > 3) { - pr_debug("Unknown SSP unit: %u\n", index); - return 0; - } - - ioclk_index = index >> 1; - - offset = HW_CLKCTRL_SSP0 + (0x10 * index); - shift = CLKCTRL_CLKSEQ_BYPASS_SSP0 << index; - - if (readl(IMX_CCM_BASE + offset) & CLKCTRL_SSP_CLKGATE) - return 0; /* clock is off */ - - if (readl(IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ) & shift) - rate = imx_get_xtalclk(); - else - rate = imx_get_ioclk(ioclk_index); - - return rate / GET_SSP_DIV(readl(IMX_CCM_BASE + offset)); -} - -/** - * @param index The SSP unit (0...3) - * @param nc New frequency in [Hz] - * @param high != 0 if ioclk should be the source - * @return The new possible frequency - */ -unsigned imx_set_sspclk(unsigned index, unsigned nc, int high) -{ - uint32_t reg; - unsigned ssp_div, offset, shift, ioclk_index; - - if (index > 3) { - pr_debug("Unknown SSP unit: %u\n", index); - return 0; - } - - ioclk_index = index >> 1; - - offset = HW_CLKCTRL_SSP0 + (0x10 * index); - shift = CLKCTRL_CLKSEQ_BYPASS_SSP0 << index; - - reg = readl(IMX_CCM_BASE + offset) & ~CLKCTRL_SSP_CLKGATE; - /* Datasheet says: Do not change the DIV setting if the clock is off */ - writel(reg, IMX_CCM_BASE + offset); - /* Wait while clock is gated */ - while (readl(IMX_CCM_BASE + offset) & CLKCTRL_SSP_CLKGATE) - ; - - if (high) - ssp_div = imx_get_ioclk(ioclk_index); - else - ssp_div = imx_get_xtalclk(); - - if (nc > ssp_div) { - printf("Cannot setup SSP unit clock to %u kHz, base clock is " - "only %u kHz\n", nc, ssp_div); - ssp_div = 1; - } else { - ssp_div = DIV_ROUND_UP(ssp_div, nc); - if (ssp_div > CLKCTRL_SSP_DIV_MASK) - ssp_div = CLKCTRL_SSP_DIV_MASK; - } - - /* Set new divider value */ - reg = readl(IMX_CCM_BASE + offset) & ~CLKCTRL_SSP_DIV_MASK; - writel(reg | SET_SSP_DIV(ssp_div), IMX_CCM_BASE + offset); - - /* Wait until new divider value is set */ - while (readl(IMX_CCM_BASE + offset) & CLKCTRL_SSP_BUSY) - ; - - if (high) - /* switch to ioclock */ - writel(shift, IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ + BIT_CLR); - else - /* switch to 24 MHz crystal */ - writel(shift, IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ + BIT_SET); - - return imx_get_sspclk(index); -} - -void imx_enable_enetclk(void) -{ - uint32_t reg; - - /* wake up main enet PLL */ - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_PLL2CTRL0); - if (!(reg & CLKCTRL_PLL2CTRL0_POWER)) { - reg |= CLKCTRL_PLL2CTRL0_POWER; - writel(reg, IMX_CCM_BASE + HW_CLKCTRL_PLL2CTRL0); - udelay(50); /* wait until this PLL locks */ - } - reg &= ~CLKCTRL_PLL2CTRL0_CLKGATE; - writel(reg, IMX_CCM_BASE + HW_CLKCTRL_PLL2CTRL0); - - writel(SET_CLKCTRL_ENET_DIV(1) | SET_CLKCTRL_ENET_SEL(0) | - CLKCTRL_ENET_CLK_OUT_EN, /* FIXME may be platform specific */ - IMX_CCM_BASE + HW_CLKCTRL_ENET); -} - -void imx_enable_nandclk(void) -{ - uint32_t reg; - - /* Clear bypass bit; refman says clear, but fsl-code does set. Hooray! */ - writel(CLKCTRL_CLKSEQ_BYPASS_GPMI, - IMX_CCM_BASE + HW_CLKCTRL_CLKSEQ + BIT_SET); - - reg = readl(IMX_CCM_BASE + HW_CLKCTRL_GPMI) & ~CLKCTRL_GPMI_CLKGATE; - writel(reg, IMX_CCM_BASE + HW_CLKCTRL_GPMI); - udelay(1000); - /* Initialize DIV to 1 */ - reg &= ~CLKCTRL_GPMI_DIV_MASK; - reg |= 1; - writel(reg, IMX_CCM_BASE + HW_CLKCTRL_GPMI); -} - -void imx_dump_clocks(void) -{ - printf("mpll: %10u kHz\n", imx_get_mpllclk() / 1000); - printf("arm: %10u kHz\n", imx_get_armclk() / 1000); - printf("ioclk0: %10u kHz\n", imx_get_ioclk(0) / 1000); - printf("ioclk1: %10u kHz\n", imx_get_ioclk(1) / 1000); - printf("emiclk: %10u kHz\n", imx_get_emiclk() / 1000); - printf("hclk: %10u kHz\n", imx_get_hclk() / 1000); - printf("xclk: %10u kHz\n", imx_get_xclk() / 1000); - printf("ssp0: %10u kHz\n", imx_get_sspclk(0) / 1000); - printf("ssp1: %10u kHz\n", imx_get_sspclk(1) / 1000); - printf("ssp2: %10u kHz\n", imx_get_sspclk(2) / 1000); - printf("ssp3: %10u kHz\n", imx_get_sspclk(3) / 1000); -} diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile index 973068db58..e5759f57fe 100644 --- a/arch/arm/mach-omap/Makefile +++ b/arch/arm/mach-omap/Makefile @@ -15,7 +15,7 @@ # GNU General Public License for more details. # # -obj-$(CONFIG_ARCH_OMAP) += syslib.o omap_devices.o omap_generic.o +obj-$(CONFIG_ARCH_OMAP) += syslib.o omap_devices.o omap_generic.o omap_fb.o pbl-$(CONFIG_ARCH_OMAP) += syslib.o obj-$(CONFIG_OMAP_CLOCK_SOURCE_S32K) += s32k_clksource.o obj-$(CONFIG_OMAP_CLOCK_SOURCE_DMTIMER0) += dmtimer0.o diff --git a/arch/arm/mach-omap/am33xx_mux.c b/arch/arm/mach-omap/am33xx_mux.c index 424d120125..abc858668b 100644 --- a/arch/arm/mach-omap/am33xx_mux.c +++ b/arch/arm/mach-omap/am33xx_mux.c @@ -314,3 +314,8 @@ void am33xx_enable_mmc0_pin_mux(void) { configure_module_pin_mux(mmc0_pin_mux); } + +void am33xx_enable_spi0_pin_mux(void) +{ + configure_module_pin_mux(spi0_pin_mux); +} diff --git a/arch/arm/mach-omap/include/mach/am33xx-devices.h b/arch/arm/mach-omap/include/mach/am33xx-devices.h index fe9fba996b..6a4d901028 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-devices.h +++ b/arch/arm/mach-omap/include/mach/am33xx-devices.h @@ -37,4 +37,38 @@ static inline struct device_d *am33xx_add_cpsw(struct cpsw_platform_data *cpsw_d AM335X_CPSW_BASE, SZ_32K, IORESOURCE_MEM, cpsw_data); } +static inline struct device_d *am33xx_add_spi(int id, resource_size_t start) +{ + return add_generic_device("omap3_spi", id, NULL, start + 0x100, SZ_4K - 0x100, + IORESOURCE_MEM, NULL); +} + +static inline struct device_d *am33xx_add_spi0(void) +{ + return am33xx_add_spi(0, AM33XX_MCSPI0_BASE); +} + +static inline struct device_d *am33xx_add_spi1(void) +{ + return am33xx_add_spi(1, AM33XX_MCSPI1_BASE); +} + +static inline struct device_d *am33xx_add_i2c0(void *pdata) +{ + return add_generic_device("i2c-am33xx", 0, NULL, AM33XX_I2C0_BASE, + SZ_4K, IORESOURCE_MEM, pdata); +} + +static inline struct device_d *am33xx_add_i2c1(void *pdata) +{ + return add_generic_device("i2c-am33xx", 1, NULL, AM33XX_I2C1_BASE, + SZ_4K, IORESOURCE_MEM, pdata); +} + +static inline struct device_d *am33xx_add_i2c2(void *pdata) +{ + return add_generic_device("i2c-am33xx", 2, NULL, AM33XX_I2C2_BASE, + SZ_4K, IORESOURCE_MEM, pdata); +} + #endif /* __MACH_OMAP3_DEVICES_H */ diff --git a/arch/arm/mach-omap/include/mach/am33xx-mux.h b/arch/arm/mach-omap/include/mach/am33xx-mux.h index 44b93bd25c..d6b19ddf86 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-mux.h +++ b/arch/arm/mach-omap/include/mach/am33xx-mux.h @@ -256,5 +256,6 @@ extern void am33xx_enable_i2c2_pin_mux(void); extern void am33xx_enable_uart0_pin_mux(void); extern void am33xx_enable_uart2_pin_mux(void); extern void am33xx_enable_mmc0_pin_mux(void); +extern void am33xx_enable_spi0_pin_mux(void); #endif /*__AM33XX_MUX_H__ */ diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h index 9edf4ca977..8a7bd163b0 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h +++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h @@ -41,6 +41,11 @@ #define AM33XX_DRAM_ADDR_SPACE_START 0x80000000 #define AM33XX_DRAM_ADDR_SPACE_END 0xC0000000 +/* I2C */ +#define AM33XX_I2C0_BASE (AM33XX_L4_WKUP_BASE + 0x20B000) +#define AM33XX_I2C1_BASE (AM33XX_L4_PER_BASE + 0x02A000) +#define AM33XX_I2C2_BASE (AM33XX_L4_PER_BASE + 0x19C000) + /* GPMC */ #define AM33XX_GPMC_BASE 0x50000000 @@ -49,6 +54,10 @@ #define AM33XX_MMC1_BASE (AM33XX_L4_PER_BASE + 0x1D8000) #define AM33XX_MMCHS2_BASE 0x47810000 +/* SPI */ +#define AM33XX_MCSPI0_BASE (AM33XX_L4_PER_BASE + 0x30000) +#define AM33XX_MCSPI1_BASE (AM33XX_L4_PER_BASE + 0x1A0000) + /* DTMTimer0 */ #define AM33XX_DMTIMER0_BASE (AM33XX_L4_WKUP_BASE + 0x205000) diff --git a/arch/arm/mach-omap/include/mach/devices.h b/arch/arm/mach-omap/include/mach/devices.h index adae01bc20..537213fb90 100644 --- a/arch/arm/mach-omap/include/mach/devices.h +++ b/arch/arm/mach-omap/include/mach/devices.h @@ -9,6 +9,4 @@ void omap_add_sram0(resource_size_t base, resource_size_t size); struct device_d *omap_add_uart(int id, unsigned long base); -struct device_d *omap_add_i2c(int id, unsigned long base, void *pdata); - #endif /* __MACH_OMAP_DEVICES_H */ diff --git a/arch/arm/mach-omap/include/mach/generic.h b/arch/arm/mach-omap/include/mach/generic.h index 5a10a548a9..178c21f808 100644 --- a/arch/arm/mach-omap/include/mach/generic.h +++ b/arch/arm/mach-omap/include/mach/generic.h @@ -27,4 +27,10 @@ #define cpu_is_omap4xxx() (0) #endif +#ifdef CONFIG_ARCH_AM33XX +#define cpu_is_am33xx() (1) +#else +#define cpu_is_am33xx() (0) +#endif + #endif diff --git a/arch/arm/mach-omap/include/mach/omap-fb.h b/arch/arm/mach-omap/include/mach/omap-fb.h new file mode 100644 index 0000000000..f68dc1a142 --- /dev/null +++ b/arch/arm/mach-omap/include/mach/omap-fb.h @@ -0,0 +1,47 @@ +#ifndef H_BAREBOX_ARCH_ARM_MACH_OMAP_MACH_FB4_H +#define H_BAREBOX_ARCH_ARM_MACH_OMAP_MACH_FB4_H + +#include <fb.h> + +#define OMAP_DSS_LCD_TFT (1u << 0) +#define OMAP_DSS_LCD_IVS (1u << 1) +#define OMAP_DSS_LCD_IHS (1u << 2) +#define OMAP_DSS_LCD_IPC (1u << 3) +#define OMAP_DSS_LCD_IEO (1u << 4) +#define OMAP_DSS_LCD_RF (1u << 5) +#define OMAP_DSS_LCD_ONOFF (1u << 6) + +#define OMAP_DSS_LCD_DATALINES(_l) ((_l) << 10) +#define OMAP_DSS_LCD_DATALINES_msk OMAP_DSS_LCD_DATALINES(3u) +#define OMAP_DSS_LCD_DATALINES_12 OMAP_DSS_LCD_DATALINES(0u) +#define OMAP_DSS_LCD_DATALINES_16 OMAP_DSS_LCD_DATALINES(1u) +#define OMAP_DSS_LCD_DATALINES_18 OMAP_DSS_LCD_DATALINES(2u) +#define OMAP_DSS_LCD_DATALINES_24 OMAP_DSS_LCD_DATALINES(3u) + +struct omapfb_display { + struct fb_videomode mode; + + unsigned long config; + + unsigned int power_on_delay; + unsigned int power_off_delay; +}; + +struct omapfb_platform_data { + struct omapfb_display const *displays; + size_t num_displays; + + unsigned int dss_clk_hz; + + unsigned int bpp; + + struct resource const *screen; + + void (*enable)(int p); +}; + +struct device_d; +struct device_d *omap_add_display(struct omapfb_platform_data *o_pdata); + + +#endif /* H_BAREBOX_ARCH_ARM_MACH_OMAP_MACH_FB4_H */ diff --git a/arch/arm/mach-omap/include/mach/omap3-devices.h b/arch/arm/mach-omap/include/mach/omap3-devices.h index de67ea0117..0809e95b11 100644 --- a/arch/arm/mach-omap/include/mach/omap3-devices.h +++ b/arch/arm/mach-omap/include/mach/omap3-devices.h @@ -77,17 +77,20 @@ static inline struct device_d *omap3_add_mmc3(struct omap_hsmmc_platform_data *p static inline struct device_d *omap3_add_i2c1(void *pdata) { - return omap_add_i2c(0, OMAP3_I2C1_BASE, pdata); + return add_generic_device("i2c-omap3", 0, NULL, OMAP3_I2C1_BASE, + SZ_4K, IORESOURCE_MEM, pdata); } static inline struct device_d *omap3_add_i2c2(void *pdata) { - return omap_add_i2c(1, OMAP3_I2C2_BASE, pdata); + return add_generic_device("i2c-omap3", 1, NULL, OMAP3_I2C2_BASE, + SZ_4K, IORESOURCE_MEM, pdata); } static inline struct device_d *omap3_add_i2c3(void *pdata) { - return omap_add_i2c(2, OMAP3_I2C3_BASE, pdata); + return add_generic_device("i2c-omap3", 2, NULL, OMAP3_I2C3_BASE, + SZ_4K, IORESOURCE_MEM, pdata); } static inline struct device_d *omap3_add_ehci(void *pdata) diff --git a/arch/arm/mach-omap/include/mach/omap4-devices.h b/arch/arm/mach-omap/include/mach/omap4-devices.h index 561d9ce0ae..76c9789729 100644 --- a/arch/arm/mach-omap/include/mach/omap4-devices.h +++ b/arch/arm/mach-omap/include/mach/omap4-devices.h @@ -60,22 +60,26 @@ static inline struct device_d *omap44xx_add_mmc5(struct omap_hsmmc_platform_data static inline struct device_d *omap44xx_add_i2c1(void *pdata) { - return omap_add_i2c(0, OMAP44XX_I2C1_BASE, pdata); + return add_generic_device("i2c-omap4", 0, NULL, OMAP44XX_I2C1_BASE, + SZ_4K, IORESOURCE_MEM, pdata); } static inline struct device_d *omap44xx_add_i2c2(void *pdata) { - return omap_add_i2c(1, OMAP44XX_I2C2_BASE, pdata); + return add_generic_device("i2c-omap4", 1, NULL, OMAP44XX_I2C2_BASE, + SZ_4K, IORESOURCE_MEM, pdata); } static inline struct device_d *omap44xx_add_i2c3(void *pdata) { - return omap_add_i2c(2, OMAP44XX_I2C3_BASE, pdata); + return add_generic_device("i2c-omap4", 2, NULL, OMAP44XX_I2C3_BASE, + SZ_4K, IORESOURCE_MEM, pdata); } static inline struct device_d *omap44xx_add_i2c4(void *pdata) { - return omap_add_i2c(3, OMAP44XX_I2C4_BASE, pdata); + return add_generic_device("i2c-omap4", 3, NULL, OMAP44XX_I2C4_BASE, + SZ_4K, IORESOURCE_MEM, pdata); } static inline struct device_d *omap44xx_add_ehci(void *pdata) diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h b/arch/arm/mach-omap/include/mach/omap4-silicon.h index 666e721551..336415c16b 100644 --- a/arch/arm/mach-omap/include/mach/omap4-silicon.h +++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h @@ -230,7 +230,8 @@ struct dpll_param; void omap4_ddr_init(const struct ddr_regs *, const struct dpll_param *); void omap4_power_i2c_send(u32); unsigned int omap4_revision(void); -noinline int omap4_scale_vcores(unsigned vsel0_pin); +int omap4430_scale_vcores(void); +int omap4460_scale_vcores(unsigned vsel0_pin, unsigned volt_mv); void omap4_set_warmboot_order(u32 *device_list); #endif diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c index 3d6ec25c93..a082b718f9 100644 --- a/arch/arm/mach-omap/omap4_generic.c +++ b/arch/arm/mach-omap/omap4_generic.c @@ -508,9 +508,9 @@ static int omap4_bootsource(void) if (bootsrc & (1 << 5)) src = BOOTSOURCE_MMC; - if (bootsrc & (1 << 3)) + else if (bootsrc & (1 << 3)) src = BOOTSOURCE_NAND; - if (bootsrc & (1<<20)) + else if (bootsrc & (1<<20)) src = BOOTSOURCE_USB; bootsource_set(src); bootsource_set_instance(0); @@ -537,11 +537,9 @@ static void __iomem *omap4_get_gpio_base(unsigned gpio) #define I2C_SLAVE 0x12 -noinline int omap4_scale_vcores(unsigned vsel0_pin) +noinline int omap4430_scale_vcores(void) { - void __iomem *base; unsigned int rev = omap4_revision(); - u32 val = 0; /* For VC bypass only VCOREx_CGF_FORCE is necessary and * VCOREx_CFG_VOLTAGE changes can be discarded @@ -549,50 +547,16 @@ noinline int omap4_scale_vcores(unsigned vsel0_pin) writel(0, OMAP44XX_PRM_VC_CFG_I2C_MODE); writel(0x6026, OMAP44XX_PRM_VC_CFG_I2C_CLK); - /* TPS - supplies vdd_mpu on 4460 */ - if (rev >= OMAP4460_ES1_0) { - /* - * Setup SET1 and SET0 with right values so that kernel - * can use either of them based on its needs. - */ - omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET0, 1430); - omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET1, 1430); - - /* - * Select SET1 in TPS62361: - * VSEL1 is grounded on board. So the following selects - * VSEL1 = 0 and VSEL0 = 1 - */ - base = omap4_get_gpio_base(vsel0_pin); - - val = 1 << (vsel0_pin & GPIO_MASK); - writel(val, base + 0x190); - - val = readl(base + 0x134); - val &= ~(1 << (vsel0_pin & GPIO_MASK)); - writel(val, base + 0x134); - - val = 1 << (vsel0_pin & GPIO_MASK); - writel(val, base + 0x194); - } - - /* set VCORE1 force VSEL */ - /* + /* set VCORE1 force VSEL * 4430 : supplies vdd_mpu * Setting a high voltage for Nitro mode as smart reflex is not enabled. * We use the maximum possible value in the AVS range because the next * higher voltage in the discrete range (code >= 0b111010) is way too * high - * - * 4460 : supplies vdd_core - * */ - if (rev < OMAP4460_ES1_0) - /* 0x55: i2c addr, 3A: ~ 1430 mvolts*/ - omap4_power_i2c_send((0x3A55 << 8) | I2C_SLAVE); - else - /* 0x55: i2c addr, 28: ~ 1200 mvolts*/ - omap4_power_i2c_send((0x2855 << 8) | I2C_SLAVE); + + /* 0x55: i2c addr, 3A: ~ 1430 mvolts*/ + omap4_power_i2c_send((0x3A55 << 8) | I2C_SLAVE); /* FIXME: set VCORE2 force VSEL, Check the reset value */ omap4_power_i2c_send((0x295B << 8) | I2C_SLAVE); @@ -605,12 +569,59 @@ noinline int omap4_scale_vcores(unsigned vsel0_pin) case OMAP4430_ES2_1: omap4_power_i2c_send((0x2A61 << 8) | I2C_SLAVE); break; - /* > OMAP4460_ES1_0 : VCORE3 not connected */ } return 0; } +noinline int omap4460_scale_vcores(unsigned vsel0_pin, unsigned volt_mv) +{ + void __iomem *base; + u32 val = 0; + + /* For VC bypass only VCOREx_CGF_FORCE is necessary and + * VCOREx_CFG_VOLTAGE changes can be discarded + */ + writel(0, OMAP44XX_PRM_VC_CFG_I2C_MODE); + writel(0x6026, OMAP44XX_PRM_VC_CFG_I2C_CLK); + + /* TPS - supplies vdd_mpu on 4460 + * Setup SET1 and don't touch SET0 it acts as boot voltage + * source after reset. + */ + + omap4_do_scale_tps62361(TPS62361_REG_ADDR_SET1, volt_mv); + + /* + * Select SET1 in TPS62361: + * VSEL1 is grounded on board. So the following selects + * VSEL1 = 0 and VSEL0 = 1 + */ + base = omap4_get_gpio_base(vsel0_pin); + + val = 1 << (vsel0_pin & GPIO_MASK); + writel(val, base + 0x190); + + val = readl(base + 0x134); + val &= ~(1 << (vsel0_pin & GPIO_MASK)); + writel(val, base + 0x134); + + val = 1 << (vsel0_pin & GPIO_MASK); + writel(val, base + 0x194); + + /* set VCORE1 force VSEL + * 4460 : supplies vdd_core + */ + + /* 0x55: i2c addr, 28: ~ 1200 mvolts*/ + omap4_power_i2c_send((0x2855 << 8) | I2C_SLAVE); + + /* FIXME: set VCORE2 force VSEL, Check the reset value */ + omap4_power_i2c_send((0x295B << 8) | I2C_SLAVE); + + return 0; +} + void omap4_do_set_mux(u32 base, struct pad_conf_entry const *array, int size) { int i; diff --git a/arch/arm/mach-omap/omap_devices.c b/arch/arm/mach-omap/omap_devices.c index 056cba541c..30cfdd06b6 100644 --- a/arch/arm/mach-omap/omap_devices.c +++ b/arch/arm/mach-omap/omap_devices.c @@ -24,9 +24,3 @@ struct device_d *omap_add_uart(int id, unsigned long base) return add_ns16550_device(id, base, 1024, IORESOURCE_MEM_8BIT, &serial_plat); } - -struct device_d *omap_add_i2c(int id, unsigned long base, void *pdata) -{ - return add_generic_device("i2c-omap", id, NULL, base, SZ_4K, - IORESOURCE_MEM, pdata); -} diff --git a/arch/arm/mach-omap/omap_fb.c b/arch/arm/mach-omap/omap_fb.c new file mode 100644 index 0000000000..ae318d85fe --- /dev/null +++ b/arch/arm/mach-omap/omap_fb.c @@ -0,0 +1,34 @@ +#include <driver.h> +#include <common.h> +#include <linux/ioport.h> +#include <mach/omap-fb.h> + +#if defined(CONFIG_DRIVER_VIDEO_OMAP) +static struct resource omapfb_resources[] = { + { + .name = "omap4_dss", + .start = 0x48040000, + .end = 0x48040000 + 512 - 1, + .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, + }, { + .name = "omap4_dispc", + .start = 0x48041000, + .end = 0x48041000 + 3072 - 1, + .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, + }, +}; + +struct device_d *omap_add_display(struct omapfb_platform_data *o_pdata) +{ + return add_generic_device_res("omap_fb", -1, + omapfb_resources, + ARRAY_SIZE(omapfb_resources), + o_pdata); +} +#else +struct device_d *omap_add_display(struct omapfb_platform_data *o_pdata) +{ + return NULL; +} +#endif +EXPORT_SYMBOL(omap_add_display); diff --git a/arch/arm/pbl/Makefile b/arch/arm/pbl/Makefile index 3f50f77bc0..8923a704e1 100644 --- a/arch/arm/pbl/Makefile +++ b/arch/arm/pbl/Makefile @@ -29,9 +29,12 @@ endif zbarebox-common := $(barebox-pbl-common) $(obj)/$(piggy_o) zbarebox-lds := $(obj)/zbarebox.lds +$(zbarebox-lds): $(obj)/../lib/pbl.lds.S FORCE + $(call if_changed_dep,cpp_lds_S) + quiet_cmd_zbarebox__ ?= LD $@ cmd_zbarebox__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_zbarebox) -o $@ \ - -T $(zbarebox-lds) \ + -e pbl_start -T $(zbarebox-lds) \ --start-group $(zbarebox-common) --end-group \ $(filter-out $(zbarebox-lds) $(zbarebox-common) FORCE ,$^) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 2e44619a0e..b2452c76c5 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -52,6 +52,7 @@ config MACH_MIPS_AR231X select SYS_SUPPORTS_BIG_ENDIAN select CSRC_R4K_LIB select DRIVER_SERIAL_NS16550 + select HAS_DEBUG_LL config MACH_MIPS_BCM47XX bool "Broadcom BCM47xx-based boards" @@ -244,6 +245,52 @@ config CMD_MIPS_CPUINFO Say yes here to get a cpuinfo command to show some information about the cpu model. +config HAS_NMON + bool + +config NMON + bool "nmon" + depends on HAS_NMON + depends on DEBUG_LL + help + Say yes here to add the nmon to pbl. + nmon -- nano-monitor program for the MIPS processors. + It can operate with NO working RAM, using only + the processor registers. + +config NMON_USER_START + bool "'press any key to start nmon' dialog" + depends on NMON + help + Say yes here to get the 'press any key to start nmon' + dialog on start. + +config NMON_1S_DELAY + prompt "number of delay loops for 1s time interval" + depends on NMON_USER_START + hex + default 0x400000 + help + nmon uses a very simple delay loop for time measurement. + The delay is CPU-dependent or even board-dependent. + The NMON_1S_DELAY parameter specify delay loop count + for near 1 second time interval. + +config NMON_USER_START_DELAY + prompt "'press any key to start nmon' dialog delay" + depends on NMON_USER_START + hex + default 3 + help + Select the delay interval for nmon 'press any key to start nmon' dialog. + +config NMON_HELP + bool "nmon help message" + depends on NMON + help + Say yes here to get the nmon commands message on + every nmon start. + endmenu source common/Kconfig diff --git a/arch/mips/boards/netgear-wg102/include/board/board_pbl_start.h b/arch/mips/boards/netgear-wg102/include/board/board_pbl_start.h new file mode 100644 index 0000000000..d74d2c27af --- /dev/null +++ b/arch/mips/boards/netgear-wg102/include/board/board_pbl_start.h @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> + * Copyright (C) 2013 Oleksij Rempel <linux@rempel-privat.de> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <asm/pbl_macros.h> +#include <mach/pbl_macros.h> +#include <mach/ar2312_regs.h> + +#include <mach/debug_ll.h> + + .macro board_pbl_start + .set push + .set noreorder + + mips_barebox_10h + + mips_disable_interrupts + + pbl_ar2312_pll + + pbl_ar2312_rst_uart0 + debug_ll_ns16550_init + + debug_ll_ns16550_outc 'a' + debug_ll_ns16550_outnl + + /* check if SDRAM is already configured, + * if yes, we are probably starting + * as second stage loader and can skip configuration */ + la t0, KSEG1 | AR2312_MEM_CFG1 + lw t1, 0(t0) + and t0, t1, MEM_CFG1_E0 + beq zero, t0, 1f + nop + + pbl_probe_mem t0, t1, KSEG1 + beq t0, t1, sdram_configured + nop + +1: + /* start SDRAM configuration */ + pbl_ar2312_x16_sdram + + /* check one more time. if some thing wrong, + * we don't need to continue */ + pbl_probe_mem t0, t1, KSEG1 + beq t0, t1, sdram_configured + nop + debug_ll_ns16550_outc '#' + debug_ll_ns16550_outnl + +1: + b 1b /* dead end */ + nop + +sdram_configured: + debug_ll_ns16550_outc 'b' + debug_ll_ns16550_outnl + + copy_to_link_location pbl_start + + .set pop + .endm diff --git a/arch/mips/boards/netgear-wg102/include/board/debug_ll.h b/arch/mips/boards/netgear-wg102/include/board/debug_ll.h new file mode 100644 index 0000000000..2725032ba3 --- /dev/null +++ b/arch/mips/boards/netgear-wg102/include/board/debug_ll.h @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2013 Oleksij Rempel <linux@rempel-privat.de> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +/** @file + * This File contains declaration for early output support + */ +#ifndef __NETGEAR_WG102_DEBUG_LL_H__ +#define __NETGEAR_WG102_DEBUG_LL_H__ + +#include <mach/ar2312_regs.h> + +#define DEBUG_LL_UART_ADDR KSEG1ADDR(AR2312_UART0) +#define DEBUG_LL_UART_SHIFT AR2312_UART_SHIFT + +#define DEBUG_LL_UART_CLK (45000000 / 16) +#define DEBUG_LL_UART_BPS CONFIG_BAUDRATE +#define DEBUG_LL_UART_DIVISOR (DEBUG_LL_UART_CLK / DEBUG_LL_UART_BPS) + +#endif /* __NETGEAR_WG102_DEBUG_LL_H__ */ diff --git a/arch/mips/boards/qemu-malta/include/board/board_pbl_start.h b/arch/mips/boards/qemu-malta/include/board/board_pbl_start.h index 5b067706cc..bcd9789483 100644 --- a/arch/mips/boards/qemu-malta/include/board/board_pbl_start.h +++ b/arch/mips/boards/qemu-malta/include/board/board_pbl_start.h @@ -18,6 +18,7 @@ */ #include <asm/pbl_macros.h> +#include <asm/pbl_nmon.h> .macro board_pbl_start .set push @@ -28,6 +29,8 @@ /* cpu specific setup ... */ /* ... absent */ + mips_nmon + copy_to_link_location pbl_start .set pop diff --git a/arch/mips/boards/qemu-malta/include/board/debug_ll.h b/arch/mips/boards/qemu-malta/include/board/debug_ll.h new file mode 100644 index 0000000000..1e56040ffe --- /dev/null +++ b/arch/mips/boards/qemu-malta/include/board/debug_ll.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __INCLUDE_BOARD_DEBUG_LL_QEMU_MALTA_H__ +#define __INCLUDE_BOARD_DEBUG_LL_QEMU_MALTA_H__ + +#include <mach/hardware.h> + +#define DEBUG_LL_UART_ADDR MALTA_PIIX4_UART0 +#define DEBUG_LL_UART_SHIFT 0 +#define DEBUG_LL_UART_DIVISOR 1843200 /* no matter for emulated port */ + +#endif /* __INCLUDE_BOARD_DEBUG_LL_QEMU_MALTA_H__ */ diff --git a/arch/mips/boards/qemu-malta/init.c b/arch/mips/boards/qemu-malta/init.c index db26b3b5c9..f77fcad821 100644 --- a/arch/mips/boards/qemu-malta/init.c +++ b/arch/mips/boards/qemu-malta/init.c @@ -44,7 +44,7 @@ static struct NS16550_plat serial_plat = { static int malta_console_init(void) { /* Register the serial port */ - add_ns16550_device(DEVICE_ID_DYNAMIC, DEBUG_LL_UART_ADDR, 8, + add_ns16550_device(DEVICE_ID_DYNAMIC, MALTA_PIIX4_UART0, 8, IORESOURCE_MEM_8BIT, &serial_plat); return 0; diff --git a/arch/mips/boot/start-pbl.S b/arch/mips/boot/start-pbl.S index 702e29168a..b6d127a039 100644 --- a/arch/mips/boot/start-pbl.S +++ b/arch/mips/boot/start-pbl.S @@ -2,7 +2,6 @@ * Startup Code for MIPS CPU * * Copyright (C) 2011, 2012 Antony Pavlov <antonynpavlov@gmail.com> - * ADR macro copyrighted (C) 2009 by Shinya Kuribayashi <skuribay@pobox.com> * * This file is part of barebox. * See file CREDITS for list of people who contributed to this project. diff --git a/arch/mips/include/asm/debug_ll_ns16550.h b/arch/mips/include/asm/debug_ll_ns16550.h index f00f348ec5..f36010ce07 100644 --- a/arch/mips/include/asm/debug_ll_ns16550.h +++ b/arch/mips/include/asm/debug_ll_ns16550.h @@ -38,6 +38,7 @@ #endif /* CONFIG_DEBUG_LL */ #define UART_THR (0x0 << DEBUG_LL_UART_SHIFT) +#define UART_RBR (0x0 << DEBUG_LL_UART_SHIFT) #define UART_DLL (0x0 << DEBUG_LL_UART_SHIFT) #define UART_DLM (0x1 << DEBUG_LL_UART_SHIFT) #define UART_LCR (0x3 << DEBUG_LL_UART_SHIFT) @@ -46,6 +47,7 @@ #define UART_LCR_W 0x07 /* Set UART to 8,N,2 & DLAB = 0 */ #define UART_LCR_DLAB 0x87 /* Set UART to 8,N,2 & DLAB = 1 */ +#define UART_LSR_DR 0x01 /* UART received data present */ #define UART_LSR_THRE 0x20 /* Xmit holding register empty */ #ifndef __ASSEMBLY__ @@ -86,18 +88,30 @@ static __inline__ void PUTC_LL(char ch) /* * output a character in a0 */ -.macro debug_ll_ns16550_outc chr +.macro debug_ll_ns16550_outc_a0 #ifdef CONFIG_DEBUG_LL - li a0, \chr + .set push + .set reorder + la t0, DEBUG_LL_UART_ADDR -1: lbu t1, UART_LSR(t0) /* get line status */ - nop +201: lbu t1, UART_LSR(t0) /* get line status */ andi t1, t1, UART_LSR_THRE /* check for transmitter empty */ - beqz t1, 1b /* try again */ - nop + beqz t1, 201b /* try again */ sb a0, UART_THR(t0) /* write the character */ + + .set pop +#endif /* CONFIG_DEBUG_LL */ +.endm + +/* + * output a character + */ +.macro debug_ll_ns16550_outc chr +#ifdef CONFIG_DEBUG_LL + li a0, \chr + debug_ll_ns16550_outc_a0 #endif /* CONFIG_DEBUG_LL */ .endm @@ -110,6 +124,80 @@ static __inline__ void PUTC_LL(char ch) debug_ll_ns16550_outc '\n' #endif /* CONFIG_DEBUG_LL */ .endm + +/* + * output a 32-bit value in hex + */ +.macro debug_ll_ns16550_outhexw +#ifdef CONFIG_DEBUG_LL + .set push + .set reorder + + move t6, a0 + li t5, 32 + +202: + addi t5, t5, -4 + srlv a0, t6, t5 + + /* output one hex digit */ + andi a0, a0, 15 + blt a0, 10, 203f + + addi a0, a0, ('a' - '9' - 1) + +203: + addi a0, a0, '0' + + debug_ll_ns16550_outc_a0 + + bgtz t5, 202b + + .set pop +#endif /* CONFIG_DEBUG_LL */ +.endm + +/* + * check character in input buffer + * return value: + * v0 = 0 no character in input buffer + * v0 != 0 character in input buffer + */ +.macro debug_ll_ns16550_check_char +#ifdef CONFIG_DEBUG_LL + .set push + .set reorder + + la t0, DEBUG_LL_UART_ADDR + + /* get line status and check for data present */ + lbu t1, UART_LSR(t0) + andi v0, t1, UART_LSR_DR + + .set pop +#endif /* CONFIG_DEBUG_LL */ +.endm + +/* + * get character to v0 + */ +.macro debug_ll_ns16550_getc +#ifdef CONFIG_DEBUG_LL + .set push + .set reorder + +204: + debug_ll_ns16550_check_char + + /* try again */ + beqz v0, 204b + + /* read a character */ + lbu v0, UART_RBR(t0) + + .set pop +#endif /* CONFIG_DEBUG_LL */ +.endm #endif /* __ASSEMBLY__ */ #endif /* __INCLUDE_MIPS_ASM_DEBUG_LL_NS16550_H__ */ diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h index c32a2296a0..1d9d6ab7ef 100644 --- a/arch/mips/include/asm/pbl_macros.h +++ b/arch/mips/include/asm/pbl_macros.h @@ -28,6 +28,28 @@ #include <generated/compile.h> #include <generated/utsrelease.h> + .macro pbl_sleep reg count + .set push + .set noreorder + li \reg, \count +254: + bgtz \reg, 254b + addi \reg, -1 + .set pop + .endm + + .macro pbl_probe_mem ret1 ret2 addr + .set push + .set noreorder + la \ret1, \addr + sw zero, 0(\ret1) + li \ret2, 0x12345678 + sw \ret2, 0(\ret1) + lw \ret2, 0(\ret1) + li \ret1, 0x12345678 + .set pop + .endm + /* * ADR macro instruction (inspired by ARM) * @@ -41,15 +63,13 @@ .set push .set noreorder move \temp, ra # preserve ra beforehand - bal _pc + bal 255f nop -_pc: addiu \rd, ra, \label - _pc # label is assumed to be +255: addiu \rd, ra, \label - 255b # label is assumed to be move ra, \temp # within pc +/- 32KB .set pop .endm -#define LONGSIZE 4 - .macro copy_to_link_location start_addr .set push .set noreorder @@ -99,6 +119,22 @@ copy_loop_exit: .set pop .endm + .macro mips_barebox_10h + .set push + .set noreorder + + b 1f + nop + + .org 0x10 + .ascii "barebox " UTS_RELEASE " " UTS_VERSION + .byte 0 + + .align 4 +1: + .set pop + .endm + /* * Dominic Sweetman, See MIPS Run, Morgan Kaufmann, 2nd edition, 2006 * diff --git a/arch/mips/include/asm/pbl_nmon.h b/arch/mips/include/asm/pbl_nmon.h new file mode 100644 index 0000000000..e7baa4c5a9 --- /dev/null +++ b/arch/mips/include/asm/pbl_nmon.h @@ -0,0 +1,270 @@ +/* + * nano-monitor for MIPS CPU + * + * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <board/debug_ll.h> +#include <asm/debug_ll_ns16550.h> + +#define CODE_ESC 0x1b + +/* + * Delay slot warning! + * + * NMON was made with code portability in mind. + * So it uses '.set reorder' directives allowing + * assembler to insert necessary 'nop' instructions + * into delay slots (after branch instruction) and + * into load delay slot (after memory load instruction + * on very old R2000/R3000 processors). + */ + + .macro nmon_outs msg + .set push + .set reorder + + ADR a1, \msg, t1 + + bal _nmon_outs + + .set pop + .endm + + + .macro mips_nmon + .set push + .set reorder + +#ifdef CONFIG_NMON +#ifdef CONFIG_NMON_USER_START + +#if CONFIG_NMON_USER_START_DELAY < 1 +#error CONFIG_NMON_USER_START_DELAY must be >= 1! +#endif + + nmon_outs msg_nmon_press_any_key + + li s0, CONFIG_NMON_USER_START_DELAY + move s1, s0 + +1: + li a0, '.' + bal _nmon_outc_a0 + addi s1, s1, -1 + bnez s1, 1b + + move s1, s0 + +nmon_wait_user: + pbl_sleep s2, CONFIG_NMON_1S_DELAY + + nmon_outs msg_bsp + + debug_ll_ns16550_check_char + + bnez v0, 3f + + addi s1, s1, -1 + bnez s1, nmon_wait_user + + nmon_outs msg_skipping_nmon + + b nmon_exit + +msg_nmon_press_any_key: + .asciz "\r\npress any key to start nmon\r\n" + + .align 4 +3: + /* get received char from ns16550's buffer */ + debug_ll_ns16550_getc +#endif /* CONFIG_NMON_USER_START */ + +nmon_main_help: +#ifdef CONFIG_NMON_HELP + nmon_outs msg_nmon_help +#endif /* CONFIG_NMON_HELP */ + +nmon_main: + nmon_outs msg_prompt + + debug_ll_ns16550_getc + + /* prepare a0 for debug_ll_ns16550_outc_a0 */ + move a0, v0 + + li v1, 'q' + bne v0, v1, 3f + + bal _nmon_outc_a0 + + b nmon_exit + +3: + li v1, 'd' + beq v0, v1, nmon_cmd_d + + li v1, 'w' + beq v0, v1, nmon_cmd_w + + li v1, 'g' + beq v0, v1, nmon_cmd_g + + b nmon_main_help + +nmon_cmd_d: + bal _nmon_outc_a0 + + li a0, ' ' + bal _nmon_outc_a0 + + bal _nmon_gethexw + + nmon_outs msg_nl + + lw a0, (v0) + debug_ll_ns16550_outhexw + + b nmon_main + +nmon_cmd_w: + bal _nmon_outc_a0 + + li a0, ' ' + bal _nmon_outc_a0 + bal _nmon_gethexw + move s0, v0 + + li a0, ' ' + bal _nmon_outc_a0 + bal _nmon_gethexw + + sw v0, (s0) + b nmon_main + +nmon_cmd_g: + bal _nmon_outc_a0 + + li a0, ' ' + bal _nmon_outc_a0 + + bal _nmon_gethexw + + nmon_outs msg_nl + + jal v0 + b nmon_main + +_nmon_outc_a0: + debug_ll_ns16550_outc_a0 + jr ra + +_nmon_outs: + lbu a0, 0(a1) + addi a1, a1, 1 + beqz a0, _nmon_jr_ra_exit + + debug_ll_ns16550_outc_a0 + + b _nmon_outs + +_nmon_gethexw: + + li t3, 8 + li t2, 0 + +_get_hex_digit: + debug_ll_ns16550_getc + + li v1, CODE_ESC + beq v0, v1, nmon_main + + li v1, '0' + bge v0, v1, 0f + b _get_hex_digit + +0: + li v1, '9' + ble v0, v1, 9f + + li v1, 'f' + ble v0, v1, 1f + b _get_hex_digit + +1: + li v1, 'a' + bge v0, v1, 8f + + b _get_hex_digit + +8: /* v0 \in {'a', 'b' ... 'f'} */ + sub a3, v0, v1 + addi a3, 0xa + b 0f + +9: /* v0 \in {'0', '1' ... '9'} */ + li a3, '0' + sub a3, v0, a3 + +0: move a0, v0 + debug_ll_ns16550_outc_a0 + + sll t2, t2, 4 + or t2, t2, a3 + sub t3, t3, 1 + + beqz t3, 0f + + b _get_hex_digit + +0: + move v0, t2 + +_nmon_jr_ra_exit: + jr ra + +msg_prompt: + .asciz "\r\nnmon> " + +msg_nl: + .asciz "\r\n" + +msg_bsp: + .asciz "\b \b" + +msg_skipping_nmon: + .asciz "skipping nmon..." + +#ifdef CONFIG_NMON_HELP +msg_nmon_help: + .ascii "\r\n\r\nnmon commands:\r\n" + .ascii " q - quit\r\n" + .ascii " d <addr> - read 32-bit word from <addr>\r\n" + .ascii " w <addr> <val> - write 32-bit word to <addr>\r\n" + .ascii " g <addr> - jump to <addr>\r\n" + .asciz " use <ESC> key to interrupt current command\r\n" +#endif /* CONFIG_NMON_HELP */ + + .align 4 + +nmon_exit: + + nmon_outs msg_nl + +#endif /* CONFIG_NMON */ + .set pop + .endm diff --git a/arch/mips/mach-ar231x/Kconfig b/arch/mips/mach-ar231x/Kconfig index 1c6a12f885..3f338ea115 100644 --- a/arch/mips/mach-ar231x/Kconfig +++ b/arch/mips/mach-ar231x/Kconfig @@ -9,6 +9,8 @@ choice config BOARD_NETGEAR_WG102 bool "Netgear WG102" + select HAVE_PBL_IMAGE + select HAVE_IMAGE_COMPRESSION endchoice diff --git a/arch/mips/mach-ar231x/include/mach/debug_ll.h b/arch/mips/mach-ar231x/include/mach/debug_ll.h new file mode 100644 index 0000000000..5ab7f9a26a --- /dev/null +++ b/arch/mips/mach-ar231x/include/mach/debug_ll.h @@ -0,0 +1,27 @@ +/* + * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com> + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MACH_AR231X_DEBUG_LL__ +#define __MACH_AR231X_DEBUG_LL__ + +/** @file + * This File contains declaration for early output support + */ +#include <board/debug_ll.h> +#include <asm/debug_ll_ns16550.h> + +#endif /* __MACH_AR231X_DEBUG_LL__ */ diff --git a/arch/mips/mach-ar231x/include/mach/pbl_macros.h b/arch/mips/mach-ar231x/include/mach/pbl_macros.h new file mode 100644 index 0000000000..cb72dbe466 --- /dev/null +++ b/arch/mips/mach-ar231x/include/mach/pbl_macros.h @@ -0,0 +1,177 @@ +#ifndef __ASM_MACH_AR2312_PBL_MACROS_H +#define __ASM_MACH_AR2312_PBL_MACROS_H + +#include <asm/regdef.h> +#include <mach/ar2312_regs.h> + +.macro pbl_ar2312_pll + .set push + .set noreorder + + mfc0 k0, CP0_STATUS + li k1, ST0_NMI + and k1, k1, k0 + bnez k1, pllskip + nop + + /* Clear any prior AHB errors by reading both addr registers */ + li t0, KSEG1 | AR2312_PROCADDR + lw zero, 0(t0) + li t0, KSEG1 | AR2312_DMAADDR + lw zero, 0(t0) + + pbl_sleep t2, 4000 + + li t0, KSEG1 | AR2312_CLOCKCTL2 + lw t1, (t0) + bgez t1, pllskip /* upper bit guaranteed non-0 at reset */ + nop + + /* For Viper 0xbc003064 register has to be programmed with 0x91000 to + * get 180Mhz Processor clock + * Set /2 clocking and turn OFF AR2312_CLOCKCTL2_STATUS_PLL_BYPASS. + * Processor RESETs at this point; the CLOCKCTL registers retain + * their new values across the reset. + */ + + li t0, KSEG1 | AR2312_CLOCKCTL1 + li t1, AR2313_CLOCKCTL1_SELECTION + sw t1, (t0) + + li t0, KSEG1 | AR2312_CLOCKCTL2 + li t1, AR2312_CLOCKCTL2_WANT_RESET + sw t1, (t0) /* reset CPU */ +1: b 1b /* NOTREACHED */ + nop +pllskip: + + .set pop +.endm + +.macro pbl_ar2312_rst_uart0 + .set push + .set noreorder + + li a0, KSEG1 | AR2312_RESET + lw t0, 0(a0) + and t0, ~AR2312_RESET_APB + or t0, AR2312_RESET_UART0 + sw t0, 0(a0) + lw zero, 0(a0) /* flush */ + + and t0, ~AR2312_RESET_UART0 + sw t0, 0(a0) + lw zero, 0(a0) /* flush */ + +1: /* Use internal clocking */ + li a0, KSEG1 | AR2312_CLOCKCTL0 + lw t0, 0(a0) + and t0, ~AR2312_CLOCKCTL_UART0 + sw t0, 0(a0) + + .set pop +.endm + +.macro pbl_ar2312_x16_sdram + .set push + .set noreorder + + li a0, KSEG1 | AR2312_MEM_CFG0 + li a1, KSEG1 | AR2312_MEM_CFG1 + li a2, KSEG1 | AR2312_MEM_REF + + li a3, MEM_CFG1_E0 | (MEM_CFG1_AC_128 << MEM_CFG1_AC0_S) + + /* Set the I and M bits to issue an SDRAM nop */ + ori t0, a3, MEM_CFG1_M | MEM_CFG1_I + sw t0, 0(a1) /* AR2312_MEM_CFG1 */ + + pbl_sleep t2, 50 + + /* Reset the M bit to issue an SDRAM PRE-ALL */ + ori t0, a3, MEM_CFG1_I + sw t0, 0(a1) /* AR2312_MEM_CFG1 */ + sync + + /* Generate a refresh every 16 clocks (spec says 10) */ + li t0, 16 /* very fast refresh for now */ + sw t0, 0(a2) /* AR2312_MEM_REF */ + + pbl_sleep t2, 5 + + /* Set command write mode, and read SDRAM */ + ori t0, a3, MEM_CFG1_M + sw t0, 0(a1) /* AR2312_MEM_CFG1 */ + sync + + li t0, KSEG1 | AR2312_SDRAM0 + or t0, 0x23000 /* 16bit burst */ + lw zero, 0(t0) + + /* Program configuration register */ + li t0, MEM_CFG0_C | MEM_CFG0_C2 | MEM_CFG0_R1 | \ + MEM_CFG0_B0 | MEM_CFG0_X + sw t0, 0(a0) /* AR2312_MEM_CFG0 */ + sync + + li t0, AR2312_SDRAM_MEMORY_REFRESH_VALUE + sw t0, 0(a2) /* AR2312_MEM_REF */ + sync + + /* Clear I and M and set cfg1 to the normal operational value */ + sw a3, 0(a1) /* AR2312_MEM_CFG1 */ + sync + + pbl_sleep t2, 10 + + /* Now we need to set size of RAM to prevent some wired errors. + * Since I do not have access to any board with two SDRAM chips, or + * any was registered in the wild - we will support only one. */ + /* So, lets find the beef */ + li a0, KSEG1 | AR2312_MEM_CFG1 + li a1, KSEG1 | AR2312_SDRAM0 + li a2, 0xdeadbeef + li t0, 0x200000 + li t1, MEM_CFG1_AC_2 + + /* We will write some magic word to the beginning of RAM, + * and see if it appears somewhere else. If yes, we made + * a travel around the world. */ + + /* But first of all save original state of the first RAM word. */ + lw a3, 0(a1) + sw a2, 0(a1) + +find_the_beef: + or t2, a1, t0 + lw t3, 0(t2) + beq a2, t3, 1f + nop + sll t0, 1 + add t1, 1 + /* we should have some limit here. */ + blt t1, MEM_CFG1_AC_64, find_the_beef + nop + b make_beefsteak + nop + + /* additional paranoid check */ +1: + sw zero, 0(a1) + lw t3, 0(t2) + bne zero, t3, find_the_beef + nop + +make_beefsteak: + /* create new config for AR2312_MEM_CFG1 and overwrite it */ + sll t1, MEM_CFG1_AC0_S + or t2, t1, MEM_CFG1_E0 + sw t2, 0(a0) /* AR2312_MEM_CFG1 */ + + /* restore original state of the first RAM word */ + sw a3, 0(a1) + + .set pop +.endm + +#endif /* __ASM_MACH_AR2312_PBL_MACROS_H */ diff --git a/arch/mips/mach-malta/Kconfig b/arch/mips/mach-malta/Kconfig index 1d291dc72e..67763f8d22 100644 --- a/arch/mips/mach-malta/Kconfig +++ b/arch/mips/mach-malta/Kconfig @@ -11,6 +11,7 @@ config BOARD_QEMU_MALTA bool "qemu malta" select HAVE_PBL_IMAGE select HAVE_IMAGE_COMPRESSION + select HAS_NMON endchoice diff --git a/arch/mips/mach-malta/include/mach/debug_ll.h b/arch/mips/mach-malta/include/mach/debug_ll.h index 3e8b01b6a9..c9e89bcc9d 100644 --- a/arch/mips/mach-malta/include/mach/debug_ll.h +++ b/arch/mips/mach-malta/include/mach/debug_ll.h @@ -18,11 +18,10 @@ /** @file * This File contains declaration for early output support */ -#ifndef __INCLUDE_ARCH_DEBUG_LL_H__ -#define __INCLUDE_ARCH_DEBUG_LL_H__ - -#include <mach/hardware.h> +#ifndef __MACH_MALTA_DEBUG_LL_H__ +#define __MACH_MALTA_DEBUG_LL_H__ +#include <board/debug_ll.h> #include <asm/debug_ll_ns16550.h> -#endif /* __INCLUDE_ARCH_DEBUG_LL_H__ */ +#endif /* __MACH_MALTA_DEBUG_LL_H__ */ diff --git a/arch/mips/mach-malta/include/mach/hardware.h b/arch/mips/mach-malta/include/mach/hardware.h index 8bd814d240..affb4ea081 100644 --- a/arch/mips/mach-malta/include/mach/hardware.h +++ b/arch/mips/mach-malta/include/mach/hardware.h @@ -18,9 +18,7 @@ #ifndef __INCLUDE_ARCH_HARDWARE_H__ #define __INCLUDE_ARCH_HARDWARE_H__ -#define DEBUG_LL_UART_ADDR 0xb00003f8 -#define DEBUG_LL_UART_SHIFT 0 -#define DEBUG_LL_UART_DIVISOR 1 /* no matter for emulated port */ +#define MALTA_PIIX4_UART0 0xb00003f8 /* * Reset register. diff --git a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c index edb9bcd273..6426bd3c7e 100644 --- a/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c +++ b/arch/ppc/boards/freescale-p2020rdb/p2020rdb.c @@ -59,12 +59,19 @@ #define SYSCLK_50 50000000 #define SYSCLK_100 100000000 -/* Ethernet. Use eTSEC3 */ +/* Define attributes for eTSEC2 and eTSEC3 */ static struct gfar_info_struct gfar_info[] = { { + .phyaddr = 0, + .tbiana = 0x1a0, + .tbicr = 0x9140, + .mdiobus_tbi = 1, + }, + { .phyaddr = 1, .tbiana = 0, .tbicr = 0, + .mdiobus_tbi = 2, }, }; @@ -82,8 +89,8 @@ static int devices_init(void) add_generic_device("i2c-fsl", 1, NULL, I2C2_BASE_ADDR, 0x100, IORESOURCE_MEM, &i2cplat); - /* eTSEC3 */ - fsl_eth_init(3, &gfar_info[0]); + fsl_eth_init(2, &gfar_info[0]); + fsl_eth_init(3, &gfar_info[1]); devfs_add_partition("nor0", 0xf80000, 0x80000, DEVFS_PARTITION_FIXED, "self0"); diff --git a/arch/ppc/configs/p2020rdb_defconfig b/arch/ppc/configs/p2020rdb_defconfig index 7690327424..0f77903286 100644 --- a/arch/ppc/configs/p2020rdb_defconfig +++ b/arch/ppc/configs/p2020rdb_defconfig @@ -24,9 +24,11 @@ CONFIG_RELOCATABLE=y CONFIG_DRIVER_NET_GIANFAR=y CONFIG_NET=y CONFIG_NET_PING=y +CONFIG_FS_TFTP=y CONFIG_NET_TFTP=y +CONFIG_CMD_TFTP=y CONFIG_PING=y -CONFIG_TFTP=y CONFIG_I2C=y CONFIG_I2C_IMX=y CONFIG_CMD_I2C=y +CONFIG_CMD_MIITOOL=y diff --git a/arch/ppc/ddr-8xxx/common_timing_params.h b/arch/ppc/ddr-8xxx/common_timing_params.h new file mode 100644 index 0000000000..b2621937ea --- /dev/null +++ b/arch/ppc/ddr-8xxx/common_timing_params.h @@ -0,0 +1,44 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#ifndef COMMON_TIMING_PARAMS_H +#define COMMON_TIMING_PARAMS_H + +struct common_timing_params_s { + uint32_t tCKmin_X_ps; + uint32_t tCKmax_ps; + uint32_t tCKmax_max_ps; + uint32_t tRCD_ps; + uint32_t tRP_ps; + uint32_t tRAS_ps; + uint32_t tWR_ps; /* maximum = 63750 ps */ + uint32_t tWTR_ps; /* maximum = 63750 ps */ + uint32_t tRFC_ps; /* maximum = 255 ns + 256 ns + .75 ns + = 511750 ps */ + uint32_t tRRD_ps; /* maximum = 63750 ps */ + uint32_t tRC_ps; /* maximum = 254 ns + .75 ns = 254750 ps */ + uint32_t refresh_rate_ps; + uint32_t tIS_ps; /* byte 32, spd->ca_setup */ + uint32_t tIH_ps; /* byte 33, spd->ca_hold */ + uint32_t tDS_ps; /* byte 34, spd->data_setup */ + uint32_t tDH_ps; /* byte 35, spd->data_hold */ + uint32_t tRTP_ps; /* byte 38, spd->trtp */ + uint32_t tDQSQ_max_ps; /* byte 44, spd->tdqsq */ + uint32_t tQHS_ps; /* byte 45, spd->tqhs */ + uint32_t ndimms_present; + uint32_t lowest_common_SPD_caslat; + uint32_t highest_common_derated_caslat; + uint32_t additive_latency; + uint32_t all_DIMMs_burst_lengths_bitmask; + uint32_t all_DIMMs_registered; + uint32_t all_DIMMs_ECC_capable; + uint64_t total_mem; + uint64_t base_address; +}; + +#endif diff --git a/arch/ppc/ddr-8xxx/ctrl_regs.c b/arch/ppc/ddr-8xxx/ctrl_regs.c new file mode 100644 index 0000000000..3f8ecf7c28 --- /dev/null +++ b/arch/ppc/ddr-8xxx/ctrl_regs.c @@ -0,0 +1,425 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + */ + +/* + * Generic driver for Freescale DDR2 memory controller. + * Based on code from spd_sdram.c + * Author: James Yang [at freescale.com] + */ + +#include <common.h> +#include <asm/fsl_ddr_sdram.h> +#include "ddr.h" + +static void set_csn_config(int dimm_number, int i, + struct fsl_ddr_cfg_regs_s *ddr, + const struct memctl_options_s *popts, + const struct dimm_params_s *dimm) +{ + uint32_t cs_n_en = 0, ap_n_en = 0, odt_rd_cfg = 0, odt_wr_cfg = 0, + ba_bits_cs_n = 0, row_bits_cs_n = 0, col_bits_cs_n = 0, + n_banks_per_sdram_device; + int go_config = 0; + + switch (i) { + case 0: + if (dimm[dimm_number].n_ranks > 0) + go_config = 1; + break; + case 1: + if ((dimm_number == 0 && dimm[0].n_ranks > 1) || + (dimm_number == 1 && dimm[1].n_ranks > 0)) + go_config = 1; + break; + case 2: + if ((dimm_number == 0 && dimm[0].n_ranks > 2) || + (dimm_number >= 1 && dimm[dimm_number].n_ranks > 0)) + go_config = 1; + break; + case 3: + if ((dimm_number == 0 && dimm[0].n_ranks > 3) || + (dimm_number == 1 && dimm[1].n_ranks > 1) || + (dimm_number == 3 && dimm[3].n_ranks > 0)) + go_config = 1; + break; + default: + break; + } + + if (go_config) { + /* Chip Select enable */ + cs_n_en = 1; + /* CSn auto-precharge enable */ + ap_n_en = popts->cs_local_opts[i].auto_precharge; + /* ODT for reads configuration */ + odt_rd_cfg = popts->cs_local_opts[i].odt_rd_cfg; + /* ODT for writes configuration */ + odt_wr_cfg = popts->cs_local_opts[i].odt_wr_cfg; + /* Num of bank bits for SDRAM on CSn */ + n_banks_per_sdram_device = + dimm[dimm_number].n_banks_per_sdram_device; + ba_bits_cs_n = __ilog2(n_banks_per_sdram_device) - 2; + /* Num of row bits for SDRAM on CSn */ + row_bits_cs_n = dimm[dimm_number].n_row_addr - 12; + /* Num of ocl bits for SDRAM on CSn */ + col_bits_cs_n = dimm[dimm_number].n_col_addr - 8; + } + + ddr->cs[i].config = (((cs_n_en & 0x1) << 31) + | ((ap_n_en & 0x1) << 23) + | ((odt_rd_cfg & 0x7) << 20) + | ((odt_wr_cfg & 0x7) << 16) + | ((ba_bits_cs_n & 0x3) << 14) + | ((row_bits_cs_n & 0x7) << 8) + | ((col_bits_cs_n & 0x7) << 0)); +} + +static void set_timing_cfg_0(struct fsl_ddr_cfg_regs_s *ddr, + const struct memctl_options_s *popts) +{ + uint32_t trwt_mclk = 0; + + if (popts->trwt_override) + trwt_mclk = popts->trwt; + + ddr->timing_cfg_0 = (((trwt_mclk & 0x3) << 30) + | ((popts->txard & 0x7) << 20) + | ((popts->txp & 0xF) << 16) + | ((popts->taxpd & 0xf) << 8) + | ((popts->tmrd & 0xf) << 0)); +} + +static void set_timing_cfg_3(struct fsl_ddr_cfg_regs_s *ddr, + const struct common_timing_params_s *dimm, + uint32_t cas_latency) +{ + uint32_t ext_pretoact, ext_acttopre, ext_acttorw, ext_refrec; + + ext_pretoact = picos_to_mclk(dimm->tRP_ps) >> 4; + ext_acttopre = picos_to_mclk(dimm->tRAS_ps) >> 4; + ext_acttorw = picos_to_mclk(dimm->tRCD_ps) >> 4; + cas_latency = ((cas_latency << 1) - 1) >> 4; + ext_refrec = (picos_to_mclk(dimm->tRFC_ps) - 8) >> 4; + + ddr->timing_cfg_3 = (((ext_pretoact & 0x1) << 28) + | ((ext_acttopre & 0x2) << 24) + | ((ext_acttorw & 0x1) << 22) + | ((ext_refrec & 0x1F) << 16) + | ((cas_latency & 0x3) << 12)); +} + +static void set_timing_cfg_1(struct fsl_ddr_cfg_regs_s *ddr, + const struct common_timing_params_s *dimm, + uint32_t cas_latency) +{ + uint32_t pretoact_mclk, acttopre_mclk, acttorw_mclk, refrec_ctrl, + wrrec_mclk, acttoact_mclk, wrtord_mclk; + /* DDR_SDRAM_MODE doesn't support 9,11,13,15 */ + static const u8 wrrec_table[] = { + 1, 2, 3, 4, 5, 6, 7, 8, 10, 10, 12, 12, 14, 14, 0, 0 + }; + + pretoact_mclk = picos_to_mclk(dimm->tRP_ps); + acttopre_mclk = picos_to_mclk(dimm->tRAS_ps); + acttorw_mclk = picos_to_mclk(dimm->tRCD_ps); + + /* + * Translate CAS Latency to a DDR controller field value: + * + * CAS Lat DDR II Ctrl + * Clocks SPD Bit Value + * ------- ------- ------ + * 1.0 0001 + * 1.5 0010 + * 2.0 2 0011 + * 2.5 0100 + * 3.0 3 0101 + * 3.5 0110 + * 4.0 4 0111 + * 4.5 1000 + * 5.0 5 1001 + */ + cas_latency = (cas_latency << 1) - 1; + refrec_ctrl = picos_to_mclk(dimm->tRFC_ps) - 8; + acttoact_mclk = picos_to_mclk(dimm->tRRD_ps); + + wrrec_mclk = picos_to_mclk(dimm->tWR_ps); + if (wrrec_mclk <= 16) + wrrec_mclk = wrrec_table[wrrec_mclk - 1]; + + wrtord_mclk = picos_to_mclk(dimm->tWTR_ps); + if (wrtord_mclk < 2) + wrtord_mclk = 2; + + ddr->timing_cfg_1 = (((pretoact_mclk & 0x0F) << 28) + | ((acttopre_mclk & 0x0F) << 24) + | ((acttorw_mclk & 0xF) << 20) + | ((cas_latency & 0xF) << 16) + | ((refrec_ctrl & 0xF) << 12) + | ((wrrec_mclk & 0x0F) << 8) + | ((acttoact_mclk & 0x0F) << 4) + | ((wrtord_mclk & 0x0F) << 0)); +} + +static void set_timing_cfg_2(struct fsl_ddr_cfg_regs_s *ddr, + const struct memctl_options_s *popts, + const struct common_timing_params_s *dimm, + uint32_t cas_latency, uint32_t additive_latency) +{ + uint32_t cpo, rd_to_pre, wr_data_delay, cke_pls, four_act; + + cpo = popts->cpo_override; + rd_to_pre = picos_to_mclk(dimm->tRTP_ps); + if (rd_to_pre < 2) + rd_to_pre = 2; + + if (additive_latency) + rd_to_pre += additive_latency; + + wr_data_delay = popts->write_data_delay; + cke_pls = picos_to_mclk(popts->tCKE_clock_pulse_width_ps); + four_act = picos_to_mclk(popts->tFAW_window_four_activates_ps); + + ddr->timing_cfg_2 = (((additive_latency & 0xf) << 28) + | ((cpo & 0x1f) << 23) + | (((cas_latency - 1) & 0xf) << 19) + | ((rd_to_pre & 7) << 13) + | ((wr_data_delay & 7) << 10) + | ((cke_pls & 0x7) << 6) + | ((four_act & 0x3f) << 0)); +} + +static void set_ddr_sdram_cfg(struct fsl_ddr_cfg_regs_s *ddr, + const struct memctl_options_s *popts, + const struct common_timing_params_s *dimm) +{ + uint32_t mem_en, sren, ecc_en, sdram_type, dyn_pwr, dbw, twoT_en, hse; + + mem_en = 1; + sren = popts->self_refresh_in_sleep; + if (dimm->all_DIMMs_ECC_capable) + ecc_en = popts->ECC_mode; + else + ecc_en = 0; + + if (popts->sdram_type) + sdram_type = popts->sdram_type; + else + sdram_type = FSL_SDRAM_TYPE; + + twoT_en = popts->twoT_en; + dyn_pwr = popts->dynamic_power; + dbw = popts->data_bus_width; + hse = popts->half_strength_driver_enable; + + ddr->ddr_sdram_cfg = (((mem_en & 0x1) << 31) + | ((sren & 0x1) << 30) + | ((ecc_en & 0x1) << 29) + | ((sdram_type & 0x7) << 24) + | ((dyn_pwr & 0x1) << 21) + | ((dbw & 0x3) << 19) + | ((twoT_en & 0x1) << 15) + | ((hse & 0x1) << 3)); +} + +static void set_ddr_sdram_cfg_2(struct fsl_ddr_cfg_regs_s *ddr, + const struct memctl_options_s *popts) +{ + struct ddr_board_info_s *bi = popts->board_info; + uint32_t i, dll_rst_dis, dqs_cfg, odt_cfg = 0, num_pr, d_init = 0; + + dll_rst_dis = popts->dll_rst_dis; + dqs_cfg = popts->DQS_config; + + /* + * Check for On-Die Termination options and + * assert ODT only during reads to DRAM. + */ + for (i = 0; i < bi->cs_per_ctrl; i++) + if (popts->cs_local_opts[i].odt_rd_cfg || + popts->cs_local_opts[i].odt_wr_cfg) { + odt_cfg = SDRAM_CFG2_ODT_ONLY_READ; + break; + } + + /* Default number of posted refresh */ + num_pr = 1; + + if (popts->ECC_init_using_memctl) { + d_init = 1; + ddr->ddr_data_init = popts->data_init; + } + + ddr->ddr_sdram_cfg_2 = (((dll_rst_dis & 0x1) << 29) + | ((dqs_cfg & 0x3) << 26) + | ((odt_cfg & 0x3) << 21) + | ((num_pr & 0xf) << 12) + | ((d_init & 0x1) << 4)); +} + +static void +set_ddr_sdram_interval(struct fsl_ddr_cfg_regs_s *ddr, + const struct memctl_options_s *popts, + const struct common_timing_params_s *dimm) +{ + uint32_t refint, bstopre; + + refint = picos_to_mclk(dimm->refresh_rate_ps); + /* Precharge interval */ + bstopre = popts->bstopre; + + ddr->ddr_sdram_interval = (((refint & 0xFFFF) << 16) + | ((bstopre & 0x3FFF) << 0)); +} + +static void set_ddr_sdram_mode(struct fsl_ddr_cfg_regs_s *ddr, + const struct memctl_options_s *popts, + const struct common_timing_params_s *dimm, + uint32_t cas_latency, + uint32_t additive_latency) +{ + uint16_t esdmode, sdmode; + uint32_t dqs_en, rtt, al, wr, bl; + const uint32_t mclk_ps = get_memory_clk_period_ps(); + + /* DQS# Enable: 0=enable, 1=disable */ + dqs_en = !popts->DQS_config; + /* Posted CAS# additive latency (AL) */ + al = additive_latency; + /* Internal Termination Resistor */ + if (popts->rtt_override) + rtt = popts->rtt_override_value; + else + rtt = popts->cs_local_opts[0].odt_rtt_norm; + + /* + * Extended SDRAM mode. + * The variable also selects: + * - OCD set to exit mode + * - all outputs bit i.e DQ, DQS, RDQS output enabled + * - RDQS ball disabled + * - DQS ball enabled + * - DLL enabled + * - Output drive strength: full strength. + */ + esdmode = (((dqs_en & 0x1) << 10) + | ((rtt & 0x2) << 5) + | ((al & 0x7) << 3) + | ((rtt & 0x1) << 2)); + + /* Write recovery */ + wr = (dimm->tWR_ps + mclk_ps - 1) / (mclk_ps - 1); + + switch (popts->burst_length) { + case DDR_BL4: + bl = 2; + break; + case DDR_BL8: + bl = 3; + break; + default: + bl = 2; + break; + } + + /* SDRAM mode + * The variable also selects: + * - power down mode: fast exit (normal) + * - DLL reset disabled. + * - burst type: sequential + */ + sdmode = (((wr & 0x7) << 9) + | ((cas_latency & 0x7) << 4) + | ((bl & 0x7) << 0)); + + ddr->ddr_sdram_mode = (((esdmode & 0xFFFF) << 16) + | ((sdmode & 0xFFFF) << 0)); +} + +uint32_t check_fsl_memctl_config_regs(const struct fsl_ddr_cfg_regs_s *ddr) +{ + /* + * DDR_SDRAM_CFG[RD_EN] and DDR_SDRAM_CFG[2T_EN should not + * be set at the same time. + */ + if ((ddr->ddr_sdram_cfg & 0x10000000) && + (ddr->ddr_sdram_cfg & 0x00008000)) + return 1; + + return 0; +} + +uint32_t +compute_fsl_memctl_config_regs(const struct memctl_options_s *popts, + struct fsl_ddr_cfg_regs_s *ddr, + const struct common_timing_params_s *dimm, + const struct dimm_params_s *dimmp, + uint32_t dbw_cap_adj) +{ + struct ddr_board_info_s *binfo = popts->board_info; + uint32_t cas_latency, additive_latency, i, cs_per_dimm, + dimm_number; + uint64_t ea, sa, rank_density; + + if (dimm == NULL) + return 1; + + memset(ddr, 0, sizeof(struct fsl_ddr_cfg_regs_s)); + + /* Process overrides first. */ + if (popts->cas_latency_override) + cas_latency = popts->cas_latency_override_value; + else + cas_latency = dimm->lowest_common_SPD_caslat; + + if (popts->additive_latency_override) + additive_latency = popts->additive_latency_override_value; + else + additive_latency = dimm->additive_latency; + + /* Chip Select Memory Bounds (CSn_BNDS) */ + for (i = 0; i < binfo->cs_per_ctrl; i++) { + cs_per_dimm = binfo->cs_per_ctrl / binfo->dimm_slots_per_ctrl; + dimm_number = i / cs_per_dimm; + rank_density = + dimmp[dimm_number].rank_density >> dbw_cap_adj; + + if (dimmp[dimm_number].n_ranks == 0) + continue; + + sa = dimmp[dimm_number].base_address; + ea = sa + rank_density - 1; + if (dimmp[dimm_number].n_ranks > (i % cs_per_dimm)) { + sa += (i % cs_per_dimm) * rank_density; + ea += (i % cs_per_dimm) * rank_density; + } else { + sa = 0; + ea = 0; + } + sa >>= 24; + ea >>= 24; + + ddr->cs[i].bnds = (((sa & 0xFFF) << 16) | ((ea & 0xFFF) << 0)); + set_csn_config(dimm_number, i, ddr, popts, dimmp); + } + + set_timing_cfg_0(ddr, popts); + set_timing_cfg_3(ddr, dimm, cas_latency); + set_timing_cfg_1(ddr, dimm, cas_latency); + set_timing_cfg_2(ddr, popts, dimm, cas_latency, additive_latency); + set_ddr_sdram_cfg(ddr, popts, dimm); + set_ddr_sdram_cfg_2(ddr, popts); + set_ddr_sdram_mode(ddr, popts, dimm, cas_latency, additive_latency); + set_ddr_sdram_interval(ddr, popts, dimm); + + ddr->ddr_data_init = popts->data_init; + ddr->ddr_sdram_clk_cntl = (popts->clk_adjust & 0xF) << 23; + + return check_fsl_memctl_config_regs(ddr); +} diff --git a/arch/ppc/ddr-8xxx/ddr.h b/arch/ppc/ddr-8xxx/ddr.h new file mode 100644 index 0000000000..6574500acc --- /dev/null +++ b/arch/ppc/ddr-8xxx/ddr.h @@ -0,0 +1,105 @@ +/* + * Copyright 2013 GE Intelligent Platforms, Inc + * Copyright 2008-2011 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#ifndef FSL_DDR_MAIN_H +#define FSL_DDR_MAIN_H + +#include <asm/fsl_ddr_sdram.h> +#include <asm/fsl_ddr_dimm_params.h> +#include <mach/fsl_i2c.h> +#include <mach/clock.h> +#include "common_timing_params.h" + +#ifdef CONFIG_MPC85xx +#include <mach/immap_85xx.h> +#endif + +/* Record of computed register values. */ +struct fsl_ddr_cfg_regs_s { + struct { + uint32_t bnds; + uint32_t config; + uint32_t config_2; + } cs[MAX_CHIP_SELECTS_PER_CTRL]; + uint32_t timing_cfg_3; + uint32_t timing_cfg_0; + uint32_t timing_cfg_1; + uint32_t timing_cfg_2; + uint32_t ddr_sdram_cfg; + uint32_t ddr_sdram_cfg_2; + uint32_t ddr_sdram_mode; + uint32_t ddr_sdram_mode_2; + uint32_t ddr_sdram_mode_3; + uint32_t ddr_sdram_mode_4; + uint32_t ddr_sdram_mode_5; + uint32_t ddr_sdram_mode_6; + uint32_t ddr_sdram_mode_7; + uint32_t ddr_sdram_mode_8; + uint32_t ddr_sdram_md_cntl; + uint32_t ddr_sdram_interval; + uint32_t ddr_data_init; + uint32_t ddr_sdram_clk_cntl; + uint32_t ddr_init_addr; + uint32_t ddr_init_ext_addr; + uint32_t err_disable; + uint32_t err_int_en; + uint32_t debug[32]; +}; + +/* + * Data Structures + * + * All data structures have to be on the stack + */ +struct fsl_ddr_info_s { + generic_spd_eeprom_t + spd_installed_dimms[MAX_DIMM_SLOTS_PER_CTLR]; + struct dimm_params_s + dimm_params[MAX_DIMM_SLOTS_PER_CTLR]; + struct memctl_options_s memctl_opts; + struct common_timing_params_s common_timing_params; + struct fsl_ddr_cfg_regs_s fsl_ddr_config_reg; + struct ddr_board_info_s board_info; +}; + +uint32_t mclk_to_picos(uint32_t mclk); +uint32_t get_memory_clk_period_ps(void); +uint32_t picos_to_mclk(uint32_t picos); +uint32_t check_fsl_memctl_config_regs(const struct fsl_ddr_cfg_regs_s *ddr); +uint64_t fsl_ddr_compute(struct fsl_ddr_info_s *pinfo); +uint32_t compute_fsl_memctl_config_regs( + const struct memctl_options_s *popts, + struct fsl_ddr_cfg_regs_s *ddr, + const struct common_timing_params_s *common_dimm, + const struct dimm_params_s *dimm_parameters, + uint32_t dbw_capacity_adjust); +uint32_t compute_dimm_parameters( + const generic_spd_eeprom_t *spdin, + struct dimm_params_s *pdimm); +uint32_t compute_lowest_common_dimm_parameters( + const struct dimm_params_s *dimm_params, + struct common_timing_params_s *outpdimm, + uint32_t number_of_dimms); +uint32_t populate_memctl_options( + int all_DIMMs_registered, + struct memctl_options_s *popts, + struct dimm_params_s *pdimm); +int fsl_ddr_set_lawbar( + const struct common_timing_params_s *memctl_common_params, + uint32_t memctl_interleaved); +int fsl_ddr_get_spd( + generic_spd_eeprom_t *ctrl_dimms_spd, + struct ddr_board_info_s *binfo); +int fsl_ddr_set_memctl_regs( + const struct fsl_ddr_info_s *info); +void fsl_ddr_board_options( + struct memctl_options_s *popts, + struct dimm_params_s *pdimm); +void fsl_ddr_board_info(struct ddr_board_info_s *info); +#endif diff --git a/arch/ppc/ddr-8xxx/ddr2_dimm_params.c b/arch/ppc/ddr-8xxx/ddr2_dimm_params.c new file mode 100644 index 0000000000..b36a8887da --- /dev/null +++ b/arch/ppc/ddr-8xxx/ddr2_dimm_params.c @@ -0,0 +1,303 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include <common.h> +#include <asm/fsl_ddr_sdram.h> +#include "ddr.h" +/* + * Calculate the Density of each Physical Rank. + * Returned size is in bytes. + * + * Table comes from Byte 31 of JEDEC SPD Spec. + * + * DDR II + * Bit Size Size + * --- ----- + * 7 high 512MB + * 6 256MB + * 5 128MB + * 4 16GB + * 3 8GB + * 2 4GB + * 1 2GB + * 0 low 1GB + * + * Reorder Table to be linear by stripping the bottom + * 2 or 5 bits off and shifting them up to the top. + * + */ +static uint64_t compute_ranksize(uint32_t mem_type, unsigned char row_dens) +{ + uint64_t bsize; + + bsize = ((row_dens >> 5) | ((row_dens & 31) << 3)); + bsize <<= 27ULL; + + return bsize; +} + +/* + * Convert a two-nibble BCD value into a cycle time. + * While the spec calls for nano-seconds, picos are returned. + */ +static uint32_t convert_bcd_tenths_to_cycle_time_ps(uint32_t spd_val) +{ + uint32_t tenths_ps[16] = { + 0, + 100, + 200, + 300, + 400, + 500, + 600, + 700, + 800, + 900, + 250, + 330, + 660, + 750, + 0, + 0 + }; + uint32_t whole_ns = (spd_val & 0xF0) >> 4; + uint32_t tenth_ns = spd_val & 0x0F; + uint32_t ps = (whole_ns * 1000) + tenths_ps[tenth_ns]; + + return ps; +} + +static uint32_t convert_bcd_hundredths_to_cycle_time_ps(uint32_t spd_val) +{ + uint32_t tenth_ns = (spd_val & 0xF0) >> 4; + uint32_t hundredth_ns = spd_val & 0x0F; + uint32_t ps = (tenth_ns * 100) + (hundredth_ns * 10); + + return ps; +} + +static uint32_t byte40_table_ps[8] = { + 0, + 250, + 330, + 500, + 660, + 750, + 0, + 0 +}; + +static uint32_t +compute_trfc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trfc) +{ + uint32_t trfc_ps; + + trfc_ps = (((trctrfc_ext & 0x1) * 256) + trfc) * 1000; + trfc_ps += byte40_table_ps[(trctrfc_ext >> 1) & 0x7]; + + return trfc_ps; +} + +static uint32_t +compute_trc_ps_from_spd(unsigned char trctrfc_ext, unsigned char trc) +{ + uint32_t trc_ps; + + trc_ps = (trc * 1000); + trc_ps += byte40_table_ps[(trctrfc_ext >> 4) & 0x7]; + + return trc_ps; +} + +/* + * Determine Refresh Rate. + * Table from SPD Spec, Byte 12, converted to picoseconds and + * filled in with "default" normal values. + */ +static uint32_t determine_refresh_rate_ps(const uint32_t spd_refresh) +{ + uint32_t refresh_time_ps[8] = { + 15625000, /* 0 Normal 1.00x */ + 3900000, /* 1 Reduced .25x */ + 7800000, /* 2 Extended .50x */ + 31300000, /* 3 Extended 2.00x */ + 62500000, /* 4 Extended 4.00x */ + 125000000, /* 5 Extended 8.00x */ + 15625000, /* 6 Normal 1.00x filler */ + 15625000, /* 7 Normal 1.00x filler */ + }; + + return refresh_time_ps[spd_refresh & 0x7]; +} + +/* + * The purpose of this function is to compute a suitable + * CAS latency given the DRAM clock period. The SPD only + * defines at most 3 CAS latencies. Typically the slower in + * frequency the DIMM runs at, the shorter its CAS latency can. + * be. If the DIMM is operating at a sufficiently low frequency, + * it may be able to run at a CAS latency shorter than the + * shortest SPD-defined CAS latency. + * + * If a CAS latency is not found, 0 is returned. + * + * Do this by finding in the standard speed table the longest + * tCKmin that doesn't exceed the value of mclk_ps (tCK). + * + * An assumption made is that the SDRAM device allows the + * CL to be programmed for a value that is lower than those + * advertised by the SPD. This is not always the case, + * as those modes not defined in the SPD are optional. + * + * CAS latency de-rating based upon values JEDEC Standard No. 79-2C + * Table 40, "DDR2 SDRAM standard speed bins and tCK, tRCD, tRP, tRAS, + * and tRC for corresponding bin" + * + * ordinal 2, ddr2_speed_bins[1] contains tCK for CL=3 + * Not certain if any good value exists for CL=2 + */ + /* CL2 CL3 CL4 CL5 CL6 CL7 */ +uint16_t ddr2_speed_bins[] = { 0, 5000, 3750, 3000, 2500, 1875 }; + +uint32_t compute_derated_DDR2_CAS_latency(uint32_t mclk_ps) +{ + const uint32_t num_speed_bins = ARRAY_SIZE(ddr2_speed_bins); + uint32_t lowest_tCKmin_found = 0, lowest_tCKmin_CL = 0, i, x; + + for (i = 0; i < num_speed_bins; i++) { + x = ddr2_speed_bins[i]; + if (x && (x <= mclk_ps) && (x >= lowest_tCKmin_found)) { + lowest_tCKmin_found = x; + lowest_tCKmin_CL = i + 2; + } + } + + return lowest_tCKmin_CL; +} + +/* + * compute_dimm_parameters for DDR2 SPD + * + * Compute DIMM parameters based upon the SPD information in SPD. + * Writes the results to the dimm_params_s structure pointed by pdimm. + */ +uint32_t +compute_dimm_parameters(const generic_spd_eeprom_t *spdin, + struct dimm_params_s *pdimm) +{ + const struct ddr2_spd_eeprom_s *spd = spdin; + uint32_t retval; + + if (!spd->mem_type) { + memset(pdimm, 0, sizeof(struct dimm_params_s)); + goto error; + } + + if (spd->mem_type != SPD_MEMTYPE_DDR2) + goto error; + + retval = ddr2_spd_checksum_pass(spd); + if (retval) + goto spd_err; + + /* + * The part name in ASCII in the SPD EEPROM is not null terminated. + * Guarantee null termination here by presetting all bytes to 0 + * and copying the part name in ASCII from the SPD onto it + */ + memset(pdimm->mpart, 0, sizeof(pdimm->mpart)); + memcpy(pdimm->mpart, spd->mpart, sizeof(pdimm->mpart) - 1); + + /* DIMM organization parameters */ + pdimm->n_ranks = (spd->mod_ranks & 0x7) + 1; + pdimm->rank_density = compute_ranksize(spd->mem_type, spd->rank_dens); + pdimm->capacity = pdimm->n_ranks * pdimm->rank_density; + pdimm->data_width = spd->dataw; + pdimm->primary_sdram_width = spd->primw; + pdimm->ec_sdram_width = spd->ecw; + + /* These are all the types defined by the JEDEC DDR2 SPD 1.3 spec */ + switch (spd->dimm_type) { + case DDR2_SPD_DIMMTYPE_RDIMM: + case DDR2_SPD_DIMMTYPE_72B_SO_RDIMM: + case DDR2_SPD_DIMMTYPE_MINI_RDIMM: + /* Registered/buffered DIMMs */ + pdimm->registered_dimm = 1; + break; + + case DDR2_SPD_DIMMTYPE_UDIMM: + case DDR2_SPD_DIMMTYPE_SO_DIMM: + case DDR2_SPD_DIMMTYPE_MICRO_DIMM: + case DDR2_SPD_DIMMTYPE_MINI_UDIMM: + /* Unbuffered DIMMs */ + pdimm->registered_dimm = 0; + break; + + case DDR2_SPD_DIMMTYPE_72B_SO_CDIMM: + default: + goto error; + } + + pdimm->n_row_addr = spd->nrow_addr; + pdimm->n_col_addr = spd->ncol_addr; + pdimm->n_banks_per_sdram_device = spd->nbanks; + pdimm->edc_config = spd->config; + pdimm->burst_lengths_bitmask = spd->burstl; + pdimm->row_density = spd->rank_dens; + + /* + * Calculate the Maximum Data Rate based on the Minimum Cycle time. + * The SPD clk_cycle field (tCKmin) is measured in tenths of + * nanoseconds and represented as BCD. + */ + pdimm->tCKmin_X_ps + = convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle); + pdimm->tCKmin_X_minus_1_ps + = convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle2); + pdimm->tCKmin_X_minus_2_ps + = convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle3); + pdimm->tCKmax_ps = convert_bcd_tenths_to_cycle_time_ps(spd->tckmax); + + /* + * Compute CAS latencies defined by SPD + * The SPD caslat_X should have at least 1 and at most 3 bits set. + * + * If cas_lat after masking is 0, the __ilog2 function returns + * 255 into the variable. This behavior is abused once. + */ + pdimm->caslat_X = __ilog2(spd->cas_lat); + pdimm->caslat_X_minus_1 = __ilog2(spd->cas_lat + & ~(1 << pdimm->caslat_X)); + pdimm->caslat_X_minus_2 = __ilog2(spd->cas_lat & ~(1 << pdimm->caslat_X) + & ~(1 << pdimm->caslat_X_minus_1)); + pdimm->caslat_lowest_derated + = compute_derated_DDR2_CAS_latency(get_memory_clk_period_ps()); + pdimm->tRCD_ps = spd->trcd * 250; + pdimm->tRP_ps = spd->trp * 250; + pdimm->tRAS_ps = spd->tras * 1000; + pdimm->tWR_ps = spd->twr * 250; + pdimm->tWTR_ps = spd->twtr * 250; + pdimm->tRFC_ps = compute_trfc_ps_from_spd(spd->trctrfc_ext, spd->trfc); + pdimm->tRRD_ps = spd->trrd * 250; + pdimm->tRC_ps = compute_trc_ps_from_spd(spd->trctrfc_ext, spd->trc); + pdimm->refresh_rate_ps = determine_refresh_rate_ps(spd->refresh); + pdimm->tIS_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_setup); + pdimm->tIH_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_hold); + pdimm->tDS_ps + = convert_bcd_hundredths_to_cycle_time_ps(spd->data_setup); + pdimm->tDH_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->data_hold); + pdimm->tRTP_ps = spd->trtp * 250; + pdimm->tDQSQ_max_ps = spd->tdqsq * 10; + pdimm->tQHS_ps = spd->tqhs * 10; + + return 0; +error: + return 1; +spd_err: + return 2; +} diff --git a/arch/ppc/ddr-8xxx/ddr2_setctrl.c b/arch/ppc/ddr-8xxx/ddr2_setctrl.c new file mode 100644 index 0000000000..14571b0489 --- /dev/null +++ b/arch/ppc/ddr-8xxx/ddr2_setctrl.c @@ -0,0 +1,58 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include <common.h> +#include <config.h> +#include <asm/io.h> +#include <asm/fsl_ddr_sdram.h> +#include <mach/early_udelay.h> +#include "ddr.h" + +int fsl_ddr_set_memctl_regs(const struct fsl_ddr_info_s *info) +{ + uint32_t i; + void __iomem *ddr; + const struct fsl_ddr_cfg_regs_s *regs; + + regs = &info->fsl_ddr_config_reg; + ddr = info->board_info.ddr_base; + + if (in_be32(ddr + DDR_OFF(SDRAM_CFG)) & SDRAM_CFG_MEM_EN) + return 0; + + for (i = 0; i < info->board_info.cs_per_ctrl; i++) { + out_be32(ddr + DDR_OFF(CS0_BNDS) + (i << 3), regs->cs[i].bnds); + out_be32(ddr + DDR_OFF(CS0_CONFIG) + (i << 2), + regs->cs[i].config); + } + + out_be32(ddr + DDR_OFF(TIMING_CFG_3), regs->timing_cfg_3); + out_be32(ddr + DDR_OFF(TIMING_CFG_0), regs->timing_cfg_0); + out_be32(ddr + DDR_OFF(TIMING_CFG_1), regs->timing_cfg_1); + out_be32(ddr + DDR_OFF(TIMING_CFG_2), regs->timing_cfg_2); + out_be32(ddr + DDR_OFF(SDRAM_CFG_2), regs->ddr_sdram_cfg_2); + out_be32(ddr + DDR_OFF(SDRAM_MODE), regs->ddr_sdram_mode); + out_be32(ddr + DDR_OFF(SDRAM_MODE_2), regs->ddr_sdram_mode_2); + out_be32(ddr + DDR_OFF(SDRAM_MD_CNTL), regs->ddr_sdram_md_cntl); + out_be32(ddr + DDR_OFF(SDRAM_INTERVAL), regs->ddr_sdram_interval); + out_be32(ddr + DDR_OFF(SDRAM_DATA_INIT), regs->ddr_data_init); + out_be32(ddr + DDR_OFF(SDRAM_CLK_CNTL), regs->ddr_sdram_clk_cntl); + out_be32(ddr + DDR_OFF(SDRAM_INIT_ADDR), regs->ddr_init_addr); + out_be32(ddr + DDR_OFF(SDRAM_INIT_ADDR_EXT), regs->ddr_init_ext_addr); + + early_udelay(200); + asm volatile("sync;isync"); + + out_be32(ddr + DDR_OFF(SDRAM_CFG), regs->ddr_sdram_cfg); + + /* Poll DDR_SDRAM_CFG_2[D_INIT] bit until auto-data init is done. */ + while (in_be32(ddr + DDR_OFF(SDRAM_CFG_2)) & SDRAM_CFG2_D_INIT) + early_udelay(10000); + + return 0; +} diff --git a/arch/ppc/ddr-8xxx/lc_common_dimm_params.c b/arch/ppc/ddr-8xxx/lc_common_dimm_params.c new file mode 100644 index 0000000000..a1addb0696 --- /dev/null +++ b/arch/ppc/ddr-8xxx/lc_common_dimm_params.c @@ -0,0 +1,214 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include <common.h> +#include <config.h> +#include <asm/fsl_ddr_sdram.h> + +#include "ddr.h" + +static unsigned int common_burst_length( + const struct dimm_params_s *dimm_params, + const unsigned int number_of_dimms) +{ + unsigned int i, temp; + + temp = 0xff; + for (i = 0; i < number_of_dimms; i++) + if (dimm_params[i].n_ranks) + temp &= dimm_params[i].burst_lengths_bitmask; + + return temp; +} + +/* Compute a CAS latency suitable for all DIMMs */ +static unsigned int compute_lowest_caslat( + const struct dimm_params_s *dimm_params, + const unsigned int number_of_dimms) +{ + uint32_t temp1, temp2, i, not_ok, lowest_good_caslat, + tCKmin_X_minus_1_ps, tCKmin_X_minus_2_ps; + const unsigned int mclk_ps = get_memory_clk_period_ps(); + + /* + * Step 1: find CAS latency common to all DIMMs using bitwise + * operation. + */ + temp1 = 0xFF; + for (i = 0; i < number_of_dimms; i++) + if (dimm_params[i].n_ranks) { + temp2 = 0; + temp2 |= 1 << dimm_params[i].caslat_X; + temp2 |= 1 << dimm_params[i].caslat_X_minus_1; + temp2 |= 1 << dimm_params[i].caslat_X_minus_2; + /* + * FIXME: If there was no entry for X-2 (X-1) in + * the SPD, then caslat_X_minus_2 + * (caslat_X_minus_1) contains either 255 or + * 0xFFFFFFFF because that's what the __ilog2 + * function returns for an input of 0. + * On 32-bit PowerPC, left shift counts with bit + * 26 set (that the value of 255 or 0xFFFFFFFF + * will have), cause the destination register to + * be 0. That is why this works. + */ + temp1 &= temp2; + } + + /* + * Step 2: check each common CAS latency against tCK of each + * DIMM's SPD. + */ + lowest_good_caslat = 0; + temp2 = 0; + while (temp1) { + not_ok = 0; + temp2 = __ilog2(temp1); + + for (i = 0; i < number_of_dimms; i++) { + if (!dimm_params[i].n_ranks) + continue; + + if (dimm_params[i].caslat_X == temp2) { + if (mclk_ps >= dimm_params[i].tCKmin_X_ps) + continue; + else + not_ok++; + } + + if (dimm_params[i].caslat_X_minus_1 == temp2) { + tCKmin_X_minus_1_ps = + dimm_params[i].tCKmin_X_minus_1_ps; + if (mclk_ps >= tCKmin_X_minus_1_ps) + continue; + else + not_ok++; + } + + if (dimm_params[i].caslat_X_minus_2 == temp2) { + tCKmin_X_minus_2_ps + = dimm_params[i].tCKmin_X_minus_2_ps; + if (mclk_ps >= tCKmin_X_minus_2_ps) + continue; + else + not_ok++; + } + } + + if (!not_ok) + lowest_good_caslat = temp2; + + temp1 &= ~(1 << temp2); + } + return lowest_good_caslat; +} + +/* + * compute_lowest_common_dimm_parameters() + * + * Determine the worst-case DIMM timing parameters from the set of DIMMs + * whose parameters have been computed into the array pointed to + * by dimm_params. + */ +unsigned int +compute_lowest_common_dimm_parameters(const struct dimm_params_s *dimm, + struct common_timing_params_s *out, + const unsigned int number_of_dimms) +{ + const uint32_t mclk_ps = get_memory_clk_period_ps(); + uint32_t temp1, i; + struct common_timing_params_s tmp = {0}; + + tmp.tCKmax_ps = 0xFFFFFFFF; + temp1 = 0; + for (i = 0; i < number_of_dimms; i++) { + if (dimm[i].n_ranks == 0) { + temp1++; + continue; + } + + /* + * Find minimum tCKmax_ps to find fastest slow speed, + * i.e., this is the slowest the whole system can go. + */ + tmp.tCKmax_ps = min(tmp.tCKmax_ps, dimm[i].tCKmax_ps); + + /* Find maximum value to determine slowest speed, delay, etc */ + tmp.tCKmin_X_ps = max(tmp.tCKmin_X_ps, dimm[i].tCKmin_X_ps); + tmp.tCKmax_max_ps = max(tmp.tCKmax_max_ps, dimm[i].tCKmax_ps); + tmp.tRCD_ps = max(tmp.tRCD_ps, dimm[i].tRCD_ps); + tmp.tRP_ps = max(tmp.tRP_ps, dimm[i].tRP_ps); + tmp.tRAS_ps = max(tmp.tRAS_ps, dimm[i].tRAS_ps); + tmp.tWR_ps = max(tmp.tWR_ps, dimm[i].tWR_ps); + tmp.tWTR_ps = max(tmp.tWTR_ps, dimm[i].tWTR_ps); + tmp.tRFC_ps = max(tmp.tRFC_ps, dimm[i].tRFC_ps); + tmp.tRRD_ps = max(tmp.tRRD_ps, dimm[i].tRRD_ps); + tmp.tRC_ps = max(tmp.tRC_ps, dimm[i].tRC_ps); + tmp.tIS_ps = max(tmp.tIS_ps, dimm[i].tIS_ps); + tmp.tIH_ps = max(tmp.tIH_ps, dimm[i].tIH_ps); + tmp.tDS_ps = max(tmp.tDS_ps, dimm[i].tDS_ps); + tmp.tDH_ps = max(tmp.tDH_ps, dimm[i].tDH_ps); + tmp.tRTP_ps = max(tmp.tRTP_ps, dimm[i].tRTP_ps); + tmp.tQHS_ps = max(tmp.tQHS_ps, dimm[i].tQHS_ps); + tmp.refresh_rate_ps = max(tmp.refresh_rate_ps, + dimm[i].refresh_rate_ps); + /* Find maximum tDQSQ_max_ps to find slowest timing. */ + tmp.tDQSQ_max_ps = max(tmp.tDQSQ_max_ps, dimm[i].tDQSQ_max_ps); + } + tmp.ndimms_present = number_of_dimms - temp1; + + if (temp1 == number_of_dimms) + return 0; + + temp1 = common_burst_length(dimm, number_of_dimms); + tmp.all_DIMMs_burst_lengths_bitmask = temp1; + tmp.all_DIMMs_registered = 0; + + tmp.lowest_common_SPD_caslat = compute_lowest_caslat(dimm, + number_of_dimms); + /* + * Compute a common 'de-rated' CAS latency. + * + * The strategy here is to find the *highest* de-rated cas latency + * with the assumption that all of the DIMMs will support a de-rated + * CAS latency higher than or equal to their lowest de-rated value. + */ + temp1 = 0; + for (i = 0; i < number_of_dimms; i++) + temp1 = max(temp1, dimm[i].caslat_lowest_derated); + tmp.highest_common_derated_caslat = temp1; + + temp1 = 1; + for (i = 0; i < number_of_dimms; i++) + if (dimm[i].n_ranks && + !(dimm[i].edc_config & EDC_ECC)) { + temp1 = 0; + break; + } + tmp.all_DIMMs_ECC_capable = temp1; + + if (mclk_ps > tmp.tCKmax_max_ps) + return 1; + + /* + * AL must be less or equal to tRCD. Typically, AL would + * be AL = tRCD - 1; + * + * When ODT read or write is enabled the sum of CAS latency + + * additive latency must be at least 3 cycles. + * + */ + if ((tmp.lowest_common_SPD_caslat < 4) && (picos_to_mclk(tmp.tRCD_ps) > + tmp.lowest_common_SPD_caslat)) + tmp.additive_latency = picos_to_mclk(tmp.tRCD_ps) - + tmp.lowest_common_SPD_caslat; + + memcpy(out, &tmp, sizeof(struct common_timing_params_s)); + + return 0; +} diff --git a/arch/ppc/ddr-8xxx/main.c b/arch/ppc/ddr-8xxx/main.c new file mode 100644 index 0000000000..6e4a02d568 --- /dev/null +++ b/arch/ppc/ddr-8xxx/main.c @@ -0,0 +1,238 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +/* + * Generic driver for Freescale DDR2 memory controller. + * Based on code from spd_sdram.c + * Author: James Yang [at freescale.com] + */ + +#include <common.h> +#include <config.h> +#include <asm/fsl_law.h> +#include "ddr.h" + +static int get_spd(generic_spd_eeprom_t *spd, + struct ddr_board_info_s *bi, u8 i2c_address) +{ + int ret; + + fsl_i2c_init(bi->i2c_base, bi->i2c_speed, bi->i2c_slave); + ret = fsl_i2c_read(bi->i2c_base, i2c_address, 0, 1, (uchar *) spd, + sizeof(generic_spd_eeprom_t)); + fsl_i2c_stop(bi->i2c_base); + + return ret; +} + +int fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd, + struct ddr_board_info_s *binfo) +{ + uint32_t i; + uint8_t i2c_address; + + for (i = 0; i < binfo->dimm_slots_per_ctrl; i++) { + if (binfo->spd_i2c_addr == NULL) + goto error; + i2c_address = binfo->spd_i2c_addr[i]; + if (get_spd(&(ctrl_dimms_spd[i]), binfo, i2c_address)) + goto error; + } + + return 0; +error: + return 1; +} + +static uint64_t step_assign_addresses(struct fsl_ddr_info_s *pinfo, + uint32_t dbw_cap_adj) +{ + uint64_t total_mem, current_mem_base, total_ctlr_mem, cap; + uint32_t ndimm, dw, j, found = 0; + + ndimm = pinfo->board_info.dimm_slots_per_ctrl; + /* + * If a reduced data width is requested, but the SPD + * specifies a physically wider device, adjust the + * computed dimm capacities accordingly before + * assigning addresses. + */ + switch (pinfo->memctl_opts.data_bus_width) { + case 2: + /* 16-bit */ + for (j = 0; j < ndimm; j++) { + if (!pinfo->dimm_params[j].n_ranks) + continue; + dw = pinfo->dimm_params[j].primary_sdram_width; + if ((dw == 72 || dw == 64)) { + dbw_cap_adj = 2; + break; + } else if ((dw == 40 || dw == 32)) { + dbw_cap_adj = 1; + break; + } + } + break; + case 1: + /* 32-bit */ + for (j = 0; j < ndimm; j++) { + dw = pinfo->dimm_params[j].data_width; + if (pinfo->dimm_params[j].n_ranks + && (dw == 72 || dw == 64)) { + /* + * FIXME: can't really do it + * like this because this just + * further reduces the memory + */ + found = 1; + break; + } + } + if (found) + dbw_cap_adj = 1; + break; + case 0: + /* 64-bit */ + break; + default: + return 1; + } + + current_mem_base = 0ull; + total_mem = 0; + total_ctlr_mem = 0; + pinfo->common_timing_params.base_address = current_mem_base; + + for (j = 0; j < ndimm; j++) { + cap = pinfo->dimm_params[j].capacity >> dbw_cap_adj; + pinfo->dimm_params[j].base_address = current_mem_base; + current_mem_base += cap; + total_ctlr_mem += cap; + + } + + pinfo->common_timing_params.total_mem = total_ctlr_mem; + total_mem += total_ctlr_mem; + + return total_mem; +} + +static uint32_t retrieve_max_size(struct fsl_ddr_cfg_regs_s *ddr_reg, + uint32_t ncs) +{ + uint32_t max_end = 0, end, i; + + for (i = 0; i < ncs; i++) + if (ddr_reg->cs[i].config & 0x80000000) { + end = ddr_reg->cs[i].bnds & 0xFFF; + if (end > max_end) + max_end = end; + } + + return max_end; +} + +static uint32_t compute_dimm_param(struct fsl_ddr_info_s *pinfo, uint32_t ndimm) +{ + struct dimm_params_s *pdimm; + generic_spd_eeprom_t *spd; + uint32_t i, retval; + + for (i = 0; i < ndimm; i++) { + spd = &(pinfo->spd_installed_dimms[i]); + pdimm = &(pinfo->dimm_params[i]); + + retval = compute_dimm_parameters(spd, pdimm); + + if (retval == 2) /* Fatal error */ + return 1; + } + + return 0; +} + +uint64_t fsl_ddr_compute(struct fsl_ddr_info_s *pinfo) +{ + uint64_t total_mem = 0; + uint32_t ncs, ndimm, max_end = 0; + struct fsl_ddr_cfg_regs_s *ddr_reg; + struct common_timing_params_s *timing_params; + /* data bus width capacity adjust shift amount */ + uint32_t dbw_capacity_adjust; + + ddr_reg = &pinfo->fsl_ddr_config_reg; + timing_params = &pinfo->common_timing_params; + ncs = pinfo->board_info.cs_per_ctrl; + ndimm = pinfo->board_info.dimm_slots_per_ctrl; + dbw_capacity_adjust = 0; + pinfo->memctl_opts.board_info = &pinfo->board_info; + + /* STEP 1: Gather all DIMM SPD data */ + if (fsl_ddr_get_spd(pinfo->spd_installed_dimms, + pinfo->memctl_opts.board_info)) + return 0; + + /* STEP 2: Compute DIMM parameters from SPD data */ + if (compute_dimm_param(pinfo, ndimm)) + return 0; + + /* + * STEP 3: Compute a common set of timing parameters + * suitable for all of the DIMMs on each memory controller + */ + compute_lowest_common_dimm_parameters(pinfo->dimm_params, + timing_params, ndimm); + + /* STEP 4: Gather configuration requirements from user */ + populate_memctl_options(timing_params->all_DIMMs_registered, + &pinfo->memctl_opts, + pinfo->dimm_params); + + /* STEP 5: Assign addresses to chip selects */ + total_mem = step_assign_addresses(pinfo, dbw_capacity_adjust); + + /* STEP 6: compute controller register values */ + if (timing_params->ndimms_present == 0) + memset(ddr_reg, 0, sizeof(struct fsl_ddr_cfg_regs_s)); + + compute_fsl_memctl_config_regs(&pinfo->memctl_opts, + ddr_reg, timing_params, + pinfo->dimm_params, + dbw_capacity_adjust); + + max_end = retrieve_max_size(ddr_reg, ncs); + total_mem = 1 + (((uint64_t)max_end << 24ULL) | 0xFFFFFFULL); + + return total_mem; +} + +/* + * fsl_ddr_sdram(): + * This is the main function to initialize the memory. + * + * It returns amount of memory configured in bytes. + */ +phys_size_t fsl_ddr_sdram(void) +{ + uint64_t total_memory; + struct fsl_ddr_info_s info; + + memset(&info, 0, sizeof(struct fsl_ddr_info_s)); + /* Gather board information on the memory controller and I2C bus. */ + fsl_ddr_board_info(&info.board_info); + + total_memory = fsl_ddr_compute(&info); + + if (info.common_timing_params.ndimms_present == 0) + return 0; + + fsl_ddr_set_memctl_regs(&info); + fsl_ddr_set_lawbar(&info.common_timing_params, LAW_TRGT_IF_DDR_1); + + return total_memory; +} diff --git a/arch/ppc/ddr-8xxx/options.c b/arch/ppc/ddr-8xxx/options.c new file mode 100644 index 0000000000..22b621f52b --- /dev/null +++ b/arch/ppc/ddr-8xxx/options.c @@ -0,0 +1,111 @@ +/* + * Copyright 2008, 2010-2012 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + */ + +#include <common.h> +#include <asm/fsl_ddr_sdram.h> +#include "ddr.h" + +uint32_t populate_memctl_options(int all_DIMMs_registered, + struct memctl_options_s *popts, + struct dimm_params_s *pdimm) +{ + const struct ddr_board_info_s *binfo = popts->board_info; + uint32_t i; + + for (i = 0; i < binfo->cs_per_ctrl; i++) { + popts->cs_local_opts[i].odt_rd_cfg = FSL_DDR_ODT_NEVER; + popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_ALL; + popts->cs_local_opts[i].odt_rtt_norm = DDR2_RTT_50_OHM; + popts->cs_local_opts[i].odt_rtt_wr = DDR2_RTT_OFF; + popts->cs_local_opts[i].auto_precharge = 0; + } + + /* Memory Organization Parameters */ + popts->registered_dimm_en = all_DIMMs_registered; + popts->ECC_mode = 0; /* 0 = disabled, 1 = enabled */ + popts->ECC_init_using_memctl = 1; /* 0 = use DMA, 1 = use memctl */ + + /* Choose DQS config - 1 for DDR2 */ + popts->DQS_config = 1; + + /* Choose self-refresh during sleep. */ + popts->self_refresh_in_sleep = 1; + + /* Choose dynamic power management mode. */ + popts->dynamic_power = 0; + + /* + * check first dimm for primary sdram width + * assuming all dimms are similar + * 0 = 64-bit, 1 = 32-bit, 2 = 16-bit + */ + if (pdimm->n_ranks != 0) { + if ((pdimm->data_width >= 64) && (pdimm->data_width <= 72)) + popts->data_bus_width = 0; + else if ((pdimm->data_width >= 32) || + (pdimm->data_width <= 40)) + popts->data_bus_width = 1; + else + panic("data width %u is invalid!\n", + pdimm->data_width); + } + + /* Must be a burst length of 4 for DD2 */ + popts->burst_length = DDR_BL4; + /* Decide whether to use the computed de-rated latency */ + popts->use_derated_caslat = 0; + + /* + * 2T_EN setting + * + * Factors to consider for 2T_EN: + * - number of DIMMs installed + * - number of components, number of active ranks + * - how much time you want to spend playing around + */ + popts->twoT_en = 0; + + /* + * Default BSTTOPRE precharge interval + * + * Set the parameter to 0 for global auto precharge in + * the board options function. + */ + popts->bstopre = 0x100; + + /* Minimum CKE pulse width -- tCKE(MIN) */ + popts->tCKE_clock_pulse_width_ps + = mclk_to_picos(FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR); + + /* + * Window for four activates -- tFAW + * + * Set according to specification for the memory used. + * The default value below would work for x4/x8 wide memory. + * + */ + popts->tFAW_window_four_activates_ps = 37500; + + /* + * Default powerdown exit timings. + * Set according to specifications for the memory used in + * the board options function. + */ + popts->txard = 3; + popts->txp = 3; + popts->taxpd = 11; + + /* Default value for load mode cycle time */ + popts->tmrd = 2; + + /* Specific board override parameters. */ + fsl_ddr_board_options(popts, pdimm); + + return 0; +} diff --git a/arch/ppc/ddr-8xxx/util.c b/arch/ppc/ddr-8xxx/util.c new file mode 100644 index 0000000000..626b5f3f9b --- /dev/null +++ b/arch/ppc/ddr-8xxx/util.c @@ -0,0 +1,100 @@ +/* + * Copyright 2008-2012 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include <common.h> +#include <asm/fsl_law.h> +#include <asm-generic/div64.h> +#include <mach/clock.h> +#include "ddr.h" + +#define ULL_2E12 2000000000000ULL +#define UL_5POW12 244140625UL +#define UL_2POW13 (1UL << 13) +#define ULL_8FS 0xFFFFFFFFULL + +/* + * Round up mclk_ps to nearest 1 ps in memory controller code + * if the error is 0.5ps or more. + * + * If an imprecise data rate is too high due to rounding error + * propagation, compute a suitably rounded mclk_ps to compute + * a working memory controller configuration. + */ +uint32_t get_memory_clk_period_ps(void) +{ + uint32_t result, data_rate = fsl_get_ddr_freq(0); + /* Round to nearest 10ps, being careful about 64-bit multiply/divide */ + uint64_t rem, mclk_ps = ULL_2E12; + + /* Now perform the big divide, the result fits in 32-bits */ + rem = do_div(mclk_ps, data_rate); + if (rem >= (data_rate >> 1)) + result = mclk_ps + 1; + else + result = mclk_ps; + + return result; +} + +/* Convert picoseconds into DRAM clock cycles (rounding up if needed). */ +uint32_t picos_to_mclk(uint32_t picos) +{ + uint64_t clks, clks_rem; + uint32_t data_rate = fsl_get_ddr_freq(0); + + if (!picos) + return 0; + + /* First multiply the time by the data rate (32x32 => 64) */ + clks = picos * (uint64_t)data_rate; + /* + * Now divide by 5^12 and track the 32-bit remainder, then divide + * by 2*(2^12) using shifts (and updating the remainder). + */ + clks_rem = do_div(clks, UL_5POW12); + clks_rem += (clks & (UL_2POW13 - 1)) * UL_5POW12; + clks >>= 13; + + /* If we had a remainder greater than the 1ps error, then round up */ + if (clks_rem > data_rate) + clks++; + + if (clks > ULL_8FS) + clks = ULL_8FS; + + return (uint32_t)clks; +} + +uint32_t mclk_to_picos(unsigned int mclk) +{ + return get_memory_clk_period_ps() * mclk; +} + +int fsl_ddr_set_lawbar( + const struct common_timing_params_s *params, + uint32_t law_memctl) +{ + uint64_t base = params->base_address; + uint64_t size = params->total_mem; + + if (!params->ndimms_present) + goto out; + + if (base >= MAX_MEM_MAPPED) + goto error; + + if ((base + size) >= MAX_MEM_MAPPED) + size = MAX_MEM_MAPPED - base; + + if (fsl_set_ddr_laws(base, size, law_memctl) < 0) + goto error; +out: + return 0; +error: + return 1; +} diff --git a/arch/ppc/include/asm/fsl_ddr_dimm_params.h b/arch/ppc/include/asm/fsl_ddr_dimm_params.h new file mode 100644 index 0000000000..73c239be85 --- /dev/null +++ b/arch/ppc/include/asm/fsl_ddr_dimm_params.h @@ -0,0 +1,60 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#ifndef DDR2_DIMM_PARAMS_H +#define DDR2_DIMM_PARAMS_H + +#define EDC_ECC 2 + +/* Parameters for a DDR2 dimm computed from the SPD */ +struct dimm_params_s { + char mpart[19]; + uint32_t n_ranks; + uint64_t rank_density; + uint64_t capacity; + uint32_t data_width; + uint32_t primary_sdram_width; + uint32_t ec_sdram_width; + uint32_t registered_dimm; + uint32_t n_row_addr; + uint32_t n_col_addr; + uint32_t edc_config; /* 0 = none, 1 = parity, 2 = ECC */ + uint32_t n_banks_per_sdram_device; + uint32_t burst_lengths_bitmask; /* BL=4 bit 2, BL=8 = bit 3 */ + uint32_t row_density; + uint64_t base_address; + /* SDRAM clock periods */ + uint32_t tCKmin_X_ps; + uint32_t tCKmin_X_minus_1_ps; + uint32_t tCKmin_X_minus_2_ps; + uint32_t tCKmax_ps; + /* SPD-defined CAS latencies */ + uint32_t caslat_X; + uint32_t caslat_X_minus_1; + uint32_t caslat_X_minus_2; + uint32_t caslat_lowest_derated; + /* basic timing parameters */ + uint32_t tRCD_ps; + uint32_t tRP_ps; + uint32_t tRAS_ps; + uint32_t tWR_ps; /* maximum = 63750 ps */ + uint32_t tWTR_ps; /* maximum = 63750 ps */ + uint32_t tRFC_ps; /* max = 255 ns + 256 ns + .75 ns = 511750 ps */ + uint32_t tRRD_ps; /* maximum = 63750 ps */ + uint32_t tRC_ps; /* maximum = 254 ns + .75 ns = 254750 ps */ + uint32_t refresh_rate_ps; + uint32_t tIS_ps; /* byte 32, spd->ca_setup */ + uint32_t tIH_ps; /* byte 33, spd->ca_hold */ + uint32_t tDS_ps; /* byte 34, spd->data_setup */ + uint32_t tDH_ps; /* byte 35, spd->data_hold */ + uint32_t tRTP_ps; /* byte 38, spd->trtp */ + uint32_t tDQSQ_max_ps; /* byte 44, spd->tdqsq */ + uint32_t tQHS_ps; /* byte 45, spd->tqhs */ +}; + +#endif diff --git a/arch/ppc/include/asm/fsl_ddr_sdram.h b/arch/ppc/include/asm/fsl_ddr_sdram.h index ef793c9d65..444bcbc497 100644 --- a/arch/ppc/include/asm/fsl_ddr_sdram.h +++ b/arch/ppc/include/asm/fsl_ddr_sdram.h @@ -10,9 +10,40 @@ #ifndef FSL_DDR_MEMCTL_H #define FSL_DDR_MEMCTL_H -/* - * DDR_SDRAM_CFG - DDR SDRAM Control Configuration - */ +#include <ddr_spd.h> + +/* Basic DDR Technology. */ +#define SDRAM_TYPE_DDR1 2 +#define SDRAM_TYPE_DDR2 3 +#define SDRAM_TYPE_LPDDR1 6 +#define SDRAM_TYPE_DDR3 7 + +#define DDR_BL4 4 +#define DDR_BL8 8 + +#define DDR2_RTT_OFF 0 +#define DDR2_RTT_75_OHM 1 +#define DDR2_RTT_150_OHM 2 +#define DDR2_RTT_50_OHM 3 + +#if defined(CONFIG_FSL_DDR2) +#define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR (3) +typedef struct ddr2_spd_eeprom_s generic_spd_eeprom_t; +#define FSL_SDRAM_TYPE SDRAM_TYPE_DDR2 +#endif + +#define FSL_DDR_ODT_NEVER 0x0 +#define FSL_DDR_ODT_CS 0x1 +#define FSL_DDR_ODT_ALL_OTHER_CS 0x2 +#define FSL_DDR_ODT_OTHER_DIMM 0x3 +#define FSL_DDR_ODT_ALL 0x4 +#define FSL_DDR_ODT_SAME_DIMM 0x5 +#define FSL_DDR_ODT_CS_AND_OTHER_DIMM 0x6 +#define FSL_DDR_ODT_OTHER_CS_ONSAMEDIMM 0x7 + +#define SDRAM_CS_CONFIG_EN 0x80000000 + +/* DDR_SDRAM_CFG - DDR SDRAM Control Configuration */ #define SDRAM_CFG_MEM_EN 0x80000000 #define SDRAM_CFG_SREN 0x40000000 #define SDRAM_CFG_ECC_EN 0x20000000 @@ -23,11 +54,103 @@ #define SDRAM_CFG_SDRAM_TYPE_SHIFT 24 #define SDRAM_CFG_DYN_PWR 0x00200000 #define SDRAM_CFG_32_BE 0x00080000 +#define SDRAM_CFG_16_BE 0x00100000 #define SDRAM_CFG_8_BE 0x00040000 #define SDRAM_CFG_NCAP 0x00020000 #define SDRAM_CFG_2T_EN 0x00008000 #define SDRAM_CFG_BI 0x00000001 -extern phys_size_t fixed_sdram(void); +#define SDRAM_CFG2_D_INIT 0x00000010 +#define SDRAM_CFG2_ODT_CFG_MASK 0x00600000 +#define SDRAM_CFG2_ODT_NEVER 0 +#define SDRAM_CFG2_ODT_ONLY_WRITE 1 +#define SDRAM_CFG2_ODT_ONLY_READ 2 +#define SDRAM_CFG2_ODT_ALWAYS 3 + +#define MAX_CHIP_SELECTS_PER_CTRL 4 +#define MAX_DIMM_SLOTS_PER_CTLR 4 + +/* + * Memory controller characteristics and I2C parameters to + * read the SPD data. + */ +struct ddr_board_info_s { + uint32_t fsl_ddr_ver; + void __iomem *ddr_base; + uint32_t cs_per_ctrl; + uint32_t dimm_slots_per_ctrl; + uint32_t i2c_bus; + uint32_t i2c_slave; + uint32_t i2c_speed; + void __iomem *i2c_base; + uint8_t *spd_i2c_addr; +}; +/* + * Generalized parameters for memory controller configuration, + * might be a little specific to the FSL memory controller + */ +struct memctl_options_s { + struct ddr_board_info_s *board_info; + uint32_t sdram_type; + /* + * Memory organization parameters + * + * if DIMM is present in the system + * where DIMMs are with respect to chip select + * where chip selects are with respect to memory boundaries + */ + uint32_t registered_dimm_en; + /* Options local to a Chip Select */ + struct cs_local_opts_s { + uint32_t auto_precharge; + uint32_t odt_rd_cfg; + uint32_t odt_wr_cfg; + uint32_t odt_rtt_norm; + uint32_t odt_rtt_wr; + } cs_local_opts[MAX_CHIP_SELECTS_PER_CTRL]; + /* DLL reset disable */ + uint32_t dll_rst_dis; + /* Operational mode parameters */ + uint32_t ECC_mode; + uint32_t ECC_init_using_memctl; + uint32_t data_init; + /* Use DQS? maybe only with DDR2? */ + uint32_t DQS_config; + uint32_t self_refresh_in_sleep; + uint32_t dynamic_power; + uint32_t data_bus_width; + uint32_t burst_length; + /* Global Timing Parameters */ + uint32_t cas_latency_override; + uint32_t cas_latency_override_value; + uint32_t use_derated_caslat; + uint32_t additive_latency_override; + uint32_t additive_latency_override_value; + uint32_t clk_adjust; + uint32_t cpo_override; + uint32_t write_data_delay; + uint32_t half_strength_driver_enable; + uint32_t twoT_en; + uint32_t bstopre; + uint32_t tCKE_clock_pulse_width_ps; + uint32_t tFAW_window_four_activates_ps; + /* Rtt impedance */ + uint32_t rtt_override; + uint32_t rtt_override_value; + /* Automatic self refresh */ + uint32_t auto_self_refresh_en; + /* read-to-write turnaround */ + uint32_t trwt_override; + uint32_t trwt; + /* Powerdon timings. */ + uint32_t txp; + uint32_t taxpd; + uint32_t txard; + /* Load mode cycle time */ + uint32_t tmrd; +}; + +extern phys_size_t fsl_ddr_sdram(void); +extern phys_size_t fixed_sdram(void); #endif diff --git a/arch/ppc/mach-mpc85xx/eth-devices.c b/arch/ppc/mach-mpc85xx/eth-devices.c index c6e8f3660d..611a5787f8 100644 --- a/arch/ppc/mach-mpc85xx/eth-devices.c +++ b/arch/ppc/mach-mpc85xx/eth-devices.c @@ -22,28 +22,40 @@ #include <common.h> #include <driver.h> +#include <init.h> #include <mach/immap_85xx.h> #include <mach/gianfar.h> -int fsl_eth_init(int num, struct gfar_info_struct *gf) +static int fsl_phy_init(void) { - struct resource *res; + int i; + void __iomem *base = IOMEM(GFAR_BASE_ADDR + GFAR_TBIPA_OFFSET); + + /* + * The TBI address must be initialised to enable the PHY to + * link up after the MDIO reset. + */ + out_be32(base, GFAR_TBIPA_END); + /* All ports access external PHYs via the "gfar-mdio" device */ + add_generic_device("gfar-mdio", 0, NULL, MDIO_BASE_ADDR, + 0x1000, IORESOURCE_MEM, NULL); - res = xzalloc(3 * sizeof(struct resource)); - /* TSEC interface registers */ - res[0].start = GFAR_BASE_ADDR + ((num - 1) * 0x1000); - res[0].end = res[0].start + 0x1000 - 1; - res[0].flags = IORESOURCE_MEM; - /* External PHY access always through eTSEC1 */ - res[1].start = MDIO_BASE_ADDR; - res[1].end = res[1].start + 0x1000 - 1; - res[1].flags = IORESOURCE_MEM; - /* Access to TBI/RTBI interface. */ - res[2].start = MDIO_BASE_ADDR + ((num - 1) * 0x1000); - res[2].end = res[2].start + 0x1000 - 1; - res[2].flags = IORESOURCE_MEM; + for (i = 1; i < 3; i++) { + out_be32(base + (i * 0x1000), GFAR_TBIPA_END - i); + /* Use "gfar-tbiphy" devices to access internal PHY. */ + add_generic_device("gfar-tbiphy", i, NULL, + MDIO_BASE_ADDR + (i * 0x1000), + 0x1000, IORESOURCE_MEM, NULL); + } + return 0; +} - add_generic_device_res("gfar", DEVICE_ID_DYNAMIC, res, 3, gf); +coredevice_initcall(fsl_phy_init); +int fsl_eth_init(int num, struct gfar_info_struct *gf) +{ + add_generic_device("gfar", DEVICE_ID_DYNAMIC, NULL, + GFAR_BASE_ADDR + ((num - 1) * 0x1000), 0x1000, + IORESOURCE_MEM, gf); return 0; } diff --git a/arch/ppc/mach-mpc85xx/fsl_i2c.c b/arch/ppc/mach-mpc85xx/fsl_i2c.c new file mode 100644 index 0000000000..51fcc64c26 --- /dev/null +++ b/arch/ppc/mach-mpc85xx/fsl_i2c.c @@ -0,0 +1,253 @@ +/* + * Copyright 2013 GE Intelligent Platforms, Inc + * Copyright 2006,2009 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Early I2C support functions to read SPD data or board + * information. + * Based on U-Boot drivers/i2c/fsl_i2c.c + */ +#include <common.h> +#include <i2c/i2c.h> +#include <mach/clock.h> +#include <mach/immap_85xx.h> +#include <mach/early_udelay.h> + +/* FSL I2C registers */ +#define FSL_I2C_ADR 0x00 +#define FSL_I2C_FDR 0x04 +#define FSL_I2C_CR 0x08 +#define FSL_I2C_SR 0x0C +#define FSL_I2C_DR 0x10 +#define FSL_I2C_DFSRR 0x14 + +/* Bits of FSL I2C registers */ +#define I2C_SR_RXAK 0x01 +#define I2C_SR_MIF 0x02 +#define I2C_SR_MAL 0x10 +#define I2C_SR_MBB 0x20 +#define I2C_SR_MCF 0x80 +#define I2C_CR_RSTA 0x04 +#define I2C_CR_TXAK 0x08 +#define I2C_CR_MTX 0x10 +#define I2C_CR_MSTA 0x20 +#define I2C_CR_MEN 0x80 + +/* + * Set the I2C bus speed for a given I2C device + * + * parameters: + * - i2c: the I2C base address. + * - i2c_clk: I2C bus clock frequency. + * - speed: the desired speed of the bus. + * + * The I2C device must be stopped before calling this function. + * + * The return value is the actual bus speed that is set. + */ +static uint32_t fsl_set_i2c_bus_speed(const void __iomem *i2c, + uint32_t i2c_clk, uint32_t speed) +{ + uint8_t dfsr, fdr = 0x31; /* Default if no FDR found */ + uint16_t a, b, ga, gb, bin_gb, bin_ga, divider; + uint32_t c_div, est_div; + + divider = min((uint16_t)(i2c_clk / speed), (uint16_t) -1); + /* Condition 1: dfsr <= 50/T */ + dfsr = (5 * (i2c_clk / 1000)) / 100000; + if (!dfsr) + dfsr = 1; + est_div = ~0; + + /* + * Bus speed is calculated as per Freescale AN2919. + * a, b and dfsr matches identifiers A,B and C as in the + * application note. + */ + for (ga = 0x4, a = 10; a <= 30; ga++, a += 2) { + for (gb = 0; gb < 8; gb++) { + b = 16 << gb; + c_div = b * (a + (((3 * dfsr) / b) * 2)); + + if ((c_div > divider) && (c_div < est_div)) { + est_div = c_div; + bin_gb = gb << 2; + bin_ga = (ga & 0x3) | ((ga & 0x4) << 3); + fdr = bin_gb | bin_ga; + speed = i2c_clk / est_div; + } + } + if (a == 20) + a += 2; + if (a == 24) + a += 4; + } + writeb(dfsr, i2c + FSL_I2C_DFSRR); /* set default filter */ + writeb(fdr, i2c + FSL_I2C_FDR); /* set bus speed */ + + return speed; +} + +void fsl_i2c_init(void __iomem *i2c, int speed, int slaveadd) +{ + uint32_t i2c_clk; + + i2c_clk = fsl_get_i2c_freq(); + writeb(0, i2c + FSL_I2C_CR); + early_udelay(5); + + fsl_set_i2c_bus_speed(i2c, i2c_clk, speed); + writeb(slaveadd << 1, i2c + FSL_I2C_ADR); + writeb(0x0, i2c + FSL_I2C_SR); + writeb(I2C_CR_MEN, i2c + FSL_I2C_CR); +} + +static uint32_t fsl_usec2ticks(uint32_t usec) +{ + ulong ticks; + + if (usec < 1000) { + ticks = (usec * (fsl_get_timebase_clock() / 1000)); + ticks = (ticks + 500) / 1000; + } else { + ticks = (usec / 10); + ticks *= (fsl_get_timebase_clock() / 100000); + } + + return ticks; +} + +static int fsl_i2c_wait4bus(void __iomem *i2c) +{ + uint64_t timeval = get_ticks(); + const uint64_t timeout = fsl_usec2ticks(20000); + + while (readb(i2c + FSL_I2C_SR) & I2C_SR_MBB) + if ((get_ticks() - timeval) > timeout) + return -1; + + return 0; +} + +void fsl_i2c_stop(void __iomem *i2c) +{ + writeb(I2C_CR_MEN, i2c + FSL_I2C_CR); +} + +static int fsl_i2c_wait(void __iomem *i2c, int write) +{ + const uint64_t timeout = fsl_usec2ticks(100000); + uint64_t timeval = get_ticks(); + int csr; + + do { + csr = readb(i2c + FSL_I2C_SR); + if (csr & I2C_SR_MIF) + break; + } while ((get_ticks() - timeval) < timeout); + + if ((get_ticks() - timeval) > timeout) + goto error; + + csr = readb(i2c + FSL_I2C_SR); + writeb(0x0, i2c + FSL_I2C_SR); + + if (csr & I2C_SR_MAL) + goto error; + + if (!(csr & I2C_SR_MCF)) + goto error; + + if (write == 0 && (csr & I2C_SR_RXAK)) + goto error; + + return 0; +error: + return -1; +} + +static int __i2c_write(void __iomem *i2c, uint8_t *data, int length) +{ + int i; + + for (i = 0; i < length; i++) { + writeb(data[i], i2c + FSL_I2C_DR); + if (fsl_i2c_wait(i2c, 0) < 0) + break; + } + + return i; +} + +static int __i2c_read(void __iomem *i2c, uint8_t *data, int length) +{ + int i; + uint8_t val = I2C_CR_MEN | I2C_CR_MSTA; + + if (length == 1) + writeb(val | I2C_CR_TXAK, i2c + FSL_I2C_CR); + else + writeb(val, i2c + FSL_I2C_CR); + + readb(i2c + FSL_I2C_DR); + for (i = 0; i < length; i++) { + if (fsl_i2c_wait(i2c, 1) < 0) + break; + + /* Generate ack on last next to last byte */ + if (i == length - 2) + writeb(val | I2C_CR_TXAK, i2c + FSL_I2C_CR); + /* Do not generate stop on last byte */ + if (i == length - 1) + writeb(val | I2C_CR_MTX, i2c + FSL_I2C_CR); + + data[i] = readb(i2c + FSL_I2C_DR); + } + + return i; +} + +static int +fsl_i2c_write_addr(void __iomem *i2c, uint8_t dev, uint8_t dir, int rsta) +{ + uint8_t val = I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX; + + if (rsta) + val |= I2C_CR_RSTA; + writeb(val, i2c + FSL_I2C_CR); + writeb((dev << 1) | dir, i2c + FSL_I2C_DR); + + if (fsl_i2c_wait(i2c, 0) < 0) + return 0; + + return 1; +} + +int fsl_i2c_read(void __iomem *i2c, uint8_t dev, uint addr, int alen, + uint8_t *data, int length) +{ + int i = -1; + uint8_t *a = (uint8_t *)&addr; + + if (alen && (fsl_i2c_wait4bus(i2c) >= 0) && + (fsl_i2c_write_addr(i2c, dev, 0, 0) != 0) && + (__i2c_write(i2c, &a[4 - alen], alen) == alen)) + i = 0; + + if (length && fsl_i2c_write_addr(i2c, dev, 1, 1) != 0) + i = __i2c_read(i2c, data, length); + + if (i == length) + return 0; + + return -1; +} diff --git a/arch/arm/boards/guf-cupid/config.h b/arch/ppc/mach-mpc85xx/include/mach/fsl_i2c.h index 501a44df40..d187c6cf49 100644 --- a/arch/arm/boards/guf-cupid/config.h +++ b/arch/ppc/mach-mpc85xx/include/mach/fsl_i2c.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 Juergen Beisert <jbe@pengutronix.de> + * Copyright 2013 GE Intelligent Platforms, Inc * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -10,18 +10,8 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * Definitions related to passing arguments to kernel. */ - -#define CONFIG_MX35_HCLK_FREQ 24000000 - -#endif - -/* nothing to do here yet */ +void fsl_i2c_init(void __iomem *i2c, int speed, int slaveadd); +int fsl_i2c_read(void __iomem *i2c, uint8_t dev, uint addr, int alen, + uint8_t *data, int length); +void fsl_i2c_stop(void __iomem *i2c); diff --git a/arch/ppc/mach-mpc85xx/include/mach/gianfar.h b/arch/ppc/mach-mpc85xx/include/mach/gianfar.h index ae3163865c..6a7b9e945d 100644 --- a/arch/ppc/mach-mpc85xx/include/mach/gianfar.h +++ b/arch/ppc/mach-mpc85xx/include/mach/gianfar.h @@ -22,10 +22,14 @@ * Platform data for the Motorola Triple Speed Ethernet Controller */ +#define GFAR_TBIPA_OFFSET 0x030 /* TBI PHY address */ +#define GFAR_TBIPA_END 0x1f /* Last valid PHY address */ + struct gfar_info_struct { unsigned int phyaddr; unsigned int tbiana; unsigned int tbicr; + unsigned int mdiobus_tbi; }; int fsl_eth_init(int num, struct gfar_info_struct *gf); diff --git a/commands/Kconfig b/commands/Kconfig index a62ed9823b..7cc71298b7 100644 --- a/commands/Kconfig +++ b/commands/Kconfig @@ -420,6 +420,7 @@ menu "booting" config CMD_BOOTM tristate default y + select BOOTM select CRC32 select UIMAGE select UNCOMPRESS @@ -561,14 +562,15 @@ config CMD_NANDTEST select PARTITION_NEED_MTD prompt "nandtest" -config CMD_MTEST - tristate - prompt "mtest" - -config CMD_MTEST_ALTERNATIVE - bool - depends on CMD_MTEST - prompt "alternative mtest implementation" +config CMD_MEMTEST + tristate + prompt "memtest" + help + The memtest command can test the registered barebox memory. + During this test barebox memory regions like heap, stack, ... + will be skipped. If the tested architecture has MMU with PTE + flags support, the memtest is running twice with cache enabled + and with cache disabled endmenu diff --git a/commands/Makefile b/commands/Makefile index 419d93bc0e..6acffc8284 100644 --- a/commands/Makefile +++ b/commands/Makefile @@ -13,7 +13,6 @@ obj-$(CONFIG_CMD_MW) += mw.o obj-$(CONFIG_CMD_MEMCMP) += memcmp.o obj-$(CONFIG_CMD_MEMCPY) += memcpy.o obj-$(CONFIG_CMD_MEMSET) += memset.o -obj-$(CONFIG_CMD_MTEST) += memtest.o obj-$(CONFIG_CMD_EDIT) += edit.o obj-$(CONFIG_CMD_EXEC) += exec.o obj-$(CONFIG_CMD_SLEEP) += sleep.o @@ -49,6 +48,7 @@ obj-$(CONFIG_CMD_SAVEENV) += saveenv.o obj-$(CONFIG_CMD_LOADENV) += loadenv.o obj-$(CONFIG_CMD_NAND) += nand.o obj-$(CONFIG_CMD_NANDTEST) += nandtest.o +obj-$(CONFIG_CMD_MEMTEST) += memtest.o obj-$(CONFIG_CMD_TRUE) += true.o obj-$(CONFIG_CMD_FALSE) += false.o obj-$(CONFIG_CMD_VERSION) += version.o diff --git a/commands/bootm.c b/commands/bootm.c index 6ce2ca9897..97a6698b9b 100644 --- a/commands/bootm.c +++ b/commands/bootm.c @@ -46,172 +46,11 @@ #include <magicvar.h> #include <asm-generic/memory_layout.h> -static LIST_HEAD(handler_list); - /* * Additional oftree size for the fixed tree */ #define OFTREE_SIZE_INCREASE 0x8000 -int register_image_handler(struct image_handler *handler) -{ - list_add_tail(&handler->list, &handler_list); - return 0; -} - -#define UIMAGE_SOME_ADDRESS (UIMAGE_INVALID_ADDRESS - 1) - -static int bootm_open_os_uimage(struct image_data *data) -{ - int ret; - - data->os = uimage_open(data->os_file); - if (!data->os) - return -EINVAL; - - if (data->verify) { - ret = uimage_verify(data->os); - if (ret) { - printf("Checking data crc failed with %s\n", - strerror(-ret)); - uimage_close(data->os); - return ret; - } - } - - uimage_print_contents(data->os); - - if (data->os->header.ih_arch != IH_ARCH) { - printf("Unsupported Architecture 0x%x\n", - data->os->header.ih_arch); - uimage_close(data->os); - return -EINVAL; - } - - if (data->os_address == UIMAGE_SOME_ADDRESS) - data->os_address = data->os->header.ih_load; - - if (data->os_address != UIMAGE_INVALID_ADDRESS) { - data->os_res = uimage_load_to_sdram(data->os, 0, - data->os_address); - if (!data->os_res) { - uimage_close(data->os); - return -ENOMEM; - } - } - - return 0; -} - -static int bootm_open_initrd_uimage(struct image_data *data) -{ - int ret; - - if (!data->initrd_file) - return 0; - - if (strcmp(data->os_file, data->initrd_file)) { - data->initrd = uimage_open(data->initrd_file); - if (!data->initrd) - return -EINVAL; - - if (data->verify) { - ret = uimage_verify(data->initrd); - if (ret) { - printf("Checking data crc failed with %s\n", - strerror(-ret)); - } - } - uimage_print_contents(data->initrd); - } else { - data->initrd = data->os; - } - - return 0; -} - -#ifdef CONFIG_OFTREE -static int bootm_open_oftree(struct image_data *data, const char *oftree, int num) -{ - enum filetype ft; - struct fdt_header *fdt; - size_t size; - - printf("Loading devicetree from '%s'\n", oftree); - - ft = file_name_detect_type(oftree); - if ((int)ft < 0) { - printf("failed to open %s: %s\n", oftree, strerror(-(int)ft)); - return ft; - } - - if (ft == filetype_uimage) { -#ifdef CONFIG_CMD_BOOTM_OFTREE_UIMAGE - struct uimage_handle *of_handle; - int release = 0; - - if (!strcmp(data->os_file, oftree)) { - of_handle = data->os; - } else if (!strcmp(data->initrd_file, oftree)) { - of_handle = data->initrd; - } else { - of_handle = uimage_open(oftree); - if (!of_handle) - return -ENODEV; - uimage_print_contents(of_handle); - release = 1; - } - - fdt = uimage_load_to_buf(of_handle, num, &size); - - if (release) - uimage_close(of_handle); -#else - return -EINVAL; -#endif - } else { - fdt = read_file(oftree, &size); - if (!fdt) { - perror("open"); - return -ENODEV; - } - } - - ft = file_detect_type(fdt, size); - if (ft != filetype_oftree) { - printf("%s is not an oftree but %s\n", oftree, - file_type_to_string(ft)); - } - - data->of_root_node = of_unflatten_dtb(NULL, fdt); - if (!data->of_root_node) { - pr_err("unable to unflatten devicetree\n"); - return -EINVAL; - } - - free(fdt); - - return 0; -} -#endif - -static struct image_handler *bootm_find_handler(enum filetype filetype, - struct image_data *data) -{ - struct image_handler *handler; - - list_for_each_entry(handler, &handler_list, list) { - if (filetype != filetype_uimage && - handler->filetype == filetype) - return handler; - if (filetype == filetype_uimage && - handler->ih_os == data->os->header.ih_os) - return handler; - } - - return NULL; -} - static char *bootm_image_name_and_no(const char *name, int *no) { char *at, *ret; @@ -244,12 +83,9 @@ static char *bootm_image_name_and_no(const char *name, int *no) static int do_bootm(int argc, char *argv[]) { int opt; - struct image_handler *handler; struct image_data data; int ret = 1; - enum filetype os_type, initrd_type = filetype_unknown; const char *oftree = NULL, *initrd_file = NULL, *os_file = NULL; - int fallback = 0; memset(&data, 0, sizeof(struct image_data)); @@ -289,7 +125,7 @@ static int do_bootm(int argc, char *argv[]) oftree = optarg; break; case 'f': - fallback = 1; + data.force = 1; break; default: break; @@ -311,124 +147,17 @@ static int do_bootm(int argc, char *argv[]) oftree = NULL; data.os_file = bootm_image_name_and_no(os_file, &data.os_num); + data.oftree_file = bootm_image_name_and_no(oftree, &data.oftree_num); + data.initrd_file = bootm_image_name_and_no(initrd_file, &data.initrd_num); - os_type = file_name_detect_type(data.os_file); - if ((int)os_type < 0) { - printf("could not open %s: %s\n", data.os_file, - strerror(-os_type)); - goto err_out; - } - - if (!fallback && os_type == filetype_unknown) { - printf("Unknown OS filetype (try -f)\n"); - goto err_out; - } - - if (os_type == filetype_uimage) { - ret = bootm_open_os_uimage(&data); - if (ret) { - printf("loading os image failed with %s\n", - strerror(-ret)); - goto err_out; - } - } - - if (IS_ENABLED(CONFIG_CMD_BOOTM_INITRD) && initrd_file) { - data.initrd_file = bootm_image_name_and_no(initrd_file, &data.initrd_num); - - initrd_type = file_name_detect_type(data.initrd_file); - if ((int)initrd_type < 0) { - printf("could not open %s: %s\n", data.initrd_file, - strerror(-initrd_type)); - goto err_out; - } - if (initrd_type == filetype_uimage) { - ret = bootm_open_initrd_uimage(&data); - if (ret) { - printf("loading initrd failed with %s\n", - strerror(-ret)); - goto err_out; - } - } - } - - printf("\nLoading OS %s '%s'", file_type_to_string(os_type), - data.os_file); - if (os_type == filetype_uimage && - data.os->header.ih_type == IH_TYPE_MULTI) - printf(", multifile image %d", data.os_num); - printf("\n"); - - if (bootm_verbose(&data)) { - if (data.os_res) - printf("OS image is at 0x%08x-0x%08x\n", - data.os_res->start, - data.os_res->end); - else - printf("OS image not yet relocated\n"); - - if (data.initrd_file) { - printf("Loading initrd %s '%s'", - file_type_to_string(initrd_type), - data.initrd_file); - if (initrd_type == filetype_uimage && - data.initrd->header.ih_type == IH_TYPE_MULTI) - printf(", multifile image %d", data.initrd_num); - printf("\n"); - if (data.initrd_res) - printf("initrd is at 0x%08x-0x%08x\n", - data.initrd_res->start, - data.initrd_res->end); - else - printf("initrd image not yet relocated\n"); - } - } - -#ifdef CONFIG_OFTREE - if (oftree) { - int oftree_num; - - oftree = bootm_image_name_and_no(oftree, &oftree_num); - - ret = bootm_open_oftree(&data, oftree, oftree_num); - if (ret) - goto err_out; - } else { - data.of_root_node = of_get_root_node(); - if (data.of_root_node) - printf("using internal devicetree\n"); - } -#endif - if (data.os_address == UIMAGE_SOME_ADDRESS) - data.os_address = UIMAGE_INVALID_ADDRESS; - - handler = bootm_find_handler(os_type, &data); - if (!handler) { - printf("no image handler found for image type %s\n", - file_type_to_string(os_type)); - if (os_type == filetype_uimage) - printf("and os type: %d\n", data.os->header.ih_os); - goto err_out; - } - - if (bootm_verbose(&data)) - printf("Passing control to %s handler\n", handler->name); - - ret = handler->bootm(&data); + ret = bootm_boot(&data); printf("handler failed with %s\n", strerror(-ret)); err_out: free(data.initrd_file); free(data.os_file); - if (data.os_res) - release_sdram_region(data.os_res); - if (data.initrd_res) - release_sdram_region(data.initrd_res); - if (data.initrd && data.initrd != data.os) - uimage_close(data.initrd); - if (data.os) - uimage_close(data.os); + return 1; } diff --git a/commands/detect.c b/commands/detect.c index 0010a17779..fbce4eb0ce 100644 --- a/commands/detect.c +++ b/commands/detect.c @@ -28,8 +28,9 @@ static int do_detect(int argc, char *argv[]) int opt, i, ret; int option_list = 0; int option_error = 0; + int option_all = 0; - while ((opt = getopt(argc, argv, "el")) > 0) { + while ((opt = getopt(argc, argv, "ela")) > 0) { switch (opt) { case 'l': option_list = 1; @@ -37,6 +38,11 @@ static int do_detect(int argc, char *argv[]) case 'e': option_error = 1; break; + case 'a': + option_all = 1; + break; + default: + return COMMAND_ERROR_USAGE; } } @@ -48,6 +54,15 @@ static int do_detect(int argc, char *argv[]) return 0; } + if (option_all) { + for_each_device(dev) { + ret = device_detect(dev); + if (ret && ret != -ENOSYS && option_error) + return ret; + } + return 0; + } + if (argc == optind) return COMMAND_ERROR_USAGE; diff --git a/commands/memtest.c b/commands/memtest.c index 2d64d00a99..d2a148761b 100644 --- a/commands/memtest.c +++ b/commands/memtest.c @@ -1,8 +1,8 @@ /* - * mtest - Perform a memory test + * memtest - Perform a memory test * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * (C) Copyright 2013 + * Alexander Aring <aar@pengutronix.de>, Pengutronix * * See file CREDITS for list of people who contributed to this * project. @@ -17,335 +17,237 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA */ -#include <common.h> #include <command.h> -#include <types.h> +#include <getopt.h> +#include <asm/mmu.h> +#include <memory.h> +#include <malloc.h> +#include <common.h> +#include <errno.h> -/* - * Perform a memory test. A more complete alternative test can be - * configured using CONFIG_CMD_MTEST_ALTERNATIVE. The complete test - * loops until interrupted by ctrl-c or by a failure of one of the - * sub-tests. - */ -#ifdef CONFIG_CMD_MTEST_ALTERNATIVE -static int mem_test(ulong _start, ulong _end, ulong pattern_unused) +#include <memtest.h> + +static int alloc_memtest_region(struct list_head *list, + resource_size_t start, resource_size_t size) { - vu_long *start = (vu_long *)_start; - vu_long *end = (vu_long *)_end; - vu_long *addr; - ulong val; - ulong readback; - vu_long addr_mask; - vu_long offset; - vu_long test_offset; - vu_long pattern; - vu_long temp; - vu_long anti_pattern; - vu_long num_words; -#ifdef CFG_MEMTEST_SCRATCH - vu_long *dummy = (vu_long*)CFG_MEMTEST_SCRATCH; -#else - vu_long *dummy = start; -#endif - int j; - int iterations = 1; - - static const ulong bitpattern[] = { - 0x00000001, /* single bit */ - 0x00000003, /* two adjacent bits */ - 0x00000007, /* three adjacent bits */ - 0x0000000F, /* four adjacent bits */ - 0x00000005, /* two non-adjacent bits */ - 0x00000015, /* three non-adjacent bits */ - 0x00000055, /* four non-adjacent bits */ - 0xaaaaaaaa, /* alternating 1/0 */ - }; - - /* XXX: enforce alignment of start and end? */ - for (;;) { - if (ctrlc()) { - putchar ('\n'); - return 1; - } + struct resource *r_new; + struct mem_test_resource *r; - printf("Iteration: %6d\r", iterations); - iterations++; + r = xzalloc(sizeof(struct mem_test_resource)); + r_new = request_sdram_region("memtest", start, size); + if (!r_new) + return -EINVAL; - /* - * Data line test: write a pattern to the first - * location, write the 1's complement to a 'parking' - * address (changes the state of the data bus so a - * floating bus doen't give a false OK), and then - * read the value back. Note that we read it back - * into a variable because the next time we read it, - * it might be right (been there, tough to explain to - * the quality guys why it prints a failure when the - * "is" and "should be" are obviously the same in the - * error message). - * - * Rather than exhaustively testing, we test some - * patterns by shifting '1' bits through a field of - * '0's and '0' bits through a field of '1's (i.e. - * pattern and ~pattern). - */ - addr = start; - /* XXX */ - if (addr == dummy) ++addr; - for (j = 0; j < sizeof(bitpattern)/sizeof(bitpattern[0]); j++) { - val = bitpattern[j]; - for(; val != 0; val <<= 1) { - *addr = val; - *dummy = ~val; /* clear the test data off of the bus */ - readback = *addr; - if(readback != val) { - printf ("FAILURE (data line): " - "expected 0x%08lx, actual 0x%08lx at address 0x%p\n", - val, readback, addr); - } - *addr = ~val; - *dummy = val; - readback = *addr; - if(readback != ~val) { - printf ("FAILURE (data line): " - "Is 0x%08lx, should be 0x%08lx at address 0x%p\n", - readback, ~val, addr); - } - } - } + r->r = r_new; + list_add_tail(&r->list, list); - /* - * Based on code whose Original Author and Copyright - * information follows: Copyright (c) 1998 by Michael - * Barr. This software is placed into the public - * domain and may be used for any purpose. However, - * this notice must not be changed or removed and no - * warranty is either expressed or implied by its - * publication or distribution. - */ + return 0; +} - /* - * Address line test - * - * Description: Test the address bus wiring in a - * memory region by performing a walking - * 1's test on the relevant bits of the - * address and checking for aliasing. - * This test will find single-bit - * address failures such as stuck -high, - * stuck-low, and shorted pins. The base - * address and size of the region are - * selected by the caller. - * - * Notes: For best results, the selected base - * address should have enough LSB 0's to - * guarantee single address bit changes. - * For example, to test a 64-Kbyte - * region, select a base address on a - * 64-Kbyte boundary. Also, select the - * region size as a power-of-two if at - * all possible. - * - * Returns: 0 if the test succeeds, 1 if the test fails. - * - * ## NOTE ## Be sure to specify start and end - * addresses such that addr_mask has - * lots of bits set. For example an - * address range of 01000000 02000000 is - * bad while a range of 01000000 - * 01ffffff is perfect. - */ - addr_mask = ((ulong)end - (ulong)start)/sizeof(vu_long); - pattern = (vu_long) 0xaaaaaaaa; - anti_pattern = (vu_long) 0x55555555; +static int request_memtest_regions(struct list_head *list) +{ + int ret; + struct memory_bank *bank; + struct resource *r, *r_prev = NULL; + resource_size_t start, end, size; - debug("%s:%d: addr mask = 0x%.8lx\n", - __FUNCTION__, __LINE__, - addr_mask); + for_each_memory_bank(bank) { /* - * Write the default pattern at each of the - * power-of-two offsets. + * If we don't have any allocated region on bank, + * we use the whole bank boundary */ - for (offset = 1; (offset & addr_mask) != 0; offset <<= 1) - start[offset] = pattern; + if (list_empty(&bank->res->children)) { + start = PAGE_ALIGN(bank->res->start); + end = PAGE_ALIGN_DOWN(bank->res->end) - 1; + size = end - start + 1; - /* - * Check for address bits stuck high. - */ - test_offset = 0; - start[test_offset] = anti_pattern; - - for (offset = 1; (offset & addr_mask) != 0; offset <<= 1) { - temp = start[offset]; - if (temp != pattern) { - printf ("\nFAILURE: Address bit stuck high @ 0x%.8lx:" - " expected 0x%.8lx, actual 0x%.8lx\n", - (ulong)&start[offset], pattern, temp); - return 1; - } - } - start[test_offset] = pattern; + ret = alloc_memtest_region(list, start, size); + if (ret < 0) + return ret; - /* - * Check for addr bits stuck low or shorted. - */ - for (test_offset = 1; (test_offset & addr_mask) != 0; test_offset <<= 1) { - start[test_offset] = anti_pattern; - - for (offset = 1; (offset & addr_mask) != 0; offset <<= 1) { - temp = start[offset]; - if ((temp != pattern) && (offset != test_offset)) { - printf ("\nFAILURE: Address bit stuck low or shorted @" - " 0x%.8lx: expected 0x%.8lx, actual 0x%.8lx\n", - (ulong)&start[offset], pattern, temp); - return 1; - } - } - start[test_offset] = pattern; + continue; } /* - * Description: Test the integrity of a physical - * memory device by performing an - * increment/decrement test over the - * entire region. In the process every - * storage bit in the device is tested - * as a zero and a one. The base address - * and the size of the region are - * selected by the caller. - * - * Returns: 0 if the test succeeds, 1 if the test fails. + * We assume that the regions are sorted in this list + * So the first element has start boundary on bank->res->start + * and the last element hast end boundary on bank->res->end */ - num_words = ((ulong)end - (ulong)start)/sizeof(vu_long) + 1; - - /* - * Fill memory with a known pattern. - */ - for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) { - start[offset] = pattern; + list_for_each_entry(r, &bank->res->children, sibling) { + /* + * Do on head element for bank boundary + */ + if (r->sibling.prev == &bank->res->children) { + /* + * remember last used element + */ + start = PAGE_ALIGN(bank->res->start); + end = PAGE_ALIGN_DOWN(r->start) - 1; + size = end - start + 1; + r_prev = r; + if (start >= end) + continue; + + ret = alloc_memtest_region(list, start, size); + if (ret < 0) + return ret; + continue; + } + /* + * Between used regions + */ + start = PAGE_ALIGN(r_prev->end); + end = PAGE_ALIGN_DOWN(r->start) - 1; + size = end - start + 1; + r_prev = r; + if (start >= end) + continue; + + ret = alloc_memtest_region(list, start, size); + if (ret < 0) + return ret; + + if (list_is_last(&r->sibling, &bank->res->children)) { + /* + * Do on head element for bank boundary + */ + start = PAGE_ALIGN(r->end); + end = PAGE_ALIGN_DOWN(bank->res->end) - 1; + size = end - start + 1; + if (start >= end) + continue; + + ret = alloc_memtest_region(list, start, size); + if (ret < 0) + return ret; + } } + } - /* - * Check each location and invert it for the second pass. - */ - for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) { - temp = start[offset]; - if (temp != pattern) { - printf ("\nFAILURE (read/write) @ 0x%.8lx:" - " expected 0x%.8lx, actual 0x%.8lx)\n", - (ulong)&start[offset], pattern, temp); - return 1; - } - - anti_pattern = ~pattern; - start[offset] = anti_pattern; - } + return 0; +} - /* - * Check each location for the inverted pattern and zero it. - */ - for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) { - anti_pattern = ~pattern; - temp = start[offset]; - if (temp != anti_pattern) { - printf ("\nFAILURE (read/write): @ 0x%.8lx:" - " expected 0x%.8lx, actual 0x%.8lx)\n", - (ulong)&start[offset], anti_pattern, temp); - return 1; - } - start[offset] = 0; - } +static int __do_memtest(struct list_head *memtest_regions, + int bus_only, uint32_t cache_flag) +{ + struct mem_test_resource *r; + int ret; + + list_for_each_entry(r, memtest_regions, list) { + printf("Testing memory space: " + "0x%08x -> 0x%08x:\n", + r->r->start, r->r->end); + remap_range((void *)r->r->start, r->r->end - + r->r->start + 1, cache_flag); + + ret = mem_test(r->r->start, r->r->end, bus_only); + if (ret < 0) + return ret; + printf("done.\n\n"); } + return 0; } -#else -static int mem_test(ulong _start, ulong _end, ulong pattern) + +static int do_memtest(int argc, char *argv[]) { - vu_long *addr; - vu_long *start = (vu_long *)_start; - vu_long *end = (vu_long *)_end; - ulong val; - ulong readback; - ulong incr; - int rcode; - - incr = 1; - for (;;) { - if (ctrlc()) { - putchar('\n'); - return 1; + int bus_only = 0, ret, opt; + uint32_t i, max_i = 1, pte_flags_cached, pte_flags_uncached; + struct mem_test_resource *r, *r_tmp; + struct list_head memtest_used_regions; + + while ((opt = getopt(argc, argv, "i:b")) > 0) { + switch (opt) { + case 'i': + max_i = simple_strtoul(optarg, NULL, 0); + break; + case 'b': + bus_only = 1; + break; + default: + return COMMAND_ERROR_USAGE; } + } - printf ("\rPattern 0x%08lX Writing..." - "%12s" - "\b\b\b\b\b\b\b\b\b\b", - pattern, ""); + if (optind > argc) + return COMMAND_ERROR_USAGE; - for (addr=start,val=pattern; addr<end; addr++) { - *addr = val; - val += incr; - } + /* + * Get pte flags for enable and disable cache support on page. + */ + pte_flags_cached = mmu_get_pte_cached_flags(); + pte_flags_uncached = mmu_get_pte_uncached_flags(); - puts ("Reading..."); + INIT_LIST_HEAD(&memtest_used_regions); - for (addr=start,val=pattern; addr<end; addr++) { - readback = *addr; - if (readback != val) { - printf ("\nMem error @ 0x%08X: " - "found 0x%08lX, expected 0x%08lX\n", - (uint)addr, readback, val); - rcode = 1; - } - val += incr; - } + ret = request_memtest_regions(&memtest_used_regions); + if (ret < 0) + goto out; + for (i = 1; (i <= max_i) || !max_i; i++) { + if (max_i) + printf("Start iteration %u of %u.\n", i, max_i); /* - * Flip the pattern each time to make lots of zeros and - * then, the next time, lots of ones. We decrement - * the "negative" patterns and increment the "positive" - * patterns to preserve this feature. + * First try a memtest with caching enabled. */ - if(pattern & 0x80000000) { - pattern = -pattern; /* complement & increment */ - } - else { - pattern = ~pattern; + if (IS_ENABLED(CONFIG_MMU)) { + printf("Do memtest with caching enabled.\n"); + ret = __do_memtest(&memtest_used_regions, + bus_only, pte_flags_cached); + if (ret < 0) + goto out; } - incr = -incr; + /* + * Second try a memtest with caching disabled. + */ + printf("Do memtest with caching disabled.\n"); + ret = __do_memtest(&memtest_used_regions, + bus_only, pte_flags_uncached); + if (ret < 0) + goto out; } - return rcode; -} -#endif - -static int do_mem_mtest(int argc, char *argv[]) -{ - ulong start, end, pattern = 0; - if (argc < 3) - return COMMAND_ERROR_USAGE; - - start = simple_strtoul(argv[1], NULL, 0); - end = simple_strtoul(argv[2], NULL, 0); - - if (argc > 3) - pattern = simple_strtoul(argv[3], NULL, 0); +out: + list_for_each_entry_safe(r, r_tmp, &memtest_used_regions, list) { + /* + * Ensure to leave with a cached on non used sdram regions. + */ + remap_range((void *)r->r->start, r->r->end - + r->r->start + 1, pte_flags_cached); + release_sdram_region(r->r); + free(r); + } - printf ("Testing 0x%08x ... 0x%08x:\n", (uint)start, (uint)end); - - return mem_test(start, end, pattern); + if (ret < 0) { + /* + * Set cursor to newline, because mem_test failed at + * drawing of progressbar. + */ + if (ret == -EINTR) + printf("\n"); + + printf("Memtest failed.\n"); + return 1; + } else { + printf("Memtest successful.\n"); + return 1; + } } -static const __maybe_unused char cmd_mtest_help[] = -"Usage: <start> <end> " -#ifdef CONFIG_CMD_MTEST_ALTERNATIVE -"[pattern]" -#endif -"\nsimple RAM read/write test\n"; - -BAREBOX_CMD_START(mtest) - .cmd = do_mem_mtest, - .usage = "simple RAM test", - BAREBOX_CMD_HELP(cmd_mtest_help) -BAREBOX_CMD_END +static const __maybe_unused char cmd_memtest_help[] = +"Usage: memtest [OPTION]...\n" +"memtest related commands\n" +" -i <iterations> iterations [default=1, endless=0].\n" +" -b perform only a test on buslines."; +BAREBOX_CMD_START(memtest) + .cmd = do_memtest, + .usage = "Memory Test", + BAREBOX_CMD_HELP(cmd_memtest_help) +BAREBOX_CMD_END diff --git a/commands/partition.c b/commands/partition.c index fdd6041227..6f8d6343c8 100644 --- a/commands/partition.c +++ b/commands/partition.c @@ -23,10 +23,6 @@ * @brief partition handling and addpart and delpart command */ -#ifdef CONFIG_ENABLE_PARTITION_NOISE -# define DEBUG -#endif - #include <common.h> #include <command.h> #include <complete.h> diff --git a/commands/ubiformat.c b/commands/ubiformat.c index 121816f4d7..5b4e5723f9 100644 --- a/commands/ubiformat.c +++ b/commands/ubiformat.c @@ -325,6 +325,11 @@ static int flash_image(const struct mtd_dev_info *mtd, goto out_close; } + if (st_size == 0) { + sys_errmsg("file \"%s\" has size 0 bytes", args.image); + goto out_close; + } + verbose(args.verbose, "will write %d eraseblocks", img_ebs); divisor = img_ebs; for (eb = 0; eb < mtd->eb_cnt; eb++) { diff --git a/commands/usb.c b/commands/usb.c index e5030659b4..9aee4308da 100644 --- a/commands/usb.c +++ b/commands/usb.c @@ -22,24 +22,20 @@ #include <usb/usb.h> #include <getopt.h> -static int scanned; - static int do_usb(int argc, char *argv[]) { int opt; + int force = 0; while ((opt = getopt(argc, argv, "f")) > 0) { switch (opt) { case 'f': - scanned = 0; + force = 1; break; } } - if (!scanned) { - usb_rescan(); - scanned = 1; - } + usb_rescan(force); return 0; } diff --git a/common/Kconfig b/common/Kconfig index 4cfbe4ecfb..39481f31d8 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -31,6 +31,9 @@ config ENV_HANDLING config GENERIC_GPIO bool +config BOOTM + bool + config BLOCK bool @@ -609,24 +612,6 @@ config DEBUG_INFO help Enable build of barebox with -g. -config ENABLE_FLASH_NOISE - bool - prompt "verbose flash handling" - help - Enable this to get noisy flash handling routines - -config ENABLE_PARTITION_NOISE - bool - prompt "verbose partition handling" - help - Enable this to get noisy partition handling routines - -config ENABLE_DEVICE_NOISE - bool - prompt "verbose device handling" - help - Enable this to get noisy device handling routines - config DEBUG_LL bool depends on HAS_DEBUG_LL @@ -636,6 +621,95 @@ config DEBUG_LL This requires SoC specific support. Most SoCs require the debug UART to be initialized by a debugger or first stage bootloader. +choice + prompt "Kernel low-level debugging port" + depends on DEBUG_LL + +config DEBUG_IMX1_UART + bool "i.MX1 Debug UART" + depends on ARCH_IMX1 + help + Say Y here if you want kernel low-level debugging support + on i.MX1. + +config DEBUG_IMX21_UART + bool "i.MX21 Debug UART" + depends on ARCH_IMX21 + help + Say Y here if you want kernel low-level debugging support + on i.MX21. + +config DEBUG_IMX25_UART + bool "i.MX25 Debug UART" + depends on ARCH_IMX25 + help + Say Y here if you want kernel low-level debugging support + on i.MX25. + +config DEBUG_IMX27_UART + bool "i.MX27 Debug UART" + depends on ARCH_IMX1 + help + Say Y here if you want kernel low-level debugging support + on i.MX27. + +config DEBUG_IMX31_UART + bool "i.MX31 Debug UART" + depends on ARCH_IMX31 + help + Say Y here if you want kernel low-level debugging support + on i.MX31. + +config DEBUG_IMX35_UART + bool "i.MX35 Debug UART" + depends on ARCH_IMX35 + help + Say Y here if you want kernel low-level debugging support + on i.MX35. + +config DEBUG_IMX51_UART + bool "i.MX51 Debug UART" + depends on ARCH_IMX51 + help + Say Y here if you want kernel low-level debugging support + on i.MX51. + +config DEBUG_IMX53_UART + bool "i.MX53 Debug UART" + depends on ARCH_IMX53 + help + Say Y here if you want kernel low-level debugging support + on i.MX53. + +config DEBUG_IMX6Q_UART + bool "i.MX6Q Debug UART" + depends on ARCH_IMX6 + help + Say Y here if you want kernel low-level debugging support + on i.MX6Q. + +endchoice + +config DEBUG_IMX_UART_PORT + int "i.MX Debug UART Port Selection" if DEBUG_IMX1_UART || \ + DEBUG_IMX25_UART || \ + DEBUG_IMX21_IMX27_UART || \ + DEBUG_IMX31_UART || \ + DEBUG_IMX35_UART || \ + DEBUG_IMX51_UART || \ + DEBUG_IMX53_UART || \ + DEBUG_IMX6Q_UART || \ + DEBUG_IMX6SL_UART + default 1 + depends on ARCH_IMX + help + Choose UART port on which kernel low-level debug messages + should be output. + +config DEBUG_INITCALLS + bool "Trace initcalls" + help + If enabled this will print initcall traces. endmenu config HAS_DEBUG_LL diff --git a/common/Makefile b/common/Makefile index 2f0bd34569..64eacc3047 100644 --- a/common/Makefile +++ b/common/Makefile @@ -13,11 +13,13 @@ obj-$(CONFIG_CMD_LOADS) += s_record.o obj-$(CONFIG_OFTREE) += oftree.o obj-y += memory.o +obj-$(CONFIG_DDR_SPD) += ddr_spd.o obj-y += memory_display.o obj-$(CONFIG_MALLOC_DLMALLOC) += dlmalloc.o obj-$(CONFIG_MALLOC_TLSF) += tlsf_malloc.o obj-$(CONFIG_MALLOC_TLSF) += tlsf.o obj-$(CONFIG_MALLOC_DUMMY) += dummy_malloc.o +obj-$(CONFIG_CMD_MEMTEST) += memtest.o obj-y += clock.o obj-$(CONFIG_BANNER) += version.o obj-$(CONFIG_MEMINFO) += meminfo.o @@ -42,6 +44,7 @@ obj-$(CONFIG_MODULES) += module.o obj-$(CONFIG_FLEXIBLE_BOOTARGS) += bootargs.o obj-$(CONFIG_BAREBOX_UPDATE) += bbu.o obj-y += bootsource.o +obj-$(CONFIG_BOOTM) += bootm.o extra-$(CONFIG_MODULES) += module.lds extra-y += barebox_default_env barebox_default_env.h diff --git a/common/bootm.c b/common/bootm.c new file mode 100644 index 0000000000..1987a09352 --- /dev/null +++ b/common/bootm.c @@ -0,0 +1,303 @@ +/* + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <common.h> +#include <boot.h> +#include <fs.h> +#include <malloc.h> +#include <memory.h> + +static LIST_HEAD(handler_list); + +int register_image_handler(struct image_handler *handler) +{ + list_add_tail(&handler->list, &handler_list); + + return 0; +} + +static struct image_handler *bootm_find_handler(enum filetype filetype, + struct image_data *data) +{ + struct image_handler *handler; + + list_for_each_entry(handler, &handler_list, list) { + if (filetype != filetype_uimage && + handler->filetype == filetype) + return handler; + if (filetype == filetype_uimage && + handler->ih_os == data->os->header.ih_os) + return handler; + } + + return NULL; +} + +static int bootm_open_os_uimage(struct image_data *data) +{ + int ret; + + data->os = uimage_open(data->os_file); + if (!data->os) + return -EINVAL; + + if (data->verify) { + ret = uimage_verify(data->os); + if (ret) { + printf("Checking data crc failed with %s\n", + strerror(-ret)); + uimage_close(data->os); + return ret; + } + } + + uimage_print_contents(data->os); + + if (data->os->header.ih_arch != IH_ARCH) { + printf("Unsupported Architecture 0x%x\n", + data->os->header.ih_arch); + uimage_close(data->os); + return -EINVAL; + } + + if (data->os_address == UIMAGE_SOME_ADDRESS) + data->os_address = data->os->header.ih_load; + + if (data->os_address != UIMAGE_INVALID_ADDRESS) { + data->os_res = uimage_load_to_sdram(data->os, 0, + data->os_address); + if (!data->os_res) { + uimage_close(data->os); + return -ENOMEM; + } + } + + return 0; +} + +static int bootm_open_initrd_uimage(struct image_data *data) +{ + int ret; + + if (!data->initrd_file) + return 0; + + if (strcmp(data->os_file, data->initrd_file)) { + data->initrd = uimage_open(data->initrd_file); + if (!data->initrd) + return -EINVAL; + + if (data->verify) { + ret = uimage_verify(data->initrd); + if (ret) { + printf("Checking data crc failed with %s\n", + strerror(-ret)); + } + } + uimage_print_contents(data->initrd); + } else { + data->initrd = data->os; + } + + return 0; +} + +static int bootm_open_oftree(struct image_data *data, const char *oftree, int num) +{ + enum filetype ft; + struct fdt_header *fdt; + size_t size; + + printf("Loading devicetree from '%s'\n", oftree); + + ft = file_name_detect_type(oftree); + if ((int)ft < 0) { + printf("failed to open %s: %s\n", oftree, strerror(-(int)ft)); + return ft; + } + + if (ft == filetype_uimage) { +#ifdef CONFIG_CMD_BOOTM_OFTREE_UIMAGE + struct uimage_handle *of_handle; + int release = 0; + + if (!strcmp(data->os_file, oftree)) { + of_handle = data->os; + } else if (!strcmp(data->initrd_file, oftree)) { + of_handle = data->initrd; + } else { + of_handle = uimage_open(oftree); + if (!of_handle) + return -ENODEV; + uimage_print_contents(of_handle); + release = 1; + } + + fdt = uimage_load_to_buf(of_handle, num, &size); + + if (release) + uimage_close(of_handle); +#else + return -EINVAL; +#endif + } else { + fdt = read_file(oftree, &size); + if (!fdt) { + perror("open"); + return -ENODEV; + } + } + + ft = file_detect_type(fdt, size); + if (ft != filetype_oftree) { + printf("%s is not an oftree but %s\n", oftree, + file_type_to_string(ft)); + } + + data->of_root_node = of_unflatten_dtb(NULL, fdt); + if (!data->of_root_node) { + pr_err("unable to unflatten devicetree\n"); + return -EINVAL; + } + + free(fdt); + + return 0; +} + +static void bootm_print_info(struct image_data *data) +{ + if (data->os_res) + printf("OS image is at 0x%08x-0x%08x\n", + data->os_res->start, + data->os_res->end); + else + printf("OS image not yet relocated\n"); + + if (data->initrd_file) { + enum filetype initrd_type = file_name_detect_type(data->initrd_file); + + printf("Loading initrd %s '%s'", + file_type_to_string(initrd_type), + data->initrd_file); + if (initrd_type == filetype_uimage && + data->initrd->header.ih_type == IH_TYPE_MULTI) + printf(", multifile image %d", data->initrd_num); + printf("\n"); + if (data->initrd_res) + printf("initrd is at 0x%08x-0x%08x\n", + data->initrd_res->start, + data->initrd_res->end); + else + printf("initrd image not yet relocated\n"); + } +} + +int bootm_boot(struct image_data *data) +{ + struct image_handler *handler; + int ret; + enum filetype os_type, initrd_type = filetype_unknown; + + os_type = file_name_detect_type(data->os_file); + if ((int)os_type < 0) { + printf("could not open %s: %s\n", data->os_file, + strerror(-os_type)); + ret = (int)os_type; + goto err_out; + } + + if (!data->force && os_type == filetype_unknown) { + printf("Unknown OS filetype (try -f)\n"); + ret = -EINVAL; + goto err_out; + } + + if (os_type == filetype_uimage) { + ret = bootm_open_os_uimage(data); + if (ret) { + printf("loading os image failed with %s\n", + strerror(-ret)); + goto err_out; + } + } + + if (IS_ENABLED(CONFIG_CMD_BOOTM_INITRD) && data->initrd_file) { + + initrd_type = file_name_detect_type(data->initrd_file); + if ((int)initrd_type < 0) { + printf("could not open %s: %s\n", data->initrd_file, + strerror(-initrd_type)); + ret = (int)initrd_type; + goto err_out; + } + if (initrd_type == filetype_uimage) { + ret = bootm_open_initrd_uimage(data); + if (ret) { + printf("loading initrd failed with %s\n", + strerror(-ret)); + goto err_out; + } + } + } + + printf("\nLoading OS %s '%s'", file_type_to_string(os_type), + data->os_file); + if (os_type == filetype_uimage && + data->os->header.ih_type == IH_TYPE_MULTI) + printf(", multifile image %d", data->os_num); + printf("\n"); + + if (IS_ENABLED(CONFIG_OFTREE)) { + if (data->oftree_file) { + ret = bootm_open_oftree(data, data->oftree_file, data->oftree_num); + if (ret) + goto err_out; + } else { + data->of_root_node = of_get_root_node(); + if (data->of_root_node) + printf("using internal devicetree\n"); + } + } + + if (data->os_address == UIMAGE_SOME_ADDRESS) + data->os_address = UIMAGE_INVALID_ADDRESS; + + handler = bootm_find_handler(os_type, data); + if (!handler) { + printf("no image handler found for image type %s\n", + file_type_to_string(os_type)); + if (os_type == filetype_uimage) + printf("and os type: %d\n", data->os->header.ih_os); + ret = -ENODEV; + goto err_out; + } + + if (bootm_verbose(data)) { + bootm_print_info(data); + printf("Passing control to %s handler\n", handler->name); + } + + ret = handler->bootm(data); +err_out: + if (data->os_res) + release_sdram_region(data->os_res); + if (data->initrd_res) + release_sdram_region(data->initrd_res); + if (data->initrd && data->initrd != data->os) + uimage_close(data->initrd); + if (data->os) + uimage_close(data->os); + + return ret; +} diff --git a/common/ddr_spd.c b/common/ddr_spd.c new file mode 100644 index 0000000000..c8b73ff56c --- /dev/null +++ b/common/ddr_spd.c @@ -0,0 +1,39 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#include <common.h> +#include <ddr_spd.h> + +uint32_t ddr2_spd_checksum_pass(const struct ddr2_spd_eeprom_s *spd) +{ + uint32_t i, cksum = 0; + const uint8_t *buf = (const uint8_t *)spd; + uint8_t rev, spd_cksum; + + rev = spd->spd_rev; + spd_cksum = spd->cksum; + + /* Rev 1.X or less supported by this code */ + if (rev >= 0x20) + goto error; + + /* + * The checksum is calculated on the first 64 bytes + * of the SPD as per JEDEC specification. + */ + for (i = 0; i < 63; i++) + cksum += *buf++; + cksum &= 0xFF; + + if (cksum != spd_cksum) + goto error; + + return 0; +error: + return 1; +} diff --git a/common/memtest.c b/common/memtest.c new file mode 100644 index 0000000000..22178cfea2 --- /dev/null +++ b/common/memtest.c @@ -0,0 +1,313 @@ +/* + * memory_test.c + * + * Copyright (c) 2013 Alexander Aring <aar@pengutronix.de>, Pengutronix + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include <progress.h> +#include <common.h> +#include <memory.h> +#include <types.h> +#include <sizes.h> +#include <memtest.h> + +static const resource_size_t bitpattern[] = { + 0x00000001, /* single bit */ + 0x00000003, /* two adjacent bits */ + 0x00000007, /* three adjacent bits */ + 0x0000000F, /* four adjacent bits */ + 0x00000005, /* two non-adjacent bits */ + 0x00000015, /* three non-adjacent bits */ + 0x00000055, /* four non-adjacent bits */ + 0xAAAAAAAA, /* alternating 1/0 */ +}; + +/* + * Perform a memory test. The complete test + * loops until interrupted by ctrl-c. + * + * Prameters: + * start: start address for memory test. + * end: end address of memory test. + * bus_only: skip integrity check and do only a address/data bus + * testing. + * + * Return value can be -EINVAL for invalid parameter or -EINTR + * if memory test was interrupted. + */ +int mem_test(resource_size_t _start, + resource_size_t _end, int bus_only) +{ + volatile resource_size_t *start, *dummy, val, readback, offset, + offset2, pattern, temp, anti_pattern, num_words; + int i; + + _start = ALIGN(_start, sizeof(resource_size_t)); + _end = ALIGN_DOWN(_end, sizeof(resource_size_t)) - 1; + + if (_end <= _start) + return -EINVAL; + + start = (resource_size_t *)_start; + /* + * Point the dummy to start[1] + */ + dummy = start + 1; + num_words = (_end - _start + 1)/sizeof(resource_size_t); + + printf("Starting data line test.\n"); + + /* + * Data line test: write a pattern to the first + * location, write the 1's complement to a 'parking' + * address (changes the state of the data bus so a + * floating bus doen't give a false OK), and then + * read the value back. Note that we read it back + * into a variable because the next time we read it, + * it might be right (been there, tough to explain to + * the quality guys why it prints a failure when the + * "is" and "should be" are obviously the same in the + * error message). + * + * Rather than exhaustively testing, we test some + * patterns by shifting '1' bits through a field of + * '0's and '0' bits through a field of '1's (i.e. + * pattern and ~pattern). + */ + for (i = 0; i < ARRAY_SIZE(bitpattern)/ + sizeof(resource_size_t); i++) { + val = bitpattern[i]; + + for (; val != 0; val <<= 1) { + *start = val; + /* clear the test data off of the bus */ + *dummy = ~val; + readback = *start; + if (readback != val) { + printf("FAILURE (data line): " + "expected 0x%08x, actual 0x%08x at address 0x%08x.\n", + val, readback, (resource_size_t)start); + return -EIO; + } + + *start = ~val; + *dummy = val; + readback = *start; + if (readback != ~val) { + printf("FAILURE (data line): " + "Is 0x%08x, should be 0x%08x at address 0x%08x.\n", + readback, + ~val, (resource_size_t)start); + return -EIO; + } + } + } + + + /* + * Based on code whose Original Author and Copyright + * information follows: Copyright (c) 1998 by Michael + * Barr. This software is placed into the public + * domain and may be used for any purpose. However, + * this notice must not be changed or removed and no + * warranty is either expressed or implied by its + * publication or distribution. + */ + + /* + * Address line test + * + * Description: Test the address bus wiring in a + * memory region by performing a walking + * 1's test on the relevant bits of the + * address and checking for aliasing. + * This test will find single-bit + * address failures such as stuck -high, + * stuck-low, and shorted pins. The base + * address and size of the region are + * selected by the caller. + * + * Notes: For best results, the selected base + * address should have enough LSB 0's to + * guarantee single address bit changes. + * For example, to test a 64-Kbyte + * region, select a base address on a + * 64-Kbyte boundary. Also, select the + * region size as a power-of-two if at + * all possible. + * + * ## NOTE ## Be sure to specify start and end + * addresses such that num_words has + * lots of bits set. For example an + * address range of 01000000 02000000 is + * bad while a range of 01000000 + * 01ffffff is perfect. + */ + + pattern = 0xAAAAAAAA; + anti_pattern = 0x55555555; + + /* + * Write the default pattern at each of the + * power-of-two offsets. + */ + for (offset = 1; offset <= num_words; offset <<= 1) + start[offset] = pattern; + + printf("Check for address bits stuck high.\n"); + + /* + * Check for address bits stuck high. + */ + for (offset = 1; offset <= num_words; offset <<= 1) { + temp = start[offset]; + if (temp != pattern) { + printf("FAILURE: Address bit " + "stuck high @ 0x%08x:" + " expected 0x%08x, actual 0x%08x.\n", + (resource_size_t)&start[offset], + pattern, temp); + return -EIO; + } + } + + printf("Check for address bits stuck " + "low or shorted.\n"); + + /* + * Check for address bits stuck low or shorted. + */ + for (offset2 = 1; offset2 <= num_words; offset2 <<= 1) { + start[offset2] = anti_pattern; + + for (offset = 1; offset <= num_words; offset <<= 1) { + temp = start[offset]; + + if ((temp != pattern) && + (offset != offset2)) { + printf("FAILURE: Address bit stuck" + " low or shorted @" + " 0x%08x: expected 0x%08x, actual 0x%08x.\n", + (resource_size_t)&start[offset], + pattern, temp); + return -EIO; + } + } + start[offset2] = pattern; + } + + /* + * We tested only the bus if != 0 + * leaving here + */ + if (bus_only) + return 0; + + printf("Starting integrity check of physicaly ram.\n" + "Filling ram with patterns...\n"); + + /* + * Description: Test the integrity of a physical + * memory device by performing an + * increment/decrement test over the + * entire region. In the process every + * storage bit in the device is tested + * as a zero and a one. The base address + * and the size of the region are + * selected by the caller. + */ + + /* + * Fill memory with a known pattern. + */ + init_progression_bar(num_words); + for (offset = 0; offset < num_words; offset++) { + /* + * Every 4K we update the progressbar. + */ + if (!(offset & (SZ_4K - 1))) { + if (ctrlc()) + return -EINTR; + show_progress(offset); + } + + start[offset] = offset + 1; + } + show_progress(offset); + + printf("\nCompare written patterns...\n"); + /* + * Check each location and invert it for the second pass. + */ + init_progression_bar(num_words - 1); + for (offset = 0; offset < num_words; offset++) { + if (!(offset & (SZ_4K - 1))) { + if (ctrlc()) + return -EINTR; + show_progress(offset); + } + + temp = start[offset]; + if (temp != (offset + 1)) { + printf("\nFAILURE (read/write) @ 0x%08x:" + " expected 0x%08x, actual 0x%08x.\n", + (resource_size_t)&start[offset], + (offset + 1), temp); + return -EIO; + } + + anti_pattern = ~(offset + 1); + start[offset] = anti_pattern; + } + show_progress(offset); + + printf("\nFilling ram with inverted pattern and compare it...\n"); + /* + * Check each location for the inverted pattern and zero it. + */ + init_progression_bar(num_words - 1); + for (offset = 0; offset < num_words; offset++) { + if (!(offset & (SZ_4K - 1))) { + if (ctrlc()) + return -EINTR; + show_progress(offset); + } + + anti_pattern = ~(offset + 1); + temp = start[offset]; + + if (temp != anti_pattern) { + printf("\nFAILURE (read/write): @ 0x%08x:" + " expected 0x%08x, actual 0x%08x.\n", + (resource_size_t)&start[offset], + anti_pattern, temp); + return -EIO; + } + + start[offset] = 0; + } + show_progress(offset); + + /* + * end of progressbar + */ + printf("\n"); + + return 0; +} diff --git a/common/menu.c b/common/menu.c index a672e59c0b..ef56190604 100644 --- a/common/menu.c +++ b/common/menu.c @@ -164,7 +164,7 @@ static void __print_entry(const char *str) static void print_menu_entry(struct menu *m, struct menu_entry *me, int selected) { - gotoXY(me->num + 1, 3); + gotoXY(3, me->num + 1); if (me->type == MENU_ENTRY_BOX) { if (me->box_state) @@ -175,7 +175,7 @@ static void print_menu_entry(struct menu *m, struct menu_entry *me, puts(" "); } - printf(" %d: ", me->num); + printf(" %2d: ", me->num); if (selected) puts("\e[7m"); @@ -234,7 +234,7 @@ static void print_menu(struct menu *m) struct menu_entry *me; clear(); - gotoXY(1, 2); + gotoXY(2, 1); if(m->display) { __print_entry(m->display); } else { @@ -269,7 +269,7 @@ int menu_show(struct menu *m) countdown = m->auto_select; if (m->auto_select >= 0) { - gotoXY(m->nb_entries + 2, 3); + gotoXY(3, m->nb_entries + 2); if (!m->auto_display) { printf("Auto Select in"); } else { @@ -293,10 +293,10 @@ int menu_show(struct menu *m) } } - gotoXY(m->nb_entries + 2, 3); + gotoXY(3, m->nb_entries + 2); printf("%*c", auto_display_len + 4, ' '); - gotoXY(m->selected->num + 1, 3); + gotoXY(3, m->selected->num + 1); do { struct menu_entry *old_selected = m->selected; @@ -361,7 +361,8 @@ int menu_show(struct menu *m) break; clear(); gotoXY(1,1); - m->selected->action(m, m->selected); + if (m->selected->action) + m->selected->action(m, m->selected); if (m->selected->non_re_ent) return m->selected->num; else diff --git a/common/misc.c b/common/misc.c index e9fdacc655..806649431d 100644 --- a/common/misc.c +++ b/common/misc.c @@ -125,3 +125,20 @@ EXPORT_SYMBOL(perror); void (*do_execute)(void *func, int argc, char *argv[]); EXPORT_SYMBOL(do_execute); + +static const char *boardinfo; + +const char *barebox_boardinfo(void) +{ + if (boardinfo) + return boardinfo; + + boardinfo = of_get_model(); + if (boardinfo) + boardinfo = xstrdup(boardinfo); + else + boardinfo = CONFIG_BOARDINFO; + + return boardinfo; +} +EXPORT_SYMBOL(barebox_boardinfo); diff --git a/common/module.c b/common/module.c index 109fe5cd00..eb882bce31 100644 --- a/common/module.c +++ b/common/module.c @@ -129,9 +129,6 @@ static int simplify_symbols(Elf32_Shdr *sechdrs, return ret; } -#define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1) -#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) - /* Update size with this section: return offset. */ static long get_offset(unsigned long *size, Elf32_Shdr *sechdr) { diff --git a/common/startup.c b/common/startup.c index ff00ca78ae..9b33a92c86 100644 --- a/common/startup.c +++ b/common/startup.c @@ -21,6 +21,10 @@ * */ +#ifdef CONFIG_DEBUG_INITCALLS +#define DEBUG +#endif + /** * @file * @brief Main entry into the C part of barebox diff --git a/common/version.c b/common/version.c index d33f4d0078..e21dbbedfa 100644 --- a/common/version.c +++ b/common/version.c @@ -1,7 +1,6 @@ #include <common.h> #include <generated/compile.h> #include <generated/utsrelease.h> -#include <of.h> const char version_string[] = "barebox " UTS_RELEASE " " UTS_VERSION "\n"; @@ -9,13 +8,6 @@ EXPORT_SYMBOL(version_string); void barebox_banner (void) { - const char *board; - - board = of_get_model(); - - if (!board) - board = CONFIG_BOARDINFO; - pr_info("\n\n%s\n\n", version_string); - pr_info("Board: %s\n", board); + pr_info("Board: %s\n", barebox_boardinfo()); } diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 7def9a093b..f9cf2d1436 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c @@ -224,13 +224,19 @@ static int ahci_rw(struct ata_port *ata, void *rbuf, const void *wbuf, struct ahci_port *ahci = container_of(ata, struct ahci_port, ata); u8 fis[20]; int ret; + int lba48 = ata_id_has_lba48(ata->id); memset(fis, 0, sizeof(fis)); /* Construct the FIS */ fis[0] = 0x27; /* Host to device FIS. */ fis[1] = 1 << 7; /* Command FIS. */ - fis[2] = wbuf ? ATA_CMD_WRITE_EXT : ATA_CMD_READ_EXT; /* Command byte. */ + + /* Command byte. */ + if (lba48) + fis[2] = wbuf ? ATA_CMD_WRITE_EXT : ATA_CMD_READ_EXT; + else + fis[2] = wbuf ? ATA_CMD_WRITE : ATA_CMD_READ; while (num_blocks) { int now; @@ -240,9 +246,14 @@ static int ahci_rw(struct ata_port *ata, void *rbuf, const void *wbuf, fis[4] = (block >> 0) & 0xff; fis[5] = (block >> 8) & 0xff; fis[6] = (block >> 16) & 0xff; - fis[7] = 1 << 6; /* device reg: set LBA mode */ - fis[8] = ((block >> 24) & 0xff); - fis[3] = 0xe0; /* features */ + + if (lba48) { + fis[7] = 1 << 6; /* device reg: set LBA mode */ + fis[8] = ((block >> 24) & 0xff); + fis[3] = 0xe0; /* features */ + } else { + fis[7] = ((block >> 24) & 0xf) | 0xe0; + } /* Block (sector) count */ fis[12] = (now >> 0) & 0xff; @@ -558,6 +569,20 @@ void ahci_info(struct device_d *dev) ahci_print_info(ahci); } +static int ahci_detect(struct device_d *dev) +{ + struct ahci_device *ahci = dev->priv; + int i; + + for (i = 0; i < ahci->n_ports; i++) { + struct ahci_port *ahci_port = &ahci->ports[i]; + + ata_port_detect(&ahci_port->ata); + } + + return 0; +} + int ahci_add_host(struct ahci_device *ahci) { u8 *mmio = (u8 *)ahci->mmio_base; @@ -619,6 +644,8 @@ int ahci_add_host(struct ahci_device *ahci) ahci_iowrite(ahci, HOST_CTL, tmp | HOST_IRQ_EN); tmp = ahci_ioread(ahci, HOST_CTL); + ahci->dev->detect = ahci_detect; + return 0; } diff --git a/drivers/ata/disk_ata_drive.c b/drivers/ata/disk_ata_drive.c index 2cff584d2a..ee1709e2ff 100644 --- a/drivers/ata/disk_ata_drive.c +++ b/drivers/ata/disk_ata_drive.c @@ -26,41 +26,6 @@ #include <disks.h> #include <dma.h> -#define ata_id_u32(id,n) \ - (((uint32_t) (id)[(n) + 1] << 16) | ((uint32_t) (id)[(n)])) -#define ata_id_u64(id,n) \ - ( ((uint64_t) (id)[(n) + 3] << 48) | \ - ((uint64_t) (id)[(n) + 2] << 32) | \ - ((uint64_t) (id)[(n) + 1] << 16) | \ - ((uint64_t) (id)[(n) + 0]) ) - -#define ata_id_has_lba(id) ((id)[49] & (1 << 9)) - -enum { - ATA_ID_SERNO = 10, -#define ATA_ID_SERNO_LEN 20 - ATA_ID_FW_REV = 23, -#define ATA_ID_FW_REV_LEN 8 - ATA_ID_PROD = 27, -#define ATA_ID_PROD_LEN 40 - ATA_ID_CAPABILITY = 49, - ATA_ID_FIELD_VALID = 53, - ATA_ID_LBA_CAPACITY = 60, - ATA_ID_MWDMA_MODES = 63, - ATA_ID_PIO_MODES = 64, - ATA_ID_QUEUE_DEPTH = 75, - ATA_ID_MAJOR_VER = 80, - ATA_ID_COMMAND_SET_1 = 82, - ATA_ID_COMMAND_SET_2 = 83, - ATA_ID_CFSSE = 84, - ATA_ID_CFS_ENABLE_1 = 85, - ATA_ID_CFS_ENABLE_2 = 86, - ATA_ID_CSF_DEFAULT = 87, - ATA_ID_UDMA_MODES = 88, - ATA_ID_HW_CONFIG = 93, - ATA_ID_LBA_CAPACITY_2 = 100, -}; - static int ata_id_is_valid(const uint16_t *id) { if ((id[ATA_ID_FIELD_VALID] & 1) == 0) { @@ -71,15 +36,6 @@ static int ata_id_is_valid(const uint16_t *id) return 0; } -static inline int ata_id_has_lba48(const uint16_t *id) -{ - if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000) - return 0; - if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2)) - return 0; - return id[ATA_ID_COMMAND_SET_2] & (1 << 10); -} - static uint64_t ata_id_n_sectors(uint16_t *id) { if (ata_id_has_lba(id)) { @@ -298,12 +254,16 @@ static int ata_port_init(struct ata_port *port) #ifdef DEBUG ata_dump_id(port->id); #endif - rc = cdev_find_free_index("ata"); - if (rc == -1) - pr_err("Cannot find a free index for the disk node\n"); + if (port->devname) { + port->blk.cdev.name = xstrdup(port->devname); + } else { + rc = cdev_find_free_index("ata"); + if (rc == -1) + pr_err("Cannot find a free index for the disk node\n"); + port->blk.cdev.name = asprintf("ata%d", rc); + } port->blk.num_blocks = ata_id_n_sectors(port->id); - port->blk.cdev.name = asprintf("ata%d", rc); port->blk.blockbits = SECTOR_SHIFT; rc = blockdevice_register(&port->blk); @@ -325,16 +285,12 @@ on_error: return rc; } -static int ata_set_probe(struct param_d *param, void *priv) +int ata_port_detect(struct ata_port *port) { - struct ata_port *port = priv; int ret; - if (!port->probe) - return 0; - if (port->initialized) { - dev_info(&port->class_dev, "already initialized\n"); + dev_dbg(&port->class_dev, "already initialized\n"); return 0; } @@ -347,6 +303,23 @@ static int ata_set_probe(struct param_d *param, void *priv) return 0; } +static int ata_set_probe(struct param_d *param, void *priv) +{ + struct ata_port *port = priv; + + if (!port->probe) + return 0; + + return ata_port_detect(port); +} + +static int ata_detect(struct device_d *dev) +{ + struct ata_port *port = container_of(dev, struct ata_port, class_dev); + + return ata_port_detect(port); +} + /** * Register an ATA drive behind an IDE like interface * @param dev The interface device @@ -357,9 +330,16 @@ int ata_port_register(struct ata_port *port) { int ret; - port->class_dev.id = DEVICE_ID_DYNAMIC; - strcpy(port->class_dev.name, "ata"); + if (port->devname) { + strcpy(port->class_dev.name, port->devname); + port->class_dev.id = DEVICE_ID_SINGLE; + } else { + strcpy(port->class_dev.name, "ata"); + port->class_dev.id = DEVICE_ID_DYNAMIC; + } + port->class_dev.parent = port->dev; + port->class_dev.detect = ata_detect; ret = register_device(&port->class_dev); if (ret) diff --git a/drivers/ata/ide-sff.c b/drivers/ata/ide-sff.c index 632b0e5910..0e8b744e2e 100644 --- a/drivers/ata/ide-sff.c +++ b/drivers/ata/ide-sff.c @@ -8,14 +8,6 @@ /* max timeout for a rotating disk in [ms] */ #define MAX_TIMEOUT 5000 -/** - * Collection of data we need to know about this drive - */ -struct ide_port { - struct ata_ioports *io; /**< register file */ - struct ata_port port; -}; - #define to_ata_drive_access(x) container_of((x), struct ide_port, port) #define DISK_MASTER 0 @@ -28,7 +20,7 @@ struct ide_port { */ static uint8_t ata_rd_status(struct ide_port *ide) { - return readb(ide->io->status_addr); + return readb(ide->io.status_addr); } /** @@ -90,12 +82,12 @@ static int ata_set_lba_sector(struct ide_port *ide, unsigned drive, uint64_t num if (num > 0x0FFFFFFF || drive > 1) return -EINVAL; - writeb(0xA0 | LBA_FLAG | drive << 4 | num >> 24, ide->io->device_addr); - writeb(0x00, ide->io->error_addr); - writeb(0x01, ide->io->nsect_addr); - writeb(num, ide->io->lbal_addr); /* 0 ... 7 */ - writeb(num >> 8, ide->io->lbam_addr); /* 8 ... 15 */ - writeb(num >> 16, ide->io->lbah_addr); /* 16 ... 23 */ + writeb(0xA0 | LBA_FLAG | drive << 4 | num >> 24, ide->io.device_addr); + writeb(0x00, ide->io.error_addr); + writeb(0x01, ide->io.nsect_addr); + writeb(num, ide->io.lbal_addr); /* 0 ... 7 */ + writeb(num >> 8, ide->io.lbam_addr); /* 8 ... 15 */ + writeb(num >> 16, ide->io.lbah_addr); /* 16 ... 23 */ return 0; } @@ -114,7 +106,7 @@ static int ata_wr_cmd(struct ide_port *ide, uint8_t cmd) if (rc != 0) return rc; - writeb(cmd, ide->io->command_addr); + writeb(cmd, ide->io.command_addr); return 0; } @@ -125,7 +117,7 @@ static int ata_wr_cmd(struct ide_port *ide, uint8_t cmd) */ static void ata_wr_dev_ctrl(struct ide_port *ide, uint8_t val) { - writeb(val, ide->io->ctl_addr); + writeb(val, ide->io.ctl_addr); } /** @@ -138,12 +130,12 @@ static void ata_rd_sector(struct ide_port *ide, void *buf) unsigned u = SECTOR_SIZE / sizeof(uint16_t); uint16_t *b = buf; - if (ide->io->dataif_be) { + if (ide->io.dataif_be) { for (; u > 0; u--) - *b++ = be16_to_cpu(readw(ide->io->data_addr)); + *b++ = be16_to_cpu(readw(ide->io.data_addr)); } else { for (; u > 0; u--) - *b++ = le16_to_cpu(readw(ide->io->data_addr)); + *b++ = le16_to_cpu(readw(ide->io.data_addr)); } } @@ -157,12 +149,12 @@ static void ata_wr_sector(struct ide_port *ide, const void *buf) unsigned u = SECTOR_SIZE / sizeof(uint16_t); const uint16_t *b = buf; - if (ide->io->dataif_be) { + if (ide->io.dataif_be) { for (; u > 0; u--) - writew(cpu_to_be16(*b++), ide->io->data_addr); + writew(cpu_to_be16(*b++), ide->io.data_addr); } else { for (; u > 0; u--) - writew(cpu_to_le16(*b++), ide->io->data_addr); + writew(cpu_to_le16(*b++), ide->io.data_addr); } } @@ -176,10 +168,10 @@ static int ide_read_id(struct ata_port *port, void *buf) struct ide_port *ide = to_ata_drive_access(port); int rc; - writeb(0xA0, ide->io->device_addr); /* FIXME drive */ - writeb(0x00, ide->io->lbal_addr); - writeb(0x00, ide->io->lbam_addr); - writeb(0x00, ide->io->lbah_addr); + writeb(0xA0, ide->io.device_addr); /* FIXME drive */ + writeb(0x00, ide->io.lbal_addr); + writeb(0x00, ide->io.lbam_addr); + writeb(0x00, ide->io.lbah_addr); rc = ata_wr_cmd(ide, ATA_CMD_ID_ATA); if (rc != 0) @@ -201,11 +193,11 @@ static int ide_reset(struct ata_port *port) uint8_t reg; /* try a hard reset first (if available) */ - if (ide->io->reset != NULL) { + if (ide->io.reset != NULL) { pr_debug("%s: Resetting drive...\n", __func__); - ide->io->reset(1); + ide->io.reset(1); rc = ata_wait_busy(ide, 500); - ide->io->reset(0); + ide->io.reset(0); if (rc == 0) { rc = ata_wait_ready(ide, MAX_TIMEOUT); if (rc != 0) @@ -324,16 +316,11 @@ static struct ata_port_operations ide_ops = { .reset = ide_reset, }; -int ide_port_register(struct device_d *dev, struct ata_ioports *io) +int ide_port_register(struct ide_port *ide) { - struct ide_port *ide; int ret; - ide = xzalloc(sizeof(*ide)); - - ide->io = io; ide->port.ops = &ide_ops; - ide->port.dev = dev; ret = ata_port_register(&ide->port); diff --git a/drivers/ata/intf_platform_ide.c b/drivers/ata/intf_platform_ide.c index 0b56eb4aa8..8ae0f054c3 100644 --- a/drivers/ata/intf_platform_ide.c +++ b/drivers/ata/intf_platform_ide.c @@ -80,7 +80,7 @@ static int platform_ide_probe(struct device_d *dev) { int rc; struct ide_port_info *pdata = dev->platform_data; - struct ata_ioports *io; + struct ide_port *ide; void *reg_base, *alt_base; if (pdata == NULL) { @@ -88,17 +88,17 @@ static int platform_ide_probe(struct device_d *dev) return -EINVAL; } - io = xzalloc(sizeof(struct ata_ioports)); + ide = xzalloc(sizeof(*ide)); reg_base = dev_request_mem_region(dev, 0); alt_base = dev_request_mem_region(dev, 1); - platform_ide_setup_port(reg_base, alt_base, io, pdata->ioport_shift); - io->reset = pdata->reset; - io->dataif_be = pdata->dataif_be; + platform_ide_setup_port(reg_base, alt_base, &ide->io, pdata->ioport_shift); + ide->io.reset = pdata->reset; + ide->io.dataif_be = pdata->dataif_be; - rc = ide_port_register(dev, io); + rc = ide_port_register(ide); if (rc != 0) { dev_err(dev, "Cannot register IDE interface\n"); - free(io); + free(ide); } return rc; diff --git a/drivers/ata/pata-imx.c b/drivers/ata/pata-imx.c index 5d44883453..93809c2ebe 100644 --- a/drivers/ata/pata-imx.c +++ b/drivers/ata/pata-imx.c @@ -146,14 +146,22 @@ static void imx_pata_setup_port(void *reg_base, void *alt_base, } } +static int pata_imx_detect(struct device_d *dev) +{ + struct ide_port *ide = dev->priv; + + return ata_port_detect(&ide->port); +} + static int imx_pata_probe(struct device_d *dev) { - struct ata_ioports *io; + struct ide_port *ide; struct clk *clk; void __iomem *base; int ret; + const char *devname = NULL; - io = xzalloc(sizeof(struct ata_ioports)); + ide = xzalloc(sizeof(*ide)); base = dev_request_mem_region(dev, 0); clk = clk_get(dev, NULL); @@ -163,7 +171,7 @@ static int imx_pata_probe(struct device_d *dev) } imx_pata_setup_port(base + PATA_IMX_DRIVE_DATA, - base + PATA_IMX_DRIVE_CONTROL, io, 2); + base + PATA_IMX_DRIVE_CONTROL, &ide->io, 2); /* deassert resets */ writel(PATA_IMX_ATA_CTRL_FIFO_RST_B | @@ -172,7 +180,19 @@ static int imx_pata_probe(struct device_d *dev) pata_imx_set_bus_timing(base, clk_get_rate(clk), 4); - ret= ide_port_register(dev, io); + if (IS_ENABLED(CONFIG_OFDEVICE)) { + devname = of_alias_get(dev->device_node); + if (devname) + devname = xstrdup(devname); + } + + ide->port.dev = dev; + ide->port.devname = devname; + + dev->priv = ide; + dev->detect = pata_imx_detect; + + ret = ide_port_register(ide); if (ret) { dev_err(dev, "Cannot register IDE interface: %s\n", strerror(-ret)); @@ -185,13 +205,20 @@ out_free_clk: clk_put(clk); out_free: - free(io); + free(ide); return ret; } +static __maybe_unused struct of_device_id imx_pata_dt_ids[] = { + { + .compatible = "fsl,imx27-pata", + }, +}; + static struct driver_d imx_pata_driver = { .name = "imx-pata", .probe = imx_pata_probe, + .of_compatible = DRV_OF_COMPAT(imx_pata_dt_ids), }; device_platform_driver(imx_pata_driver); diff --git a/drivers/ata/sata-imx.c b/drivers/ata/sata-imx.c index 13bf116fdd..ef7989e610 100644 --- a/drivers/ata/sata-imx.c +++ b/drivers/ata/sata-imx.c @@ -141,9 +141,22 @@ static struct platform_device_id imx_sata_ids[] = { }, }; +static __maybe_unused struct of_device_id imx_sata_dt_ids[] = { + { + .compatible = "fsl,imx6q-ahci", + .data = (unsigned long)&data_imx6, + }, { + .compatible = "fsl,imx53-ahci", + .data = (unsigned long)&data_imx53, + }, { + /* sentinel */ + } +}; + static struct driver_d imx_sata_driver = { .name = "imx-sata", .probe = imx_sata_probe, .id_table = imx_sata_ids, + .of_compatible = DRV_OF_COMPAT(imx_sata_dt_ids), }; device_platform_driver(imx_sata_driver); diff --git a/drivers/base/driver.c b/drivers/base/driver.c index 810d0011f6..16b7f06c4a 100644 --- a/drivers/base/driver.c +++ b/drivers/base/driver.c @@ -100,6 +100,16 @@ int device_detect(struct device_d *dev) return dev->detect(dev); } +int device_detect_by_name(const char *devname) +{ + struct device_d *dev = get_device_by_name(devname); + + if (!dev) + return -ENODEV; + + return device_detect(dev); +} + static int match(struct driver_d *drv, struct device_d *dev) { int ret; diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 656b8594b1..d6c923d746 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -1,3 +1,5 @@ obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed.o clk-divider.o clk-fixed-factor.o \ clk-mux.o clk-gate.o clk-divider-table.o obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o + +obj-$(CONFIG_ARCH_MXS) += mxs/ diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 58a7ea564c..3bf8105a8b 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -20,13 +20,12 @@ #include <linux/clk.h> #include <linux/err.h> -struct clk_divider { - struct clk clk; - u8 shift; - u8 width; - void __iomem *reg; - const char *parent; -}; +static unsigned int clk_divider_maxdiv(struct clk_divider *div) +{ + if (div->flags & CLK_DIVIDER_ONE_BASED) + return (1 << div->width) - 1; + return 1 << div->width; +} static int clk_divider_set_rate(struct clk *clk, unsigned long rate, unsigned long parent_rate) @@ -40,11 +39,11 @@ static int clk_divider_set_rate(struct clk *clk, unsigned long rate, rate = 1; divval = DIV_ROUND_UP(parent_rate, rate); + if (divval > clk_divider_maxdiv(div)) + divval = clk_divider_maxdiv(div); - if (divval > (1 << div->width)) - divval = 1 << (div->width); - - divval--; + if (!(div->flags & CLK_DIVIDER_ONE_BASED)) + divval--; val = readl(div->reg); val &= ~(((1 << div->width) - 1) << div->shift); @@ -63,7 +62,12 @@ static unsigned long clk_divider_recalc_rate(struct clk *clk, val = readl(div->reg) >> div->shift; val &= (1 << div->width) - 1; - val++; + if (div->flags & CLK_DIVIDER_ONE_BASED) { + if (!val) + val++; + } else { + val++; + } return parent_rate / val; } @@ -96,3 +100,19 @@ struct clk *clk_divider(const char *name, const char *parent, return &div->clk; } + +struct clk *clk_divider_one_based(const char *name, const char *parent, + void __iomem *reg, u8 shift, u8 width) +{ + struct clk_divider *div; + struct clk *clk; + + clk = clk_divider(name, parent, reg, shift, width); + if (IS_ERR(clk)) + return clk; + + div = container_of(clk, struct clk_divider, clk); + div->flags |= CLK_DIVIDER_ONE_BASED; + + return clk; +} diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index a455094b69..f632d8555b 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -25,6 +25,8 @@ struct clk_gate { void __iomem *reg; int shift; const char *parent; +#define CLK_GATE_INVERTED (1 << 0) + unsigned flags; }; static int clk_gate_enable(struct clk *clk) @@ -33,7 +35,12 @@ static int clk_gate_enable(struct clk *clk) u32 val; val = readl(g->reg); - val |= 1 << g->shift; + + if (g->flags & CLK_GATE_INVERTED) + val &= ~(1 << g->shift); + else + val |= 1 << g->shift; + writel(val, g->reg); return 0; @@ -45,7 +52,12 @@ static void clk_gate_disable(struct clk *clk) u32 val; val = readl(g->reg); - val &= ~(1 << g->shift); + + if (g->flags & CLK_GATE_INVERTED) + val |= 1 << g->shift; + else + val &= ~(1 << g->shift); + writel(val, g->reg); } @@ -57,9 +69,9 @@ static int clk_gate_is_enabled(struct clk *clk) val = readl(g->reg); if (val & (1 << g->shift)) - return 1; + return g->flags & CLK_GATE_INVERTED ? 0 : 1; else - return 0; + return g->flags & CLK_GATE_INVERTED ? 1 : 0; } struct clk_ops clk_gate_ops = { @@ -90,3 +102,20 @@ struct clk *clk_gate(const char *name, const char *parent, void __iomem *reg, return &g->clk; } + +struct clk *clk_gate_inverted(const char *name, const char *parent, + void __iomem *reg, u8 shift) +{ + struct clk *clk; + struct clk_gate *g; + + clk = clk_gate(name, parent, reg, shift); + if (IS_ERR(clk)) + return clk; + + g = container_of(clk, struct clk_gate, clk); + + g->flags = CLK_GATE_INVERTED; + + return clk; +} diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index a3def5330f..690a0c63da 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -208,7 +208,7 @@ int clk_register(struct clk *clk) return 0; } -static int clk_is_enabled(struct clk *clk) +int clk_is_enabled(struct clk *clk) { int enabled; diff --git a/drivers/clk/mxs/Makefile b/drivers/clk/mxs/Makefile new file mode 100644 index 0000000000..fb4e5dbeea --- /dev/null +++ b/drivers/clk/mxs/Makefile @@ -0,0 +1,5 @@ +obj-$(CONFIG_ARCH_MXS) += clk-ref.o clk-pll.o clk-frac.o clk-div.o +obj-$(CONFIG_DRIVER_VIDEO_STM) += clk-lcdif.o + +obj-$(CONFIG_ARCH_IMX23) += clk-imx23.o +obj-$(CONFIG_ARCH_IMX28) += clk-imx28.o diff --git a/drivers/clk/mxs/clk-div.c b/drivers/clk/mxs/clk-div.c new file mode 100644 index 0000000000..e8dae25da5 --- /dev/null +++ b/drivers/clk/mxs/clk-div.c @@ -0,0 +1,112 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <common.h> +#include <io.h> +#include <linux/clk.h> +#include <linux/err.h> + +#include "clk.h" + +/** + * struct clk_div - mxs integer divider clock + * @divider: the parent class + * @ops: pointer to clk_ops of parent class + * @reg: register address + * @busy: busy bit shift + * + * The mxs divider clock is a subclass of basic clk_divider with an + * addtional busy bit. + */ +struct clk_div { + struct clk_divider divider; + const char *parent; + const struct clk_ops *ops; + void __iomem *reg; + u8 busy; +}; + +static inline struct clk_div *to_clk_div(struct clk *clk) +{ + struct clk_divider *divider = container_of(clk, struct clk_divider, clk); + + return container_of(divider, struct clk_div, divider); +} + +static unsigned long clk_div_recalc_rate(struct clk *clk, + unsigned long parent_rate) +{ + struct clk_div *div = to_clk_div(clk); + + return div->ops->recalc_rate(&div->divider.clk, parent_rate); +} + +static long clk_div_round_rate(struct clk *clk, unsigned long rate, + unsigned long *prate) +{ + struct clk_div *div = to_clk_div(clk); + + return div->ops->round_rate(&div->divider.clk, rate, prate); +} + +static int clk_div_set_rate(struct clk *clk, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_div *div = to_clk_div(clk); + int ret; + + ret = div->ops->set_rate(&div->divider.clk, rate, parent_rate); + if (ret) + return ret; + + if (clk_is_enabled(clk)) + while (readl(div->reg) & 1 << div->busy); + + return 0; +} + +static struct clk_ops clk_div_ops = { + .recalc_rate = clk_div_recalc_rate, + .round_rate = clk_div_round_rate, + .set_rate = clk_div_set_rate, +}; + +struct clk *mxs_clk_div(const char *name, const char *parent_name, + void __iomem *reg, u8 shift, u8 width, u8 busy) +{ + struct clk_div *div; + int ret; + + div = xzalloc(sizeof(*div)); + if (!div) + return ERR_PTR(-ENOMEM); + + div->parent = parent_name; + div->divider.clk.name = name; + div->divider.clk.ops = &clk_div_ops; + div->divider.clk.parent_names = &div->parent; + div->divider.clk.num_parents = 1; + + div->reg = reg; + div->busy = busy; + + div->divider.reg = reg; + div->divider.shift = shift; + div->divider.width = width; + div->divider.flags = CLK_DIVIDER_ONE_BASED; + div->ops = &clk_divider_ops; + + ret = clk_register(&div->divider.clk); + if (ret) + return ERR_PTR(ret); + + return &div->divider.clk; +} diff --git a/drivers/clk/mxs/clk-frac.c b/drivers/clk/mxs/clk-frac.c new file mode 100644 index 0000000000..7aa85045a4 --- /dev/null +++ b/drivers/clk/mxs/clk-frac.c @@ -0,0 +1,136 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <common.h> +#include <linux/clk.h> +#include <linux/err.h> +#include <io.h> +#include <asm-generic/div64.h> + +#include "clk.h" + +/** + * struct clk_frac - mxs fractional divider clock + * @hw: clk_hw for the fractional divider clock + * @reg: register address + * @shift: the divider bit shift + * @width: the divider bit width + * @busy: busy bit shift + * + * The clock is an adjustable fractional divider with a busy bit to wait + * when the divider is adjusted. + */ +struct clk_frac { + struct clk clk; + const char *parent; + void __iomem *reg; + u8 shift; + u8 width; + u8 busy; +}; + +#define to_clk_frac(_hw) container_of(_hw, struct clk_frac, clk) + +static unsigned long clk_frac_recalc_rate(struct clk *clk, + unsigned long parent_rate) +{ + struct clk_frac *frac = to_clk_frac(clk); + u32 div; + + div = readl(frac->reg) >> frac->shift; + div &= (1 << frac->width) - 1; + + return (parent_rate >> frac->width) * div; +} + +static long clk_frac_round_rate(struct clk *clk, unsigned long rate, + unsigned long *prate) +{ + struct clk_frac *frac = to_clk_frac(clk); + unsigned long parent_rate = *prate; + u32 div; + u64 tmp; + + if (rate > parent_rate) + return -EINVAL; + + tmp = rate; + tmp <<= frac->width; + do_div(tmp, parent_rate); + div = tmp; + + if (!div) + return -EINVAL; + + return (parent_rate >> frac->width) * div; +} + +static int clk_frac_set_rate(struct clk *clk, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_frac *frac = to_clk_frac(clk); + u32 div, val; + u64 tmp; + + if (rate > parent_rate) + return -EINVAL; + + tmp = rate; + tmp <<= frac->width; + do_div(tmp, parent_rate); + div = tmp; + + if (!div) + return -EINVAL; + + val = readl(frac->reg); + val &= ~(((1 << frac->width) - 1) << frac->shift); + val |= div << frac->shift; + writel(val, frac->reg); + + if (clk_is_enabled(clk)) + while (readl(frac->reg) & 1 << frac->busy); + + return 0; +} + +static struct clk_ops clk_frac_ops = { + .recalc_rate = clk_frac_recalc_rate, + .round_rate = clk_frac_round_rate, + .set_rate = clk_frac_set_rate, +}; + +struct clk *mxs_clk_frac(const char *name, const char *parent_name, + void __iomem *reg, u8 shift, u8 width, u8 busy) +{ + struct clk_frac *frac; + int ret; + + frac = kzalloc(sizeof(*frac), GFP_KERNEL); + if (!frac) + return ERR_PTR(-ENOMEM); + + frac->parent = parent_name; + frac->clk.name = name; + frac->clk.ops = &clk_frac_ops; + frac->clk.parent_names = &frac->parent; + frac->clk.num_parents = 1; + + frac->reg = reg; + frac->shift = shift; + frac->width = width; + + ret = clk_register(&frac->clk); + if (ret) + return ERR_PTR(ret); + + return &frac->clk; +} diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c new file mode 100644 index 0000000000..4b153503a4 --- /dev/null +++ b/drivers/clk/mxs/clk-imx23.c @@ -0,0 +1,156 @@ +/* + * Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#include <common.h> +#include <init.h> +#include <driver.h> +#include <linux/clk.h> +#include <io.h> +#include <linux/clkdev.h> +#include <linux/err.h> +#include <mach/imx-regs.h> + +#include "clk.h" + +#define PLLCTRL0 (regs + 0x0000) +#define CPU (regs + 0x0020) +#define HBUS (regs + 0x0030) +#define XBUS (regs + 0x0040) +#define XTAL (regs + 0x0050) +#define PIX (regs + 0x0060) +#define SSP (regs + 0x0070) +#define GPMI (regs + 0x0080) +#define SPDIF (regs + 0x0090) +#define EMI (regs + 0x00a0) +#define SAIF (regs + 0x00c0) +#define TV (regs + 0x00d0) +#define ETM (regs + 0x00e0) +#define FRAC (regs + 0x00f0) +#define CLKSEQ (regs + 0x0110) + +static const char *sel_pll[] = { "pll", "ref_xtal", }; +static const char *sel_cpu[] = { "ref_cpu", "ref_xtal", }; +static const char *sel_pix[] = { "ref_pix", "ref_xtal", }; +static const char *sel_io[] = { "ref_io", "ref_xtal", }; +static const char *cpu_sels[] = { "cpu_pll", "cpu_xtal", }; +static const char *emi_sels[] = { "emi_pll", "emi_xtal", }; + +enum imx23_clk { + ref_xtal, pll, ref_cpu, ref_emi, ref_pix, ref_io, saif_sel, + lcdif_sel, gpmi_sel, ssp_sel, emi_sel, cpu, etm_sel, cpu_pll, + cpu_xtal, hbus, xbus, lcdif_div, ssp_div, gpmi_div, emi_pll, + emi_xtal, etm_div, saif_div, clk32k_div, rtc, adc, spdif_div, + clk32k, dri, pwm, filt, uart, ssp, gpmi, spdif, emi, saif, + lcdif, etm, usb, usb_phy, lcdif_comp, + clk_max +}; + +static struct clk *clks[clk_max]; + +int __init mx23_clocks_init(void __iomem *regs) +{ + clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000); + clks[pll] = mxs_clk_pll("pll", "ref_xtal", PLLCTRL0, 16, 480000000); + clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll", FRAC, 0); + clks[ref_emi] = mxs_clk_ref("ref_emi", "pll", FRAC, 1); + clks[ref_pix] = mxs_clk_ref("ref_pix", "pll", FRAC, 2); + clks[ref_io] = mxs_clk_ref("ref_io", "pll", FRAC, 3); + clks[saif_sel] = mxs_clk_mux("saif_sel", CLKSEQ, 0, 1, sel_pll, ARRAY_SIZE(sel_pll)); + clks[lcdif_sel] = mxs_clk_mux("lcdif_sel", CLKSEQ, 1, 1, sel_pix, ARRAY_SIZE(sel_pix)); + clks[gpmi_sel] = mxs_clk_mux("gpmi_sel", CLKSEQ, 4, 1, sel_io, ARRAY_SIZE(sel_io)); + clks[ssp_sel] = mxs_clk_mux("ssp_sel", CLKSEQ, 5, 1, sel_io, ARRAY_SIZE(sel_io)); + clks[emi_sel] = mxs_clk_mux("emi_sel", CLKSEQ, 6, 1, emi_sels, ARRAY_SIZE(emi_sels)); + clks[cpu] = mxs_clk_mux("cpu", CLKSEQ, 7, 1, cpu_sels, ARRAY_SIZE(cpu_sels)); + clks[etm_sel] = mxs_clk_mux("etm_sel", CLKSEQ, 8, 1, sel_cpu, ARRAY_SIZE(sel_cpu)); + clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); + clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); + clks[hbus] = mxs_clk_div("hbus", "cpu", HBUS, 0, 5, 29); + clks[xbus] = mxs_clk_div("xbus", "ref_xtal", XBUS, 0, 10, 31); + clks[lcdif_div] = mxs_clk_div("lcdif_div", "lcdif_sel", PIX, 0, 12, 29); + clks[ssp_div] = mxs_clk_div("ssp_div", "ssp_sel", SSP, 0, 9, 29); + clks[gpmi_div] = mxs_clk_div("gpmi_div", "gpmi_sel", GPMI, 0, 10, 29); + clks[emi_pll] = mxs_clk_div("emi_pll", "ref_emi", EMI, 0, 6, 28); + clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29); + clks[etm_div] = mxs_clk_div("etm_div", "etm_sel", ETM, 0, 6, 29); + clks[saif_div] = mxs_clk_frac("saif_div", "saif_sel", SAIF, 0, 16, 29); + clks[clk32k_div] = mxs_clk_fixed_factor("clk32k_div", "ref_xtal", 1, 750); + clks[rtc] = mxs_clk_fixed_factor("rtc", "ref_xtal", 1, 768); + clks[adc] = mxs_clk_fixed_factor("adc", "clk32k", 1, 16); + clks[spdif_div] = mxs_clk_fixed_factor("spdif_div", "pll", 1, 4); + clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26); + clks[dri] = mxs_clk_gate("dri", "ref_xtal", XTAL, 28); + clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29); + clks[filt] = mxs_clk_gate("filt", "ref_xtal", XTAL, 30); + clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31); + clks[ssp] = mxs_clk_gate("ssp", "ssp_div", SSP, 31); + clks[gpmi] = mxs_clk_gate("gpmi", "gpmi_div", GPMI, 31); + clks[spdif] = mxs_clk_gate("spdif", "spdif_div", SPDIF, 31); + clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31); + clks[saif] = mxs_clk_gate("saif", "saif_div", SAIF, 31); + clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", PIX, 31); + clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31); + clks[lcdif_comp] = mxs_clk_lcdif("lcdif_comp", clks[ref_pix], + clks[lcdif_div], clks[lcdif]); + + clk_set_rate(clks[ref_io], 480000000); + clk_set_parent(clks[ssp_sel], clks[ref_io]); + clk_set_rate(clks[ssp_div], 96000000); + clk_set_parent(clks[lcdif_sel], clks[ref_pix]); + + clkdev_add_physbase(clks[ssp], IMX_SSP1_BASE, NULL); + clkdev_add_physbase(clks[ssp], IMX_SSP2_BASE, NULL); + clkdev_add_physbase(clks[xbus], IMX_DBGUART_BASE, NULL); + clkdev_add_physbase(clks[hbus], IMX_OCOTP_BASE, NULL); + clkdev_add_physbase(clks[uart], IMX_UART1_BASE, NULL); + clkdev_add_physbase(clks[uart], IMX_UART2_BASE, NULL); + clkdev_add_physbase(clks[gpmi], MXS_GPMI_BASE, NULL); + if (IS_ENABLED(CONFIG_DRIVER_VIDEO_STM)) + clkdev_add_physbase(clks[lcdif_comp], IMX_FB_BASE, NULL); + + return 0; +} + +static int imx23_ccm_probe(struct device_d *dev) +{ + void __iomem *regs; + + regs = dev_request_mem_region(dev, 0); + + mx23_clocks_init(regs); + + return 0; +} + +static __maybe_unused struct of_device_id imx23_ccm_dt_ids[] = { + { + .compatible = "fsl,imx23-clkctrl", + }, { + /* sentinel */ + } +}; + +static struct driver_d imx23_ccm_driver = { + .probe = imx23_ccm_probe, + .name = "imx23-clkctrl", + .of_compatible = DRV_OF_COMPAT(imx23_ccm_dt_ids), +}; + +static int imx23_ccm_init(void) +{ + return platform_driver_register(&imx23_ccm_driver); +} +postcore_initcall(imx23_ccm_init); diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c new file mode 100644 index 0000000000..0350affe93 --- /dev/null +++ b/drivers/clk/mxs/clk-imx28.c @@ -0,0 +1,195 @@ +/* + * Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. + */ + +#include <common.h> +#include <init.h> +#include <driver.h> +#include <linux/clk.h> +#include <io.h> +#include <linux/clkdev.h> +#include <linux/err.h> +#include <mach/imx-regs.h> + +#include "clk.h" + +#define PLL0CTRL0 (regs + 0x0000) +#define PLL1CTRL0 (regs + 0x0020) +#define PLL2CTRL0 (regs + 0x0040) +#define CPU (regs + 0x0050) +#define HBUS (regs + 0x0060) +#define XBUS (regs + 0x0070) +#define XTAL (regs + 0x0080) +#define SSP0 (regs + 0x0090) +#define SSP1 (regs + 0x00a0) +#define SSP2 (regs + 0x00b0) +#define SSP3 (regs + 0x00c0) +#define GPMI (regs + 0x00d0) +#define SPDIF (regs + 0x00e0) +#define EMI (regs + 0x00f0) +#define SAIF0 (regs + 0x0100) +#define SAIF1 (regs + 0x0110) +#define LCDIF (regs + 0x0120) +#define ETM (regs + 0x0130) +#define ENET (regs + 0x0140) +#define FLEXCAN (regs + 0x0160) +#define FRAC0 (regs + 0x01b0) +#define FRAC1 (regs + 0x01c0) +#define CLKSEQ (regs + 0x01d0) + +static const char *sel_cpu[] = { "ref_cpu", "ref_xtal", }; +static const char *sel_io0[] = { "ref_io0", "ref_xtal", }; +static const char *sel_io1[] = { "ref_io1", "ref_xtal", }; +static const char *sel_pix[] = { "ref_pix", "ref_xtal", }; +static const char *sel_gpmi[] = { "ref_gpmi", "ref_xtal", }; +static const char *cpu_sels[] = { "cpu_pll", "cpu_xtal", }; +static const char *emi_sels[] = { "emi_pll", "emi_xtal", }; +static const char *ptp_sels[] = { "ref_xtal", "pll0", }; + +enum imx28_clk { + ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1, + ref_pix, ref_hsadc, ref_gpmi, saif0_sel, saif1_sel, gpmi_sel, + ssp0_sel, ssp1_sel, ssp2_sel, ssp3_sel, emi_sel, etm_sel, + lcdif_sel, cpu, ptp_sel, cpu_pll, cpu_xtal, hbus, xbus, + ssp0_div, ssp1_div, ssp2_div, ssp3_div, gpmi_div, emi_pll, + emi_xtal, lcdif_div, etm_div, ptp, saif0_div, saif1_div, + clk32k_div, rtc, lradc, spdif_div, clk32k, pwm, uart, ssp0, + ssp1, ssp2, ssp3, gpmi, spdif, emi, saif0, saif1, lcdif, etm, + fec, can0, can1, usb0, usb1, usb0_phy, usb1_phy, enet_out, + lcdif_comp, clk_max +}; + +static struct clk *clks[clk_max]; + +int __init mx28_clocks_init(void __iomem *regs) +{ + clks[ref_xtal] = clk_fixed("ref_xtal", 24000000); + clks[pll0] = mxs_clk_pll("pll0", "ref_xtal", PLL0CTRL0, 17, 480000000); + clks[pll1] = mxs_clk_pll("pll1", "ref_xtal", PLL1CTRL0, 17, 480000000); + clks[pll2] = mxs_clk_pll("pll2", "ref_xtal", PLL2CTRL0, 23, 50000000); + clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll0", FRAC0, 0); + clks[ref_emi] = mxs_clk_ref("ref_emi", "pll0", FRAC0, 1); + clks[ref_io1] = mxs_clk_ref("ref_io1", "pll0", FRAC0, 2); + clks[ref_io0] = mxs_clk_ref("ref_io0", "pll0", FRAC0, 3); + clks[ref_pix] = mxs_clk_ref("ref_pix", "pll0", FRAC1, 0); + clks[ref_hsadc] = mxs_clk_ref("ref_hsadc", "pll0", FRAC1, 1); + clks[ref_gpmi] = mxs_clk_ref("ref_gpmi", "pll0", FRAC1, 2); + clks[gpmi_sel] = mxs_clk_mux("gpmi_sel", CLKSEQ, 2, 1, sel_gpmi, ARRAY_SIZE(sel_gpmi)); + clks[ssp0_sel] = mxs_clk_mux("ssp0_sel", CLKSEQ, 3, 1, sel_io0, ARRAY_SIZE(sel_io0)); + clks[ssp1_sel] = mxs_clk_mux("ssp1_sel", CLKSEQ, 4, 1, sel_io0, ARRAY_SIZE(sel_io0)); + clks[ssp2_sel] = mxs_clk_mux("ssp2_sel", CLKSEQ, 5, 1, sel_io1, ARRAY_SIZE(sel_io1)); + clks[ssp3_sel] = mxs_clk_mux("ssp3_sel", CLKSEQ, 6, 1, sel_io1, ARRAY_SIZE(sel_io1)); + clks[emi_sel] = mxs_clk_mux("emi_sel", CLKSEQ, 7, 1, emi_sels, ARRAY_SIZE(emi_sels)); + clks[etm_sel] = mxs_clk_mux("etm_sel", CLKSEQ, 8, 1, sel_cpu, ARRAY_SIZE(sel_cpu)); + clks[lcdif_sel] = mxs_clk_mux("lcdif_sel", CLKSEQ, 14, 1, sel_pix, ARRAY_SIZE(sel_pix)); + clks[cpu] = mxs_clk_mux("cpu", CLKSEQ, 18, 1, cpu_sels, ARRAY_SIZE(cpu_sels)); + clks[ptp_sel] = mxs_clk_mux("ptp_sel", ENET, 19, 1, ptp_sels, ARRAY_SIZE(ptp_sels)); + clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28); + clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29); + clks[hbus] = mxs_clk_div("hbus", "cpu", HBUS, 0, 5, 31); + clks[xbus] = mxs_clk_div("xbus", "ref_xtal", XBUS, 0, 10, 31); + clks[ssp0_div] = mxs_clk_div("ssp0_div", "ssp0_sel", SSP0, 0, 9, 29); + clks[ssp1_div] = mxs_clk_div("ssp1_div", "ssp1_sel", SSP1, 0, 9, 29); + clks[ssp2_div] = mxs_clk_div("ssp2_div", "ssp2_sel", SSP2, 0, 9, 29); + clks[ssp3_div] = mxs_clk_div("ssp3_div", "ssp3_sel", SSP3, 0, 9, 29); + clks[gpmi_div] = mxs_clk_div("gpmi_div", "gpmi_sel", GPMI, 0, 10, 29); + clks[emi_pll] = mxs_clk_div("emi_pll", "ref_emi", EMI, 0, 6, 28); + clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29); + clks[lcdif_div] = mxs_clk_div("lcdif_div", "lcdif_sel", LCDIF, 0, 13, 29); + clks[etm_div] = mxs_clk_div("etm_div", "etm_sel", ETM, 0, 7, 29); + clks[clk32k_div] = mxs_clk_fixed_factor("clk32k_div", "ref_xtal", 1, 750); + clks[rtc] = mxs_clk_fixed_factor("rtc", "ref_xtal", 1, 768); + clks[lradc] = mxs_clk_fixed_factor("lradc", "clk32k", 1, 16); + clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26); + clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29); + clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31); + clks[ssp0] = mxs_clk_gate("ssp0", "ssp0_div", SSP0, 31); + clks[ssp1] = mxs_clk_gate("ssp1", "ssp1_div", SSP1, 31); + clks[ssp2] = mxs_clk_gate("ssp2", "ssp2_div", SSP2, 31); + clks[ssp3] = mxs_clk_gate("ssp3", "ssp3_div", SSP3, 31); + clks[gpmi] = mxs_clk_gate("gpmi", "gpmi_div", GPMI, 31); + clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31); + clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", LCDIF, 31); + clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31); + clks[fec] = mxs_clk_gate("fec", "hbus", ENET, 30); + clks[usb0_phy] = mxs_clk_gate("usb0_phy", "pll0", PLL0CTRL0, 18); + clks[usb1_phy] = mxs_clk_gate("usb1_phy", "pll1", PLL1CTRL0, 18); + clks[enet_out] = clk_gate("enet_out", "pll2", ENET, 18); + clks[lcdif_comp] = mxs_clk_lcdif("lcdif_comp", clks[ref_pix], + clks[lcdif_div], clks[lcdif]); + + clk_set_rate(clks[ref_io0], 480000000); + clk_set_rate(clks[ref_io1], 480000000); + clk_set_parent(clks[ssp0_sel], clks[ref_io0]); + clk_set_parent(clks[ssp1_sel], clks[ref_io0]); + clk_set_parent(clks[ssp2_sel], clks[ref_io1]); + clk_set_parent(clks[ssp3_sel], clks[ref_io1]); + clk_set_rate(clks[ssp0_div], 96000000); + clk_set_rate(clks[ssp1_div], 96000000); + clk_set_rate(clks[ssp2_div], 96000000); + clk_set_rate(clks[ssp3_div], 96000000); + clk_set_parent(clks[lcdif_sel], clks[ref_pix]); + clk_enable(clks[enet_out]); + + clkdev_add_physbase(clks[ssp0], IMX_SSP0_BASE, NULL); + clkdev_add_physbase(clks[ssp1], IMX_SSP1_BASE, NULL); + clkdev_add_physbase(clks[ssp2], IMX_SSP2_BASE, NULL); + clkdev_add_physbase(clks[ssp3], IMX_SSP3_BASE, NULL); + clkdev_add_physbase(clks[fec], IMX_FEC0_BASE, NULL); + clkdev_add_physbase(clks[xbus], IMX_DBGUART_BASE, NULL); + clkdev_add_physbase(clks[hbus], IMX_OCOTP_BASE, NULL); + clkdev_add_physbase(clks[uart], IMX_UART0_BASE, NULL); + clkdev_add_physbase(clks[uart], IMX_UART1_BASE, NULL); + clkdev_add_physbase(clks[uart], IMX_UART2_BASE, NULL); + clkdev_add_physbase(clks[uart], IMX_UART3_BASE, NULL); + clkdev_add_physbase(clks[uart], IMX_UART4_BASE, NULL); + clkdev_add_physbase(clks[gpmi], MXS_GPMI_BASE, NULL); + if (IS_ENABLED(CONFIG_DRIVER_VIDEO_STM)) + clkdev_add_physbase(clks[lcdif_comp], IMX_FB_BASE, NULL); + + return 0; +} + +static int imx28_ccm_probe(struct device_d *dev) +{ + void __iomem *regs; + + regs = dev_request_mem_region(dev, 0); + + mx28_clocks_init(regs); + + return 0; +} + +static __maybe_unused struct of_device_id imx28_ccm_dt_ids[] = { + { + .compatible = "fsl,imx28-clkctrl", + }, { + /* sentinel */ + } +}; + +static struct driver_d imx28_ccm_driver = { + .probe = imx28_ccm_probe, + .name = "imx28-clkctrl", + .of_compatible = DRV_OF_COMPAT(imx28_ccm_dt_ids), +}; + +static int imx28_ccm_init(void) +{ + return platform_driver_register(&imx28_ccm_driver); +} +postcore_initcall(imx28_ccm_init); diff --git a/drivers/clk/mxs/clk-lcdif.c b/drivers/clk/mxs/clk-lcdif.c new file mode 100644 index 0000000000..86dfe890f9 --- /dev/null +++ b/drivers/clk/mxs/clk-lcdif.c @@ -0,0 +1,75 @@ +#include <common.h> +#include <io.h> +#include <linux/clk.h> +#include <linux/err.h> + +#include "clk.h" + +struct clk_lcdif { + struct clk clk; + + struct clk *frac, *div, *gate; + const char *parent; +}; + +#define to_clk_lcdif(_hw) container_of(_hw, struct clk_lcdif, clk) + +static int clk_lcdif_set_rate(struct clk *clk, unsigned long rate, + unsigned long unused) +{ + struct clk_lcdif *lcdif = to_clk_lcdif(clk); + unsigned long frac, div, best_div = 1; + int delta, best_delta = 0x7fffffff; + unsigned long frate, rrate, best_frate; + unsigned long parent_rate = clk_get_rate(clk_get_parent(lcdif->frac)); + + best_frate = parent_rate; + + for (frac = 18; frac < 35; frac++) { + frate = (parent_rate / frac) * 18; + div = frate / rate; + if (!div) + div = 1; + rrate = frate / div; + delta = rate - rrate; + if (abs(delta) < abs(best_delta)) { + best_frate = frate; + best_div = div; + best_delta = delta; + } + } + + clk_set_rate(lcdif->frac, best_frate); + best_frate = clk_get_rate(lcdif->frac); + clk_set_rate(lcdif->div, (best_frate + best_div) / best_div); + + return 0; +} + +static const struct clk_ops clk_lcdif_ops = { + .set_rate = clk_lcdif_set_rate, +}; + +struct clk *mxs_clk_lcdif(const char *name, struct clk *frac, struct clk *div, + struct clk *gate) +{ + struct clk_lcdif *lcdif; + int ret; + + lcdif = xzalloc(sizeof(*lcdif)); + + lcdif->parent = gate->name; + lcdif->frac = frac; + lcdif->div = div; + lcdif->gate = gate; + lcdif->clk.name = name; + lcdif->clk.ops = &clk_lcdif_ops; + lcdif->clk.parent_names = &lcdif->parent; + lcdif->clk.num_parents = 1; + + ret = clk_register(&lcdif->clk); + if (ret) + return ERR_PTR(ret); + + return &lcdif->clk; +} diff --git a/drivers/clk/mxs/clk-pll.c b/drivers/clk/mxs/clk-pll.c new file mode 100644 index 0000000000..89fd6b5e31 --- /dev/null +++ b/drivers/clk/mxs/clk-pll.c @@ -0,0 +1,117 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <common.h> +#include <linux/clk.h> +#include <linux/err.h> +#include <io.h> + +#include "clk.h" + +#define SET 0x4 +#define CLR 0x8 + +/** + * struct clk_pll - mxs pll clock + * @hw: clk_hw for the pll + * @base: base address of the pll + * @power: the shift of power bit + * @rate: the clock rate of the pll + * + * The mxs pll is a fixed rate clock with power and gate control, + * and the shift of gate bit is always 31. + */ +struct clk_pll { + struct clk clk; + const char *parent; + void __iomem *base; + u8 power; + unsigned long rate; +}; + +#define to_clk_pll(_hw) container_of(_hw, struct clk_pll, clk) + +static int clk_pll_enable(struct clk *clk) +{ + struct clk_pll *pll = to_clk_pll(clk); + + writel(1 << pll->power, pll->base + SET); + + udelay(10); + + writel(1 << 31, pll->base + CLR); + + return 0; +} + +static void clk_pll_disable(struct clk *clk) +{ + struct clk_pll *pll = to_clk_pll(clk); + + writel(1 << 31, pll->base + SET); + + writel(1 << pll->power, pll->base + CLR); +} + +static int clk_pll_is_enabled(struct clk *clk) +{ + struct clk_pll *pll = to_clk_pll(clk); + u32 val; + + val = readl(pll->base); + + if (val & (1 << 31)) + return 0; + else + return 1; +} + +static unsigned long clk_pll_recalc_rate(struct clk *clk, + unsigned long parent_rate) +{ + struct clk_pll *pll = to_clk_pll(clk); + + return pll->rate; +} + +static const struct clk_ops clk_pll_ops = { + .enable = clk_pll_enable, + .disable = clk_pll_disable, + .recalc_rate = clk_pll_recalc_rate, + .is_enabled = clk_pll_is_enabled, +}; + +struct clk *mxs_clk_pll(const char *name, const char *parent_name, + void __iomem *base, u8 power, unsigned long rate) +{ + struct clk_pll *pll; + int ret; + + pll = xzalloc(sizeof(*pll)); + if (!pll) + return ERR_PTR(-ENOMEM); + + pll->parent = parent_name; + pll->clk.name = name; + pll->clk.ops = &clk_pll_ops; + pll->clk.parent_names = &pll->parent; + pll->clk.num_parents = 1; + + pll->base = base; + pll->rate = rate; + pll->power = power; + + ret = clk_register(&pll->clk); + if (ret) + ERR_PTR(ret); + + return &pll->clk; +} diff --git a/drivers/clk/mxs/clk-ref.c b/drivers/clk/mxs/clk-ref.c new file mode 100644 index 0000000000..7ff5527797 --- /dev/null +++ b/drivers/clk/mxs/clk-ref.c @@ -0,0 +1,164 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <common.h> +#include <linux/clk.h> +#include <linux/err.h> +#include <io.h> +#include <asm-generic/div64.h> + +#include "clk.h" + +/** + * struct clk_ref - mxs reference clock + * @hw: clk_hw for the reference clock + * @reg: register address + * @idx: the index of the reference clock within the same register + * + * The mxs reference clock sources from pll. Every 4 reference clocks share + * one register space, and @idx is used to identify them. Each reference + * clock has a gate control and a fractional * divider. The rate is calculated + * as pll rate * (18 / FRAC), where FRAC = 18 ~ 35. + */ +struct clk_ref { + struct clk clk; + const char *parent; + void __iomem *reg; + u8 idx; +}; + +#define to_clk_ref(_hw) container_of(_hw, struct clk_ref, clk) + +#define SET 0x4 +#define CLR 0x8 + +static int clk_ref_is_enabled(struct clk *clk) +{ + struct clk_ref *ref = to_clk_ref(clk); + u32 reg = readl(ref->reg); + + if (reg & 1 << ((ref->idx + 1) * 8 - 1)) + return 0; + + return 1; +} + +static int clk_ref_enable(struct clk *clk) +{ + struct clk_ref *ref = to_clk_ref(clk); + + writel(1 << ((ref->idx + 1) * 8 - 1), ref->reg + CLR); + + return 0; +} + +static void clk_ref_disable(struct clk *clk) +{ + struct clk_ref *ref = to_clk_ref(clk); + + writel(1 << ((ref->idx + 1) * 8 - 1), ref->reg + SET); +} + +static unsigned long clk_ref_recalc_rate(struct clk *clk, + unsigned long parent_rate) +{ + struct clk_ref *ref = to_clk_ref(clk); + u64 tmp = parent_rate; + u8 frac = (readl(ref->reg) >> (ref->idx * 8)) & 0x3f; + + tmp *= 18; + do_div(tmp, frac); + + return tmp; +} + +static long clk_ref_round_rate(struct clk *clk, unsigned long rate, + unsigned long *prate) +{ + unsigned long parent_rate = *prate; + u64 tmp = parent_rate; + u32 frac; + + tmp = tmp * 18 + rate / 2; + do_div(tmp, rate); + frac = tmp; + + if (frac < 18) + frac = 18; + else if (frac > 35) + frac = 35; + + tmp = parent_rate; + tmp *= 18; + do_div(tmp, frac); + + return tmp; +} + +static int clk_ref_set_rate(struct clk *clk, unsigned long rate, + unsigned long parent_rate) +{ + struct clk_ref *ref = to_clk_ref(clk); + u64 tmp = parent_rate; + u32 val; + u32 frac, shift = ref->idx * 8; + + tmp = tmp * 18 + rate / 2; + do_div(tmp, rate); + frac = tmp; + + if (frac < 18) + frac = 18; + else if (frac > 35) + frac = 35; + + val = readl(ref->reg); + val &= ~(0x3f << shift); + val |= frac << shift; + writel(val, ref->reg); + + return 0; +} + +static const struct clk_ops clk_ref_ops = { + .is_enabled = clk_ref_is_enabled, + .enable = clk_ref_enable, + .disable = clk_ref_disable, + .recalc_rate = clk_ref_recalc_rate, + .round_rate = clk_ref_round_rate, + .set_rate = clk_ref_set_rate, +}; + +struct clk *mxs_clk_ref(const char *name, const char *parent_name, + void __iomem *reg, u8 idx) +{ + struct clk_ref *ref; + int ret; + + ref = xzalloc(sizeof(*ref)); + if (!ref) + return ERR_PTR(-ENOMEM); + + ref->parent = parent_name; + ref->clk.name = name; + ref->clk.ops = &clk_ref_ops; + ref->clk.parent_names = &ref->parent; + ref->clk.num_parents = 1; + + ref->reg = reg; + ref->idx = idx; + + ret = clk_register(&ref->clk); + if (ret) + return ERR_PTR(ret); + + return &ref->clk; +} diff --git a/drivers/clk/mxs/clk.h b/drivers/clk/mxs/clk.h new file mode 100644 index 0000000000..b4fcfa0090 --- /dev/null +++ b/drivers/clk/mxs/clk.h @@ -0,0 +1,52 @@ +#ifndef __MXS_CLK_H +#define __MXS_CLK_H + +int mxs_clk_wait(void __iomem *reg, u8 shift); + +struct clk *mxs_clk_pll(const char *name, const char *parent_name, + void __iomem *base, u8 power, unsigned long rate); + +struct clk *mxs_clk_ref(const char *name, const char *parent_name, + void __iomem *reg, u8 idx); + +struct clk *mxs_clk_div(const char *name, const char *parent_name, + void __iomem *reg, u8 shift, u8 width, u8 busy); + +struct clk *mxs_clk_frac(const char *name, const char *parent_name, + void __iomem *reg, u8 shift, u8 width, u8 busy); + +#ifdef CONFIG_DRIVER_VIDEO_STM +struct clk *mxs_clk_lcdif(const char *name, struct clk *frac, struct clk *div, + struct clk *gate); +#else +static inline struct clk *mxs_clk_lcdif(const char *name, struct clk *frac, struct clk *div, + struct clk *gate) +{ + return ERR_PTR(-ENOSYS); +} +#endif + +static inline struct clk *mxs_clk_fixed(const char *name, int rate) +{ + return clk_fixed(name, rate); +} + +static inline struct clk *mxs_clk_gate(const char *name, + const char *parent_name, void __iomem *reg, u8 shift) +{ + return clk_gate_inverted(name, parent_name, reg, shift); +} + +static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg, + u8 shift, u8 width, const char **parent_names, int num_parents) +{ + return clk_mux(name, reg, shift, width, parent_names, num_parents); +} + +static inline struct clk *mxs_clk_fixed_factor(const char *name, + const char *parent_name, unsigned int mult, unsigned int div) +{ + return clk_fixed_factor(name, parent_name, mult, div); +} + +#endif /* __MXS_CLK_H */ diff --git a/drivers/clocksource/mvebu.c b/drivers/clocksource/mvebu.c index 2b48a5c91b..8bedd99222 100644 --- a/drivers/clocksource/mvebu.c +++ b/drivers/clocksource/mvebu.c @@ -42,7 +42,7 @@ static __iomem void *timer_base; uint64_t mvebu_clocksource_read(void) { - return __raw_readl(timer_base + TIMER0_VAL_OFF); + return 0 - __raw_readl(timer_base + TIMER0_VAL_OFF); } static struct clocksource cs = { diff --git a/drivers/clocksource/orion.c b/drivers/clocksource/orion.c index 604b414742..e3db845de6 100644 --- a/drivers/clocksource/orion.c +++ b/drivers/clocksource/orion.c @@ -34,7 +34,7 @@ static __iomem void *timer_base; static uint64_t orion_clocksource_read(void) { - return __raw_readl(timer_base + TIMER0_VAL); + return 0 - __raw_readl(timer_base + TIMER0_VAL); } static struct clocksource clksrc = { diff --git a/drivers/gpio/gpio-imx.c b/drivers/gpio/gpio-imx.c index 1bf4100964..063a81c896 100644 --- a/drivers/gpio/gpio-imx.c +++ b/drivers/gpio/gpio-imx.c @@ -204,4 +204,4 @@ static int imx_gpio_add(void) platform_driver_register(&imx_gpio_driver); return 0; } -coredevice_initcall(imx_gpio_add); +core_initcall(imx_gpio_add); diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index 503443f9bf..b2a74c02c8 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -24,10 +24,6 @@ * GNU General Public License for more details. */ - -/* #include <linux/delay.h> */ - - #include <clock.h> #include <common.h> #include <driver.h> @@ -44,12 +40,6 @@ #include <mach/generic.h> #include <mach/omap3-clock.h> -#define OMAP_I2C_SIZE 0x3f -#define OMAP1_I2C_BASE 0xfffb3800 -#define OMAP2_I2C_BASE1 0x48070000 -#define OMAP2_I2C_BASE2 0x48072000 -#define OMAP2_I2C_BASE3 0x48060000 - /* This will be the driver name */ #define DRIVER_NAME "i2c-omap" @@ -141,11 +131,17 @@ #define SYSC_IDLEMODE_SMART 0x2 #define SYSC_CLOCKACTIVITY_FCLK 0x2 +/* i2c driver flags from kernel */ +#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) +#define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 +#define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) +#define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) +#define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 struct omap_i2c_struct { void *base; - u8 *regs; u8 reg_shift; + struct omap_i2c_driver_data *data; struct resource *ioarea; u32 speed; /* Speed of bus in Khz */ u16 cmd_err; @@ -241,22 +237,50 @@ static const u8 omap4_reg_map[] = { [OMAP_I2C_IRQENABLE_CLR] = 0x30, }; +struct omap_i2c_driver_data { + u32 flags; + u32 fclk_rate; + u8 *regs; +}; + +static struct omap_i2c_driver_data omap3_data = { + .flags = OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + OMAP_I2C_FLAG_BUS_SHIFT_2, + .fclk_rate = 48000, + .regs = (u8 *) reg_map, +}; + +static struct omap_i2c_driver_data omap4_data = { + .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE, + .fclk_rate = 96000, + .regs = (u8 *) omap4_reg_map, +}; + +static struct omap_i2c_driver_data am33xx_data = { + .flags = OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | + OMAP_I2C_FLAG_BUS_SHIFT_NONE, + .fclk_rate = 96000, + .regs = (u8 *) omap4_reg_map, +}; + static inline void omap_i2c_write_reg(struct omap_i2c_struct *i2c_omap, int reg, u16 val) { __raw_writew(val, i2c_omap->base + - (i2c_omap->regs[reg] << i2c_omap->reg_shift)); + (i2c_omap->data->regs[reg] << i2c_omap->reg_shift)); } static inline u16 omap_i2c_read_reg(struct omap_i2c_struct *i2c_omap, int reg) { return __raw_readw(i2c_omap->base + - (i2c_omap->regs[reg] << i2c_omap->reg_shift)); + (i2c_omap->data->regs[reg] << i2c_omap->reg_shift)); } static void omap_i2c_unidle(struct omap_i2c_struct *i2c_omap) { - if (cpu_is_omap34xx()) { + struct omap_i2c_driver_data *i2c_data = i2c_omap->data; + + if (i2c_data->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) { omap_i2c_write_reg(i2c_omap, OMAP_I2C_CON_REG, 0); omap_i2c_write_reg(i2c_omap, OMAP_I2C_PSC_REG, i2c_omap->pscstate); omap_i2c_write_reg(i2c_omap, OMAP_I2C_SCLL_REG, i2c_omap->scllstate); @@ -299,9 +323,8 @@ static int omap_i2c_init(struct omap_i2c_struct *i2c_omap) u16 psc = 0, scll = 0, sclh = 0, buf = 0; u16 fsscll = 0, fssclh = 0, hsscll = 0, hssclh = 0; uint64_t start; - - unsigned long fclk_rate = 12000000; unsigned long internal_clk = 0; + struct omap_i2c_driver_data *i2c_data = i2c_omap->data; if (i2c_omap->rev >= OMAP_I2C_REV_2) { /* Disable I2C controller before soft reset */ @@ -352,63 +375,50 @@ static int omap_i2c_init(struct omap_i2c_struct *i2c_omap) } omap_i2c_write_reg(i2c_omap, OMAP_I2C_CON_REG, 0); - /* omap1 handling is missing here */ - - if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap4xxx()) { - - /* - * HSI2C controller internal clk rate should be 19.2 Mhz for - * HS and for all modes on 2430. On 34xx we can use lower rate - * to get longer filter period for better noise suppression. - * The filter is iclk (fclk for HS) period. - */ - if (i2c_omap->speed > 400 || cpu_is_omap2430()) - internal_clk = 19200; - else if (i2c_omap->speed > 100) - internal_clk = 9600; - else - internal_clk = 4000; - fclk_rate = 96000000 / 1000; - - /* Compute prescaler divisor */ - psc = fclk_rate / internal_clk; - psc = psc - 1; - - /* If configured for High Speed */ - if (i2c_omap->speed > 400) { - unsigned long scl; - - /* For first phase of HS mode */ - scl = internal_clk / 400; - fsscll = scl - (scl / 3) - 7; - fssclh = (scl / 3) - 5; - - /* For second phase of HS mode */ - scl = fclk_rate / i2c_omap->speed; - hsscll = scl - (scl / 3) - 7; - hssclh = (scl / 3) - 5; - } else if (i2c_omap->speed > 100) { - unsigned long scl; - - /* Fast mode */ - scl = internal_clk / i2c_omap->speed; - fsscll = scl - (scl / 3) - 7; - fssclh = (scl / 3) - 5; - } else { - /* Standard mode */ - fsscll = internal_clk / (i2c_omap->speed * 2) - 7; - fssclh = internal_clk / (i2c_omap->speed * 2) - 5; - } - scll = (hsscll << OMAP_I2C_SCLL_HSSCLL) | fsscll; - sclh = (hssclh << OMAP_I2C_SCLH_HSSCLH) | fssclh; + /* + * HSI2C controller internal clk rate should be 19.2 Mhz for + * HS and for all modes on 2430. On 34xx we can use lower rate + * to get longer filter period for better noise suppression. + * The filter is iclk (fclk for HS) period. + */ + if (i2c_omap->speed > 400) + internal_clk = 19200; + else if (i2c_omap->speed > 100) + internal_clk = 9600; + else + internal_clk = 4000; + + /* Compute prescaler divisor */ + psc = i2c_data->fclk_rate / internal_clk; + psc = psc - 1; + + /* If configured for High Speed */ + if (i2c_omap->speed > 400) { + unsigned long scl; + + /* For first phase of HS mode */ + scl = internal_clk / 400; + fsscll = scl - (scl / 3) - 7; + fssclh = (scl / 3) - 5; + + /* For second phase of HS mode */ + scl = i2c_data->fclk_rate / i2c_omap->speed; + hsscll = scl - (scl / 3) - 7; + hssclh = (scl / 3) - 5; + } else if (i2c_omap->speed > 100) { + unsigned long scl; + + /* Fast mode */ + scl = internal_clk / i2c_omap->speed; + fsscll = scl - (scl / 3) - 7; + fssclh = (scl / 3) - 5; } else { - /* Program desired operating rate */ - fclk_rate /= (psc + 1) * 1000; - if (psc > 2) - psc = 2; - scll = fclk_rate / (i2c_omap->speed * 2) - 7 + psc; - sclh = fclk_rate / (i2c_omap->speed * 2) - 7 + psc; + /* Standard mode */ + fsscll = internal_clk / (i2c_omap->speed * 2) - 7; + fssclh = internal_clk / (i2c_omap->speed * 2) - 5; } + scll = (hsscll << OMAP_I2C_SCLL_HSSCLL) | fsscll; + sclh = (hssclh << OMAP_I2C_SCLH_HSSCLH) | fssclh; /* Setup clock prescaler to obtain approx 12MHz I2C module clock: */ omap_i2c_write_reg(i2c_omap, OMAP_I2C_PSC_REG, psc); @@ -433,7 +443,7 @@ static int omap_i2c_init(struct omap_i2c_struct *i2c_omap) OMAP_I2C_IE_AL) | ((i2c_omap->fifo_size) ? (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0); omap_i2c_write_reg(i2c_omap, OMAP_I2C_IE_REG, i2c_omap->iestate); - if (cpu_is_omap34xx()) { + if (i2c_data->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) { i2c_omap->pscstate = psc; i2c_omap->scllstate = scll; i2c_omap->sclhstate = sclh; @@ -525,15 +535,6 @@ complete: if (dev->buf_len) { *dev->buf++ = w; dev->buf_len--; - /* Data reg from 2430 is 8 bit wide */ - if (!cpu_is_omap2430() && - !cpu_is_omap34xx() && - !cpu_is_omap4xxx()) { - if (dev->buf_len) { - *dev->buf++ = w >> 8; - dev->buf_len--; - } - } } else { if (stat & OMAP_I2C_STAT_RRDY) dev_err(&dev->adapter.dev, @@ -566,15 +567,6 @@ complete: if (dev->buf_len) { w = *dev->buf++; dev->buf_len--; - /* Data reg from 2430 is 8 bit wide */ - if (!cpu_is_omap2430() && - !cpu_is_omap34xx() && - !cpu_is_omap4xxx()) { - if (dev->buf_len) { - w |= *dev->buf++ << 8; - dev->buf_len--; - } - } } else { if (stat & OMAP_I2C_STAT_XRDY) dev_err(&dev->adapter.dev, @@ -706,7 +698,7 @@ static int omap_i2c_xfer_msg(struct i2c_adapter *adapter, ret = omap_i2c_isr(i2c_omap); while (ret){ ret = omap_i2c_isr(i2c_omap); - if (is_timeout(start, MSECOND)) { + if (is_timeout(start, 50 * MSECOND)) { dev_err(&adapter->dev, "timed out on polling for " "open i2c message handling\n"); @@ -773,9 +765,10 @@ static int __init i2c_omap_probe(struct device_d *pdev) { struct omap_i2c_struct *i2c_omap; - /* struct i2c_platform_data *pdata; */ + struct omap_i2c_driver_data *i2c_data; int r; u32 speed = 0; + u16 s; i2c_omap = kzalloc(sizeof(struct omap_i2c_struct), GFP_KERNEL); if (!i2c_omap) { @@ -783,13 +776,13 @@ i2c_omap_probe(struct device_d *pdev) goto err_free_mem; } - if (cpu_is_omap4xxx()) { - i2c_omap->regs = (u8 *)omap4_reg_map; - i2c_omap->reg_shift = 0; - } else { - i2c_omap->regs = (u8 *)reg_map; - i2c_omap->reg_shift = 2; - } + r = dev_get_drvdata(pdev, (unsigned long *)&i2c_data); + if (r) + return r; + + i2c_omap->data = i2c_data; + i2c_omap->reg_shift = (i2c_data->flags >> + OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3; if (pdev->platform_data != NULL) speed = *(u32 *)pdev->platform_data; @@ -802,28 +795,23 @@ i2c_omap_probe(struct device_d *pdev) omap_i2c_unidle(i2c_omap); i2c_omap->rev = omap_i2c_read_reg(i2c_omap, OMAP_I2C_REV_REG) & 0xff; - /* i2c_omap->base = OMAP2_I2C_BASE3; */ - if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap4xxx()) { - u16 s; + /* Set up the fifo size - Get total size */ + s = (omap_i2c_read_reg(i2c_omap, OMAP_I2C_BUFSTAT_REG) >> 14) & 0x3; + i2c_omap->fifo_size = 0x8 << s; - /* Set up the fifo size - Get total size */ - s = (omap_i2c_read_reg(i2c_omap, OMAP_I2C_BUFSTAT_REG) >> 14) & 0x3; - i2c_omap->fifo_size = 0x8 << s; - - /* - * Set up notification threshold as half the total available - * size. This is to ensure that we can handle the status on int - * call back latencies. - */ + /* + * Set up notification threshold as half the total available + * size. This is to ensure that we can handle the status on int + * call back latencies. + */ - i2c_omap->fifo_size = (i2c_omap->fifo_size / 2); + i2c_omap->fifo_size = (i2c_omap->fifo_size / 2); - if (i2c_omap->rev >= OMAP_I2C_REV_ON_4430) - i2c_omap->b_hw = 0; /* Disable hardware fixes */ - else - i2c_omap->b_hw = 1; /* Enable hardware fixes */ - } + if (i2c_omap->rev >= OMAP_I2C_REV_ON_4430) + i2c_omap->b_hw = 0; /* Disable hardware fixes */ + else + i2c_omap->b_hw = 1; /* Enable hardware fixes */ /* reset ASAP, clearing any IRQs */ omap_i2c_init(i2c_omap); @@ -856,9 +844,25 @@ err_free_mem: return r; } +static struct platform_device_id omap_i2c_ids[] = { + { + .name = "i2c-omap3", + .driver_data = (unsigned long)&omap3_data, + }, { + .name = "i2c-omap4", + .driver_data = (unsigned long)&omap4_data, + }, { + .name = "i2c-am33xx", + .driver_data = (unsigned long)&am33xx_data, + }, { + /* sentinel */ + }, +}; + static struct driver_d omap_i2c_driver = { .probe = i2c_omap_probe, .name = DRIVER_NAME, + .id_table = omap_i2c_ids, }; device_platform_driver(omap_i2c_driver); diff --git a/drivers/mci/atmel_mci.c b/drivers/mci/atmel_mci.c index b5873f967b..dca3813c6d 100644 --- a/drivers/mci/atmel_mci.c +++ b/drivers/mci/atmel_mci.c @@ -565,9 +565,9 @@ static int atmci_probe(struct device_d *hw_dev) host->mci.hw_dev = hw_dev; if (pd->bus_width >= 4) - host->mci.host_caps |= MMC_MODE_4BIT; + host->mci.host_caps |= MMC_CAP_4_BIT_DATA; if (pd->bus_width == 8) - host->mci.host_caps |= MMC_MODE_8BIT; + host->mci.host_caps |= MMC_CAP_8_BIT_DATA; host->slot_b = pd->slot_b; host->regs = dev_request_mem_region(hw_dev, 0); @@ -594,7 +594,7 @@ static int atmci_probe(struct device_d *hw_dev) atmci_get_cap(host); if (host->caps.has_highspeed) - host->mci.host_caps |= MMC_MODE_HS; + host->mci.host_caps |= MMC_CAP_SD_HIGHSPEED; if (host->slot_b) host->sdc_reg = ATMCI_SDCSEL_SLOT_B; diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c index 8053b79cb7..8cf3e641c1 100644 --- a/drivers/mci/imx-esdhc.c +++ b/drivers/mci/imx-esdhc.c @@ -540,7 +540,7 @@ static int fsl_esdhc_probe(struct device_d *dev) if (pdata && pdata->caps) mci->host_caps = pdata->caps; else - mci->host_caps = MMC_MODE_4BIT; + mci->host_caps = MMC_CAP_4_BIT_DATA; if (pdata && pdata->devname) { mci->devname = pdata->devname; @@ -551,7 +551,7 @@ static int fsl_esdhc_probe(struct device_d *dev) } if (caps & ESDHC_HOSTCAPBLT_HSS) - mci->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; + mci->host_caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED; host->mci.send_cmd = esdhc_send_cmd; host->mci.set_ios = esdhc_set_ios; diff --git a/drivers/mci/imx.c b/drivers/mci/imx.c index 2bf48eb1d3..aea78c7550 100644 --- a/drivers/mci/imx.c +++ b/drivers/mci/imx.c @@ -504,7 +504,7 @@ static int mxcmci_probe(struct device_d *dev) host->mci.send_cmd = mxcmci_request; host->mci.set_ios = mxcmci_set_ios; host->mci.init = mxcmci_init; - host->mci.host_caps = MMC_MODE_4BIT; + host->mci.host_caps = MMC_CAP_4_BIT_DATA; host->mci.hw_dev = dev; host->base = dev_request_mem_region(dev, 0); diff --git a/drivers/mci/mci-bcm2835.c b/drivers/mci/mci-bcm2835.c index b76f134af2..abd38a35c9 100644 --- a/drivers/mci/mci-bcm2835.c +++ b/drivers/mci/mci-bcm2835.c @@ -553,7 +553,8 @@ static int bcm2835_mci_probe(struct device_d *hw_dev) return -EBUSY; } - host->mci.host_caps |= MMC_MODE_4BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz; + host->mci.host_caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | + MMC_CAP_MMC_HIGHSPEED; host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c index ce568df706..67668d53f0 100644 --- a/drivers/mci/mci-core.c +++ b/drivers/mci/mci-core.c @@ -66,6 +66,11 @@ * - Transcend SDHC, 8 GiB (Class 6) */ +static inline unsigned mci_caps(struct mci *mci) +{ + return mci->card_caps & mci->host->host_caps; +} + /** * Call the MMC/SD instance driver to run the command on the MMC/SD card * @param mci MCI instance @@ -434,7 +439,7 @@ static int mmc_change_freq(struct mci *mci) if (mci->version < MMC_VERSION_4) return 0; - mci->card_caps |= MMC_MODE_4BIT; + mci->card_caps |= MMC_CAP_4_BIT_DATA; err = mci_send_ext_csd(mci, mci->ext_csd); if (err) { @@ -467,9 +472,9 @@ static int mmc_change_freq(struct mci *mci) /* High Speed is set, there are two types: 52MHz and 26MHz */ if (cardtype & EXT_CSD_CARD_TYPE_52) - mci->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; + mci->card_caps |= MMC_CAP_MMC_HIGHSPEED_52MHZ | MMC_CAP_MMC_HIGHSPEED; else - mci->card_caps |= MMC_MODE_HS; + mci->card_caps |= MMC_CAP_MMC_HIGHSPEED; if (IS_ENABLED(CONFIG_MCI_MMC_BOOT_PARTITIONS) && mci->ext_csd[EXT_CSD_REV] >= 3 && mci->ext_csd[EXT_CSD_BOOT_MULT]) { @@ -534,9 +539,7 @@ static int sd_change_freq(struct mci *mci) { struct mci_cmd cmd; struct mci_data data; -#ifdef CONFIG_MCI_SPI struct mci_host *host = mci->host; -#endif uint32_t *switch_status = sector_buf; uint32_t *scr = sector_buf; int timeout; @@ -615,7 +618,7 @@ retry_scr: } if (mci->scr[0] & SD_DATA_4BIT) - mci->card_caps |= MMC_MODE_4BIT; + mci->card_caps |= MMC_CAP_4_BIT_DATA; /* If high-speed isn't supported, we return */ if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) @@ -628,7 +631,7 @@ retry_scr: } if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) - mci->card_caps |= MMC_MODE_HS; + mci->card_caps |= MMC_CAP_SD_HIGHSPEED; return 0; } @@ -664,10 +667,6 @@ static void mci_set_clock(struct mci *mci, unsigned clock) if (clock < host->f_min) clock = host->f_min; - /* check against the limit at the card's side */ - if (mci->tran_speed != 0 && clock > mci->tran_speed) - clock = mci->tran_speed; - host->clock = clock; /* the new target frequency */ mci_set_ios(mci); } @@ -900,7 +899,7 @@ static int mci_startup_sd(struct mci *mci) struct mci_cmd cmd; int err; - if (mci->card_caps & MMC_MODE_4BIT) { + if (mci_caps(mci) & MMC_CAP_4_BIT_DATA) { dev_dbg(&mci->dev, "Prepare for bus width change\n"); mci_setup_cmd(&cmd, MMC_CMD_APP_CMD, mci->rca << 16, MMC_RSP_R1); err = mci_send_cmd(mci, &cmd, NULL); @@ -919,11 +918,8 @@ static int mci_startup_sd(struct mci *mci) } mci_set_bus_width(mci, MMC_BUS_WIDTH_4); } - /* if possible, speed up the transfer */ - if (mci->card_caps & MMC_MODE_HS) - mci_set_clock(mci, 50000000); - else - mci_set_clock(mci, 25000000); + + mci_set_clock(mci, mci->tran_speed); return 0; } @@ -943,22 +939,22 @@ static int mci_startup_mmc(struct mci *mci) }; /* if possible, speed up the transfer */ - if (mci->card_caps & MMC_MODE_HS) { - if (mci->card_caps & MMC_MODE_HS_52MHz) - mci_set_clock(mci, 52000000); + if (mci_caps(mci) & MMC_CAP_MMC_HIGHSPEED) { + if (mci->card_caps & MMC_CAP_MMC_HIGHSPEED_52MHZ) + mci->tran_speed = 52000000; else - mci_set_clock(mci, 26000000); - } else { - mci_set_clock(mci, 20000000); + mci->tran_speed = 26000000; } + mci_set_clock(mci, mci->tran_speed); + /* * Unlike SD, MMC cards dont have a configuration register to notify * supported bus width. So bus test command should be run to identify * the supported bus width or compare the ext csd values of current * bus width and ext csd values of 1 bit mode read earlier. */ - if (host->host_caps & MMC_MODE_8BIT) + if (host->host_caps & MMC_CAP_8_BIT_DATA) idx = 1; for (; idx >= 0; idx--) { @@ -997,8 +993,7 @@ static int mci_startup(struct mci *mci) struct mci_cmd cmd; int err; -#ifdef CONFIG_MMC_SPI_CRC_ON - if (mmc_host_is_spi(host)) { /* enable CRC check for spi */ + if (IS_ENABLED(CONFIG_MMC_SPI_CRC_ON) && mmc_host_is_spi(host)) { /* enable CRC check for spi */ mci_setup_cmd(&cmd, MMC_CMD_SPI_CRC_ON_OFF, 1, MMC_RSP_R1); err = mci_send_cmd(mci, &cmd, NULL); @@ -1008,7 +1003,6 @@ static int mci_startup(struct mci *mci) return err; } } -#endif dev_dbg(&mci->dev, "Put the Card in Identify Mode\n"); @@ -1098,9 +1092,6 @@ static int mci_startup(struct mci *mci) mci_extract_card_capacity_from_csd(mci); - /* Restrict card's capabilities by what the host can do */ - mci->card_caps &= host->host_caps; - if (IS_SD(mci)) err = mci_startup_sd(mci); else @@ -1366,6 +1357,16 @@ static unsigned extract_mtd_year(struct mci *mci) return UNSTUFF_BITS(mci->cid, 8, 4) + 1997; } +static void mci_print_caps(unsigned caps) +{ + printf(" capabilities: %s%s%s%s%s\n", + caps & MMC_CAP_4_BIT_DATA ? "4bit " : "", + caps & MMC_CAP_8_BIT_DATA ? "8bit " : "", + caps & MMC_CAP_SD_HIGHSPEED ? "sd-hs " : "", + caps & MMC_CAP_MMC_HIGHSPEED ? "mmc-hs " : "", + caps & MMC_CAP_MMC_HIGHSPEED_52MHZ ? "mmc-52MHz " : ""); +} + /** * Output some valuable information when the user runs 'devinfo' on an MCI device * @param mci MCI device instance @@ -1373,13 +1374,28 @@ static unsigned extract_mtd_year(struct mci *mci) static void mci_info(struct device_d *dev) { struct mci *mci = container_of(dev, struct mci, dev); + struct mci_host *host = mci->host; + int bw; if (mci->ready_for_use == 0) { printf(" No information available:\n MCI card not probed yet\n"); return; } - printf(" Card:\n"); + printf("Host information:\n"); + printf(" current clock: %d\n", host->clock); + + if (host->bus_width == MMC_BUS_WIDTH_8) + bw = 8; + else if (host->bus_width == MMC_BUS_WIDTH_4) + bw = 4; + else + bw = 1; + + printf(" current buswidth: %d\n", bw); + mci_print_caps(host->host_caps); + + printf("Card information:\n"); if (mci->version < SD_VERSION_SD) { printf(" Attached is a MultiMediaCard (Version: %u.%u)\n", (mci->version >> 4) & 0xf, mci->version & 0xf); @@ -1396,6 +1412,7 @@ static void mci_info(struct device_d *dev) printf(" CSD: %08X-%08X-%08X-%08X\n", mci->csd[0], mci->csd[1], mci->csd[2], mci->csd[3]); printf(" Max. transfer speed: %u Hz\n", mci->tran_speed); + mci_print_caps(mci->card_caps); printf(" Manufacturer ID: %02X\n", extract_mid(mci)); printf(" OEM/Application ID: %04X\n", extract_oid(mci)); printf(" Product name: '%c%c%c%c%c'\n", mci->cid[0] & 0xff, @@ -1694,10 +1711,10 @@ void mci_of_parse(struct mci_host *host) switch (bus_width) { case 8: - host->host_caps |= MMC_MODE_8BIT; + host->host_caps |= MMC_CAP_8_BIT_DATA; /* Hosts capable of 8-bit transfers can also do 4 bits */ case 4: - host->host_caps |= MMC_MODE_4BIT; + host->host_caps |= MMC_CAP_4_BIT_DATA; break; case 1: break; diff --git a/drivers/mci/mxs.c b/drivers/mci/mxs.c index e6f40ebc35..023f92236a 100644 --- a/drivers/mci/mxs.c +++ b/drivers/mci/mxs.c @@ -36,6 +36,8 @@ #include <errno.h> #include <clock.h> #include <io.h> +#include <linux/clk.h> +#include <linux/err.h> #include <asm/bitops.h> #include <mach/mxs.h> #include <mach/imx-regs.h> @@ -49,8 +51,8 @@ struct mxs_mci_host { struct mci_host host; void __iomem *regs; + struct clk *clk; unsigned clock; /* current clock speed in Hz ("0" if disabled) */ - unsigned index; #ifdef CONFIG_MCI_INFO unsigned f_min; unsigned f_max; @@ -61,16 +63,6 @@ struct mxs_mci_host { #define to_mxs_mci(mxs) container_of(mxs, struct mxs_mci_host, host) /** - * Get the SSP clock rate - * @param hw_dev Host interface device instance - * @return Unit's clock in [Hz] - */ -static unsigned mxs_mci_get_unit_clock(struct mxs_mci_host *mxs_mci) -{ - return imx_get_sspclk(mxs_mci->index); -} - -/** * Get MCI cards response if defined for the type of command * @param hw_dev Host interface device instance * @param cmd Command description @@ -116,22 +108,22 @@ static void mxs_mci_finish_request(struct mxs_mci_host *mxs_mci) * @param status HW_SSP_STATUS's content * @return 0 if no error, negative values else */ -static int mxs_mci_get_cmd_error(unsigned status) +static int mxs_mci_get_cmd_error(struct mxs_mci_host *mxs_mci, unsigned status) { if (status & SSP_STATUS_ERROR) - pr_debug("Status Reg reports %08X\n", status); + dev_dbg(mxs_mci->host.hw_dev, "Status Reg reports %08X\n", status); if (status & SSP_STATUS_TIMEOUT) { - pr_debug("CMD timeout\n"); + dev_dbg(mxs_mci->host.hw_dev, "CMD timeout\n"); return -ETIMEDOUT; } else if (status & SSP_STATUS_RESP_TIMEOUT) { - pr_debug("RESP timeout\n"); + dev_dbg(mxs_mci->host.hw_dev, "RESP timeout\n"); return -ETIMEDOUT; } else if (status & SSP_STATUS_RESP_CRC_ERR) { - pr_debug("CMD crc error\n"); + dev_dbg(mxs_mci->host.hw_dev, "CMD crc error\n"); return -EILSEQ; } else if (status & SSP_STATUS_RESP_ERR) { - pr_debug("RESP error\n"); + dev_dbg(mxs_mci->host.hw_dev, "RESP error\n"); return -EIO; } @@ -168,7 +160,8 @@ static int mxs_mci_read_data(struct mxs_mci_host *mxs_mci, void *buffer, unsigne uint32_t *p = buffer; if (length & 0x3) { - pr_debug("Cannot read data sizes not multiple of 4 (request for %u detected)\n", + dev_dbg(mxs_mci->host.hw_dev, + "Cannot read data sizes not multiple of 4 (request for %u detected)\n", length); return -EINVAL; } @@ -206,7 +199,8 @@ static int mxs_mci_write_data(struct mxs_mci_host *mxs_mci, const void *buffer, const uint32_t *p = buffer; if (length & 0x3) { - pr_debug("Cannot write data sizes not multiple of 4 (request for %u detected)\n", + dev_dbg(mxs_mci->host.hw_dev, + "Cannot write data sizes not multiple of 4 (request for %u detected)\n", length); return -EINVAL; } @@ -320,7 +314,7 @@ static int mxs_mci_std_cmds(struct mxs_mci_host *mxs_mci, struct mci_cmd *cmd) if (cmd->resp_type & MMC_RSP_PRESENT) mxs_mci_get_cards_response(mxs_mci, cmd); - return mxs_mci_get_cmd_error(readl(mxs_mci->regs + HW_SSP_STATUS)); + return mxs_mci_get_cmd_error(mxs_mci, readl(mxs_mci->regs + HW_SSP_STATUS)); } /** @@ -385,7 +379,7 @@ static int mxs_mci_adtc(struct mxs_mci_host *mxs_mci, struct mci_cmd *cmd, err = mxs_mci_transfer_data(mxs_mci, data); if (err != 0) { - pr_debug(" Transfering data failed\n"); + dev_dbg(mxs_mci->host.hw_dev, "Transfering data failed with %d\n", err); return err; } @@ -428,7 +422,7 @@ static unsigned mxs_mci_setup_clock_speed(struct mxs_mci_host *mxs_mci, unsigned return 0; } - ssp = mxs_mci_get_unit_clock(mxs_mci); + ssp = clk_get_rate(mxs_mci->clk); for (div = 2; div < 255; div += 2) { rate = DIV_ROUND_CLOSEST(DIV_ROUND_CLOSEST(ssp, nc), div); @@ -436,7 +430,7 @@ static unsigned mxs_mci_setup_clock_speed(struct mxs_mci_host *mxs_mci, unsigned break; } if (div >= 255) { - pr_warning("Cannot set clock to %d Hz\n", nc); + dev_warn(mxs_mci->host.hw_dev, "Cannot set clock to %d Hz\n", nc); return 0; } @@ -531,7 +525,8 @@ static void mxs_mci_set_ios(struct mci_host *host, struct mci_ios *ios) } mxs_mci->clock = mxs_mci_setup_clock_speed(mxs_mci, ios->clock); - pr_debug("IO settings: frequency=%u Hz\n", mxs_mci->clock); + + dev_dbg(host->hw_dev, "IO settings: frequency=%u Hz\n", mxs_mci->clock); } /* ----------------------------------------------------------------------- */ @@ -555,9 +550,10 @@ static int mxs_mci_probe(struct device_d *hw_dev) struct mxs_mci_platform_data *pd = hw_dev->platform_data; struct mxs_mci_host *mxs_mci; struct mci_host *host; + unsigned long rate; if (hw_dev->platform_data == NULL) { - pr_err("Missing platform data\n"); + dev_err(hw_dev, "Missing platform data\n"); return -EINVAL; } @@ -575,44 +571,29 @@ static int mxs_mci_probe(struct device_d *hw_dev) host->voltages = pd->voltages; host->host_caps = pd->caps; -#ifdef CONFIG_ARCH_IMX23 - mxs_mci->index = 0; /* there is only one clock for all */ -#endif -#ifdef CONFIG_ARCH_IMX28 - /* one dedicated clock per unit */ - switch (hw_dev->resource[0].start) { - case IMX_SSP0_BASE: - mxs_mci->index = 0; - break; - case IMX_SSP1_BASE: - mxs_mci->index = 1; - break; - case IMX_SSP2_BASE: - mxs_mci->index = 2; - break; - case IMX_SSP3_BASE: - mxs_mci->index = 3; - break; - default: - pr_debug("Unknown SSP unit at address 0x%p\n", mxs_mci->regs); - return 0; - } -#endif + mxs_mci->clk = clk_get(hw_dev, NULL); + if (IS_ERR(mxs_mci->clk)) + return PTR_ERR(mxs_mci->clk); + + clk_enable(mxs_mci->clk); + + rate = clk_get_rate(mxs_mci->clk); + if (pd->f_min == 0) { - host->f_min = mxs_mci_get_unit_clock(mxs_mci) / 254 / 256; - pr_debug("Min. frequency is %u Hz\n", host->f_min); + host->f_min = rate / 254 / 256; + dev_dbg(hw_dev, "Min. frequency is %u Hz\n", host->f_min); } else { host->f_min = pd->f_min; - pr_debug("Min. frequency is %u Hz, could be %u Hz\n", - host->f_min, mxs_mci_get_unit_clock(mxs_mci) / 254 / 256); + dev_dbg(hw_dev, "Min. frequency is %u Hz, could be %lu Hz\n", + host->f_min, rate / 254 / 256); } if (pd->f_max == 0) { - host->f_max = mxs_mci_get_unit_clock(mxs_mci) / 2 / 1; - pr_debug("Max. frequency is %u Hz\n", host->f_max); + host->f_max = rate / 2 / 1; + dev_dbg(hw_dev, "Max. frequency is %u Hz\n", host->f_max); } else { host->f_max = pd->f_max; - pr_debug("Max. frequency is %u Hz, could be %u Hz\n", - host->f_max, mxs_mci_get_unit_clock(mxs_mci) / 2 / 1); + dev_dbg(hw_dev, "Max. frequency is %u Hz, could be %lu Hz\n", + host->f_max, rate / 2 / 1); } if (IS_ENABLED(CONFIG_MCI_INFO)) { diff --git a/drivers/mci/omap_hsmmc.c b/drivers/mci/omap_hsmmc.c index b379c31fae..62c79e1159 100644 --- a/drivers/mci/omap_hsmmc.c +++ b/drivers/mci/omap_hsmmc.c @@ -592,7 +592,8 @@ static int omap_mmc_probe(struct device_d *dev) hsmmc->mci.send_cmd = mmc_send_cmd; hsmmc->mci.set_ios = mmc_set_ios; hsmmc->mci.init = mmc_init_setup; - hsmmc->mci.host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS; + hsmmc->mci.host_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | + MMC_CAP_MMC_HIGHSPEED; hsmmc->mci.hw_dev = dev; hsmmc->iobase = dev_request_mem_region(dev, 0); diff --git a/drivers/mci/pxamci.c b/drivers/mci/pxamci.c index c1380d1fd8..5ab88b8beb 100644 --- a/drivers/mci/pxamci.c +++ b/drivers/mci/pxamci.c @@ -343,7 +343,7 @@ static int pxamci_probe(struct device_d *dev) host->mci.init = pxamci_init; host->mci.send_cmd = pxamci_request; host->mci.set_ios = pxamci_set_ios; - host->mci.host_caps = MMC_MODE_4BIT; + host->mci.host_caps = MMC_CAP_4_BIT_DATA; host->mci.hw_dev = dev; host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; diff --git a/drivers/mfd/stmpe-i2c.c b/drivers/mfd/stmpe-i2c.c index d87620e8ff..3a2db923fd 100644 --- a/drivers/mfd/stmpe-i2c.c +++ b/drivers/mfd/stmpe-i2c.c @@ -106,6 +106,25 @@ static struct file_operations stmpe_fops = { .write = stmpe_write, }; +static struct stmpe_platform_data *stmpe_of_probe(struct device_d *dev) +{ + struct stmpe_platform_data *pdata; + struct device_node *node; + + if (!IS_ENABLED(CONFIG_OFDEVICE) || !dev->device_node) + return NULL; + + pdata = xzalloc(sizeof(*pdata)); + + for_each_child_of_node(dev->device_node, node) { + if (!strcmp(node->name, "stmpe_gpio")) { + pdata->blocks |= STMPE_BLOCK_GPIO; + } + } + + return pdata; +} + static int stmpe_probe(struct device_d *dev) { struct stmpe_platform_data *pdata = dev->platform_data; @@ -113,8 +132,11 @@ static int stmpe_probe(struct device_d *dev) struct stmpe_client_info *i2c_ci; if (!pdata) { - dev_dbg(dev, "no platform data\n"); - return -ENODEV; + pdata = stmpe_of_probe(dev); + if (!pdata) { + dev_dbg(dev, "no platform data\n"); + return -ENODEV; + } } stmpe_dev = xzalloc(sizeof(struct stmpe)); @@ -140,9 +162,15 @@ static int stmpe_probe(struct device_d *dev) return 0; } +static struct platform_device_id stmpe_i2c_id[] = { + { "stmpe1601", 0 }, + { } +}; + static struct driver_d stmpe_driver = { .name = DRIVERNAME, .probe = stmpe_probe, + .id_table = stmpe_i2c_id, }; static int stmpe_init(void) diff --git a/drivers/mtd/core.c b/drivers/mtd/core.c index f3580981f0..37f4428dc3 100644 --- a/drivers/mtd/core.c +++ b/drivers/mtd/core.c @@ -70,7 +70,7 @@ static ssize_t mtd_op_read(struct cdev *cdev, void* buf, size_t count, int ret; unsigned long offset = _offset; - dev_dbg(cdev->dev, "read ofs: 0x%08lx count: 0x%08x\n", + dev_dbg(cdev->dev, "read ofs: 0x%08lx count: 0x%08zx\n", offset, count); ret = mtd_read(mtd, offset, count, &retlen, buf); @@ -98,12 +98,60 @@ static ssize_t mtd_op_write(struct cdev* cdev, const void *buf, size_t _count, return ret ? ret : _count; } +static struct mtd_erase_region_info *mtd_find_erase_region(struct mtd_info *mtd, loff_t offset) +{ + int i; + + for (i = 0; i < mtd->numeraseregions; i++) { + struct mtd_erase_region_info *e = &mtd->eraseregions[i]; + if (offset > e->offset + e->erasesize * e->numblocks) + continue; + return e; + } + + return NULL; +} + +static int mtd_erase_align(struct mtd_info *mtd, size_t *count, loff_t *offset) +{ + struct mtd_erase_region_info *e; + loff_t ofs; + + if (mtd->numeraseregions == 0) { + ofs = *offset & ~(mtd->erasesize - 1); + *count += (*offset - ofs); + *count = ALIGN(*count, mtd->erasesize); + *offset = ofs; + return 0; + } + + e = mtd_find_erase_region(mtd, *offset); + if (!e) + return -EINVAL; + + ofs = *offset & ~(e->erasesize - 1); + *count += (*offset - ofs); + + e = mtd_find_erase_region(mtd, *offset + *count); + if (!e) + return -EINVAL; + + *count = ALIGN(*count, e->erasesize); + *offset = ofs; + + return 0; +} + static int mtd_op_erase(struct cdev *cdev, size_t count, loff_t offset) { struct mtd_info *mtd = cdev->priv; struct erase_info erase; int ret; + ret = mtd_erase_align(mtd, &count, &offset); + if (ret) + return ret; + memset(&erase, 0, sizeof(erase)); erase.mtd = mtd; erase.addr = offset; diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 8c14112fe8..1969afff12 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -1117,7 +1117,8 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, mtd->writesize = le32_to_cpu(p->byte_per_page); mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize; mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); - chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize; + chip->chipsize = le32_to_cpu(p->blocks_per_lun); + chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; *busw = 0; if (le16_to_cpu(p->features) & 1) *busw = NAND_BUSWIDTH_16; diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c index dd43a95f57..56d5ecfe26 100644 --- a/drivers/mtd/nand/nand_mxs.c +++ b/drivers/mtd/nand/nand_mxs.c @@ -21,6 +21,8 @@ #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> #include <linux/types.h> +#include <linux/clk.h> +#include <linux/err.h> #include <common.h> #include <malloc.h> #include <errno.h> @@ -140,6 +142,7 @@ struct mxs_nand_info { struct nand_chip nand_chip; void __iomem *io_base; + struct clk *clk; struct mtd_info mtd; u32 version; @@ -1147,8 +1150,6 @@ int mxs_nand_hw_init(struct mxs_nand_info *info) /* Init the DMA controller. */ mxs_dma_init(); - imx_enable_nandclk(); - /* Reset the GPMI block. */ ret = mxs_reset_block(gpmi_regs + GPMI_CTRL0, 0); if (ret) @@ -1200,6 +1201,12 @@ static int mxs_nand_probe(struct device_d *dev) /* XXX: Remove u-boot specific access pointers and use io_base instead? */ nand_info->io_base = dev_request_mem_region(dev, 0); + nand_info->clk = clk_get(dev, NULL); + if (IS_ERR(nand_info->clk)) + return PTR_ERR(nand_info->clk); + + clk_enable(nand_info->clk); + err = mxs_nand_alloc_buffers(nand_info); if (err) goto err1; diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c index 1346c91348..2f31352340 100644 --- a/drivers/net/fec_imx.c +++ b/drivers/net/fec_imx.c @@ -45,19 +45,6 @@ struct fec_frame { uint8_t head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */ }; -#ifdef CONFIG_COMMON_CLK -static inline unsigned long fec_clk_get_rate(struct fec_priv *fec) -{ - return clk_get_rate(fec->clk); -} -#else -static inline unsigned long fec_clk_get_rate(struct fec_priv *fec) -{ - return imx_get_fecclk(); -} -#endif - - /* * MII-interface related functions */ @@ -69,7 +56,7 @@ static int fec_miibus_read(struct mii_bus *bus, int phyAddr, int regAddr) uint32_t phy; /* convenient holder for the PHY */ uint64_t start; - writel(((fec_clk_get_rate(fec) >> 20) / 5) << 1, + writel(((clk_get_rate(fec->clk) >> 20) / 5) << 1, fec->regs + FEC_MII_SPEED); /* * reading from any PHY's register is done by properly @@ -112,7 +99,7 @@ static int fec_miibus_write(struct mii_bus *bus, int phyAddr, uint32_t phy; /* convenient holder for the PHY */ uint64_t start; - writel(((fec_clk_get_rate(fec) >> 20) / 5) << 1, + writel(((clk_get_rate(fec->clk) >> 20) / 5) << 1, fec->regs + FEC_MII_SPEED); reg = regAddr << FEC_MII_DATA_RA_SHIFT; @@ -305,7 +292,7 @@ static int fec_init(struct eth_device *dev) * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock * and do not drop the Preamble. */ - writel(((fec_clk_get_rate(fec) >> 20) / 5) << 1, + writel(((clk_get_rate(fec->clk) >> 20) / 5) << 1, fec->regs + FEC_MII_SPEED); if (fec->interface == PHY_INTERFACE_MODE_RMII) { @@ -674,14 +661,14 @@ static int fec_probe(struct device_d *dev) edev->set_ethaddr = fec_set_hwaddr; edev->parent = dev; - if (IS_ENABLED(CONFIG_COMMON_CLK)) { - fec->clk = clk_get(dev, NULL); - if (IS_ERR(fec->clk)) { - ret = PTR_ERR(fec->clk); - goto err_free; - } + fec->clk = clk_get(dev, NULL); + if (IS_ERR(fec->clk)) { + ret = PTR_ERR(fec->clk); + goto err_free; } + clk_enable(fec->clk); + fec->regs = dev_request_mem_region(dev, 0); /* Reset chip. */ diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c index 96055bd39c..f944c6c060 100644 --- a/drivers/net/gianfar.c +++ b/drivers/net/gianfar.c @@ -184,10 +184,11 @@ static int gfar_open(struct eth_device *edev) { int ix; struct gfar_private *priv = edev->priv; + struct gfar_phy *phy = priv->gfar_mdio; void __iomem *regs = priv->regs; int ret; - ret = phy_device_connect(edev, &priv->miibus, priv->phyaddr, + ret = phy_device_connect(edev, &phy->miibus, priv->phyaddr, gfar_adjust_link, 0, PHY_INTERFACE_MODE_NA); if (ret) return ret; @@ -305,44 +306,51 @@ static uint gfar_local_mdio_read(void __iomem *phyregs, uint phyid, uint regnum) static void gfar_configure_serdes(struct gfar_private *priv) { - gfar_local_mdio_write(priv->phyregs_sgmii, + struct gfar_phy *phy = priv->gfar_tbi; + + gfar_local_mdio_write(phy->regs, in_be32(priv->regs + GFAR_TBIPA_OFFSET), GFAR_TBI_ANA, priv->tbiana); - gfar_local_mdio_write(priv->phyregs_sgmii, + gfar_local_mdio_write(phy->regs, in_be32(priv->regs + GFAR_TBIPA_OFFSET), GFAR_TBI_TBICON, GFAR_TBICON_CLK_SELECT); - gfar_local_mdio_write(priv->phyregs_sgmii, + gfar_local_mdio_write(phy->regs, in_be32(priv->regs + GFAR_TBIPA_OFFSET), GFAR_TBI_CR, priv->tbicr); } -/* Reset the internal and external PHYs. */ -static void gfar_init_phy(struct eth_device *dev) +static int gfar_bus_reset(struct mii_bus *bus) { - struct gfar_private *priv = dev->priv; - void __iomem *regs = priv->regs; + struct gfar_phy *phy = bus->priv; uint64_t start; - /* Assign a Physical address to the TBI */ - out_be32(regs + GFAR_TBIPA_OFFSET, GFAR_TBIPA_VALUE); - /* Reset MII (due to new addresses) */ - out_be32(priv->phyregs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_RESET); - out_be32(priv->phyregs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_INIT_VALUE); + out_be32(phy->regs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_RESET); + out_be32(phy->regs + GFAR_MIIMCFG_OFFSET, GFAR_MIIMCFG_INIT_VALUE); start = get_time_ns(); while (!is_timeout(start, 10 * MSECOND)) { - if (!(in_be32(priv->phyregs + GFAR_MIIMMIND_OFFSET) & + if (!(in_be32(phy->regs + GFAR_MIIMMIND_OFFSET) & GFAR_MIIMIND_BUSY)) break; } + return 0; +} - gfar_local_mdio_write(priv->phyregs, priv->phyaddr, GFAR_MIIM_CR, +/* Reset the external PHYs. */ +static void gfar_init_phy(struct eth_device *dev) +{ + struct gfar_private *priv = dev->priv; + struct gfar_phy *phy = priv->gfar_mdio; + void __iomem *regs = priv->regs; + uint64_t start; + + gfar_local_mdio_write(phy->regs, priv->phyaddr, GFAR_MIIM_CR, GFAR_MIIM_CR_RST); start = get_time_ns(); while (!is_timeout(start, 10 * MSECOND)) { - if (!(gfar_local_mdio_read(priv->phyregs, priv->phyaddr, + if (!(gfar_local_mdio_read(phy->regs, priv->phyaddr, GFAR_MIIM_CR) & GFAR_MIIM_CR_RST)) break; } @@ -433,13 +441,12 @@ static int gfar_recv(struct eth_device *edev) /* Read a MII PHY register. */ static int gfar_miiphy_read(struct mii_bus *bus, int addr, int reg) { - struct device_d *dev = bus->parent; - struct gfar_private *priv = bus->priv; + struct gfar_phy *phy = bus->priv; int ret; - ret = gfar_local_mdio_read(priv->phyregs, addr, reg); + ret = gfar_local_mdio_read(phy->regs, addr, reg); if (ret == -EIO) - dev_err(dev, "Can't read PHY at address %d\n", addr); + dev_err(phy->dev, "Can't read PHY at address %d\n", addr); return ret; } @@ -448,15 +455,14 @@ static int gfar_miiphy_read(struct mii_bus *bus, int addr, int reg) static int gfar_miiphy_write(struct mii_bus *bus, int addr, int reg, u16 value) { - struct device_d *dev = bus->parent; - struct gfar_private *priv = bus->priv; + struct gfar_phy *phy = bus->priv; unsigned short val = value; int ret; - ret = gfar_local_mdio_write(priv->phyregs, addr, reg, val); + ret = gfar_local_mdio_write(phy->regs, addr, reg, val); if (ret) - dev_err(dev, "Can't write PHY at address %d\n", addr); + dev_err(phy->dev, "Can't write PHY at address %d\n", addr); return 0; } @@ -470,7 +476,9 @@ static int gfar_probe(struct device_d *dev) struct gfar_info_struct *gfar_info = dev->platform_data; struct eth_device *edev; struct gfar_private *priv; + struct device_d *mdev; size_t size; + char devname[16]; char *p; priv = xzalloc(sizeof(struct gfar_private)); @@ -480,14 +488,28 @@ static int gfar_probe(struct device_d *dev) edev = &priv->edev; - priv->regs = dev_request_mem_region(dev, 0); - priv->phyregs = dev_request_mem_region(dev, 1); - priv->phyregs_sgmii = dev_request_mem_region(dev, 2); - + priv->mdiobus_tbi = gfar_info->mdiobus_tbi; + priv->regs = dev_get_mem_region(dev, 0); priv->phyaddr = gfar_info->phyaddr; priv->tbicr = gfar_info->tbicr; priv->tbiana = gfar_info->tbiana; + mdev = get_device_by_name("gfar-mdio0"); + if (mdev == NULL) { + pr_err("gfar-mdio0 was not found\n"); + return -ENODEV; + } + priv->gfar_mdio = mdev->priv; + + if (priv->mdiobus_tbi != 0) { + sprintf(devname, "%s%d", "gfar-tbiphy", priv->mdiobus_tbi); + mdev = get_device_by_name(devname); + if (mdev == NULL) { + pr_err("%s was not found\n", devname); + return -ENODEV; + } + } + priv->gfar_tbi = mdev->priv; /* * Allocate descriptors 64-bit aligned. Descriptors * are 8 bytes in size. @@ -512,15 +534,8 @@ static int gfar_probe(struct device_d *dev) udelay(2); clrbits_be32(priv->regs + GFAR_MACCFG1_OFFSET, GFAR_MACCFG1_SOFT_RESET); - priv->miibus.read = gfar_miiphy_read; - priv->miibus.write = gfar_miiphy_write; - priv->miibus.priv = priv; - priv->miibus.parent = dev; - gfar_init_phy(edev); - mdiobus_register(&priv->miibus); - return eth_register(edev); } @@ -529,3 +544,64 @@ static struct driver_d gfar_eth_driver = { .probe = gfar_probe, }; device_platform_driver(gfar_eth_driver); + +static int gfar_phy_probe(struct device_d *dev) +{ + struct gfar_phy *phy; + int ret; + + phy = xzalloc(sizeof(*phy)); + phy->dev = dev; + phy->regs = dev_get_mem_region(dev, 0); + if (!phy->regs) + return -ENOMEM; + + phy->miibus.read = gfar_miiphy_read; + phy->miibus.write = gfar_miiphy_write; + phy->miibus.priv = phy; + phy->miibus.reset = gfar_bus_reset; + phy->miibus.parent = dev; + dev->priv = phy; + + ret = mdiobus_register(&phy->miibus); + if (ret) + return ret; + + return 0; +} + +static struct driver_d gfar_phy_driver = { + .name = "gfar-mdio", + .probe = gfar_phy_probe, +}; +register_driver_macro(coredevice, platform, gfar_phy_driver); + +static int gfar_tbiphy_probe(struct device_d *dev) +{ + struct gfar_phy *phy; + int ret; + + phy = xzalloc(sizeof(*phy)); + phy->dev = dev; + phy->regs = dev_get_mem_region(dev, 0); + if (!phy->regs) + return -ENOMEM; + + phy->miibus.read = gfar_miiphy_read; + phy->miibus.write = gfar_miiphy_write; + phy->miibus.priv = phy; + phy->miibus.parent = dev; + dev->priv = phy; + + ret = mdiobus_register(&phy->miibus); + if (ret) + return ret; + + return 0; +} + +static struct driver_d gfar_tbiphy_driver = { + .name = "gfar-tbiphy", + .probe = gfar_tbiphy_probe, +}; +register_driver_macro(coredevice, platform, gfar_tbiphy_driver); diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h index b52cc5ab3b..1aac47907a 100644 --- a/drivers/net/gianfar.h +++ b/drivers/net/gianfar.h @@ -205,7 +205,6 @@ struct rxbd8 { #define GFAR_ECNTRL_OFFSET 0x020 /* Ethernet Control */ #define GFAR_MINFLR_OFFSET 0x024 /* Minimum Frame Length */ #define GFAR_DMACTRL_OFFSET 0x02c /* DMA Control */ -#define GFAR_TBIPA_OFFSET 0x030 /* TBI PHY address */ /* eTSEC transmit control and status register */ #define GFAR_TSTAT_OFFSET 0x104 /* transmit status register */ @@ -263,13 +262,19 @@ struct rxbd8 { #define GFAR_ATTR_OFFSET 0xbf8 /* Default Attribute Register */ #define GFAR_ATTRELI_OFFSET 0xbfc /* Default Attribute Extract Len/Idx */ +struct gfar_phy { + void __iomem *regs; + struct device_d *dev; + struct mii_bus miibus; +}; + struct gfar_private { struct eth_device edev; void __iomem *regs; - void __iomem *phyregs; - void __iomem *phyregs_sgmii; + int mdiobus_tbi; + struct gfar_phy *gfar_mdio; + struct gfar_phy *gfar_tbi; struct phy_info *phyinfo; - struct mii_bus miibus; volatile struct txbd8 *txbd; volatile struct rxbd8 *rxbd; uint txidx; diff --git a/drivers/net/smc91111.c b/drivers/net/smc91111.c index 48183dd4fa..b868cbf194 100644 --- a/drivers/net/smc91111.c +++ b/drivers/net/smc91111.c @@ -55,10 +55,6 @@ . 03/16/01 Daris A Nevil Modified smc9194.c for use with LAN91C111 ----------------------------------------------------------------------------*/ -#ifdef CONFIG_ENABLE_DEVICE_NOISE -# define DEBUG -#endif - #include <common.h> #include <command.h> diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index 3b94779cd9..e0d78d06e5 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c @@ -18,10 +18,6 @@ * */ -#ifdef CONFIG_ENABLE_DEVICE_NOISE -# define DEBUG -#endif - #include <common.h> #include <command.h> diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig index ffe063e0b7..03ae599279 100644 --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig @@ -1,4 +1,5 @@ config OFTREE + select DTC bool config OFTREE_MEM_GENERIC diff --git a/drivers/pinctrl/imx-iomux-v3.c b/drivers/pinctrl/imx-iomux-v3.c index c867a23703..1223c02730 100644 --- a/drivers/pinctrl/imx-iomux-v3.c +++ b/drivers/pinctrl/imx-iomux-v3.c @@ -194,6 +194,8 @@ static __maybe_unused struct of_device_id imx_iomux_v3_dt_ids[] = { .compatible = "fsl,imx53-iomuxc", }, { .compatible = "fsl,imx6q-iomuxc", + }, { + .compatible = "fsl,imx6dl-iomuxc", }, { /* sentinel */ } diff --git a/drivers/serial/serial_auart.c b/drivers/serial/serial_auart.c index a69e65b91b..98f7c75de5 100644 --- a/drivers/serial/serial_auart.c +++ b/drivers/serial/serial_auart.c @@ -42,6 +42,8 @@ #include <io.h> #include <malloc.h> #include <notifier.h> +#include <linux/clk.h> +#include <linux/err.h> #include <mach/clock.h> #include <mach/mxs.h> @@ -92,6 +94,7 @@ struct auart_priv { int baudrate; struct notifier_block notify; void __iomem *base; + struct clk *clk; }; static void auart_serial_putc(struct console_device *cdev, char c) @@ -143,7 +146,7 @@ static int auart_serial_setbaudrate(struct console_device *cdev, int new_baudrat writel(0x0, priv->base + HW_UARTAPP_CTRL2); /* Calculate and set baudrate */ - quot = (imx_get_xclk() * 32) / new_baudrate; + quot = (clk_get_rate(priv->clk) * 32) / new_baudrate; reg = BF_UARTAPP_LINECTRL_BAUD_DIVFRAC(quot & 0x3F) | BF_UARTAPP_LINECTRL_BAUD_DIVINT(quot >> 6) | BF_UARTAPP_LINECTRL_WLEN(3) | @@ -194,6 +197,9 @@ static int auart_serial_probe(struct device_d *dev) dev->priv = priv; priv->base = dev_request_mem_region(dev, 0); + priv->clk = clk_get(dev, NULL); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); auart_serial_init_port(priv); auart_serial_setbaudrate(cdev, CONFIG_BAUDRATE); diff --git a/drivers/serial/stm-serial.c b/drivers/serial/stm-serial.c index a1bb7334b5..0d7484f4bd 100644 --- a/drivers/serial/stm-serial.c +++ b/drivers/serial/stm-serial.c @@ -29,6 +29,8 @@ #include <gpio.h> #include <io.h> #include <malloc.h> +#include <linux/clk.h> +#include <linux/err.h> #include <mach/imx-regs.h> #include <mach/clock.h> @@ -56,6 +58,7 @@ struct stm_priv { int baudrate; struct notifier_block notify; void __iomem *base; + struct clk *clk; }; static void stm_serial_putc(struct console_device *cdev, char c) @@ -107,7 +110,7 @@ static int stm_serial_setbaudrate(struct console_device *cdev, int new_baudrate) writel(0, priv->base + UARTDBGCR); /* Calculate and set baudrate */ - quot = (imx_get_xclk() * 4) / new_baudrate; + quot = (clk_get_rate(priv->clk) * 4) / new_baudrate; writel(quot & 0x3f, priv->base + UARTDBGFBRD); writel(quot >> 6, priv->base + UARTDBGIBRD); @@ -160,6 +163,9 @@ static int stm_serial_probe(struct device_d *dev) dev->priv = priv; priv->base = dev_request_mem_region(dev, 0); + priv->clk = clk_get(dev, NULL); + if (IS_ERR(priv->clk)) + return PTR_ERR(priv->clk); stm_serial_init_port(priv); stm_serial_setbaudrate(cdev, CONFIG_BAUDRATE); diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index f14e28f545..c279c2160f 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -40,7 +40,7 @@ config DRIVER_SPI_MXS config DRIVER_SPI_OMAP3 bool "OMAP3 McSPI Master driver" - depends on ARCH_OMAP3 + depends on ARCH_OMAP3 || ARCH_AM33XX endif diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index e15f2c2916..8dfd6d54e5 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -21,6 +21,7 @@ #include <errno.h> #include <io.h> #include <linux/clk.h> +#include <linux/err.h> #include <asm/mmu.h> #include <mach/generic.h> #include <mach/imx-regs.h> @@ -52,7 +53,7 @@ static inline struct mxs_spi *to_mxs(struct spi_master *master) static void imx_set_ssp_busclock(struct spi_master *master, uint32_t freq) { struct mxs_spi *mxs = to_mxs(master); - const uint32_t sspclk = imx_get_sspclk(master->bus_num); + const uint32_t sspclk = clk_get_rate(mxs->clk); uint32_t val; uint32_t divide, rate, tgtclk; @@ -266,6 +267,9 @@ static int mxs_spi_probe(struct device_d *dev) mxs->mode = SPI_CPOL | SPI_CPHA; mxs->regs = dev_request_mem_region(dev, 0); + mxs->clk = clk_get(dev, NULL); + if (IS_ERR(mxs->clk)) + return PTR_ERR(mxs->clk); spi_register_master(master); diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index e6581dfd32..5c8cc8882a 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -325,17 +325,6 @@ static int omap3_spi_transfer(struct spi_device *spi, struct spi_message *mesg) static int omap3_spi_setup(struct spi_device *spi) { - struct spi_master *master = spi->master; - - if (((master->bus_num == 1) && (spi->chip_select > 3)) || - ((master->bus_num == 2) && (spi->chip_select > 1)) || - ((master->bus_num == 3) && (spi->chip_select > 1)) || - ((master->bus_num == 4) && (spi->chip_select > 0))) { - printf("SPI error: unsupported chip select %i \ - on bus %i\n", spi->chip_select, master->bus_num); - return -EINVAL; - } - if (spi->max_speed_hz > OMAP3_MCSPI_MAX_FREQ) { printf("SPI error: unsupported frequency %i Hz. \ Max frequency is 48 Mhz\n", spi->max_speed_hz); @@ -368,16 +357,24 @@ static int omap3_spi_probe(struct device_d *dev) * McSPI3 has 2 CS (bus 3, cs 0 - 1) * McSPI4 has 1 CS (bus 4, cs 0) * + * AM335x McSPI has 2 busses with 2 chip selects: + * McSPI0 has 2 CS (bus 0, cs 0 - 1) + * McSPI1 has 2 CS (bus 1, cs 0 - 1) + * * The board code has to make sure that it does not use * invalid buses or chip selects. */ master->bus_num = dev->id; - master->num_chipselect = 4; + + if (IS_ENABLED(CONFIG_ARCH_OMAP3)) + master->num_chipselect = 4; + else + master->num_chipselect = 2; master->setup = omap3_spi_setup; master->transfer = omap3_spi_transfer; - omap3_master->regs = dev_request_mem_region(dev, 0);; + omap3_master->regs = dev_request_mem_region(dev, 0); spi_reset(master); diff --git a/drivers/usb/core/usb.c b/drivers/usb/core/usb.c index 9a0723a2ed..36fc736fd0 100644 --- a/drivers/usb/core/usb.c +++ b/drivers/usb/core/usb.c @@ -431,14 +431,22 @@ static int usb_new_device(struct usb_device *dev) if (dev->descriptor->iSerialNumber) usb_string(dev, dev->descriptor->iSerialNumber, dev->serial, sizeof(dev->serial)); + + if (parent) { + sprintf(dev->dev.name, "%s-%d", parent->dev.name, port); + } else { + sprintf(dev->dev.name, "usb%d", dev->host->busnum); + } + + dev->dev.id = DEVICE_ID_SINGLE; + + register_device(&dev->dev); + /* now prode if the device is a hub */ usb_hub_probe(dev, 0); - sprintf(dev->dev.name, "usb%d-%d", dev->host->busnum, dev->devnum); - print_usb_device(dev); - register_device(&dev->dev); dev_add_param_int_ro(&dev->dev, "iManufacturer", dev->descriptor->iManufacturer, "%d"); dev_add_param_int_ro(&dev->dev, "iProduct", @@ -480,13 +488,18 @@ static struct usb_device *usb_alloc_new_device(void) return usbdev; } -void usb_rescan(void) +int usb_host_detect(struct usb_host *host, int force) { struct usb_device *dev, *tmp; - struct usb_host *host; int ret; + if (host->scanned && !force) + return -EBUSY; + list_for_each_entry_safe(dev, tmp, &usb_device_list, list) { + if (dev->host != host) + continue; + list_del(&dev->list); unregister_device(&dev->dev); if (dev->hub) @@ -496,17 +509,31 @@ void usb_rescan(void) free(dev); } + ret = host->init(host); + if (ret) + return ret; + + dev = usb_alloc_new_device(); + dev->host = host; + usb_new_device(dev); + + host->scanned = 1; + + return 0; +} + +void usb_rescan(int force) +{ + struct usb_host *host; + int ret; + printf("USB: scanning bus for devices...\n"); dev_index = 0; list_for_each_entry(host, &host_list, list) { - ret = host->init(host); + ret = usb_host_detect(host, force); if (ret) continue; - - dev = usb_alloc_new_device(); - dev->host = host; - usb_new_device(dev); } printf("%d USB Device(s) found\n", dev_index); diff --git a/drivers/usb/gadget/fsl_udc.c b/drivers/usb/gadget/fsl_udc.c index 81715f9e9a..993c7eb996 100644 --- a/drivers/usb/gadget/fsl_udc.c +++ b/drivers/usb/gadget/fsl_udc.c @@ -625,10 +625,13 @@ static int dr_controller_setup(struct fsl_udc *udc) case FSL_USB2_PHY_SERIAL: portctrl |= PORTSCX_PTS_FSLS; break; + case FSL_USB2_PHY_NONE: + break; default: return -EINVAL; } - writel(portctrl, &dr_regs->portsc1); + if (udc->phy_mode != FSL_USB2_PHY_NONE) + writel(portctrl, &dr_regs->portsc1); /* Stop and reset the usb controller */ tmp = readl(&dr_regs->usbcmd); @@ -2077,7 +2080,10 @@ static int struct_udc_setup(struct fsl_udc *udc, struct fsl_usb2_platform_data *pdata = dev->platform_data; size_t size; - udc->phy_mode = pdata->phy_mode; + if (pdata) + udc->phy_mode = pdata->phy_mode; + else + udc->phy_mode = FSL_USB2_PHY_NONE; udc->eps = kzalloc(sizeof(struct fsl_ep) * udc->max_ep, GFP_KERNEL); if (!udc->eps) { diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 7c389aac87..f44f836357 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -27,6 +27,7 @@ #include <xfuncs.h> #include <clock.h> #include <errno.h> +#include <of.h> #include <usb/ehci.h> #include <asm/mmu.h> @@ -439,13 +440,15 @@ static inline int min3(int a, int b, int c) * boards. * See http://lists.infradead.org/pipermail/linux-arm-kernel/2011-January/037341.html */ -void ehci_powerup_fixup(struct ehci_priv *ehci) +static void ehci_powerup_fixup(struct ehci_priv *ehci) { void *viewport = (void *)ehci->hcor + 0x30; - if (ehci->dev->id > 0) - ulpi_write(ULPI_OTG_CHRG_VBUS, ULPI_OTGCTL + ULPI_REG_SET, - viewport); + if (!of_machine_is_compatible("genesi,imx51-sb")) + return; + + ulpi_write(ULPI_OTG_CHRG_VBUS, ULPI_OTGCTL + ULPI_REG_SET, + viewport); } #else static inline void ehci_powerup_fixup(struct ehci_priv *ehci) @@ -847,6 +850,13 @@ submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer, return -1; } +static int ehci_detect(struct device_d *dev) +{ + struct ehci_priv *ehci = dev->priv; + + return usb_host_detect(&ehci->host, 0); +} + int ehci_register(struct device_d *dev, struct ehci_data *data) { struct usb_host *host; @@ -882,6 +892,8 @@ int ehci_register(struct device_d *dev, struct ehci_data *data) ehci_reset(ehci); } + dev->detect = ehci_detect; + usb_register_host(host); reg = HC_VERSION(ehci_readl(&ehci->hccr->cr_capbase)); diff --git a/drivers/usb/imx/chipidea-imx.c b/drivers/usb/imx/chipidea-imx.c index 20066499bf..a0dab70337 100644 --- a/drivers/usb/imx/chipidea-imx.c +++ b/drivers/usb/imx/chipidea-imx.c @@ -26,6 +26,7 @@ struct imx_chipidea { struct device_d *dev; + void __iomem *base; struct ehci_data data; unsigned long flags; enum imx_usb_mode mode; @@ -38,6 +39,19 @@ static int imx_chipidea_port_init(void *drvdata) struct imx_chipidea *ci = drvdata; int ret; + if ((ci->flags & MXC_EHCI_PORTSC_MASK) == MXC_EHCI_MODE_ULPI) { + dev_dbg(ci->dev, "using ULPI phy\n"); + if (IS_ENABLED(CONFIG_USB_ULPI)) { + ret = ulpi_setup(ci->base + 0x170, 1); + } else { + dev_err(ci->dev, "no ULPI support available\n"); + ret = -ENODEV; + } + + if (ret) + return ret; + } + ret = imx_usbmisc_port_init(ci->portno, ci->flags); if (ret) dev_err(ci->dev, "misc init failed: %s\n", strerror(-ret)); @@ -144,6 +158,8 @@ static int imx_chipidea_probe(struct device_d *dev) if (!base) return -ENODEV; + ci->base = base; + ci->data.init = imx_chipidea_port_init; ci->data.post_init = imx_chipidea_port_post_init; ci->data.drvdata = ci; @@ -155,19 +171,6 @@ static int imx_chipidea_probe(struct device_d *dev) portsc |= ci->flags & MXC_EHCI_PORTSC_MASK; writel(portsc, base + 0x184); - if ((ci->flags & MXC_EHCI_PORTSC_MASK) == MXC_EHCI_MODE_ULPI) { - dev_dbg(dev, "using ULPI phy\n"); - if (IS_ENABLED(CONFIG_USB_ULPI)) { - ret = ulpi_setup(base + 0x170, 1); - } else { - dev_err(dev, "no ULPI support available\n"); - ret = -ENODEV; - } - - if (ret) - return ret; - } - ci->data.hccr = base + 0x100; ci->data.hcor = base + 0x140; ci->data.flags = EHCI_HAS_TT; diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 6d6b08f605..0639d9ca23 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -45,6 +45,14 @@ config DRIVER_VIDEO_S3C24XX help Add support for the S3C244x LCD controller. +config DRIVER_VIDEO_OMAP + bool "OMAP framebuffer driver" + depends on ARCH_OMAP4 + help + Add support for OMAP Display Controller. Currently this + driver only supports OMAP4 SoCs in DISPC parallel mode on + LCD2 (MIPI DPI). + if DRIVER_VIDEO_S3C24XX config DRIVER_VIDEO_S3C_VERBOSE diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 742914190c..67169d133b 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -8,3 +8,4 @@ obj-$(CONFIG_DRIVER_VIDEO_IMX_IPU) += imx-ipu-fb.o obj-$(CONFIG_DRIVER_VIDEO_S3C24XX) += s3c24xx.o obj-$(CONFIG_DRIVER_VIDEO_PXA) += pxa.o obj-$(CONFIG_DRIVER_VIDEO_SDL) += sdl.o +obj-$(CONFIG_DRIVER_VIDEO_OMAP) += omap.o diff --git a/drivers/video/omap.c b/drivers/video/omap.c new file mode 100644 index 0000000000..487aca6f26 --- /dev/null +++ b/drivers/video/omap.c @@ -0,0 +1,524 @@ +/* + * TI Omap Frame Buffer device driver + * + * Copyright (C) 2013 Christoph Fritz <chf.fritz@googlemail.com> + * Based on work by Enrico Scholz, sponsored by Phytec + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <driver.h> +#include <fb.h> +#include <errno.h> +#include <xfuncs.h> +#include <init.h> +#include <stdio.h> +#include <io.h> +#include <common.h> +#include <malloc.h> +#include <common.h> +#include <clock.h> + +#include <mach/omap4-silicon.h> +#include <mach/omap-fb.h> + +#include <asm/mmu.h> + +#include "omap.h" + +struct omapfb_device { + struct fb_info info; + struct device_d *dev; + + struct omapfb_display const *cur_display; + + struct omapfb_display const *displays; + size_t num_displays; + + void __iomem *dss; + void __iomem *dispc; + + struct { + void __iomem *addr; + size_t size; + } prealloc_screen; + + struct { + uint32_t dispc_control; + uint32_t dispc_pol_freq; + } shadow; + + struct { + unsigned int dss_clk_hz; + unsigned int lckd; + unsigned int pckd; + } divisor; + size_t dma_size; + void (*enable_fn)(int); + + struct fb_videomode video_modes[]; +}; + +static inline struct omapfb_device *to_omapfb(const struct fb_info *info) +{ + return container_of(info, struct omapfb_device, info); +} + +static void omapfb_enable(struct fb_info *info) +{ + struct omapfb_device *fbi = to_omapfb(info); + + dev_dbg(fbi->dev, "%s\n", __func__); + + if (!fbi->cur_display) { + dev_err(fbi->dev, "no valid mode set\n"); + return; + } + + if (fbi->enable_fn) + fbi->enable_fn(1); + + udelay(fbi->cur_display->power_on_delay * 1000u); + + o4_dispc_write(o4_dispc_read(O4_DISPC_CONTROL2) | + DSS_DISPC_CONTROL_LCDENABLE | + DSS_DISPC_CONTROL_LCDENABLESIGNAL, O4_DISPC_CONTROL2); + + o4_dispc_write(o4_dispc_read(O4_DISPC_VID1_ATTRIBUTES) | + DSS_DISPC_VIDn_ATTRIBUTES_VIDENABLE, O4_DISPC_VID1_ATTRIBUTES); + + o4_dispc_write(o4_dispc_read(O4_DISPC_CONTROL2) | + DSS_DISPC_CONTROL_GOLCD, O4_DISPC_CONTROL2); +} + +static void omapfb_disable(struct fb_info *info) +{ + struct omapfb_device *fbi = to_omapfb(info); + + dev_dbg(fbi->dev, "%s\n", __func__); + + if (!fbi->cur_display) { + dev_err(fbi->dev, "no valid mode set\n"); + return; + } + + o4_dispc_write(o4_dispc_read(O4_DISPC_CONTROL2) & + ~(DSS_DISPC_CONTROL_LCDENABLE | + DSS_DISPC_CONTROL_LCDENABLESIGNAL), O4_DISPC_CONTROL2); + + o4_dispc_write(o4_dispc_read(O4_DISPC_VID1_ATTRIBUTES) & + ~(DSS_DISPC_VIDn_ATTRIBUTES_VIDENABLE), + O4_DISPC_VID1_ATTRIBUTES); + + if (fbi->prealloc_screen.addr == NULL) { + /* free frame buffer; but only when screen is not + * preallocated */ + if (info->screen_base) + dma_free_coherent(info->screen_base, fbi->dma_size); + } + + info->screen_base = NULL; + + udelay(fbi->cur_display->power_off_delay * 1000u); + + if (fbi->enable_fn) + fbi->enable_fn(0); +} + +static void omapfb_calc_divisor(struct omapfb_device *fbi, + struct fb_videomode const *mode) +{ + unsigned int l, k, t, b; + + b = UINT_MAX; + for (l = 1; l < 256; l++) { + for (k = 1; k < 256; k++) { + t = abs(mode->pixclock * 100 - + (fbi->divisor.dss_clk_hz / l / k)); + if (t <= b) { + b = t; + fbi->divisor.lckd = l; + fbi->divisor.pckd = k; + } + } + } +} + +static unsigned int omapfb_calc_format(struct fb_info const *info) +{ + struct omapfb_device *fbi = to_omapfb(info); + + switch (info->bits_per_pixel) { + case 24: + return 9; + case 32: + return 0x8; /* xRGB24-8888 (32-bit container) */ + default: + dev_err(fbi->dev, "%s: unsupported bpp %d\n", __func__, + info->bits_per_pixel); + return 0; + } +} + +struct omapfb_colors { + struct fb_bitfield red; + struct fb_bitfield green; + struct fb_bitfield blue; + struct fb_bitfield transp; +}; + +static struct omapfb_colors const omapfb_col[] = { + [0] = { + .red = { .length = 0, .offset = 0 }, + }, + [1] = { + .blue = { .length = 8, .offset = 0 }, + .green = { .length = 8, .offset = 8 }, + .red = { .length = 8, .offset = 16 }, + }, + [2] = { + .blue = { .length = 8, .offset = 0 }, + .green = { .length = 8, .offset = 8 }, + .red = { .length = 8, .offset = 16 }, + .transp = { .length = 8, .offset = 24 }, + }, +}; + +static void omapfb_fill_shadow(struct omapfb_device *fbi, + struct omapfb_display const *display) +{ + fbi->shadow.dispc_control = 0; + fbi->shadow.dispc_pol_freq = 0; + + fbi->shadow.dispc_control |= DSS_DISPC_CONTROL_STNTFT; + + switch (display->config & OMAP_DSS_LCD_DATALINES_msk) { + case OMAP_DSS_LCD_DATALINES_12: + fbi->shadow.dispc_control |= DSS_DISPC_CONTROL_TFTDATALINES_12; + break; + case OMAP_DSS_LCD_DATALINES_16: + fbi->shadow.dispc_control |= DSS_DISPC_CONTROL_TFTDATALINES_16; + break; + case OMAP_DSS_LCD_DATALINES_18: + fbi->shadow.dispc_control |= DSS_DISPC_CONTROL_TFTDATALINES_18; + break; + case OMAP_DSS_LCD_DATALINES_24: + fbi->shadow.dispc_control |= DSS_DISPC_CONTROL_TFTDATALINES_24; + break; + } + + if (display->config & OMAP_DSS_LCD_IPC) + fbi->shadow.dispc_pol_freq |= DSS_DISPC_POL_FREQ_IPC; + + if (display->config & OMAP_DSS_LCD_IVS) + fbi->shadow.dispc_pol_freq |= DSS_DISPC_POL_FREQ_IVS; + + if (display->config & OMAP_DSS_LCD_IHS) + fbi->shadow.dispc_pol_freq |= DSS_DISPC_POL_FREQ_IHS; + + if (display->config & OMAP_DSS_LCD_IEO) + fbi->shadow.dispc_pol_freq |= DSS_DISPC_POL_FREQ_IEO; + + if (display->config & OMAP_DSS_LCD_RF) + fbi->shadow.dispc_pol_freq |= DSS_DISPC_POL_FREQ_RF; + + if (display->config & OMAP_DSS_LCD_ONOFF) + fbi->shadow.dispc_pol_freq |= DSS_DISPC_POL_FREQ_ONOFF; +} + +static int omapfb_find_display_by_name(struct omapfb_device *fbi, + const char *name) +{ + int i; + + for (i = 0; i < fbi->num_displays; ++i) { + if (strcmp(name, fbi->displays[i].mode.name) == 0) + return i; + } + return -ENXIO; +} + +static int omapfb_activate_var(struct fb_info *info) +{ + struct omapfb_device *fbi = to_omapfb(info); + struct fb_videomode const *mode = info->mode; + size_t size = mode->xres * mode->yres * (info->bits_per_pixel / 8); + int rc; + unsigned int fmt = omapfb_calc_format(info); + struct omapfb_colors const *cols; + struct omapfb_display const *new_display = NULL; + + rc = omapfb_find_display_by_name(fbi, mode->name); + if (rc < 0) { + dev_err(fbi->dev, "no display found for this mode '%s'\n", + mode->name); + goto out; + } + new_display = &fbi->displays[rc]; + + /*Free old screen buf*/ + if (!fbi->prealloc_screen.addr && info->screen_base) + dma_free_coherent(info->screen_base, fbi->dma_size); + + fbi->dma_size = PAGE_ALIGN(size); + + if (!fbi->prealloc_screen.addr) { + /* case 1: no preallocated screen */ + info->screen_base = dma_alloc_coherent(size); + } else if (fbi->prealloc_screen.size < fbi->dma_size) { + /* case 2: preallocated screen, but too small */ + dev_err(fbi->dev, + "allocated framebuffer too small (%zu < %zu)\n", + fbi->prealloc_screen.size, fbi->dma_size); + rc = -ENOMEM; + goto out; + } else { + /* case 3: preallocated screen */ + info->screen_base = fbi->prealloc_screen.addr; + } + + omapfb_fill_shadow(fbi, new_display); + + omapfb_calc_divisor(fbi, mode); + + switch (info->bits_per_pixel) { + case 24: + cols = &omapfb_col[1]; + break; + case 32: + cols = &omapfb_col[2]; + break; + default: + cols = &omapfb_col[0]; + } + + info->red = cols->red; + info->green = cols->green; + info->blue = cols->blue; + info->transp = cols->transp; + + o4_dispc_write(fbi->shadow.dispc_control, O4_DISPC_CONTROL2); + + o4_dispc_write(fbi->shadow.dispc_pol_freq, O4_DISPC_POL_FREQ2); + + o4_dispc_write(DSS_DISPC_TIMING_H_HSW(mode->hsync_len - 1) | + DSS_DISPC_TIMING_H_HFP(mode->right_margin - 1) | + DSS_DISPC_TIMING_H_HBP(mode->left_margin - 1), + O4_DISPC_TIMING_H2); + + o4_dispc_write(DSS_DISPC_TIMING_V_VSW(mode->vsync_len - 1) | + DSS_DISPC_TIMING_V_VFP(mode->lower_margin) | + DSS_DISPC_TIMING_V_VBP(mode->upper_margin), O4_DISPC_TIMING_V2); + + o4_dispc_write(DSS_DISPC_DIVISOR_ENABLE | DSS_DISPC_DIVISOR_LCD(1), + O4_DISPC_DIVISOR); + + o4_dispc_write(DSS_DISPC_DIVISOR2_LCD(fbi->divisor.lckd) | + DSS_DISPC_DIVISOR2_PCD(fbi->divisor.pckd), O4_DISPC_DIVISOR2); + + o4_dispc_write(DSS_DISPC_SIZE_LCD_PPL(mode->xres - 1) | + DSS_DISPC_SIZE_LCD_LPP(mode->yres - 1), O4_DISPC_SIZE_LCD2); + + o4_dispc_write(0x0000ff00, O4_DISPC_DEFAULT_COLOR2); + + /* we use VID1 */ + o4_dispc_write((uintptr_t)info->screen_base, O4_DISPC_VID1_BA0); + o4_dispc_write((uintptr_t)info->screen_base, O4_DISPC_VID1_BA1); + + o4_dispc_write(DSS_DISPC_VIDn_POSITION_VIDPOSX(0) | + DSS_DISPC_VIDn_POSITION_VIDPOSY(0), O4_DISPC_VID1_POSITION); + o4_dispc_write(DSS_DISPC_VIDn_SIZE_VIDSIZEX(mode->xres - 1) | + DSS_DISPC_VIDn_SIZE_VIDSIZEY(mode->yres - 1), + O4_DISPC_VID1_SIZE); + o4_dispc_write(DSS_DISPC_VIDn_PICTURE_SIZE_VIDORGSIZEX(mode->xres - 1) | + DSS_DISPC_VIDn_PICTURE_SIZE_VIDORGSIZEY(mode->yres - 1), + O4_DISPC_VID1_PICTURE_SIZE); + o4_dispc_write(1, O4_DISPC_VID1_ROW_INC); + o4_dispc_write(1, O4_DISPC_VID1_PIXEL_INC); + + o4_dispc_write(0xfff, O4_DISPC_VID1_PRELOAD); + + o4_dispc_write(DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(fmt) | + DSS_DISPC_VIDn_ATTRIBUTES_VIDBURSTSIZE_8x128 | + DSS_DISPC_VIDn_ATTRIBUTES_ZORDERENABLE | + DSS_DISPC_VIDn_ATTRIBUTES_CHANNELOUT2_SECONDARY_LCD, + O4_DISPC_VID1_ATTRIBUTES); + + rc = wait_on_timeout(OFB_TIMEOUT, + !(o4_dispc_read(O4_DISPC_CONTROL2) & + DSS_DISPC_CONTROL_GOLCD)); + + if (rc) { + dev_err(fbi->dev, "timeout: dispc golcd\n"); + goto out; + } + + o4_dispc_write(o4_dispc_read(O4_DISPC_CONTROL2) | + DSS_DISPC_CONTROL_GOLCD, O4_DISPC_CONTROL2); + + fbi->cur_display = new_display; + info->xres = mode->xres; + info->yres = mode->yres; + + rc = 0; + +out: + return rc; +} + +static int omapfb_reset(struct omapfb_device const *fbi) +{ + uint32_t v = o4_dispc_read(O4_DISPC_CONTROL2); + int rc; + + /* step 1: stop the LCD controller */ + if (v & DSS_DISPC_CONTROL_LCDENABLE) { + o4_dispc_write(v & ~DSS_DISPC_CONTROL_LCDENABLE, + O4_DISPC_CONTROL2); + + o4_dispc_write(DSS_DISPC_IRQSTATUS_FRAMEDONE2, + O4_DISPC_IRQSTATUS); + + rc = wait_on_timeout(OFB_TIMEOUT, + ((o4_dispc_read(O4_DISPC_IRQSTATUS) & + DSS_DISPC_IRQSTATUS_FRAMEDONE) != 0)); + + if (rc) { + dev_err(fbi->dev, "timeout: irqstatus framedone\n"); + return -ETIMEDOUT; + } + } + + /* step 2: wait for reset done status */ + rc = wait_on_timeout(OFB_TIMEOUT, + (o4_dss_read(O4_DSS_SYSSTATUS) & + DSS_DSS_SYSSTATUS_RESETDONE)); + + if (rc) { + dev_err(fbi->dev, "timeout: sysstatus resetdone\n"); + return -ETIMEDOUT; + } + + /* DSS_CTL: set to reset value */ + o4_dss_write(0, O4_DSS_CTRL); + + return 0; +} + +static struct fb_ops omapfb_ops = { + .fb_enable = omapfb_enable, + .fb_disable = omapfb_disable, + .fb_activate_var = omapfb_activate_var, +}; + +static int omapfb_probe(struct device_d *dev) +{ + struct omapfb_platform_data const *pdata = dev->platform_data; + struct omapfb_device *fbi; + struct fb_info *info; + int rc; + size_t i; + + fbi = xzalloc(sizeof *fbi + + pdata->num_displays * sizeof fbi->video_modes[0]); + info = &fbi->info; + + fbi->dev = dev; + + /* CM_DSS_CLKSTCTRL (TRM: 935) trigger SW_WKUP */ + __raw_writel(0x2, 0x4a009100); /* TODO: move this to clockmanagement */ + + fbi->dss = dev_request_mem_region_by_name(dev, "omap4_dss"); + fbi->dispc = dev_request_mem_region_by_name(dev, "omap4_dispc"); + + if (!fbi->dss || !fbi->dispc) { + dev_err(dev, "Insufficient register description\n"); + rc = -EINVAL; + goto out; + } + + dev_info(dev, "HW-Revision 0x%04x 0x%04x\n", + o4_dss_read(O4_DISPC_REVISION), + o4_dss_read(O4_DSS_REVISION)); + + if (!pdata->dss_clk_hz | !pdata->displays | !pdata->num_displays | + !pdata->bpp) { + dev_err(dev, "Insufficient omapfb_platform_data\n"); + rc = -EINVAL; + goto out; + } + + fbi->enable_fn = pdata->enable; + fbi->displays = pdata->displays; + fbi->num_displays = pdata->num_displays; + fbi->divisor.dss_clk_hz = pdata->dss_clk_hz; + + for (i = 0; i < pdata->num_displays; ++i) + fbi->video_modes[i] = pdata->displays[i].mode; + + info->mode_list = fbi->video_modes; + info->num_modes = pdata->num_displays; + + info->priv = fbi; + info->fbops = &omapfb_ops; + info->bits_per_pixel = pdata->bpp; + + if (pdata->screen) { + if (!IS_ALIGNED(pdata->screen->start, PAGE_SIZE) || + !IS_ALIGNED(resource_size(pdata->screen), PAGE_SIZE)) { + dev_err(dev, "screen resource not aligned\n"); + rc = -EINVAL; + goto out; + } + fbi->prealloc_screen.addr = + (void __iomem *)pdata->screen->start; + fbi->prealloc_screen.size = resource_size(pdata->screen); + remap_range(fbi->prealloc_screen.addr, + fbi->prealloc_screen.size, + mmu_get_pte_uncached_flags()); + } + + rc = omapfb_reset(fbi); + if (rc < 0) { + dev_err(dev, "failed to reset: %d\n", rc); + goto out; + } + + rc = register_framebuffer(info); + if (rc < 0) { + dev_err(dev, "failed to register framebuffer: %d\n", rc); + goto out; + } + + rc = 0; + dev_info(dev, "registered\n"); + +out: + if (rc < 0) + free(fbi); + + return rc; +} + +static struct driver_d omapfb_driver = { + .name = "omap_fb", + .probe = omapfb_probe, +}; + +static int omapfb_init(void) +{ + return platform_driver_register(&omapfb_driver); +} + +device_initcall(omapfb_init); diff --git a/drivers/video/omap.h b/drivers/video/omap.h new file mode 100644 index 0000000000..ac9e1cee87 --- /dev/null +++ b/drivers/video/omap.h @@ -0,0 +1,187 @@ +/* + * TI Omap4 Frame Buffer device driver + * + * Copyright (C) 2013 Christoph Fritz <chf.fritz@googlemail.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef H_BAREBOX_DRIVER_VIDEO_OMAP4_REGS_H +#define H_BAREBOX_DRIVER_VIDEO_OMAP4_REGS_H + +#include <types.h> +#include <common.h> + +#define OFB_TIMEOUT (128 * USECOND) + +#define _ofb_read(io, reg) __raw_readl((io)+(reg)) +#define _ofb_write(val, io, reg) __raw_writel((val), (io)+(reg)) + +/* TRM: 10.1.3.2 DSS Registers */ +#define O4_DSS_REVISION 0x0 +#define O4_DSS_SYSSTATUS 0x14 +#define O4_DSS_CTRL 0x40 +#define O4_DSS_STATUS 0x5c + +#define o4_dss_read(reg) _ofb_read(fbi->dss, reg) +#define o4_dss_write(val, reg) _ofb_write(val, fbi->dss, reg) + +/* TRM: 10.2.7.3 Display Controller Registers */ +#define O4_DISPC_REVISION 0x0 +#define O4_DISPC_IRQSTATUS 0x18 +#define O4_DISPC_VID1_BA0 0xbc +#define O4_DISPC_VID1_BA1 0xc0 +#define O4_DISPC_VID1_POSITION 0xc4 +#define O4_DISPC_VID1_SIZE 0xc8 +#define O4_DISPC_VID1_ATTRIBUTES 0xcc +#define O4_DISPC_VID1_ROW_INC 0xd8 +#define O4_DISPC_VID1_PIXEL_INC 0xdc +#define O4_DISPC_VID1_PICTURE_SIZE 0xe4 +#define O4_DISPC_VID1_PRELOAD 0x230 +#define O4_DISPC_CONTROL2 0x238 +#define O4_DISPC_DEFAULT_COLOR2 0x3ac +#define O4_DISPC_SIZE_LCD2 0x3cc +#define O4_DISPC_TIMING_H2 0x400 +#define O4_DISPC_TIMING_V2 0x404 +#define O4_DISPC_POL_FREQ2 0x408 +#define O4_DISPC_DIVISOR2 0x40c +#define O4_DISPC_DIVISOR 0x804 + +#define o4_dispc_read(reg) _ofb_read(fbi->dispc, reg) +#define o4_dispc_write(val, reg) _ofb_write(val, fbi->dispc, reg) + +#define DSS_DISPC_VIDn_POSITION_VIDPOSX(_x) ((_x) << 0) +#define DSS_DISPC_VIDn_POSITION_VIDPOSY(_y) ((_y) << 16) + +#define DSS_DISPC_VIDn_PICTURE_SIZE_VIDORGSIZEX(_x) ((_x) << 0) +#define DSS_DISPC_VIDn_PICTURE_SIZE_VIDORGSIZEY(_y) ((_y) << 16) + +#define DSS_DISPC_VIDn_SIZE_VIDSIZEX(_x) ((_x) << 0) +#define DSS_DISPC_VIDn_SIZE_VIDSIZEY(_y) ((_y) << 16) + +#define DSS_DISPC_SIZE_LCD_PPL(_x) ((_x) << 0) +#define DSS_DISPC_SIZE_LCD_LPP(_y) ((_y) << 16) + +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDENABLE (1u << 0) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(_fmt) ((_fmt) << 1) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_RGB12 \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(4u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_ARGB16 \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(5u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_RGB16 \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(6u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_ARGB16o \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(7u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_xRGB24u \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(8u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_RGB24p \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(9u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_YUV2 \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(10u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_UYVY \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(11u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_ARGB32 \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(12u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_RGBA32 \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(13u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT_xRGB32 \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDFORMAT(14u) + +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDBURSTSIZE(_b) ((_b) << 14) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDBURSTSIZE_2x128 \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDBURSTSIZE(0u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDBURSTSIZE_4x128 \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDBURSTSIZE(1u) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDBURSTSIZE_8x128 \ + DSS_DISPC_VIDn_ATTRIBUTES_VIDBURSTSIZE(2u) + +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDCHANNELOUT (1u << 16) +#define DSS_DISPC_VIDn_ATTRIBUTES_SELFREFRESHAUTO (1u << 17) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDFIFOPRELOAD (1u << 19) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDVERTICALTAPS (1u << 21) +#define DSS_DISPC_VIDn_ATTRIBUTES_DOUBLESTRIDE (1u << 22) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDARBITRATION (1u << 23) +#define DSS_DISPC_VIDn_ATTRIBUTES_VIDSELFREFRESH (1u << 24) +#define DSS_DISPC_VIDn_ATTRIBUTES_ZORDERENABLE (1u << 25) + +#define DSS_DISPC_VIDn_ATTRIBUTES_CHANNELOUT2(_b) ((_b) << 30) +#define DSS_DISPC_VIDn_ATTRIBUTES_CHANNELOUT2_PRIMARY_LCD \ + DSS_DISPC_VIDn_ATTRIBUTES_CHANNELOUT2(0u) +#define DSS_DISPC_VIDn_ATTRIBUTES_CHANNELOUT2_SECONDARY_LCD \ + DSS_DISPC_VIDn_ATTRIBUTES_CHANNELOUT2(1u) +#define DSS_DISPC_VIDn_ATTRIBUTES_CHANNELOUT2_WRITEBACK_MEM \ + DSS_DISPC_VIDn_ATTRIBUTES_CHANNELOUT2(3u) + +#define DSS_DISPC_CONTROL_LCDENABLE (1u << 0) +#define DSS_DISPC_CONTROL_TVENABLE (1u << 1) +#define DSS_DISPC_CONTROL_MONOCOLOR (1u << 2) +#define DSS_DISPC_CONTROL_STNTFT (1u << 3) +#define DSS_DISPC_CONTROL_M8B (1u << 4) +#define DSS_DISPC_CONTROL_GOLCD (1u << 5) +#define DSS_DISPC_CONTROL_GOTV (1u << 6) +#define DSS_DISPC_CONTROL_STDITHERENABLE (1u << 7) + +#define DSS_DISPC_CONTROL_TFTDATALINES(_l) ((_l) << 8) +#define DSS_DISPC_CONTROL_TFTDATALINES_12 \ + DSS_DISPC_CONTROL_TFTDATALINES(0u) +#define DSS_DISPC_CONTROL_TFTDATALINES_16 \ + DSS_DISPC_CONTROL_TFTDATALINES(1u) +#define DSS_DISPC_CONTROL_TFTDATALINES_18 \ + DSS_DISPC_CONTROL_TFTDATALINES(2u) +#define DSS_DISPC_CONTROL_TFTDATALINES_24 \ + DSS_DISPC_CONTROL_TFTDATALINES(3u) + +#define DSS_DISPC_CONTROL_STALLMODE (1u << 11) +#define DSS_DISPC_CONTROL_OVERLAYOPTIMIZATION (1u << 12) +#define DSS_DISPC_CONTROL_GPIN0 (1u << 13) /* ro */ +#define DSS_DISPC_CONTROL_GPIN1 (1u << 14) /* ro */ +#define DSS_DISPC_CONTROL_GPOUT0 (1u << 15) +#define DSS_DISPC_CONTROL_GPOUT1 (1u << 16) +#define DSS_DISPC_CONTROL_HT(_ht) ((_ht) << 17) +#define DSS_DISPC_CONTROL_TDMENABLE (1u << 20) +#define DSS_DISPC_CONTROL_TDMPARALLELMODE(_pm) ((_pm) << 21) +#define DSS_DISPC_CONTROL_TDMCYCLEFORMAT(_cf) ((_cf) << 23) +#define DSS_DISPC_CONTROL_TDMUNUSEDBITS(_ub) ((_ub) << 25) +#define DSS_DISPC_CONTROL_PCKFREEENABLE (1u << 27) +#define DSS_DISPC_CONTROL_LCDENABLESIGNAL (1u << 28) +#define DSS_DISPC_CONTROL_LCDENABLEPOL (1u << 29) +#define DSS_DISPC_CONTROL_SPATIALTEMPD(_df) ((_df) << 30) + +#define DSS_DISPC_POL_FREQ_IVS (1u << 12) +#define DSS_DISPC_POL_FREQ_IHS (1u << 13) +#define DSS_DISPC_POL_FREQ_IPC (1u << 14) +#define DSS_DISPC_POL_FREQ_IEO (1u << 15) +#define DSS_DISPC_POL_FREQ_RF (1u << 16) +#define DSS_DISPC_POL_FREQ_ONOFF (1u << 17) + +#define DSS_DISPC_TIMING_H_HSW(_hsw) ((_hsw) << 0) +#define DSS_DISPC_TIMING_H_HFP(_hfp) ((_hfp) << 8) +#define DSS_DISPC_TIMING_H_HBP(_hbp) ((_hbp) << 20) + +#define DSS_DISPC_TIMING_V_VSW(_vsw) ((_vsw) << 0) +#define DSS_DISPC_TIMING_V_VFP(_vfp) ((_vfp) << 8) +#define DSS_DISPC_TIMING_V_VBP(_vbp) ((_vbp) << 20) + +#define DSS_DISPC_DIVISOR_ENABLE (1u << 0) +#define DSS_DISPC_DIVISOR_LCD(_lcd) ((_lcd) << 16) + +#define DSS_DISPC_DIVISOR2_PCD(_pcd) ((_pcd) << 0) +#define DSS_DISPC_DIVISOR2_LCD(_lcd) ((_lcd) << 16) + +#define DSS_DISPC_IRQSTATUS_FRAMEDONE (1u << 0) +#define DSS_DISPC_IRQSTATUS_FRAMEDONE2 (1u << 22) + +#define DSS_DSS_SYSSTATUS_RESETDONE (1u << 0) + +#endif /* H_BAREBOX_DRIVER_VIDEO_O4_REGS_H */ diff --git a/drivers/video/stm.c b/drivers/video/stm.c index 606e39a253..d5212f8a12 100644 --- a/drivers/video/stm.c +++ b/drivers/video/stm.c @@ -24,8 +24,9 @@ #include <errno.h> #include <xfuncs.h> #include <io.h> +#include <linux/clk.h> +#include <linux/err.h> #include <mach/imx-regs.h> -#include <mach/clock.h> #include <mach/fb.h> #define HW_LCDIF_CTRL 0x00 @@ -144,6 +145,7 @@ struct imxfb_info { struct fb_info info; struct device_d *hw_dev; struct imx_fb_platformdata *pdata; + struct clk *clk; }; /* the RGB565 true colour mode */ @@ -327,7 +329,7 @@ static int stmfb_activate_var(struct fb_info *fb_info) /** @todo ensure HCLK is active at this point of time! */ - size = imx_set_lcdifclk(PICOS2KHZ(mode->pixclock) * 1000); + size = clk_set_rate(fbi->clk, PICOS2KHZ(mode->pixclock) * 1000); if (size == 0) { dev_dbg(fbi->hw_dev, "Unable to set a valid pixel clock\n"); return -EINVAL; @@ -490,6 +492,9 @@ static int stmfb_probe(struct device_d *hw_dev) fbi.hw_dev = hw_dev; fbi.base = dev_request_mem_region(hw_dev, 0); fbi.pdata = pdata; + fbi.clk = clk_get(hw_dev, NULL); + if (IS_ERR(fbi.clk)) + return PTR_ERR(fbi.clk); /* add runtime video info */ fbi.info.mode_list = pdata->mode_list; @@ -38,10 +38,21 @@ void *read_file(const char *filename, size_t *size) int fd; struct stat s; void *buf = NULL; + const char *tmpfile = "/.read_file_tmp"; + int ret; +again: if (stat(filename, &s)) return NULL; + if (s.st_size == FILESIZE_MAX) { + ret = copy_file(filename, tmpfile, 0); + if (ret) + return NULL; + filename = tmpfile; + goto again; + } + buf = xzalloc(s.st_size + 1); fd = open(filename, O_RDONLY); @@ -56,12 +67,19 @@ void *read_file(const char *filename, size_t *size) if (size) *size = s.st_size; + if (filename == tmpfile) + unlink(tmpfile); + return buf; err_out1: close(fd); err_out: free(buf); + + if (filename == tmpfile) + unlink(tmpfile); + return NULL; } @@ -598,7 +598,10 @@ static int tftp_stat(struct device_d *dev, const char *filename, struct stat *s) return PTR_ERR(priv); s->st_mode = S_IFREG | S_IRWXU | S_IRWXG | S_IRWXO; - s->st_size = priv->filesize; + if (priv->filesize) + s->st_size = priv->filesize; + else + s->st_size = FILESIZE_MAX; tftp_do_close(priv); diff --git a/images/Makefile b/images/Makefile new file mode 100644 index 0000000000..925a98793b --- /dev/null +++ b/images/Makefile @@ -0,0 +1,124 @@ +# +# barebox image generation Makefile +# +# This Makefile generates multiple images from a common barebox image +# and different pbl (pre bootloader) images. Optionally the result is +# encapsulated in SoC (or SoC boot type) specific image formats. +# +# The basic idea here is that we generate a single barebox main binary. This +# is compressed and prepended with a self extractor, generated as barebox.x. +# barebox.x is then prepended with different board specific pbls. The pbls +# are generally named after their entrypoints. So a pcm038 specific pbl will +# generate the following files: +# +# start_imx27_pcm038.pbl - The ELF file, linked with the entrypoint start_imx27_pcm038 +# start_imx27_pcm038.pblb - The raw binary of the above. +# start_imx27_pcm038.pblx - The pblb appended with barebox.x +# start_imx27_pcm038.pbl.map - The linker map file +# start_imx27_pcm038.pbl.s - the disassembled ELF, generated with: +# make images/start_imx27_pcm038.pbl.s +# +# Example Makefile snippets for the i.MX51 babbage board (for readability in opposite +# order): +# +## image-$(CONFIG_MACH_FREESCALE_MX51_PDK) += barebox-imx51-babbage.img +# +# For CONFIG_MACH_FREESCALE_MX51_PDK build barebox-imx51-babbage.img +# +## FILE_barebox-imx51-babbage.img = start_imx51_babbage.pblx.imximg +# +# barebox-imx51-babbage.img should be generated (copied) from +# start_imx51_babbage.pblx.imximg. This copy process is only done so that we +# can generate images with a sane name. So what we really need for this +# board is a i.MX specific image, a .imximg +# +## imximage-$(CONFIG_MACH_FREESCALE_MX51_PDK) += start_imx51_babbage.pblx.imximg +## CFG_start_imx51_babbage.pblx.imximg = $(board)/freescale-mx51-pdk/flash-header.imxcfg +# +# The .imximg can be generated from a .pblx using a rule specified in Makefile.imx. +# The configfile needed for this image is specified with CFG_<filename> = <configfile> +# +## pblx-$(CONFIG_MACH_FREESCALE_MX51_PDK) += start_imx51_babbage +# +# For this image we need a pblx (self extracting barebox binary) with +# start_imx51_babbage as entrypoint. start_imx51_babbage will be used +# both as entrypoint and as filename +# + +quiet_cmd_objcopy_bin = OBJCOPYB $@ + cmd_objcopy_bin = $(OBJCOPY) -O binary $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $< $@ + +pbl-lds := $(obj)/pbl.lds +extra-y += $(pbl-lds) + +$(pbl-lds): $(obj)/../arch/$(ARCH)/lib/pbl.lds.S FORCE + $(call if_changed_dep,cpp_lds_S) + +quiet_cmd_elf__ ?= LD $@ + cmd_elf__ ?= $(LD) $(LDFLAGS) -static --gc-sections -pie \ + -e $(2) -Map $@.map $(LDFLAGS_$(@F)) -o $@ \ + -T $(pbl-lds) \ + --start-group $(barebox-pbl-common) --end-group + +PBL_CPPFLAGS += -fdata-sections -ffunction-sections + +$(obj)/%.pbl: $(pbl-lds) $(barebox-pbl-common) FORCE + $(call if_changed,elf__,$(*F)) + +$(obj)/%.pblb: $(obj)/%.pbl FORCE + $(call if_changed,objcopy_bin,$(*F)) + +quiet_cmd_pblx ?= PBLX $@ + cmd_pblx ?= cat $(obj)/$(patsubst %.pblx,%.pblb,$(2)) > $@; \ + $(call size_append, $(obj)/barebox.x) >> $@; \ + cat $(obj)/barebox.x >> $@ + +$(obj)/%.pblx: $(obj)/%.pblb $(obj)/barebox.x FORCE + $(call if_changed,pblx,$(@F)) + +$(obj)/%.s: $(obj)/% FORCE + $(call if_changed,disasm) + +suffix_$(CONFIG_IMAGE_COMPRESSION_GZIP) = gzip +suffix_$(CONFIG_IMAGE_COMPRESSION_LZO) = lzo +suffix_$(CONFIG_IMAGE_COMPRESSION_NONE) = shipped + +# barebox.z - compressed barebox binary +# ---------------------------------------------------------------- +$(obj)/barebox.z: $(obj)/../barebox.bin FORCE + $(call if_changed,$(suffix_y)) + +quiet_cmd_selfextract = COMP $@ + cmd_selfextract = cat $(obj)/start_uncompress.pblb > $@; \ + $(call size_append, $<) >> $@; \ + cat $< >> $@ + +pblx-y += start_uncompress +# barebox.x - self extracting barebox binary +# ---------------------------------------------------------------- +$(obj)/barebox.x: $(obj)/barebox.z $(obj)/start_uncompress.pblb FORCE + $(call if_changed,selfextract) + +# %.img - create a copy from another file +# ---------------------------------------------------------------- +.SECONDEXPANSION: +$(obj)/%.img: $(obj)/$$(FILE_$$(@F)) + $(Q)if [ -z $(FILE_$(@F)) ]; then echo "FILE_$(@F) empty!"; false; fi + $(call if_changed,shipped) + +include $(srctree)/images/Makefile.imx + +targets += $(image-y) pbl.lds barebox.x barebox.z +targets += $(patsubst %,%.pblx,$(pblx-y)) +targets += $(patsubst %,%.pblb,$(pblx-y)) +targets += $(patsubst %,%.pbl,$(pblx-y)) +targets += $(patsubst %,%.s,$(pblx-y)) +targets += $(imximage-y) + +SECONDARY: $(addprefix $(obj)/,$(targets)) + +images: $(addprefix $(obj)/, $(image-y)) FORCE + @echo "images built:\n" $(patsubst %,%\\n,$(image-y)) + +clean-files := *.pbl *.pblb *.pblx *.map start_*.imximg *.img barebox.z +clean-files += pbl.lds diff --git a/images/Makefile.imx b/images/Makefile.imx new file mode 100644 index 0000000000..63347297eb --- /dev/null +++ b/images/Makefile.imx @@ -0,0 +1,15 @@ +# +# barebox image generation Makefile for i.MX images +# + +# %.imximg - convert into i.MX image +# ---------------------------------------------------------------- +$(obj)/%.imximg: $(obj)/% FORCE + $(call if_changed,imx_image) + +board = $(srctree)/arch/$(ARCH)/boards + +# ----------------------- i.MX27 based boards --------------------------- +pblx-$(CONFIG_MACH_PCM038) += start_imx27_pcm038 +FILE_barebox-phytec-phycore-imx27.img = start_imx27_pcm038.pblx +image-$(CONFIG_MACH_PCM038) += barebox-phytec-phycore-imx27.img diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h index 5492aa4d98..984f8b606b 100644 --- a/include/asm-generic/sections.h +++ b/include/asm-generic/sections.h @@ -6,6 +6,7 @@ extern char __bss_start[], __bss_stop[]; extern char _sdata[], _edata[]; extern char __bare_init_start[], __bare_init_end[]; extern char _end[]; +extern char __image_end[]; extern void *_barebox_image_size; extern void *_barebox_bare_init_size; extern void *_barebox_pbl_size; diff --git a/include/ata_drive.h b/include/ata_drive.h index 049082f0ca..6d6cca43bf 100644 --- a/include/ata_drive.h +++ b/include/ata_drive.h @@ -55,6 +55,50 @@ #define ATA_DEVCTL_SOFT_RESET (1 << 2) #define ATA_DEVCTL_INTR_DISABLE (1 << 1) +#define ata_id_u32(id,n) \ + (((uint32_t) (id)[(n) + 1] << 16) | ((uint32_t) (id)[(n)])) +#define ata_id_u64(id,n) \ + ( ((uint64_t) (id)[(n) + 3] << 48) | \ + ((uint64_t) (id)[(n) + 2] << 32) | \ + ((uint64_t) (id)[(n) + 1] << 16) | \ + ((uint64_t) (id)[(n) + 0]) ) + +#define ata_id_has_lba(id) ((id)[49] & (1 << 9)) + +enum { + ATA_ID_SERNO = 10, +#define ATA_ID_SERNO_LEN 20 + ATA_ID_FW_REV = 23, +#define ATA_ID_FW_REV_LEN 8 + ATA_ID_PROD = 27, +#define ATA_ID_PROD_LEN 40 + ATA_ID_CAPABILITY = 49, + ATA_ID_FIELD_VALID = 53, + ATA_ID_LBA_CAPACITY = 60, + ATA_ID_MWDMA_MODES = 63, + ATA_ID_PIO_MODES = 64, + ATA_ID_QUEUE_DEPTH = 75, + ATA_ID_MAJOR_VER = 80, + ATA_ID_COMMAND_SET_1 = 82, + ATA_ID_COMMAND_SET_2 = 83, + ATA_ID_CFSSE = 84, + ATA_ID_CFS_ENABLE_1 = 85, + ATA_ID_CFS_ENABLE_2 = 86, + ATA_ID_CSF_DEFAULT = 87, + ATA_ID_UDMA_MODES = 88, + ATA_ID_HW_CONFIG = 93, + ATA_ID_LBA_CAPACITY_2 = 100, +}; + +static inline int ata_id_has_lba48(const uint16_t *id) +{ + if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000) + return 0; + if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2)) + return 0; + return id[ATA_ID_COMMAND_SET_2] & (1 << 10); +} + /** addresses of each individual IDE drive register */ struct ata_ioports { void __iomem *cmd_addr; @@ -91,6 +135,7 @@ struct ata_port { struct ata_port_operations *ops; struct device_d *dev; struct device_d class_dev; + const char *devname; void *drvdata; struct block_device blk; uint16_t *id; @@ -98,8 +143,14 @@ struct ata_port { int probe; }; -int ide_port_register(struct device_d *, struct ata_ioports *); +struct ide_port { + struct ata_ioports io; /**< register file */ + struct ata_port port; +}; + +int ide_port_register(struct ide_port *ide); int ata_port_register(struct ata_port *port); +int ata_port_detect(struct ata_port *port); struct device_d; diff --git a/include/boot.h b/include/boot.h index 971a40390a..ccce8e1a42 100644 --- a/include/boot.h +++ b/include/boot.h @@ -41,11 +41,15 @@ struct image_data { unsigned long initrd_address; + char *oftree_file; + int oftree_num; + struct device_node *of_root_node; struct fdt_header *oftree; int verify; int verbose; + int force; }; struct image_handler { @@ -88,4 +92,8 @@ static inline int linux_bootargs_overwrite(const char *bootargs) } #endif +#define UIMAGE_SOME_ADDRESS (UIMAGE_INVALID_ADDRESS - 1) + +int bootm_boot(struct image_data *); + #endif /* __BOOT_H */ diff --git a/include/common.h b/include/common.h index 59fcd35ac1..744b19ea7b 100644 --- a/include/common.h +++ b/include/common.h @@ -182,8 +182,9 @@ int run_shell(void); #define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); })) #define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:-!!(e); })) -#define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1) -#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) +#define ALIGN(x, a) __ALIGN_MASK(x, (typeof(x))(a) - 1) +#define __ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask)) +#define ALIGN_DOWN(x, a) ((x) & ~((typeof(x))(a) - 1)) #define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a))) #define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0) @@ -233,6 +234,8 @@ void barebox_banner(void); static inline void barebox_banner(void) {} #endif +const char *barebox_boardinfo(void); + #define IOMEM(addr) ((void __force __iomem *)(addr)) #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) diff --git a/include/ddr_spd.h b/include/ddr_spd.h new file mode 100644 index 0000000000..c8762a28df --- /dev/null +++ b/include/ddr_spd.h @@ -0,0 +1,135 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + */ + +#ifndef _DDR_SPD_H_ +#define _DDR_SPD_H_ + +/* + * Format from "JEDEC Appendix X: Serial Presence Detects for DDR2 SDRAM", + * SPD Revision 1.2 + */ +struct ddr2_spd_eeprom_s { + uint8_t info_size; /* 0 # bytes written into serial memory */ + uint8_t chip_size; /* 1 Total # bytes of SPD memory device */ + uint8_t mem_type; /* 2 Fundamental memory type */ + uint8_t nrow_addr; /* 3 # of Row Addresses on this assembly */ + uint8_t ncol_addr; /* 4 # of Column Addrs on this assembly */ + uint8_t mod_ranks; /* 5 Number of DIMM Ranks */ + uint8_t dataw; /* 6 Module Data Width */ + uint8_t res_7; /* 7 Reserved */ + uint8_t voltage; /* 8 Voltage intf std of this assembly */ + uint8_t clk_cycle; /* 9 SDRAM Cycle time @ CL=X */ + uint8_t clk_access; /* 10 SDRAM Access from Clk @ CL=X (tAC) */ + uint8_t config; /* 11 DIMM Configuration type */ + uint8_t refresh; /* 12 Refresh Rate/Type */ + uint8_t primw; /* 13 Primary SDRAM Width */ + uint8_t ecw; /* 14 Error Checking SDRAM width */ + uint8_t res_15; /* 15 Reserved */ + uint8_t burstl; /* 16 Burst Lengths Supported */ + uint8_t nbanks; /* 17 # of Banks on Each SDRAM Device */ + uint8_t cas_lat; /* 18 CAS# Latencies Supported */ + uint8_t mech_char; /* 19 DIMM Mechanical Characteristics */ + uint8_t dimm_type; /* 20 DIMM type information */ + uint8_t mod_attr; /* 21 SDRAM Module Attributes */ + uint8_t dev_attr; /* 22 SDRAM Device Attributes */ + uint8_t clk_cycle2; /* 23 Min SDRAM Cycle time @ CL=X-1 */ + uint8_t clk_access2; /* 24 SDRAM Access from Clk @ CL=X-1 (tAC) */ + uint8_t clk_cycle3; /* 25 Min SDRAM Cycle time @ CL=X-2 */ + uint8_t clk_access3; /* 26 Max Access from Clk @ CL=X-2 (tAC) */ + uint8_t trp; /* 27 Min Row Precharge Time (tRP)*/ + uint8_t trrd; /* 28 Min Row Active to Row Active (tRRD) */ + uint8_t trcd; /* 29 Min RAS to CAS Delay (tRCD) */ + uint8_t tras; /* 30 Minimum RAS Pulse Width (tRAS) */ + uint8_t rank_dens; /* 31 Density of each rank on module */ + uint8_t ca_setup; /* 32 Addr+Cmd Setup Time Before Clk (tIS) */ + uint8_t ca_hold; /* 33 Addr+Cmd Hold Time After Clk (tIH) */ + uint8_t data_setup; /* 34 Data Input Setup Time Before Strobe + (tDS) */ + uint8_t data_hold; /* 35 Data Input Hold Time + After Strobe (tDH) */ + uint8_t twr; /* 36 Write Recovery time tWR */ + uint8_t twtr; /* 37 Int write to read delay tWTR */ + uint8_t trtp; /* 38 Int read to precharge delay tRTP */ + uint8_t mem_probe; /* 39 Mem analysis probe characteristics */ + uint8_t trctrfc_ext; /* 40 Extensions to trc and trfc */ + uint8_t trc; /* 41 Min Active to Auto refresh time tRC */ + uint8_t trfc; /* 42 Min Auto to Active period tRFC */ + uint8_t tckmax; /* 43 Max device cycle time tCKmax */ + uint8_t tdqsq; /* 44 Max DQS to DQ skew (tDQSQ max) */ + uint8_t tqhs; /* 45 Max Read DataHold skew (tQHS) */ + uint8_t pll_relock; /* 46 PLL Relock time */ + uint8_t Tcasemax; /* 47 Tcasemax */ + uint8_t psiTAdram; /* 48 Thermal Resistance of DRAM Package + from Top (Case) to Ambient + (Psi T-A DRAM) */ + uint8_t dt0_mode; /* 49 DRAM Case Temperature Rise from + Ambient due to Activate-Precharge/Mode + Bits (DT0/Mode Bits) */ + uint8_t dt2n_dt2q; /* 50 DRAM Case Temperature Rise from + Ambient due to Precharge/Quiet Standby + (DT2N/DT2Q) */ + uint8_t dt2p; /* 51 DRAM Case Temperature Rise from + Ambient due to Precharge Power-Down + (DT2P) */ + uint8_t dt3n; /* 52 DRAM Case Temperature Rise from + Ambient due to Active Standby (DT3N) */ + uint8_t dt3pfast; /* 53 DRAM Case Temperature Rise from + Ambient due to Active Power-Down with + Fast PDN Exit (DT3Pfast) */ + uint8_t dt3pslow; /* 54 DRAM Case Temperature Rise from + Ambient due to Active Power-Down with + Slow PDN Exit (DT3Pslow) */ + uint8_t dt4r_dt4r4w; /* 55 DRAM Case Temperature Rise from + Ambient due to Page Open Burst + Read/DT4R4W Mode Bit + (DT4R/DT4R4W Mode Bit) */ + uint8_t dt5b; /* 56 DRAM Case Temperature Rise from + Ambient due to Burst Refresh (DT5B) */ + uint8_t dt7; /* 57 DRAM Case Temperature Rise from + Ambient due to Bank Interleave Reads + with Auto-Precharge (DT7) */ + uint8_t psiTApll; /* 58 Thermal Resistance of PLL Package + form Top (Case) to Ambient + (Psi T-A PLL) */ + uint8_t psiTAreg; /* 59 Thermal Reisitance of Register + Package from Top (Case) to Ambient + (Psi T-A Register) */ + uint8_t dtpllactive; /* 60 PLL Case Temperature Rise from + Ambient due to PLL Active + (DT PLL Active) */ + uint8_t dtregact; /* 61 Register Case Temperature Rise from + Ambient due to Register Active/Mode + Bit (DT Register Active/Mode Bit) */ + uint8_t spd_rev; /* 62 SPD Data Revision Code */ + uint8_t cksum; /* 63 Checksum for bytes 0-62 */ + uint8_t mid[8]; /* 64 Mfr's JEDEC ID code per JEP-106 */ + uint8_t mloc; /* 72 Manufacturing Location */ + uint8_t mpart[18]; /* 73 Manufacturer's Part Number */ + uint8_t rev[2]; /* 91 Revision Code */ + uint8_t mdate[2]; /* 93 Manufacturing Date */ + uint8_t sernum[4]; /* 95 Assembly Serial Number */ + uint8_t mspec[27]; /* 99-127 Manufacturer Specific Data */ + +}; + +extern uint32_t ddr2_spd_checksum_pass(const struct ddr2_spd_eeprom_s *spd); + +/* * Byte 2 Fundamental Memory Types. */ +#define SPD_MEMTYPE_DDR2 (0x08) + +/* DIMM Type for DDR2 SPD (according to v1.3) */ +#define DDR2_SPD_DIMMTYPE_RDIMM (0x01) +#define DDR2_SPD_DIMMTYPE_UDIMM (0x02) +#define DDR2_SPD_DIMMTYPE_SO_DIMM (0x04) +#define DDR2_SPD_DIMMTYPE_72B_SO_CDIMM (0x06) +#define DDR2_SPD_DIMMTYPE_72B_SO_RDIMM (0x07) +#define DDR2_SPD_DIMMTYPE_MICRO_DIMM (0x08) +#define DDR2_SPD_DIMMTYPE_MINI_RDIMM (0x10) +#define DDR2_SPD_DIMMTYPE_MINI_UDIMM (0x20) + +#endif /* _DDR_SPD_H_ */ diff --git a/include/driver.h b/include/driver.h index 8b3af4de26..b18318fe0c 100644 --- a/include/driver.h +++ b/include/driver.h @@ -159,6 +159,7 @@ int device_probe(struct device_d *dev); /* detect devices attached to this device (cards, disks,...) */ int device_detect(struct device_d *dev); +int device_detect_by_name(const char *devname); /* Unregister a device. This function can fail, e.g. when the device * has children. diff --git a/include/fs.h b/include/fs.h index 7c4e46175a..22c07467da 100644 --- a/include/fs.h +++ b/include/fs.h @@ -149,6 +149,8 @@ int protect(int fd, size_t count, unsigned long offset, int prot); int protect_file(const char *file, int prot); void *memmap(int fd, int flags); +#define FILESIZE_MAX ((loff_t)-1) + #define PROT_READ 1 #define PROT_WRITE 2 diff --git a/include/linux/clk.h b/include/linux/clk.h index 37a4813ba5..38832ba942 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -188,8 +188,23 @@ struct clk_div_table { }; struct clk *clk_fixed(const char *name, int rate); + +struct clk_divider { + struct clk clk; + u8 shift; + u8 width; + void __iomem *reg; + const char *parent; +#define CLK_DIVIDER_ONE_BASED (1 << 0) + unsigned flags; +}; + +extern struct clk_ops clk_divider_ops; + struct clk *clk_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width); +struct clk *clk_divider_one_based(const char *name, const char *parent, + void __iomem *reg, u8 shift, u8 width); struct clk *clk_divider_table(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width, const struct clk_div_table *table); @@ -199,6 +214,9 @@ struct clk *clk_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char **parents, u8 num_parents); struct clk *clk_gate(const char *name, const char *parent, void __iomem *reg, u8 shift); +struct clk *clk_gate_inverted(const char *name, const char *parent, void __iomem *reg, + u8 shift); +int clk_is_enabled(struct clk *clk); int clk_is_enabled_always(struct clk *clk); diff --git a/include/mci.h b/include/mci.h index bca374a8bf..1ca00c70f7 100644 --- a/include/mci.h +++ b/include/mci.h @@ -44,22 +44,17 @@ #define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30) #define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40) -#define MMC_MODE_HS 0x001 -#define MMC_MODE_HS_52MHz 0x010 -#define MMC_CAP_SPI 0x020 -#define MMC_MODE_4BIT 0x100 -#define MMC_MODE_8BIT 0x200 +#define MMC_CAP_SPI (1 << 0) +#define MMC_CAP_4_BIT_DATA (1 << 1) +#define MMC_CAP_8_BIT_DATA (1 << 2) +#define MMC_CAP_SD_HIGHSPEED (1 << 3) +#define MMC_CAP_MMC_HIGHSPEED (1 << 4) +#define MMC_CAP_MMC_HIGHSPEED_52MHZ (1 << 5) #define SD_DATA_4BIT 0x00040000 #define IS_SD(x) (x->version & SD_VERSION_SD) -#ifdef CONFIG_MCI_SPI -#define mmc_host_is_spi(host) ((host)->host_caps & MMC_CAP_SPI) -#else -#define mmc_host_is_spi(host) 0 -#endif - #define MMC_DATA_READ 1 #define MMC_DATA_WRITE 2 @@ -341,7 +336,7 @@ struct mci { unsigned csd[4]; /**< card's "card specific data register" */ unsigned cid[4]; /**< card's "card identification register" */ unsigned short rca; /* FIXME */ - unsigned tran_speed; /**< not yet used */ + unsigned tran_speed; /**< Maximum transfer speed */ /** currently used data block length for read accesses */ unsigned read_bl_len; /** currently used data block length for write accesses */ @@ -366,4 +361,12 @@ int mci_register(struct mci_host*); void mci_of_parse(struct mci_host *host); int mci_detect_card(struct mci_host *); +static inline int mmc_host_is_spi(struct mci_host *host) +{ + if (IS_ENABLED(CONFIG_MCI_SPI)) + return host->host_caps & MMC_CAP_SPI; + else + return 0; +} + #endif /* _MCI_H_ */ diff --git a/include/memtest.h b/include/memtest.h new file mode 100644 index 0000000000..a337be832f --- /dev/null +++ b/include/memtest.h @@ -0,0 +1,14 @@ +#ifndef __MEMTEST_H +#define __MEMTEST_H + +#include <linux/ioport.h> + +struct mem_test_resource { + struct resource *r; + struct list_head list; +}; + +int mem_test(resource_size_t _start, + resource_size_t _end, int bus_only); + +#endif /* __MEMTEST_H */ diff --git a/include/mfd/mc34708.h b/include/mfd/mc34708.h index f384c62a8a..541c47ff0e 100644 --- a/include/mfd/mc34708.h +++ b/include/mfd/mc34708.h @@ -93,7 +93,14 @@ struct mc34708 { unsigned int revision; }; -extern struct mc34708 *mc34708_get(void); +#ifdef CONFIG_MFD_MC34708 +struct mc34708 *mc34708_get(void); +#else +static inline struct mc34708 *mc34708_get(void) +{ + return NULL; +} +#endif extern int mc34708_reg_read(struct mc34708 *mc34708, enum mc34708_reg reg, u32 *val); extern int mc34708_reg_write(struct mc34708 *mc34708, enum mc34708_reg reg, u32 val); diff --git a/include/net.h b/include/net.h index fa3c05a987..a4cfec7123 100644 --- a/include/net.h +++ b/include/net.h @@ -52,6 +52,7 @@ struct eth_device { struct device_d dev; struct device_d *parent; + char *nodepath; struct list_head list; diff --git a/include/readkey.h b/include/readkey.h index f134846af6..2793f3f70b 100644 --- a/include/readkey.h +++ b/include/readkey.h @@ -28,7 +28,7 @@ #define printf_reverse(fmt,args...) printf("\e[7m" fmt "\e[m",##args) #define puts_reverse(fmt) puts("\e[7m" fmt "\e[m") -#define gotoXY(row, col) printf("\e[%d;%dH", row, col) +#define gotoXY(row, col) printf("\e[%d;%dH", col, row) #define clear() puts("\e[2J") int read_key(void); diff --git a/include/stdio.h b/include/stdio.h index 5c091a8eab..71dbae35ca 100644 --- a/include/stdio.h +++ b/include/stdio.h @@ -70,7 +70,7 @@ static inline int ctrlc (void) { return 0; } -#endif /* ARCH_HAS_CTRC */ +#endif /* ARCH_HAS_CTRLC */ #endif @@ -101,7 +101,6 @@ static inline void putchar(char c) int fprintf(int file, const char *fmt, ...) __attribute__ ((format(__printf__, 2, 3))); int fputs(int file, const char *s); int fputc(int file, const char c); -int ftstc(int file); int fgetc(int file); #endif /* __STDIO_H */ diff --git a/include/usb/usb.h b/include/usb/usb.h index da0090e039..95fb6f3a3b 100644 --- a/include/usb/usb.h +++ b/include/usb/usb.h @@ -211,10 +211,13 @@ struct usb_host { struct list_head list; int busnum; + int scanned; }; int usb_register_host(struct usb_host *); +int usb_host_detect(struct usb_host *host, int force); + /* Defines */ #define USB_UHCI_VEND_ID 0x8086 #define USB_UHCI_DEV_ID 0x7112 @@ -248,7 +251,7 @@ int usb_clear_halt(struct usb_device *dev, int pipe); int usb_string(struct usb_device *dev, int index, char *buf, size_t size); int usb_set_interface(struct usb_device *dev, int interface, int alternate); -void usb_rescan(void); +void usb_rescan(int force); /* big endian -> little endian conversion */ /* some CPUs are already little endian e.g. the ARM920T */ diff --git a/lib/process_escape_sequence.c b/lib/process_escape_sequence.c index 7cc3898d5c..612976b9d4 100644 --- a/lib/process_escape_sequence.c +++ b/lib/process_escape_sequence.c @@ -54,7 +54,7 @@ int process_escape_sequence(const char *source, char *dest, int destlen) dest[i++] = 0x1b; break; case 'h': - i += snprintf(dest + i, destlen - i, "%s", CONFIG_BOARDINFO); + i += snprintf(dest + i, destlen - i, "%s", barebox_boardinfo()); break; case 'w': i += snprintf(dest + i, destlen - i, "%s", getcwd()); @@ -273,6 +273,52 @@ static int eth_set_ethaddr(struct device_d *dev, struct param_d *param, const ch return 0; } +#ifdef CONFIG_OFDEVICE +static int eth_of_fixup(struct device_node *root) +{ + struct eth_device *edev; + struct device_node *node; + int ret; + + /* + * Add the mac-address property for each network device we + * find a nodepath for and which has a valid mac address. + */ + list_for_each_entry(edev, &netdev_list, list) { + if (!edev->nodepath) { + dev_dbg(&edev->dev, "%s: no node to fixup\n", __func__); + continue; + } + + if (!is_valid_ether_addr(edev->ethaddr)) { + dev_dbg(&edev->dev, "%s: no valid mac address, cannot fixup\n", + __func__); + continue; + } + + node = of_find_node_by_path(edev->nodepath); + if (!node) { + dev_dbg(&edev->dev, "%s: fixup node %s not found\n", + __func__, edev->nodepath); + continue; + } + + ret = of_set_property(node, "mac-address", edev->ethaddr, 6, 1); + if (ret) + pr_err("Setting mac-address property of %s failed with: %s\n", + node->full_name, strerror(-ret)); + } + + return 0; +} + +static int eth_register_of_fixup(void) +{ + return of_register_fixup(eth_of_fixup); +} +late_initcall(eth_register_of_fixup); +#endif + int eth_register(struct eth_device *edev) { struct device_d *dev = &edev->dev; @@ -316,6 +362,10 @@ int eth_register(struct eth_device *edev) if (found) register_preset_mac_address(edev, ethaddr); + if (IS_ENABLED(CONFIG_OFDEVICE) && edev->parent && + edev->parent->device_node) + edev->nodepath = xstrdup(edev->parent->device_node->full_name); + if (!eth_current) eth_current = edev; @@ -328,6 +378,10 @@ void eth_unregister(struct eth_device *edev) eth_current = NULL; dev_remove_parameters(&edev->dev); + + if (IS_ENABLED(CONFIG_OFDEVICE) && edev->nodepath) + free(edev->nodepath); + unregister_device(&edev->dev); list_del(&edev->list); } diff --git a/pbl/Kconfig b/pbl/Kconfig index 5c7f62eefe..a37c97610a 100644 --- a/pbl/Kconfig +++ b/pbl/Kconfig @@ -1,6 +1,9 @@ config HAVE_PBL_IMAGE bool +config HAVE_PBL_MULTI_IMAGES + bool + config HAVE_IMAGE_COMPRESSION bool @@ -8,6 +11,19 @@ config PBL_IMAGE bool "Pre-Bootloader image" depends on HAVE_PBL_IMAGE +config PBL_MULTI_IMAGES + bool + select PBL_IMAGE + select PBL_RELOCATABLE + depends on HAVE_PBL_MULTI_IMAGES + default y + +config PBL_SINGLE_IMAGE + bool + depends on PBL_IMAGE + depends on !HAVE_PBL_MULTI_IMAGES + default y + config PBL_FORCE_PIGGYDATA_COPY bool help diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 0b56dcc218..307412f8d7 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -329,4 +329,4 @@ $(obj)/%.S: $(obj)/%.dcd $(call cmd,imximage_S_dcd) quiet_cmd_imx_image = IMX-IMG $@ - cmd_imx_image = $(obj)/scripts/imx/imx-image -b -c $(CFG_$(@F)) -f $< -o $@ + cmd_imx_image = $(objtree)/scripts/imx/imx-image -b -c $(CFG_$(@F)) -f $< -o $@ diff --git a/scripts/imx/imx-usb-loader.c b/scripts/imx/imx-usb-loader.c index d58b1da3bd..7ccfc99360 100644 --- a/scripts/imx/imx-usb-loader.c +++ b/scripts/imx/imx-usb-loader.c @@ -92,7 +92,14 @@ struct mach_id imx_ids[] = { }, { .vid = 0x15a2, .pid = 0x0054, - .name = "i.MX6", + .name = "i.MX6q", + .header_type = HDR_MX53, + .mode = MODE_HID, + .max_transfer = 1024, + }, { + .vid = 0x15a2, + .pid = 0x0061, + .name = "i.MX6dl/s", .header_type = HDR_MX53, .mode = MODE_HID, .max_transfer = 1024, diff --git a/scripts/kconfig/.gitignore b/scripts/kconfig/.gitignore index 9cd51202ac..be603c4fef 100644 --- a/scripts/kconfig/.gitignore +++ b/scripts/kconfig/.gitignore @@ -2,13 +2,11 @@ # Generated files # config* -lex.*.c *.lex.c *.tab.c *.tab.h zconf.hash.c *.moc -lkc_defs.h gconf.glade.h *.pot *.mo diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile index ba573fe7c7..844bc9da08 100644 --- a/scripts/kconfig/Makefile +++ b/scripts/kconfig/Makefile @@ -11,6 +11,9 @@ else Kconfig := Kconfig endif +# We need this, in case the user has it in its environment +unexport CONFIG_ + xconfig: $(obj)/qconf $< $(Kconfig) @@ -50,9 +53,8 @@ localyesconfig localmodconfig: $(obj)/streamline_config.pl $(obj)/conf # Create new linux.pot file # Adjust charset to UTF-8 in .po file to accept UTF-8 in Kconfig files -# The symlink is used to repair a deficiency in arch/um update-po-config: $(obj)/kxgettext $(obj)/gconf.glade.h - $(Q)echo " GEN config" + $(Q)echo " GEN config.pot" $(Q)xgettext --default-domain=linux \ --add-comments --keyword=_ --keyword=N_ \ --from-code=UTF-8 \ @@ -60,16 +62,16 @@ update-po-config: $(obj)/kxgettext $(obj)/gconf.glade.h --directory=$(srctree) --directory=$(objtree) \ --output $(obj)/config.pot $(Q)sed -i s/CHARSET/UTF-8/ $(obj)/config.pot - $(Q)ln -fs Kconfig.x86 arch/um/Kconfig - $(Q)(for i in `ls $(srctree)/arch/*/Kconfig`; \ + $(Q)(for i in `ls $(srctree)/arch/*/Kconfig \ + $(srctree)/arch/*/um/Kconfig`; \ do \ - echo " GEN $$i"; \ + echo " GEN $$i"; \ $(obj)/kxgettext $$i \ >> $(obj)/config.pot; \ done ) + $(Q)echo " GEN linux.pot" $(Q)msguniq --sort-by-file --to-code=UTF-8 $(obj)/config.pot \ --output $(obj)/linux.pot - $(Q)rm -f $(srctree)/arch/um/Kconfig $(Q)rm -f $(obj)/config.pot PHONY += allnoconfig allyesconfig allmodconfig alldefconfig randconfig @@ -77,11 +79,17 @@ PHONY += allnoconfig allyesconfig allmodconfig alldefconfig randconfig allnoconfig allyesconfig allmodconfig alldefconfig randconfig: $(obj)/conf $< --$@ $(Kconfig) -PHONY += listnewconfig oldnoconfig savedefconfig defconfig +PHONY += listnewconfig olddefconfig oldnoconfig savedefconfig defconfig -listnewconfig oldnoconfig: $(obj)/conf +listnewconfig olddefconfig: $(obj)/conf $< --$@ $(Kconfig) +# oldnoconfig is an alias of olddefconfig, because people already are dependent +# on its behavior(sets new symbols to their default value but not 'n') with the +# counter-intuitive name. +oldnoconfig: $(obj)/conf + $< --olddefconfig $(Kconfig) + savedefconfig: $(obj)/conf $< --$@=defconfig $(Kconfig) @@ -115,7 +123,7 @@ help: @echo ' alldefconfig - New config with all symbols set to default' @echo ' randconfig - New config with random answer to all options' @echo ' listnewconfig - List new options' - @echo ' oldnoconfig - Same as silentoldconfig but set new symbols to n (unset)' + @echo ' olddefconfig - Same as silentoldconfig but sets new symbols to their default value' # lxdialog stuff check-lxdialog := $(srctree)/$(src)/lxdialog/check-lxdialog.sh @@ -211,7 +219,9 @@ HOSTCFLAGS_gconf.o = `pkg-config --cflags gtk+-2.0 gmodule-2.0 libglade-2.0` \ HOSTLOADLIBES_mconf = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC)) -HOSTLOADLIBES_nconf = -lmenu -lpanel -lncurses +HOSTLOADLIBES_nconf = $(shell \ + pkg-config --libs menu panel ncurses 2>/dev/null \ + || echo "-lmenu -lpanel -lncurses" ) $(obj)/qconf.o: $(obj)/.tmp_qtcheck ifeq ($(qconf-target),1) @@ -235,12 +245,12 @@ $(obj)/.tmp_qtcheck: if [ -f $$d/include/qconfig.h ]; then dir=$$d; break; fi; \ done; \ if [ -z "$$dir" ]; then \ - echo "*"; \ - echo "* Unable to find any QT installation. Please make sure that"; \ - echo "* the QT4 or QT3 development package is correctly installed and"; \ - echo "* either qmake can be found or install pkg-config or set"; \ - echo "* the QTDIR environment variable to the correct location."; \ - echo "*"; \ + echo >&2 "*"; \ + echo >&2 "* Unable to find any QT installation. Please make sure that"; \ + echo >&2 "* the QT4 or QT3 development package is correctly installed and"; \ + echo >&2 "* either qmake can be found or install pkg-config or set"; \ + echo >&2 "* the QTDIR environment variable to the correct location."; \ + echo >&2 "*"; \ false; \ fi; \ libpath=$$dir/lib; lib=qt; osdir=""; \ @@ -261,8 +271,8 @@ $(obj)/.tmp_qtcheck: else \ cflags="\$$(shell pkg-config QtCore QtGui Qt3Support --cflags)"; \ libs="\$$(shell pkg-config QtCore QtGui Qt3Support --libs)"; \ - binpath="\$$(shell pkg-config QtCore --variable=prefix)"; \ - moc="$$binpath/bin/moc"; \ + moc="\$$(shell pkg-config QtCore --variable=moc_location)"; \ + [ -n "$$moc" ] || moc="\$$(shell pkg-config QtCore --variable=prefix)/bin/moc"; \ fi; \ echo "KC_QT_CFLAGS=$$cflags" > $@; \ echo "KC_QT_LIBS=$$libs" >> $@; \ @@ -280,17 +290,17 @@ $(obj)/.tmp_gtkcheck: if `pkg-config --atleast-version=2.0.0 gtk+-2.0`; then \ touch $@; \ else \ - echo "*"; \ - echo "* GTK+ is present but version >= 2.0.0 is required."; \ - echo "*"; \ + echo >&2 "*"; \ + echo >&2 "* GTK+ is present but version >= 2.0.0 is required."; \ + echo >&2 "*"; \ false; \ fi \ else \ - echo "*"; \ - echo "* Unable to find the GTK+ installation. Please make sure that"; \ - echo "* the GTK+ 2.0 development package is correctly installed..."; \ - echo "* You need gtk+-2.0, glib-2.0 and libglade-2.0."; \ - echo "*"; \ + echo >&2 "*"; \ + echo >&2 "* Unable to find the GTK+ installation. Please make sure that"; \ + echo >&2 "* the GTK+ 2.0 development package is correctly installed..."; \ + echo >&2 "* You need gtk+-2.0, glib-2.0 and libglade-2.0."; \ + echo >&2 "*"; \ false; \ fi endif @@ -299,8 +309,11 @@ $(obj)/zconf.tab.o: $(obj)/zconf.lex.c $(obj)/zconf.hash.c $(obj)/qconf.o: $(obj)/qconf.moc -$(obj)/%.moc: $(src)/%.h - $(KC_QT_MOC) -i $< -o $@ +quiet_cmd_moc = MOC $@ + cmd_moc = $(KC_QT_MOC) -i $< -o $@ + +$(obj)/%.moc: $(src)/%.h $(obj)/.tmp_qtcheck + $(call cmd,moc) # Extract gconf menu items for I18N support $(obj)/gconf.glade.h: $(obj)/gconf.glade diff --git a/scripts/kconfig/check.sh b/scripts/kconfig/check.sh index fa59cbf9d6..854d9c7c67 100755 --- a/scripts/kconfig/check.sh +++ b/scripts/kconfig/check.sh @@ -1,6 +1,6 @@ #!/bin/sh # Needed for systems without gettext -$* -xc -o /dev/null - > /dev/null 2>&1 << EOF +$* -x c -o /dev/null - > /dev/null 2>&1 << EOF #include <libintl.h> int main() { diff --git a/scripts/kconfig/conf.c b/scripts/kconfig/conf.c index f208f900ed..bde5b95c8c 100644 --- a/scripts/kconfig/conf.c +++ b/scripts/kconfig/conf.c @@ -13,6 +13,7 @@ #include <getopt.h> #include <sys/stat.h> #include <sys/time.h> +#include <errno.h> #include "lkc.h" @@ -32,10 +33,11 @@ enum input_mode { defconfig, savedefconfig, listnewconfig, - oldnoconfig, + olddefconfig, } input_mode = oldaskconfig; static int indent = 1; +static int tty_stdio; static int valid_stdin = 1; static int sync_kconfig; static int conf_cnt; @@ -108,6 +110,8 @@ static int conf_askvalue(struct symbol *sym, const char *def) case oldaskconfig: fflush(stdout); xfgets(line, 128, stdin); + if (!tty_stdio) + printf("\n"); return 1; default: break; @@ -365,7 +369,7 @@ static void conf(struct menu *menu) case P_MENU: if ((input_mode == silentoldconfig || input_mode == listnewconfig || - input_mode == oldnoconfig) && + input_mode == olddefconfig) && rootEntry != menu) { check_conf(menu); return; @@ -429,7 +433,7 @@ static void check_conf(struct menu *menu) if (sym->name && !sym_is_choice_value(sym)) { printf("%s%s\n", CONFIG_, sym->name); } - } else if (input_mode != oldnoconfig) { + } else if (input_mode != olddefconfig) { if (!conf_cnt++) printf(_("*\n* Restart config...\n*\n")); rootEntry = menu_get_parent_menu(menu); @@ -454,7 +458,13 @@ static struct option long_opts[] = { {"alldefconfig", no_argument, NULL, alldefconfig}, {"randconfig", no_argument, NULL, randconfig}, {"listnewconfig", no_argument, NULL, listnewconfig}, - {"oldnoconfig", no_argument, NULL, oldnoconfig}, + {"olddefconfig", no_argument, NULL, olddefconfig}, + /* + * oldnoconfig is an alias of olddefconfig, because people already + * are dependent on its behavior(sets new symbols to their default + * value but not 'n') with the counter-intuitive name. + */ + {"oldnoconfig", no_argument, NULL, olddefconfig}, {NULL, 0, NULL, 0} }; @@ -467,7 +477,8 @@ static void conf_usage(const char *progname) printf(" --oldaskconfig Start a new configuration using a line-oriented program\n"); printf(" --oldconfig Update a configuration using a provided .config as base\n"); printf(" --silentoldconfig Same as oldconfig, but quietly, additionally update deps\n"); - printf(" --oldnoconfig Same as silentoldconfig but set new symbols to no\n"); + printf(" --olddefconfig Same as silentoldconfig but sets new symbols to their default value\n"); + printf(" --oldnoconfig An alias of olddefconfig\n"); printf(" --defconfig <file> New config with default defined in <file>\n"); printf(" --savedefconfig <file> Save the minimal current configuration to <file>\n"); printf(" --allnoconfig New config where all options are answered with no\n"); @@ -488,6 +499,8 @@ int main(int ac, char **av) bindtextdomain(PACKAGE, LOCALEDIR); textdomain(PACKAGE); + tty_stdio = isatty(0) && isatty(1) && isatty(2); + while ((opt = getopt_long(ac, av, "", long_opts, NULL)) != -1) { input_mode = (enum input_mode)opt; switch (opt) { @@ -502,14 +515,23 @@ int main(int ac, char **av) { struct timeval now; unsigned int seed; + char *seed_env; /* * Use microseconds derived seed, * compensate for systems where it may be zero */ gettimeofday(&now, NULL); - seed = (unsigned int)((now.tv_sec + 1) * (now.tv_usec + 1)); + + seed_env = getenv("KCONFIG_SEED"); + if( seed_env && *seed_env ) { + char *endp; + int tmp = (int)strtol(seed_env, &endp, 10); + if (*endp == '\0') { + seed = tmp; + } + } srand(seed); break; } @@ -520,7 +542,7 @@ int main(int ac, char **av) case allmodconfig: case alldefconfig: case listnewconfig: - case oldnoconfig: + case olddefconfig: break; case '?': conf_usage(progname); @@ -565,7 +587,7 @@ int main(int ac, char **av) case oldaskconfig: case oldconfig: case listnewconfig: - case oldnoconfig: + case olddefconfig: conf_read(NULL); break; case allnoconfig: @@ -574,8 +596,15 @@ int main(int ac, char **av) case alldefconfig: case randconfig: name = getenv("KCONFIG_ALLCONFIG"); - if (name && !stat(name, &tmpstat)) { - conf_read_simple(name, S_DEF_USER); + if (!name) + break; + if ((strcmp(name, "") != 0) && (strcmp(name, "1") != 0)) { + if (conf_read_simple(name, S_DEF_USER)) { + fprintf(stderr, + _("*** Can't read seed configuration \"%s\"!\n"), + name); + exit(1); + } break; } switch (input_mode) { @@ -586,10 +615,13 @@ int main(int ac, char **av) case randconfig: name = "allrandom.config"; break; default: break; } - if (!stat(name, &tmpstat)) - conf_read_simple(name, S_DEF_USER); - else if (!stat("all.config", &tmpstat)) - conf_read_simple("all.config", S_DEF_USER); + if (conf_read_simple(name, S_DEF_USER) && + conf_read_simple("all.config", S_DEF_USER)) { + fprintf(stderr, + _("*** KCONFIG_ALLCONFIG set, but no \"%s\" or \"all.config\" file found\n"), + name); + exit(1); + } break; default: break; @@ -604,7 +636,7 @@ int main(int ac, char **av) return 1; } } - valid_stdin = isatty(0) && isatty(1) && isatty(2); + valid_stdin = tty_stdio; } switch (input_mode) { @@ -635,7 +667,7 @@ int main(int ac, char **av) /* fall through */ case oldconfig: case listnewconfig: - case oldnoconfig: + case olddefconfig: case silentoldconfig: /* Update until a loop caused no more changes */ do { @@ -643,7 +675,7 @@ int main(int ac, char **av) check_conf(&rootmenu); } while (conf_cnt && (input_mode != listnewconfig && - input_mode != oldnoconfig)); + input_mode != olddefconfig)); break; } diff --git a/scripts/kconfig/confdata.c b/scripts/kconfig/confdata.c index 5a58965d88..43eda40c38 100644 --- a/scripts/kconfig/confdata.c +++ b/scripts/kconfig/confdata.c @@ -182,10 +182,66 @@ static int conf_set_sym_val(struct symbol *sym, int def, int def_flags, char *p) return 0; } +#define LINE_GROWTH 16 +static int add_byte(int c, char **lineptr, size_t slen, size_t *n) +{ + char *nline; + size_t new_size = slen + 1; + if (new_size > *n) { + new_size += LINE_GROWTH - 1; + new_size *= 2; + nline = realloc(*lineptr, new_size); + if (!nline) + return -1; + + *lineptr = nline; + *n = new_size; + } + + (*lineptr)[slen] = c; + + return 0; +} + +static ssize_t compat_getline(char **lineptr, size_t *n, FILE *stream) +{ + char *line = *lineptr; + size_t slen = 0; + + for (;;) { + int c = getc(stream); + + switch (c) { + case '\n': + if (add_byte(c, &line, slen, n) < 0) + goto e_out; + slen++; + /* fall through */ + case EOF: + if (add_byte('\0', &line, slen, n) < 0) + goto e_out; + *lineptr = line; + if (slen == 0) + return -1; + return slen; + default: + if (add_byte(c, &line, slen, n) < 0) + goto e_out; + slen++; + } + } + +e_out: + line[slen-1] = '\0'; + *lineptr = line; + return -1; +} + int conf_read_simple(const char *name, int def) { FILE *in = NULL; - char line[1024]; + char *line = NULL; + size_t line_asize = 0; char *p, *p2; struct symbol *sym; int i, def_flags; @@ -247,7 +303,7 @@ load: } } - while (fgets(line, sizeof(line), in)) { + while (compat_getline(&line, &line_asize, in) != -1) { conf_lineno++; sym = NULL; if (line[0] == '#') { @@ -335,6 +391,7 @@ setsym: cs->def[def].tri = EXPR_OR(cs->def[def].tri, sym->def[def].tri); } } + free(line); fclose(in); if (modules_sym) @@ -344,10 +401,8 @@ setsym: int conf_read(const char *name) { - struct symbol *sym, *choice_sym; - struct property *prop; - struct expr *e; - int i, flags; + struct symbol *sym; + int i; sym_set_change_count(0); @@ -357,7 +412,7 @@ int conf_read(const char *name) for_all_symbols(i, sym) { sym_calc_value(sym); if (sym_is_choice(sym) || (sym->flags & SYMBOL_AUTO)) - goto sym_ok; + continue; if (sym_has_value(sym) && (sym->flags & SYMBOL_WRITE)) { /* check that calculated value agrees with saved value */ switch (sym->type) { @@ -366,30 +421,18 @@ int conf_read(const char *name) if (sym->def[S_DEF_USER].tri != sym_get_tristate_value(sym)) break; if (!sym_is_choice(sym)) - goto sym_ok; + continue; /* fall through */ default: if (!strcmp(sym->curr.val, sym->def[S_DEF_USER].val)) - goto sym_ok; + continue; break; } } else if (!sym_has_value(sym) && !(sym->flags & SYMBOL_WRITE)) /* no previous value and not saved */ - goto sym_ok; + continue; conf_unsaved++; /* maybe print value in verbose mode... */ - sym_ok: - if (!sym_is_choice(sym)) - continue; - /* The choice symbol only has a set value (and thus is not new) - * if all its visible childs have values. - */ - prop = sym_get_choice_prop(sym); - flags = sym->flags; - expr_list_for_each_sym(prop->expr, e, choice_sym) - if (choice_sym->visible != no) - flags &= choice_sym->flags; - sym->flags &= flags | ~SYMBOL_DEF_USER; } for_all_symbols(i, sym) { @@ -464,7 +507,7 @@ kconfig_print_comment(FILE *fp, const char *value, void *arg) fprintf(fp, "#"); if (l) { fprintf(fp, " "); - fwrite(p, l, 1, fp); + xfwrite(p, l, 1, fp); p += l; } fprintf(fp, "\n"); @@ -537,7 +580,7 @@ header_print_comment(FILE *fp, const char *value, void *arg) fprintf(fp, " *"); if (l) { fprintf(fp, " "); - fwrite(p, l, 1, fp); + xfwrite(p, l, 1, fp); p += l; } fprintf(fp, "\n"); @@ -554,35 +597,6 @@ static struct conf_printer header_printer_cb = }; /* - * Generate the __enabled_CONFIG_* and __enabled_CONFIG_*_MODULE macros for - * use by the IS_{ENABLED,BUILTIN,MODULE} macros. The _MODULE variant is - * generated even for booleans so that the IS_ENABLED() macro works. - */ -static void -header_print__enabled_symbol(FILE *fp, struct symbol *sym, const char *value, void *arg) -{ - - switch (sym->type) { - case S_BOOLEAN: - case S_TRISTATE: { - fprintf(fp, "#define __enabled_" CONFIG_ "%s %d\n", - sym->name, (*value == 'y')); - fprintf(fp, "#define __enabled_" CONFIG_ "%s_MODULE %d\n", - sym->name, (*value == 'm')); - break; - } - default: - break; - } -} - -static struct conf_printer header__enabled_printer_cb = -{ - .print_symbol = header_print__enabled_symbol, - .print_comment = header_print_comment, -}; - -/* * Tristate printer * * This printer is used when generating the `include/config/tristate.conf' file. @@ -963,16 +977,11 @@ int conf_write_autoconf(void) conf_write_heading(out_h, &header_printer_cb, NULL); for_all_symbols(i, sym) { - if (!sym->name) - continue; - sym_calc_value(sym); - - conf_write_symbol(out_h, sym, &header__enabled_printer_cb, NULL); - - if (!(sym->flags & SYMBOL_WRITE)) + if (!(sym->flags & SYMBOL_WRITE) || !sym->name) continue; + /* write symbol to auto.conf, tristate and header files */ conf_write_symbol(out, sym, &kconfig_printer_cb, (void *)1); conf_write_symbol(tristate, sym, &tristate_printer_cb, (void *)1); @@ -1097,10 +1106,54 @@ static void set_all_choice_values(struct symbol *csym) void conf_set_all_new_symbols(enum conf_def_mode mode) { struct symbol *sym, *csym; - int i, cnt; + int i, cnt, pby, pty, ptm; /* pby: probability of boolean = y + * pty: probability of tristate = y + * ptm: probability of tristate = m + */ + + pby = 50; pty = ptm = 33; /* can't go as the default in switch-case + * below, otherwise gcc whines about + * -Wmaybe-uninitialized */ + if (mode == def_random) { + int n, p[3]; + char *env = getenv("KCONFIG_PROBABILITY"); + n = 0; + while( env && *env ) { + char *endp; + int tmp = strtol( env, &endp, 10 ); + if( tmp >= 0 && tmp <= 100 ) { + p[n++] = tmp; + } else { + errno = ERANGE; + perror( "KCONFIG_PROBABILITY" ); + exit( 1 ); + } + env = (*endp == ':') ? endp+1 : endp; + if( n >=3 ) { + break; + } + } + switch( n ) { + case 1: + pby = p[0]; ptm = pby/2; pty = pby-ptm; + break; + case 2: + pty = p[0]; ptm = p[1]; pby = pty + ptm; + break; + case 3: + pby = p[0]; pty = p[1]; ptm = p[2]; + break; + } + + if( pty+ptm > 100 ) { + errno = ERANGE; + perror( "KCONFIG_PROBABILITY" ); + exit( 1 ); + } + } for_all_symbols(i, sym) { - if (sym_has_value(sym)) + if (sym_has_value(sym) || (sym->flags & SYMBOL_VALID)) continue; switch (sym_get_type(sym)) { case S_BOOLEAN: @@ -1116,8 +1169,15 @@ void conf_set_all_new_symbols(enum conf_def_mode mode) sym->def[S_DEF_USER].tri = no; break; case def_random: - cnt = sym_get_type(sym) == S_TRISTATE ? 3 : 2; - sym->def[S_DEF_USER].tri = (tristate)(rand() % cnt); + sym->def[S_DEF_USER].tri = no; + cnt = rand() % 100; + if (sym->type == S_TRISTATE) { + if (cnt < pty) + sym->def[S_DEF_USER].tri = yes; + else if (cnt < (pty+ptm)) + sym->def[S_DEF_USER].tri = mod; + } else if (cnt < pby) + sym->def[S_DEF_USER].tri = yes; break; default: continue; diff --git a/scripts/kconfig/expr.c b/scripts/kconfig/expr.c index 290ce41f8b..d6626521f9 100644 --- a/scripts/kconfig/expr.c +++ b/scripts/kconfig/expr.c @@ -13,7 +13,7 @@ struct expr *expr_alloc_symbol(struct symbol *sym) { - struct expr *e = calloc(1, sizeof(*e)); + struct expr *e = xcalloc(1, sizeof(*e)); e->type = E_SYMBOL; e->left.sym = sym; return e; @@ -21,7 +21,7 @@ struct expr *expr_alloc_symbol(struct symbol *sym) struct expr *expr_alloc_one(enum expr_type type, struct expr *ce) { - struct expr *e = calloc(1, sizeof(*e)); + struct expr *e = xcalloc(1, sizeof(*e)); e->type = type; e->left.expr = ce; return e; @@ -29,7 +29,7 @@ struct expr *expr_alloc_one(enum expr_type type, struct expr *ce) struct expr *expr_alloc_two(enum expr_type type, struct expr *e1, struct expr *e2) { - struct expr *e = calloc(1, sizeof(*e)); + struct expr *e = xcalloc(1, sizeof(*e)); e->type = type; e->left.expr = e1; e->right.expr = e2; @@ -38,7 +38,7 @@ struct expr *expr_alloc_two(enum expr_type type, struct expr *e1, struct expr *e struct expr *expr_alloc_comp(enum expr_type type, struct symbol *s1, struct symbol *s2) { - struct expr *e = calloc(1, sizeof(*e)); + struct expr *e = xcalloc(1, sizeof(*e)); e->type = type; e->left.sym = s1; e->right.sym = s2; @@ -66,7 +66,7 @@ struct expr *expr_copy(const struct expr *org) if (!org) return NULL; - e = malloc(sizeof(*org)); + e = xmalloc(sizeof(*org)); memcpy(e, org, sizeof(*org)); switch (org->type) { case E_SYMBOL: diff --git a/scripts/kconfig/expr.h b/scripts/kconfig/expr.h index 80fce57080..cdd48600e0 100644 --- a/scripts/kconfig/expr.h +++ b/scripts/kconfig/expr.h @@ -10,7 +10,9 @@ extern "C" { #endif +#include <assert.h> #include <stdio.h> +#include "list.h" #ifndef __cplusplus #include <stdbool.h> #endif @@ -172,6 +174,15 @@ struct menu { #define MENU_CHANGED 0x0001 #define MENU_ROOT 0x0002 +struct jump_key { + struct list_head entries; + size_t offset; + struct menu *target; + int index; +}; + +#define JUMP_NB 9 + extern struct file *file_list; extern struct file *current_file; struct file *lookup_file(const char *name); diff --git a/scripts/kconfig/gconf.c b/scripts/kconfig/gconf.c index 9f4438027d..f2bee70e26 100644 --- a/scripts/kconfig/gconf.c +++ b/scripts/kconfig/gconf.c @@ -10,6 +10,7 @@ # include <config.h> #endif +#include <stdlib.h> #include "lkc.h" #include "images.c" @@ -22,7 +23,6 @@ #include <string.h> #include <unistd.h> #include <time.h> -#include <stdlib.h> //#define DEBUG @@ -683,7 +683,7 @@ void on_introduction1_activate(GtkMenuItem * menuitem, gpointer user_data) dialog = gtk_message_dialog_new(GTK_WINDOW(main_wnd), GTK_DIALOG_DESTROY_WITH_PARENT, GTK_MESSAGE_INFO, - GTK_BUTTONS_CLOSE, intro_text); + GTK_BUTTONS_CLOSE, "%s", intro_text); g_signal_connect_swapped(GTK_OBJECT(dialog), "response", G_CALLBACK(gtk_widget_destroy), GTK_OBJECT(dialog)); @@ -701,7 +701,7 @@ void on_about1_activate(GtkMenuItem * menuitem, gpointer user_data) dialog = gtk_message_dialog_new(GTK_WINDOW(main_wnd), GTK_DIALOG_DESTROY_WITH_PARENT, GTK_MESSAGE_INFO, - GTK_BUTTONS_CLOSE, about_text); + GTK_BUTTONS_CLOSE, "%s", about_text); g_signal_connect_swapped(GTK_OBJECT(dialog), "response", G_CALLBACK(gtk_widget_destroy), GTK_OBJECT(dialog)); @@ -720,7 +720,7 @@ void on_license1_activate(GtkMenuItem * menuitem, gpointer user_data) dialog = gtk_message_dialog_new(GTK_WINDOW(main_wnd), GTK_DIALOG_DESTROY_WITH_PARENT, GTK_MESSAGE_INFO, - GTK_BUTTONS_CLOSE, license_text); + GTK_BUTTONS_CLOSE, "%s", license_text); g_signal_connect_swapped(GTK_OBJECT(dialog), "response", G_CALLBACK(gtk_widget_destroy), GTK_OBJECT(dialog)); @@ -830,7 +830,7 @@ static void renderer_edited(GtkCellRendererText * cell, static void change_sym_value(struct menu *menu, gint col) { struct symbol *sym = menu->sym; - tristate oldval, newval; + tristate newval; if (!sym) return; @@ -847,7 +847,6 @@ static void change_sym_value(struct menu *menu, gint col) switch (sym_get_type(sym)) { case S_BOOLEAN: case S_TRISTATE: - oldval = sym_get_tristate_value(sym); if (!sym_tristate_within_range(sym, newval)) newval = yes; sym_set_tristate_value(sym, newval); @@ -1278,7 +1277,6 @@ static void update_tree(struct menu *src, GtkTreeIter * dst) gboolean valid; GtkTreeIter *sibling; struct symbol *sym; - struct property *prop; struct menu *menu1, *menu2; if (src == &rootmenu) @@ -1287,7 +1285,6 @@ static void update_tree(struct menu *src, GtkTreeIter * dst) valid = gtk_tree_model_iter_children(model2, child2, dst); for (child1 = src->list; child1; child1 = child1->next) { - prop = child1->prompt; sym = child1->sym; reparse: diff --git a/scripts/kconfig/kconfig_load.c b/scripts/kconfig/kconfig_load.c deleted file mode 100644 index dbdcaad823..0000000000 --- a/scripts/kconfig/kconfig_load.c +++ /dev/null @@ -1,35 +0,0 @@ -#include <dlfcn.h> -#include <stdio.h> -#include <stdlib.h> - -#include "lkc.h" - -#define P(name,type,arg) type (*name ## _p) arg -#include "lkc_proto.h" -#undef P - -void kconfig_load(void) -{ - void *handle; - char *error; - - handle = dlopen("./libkconfig.so", RTLD_LAZY); - if (!handle) { - handle = dlopen("./scripts/kconfig/libkconfig.so", RTLD_LAZY); - if (!handle) { - fprintf(stderr, "%s\n", dlerror()); - exit(1); - } - } - -#define P(name,type,arg) \ -{ \ - name ## _p = dlsym(handle, #name); \ - if ((error = dlerror())) { \ - fprintf(stderr, "%s\n", error); \ - exit(1); \ - } \ -} -#include "lkc_proto.h" -#undef P -} diff --git a/scripts/kconfig/lex.zconf.c_shipped b/scripts/kconfig/lex.zconf.c_shipped deleted file mode 100644 index 3c11bed3de..0000000000 --- a/scripts/kconfig/lex.zconf.c_shipped +++ /dev/null @@ -1,2430 +0,0 @@ - -#line 3 "scripts/kconfig/lex.zconf.c" - -#define YY_INT_ALIGNED short int - -/* A lexical scanner generated by flex */ - -#define yy_create_buffer zconf_create_buffer -#define yy_delete_buffer zconf_delete_buffer -#define yy_flex_debug zconf_flex_debug -#define yy_init_buffer zconf_init_buffer -#define yy_flush_buffer zconf_flush_buffer -#define yy_load_buffer_state zconf_load_buffer_state -#define yy_switch_to_buffer zconf_switch_to_buffer -#define yyin zconfin -#define yyleng zconfleng -#define yylex zconflex -#define yylineno zconflineno -#define yyout zconfout -#define yyrestart zconfrestart -#define yytext zconftext -#define yywrap zconfwrap -#define yyalloc zconfalloc -#define yyrealloc zconfrealloc -#define yyfree zconffree - -#define FLEX_SCANNER -#define YY_FLEX_MAJOR_VERSION 2 -#define YY_FLEX_MINOR_VERSION 5 -#define YY_FLEX_SUBMINOR_VERSION 35 -#if YY_FLEX_SUBMINOR_VERSION > 0 -#define FLEX_BETA -#endif - -/* First, we deal with platform-specific or compiler-specific issues. */ - -/* begin standard C headers. */ -#include <stdio.h> -#include <string.h> -#include <errno.h> -#include <stdlib.h> - -/* end standard C headers. */ - -/* flex integer type definitions */ - -#ifndef FLEXINT_H -#define FLEXINT_H - -/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */ - -#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L - -/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, - * if you want the limit (max/min) macros for int types. - */ -#ifndef __STDC_LIMIT_MACROS -#define __STDC_LIMIT_MACROS 1 -#endif - -#include <inttypes.h> -typedef int8_t flex_int8_t; -typedef uint8_t flex_uint8_t; -typedef int16_t flex_int16_t; -typedef uint16_t flex_uint16_t; -typedef int32_t flex_int32_t; -typedef uint32_t flex_uint32_t; -#else -typedef signed char flex_int8_t; -typedef short int flex_int16_t; -typedef int flex_int32_t; -typedef unsigned char flex_uint8_t; -typedef unsigned short int flex_uint16_t; -typedef unsigned int flex_uint32_t; - -/* Limits of integral types. */ -#ifndef INT8_MIN -#define INT8_MIN (-128) -#endif -#ifndef INT16_MIN -#define INT16_MIN (-32767-1) -#endif -#ifndef INT32_MIN -#define INT32_MIN (-2147483647-1) -#endif -#ifndef INT8_MAX -#define INT8_MAX (127) -#endif -#ifndef INT16_MAX -#define INT16_MAX (32767) -#endif -#ifndef INT32_MAX -#define INT32_MAX (2147483647) -#endif -#ifndef UINT8_MAX -#define UINT8_MAX (255U) -#endif -#ifndef UINT16_MAX -#define UINT16_MAX (65535U) -#endif -#ifndef UINT32_MAX -#define UINT32_MAX (4294967295U) -#endif - -#endif /* ! C99 */ - -#endif /* ! FLEXINT_H */ - -#ifdef __cplusplus - -/* The "const" storage-class-modifier is valid. */ -#define YY_USE_CONST - -#else /* ! __cplusplus */ - -/* C99 requires __STDC__ to be defined as 1. */ -#if defined (__STDC__) - -#define YY_USE_CONST - -#endif /* defined (__STDC__) */ -#endif /* ! __cplusplus */ - -#ifdef YY_USE_CONST -#define yyconst const -#else -#define yyconst -#endif - -/* Returned upon end-of-file. */ -#define YY_NULL 0 - -/* Promotes a possibly negative, possibly signed char to an unsigned - * integer for use as an array index. If the signed char is negative, - * we want to instead treat it as an 8-bit unsigned char, hence the - * double cast. - */ -#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) - -/* Enter a start condition. This macro really ought to take a parameter, - * but we do it the disgusting crufty way forced on us by the ()-less - * definition of BEGIN. - */ -#define BEGIN (yy_start) = 1 + 2 * - -/* Translate the current start state into a value that can be later handed - * to BEGIN to return to the state. The YYSTATE alias is for lex - * compatibility. - */ -#define YY_START (((yy_start) - 1) / 2) -#define YYSTATE YY_START - -/* Action number for EOF rule of a given start state. */ -#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) - -/* Special action meaning "start processing a new file". */ -#define YY_NEW_FILE zconfrestart(zconfin ) - -#define YY_END_OF_BUFFER_CHAR 0 - -/* Size of default input buffer. */ -#ifndef YY_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k. - * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case. - * Ditto for the __ia64__ case accordingly. - */ -#define YY_BUF_SIZE 32768 -#else -#define YY_BUF_SIZE 16384 -#endif /* __ia64__ */ -#endif - -/* The state buf must be large enough to hold one state per character in the main buffer. - */ -#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) - -#ifndef YY_TYPEDEF_YY_BUFFER_STATE -#define YY_TYPEDEF_YY_BUFFER_STATE -typedef struct yy_buffer_state *YY_BUFFER_STATE; -#endif - -extern int zconfleng; - -extern FILE *zconfin, *zconfout; - -#define EOB_ACT_CONTINUE_SCAN 0 -#define EOB_ACT_END_OF_FILE 1 -#define EOB_ACT_LAST_MATCH 2 - - #define YY_LESS_LINENO(n) - -/* Return all but the first "n" matched characters back to the input stream. */ -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up zconftext. */ \ - int yyless_macro_arg = (n); \ - YY_LESS_LINENO(yyless_macro_arg);\ - *yy_cp = (yy_hold_char); \ - YY_RESTORE_YY_MORE_OFFSET \ - (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ - YY_DO_BEFORE_ACTION; /* set up zconftext again */ \ - } \ - while ( 0 ) - -#define unput(c) yyunput( c, (yytext_ptr) ) - -#ifndef YY_TYPEDEF_YY_SIZE_T -#define YY_TYPEDEF_YY_SIZE_T -typedef size_t yy_size_t; -#endif - -#ifndef YY_STRUCT_YY_BUFFER_STATE -#define YY_STRUCT_YY_BUFFER_STATE -struct yy_buffer_state - { - FILE *yy_input_file; - - char *yy_ch_buf; /* input buffer */ - char *yy_buf_pos; /* current position in input buffer */ - - /* Size of input buffer in bytes, not including room for EOB - * characters. - */ - yy_size_t yy_buf_size; - - /* Number of characters read into yy_ch_buf, not including EOB - * characters. - */ - int yy_n_chars; - - /* Whether we "own" the buffer - i.e., we know we created it, - * and can realloc() it to grow it, and should free() it to - * delete it. - */ - int yy_is_our_buffer; - - /* Whether this is an "interactive" input source; if so, and - * if we're using stdio for input, then we want to use getc() - * instead of fread(), to make sure we stop fetching input after - * each newline. - */ - int yy_is_interactive; - - /* Whether we're considered to be at the beginning of a line. - * If so, '^' rules will be active on the next match, otherwise - * not. - */ - int yy_at_bol; - - int yy_bs_lineno; /**< The line count. */ - int yy_bs_column; /**< The column count. */ - - /* Whether to try to fill the input buffer when we reach the - * end of it. - */ - int yy_fill_buffer; - - int yy_buffer_status; - -#define YY_BUFFER_NEW 0 -#define YY_BUFFER_NORMAL 1 - /* When an EOF's been seen but there's still some text to process - * then we mark the buffer as YY_EOF_PENDING, to indicate that we - * shouldn't try reading from the input source any more. We might - * still have a bunch of tokens to match, though, because of - * possible backing-up. - * - * When we actually see the EOF, we change the status to "new" - * (via zconfrestart()), so that the user can continue scanning by - * just pointing zconfin at a new input file. - */ -#define YY_BUFFER_EOF_PENDING 2 - - }; -#endif /* !YY_STRUCT_YY_BUFFER_STATE */ - -/* Stack of input buffers. */ -static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ -static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ -static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ - -/* We provide macros for accessing buffer states in case in the - * future we want to put the buffer states in a more general - * "scanner state". - * - * Returns the top of the stack, or NULL. - */ -#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ - ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ - : NULL) - -/* Same as previous macro, but useful when we know that the buffer stack is not - * NULL or when we need an lvalue. For internal use only. - */ -#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] - -/* yy_hold_char holds the character lost when zconftext is formed. */ -static char yy_hold_char; -static int yy_n_chars; /* number of characters read into yy_ch_buf */ -int zconfleng; - -/* Points to current character in buffer. */ -static char *yy_c_buf_p = (char *) 0; -static int yy_init = 0; /* whether we need to initialize */ -static int yy_start = 0; /* start state number */ - -/* Flag which is used to allow zconfwrap()'s to do buffer switches - * instead of setting up a fresh zconfin. A bit of a hack ... - */ -static int yy_did_buffer_switch_on_eof; - -void zconfrestart (FILE *input_file ); -void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer ); -YY_BUFFER_STATE zconf_create_buffer (FILE *file,int size ); -void zconf_delete_buffer (YY_BUFFER_STATE b ); -void zconf_flush_buffer (YY_BUFFER_STATE b ); -void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer ); -void zconfpop_buffer_state (void ); - -static void zconfensure_buffer_stack (void ); -static void zconf_load_buffer_state (void ); -static void zconf_init_buffer (YY_BUFFER_STATE b,FILE *file ); - -#define YY_FLUSH_BUFFER zconf_flush_buffer(YY_CURRENT_BUFFER ) - -YY_BUFFER_STATE zconf_scan_buffer (char *base,yy_size_t size ); -YY_BUFFER_STATE zconf_scan_string (yyconst char *yy_str ); -YY_BUFFER_STATE zconf_scan_bytes (yyconst char *bytes,int len ); - -void *zconfalloc (yy_size_t ); -void *zconfrealloc (void *,yy_size_t ); -void zconffree (void * ); - -#define yy_new_buffer zconf_create_buffer - -#define yy_set_interactive(is_interactive) \ - { \ - if ( ! YY_CURRENT_BUFFER ){ \ - zconfensure_buffer_stack (); \ - YY_CURRENT_BUFFER_LVALUE = \ - zconf_create_buffer(zconfin,YY_BUF_SIZE ); \ - } \ - YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ - } - -#define yy_set_bol(at_bol) \ - { \ - if ( ! YY_CURRENT_BUFFER ){\ - zconfensure_buffer_stack (); \ - YY_CURRENT_BUFFER_LVALUE = \ - zconf_create_buffer(zconfin,YY_BUF_SIZE ); \ - } \ - YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ - } - -#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) - -/* Begin user sect3 */ - -#define zconfwrap(n) 1 -#define YY_SKIP_YYWRAP - -typedef unsigned char YY_CHAR; - -FILE *zconfin = (FILE *) 0, *zconfout = (FILE *) 0; - -typedef int yy_state_type; - -extern int zconflineno; - -int zconflineno = 1; - -extern char *zconftext; -#define yytext_ptr zconftext -static yyconst flex_int16_t yy_nxt[][17] = - { - { - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0 - }, - - { - 11, 12, 13, 14, 12, 12, 15, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 12 - }, - - { - 11, 12, 13, 14, 12, 12, 15, 12, 12, 12, - 12, 12, 12, 12, 12, 12, 12 - }, - - { - 11, 16, 16, 17, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 18, 16, 16, 16 - }, - - { - 11, 16, 16, 17, 16, 16, 16, 16, 16, 16, - 16, 16, 16, 18, 16, 16, 16 - - }, - - { - 11, 19, 20, 21, 19, 19, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19 - }, - - { - 11, 19, 20, 21, 19, 19, 19, 19, 19, 19, - 19, 19, 19, 19, 19, 19, 19 - }, - - { - 11, 22, 22, 23, 22, 24, 22, 22, 24, 22, - 22, 22, 22, 22, 22, 25, 22 - }, - - { - 11, 22, 22, 23, 22, 24, 22, 22, 24, 22, - 22, 22, 22, 22, 22, 25, 22 - }, - - { - 11, 26, 26, 27, 28, 29, 30, 31, 29, 32, - 33, 34, 35, 35, 36, 37, 38 - - }, - - { - 11, 26, 26, 27, 28, 29, 30, 31, 29, 32, - 33, 34, 35, 35, 36, 37, 38 - }, - - { - -11, -11, -11, -11, -11, -11, -11, -11, -11, -11, - -11, -11, -11, -11, -11, -11, -11 - }, - - { - 11, -12, -12, -12, -12, -12, -12, -12, -12, -12, - -12, -12, -12, -12, -12, -12, -12 - }, - - { - 11, -13, 39, 40, -13, -13, 41, -13, -13, -13, - -13, -13, -13, -13, -13, -13, -13 - }, - - { - 11, -14, -14, -14, -14, -14, -14, -14, -14, -14, - -14, -14, -14, -14, -14, -14, -14 - - }, - - { - 11, 42, 42, 43, 42, 42, 42, 42, 42, 42, - 42, 42, 42, 42, 42, 42, 42 - }, - - { - 11, -16, -16, -16, -16, -16, -16, -16, -16, -16, - -16, -16, -16, -16, -16, -16, -16 - }, - - { - 11, -17, -17, -17, -17, -17, -17, -17, -17, -17, - -17, -17, -17, -17, -17, -17, -17 - }, - - { - 11, -18, -18, -18, -18, -18, -18, -18, -18, -18, - -18, -18, -18, 44, -18, -18, -18 - }, - - { - 11, 45, 45, -19, 45, 45, 45, 45, 45, 45, - 45, 45, 45, 45, 45, 45, 45 - - }, - - { - 11, -20, 46, 47, -20, -20, -20, -20, -20, -20, - -20, -20, -20, -20, -20, -20, -20 - }, - - { - 11, 48, -21, -21, 48, 48, 48, 48, 48, 48, - 48, 48, 48, 48, 48, 48, 48 - }, - - { - 11, 49, 49, 50, 49, -22, 49, 49, -22, 49, - 49, 49, 49, 49, 49, -22, 49 - }, - - { - 11, -23, -23, -23, -23, -23, -23, -23, -23, -23, - -23, -23, -23, -23, -23, -23, -23 - }, - - { - 11, -24, -24, -24, -24, -24, -24, -24, -24, -24, - -24, -24, -24, -24, -24, -24, -24 - - }, - - { - 11, 51, 51, 52, 51, 51, 51, 51, 51, 51, - 51, 51, 51, 51, 51, 51, 51 - }, - - { - 11, -26, -26, -26, -26, -26, -26, -26, -26, -26, - -26, -26, -26, -26, -26, -26, -26 - }, - - { - 11, -27, -27, -27, -27, -27, -27, -27, -27, -27, - -27, -27, -27, -27, -27, -27, -27 - }, - - { - 11, -28, -28, -28, -28, -28, -28, -28, -28, -28, - -28, -28, -28, -28, 53, -28, -28 - }, - - { - 11, -29, -29, -29, -29, -29, -29, -29, -29, -29, - -29, -29, -29, -29, -29, -29, -29 - - }, - - { - 11, 54, 54, -30, 54, 54, 54, 54, 54, 54, - 54, 54, 54, 54, 54, 54, 54 - }, - - { - 11, -31, -31, -31, -31, -31, -31, 55, -31, -31, - -31, -31, -31, -31, -31, -31, -31 - }, - - { - 11, -32, -32, -32, -32, -32, -32, -32, -32, -32, - -32, -32, -32, -32, -32, -32, -32 - }, - - { - 11, -33, -33, -33, -33, -33, -33, -33, -33, -33, - -33, -33, -33, -33, -33, -33, -33 - }, - - { - 11, -34, -34, -34, -34, -34, -34, -34, -34, -34, - -34, 56, 57, 57, -34, -34, -34 - - }, - - { - 11, -35, -35, -35, -35, -35, -35, -35, -35, -35, - -35, 57, 57, 57, -35, -35, -35 - }, - - { - 11, -36, -36, -36, -36, -36, -36, -36, -36, -36, - -36, -36, -36, -36, -36, -36, -36 - }, - - { - 11, -37, -37, 58, -37, -37, -37, -37, -37, -37, - -37, -37, -37, -37, -37, -37, -37 - }, - - { - 11, -38, -38, -38, -38, -38, -38, -38, -38, -38, - -38, -38, -38, -38, -38, -38, 59 - }, - - { - 11, -39, 39, 40, -39, -39, 41, -39, -39, -39, - -39, -39, -39, -39, -39, -39, -39 - - }, - - { - 11, -40, -40, -40, -40, -40, -40, -40, -40, -40, - -40, -40, -40, -40, -40, -40, -40 - }, - - { - 11, 42, 42, 43, 42, 42, 42, 42, 42, 42, - 42, 42, 42, 42, 42, 42, 42 - }, - - { - 11, 42, 42, 43, 42, 42, 42, 42, 42, 42, - 42, 42, 42, 42, 42, 42, 42 - }, - - { - 11, -43, -43, -43, -43, -43, -43, -43, -43, -43, - -43, -43, -43, -43, -43, -43, -43 - }, - - { - 11, -44, -44, -44, -44, -44, -44, -44, -44, -44, - -44, -44, -44, 44, -44, -44, -44 - - }, - - { - 11, 45, 45, -45, 45, 45, 45, 45, 45, 45, - 45, 45, 45, 45, 45, 45, 45 - }, - - { - 11, -46, 46, 47, -46, -46, -46, -46, -46, -46, - -46, -46, -46, -46, -46, -46, -46 - }, - - { - 11, 48, -47, -47, 48, 48, 48, 48, 48, 48, - 48, 48, 48, 48, 48, 48, 48 - }, - - { - 11, -48, -48, -48, -48, -48, -48, -48, -48, -48, - -48, -48, -48, -48, -48, -48, -48 - }, - - { - 11, 49, 49, 50, 49, -49, 49, 49, -49, 49, - 49, 49, 49, 49, 49, -49, 49 - - }, - - { - 11, -50, -50, -50, -50, -50, -50, -50, -50, -50, - -50, -50, -50, -50, -50, -50, -50 - }, - - { - 11, -51, -51, 52, -51, -51, -51, -51, -51, -51, - -51, -51, -51, -51, -51, -51, -51 - }, - - { - 11, -52, -52, -52, -52, -52, -52, -52, -52, -52, - -52, -52, -52, -52, -52, -52, -52 - }, - - { - 11, -53, -53, -53, -53, -53, -53, -53, -53, -53, - -53, -53, -53, -53, -53, -53, -53 - }, - - { - 11, 54, 54, -54, 54, 54, 54, 54, 54, 54, - 54, 54, 54, 54, 54, 54, 54 - - }, - - { - 11, -55, -55, -55, -55, -55, -55, -55, -55, -55, - -55, -55, -55, -55, -55, -55, -55 - }, - - { - 11, -56, -56, -56, -56, -56, -56, -56, -56, -56, - -56, 60, 57, 57, -56, -56, -56 - }, - - { - 11, -57, -57, -57, -57, -57, -57, -57, -57, -57, - -57, 57, 57, 57, -57, -57, -57 - }, - - { - 11, -58, -58, -58, -58, -58, -58, -58, -58, -58, - -58, -58, -58, -58, -58, -58, -58 - }, - - { - 11, -59, -59, -59, -59, -59, -59, -59, -59, -59, - -59, -59, -59, -59, -59, -59, -59 - - }, - - { - 11, -60, -60, -60, -60, -60, -60, -60, -60, -60, - -60, 57, 57, 57, -60, -60, -60 - }, - - } ; - -static yy_state_type yy_get_previous_state (void ); -static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); -static int yy_get_next_buffer (void ); -static void yy_fatal_error (yyconst char msg[] ); - -/* Done after the current pattern has been matched and before the - * corresponding action - sets up zconftext. - */ -#define YY_DO_BEFORE_ACTION \ - (yytext_ptr) = yy_bp; \ - zconfleng = (size_t) (yy_cp - yy_bp); \ - (yy_hold_char) = *yy_cp; \ - *yy_cp = '\0'; \ - (yy_c_buf_p) = yy_cp; - -#define YY_NUM_RULES 33 -#define YY_END_OF_BUFFER 34 -/* This struct is not used in this scanner, - but its presence is necessary. */ -struct yy_trans_info - { - flex_int32_t yy_verify; - flex_int32_t yy_nxt; - }; -static yyconst flex_int16_t yy_accept[61] = - { 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 34, 5, 4, 2, 3, 7, 8, 6, 32, 29, - 31, 24, 28, 27, 26, 22, 17, 13, 16, 20, - 22, 11, 12, 19, 19, 14, 22, 22, 4, 2, - 3, 3, 1, 6, 32, 29, 31, 30, 24, 23, - 26, 25, 15, 20, 9, 19, 19, 21, 10, 18 - } ; - -static yyconst flex_int32_t yy_ec[256] = - { 0, - 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 2, 4, 5, 6, 1, 1, 7, 8, 9, - 10, 1, 1, 1, 11, 12, 12, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 1, 1, 1, - 14, 1, 1, 1, 13, 13, 13, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, - 1, 15, 1, 1, 13, 1, 13, 13, 13, 13, - - 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, - 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, - 13, 13, 1, 16, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1 - } ; - -extern int zconf_flex_debug; -int zconf_flex_debug = 0; - -/* The intent behind this definition is that it'll catch - * any uses of REJECT which flex missed. - */ -#define REJECT reject_used_but_not_detected -#define yymore() yymore_used_but_not_detected -#define YY_MORE_ADJ 0 -#define YY_RESTORE_YY_MORE_OFFSET -char *zconftext; -#define YY_NO_INPUT 1 - -/* - * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org> - * Released under the terms of the GNU GPL v2.0. - */ - -#include <limits.h> -#include <stdio.h> -#include <stdlib.h> -#include <string.h> -#include <unistd.h> - -#define LKC_DIRECT_LINK -#include "lkc.h" - -#define START_STRSIZE 16 - -static struct { - struct file *file; - int lineno; -} current_pos; - -static char *text; -static int text_size, text_asize; - -struct buffer { - struct buffer *parent; - YY_BUFFER_STATE state; -}; - -struct buffer *current_buf; - -static int last_ts, first_ts; - -static void zconf_endhelp(void); -static void zconf_endfile(void); - -static void new_string(void) -{ - text = malloc(START_STRSIZE); - text_asize = START_STRSIZE; - text_size = 0; - *text = 0; -} - -static void append_string(const char *str, int size) -{ - int new_size = text_size + size + 1; - if (new_size > text_asize) { - new_size += START_STRSIZE - 1; - new_size &= -START_STRSIZE; - text = realloc(text, new_size); - text_asize = new_size; - } - memcpy(text + text_size, str, size); - text_size += size; - text[text_size] = 0; -} - -static void alloc_string(const char *str, int size) -{ - text = malloc(size + 1); - memcpy(text, str, size); - text[size] = 0; -} - -#define INITIAL 0 -#define COMMAND 1 -#define HELP 2 -#define STRING 3 -#define PARAM 4 - -#ifndef YY_NO_UNISTD_H -/* Special case for "unistd.h", since it is non-ANSI. We include it way - * down here because we want the user's section 1 to have been scanned first. - * The user has a chance to override it with an option. - */ -#include <unistd.h> -#endif - -#ifndef YY_EXTRA_TYPE -#define YY_EXTRA_TYPE void * -#endif - -static int yy_init_globals (void ); - -/* Accessor methods to globals. - These are made visible to non-reentrant scanners for convenience. */ - -int zconflex_destroy (void ); - -int zconfget_debug (void ); - -void zconfset_debug (int debug_flag ); - -YY_EXTRA_TYPE zconfget_extra (void ); - -void zconfset_extra (YY_EXTRA_TYPE user_defined ); - -FILE *zconfget_in (void ); - -void zconfset_in (FILE * in_str ); - -FILE *zconfget_out (void ); - -void zconfset_out (FILE * out_str ); - -int zconfget_leng (void ); - -char *zconfget_text (void ); - -int zconfget_lineno (void ); - -void zconfset_lineno (int line_number ); - -/* Macros after this point can all be overridden by user definitions in - * section 1. - */ - -#ifndef YY_SKIP_YYWRAP -#ifdef __cplusplus -extern "C" int zconfwrap (void ); -#else -extern int zconfwrap (void ); -#endif -#endif - - static void yyunput (int c,char *buf_ptr ); - -#ifndef yytext_ptr -static void yy_flex_strncpy (char *,yyconst char *,int ); -#endif - -#ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * ); -#endif - -#ifndef YY_NO_INPUT - -#ifdef __cplusplus -static int yyinput (void ); -#else -static int input (void ); -#endif - -#endif - -/* Amount of stuff to slurp up with each read. */ -#ifndef YY_READ_BUF_SIZE -#ifdef __ia64__ -/* On IA-64, the buffer size is 16k, not 8k */ -#define YY_READ_BUF_SIZE 16384 -#else -#define YY_READ_BUF_SIZE 8192 -#endif /* __ia64__ */ -#endif - -/* Copy whatever the last rule matched to the standard output. */ -#ifndef ECHO -/* This used to be an fputs(), but since the string might contain NUL's, - * we now use fwrite(). - */ -#define ECHO do { if (fwrite( zconftext, zconfleng, 1, zconfout )) {} } while (0) -#endif - -/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, - * is returned in "result". - */ -#ifndef YY_INPUT -#define YY_INPUT(buf,result,max_size) \ - errno=0; \ - while ( (result = read( fileno(zconfin), (char *) buf, max_size )) < 0 ) \ - { \ - if( errno != EINTR) \ - { \ - YY_FATAL_ERROR( "input in flex scanner failed" ); \ - break; \ - } \ - errno=0; \ - clearerr(zconfin); \ - }\ -\ - -#endif - -/* No semi-colon after return; correct usage is to write "yyterminate();" - - * we don't want an extra ';' after the "return" because that will cause - * some compilers to complain about unreachable statements. - */ -#ifndef yyterminate -#define yyterminate() return YY_NULL -#endif - -/* Number of entries by which start-condition stack grows. */ -#ifndef YY_START_STACK_INCR -#define YY_START_STACK_INCR 25 -#endif - -/* Report a fatal error. */ -#ifndef YY_FATAL_ERROR -#define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) -#endif - -/* end tables serialization structures and prototypes */ - -/* Default declaration of generated scanner - a define so the user can - * easily add parameters. - */ -#ifndef YY_DECL -#define YY_DECL_IS_OURS 1 - -extern int zconflex (void); - -#define YY_DECL int zconflex (void) -#endif /* !YY_DECL */ - -/* Code executed at the beginning of each rule, after zconftext and zconfleng - * have been set up. - */ -#ifndef YY_USER_ACTION -#define YY_USER_ACTION -#endif - -/* Code executed at the end of each rule. */ -#ifndef YY_BREAK -#define YY_BREAK break; -#endif - -#define YY_RULE_SETUP \ - YY_USER_ACTION - -/** The main scanner function which does all the work. - */ -YY_DECL -{ - register yy_state_type yy_current_state; - register char *yy_cp, *yy_bp; - register int yy_act; - - int str = 0; - int ts, i; - - if ( !(yy_init) ) - { - (yy_init) = 1; - -#ifdef YY_USER_INIT - YY_USER_INIT; -#endif - - if ( ! (yy_start) ) - (yy_start) = 1; /* first start state */ - - if ( ! zconfin ) - zconfin = stdin; - - if ( ! zconfout ) - zconfout = stdout; - - if ( ! YY_CURRENT_BUFFER ) { - zconfensure_buffer_stack (); - YY_CURRENT_BUFFER_LVALUE = - zconf_create_buffer(zconfin,YY_BUF_SIZE ); - } - - zconf_load_buffer_state( ); - } - - while ( 1 ) /* loops until end-of-file is reached */ - { - yy_cp = (yy_c_buf_p); - - /* Support of zconftext. */ - *yy_cp = (yy_hold_char); - - /* yy_bp points to the position in yy_ch_buf of the start of - * the current run. - */ - yy_bp = yy_cp; - - yy_current_state = (yy_start); -yy_match: - while ( (yy_current_state = yy_nxt[yy_current_state][ yy_ec[YY_SC_TO_UI(*yy_cp)] ]) > 0 ) - ++yy_cp; - - yy_current_state = -yy_current_state; - -yy_find_action: - yy_act = yy_accept[yy_current_state]; - - YY_DO_BEFORE_ACTION; - -do_action: /* This label is used only to access EOF actions. */ - - switch ( yy_act ) - { /* beginning of action switch */ -case 1: -/* rule 1 can match eol */ -case 2: -/* rule 2 can match eol */ -YY_RULE_SETUP -{ - current_file->lineno++; - return T_EOL; -} - YY_BREAK -case 3: -YY_RULE_SETUP - - YY_BREAK -case 4: -YY_RULE_SETUP -{ - BEGIN(COMMAND); -} - YY_BREAK -case 5: -YY_RULE_SETUP -{ - unput(zconftext[0]); - BEGIN(COMMAND); -} - YY_BREAK - -case 6: -YY_RULE_SETUP -{ - struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng); - BEGIN(PARAM); - current_pos.file = current_file; - current_pos.lineno = current_file->lineno; - if (id && id->flags & TF_COMMAND) { - zconflval.id = id; - return id->token; - } - alloc_string(zconftext, zconfleng); - zconflval.string = text; - return T_WORD; - } - YY_BREAK -case 7: -YY_RULE_SETUP - - YY_BREAK -case 8: -/* rule 8 can match eol */ -YY_RULE_SETUP -{ - BEGIN(INITIAL); - current_file->lineno++; - return T_EOL; - } - YY_BREAK - -case 9: -YY_RULE_SETUP -return T_AND; - YY_BREAK -case 10: -YY_RULE_SETUP -return T_OR; - YY_BREAK -case 11: -YY_RULE_SETUP -return T_OPEN_PAREN; - YY_BREAK -case 12: -YY_RULE_SETUP -return T_CLOSE_PAREN; - YY_BREAK -case 13: -YY_RULE_SETUP -return T_NOT; - YY_BREAK -case 14: -YY_RULE_SETUP -return T_EQUAL; - YY_BREAK -case 15: -YY_RULE_SETUP -return T_UNEQUAL; - YY_BREAK -case 16: -YY_RULE_SETUP -{ - str = zconftext[0]; - new_string(); - BEGIN(STRING); - } - YY_BREAK -case 17: -/* rule 17 can match eol */ -YY_RULE_SETUP -BEGIN(INITIAL); current_file->lineno++; return T_EOL; - YY_BREAK -case 18: -YY_RULE_SETUP -/* ignore */ - YY_BREAK -case 19: -YY_RULE_SETUP -{ - struct kconf_id *id = kconf_id_lookup(zconftext, zconfleng); - if (id && id->flags & TF_PARAM) { - zconflval.id = id; - return id->token; - } - alloc_string(zconftext, zconfleng); - zconflval.string = text; - return T_WORD; - } - YY_BREAK -case 20: -YY_RULE_SETUP -/* comment */ - YY_BREAK -case 21: -/* rule 21 can match eol */ -YY_RULE_SETUP -current_file->lineno++; - YY_BREAK -case 22: -YY_RULE_SETUP - - YY_BREAK -case YY_STATE_EOF(PARAM): -{ - BEGIN(INITIAL); - } - YY_BREAK - -case 23: -/* rule 23 can match eol */ -*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ -(yy_c_buf_p) = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up zconftext again */ -YY_RULE_SETUP -{ - append_string(zconftext, zconfleng); - zconflval.string = text; - return T_WORD_QUOTE; - } - YY_BREAK -case 24: -YY_RULE_SETUP -{ - append_string(zconftext, zconfleng); - } - YY_BREAK -case 25: -/* rule 25 can match eol */ -*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ -(yy_c_buf_p) = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up zconftext again */ -YY_RULE_SETUP -{ - append_string(zconftext + 1, zconfleng - 1); - zconflval.string = text; - return T_WORD_QUOTE; - } - YY_BREAK -case 26: -YY_RULE_SETUP -{ - append_string(zconftext + 1, zconfleng - 1); - } - YY_BREAK -case 27: -YY_RULE_SETUP -{ - if (str == zconftext[0]) { - BEGIN(PARAM); - zconflval.string = text; - return T_WORD_QUOTE; - } else - append_string(zconftext, 1); - } - YY_BREAK -case 28: -/* rule 28 can match eol */ -YY_RULE_SETUP -{ - printf("%s:%d:warning: multi-line strings not supported\n", zconf_curname(), zconf_lineno()); - current_file->lineno++; - BEGIN(INITIAL); - return T_EOL; - } - YY_BREAK -case YY_STATE_EOF(STRING): -{ - BEGIN(INITIAL); - } - YY_BREAK - -case 29: -YY_RULE_SETUP -{ - ts = 0; - for (i = 0; i < zconfleng; i++) { - if (zconftext[i] == '\t') - ts = (ts & ~7) + 8; - else - ts++; - } - last_ts = ts; - if (first_ts) { - if (ts < first_ts) { - zconf_endhelp(); - return T_HELPTEXT; - } - ts -= first_ts; - while (ts > 8) { - append_string(" ", 8); - ts -= 8; - } - append_string(" ", ts); - } - } - YY_BREAK -case 30: -/* rule 30 can match eol */ -*yy_cp = (yy_hold_char); /* undo effects of setting up zconftext */ -(yy_c_buf_p) = yy_cp -= 1; -YY_DO_BEFORE_ACTION; /* set up zconftext again */ -YY_RULE_SETUP -{ - current_file->lineno++; - zconf_endhelp(); - return T_HELPTEXT; - } - YY_BREAK -case 31: -/* rule 31 can match eol */ -YY_RULE_SETUP -{ - current_file->lineno++; - append_string("\n", 1); - } - YY_BREAK -case 32: -YY_RULE_SETUP -{ - while (zconfleng) { - if ((zconftext[zconfleng-1] != ' ') && (zconftext[zconfleng-1] != '\t')) - break; - zconfleng--; - } - append_string(zconftext, zconfleng); - if (!first_ts) - first_ts = last_ts; - } - YY_BREAK -case YY_STATE_EOF(HELP): -{ - zconf_endhelp(); - return T_HELPTEXT; - } - YY_BREAK - -case YY_STATE_EOF(INITIAL): -case YY_STATE_EOF(COMMAND): -{ - if (current_file) { - zconf_endfile(); - return T_EOL; - } - fclose(zconfin); - yyterminate(); -} - YY_BREAK -case 33: -YY_RULE_SETUP -YY_FATAL_ERROR( "flex scanner jammed" ); - YY_BREAK - - case YY_END_OF_BUFFER: - { - /* Amount of text matched not including the EOB char. */ - int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; - - /* Undo the effects of YY_DO_BEFORE_ACTION. */ - *yy_cp = (yy_hold_char); - YY_RESTORE_YY_MORE_OFFSET - - if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) - { - /* We're scanning a new file or input source. It's - * possible that this happened because the user - * just pointed zconfin at a new source and called - * zconflex(). If so, then we have to assure - * consistency between YY_CURRENT_BUFFER and our - * globals. Here is the right place to do so, because - * this is the first action (other than possibly a - * back-up) that will match for the new input source. - */ - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; - YY_CURRENT_BUFFER_LVALUE->yy_input_file = zconfin; - YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; - } - - /* Note that here we test for yy_c_buf_p "<=" to the position - * of the first EOB in the buffer, since yy_c_buf_p will - * already have been incremented past the NUL character - * (since all states make transitions on EOB to the - * end-of-buffer state). Contrast this with the test - * in input(). - */ - if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) - { /* This was really a NUL. */ - yy_state_type yy_next_state; - - (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; - - yy_current_state = yy_get_previous_state( ); - - /* Okay, we're now positioned to make the NUL - * transition. We couldn't have - * yy_get_previous_state() go ahead and do it - * for us because it doesn't know how to deal - * with the possibility of jamming (and we don't - * want to build jamming into it because then it - * will run more slowly). - */ - - yy_next_state = yy_try_NUL_trans( yy_current_state ); - - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - - if ( yy_next_state ) - { - /* Consume the NUL. */ - yy_cp = ++(yy_c_buf_p); - yy_current_state = yy_next_state; - goto yy_match; - } - - else - { - yy_cp = (yy_c_buf_p); - goto yy_find_action; - } - } - - else switch ( yy_get_next_buffer( ) ) - { - case EOB_ACT_END_OF_FILE: - { - (yy_did_buffer_switch_on_eof) = 0; - - if ( zconfwrap( ) ) - { - /* Note: because we've taken care in - * yy_get_next_buffer() to have set up - * zconftext, we can now set up - * yy_c_buf_p so that if some total - * hoser (like flex itself) wants to - * call the scanner after we return the - * YY_NULL, it'll still work - another - * YY_NULL will get returned. - */ - (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; - - yy_act = YY_STATE_EOF(YY_START); - goto do_action; - } - - else - { - if ( ! (yy_did_buffer_switch_on_eof) ) - YY_NEW_FILE; - } - break; - } - - case EOB_ACT_CONTINUE_SCAN: - (yy_c_buf_p) = - (yytext_ptr) + yy_amount_of_matched_text; - - yy_current_state = yy_get_previous_state( ); - - yy_cp = (yy_c_buf_p); - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - goto yy_match; - - case EOB_ACT_LAST_MATCH: - (yy_c_buf_p) = - &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; - - yy_current_state = yy_get_previous_state( ); - - yy_cp = (yy_c_buf_p); - yy_bp = (yytext_ptr) + YY_MORE_ADJ; - goto yy_find_action; - } - break; - } - - default: - YY_FATAL_ERROR( - "fatal flex scanner internal error--no action found" ); - } /* end of action switch */ - } /* end of scanning one token */ -} /* end of zconflex */ - -/* yy_get_next_buffer - try to read in a new buffer - * - * Returns a code representing an action: - * EOB_ACT_LAST_MATCH - - * EOB_ACT_CONTINUE_SCAN - continue scanning from current position - * EOB_ACT_END_OF_FILE - end of file - */ -static int yy_get_next_buffer (void) -{ - register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; - register char *source = (yytext_ptr); - register int number_to_move, i; - int ret_val; - - if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) - YY_FATAL_ERROR( - "fatal flex scanner internal error--end of buffer missed" ); - - if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) - { /* Don't try to fill the buffer, so this is an EOF. */ - if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) - { - /* We matched a single character, the EOB, so - * treat this as a final EOF. - */ - return EOB_ACT_END_OF_FILE; - } - - else - { - /* We matched some text prior to the EOB, first - * process it. - */ - return EOB_ACT_LAST_MATCH; - } - } - - /* Try to read more data. */ - - /* First move last chars to start of buffer. */ - number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; - - for ( i = 0; i < number_to_move; ++i ) - *(dest++) = *(source++); - - if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) - /* don't do the read, it's not guaranteed to return an EOF, - * just force an EOF - */ - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; - - else - { - int num_to_read = - YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; - - while ( num_to_read <= 0 ) - { /* Not enough room in the buffer - grow it. */ - - /* just a shorter name for the current buffer */ - YY_BUFFER_STATE b = YY_CURRENT_BUFFER; - - int yy_c_buf_p_offset = - (int) ((yy_c_buf_p) - b->yy_ch_buf); - - if ( b->yy_is_our_buffer ) - { - int new_size = b->yy_buf_size * 2; - - if ( new_size <= 0 ) - b->yy_buf_size += b->yy_buf_size / 8; - else - b->yy_buf_size *= 2; - - b->yy_ch_buf = (char *) - /* Include room in for 2 EOB chars. */ - zconfrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); - } - else - /* Can't grow it, we don't own it. */ - b->yy_ch_buf = 0; - - if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( - "fatal error - scanner input buffer overflow" ); - - (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; - - num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - - number_to_move - 1; - - } - - if ( num_to_read > YY_READ_BUF_SIZE ) - num_to_read = YY_READ_BUF_SIZE; - - /* Read in more data. */ - YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), - (yy_n_chars), (size_t) num_to_read ); - - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - if ( (yy_n_chars) == 0 ) - { - if ( number_to_move == YY_MORE_ADJ ) - { - ret_val = EOB_ACT_END_OF_FILE; - zconfrestart(zconfin ); - } - - else - { - ret_val = EOB_ACT_LAST_MATCH; - YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = - YY_BUFFER_EOF_PENDING; - } - } - - else - ret_val = EOB_ACT_CONTINUE_SCAN; - - if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { - /* Extend the array by 50%, plus the number we really need. */ - yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) zconfrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); - if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); - } - - (yy_n_chars) += number_to_move; - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; - YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; - - (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; - - return ret_val; -} - -/* yy_get_previous_state - get the state just before the EOB char was reached */ - - static yy_state_type yy_get_previous_state (void) -{ - register yy_state_type yy_current_state; - register char *yy_cp; - - yy_current_state = (yy_start); - - for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) - { - yy_current_state = yy_nxt[yy_current_state][(*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1)]; - } - - return yy_current_state; -} - -/* yy_try_NUL_trans - try to make a transition on the NUL character - * - * synopsis - * next_state = yy_try_NUL_trans( current_state ); - */ - static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) -{ - register int yy_is_jam; - - yy_current_state = yy_nxt[yy_current_state][1]; - yy_is_jam = (yy_current_state <= 0); - - return yy_is_jam ? 0 : yy_current_state; -} - - static void yyunput (int c, register char * yy_bp ) -{ - register char *yy_cp; - - yy_cp = (yy_c_buf_p); - - /* undo effects of setting up zconftext */ - *yy_cp = (yy_hold_char); - - if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) - { /* need to shift things up to make room */ - /* +2 for EOB chars. */ - register int number_to_move = (yy_n_chars) + 2; - register char *dest = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[ - YY_CURRENT_BUFFER_LVALUE->yy_buf_size + 2]; - register char *source = - &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]; - - while ( source > YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) - *--dest = *--source; - - yy_cp += (int) (dest - source); - yy_bp += (int) (dest - source); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_buf_size; - - if ( yy_cp < YY_CURRENT_BUFFER_LVALUE->yy_ch_buf + 2 ) - YY_FATAL_ERROR( "flex scanner push-back overflow" ); - } - - *--yy_cp = (char) c; - - (yytext_ptr) = yy_bp; - (yy_hold_char) = *yy_cp; - (yy_c_buf_p) = yy_cp; -} - -#ifndef YY_NO_INPUT -#ifdef __cplusplus - static int yyinput (void) -#else - static int input (void) -#endif - -{ - int c; - - *(yy_c_buf_p) = (yy_hold_char); - - if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) - { - /* yy_c_buf_p now points to the character we want to return. - * If this occurs *before* the EOB characters, then it's a - * valid NUL; if not, then we've hit the end of the buffer. - */ - if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) - /* This was really a NUL. */ - *(yy_c_buf_p) = '\0'; - - else - { /* need more input */ - int offset = (yy_c_buf_p) - (yytext_ptr); - ++(yy_c_buf_p); - - switch ( yy_get_next_buffer( ) ) - { - case EOB_ACT_LAST_MATCH: - /* This happens because yy_g_n_b() - * sees that we've accumulated a - * token and flags that we need to - * try matching the token before - * proceeding. But for input(), - * there's no matching to consider. - * So convert the EOB_ACT_LAST_MATCH - * to EOB_ACT_END_OF_FILE. - */ - - /* Reset buffer status. */ - zconfrestart(zconfin ); - - /*FALLTHROUGH*/ - - case EOB_ACT_END_OF_FILE: - { - if ( zconfwrap( ) ) - return EOF; - - if ( ! (yy_did_buffer_switch_on_eof) ) - YY_NEW_FILE; -#ifdef __cplusplus - return yyinput(); -#else - return input(); -#endif - } - - case EOB_ACT_CONTINUE_SCAN: - (yy_c_buf_p) = (yytext_ptr) + offset; - break; - } - } - } - - c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ - *(yy_c_buf_p) = '\0'; /* preserve zconftext */ - (yy_hold_char) = *++(yy_c_buf_p); - - return c; -} -#endif /* ifndef YY_NO_INPUT */ - -/** Immediately switch to a different input stream. - * @param input_file A readable stream. - * - * @note This function does not reset the start condition to @c INITIAL . - */ - void zconfrestart (FILE * input_file ) -{ - - if ( ! YY_CURRENT_BUFFER ){ - zconfensure_buffer_stack (); - YY_CURRENT_BUFFER_LVALUE = - zconf_create_buffer(zconfin,YY_BUF_SIZE ); - } - - zconf_init_buffer(YY_CURRENT_BUFFER,input_file ); - zconf_load_buffer_state( ); -} - -/** Switch to a different input buffer. - * @param new_buffer The new input buffer. - * - */ - void zconf_switch_to_buffer (YY_BUFFER_STATE new_buffer ) -{ - - /* TODO. We should be able to replace this entire function body - * with - * zconfpop_buffer_state(); - * zconfpush_buffer_state(new_buffer); - */ - zconfensure_buffer_stack (); - if ( YY_CURRENT_BUFFER == new_buffer ) - return; - - if ( YY_CURRENT_BUFFER ) - { - /* Flush out information for old buffer. */ - *(yy_c_buf_p) = (yy_hold_char); - YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - YY_CURRENT_BUFFER_LVALUE = new_buffer; - zconf_load_buffer_state( ); - - /* We don't actually know whether we did this switch during - * EOF (zconfwrap()) processing, but the only time this flag - * is looked at is after zconfwrap() is called, so it's safe - * to go ahead and always set it. - */ - (yy_did_buffer_switch_on_eof) = 1; -} - -static void zconf_load_buffer_state (void) -{ - (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; - (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; - zconfin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; - (yy_hold_char) = *(yy_c_buf_p); -} - -/** Allocate and initialize an input buffer state. - * @param file A readable stream. - * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. - * - * @return the allocated buffer state. - */ - YY_BUFFER_STATE zconf_create_buffer (FILE * file, int size ) -{ - YY_BUFFER_STATE b; - - b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) ); - if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" ); - - b->yy_buf_size = size; - - /* yy_ch_buf has to be 2 characters longer than the size given because - * we need to put in 2 end-of-buffer characters. - */ - b->yy_ch_buf = (char *) zconfalloc(b->yy_buf_size + 2 ); - if ( ! b->yy_ch_buf ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_create_buffer()" ); - - b->yy_is_our_buffer = 1; - - zconf_init_buffer(b,file ); - - return b; -} - -/** Destroy the buffer. - * @param b a buffer created with zconf_create_buffer() - * - */ - void zconf_delete_buffer (YY_BUFFER_STATE b ) -{ - - if ( ! b ) - return; - - if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ - YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; - - if ( b->yy_is_our_buffer ) - zconffree((void *) b->yy_ch_buf ); - - zconffree((void *) b ); -} - -/* Initializes or reinitializes a buffer. - * This function is sometimes called more than once on the same buffer, - * such as during a zconfrestart() or at EOF. - */ - static void zconf_init_buffer (YY_BUFFER_STATE b, FILE * file ) - -{ - int oerrno = errno; - - zconf_flush_buffer(b ); - - b->yy_input_file = file; - b->yy_fill_buffer = 1; - - /* If b is the current buffer, then zconf_init_buffer was _probably_ - * called from zconfrestart() or through yy_get_next_buffer. - * In that case, we don't want to reset the lineno or column. - */ - if (b != YY_CURRENT_BUFFER){ - b->yy_bs_lineno = 1; - b->yy_bs_column = 0; - } - - b->yy_is_interactive = 0; - - errno = oerrno; -} - -/** Discard all buffered characters. On the next scan, YY_INPUT will be called. - * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. - * - */ - void zconf_flush_buffer (YY_BUFFER_STATE b ) -{ - if ( ! b ) - return; - - b->yy_n_chars = 0; - - /* We always need two end-of-buffer characters. The first causes - * a transition to the end-of-buffer state. The second causes - * a jam in that state. - */ - b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; - b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; - - b->yy_buf_pos = &b->yy_ch_buf[0]; - - b->yy_at_bol = 1; - b->yy_buffer_status = YY_BUFFER_NEW; - - if ( b == YY_CURRENT_BUFFER ) - zconf_load_buffer_state( ); -} - -/** Pushes the new state onto the stack. The new state becomes - * the current state. This function will allocate the stack - * if necessary. - * @param new_buffer The new state. - * - */ -void zconfpush_buffer_state (YY_BUFFER_STATE new_buffer ) -{ - if (new_buffer == NULL) - return; - - zconfensure_buffer_stack(); - - /* This block is copied from zconf_switch_to_buffer. */ - if ( YY_CURRENT_BUFFER ) - { - /* Flush out information for old buffer. */ - *(yy_c_buf_p) = (yy_hold_char); - YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); - YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); - } - - /* Only push if top exists. Otherwise, replace top. */ - if (YY_CURRENT_BUFFER) - (yy_buffer_stack_top)++; - YY_CURRENT_BUFFER_LVALUE = new_buffer; - - /* copied from zconf_switch_to_buffer. */ - zconf_load_buffer_state( ); - (yy_did_buffer_switch_on_eof) = 1; -} - -/** Removes and deletes the top of the stack, if present. - * The next element becomes the new top. - * - */ -void zconfpop_buffer_state (void) -{ - if (!YY_CURRENT_BUFFER) - return; - - zconf_delete_buffer(YY_CURRENT_BUFFER ); - YY_CURRENT_BUFFER_LVALUE = NULL; - if ((yy_buffer_stack_top) > 0) - --(yy_buffer_stack_top); - - if (YY_CURRENT_BUFFER) { - zconf_load_buffer_state( ); - (yy_did_buffer_switch_on_eof) = 1; - } -} - -/* Allocates the stack if it does not exist. - * Guarantees space for at least one push. - */ -static void zconfensure_buffer_stack (void) -{ - int num_to_alloc; - - if (!(yy_buffer_stack)) { - - /* First allocation is just for 2 elements, since we don't know if this - * scanner will even need a stack. We use 2 instead of 1 to avoid an - * immediate realloc on the next call. - */ - num_to_alloc = 1; - (yy_buffer_stack) = (struct yy_buffer_state**)zconfalloc - (num_to_alloc * sizeof(struct yy_buffer_state*) - ); - if ( ! (yy_buffer_stack) ) - YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" ); - - memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); - - (yy_buffer_stack_max) = num_to_alloc; - (yy_buffer_stack_top) = 0; - return; - } - - if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ - - /* Increase the buffer to prepare for a possible push. */ - int grow_size = 8 /* arbitrary grow size */; - - num_to_alloc = (yy_buffer_stack_max) + grow_size; - (yy_buffer_stack) = (struct yy_buffer_state**)zconfrealloc - ((yy_buffer_stack), - num_to_alloc * sizeof(struct yy_buffer_state*) - ); - if ( ! (yy_buffer_stack) ) - YY_FATAL_ERROR( "out of dynamic memory in zconfensure_buffer_stack()" ); - - /* zero only the new slots.*/ - memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); - (yy_buffer_stack_max) = num_to_alloc; - } -} - -/** Setup the input buffer state to scan directly from a user-specified character buffer. - * @param base the character buffer - * @param size the size in bytes of the character buffer - * - * @return the newly allocated buffer state object. - */ -YY_BUFFER_STATE zconf_scan_buffer (char * base, yy_size_t size ) -{ - YY_BUFFER_STATE b; - - if ( size < 2 || - base[size-2] != YY_END_OF_BUFFER_CHAR || - base[size-1] != YY_END_OF_BUFFER_CHAR ) - /* They forgot to leave room for the EOB's. */ - return 0; - - b = (YY_BUFFER_STATE) zconfalloc(sizeof( struct yy_buffer_state ) ); - if ( ! b ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_buffer()" ); - - b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ - b->yy_buf_pos = b->yy_ch_buf = base; - b->yy_is_our_buffer = 0; - b->yy_input_file = 0; - b->yy_n_chars = b->yy_buf_size; - b->yy_is_interactive = 0; - b->yy_at_bol = 1; - b->yy_fill_buffer = 0; - b->yy_buffer_status = YY_BUFFER_NEW; - - zconf_switch_to_buffer(b ); - - return b; -} - -/** Setup the input buffer state to scan a string. The next call to zconflex() will - * scan from a @e copy of @a str. - * @param yystr a NUL-terminated string to scan - * - * @return the newly allocated buffer state object. - * @note If you want to scan bytes that may contain NUL values, then use - * zconf_scan_bytes() instead. - */ -YY_BUFFER_STATE zconf_scan_string (yyconst char * yystr ) -{ - - return zconf_scan_bytes(yystr,strlen(yystr) ); -} - -/** Setup the input buffer state to scan the given bytes. The next call to zconflex() will - * scan from a @e copy of @a bytes. - * @param yybytes the byte buffer to scan - * @param _yybytes_len the number of bytes in the buffer pointed to by @a bytes. - * - * @return the newly allocated buffer state object. - */ -YY_BUFFER_STATE zconf_scan_bytes (yyconst char * yybytes, int _yybytes_len ) -{ - YY_BUFFER_STATE b; - char *buf; - yy_size_t n; - int i; - - /* Get memory for full buffer, including space for trailing EOB's. */ - n = _yybytes_len + 2; - buf = (char *) zconfalloc(n ); - if ( ! buf ) - YY_FATAL_ERROR( "out of dynamic memory in zconf_scan_bytes()" ); - - for ( i = 0; i < _yybytes_len; ++i ) - buf[i] = yybytes[i]; - - buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; - - b = zconf_scan_buffer(buf,n ); - if ( ! b ) - YY_FATAL_ERROR( "bad buffer in zconf_scan_bytes()" ); - - /* It's okay to grow etc. this buffer, and we should throw it - * away when we're done. - */ - b->yy_is_our_buffer = 1; - - return b; -} - -#ifndef YY_EXIT_FAILURE -#define YY_EXIT_FAILURE 2 -#endif - -static void yy_fatal_error (yyconst char* msg ) -{ - (void) fprintf( stderr, "%s\n", msg ); - exit( YY_EXIT_FAILURE ); -} - -/* Redefine yyless() so it works in section 3 code. */ - -#undef yyless -#define yyless(n) \ - do \ - { \ - /* Undo effects of setting up zconftext. */ \ - int yyless_macro_arg = (n); \ - YY_LESS_LINENO(yyless_macro_arg);\ - zconftext[zconfleng] = (yy_hold_char); \ - (yy_c_buf_p) = zconftext + yyless_macro_arg; \ - (yy_hold_char) = *(yy_c_buf_p); \ - *(yy_c_buf_p) = '\0'; \ - zconfleng = yyless_macro_arg; \ - } \ - while ( 0 ) - -/* Accessor methods (get/set functions) to struct members. */ - -/** Get the current line number. - * - */ -int zconfget_lineno (void) -{ - - return zconflineno; -} - -/** Get the input stream. - * - */ -FILE *zconfget_in (void) -{ - return zconfin; -} - -/** Get the output stream. - * - */ -FILE *zconfget_out (void) -{ - return zconfout; -} - -/** Get the length of the current token. - * - */ -int zconfget_leng (void) -{ - return zconfleng; -} - -/** Get the current token. - * - */ - -char *zconfget_text (void) -{ - return zconftext; -} - -/** Set the current line number. - * @param line_number - * - */ -void zconfset_lineno (int line_number ) -{ - - zconflineno = line_number; -} - -/** Set the input stream. This does not discard the current - * input buffer. - * @param in_str A readable stream. - * - * @see zconf_switch_to_buffer - */ -void zconfset_in (FILE * in_str ) -{ - zconfin = in_str ; -} - -void zconfset_out (FILE * out_str ) -{ - zconfout = out_str ; -} - -int zconfget_debug (void) -{ - return zconf_flex_debug; -} - -void zconfset_debug (int bdebug ) -{ - zconf_flex_debug = bdebug ; -} - -static int yy_init_globals (void) -{ - /* Initialization is the same as for the non-reentrant scanner. - * This function is called from zconflex_destroy(), so don't allocate here. - */ - - (yy_buffer_stack) = 0; - (yy_buffer_stack_top) = 0; - (yy_buffer_stack_max) = 0; - (yy_c_buf_p) = (char *) 0; - (yy_init) = 0; - (yy_start) = 0; - -/* Defined in main.c */ -#ifdef YY_STDINIT - zconfin = stdin; - zconfout = stdout; -#else - zconfin = (FILE *) 0; - zconfout = (FILE *) 0; -#endif - - /* For future reference: Set errno on error, since we are called by - * zconflex_init() - */ - return 0; -} - -/* zconflex_destroy is for both reentrant and non-reentrant scanners. */ -int zconflex_destroy (void) -{ - - /* Pop the buffer stack, destroying each element. */ - while(YY_CURRENT_BUFFER){ - zconf_delete_buffer(YY_CURRENT_BUFFER ); - YY_CURRENT_BUFFER_LVALUE = NULL; - zconfpop_buffer_state(); - } - - /* Destroy the stack itself. */ - zconffree((yy_buffer_stack) ); - (yy_buffer_stack) = NULL; - - /* Reset the globals. This is important in a non-reentrant scanner so the next time - * zconflex() is called, initialization will occur. */ - yy_init_globals( ); - - return 0; -} - -/* - * Internal utility routines. - */ - -#ifndef yytext_ptr -static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) -{ - register int i; - for ( i = 0; i < n; ++i ) - s1[i] = s2[i]; -} -#endif - -#ifdef YY_NEED_STRLEN -static int yy_flex_strlen (yyconst char * s ) -{ - register int n; - for ( n = 0; s[n]; ++n ) - ; - - return n; -} -#endif - -void *zconfalloc (yy_size_t size ) -{ - return (void *) malloc( size ); -} - -void *zconfrealloc (void * ptr, yy_size_t size ) -{ - /* The cast to (char *) in the following accommodates both - * implementations that use char* generic pointers, and those - * that use void* generic pointers. It works with the latter - * because both ANSI C and C++ allow castless assignment from - * any pointer type to void*, and deal with argument conversions - * as though doing an assignment. - */ - return (void *) realloc( (char *) ptr, size ); -} - -void zconffree (void * ptr ) -{ - free( (char *) ptr ); /* see zconfrealloc() for (char *) cast */ -} - -#define YYTABLES_NAME "yytables" - -void zconf_starthelp(void) -{ - new_string(); - last_ts = first_ts = 0; - BEGIN(HELP); -} - -static void zconf_endhelp(void) -{ - zconflval.string = text; - BEGIN(INITIAL); -} - -/* - * Try to open specified file with following names: - * ./name - * $(srctree)/name - * The latter is used when srctree is separate from objtree - * when compiling the barebox. - * Return NULL if file is not found. - */ -FILE *zconf_fopen(const char *name) -{ - char *env, fullname[PATH_MAX+1]; - FILE *f; - - f = fopen(name, "r"); - if (!f && name != NULL && name[0] != '/') { - env = getenv(SRCTREE); - if (env) { - sprintf(fullname, "%s/%s", env, name); - f = fopen(fullname, "r"); - } - } - return f; -} - -void zconf_initscan(const char *name) -{ - zconfin = zconf_fopen(name); - if (!zconfin) { - printf("can't find file %s\n", name); - exit(1); - } - - current_buf = malloc(sizeof(*current_buf)); - memset(current_buf, 0, sizeof(*current_buf)); - - current_file = file_lookup(name); - current_file->lineno = 1; - current_file->flags = FILE_BUSY; -} - -void zconf_nextfile(const char *name) -{ - struct file *file = file_lookup(name); - struct buffer *buf = malloc(sizeof(*buf)); - memset(buf, 0, sizeof(*buf)); - - current_buf->state = YY_CURRENT_BUFFER; - zconfin = zconf_fopen(file->name); - if (!zconfin) { - printf("%s:%d: can't open file \"%s\"\n", - zconf_curname(), zconf_lineno(), file->name); - exit(1); - } - zconf_switch_to_buffer(zconf_create_buffer(zconfin,YY_BUF_SIZE)); - buf->parent = current_buf; - current_buf = buf; - - if (file->flags & FILE_BUSY) { - printf("%s:%d: do not source '%s' from itself\n", - zconf_curname(), zconf_lineno(), name); - exit(1); - } - if (file->flags & FILE_SCANNED) { - printf("%s:%d: file '%s' is already sourced from '%s'\n", - zconf_curname(), zconf_lineno(), name, - file->parent->name); - exit(1); - } - file->flags |= FILE_BUSY; - file->lineno = 1; - file->parent = current_file; - current_file = file; -} - -static void zconf_endfile(void) -{ - struct buffer *parent; - - current_file->flags |= FILE_SCANNED; - current_file->flags &= ~FILE_BUSY; - current_file = current_file->parent; - - parent = current_buf->parent; - if (parent) { - fclose(zconfin); - zconf_delete_buffer(YY_CURRENT_BUFFER); - zconf_switch_to_buffer(parent->state); - } - free(current_buf); - current_buf = parent; -} - -int zconf_lineno(void) -{ - return current_pos.lineno; -} - -const char *zconf_curname(void) -{ - return current_pos.file ? current_pos.file->name : "<none>"; -} - diff --git a/scripts/kconfig/list.h b/scripts/kconfig/list.h new file mode 100644 index 0000000000..685d80e1bb --- /dev/null +++ b/scripts/kconfig/list.h @@ -0,0 +1,131 @@ +#ifndef LIST_H +#define LIST_H + +/* + * Copied from include/linux/... + */ + +#undef offsetof +#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER) + +/** + * container_of - cast a member of a structure out to the containing structure + * @ptr: the pointer to the member. + * @type: the type of the container struct this is embedded in. + * @member: the name of the member within the struct. + * + */ +#define container_of(ptr, type, member) ({ \ + const typeof( ((type *)0)->member ) *__mptr = (ptr); \ + (type *)( (char *)__mptr - offsetof(type,member) );}) + + +struct list_head { + struct list_head *next, *prev; +}; + + +#define LIST_HEAD_INIT(name) { &(name), &(name) } + +#define LIST_HEAD(name) \ + struct list_head name = LIST_HEAD_INIT(name) + +/** + * list_entry - get the struct for this entry + * @ptr: the &struct list_head pointer. + * @type: the type of the struct this is embedded in. + * @member: the name of the list_struct within the struct. + */ +#define list_entry(ptr, type, member) \ + container_of(ptr, type, member) + +/** + * list_for_each_entry - iterate over list of given type + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define list_for_each_entry(pos, head, member) \ + for (pos = list_entry((head)->next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = list_entry(pos->member.next, typeof(*pos), member)) + +/** + * list_for_each_entry_safe - iterate over list of given type safe against removal of list entry + * @pos: the type * to use as a loop cursor. + * @n: another type * to use as temporary storage + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define list_for_each_entry_safe(pos, n, head, member) \ + for (pos = list_entry((head)->next, typeof(*pos), member), \ + n = list_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = list_entry(n->member.next, typeof(*n), member)) + +/** + * list_empty - tests whether a list is empty + * @head: the list to test. + */ +static inline int list_empty(const struct list_head *head) +{ + return head->next == head; +} + +/* + * Insert a new entry between two known consecutive entries. + * + * This is only for internal list manipulation where we know + * the prev/next entries already! + */ +static inline void __list_add(struct list_head *_new, + struct list_head *prev, + struct list_head *next) +{ + next->prev = _new; + _new->next = next; + _new->prev = prev; + prev->next = _new; +} + +/** + * list_add_tail - add a new entry + * @new: new entry to be added + * @head: list head to add it before + * + * Insert a new entry before the specified head. + * This is useful for implementing queues. + */ +static inline void list_add_tail(struct list_head *_new, struct list_head *head) +{ + __list_add(_new, head->prev, head); +} + +/* + * Delete a list entry by making the prev/next entries + * point to each other. + * + * This is only for internal list manipulation where we know + * the prev/next entries already! + */ +static inline void __list_del(struct list_head *prev, struct list_head *next) +{ + next->prev = prev; + prev->next = next; +} + +#define LIST_POISON1 ((void *) 0x00100100) +#define LIST_POISON2 ((void *) 0x00200200) +/** + * list_del - deletes entry from list. + * @entry: the element to delete from the list. + * Note: list_empty() on entry does not return true after this, the entry is + * in an undefined state. + */ +static inline void list_del(struct list_head *entry) +{ + __list_del(entry->prev, entry->next); + entry->next = (struct list_head*)LIST_POISON1; + entry->prev = (struct list_head*)LIST_POISON2; +} +#endif diff --git a/scripts/kconfig/lkc.h b/scripts/kconfig/lkc.h index b633bdb9f3..f8aee5fc6d 100644 --- a/scripts/kconfig/lkc.h +++ b/scripts/kconfig/lkc.h @@ -39,6 +39,12 @@ extern "C" { #ifndef CONFIG_ #define CONFIG_ "CONFIG_" #endif +static inline const char *CONFIG_prefix(void) +{ + return getenv( "CONFIG_" ) ?: CONFIG_; +} +#undef CONFIG_ +#define CONFIG_ CONFIG_prefix() #define TF_COMMAND 0x0001 #define TF_PARAM 0x0002 @@ -90,8 +96,10 @@ struct conf_printer { /* confdata.c and expr.c */ static inline void xfwrite(const void *str, size_t len, size_t count, FILE *out) { - if (fwrite(str, len, count, out) < count) - fprintf(stderr, "\nError in writing or end of file.\n"); + assert(len != 0); + + if (fwrite(str, len, count, out) != count) + fprintf(stderr, "Error in writing or end of file.\n"); } /* menu.c */ @@ -114,6 +122,8 @@ void menu_set_type(int type); /* util.c */ struct file *file_lookup(const char *name); int file_write_dep(const char *name); +void *xmalloc(size_t size); +void *xcalloc(size_t nmemb, size_t size); struct gstr { size_t len; diff --git a/scripts/kconfig/lkc_proto.h b/scripts/kconfig/lkc_proto.h index 47fe9c340f..ef1a7381f9 100644 --- a/scripts/kconfig/lkc_proto.h +++ b/scripts/kconfig/lkc_proto.h @@ -21,8 +21,10 @@ P(menu_get_root_menu,struct menu *,(struct menu *menu)); P(menu_get_parent_menu,struct menu *,(struct menu *menu)); P(menu_has_help,bool,(struct menu *menu)); P(menu_get_help,const char *,(struct menu *menu)); -P(get_symbol_str, void, (struct gstr *r, struct symbol *sym)); -P(get_relations_str, struct gstr, (struct symbol **sym_arr)); +P(get_symbol_str, void, (struct gstr *r, struct symbol *sym, struct list_head + *head)); +P(get_relations_str, struct gstr, (struct symbol **sym_arr, struct list_head + *head)); P(menu_get_ext_help,void,(struct menu *menu, struct gstr *help)); /* symbol.c */ diff --git a/scripts/kconfig/lxdialog/check-lxdialog.sh b/scripts/kconfig/lxdialog/check-lxdialog.sh index 82cc3a85e7..9d2a4c585e 100644 --- a/scripts/kconfig/lxdialog/check-lxdialog.sh +++ b/scripts/kconfig/lxdialog/check-lxdialog.sh @@ -4,7 +4,9 @@ # What library to link ldflags() { - for ext in so a dylib ; do + pkg-config --libs ncursesw 2>/dev/null && exit + pkg-config --libs ncurses 2>/dev/null && exit + for ext in so a dll.a dylib ; do for lib in ncursesw ncurses curses ; do $cc -print-file-name=lib${lib}.${ext} | grep -q / if [ $? -eq 0 ]; then @@ -19,12 +21,13 @@ ldflags() # Where is ncurses.h? ccflags() { - if [ -f /usr/include/ncurses/ncurses.h ]; then + if [ -f /usr/include/ncursesw/curses.h ]; then + echo '-I/usr/include/ncursesw -DCURSES_LOC="<curses.h>"' + echo ' -DNCURSES_WIDECHAR=1' + elif [ -f /usr/include/ncurses/ncurses.h ]; then echo '-I/usr/include/ncurses -DCURSES_LOC="<ncurses.h>"' elif [ -f /usr/include/ncurses/curses.h ]; then - echo '-I/usr/include/ncurses -DCURSES_LOC="<ncurses/curses.h>"' - elif [ -f /usr/include/ncursesw/curses.h ]; then - echo '-I/usr/include/ncursesw -DCURSES_LOC="<ncursesw/curses.h>"' + echo '-I/usr/include/ncurses -DCURSES_LOC="<curses.h>"' elif [ -f /usr/include/ncurses.h ]; then echo '-DCURSES_LOC="<ncurses.h>"' else @@ -38,7 +41,7 @@ trap "rm -f $tmp" 0 1 2 3 15 # Check if we can link to ncurses check() { - $cc -xc - -o $tmp 2>/dev/null <<'EOF' + $cc -x c - -o $tmp 2>/dev/null <<'EOF' #include CURSES_LOC main() {} EOF diff --git a/scripts/kconfig/lxdialog/checklist.c b/scripts/kconfig/lxdialog/checklist.c index 14bb341b1f..a2eb80fbc8 100644 --- a/scripts/kconfig/lxdialog/checklist.c +++ b/scripts/kconfig/lxdialog/checklist.c @@ -15,6 +15,10 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include "dialog.h" diff --git a/scripts/kconfig/lxdialog/dialog.h b/scripts/kconfig/lxdialog/dialog.h index 3c61d71c65..1099337079 100644 --- a/scripts/kconfig/lxdialog/dialog.h +++ b/scripts/kconfig/lxdialog/dialog.h @@ -12,6 +12,10 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <sys/types.h> @@ -102,8 +106,14 @@ struct dialog_color { int hl; /* highlight this item */ }; +struct subtitle_list { + struct subtitle_list *next; + const char *text; +}; + struct dialog_info { const char *backtitle; + struct subtitle_list *subtitles; struct dialog_color screen; struct dialog_color shadow; struct dialog_color dialog; @@ -140,6 +150,7 @@ struct dialog_info { */ extern struct dialog_info dlg; extern char dialog_input_result[]; +extern int saved_x, saved_y; /* Needed in signal handler in mconf.c */ /* * Function prototypes @@ -191,6 +202,7 @@ int on_key_resize(void); int init_dialog(const char *backtitle); void set_dialog_backtitle(const char *backtitle); +void set_dialog_subtitles(struct subtitle_list *subtitles); void end_dialog(int x, int y); void attr_clear(WINDOW * win, int height, int width, chtype attr); void dialog_clear(void); @@ -205,12 +217,17 @@ int first_alpha(const char *string, const char *exempt); int dialog_yesno(const char *title, const char *prompt, int height, int width); int dialog_msgbox(const char *title, const char *prompt, int height, int width, int pause); -int dialog_textbox(const char *title, const char *file, int height, int width); + + +typedef void (*update_text_fn)(char *buf, size_t start, size_t end, void + *_data); +int dialog_textbox(const char *title, char *tbuf, int initial_height, + int initial_width, int *keys, int *_vscroll, int *_hscroll, + update_text_fn update_text, void *data); int dialog_menu(const char *title, const char *prompt, const void *selected, int *s_scroll); int dialog_checklist(const char *title, const char *prompt, int height, int width, int list_height); -extern char dialog_input_result[]; int dialog_inputbox(const char *title, const char *prompt, int height, int width, const char *init); diff --git a/scripts/kconfig/lxdialog/inputbox.c b/scripts/kconfig/lxdialog/inputbox.c index 1564a2887a..21404a04d7 100644 --- a/scripts/kconfig/lxdialog/inputbox.c +++ b/scripts/kconfig/lxdialog/inputbox.c @@ -13,6 +13,10 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include "dialog.h" @@ -41,7 +45,8 @@ int dialog_inputbox(const char *title, const char *prompt, int height, int width const char *init) { int i, x, y, box_y, box_x, box_width; - int input_x = 0, scroll = 0, key = 0, button = -1; + int input_x = 0, key = 0, button = -1; + int show_x, len, pos; char *instr = dialog_input_result; WINDOW *dialog; @@ -93,14 +98,17 @@ do_resize: wmove(dialog, box_y, box_x); wattrset(dialog, dlg.inputbox.atr); - input_x = strlen(instr); + len = strlen(instr); + pos = len; - if (input_x >= box_width) { - scroll = input_x - box_width + 1; + if (len >= box_width) { + show_x = len - box_width + 1; input_x = box_width - 1; for (i = 0; i < box_width - 1; i++) - waddch(dialog, instr[scroll + i]); + waddch(dialog, instr[show_x + i]); } else { + show_x = 0; + input_x = len; waddstr(dialog, instr); } @@ -117,45 +125,104 @@ do_resize: case KEY_UP: case KEY_DOWN: break; - case KEY_LEFT: - continue; - case KEY_RIGHT: - continue; case KEY_BACKSPACE: case 127: - if (input_x || scroll) { + if (pos) { wattrset(dialog, dlg.inputbox.atr); - if (!input_x) { - scroll = scroll < box_width - 1 ? 0 : scroll - (box_width - 1); - wmove(dialog, box_y, box_x); - for (i = 0; i < box_width; i++) - waddch(dialog, - instr[scroll + input_x + i] ? - instr[scroll + input_x + i] : ' '); - input_x = strlen(instr) - scroll; + if (input_x == 0) { + show_x--; } else input_x--; - instr[scroll + input_x] = '\0'; - mvwaddch(dialog, box_y, input_x + box_x, ' '); + + if (pos < len) { + for (i = pos - 1; i < len; i++) { + instr[i] = instr[i+1]; + } + } + + pos--; + len--; + instr[len] = '\0'; + wmove(dialog, box_y, box_x); + for (i = 0; i < box_width; i++) { + if (!instr[show_x + i]) { + waddch(dialog, ' '); + break; + } + waddch(dialog, instr[show_x + i]); + } wmove(dialog, box_y, input_x + box_x); wrefresh(dialog); } continue; + case KEY_LEFT: + if (pos > 0) { + if (input_x > 0) { + wmove(dialog, box_y, --input_x + box_x); + } else if (input_x == 0) { + show_x--; + wmove(dialog, box_y, box_x); + for (i = 0; i < box_width; i++) { + if (!instr[show_x + i]) { + waddch(dialog, ' '); + break; + } + waddch(dialog, instr[show_x + i]); + } + wmove(dialog, box_y, box_x); + } + pos--; + } + continue; + case KEY_RIGHT: + if (pos < len) { + if (input_x < box_width - 1) { + wmove(dialog, box_y, ++input_x + box_x); + } else if (input_x == box_width - 1) { + show_x++; + wmove(dialog, box_y, box_x); + for (i = 0; i < box_width; i++) { + if (!instr[show_x + i]) { + waddch(dialog, ' '); + break; + } + waddch(dialog, instr[show_x + i]); + } + wmove(dialog, box_y, input_x + box_x); + } + pos++; + } + continue; default: if (key < 0x100 && isprint(key)) { - if (scroll + input_x < MAX_LEN) { + if (len < MAX_LEN) { wattrset(dialog, dlg.inputbox.atr); - instr[scroll + input_x] = key; - instr[scroll + input_x + 1] = '\0'; + if (pos < len) { + for (i = len; i > pos; i--) + instr[i] = instr[i-1]; + instr[pos] = key; + } else { + instr[len] = key; + } + pos++; + len++; + instr[len] = '\0'; + if (input_x == box_width - 1) { - scroll++; - wmove(dialog, box_y, box_x); - for (i = 0; i < box_width - 1; i++) - waddch(dialog, instr [scroll + i]); + show_x++; } else { - wmove(dialog, box_y, input_x++ + box_x); - waddch(dialog, key); + input_x++; + } + + wmove(dialog, box_y, box_x); + for (i = 0; i < box_width; i++) { + if (!instr[show_x + i]) { + waddch(dialog, ' '); + break; + } + waddch(dialog, instr[show_x + i]); } + wmove(dialog, box_y, input_x + box_x); wrefresh(dialog); } else flash(); /* Alarm user about overflow */ diff --git a/scripts/kconfig/lxdialog/menubox.c b/scripts/kconfig/lxdialog/menubox.c index b0d9a5c88d..38cd69c566 100644 --- a/scripts/kconfig/lxdialog/menubox.c +++ b/scripts/kconfig/lxdialog/menubox.c @@ -13,6 +13,10 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ /* @@ -22,7 +26,7 @@ * * *) A bugfix for the Page-Down problem * - * *) Formerly when I used Page Down and Page Up, the cursor would be set + * *) Formerly when I used Page Down and Page Up, the cursor would be set * to the first position in the menu box. Now lxdialog is a bit * smarter and works more like other menu systems (just have a look at * it). @@ -150,12 +154,14 @@ static void print_arrows(WINDOW * win, int item_no, int scroll, int y, int x, */ static void print_buttons(WINDOW * win, int height, int width, int selected) { - int x = width / 2 - 16; + int x = width / 2 - 28; int y = height - 2; print_button(win, gettext("Select"), y, x, selected == 0); print_button(win, gettext(" Exit "), y, x + 12, selected == 1); print_button(win, gettext(" Help "), y, x + 24, selected == 2); + print_button(win, gettext(" Save "), y, x + 36, selected == 3); + print_button(win, gettext(" Load "), y, x + 48, selected == 4); wmove(win, y, x + 1 + 12 * selected); wrefresh(win); @@ -297,10 +303,11 @@ do_resize: } } - if (i < max_choice || - key == KEY_UP || key == KEY_DOWN || - key == '-' || key == '+' || - key == KEY_PPAGE || key == KEY_NPAGE) { + if (item_count() != 0 && + (i < max_choice || + key == KEY_UP || key == KEY_DOWN || + key == '-' || key == '+' || + key == KEY_PPAGE || key == KEY_NPAGE)) { /* Remove highligt of current item */ print_item(scroll + choice, choice, FALSE); @@ -368,7 +375,7 @@ do_resize: case TAB: case KEY_RIGHT: button = ((key == KEY_LEFT ? --button : ++button) < 0) - ? 2 : (button > 2 ? 0 : button); + ? 4 : (button > 4 ? 0 : button); print_buttons(dialog, height, width, button); wrefresh(menu); @@ -395,17 +402,17 @@ do_resize: return 2; case 's': case 'y': - return 3; + return 5; case 'n': - return 4; + return 6; case 'm': - return 5; + return 7; case ' ': - return 6; + return 8; case '/': - return 7; + return 9; case 'z': - return 8; + return 10; case '\n': return button; } diff --git a/scripts/kconfig/lxdialog/textbox.c b/scripts/kconfig/lxdialog/textbox.c index 3ef8c4f7be..a48bb93e09 100644 --- a/scripts/kconfig/lxdialog/textbox.c +++ b/scripts/kconfig/lxdialog/textbox.c @@ -13,28 +13,34 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include "dialog.h" static void back_lines(int n); -static void print_page(WINDOW * win, int height, int width); -static void print_line(WINDOW * win, int row, int width); +static void print_page(WINDOW *win, int height, int width, update_text_fn + update_text, void *data); +static void print_line(WINDOW *win, int row, int width); static char *get_line(void); static void print_position(WINDOW * win); static int hscroll; static int begin_reached, end_reached, page_length; -static const char *buf; -static const char *page; +static char *buf; +static char *page; /* * refresh window content */ static void refresh_text_box(WINDOW *dialog, WINDOW *box, int boxh, int boxw, - int cur_y, int cur_x) + int cur_y, int cur_x, update_text_fn update_text, + void *data) { - print_page(box, boxh, boxw); + print_page(box, boxh, boxw, update_text, data); print_position(dialog); wmove(dialog, cur_y, cur_x); /* Restore cursor position */ wrefresh(dialog); @@ -43,14 +49,18 @@ static void refresh_text_box(WINDOW *dialog, WINDOW *box, int boxh, int boxw, /* * Display text from a file in a dialog box. + * + * keys is a null-terminated array + * update_text() may not add or remove any '\n' or '\0' in tbuf */ -int dialog_textbox(const char *title, const char *tbuf, - int initial_height, int initial_width) +int dialog_textbox(const char *title, char *tbuf, int initial_height, + int initial_width, int *keys, int *_vscroll, int *_hscroll, + update_text_fn update_text, void *data) { int i, x, y, cur_x, cur_y, key = 0; int height, width, boxh, boxw; - int passed_end; WINDOW *dialog, *box; + bool done = false; begin_reached = 1; end_reached = 0; @@ -59,6 +69,15 @@ int dialog_textbox(const char *title, const char *tbuf, buf = tbuf; page = buf; /* page is pointer to start of page to be displayed */ + if (_vscroll && *_vscroll) { + begin_reached = 0; + + for (i = 0; i < *_vscroll; i++) + get_line(); + } + if (_hscroll) + hscroll = *_hscroll; + do_resize: getmaxyx(stdscr, height, width); if (height < 8 || width < 8) @@ -116,25 +135,28 @@ do_resize: /* Print first page of text */ attr_clear(box, boxh, boxw, dlg.dialog.atr); - refresh_text_box(dialog, box, boxh, boxw, cur_y, cur_x); + refresh_text_box(dialog, box, boxh, boxw, cur_y, cur_x, update_text, + data); - while ((key != KEY_ESC) && (key != '\n')) { + while (!done) { key = wgetch(dialog); switch (key) { case 'E': /* Exit */ case 'e': case 'X': case 'x': - delwin(box); - delwin(dialog); - return 0; + case 'q': + case '\n': + done = true; + break; case 'g': /* First page */ case KEY_HOME: if (!begin_reached) { begin_reached = 1; page = buf; refresh_text_box(dialog, box, boxh, boxw, - cur_y, cur_x); + cur_y, cur_x, update_text, + data); } break; case 'G': /* Last page */ @@ -144,78 +166,48 @@ do_resize: /* point to last char in buf */ page = buf + strlen(buf); back_lines(boxh); - refresh_text_box(dialog, box, boxh, boxw, - cur_y, cur_x); + refresh_text_box(dialog, box, boxh, boxw, cur_y, + cur_x, update_text, data); break; case 'K': /* Previous line */ case 'k': case KEY_UP: - if (!begin_reached) { - back_lines(page_length + 1); - - /* We don't call print_page() here but use - * scrolling to ensure faster screen update. - * However, 'end_reached' and 'page_length' - * should still be updated, and 'page' should - * point to start of next page. This is done - * by calling get_line() in the following - * 'for' loop. */ - scrollok(box, TRUE); - wscrl(box, -1); /* Scroll box region down one line */ - scrollok(box, FALSE); - page_length = 0; - passed_end = 0; - for (i = 0; i < boxh; i++) { - if (!i) { - /* print first line of page */ - print_line(box, 0, boxw); - wnoutrefresh(box); - } else - /* Called to update 'end_reached' and 'page' */ - get_line(); - if (!passed_end) - page_length++; - if (end_reached && !passed_end) - passed_end = 1; - } + if (begin_reached) + break; - print_position(dialog); - wmove(dialog, cur_y, cur_x); /* Restore cursor position */ - wrefresh(dialog); - } + back_lines(page_length + 1); + refresh_text_box(dialog, box, boxh, boxw, cur_y, + cur_x, update_text, data); break; case 'B': /* Previous page */ case 'b': + case 'u': case KEY_PPAGE: if (begin_reached) break; back_lines(page_length + boxh); - refresh_text_box(dialog, box, boxh, boxw, - cur_y, cur_x); + refresh_text_box(dialog, box, boxh, boxw, cur_y, + cur_x, update_text, data); break; case 'J': /* Next line */ case 'j': case KEY_DOWN: - if (!end_reached) { - begin_reached = 0; - scrollok(box, TRUE); - scroll(box); /* Scroll box region up one line */ - scrollok(box, FALSE); - print_line(box, boxh - 1, boxw); - wnoutrefresh(box); - print_position(dialog); - wmove(dialog, cur_y, cur_x); /* Restore cursor position */ - wrefresh(dialog); - } + if (end_reached) + break; + + back_lines(page_length - 1); + refresh_text_box(dialog, box, boxh, boxw, cur_y, + cur_x, update_text, data); break; case KEY_NPAGE: /* Next page */ case ' ': + case 'd': if (end_reached) break; begin_reached = 0; - refresh_text_box(dialog, box, boxh, boxw, - cur_y, cur_x); + refresh_text_box(dialog, box, boxh, boxw, cur_y, + cur_x, update_text, data); break; case '0': /* Beginning of line */ case 'H': /* Scroll left */ @@ -230,8 +222,8 @@ do_resize: hscroll--; /* Reprint current page to scroll horizontally */ back_lines(page_length); - refresh_text_box(dialog, box, boxh, boxw, - cur_y, cur_x); + refresh_text_box(dialog, box, boxh, boxw, cur_y, + cur_x, update_text, data); break; case 'L': /* Scroll right */ case 'l': @@ -241,11 +233,12 @@ do_resize: hscroll++; /* Reprint current page to scroll horizontally */ back_lines(page_length); - refresh_text_box(dialog, box, boxh, boxw, - cur_y, cur_x); + refresh_text_box(dialog, box, boxh, boxw, cur_y, + cur_x, update_text, data); break; case KEY_ESC: - key = on_key_esc(dialog); + if (on_key_esc(dialog) == KEY_ESC) + done = true; break; case KEY_RESIZE: back_lines(height); @@ -253,11 +246,31 @@ do_resize: delwin(dialog); on_key_resize(); goto do_resize; + default: + for (i = 0; keys[i]; i++) { + if (key == keys[i]) { + done = true; + break; + } + } } } delwin(box); delwin(dialog); - return key; /* ESC pressed */ + if (_vscroll) { + const char *s; + + s = buf; + *_vscroll = 0; + back_lines(page_length); + while (s < page && (s = strchr(s, '\n'))) { + (*_vscroll)++; + s++; + } + } + if (_hscroll) + *_hscroll = hscroll; + return key; } /* @@ -294,12 +307,23 @@ static void back_lines(int n) } /* - * Print a new page of text. Called by dialog_textbox(). + * Print a new page of text. */ -static void print_page(WINDOW * win, int height, int width) +static void print_page(WINDOW *win, int height, int width, update_text_fn + update_text, void *data) { int i, passed_end = 0; + if (update_text) { + char *end; + + for (i = 0; i < height; i++) + get_line(); + end = page; + back_lines(height); + update_text(buf, page - buf, end - buf, data); + } + page_length = 0; for (i = 0; i < height; i++) { print_line(win, i, width); @@ -312,7 +336,7 @@ static void print_page(WINDOW * win, int height, int width) } /* - * Print a new line of text. Called by dialog_textbox() and print_page(). + * Print a new line of text. */ static void print_line(WINDOW * win, int row, int width) { @@ -350,10 +374,8 @@ static char *get_line(void) end_reached = 0; while (*page != '\n') { if (*page == '\0') { - if (!end_reached) { - end_reached = 1; - break; - } + end_reached = 1; + break; } else if (i < MAX_LEN) line[i++] = *(page++); else { @@ -366,7 +388,7 @@ static char *get_line(void) if (i <= MAX_LEN) line[i] = '\0'; if (!end_reached) - page++; /* move pass '\n' */ + page++; /* move past '\n' */ return line; } diff --git a/scripts/kconfig/lxdialog/util.c b/scripts/kconfig/lxdialog/util.c index 891d30215e..a0e97c2994 100644 --- a/scripts/kconfig/lxdialog/util.c +++ b/scripts/kconfig/lxdialog/util.c @@ -13,12 +13,19 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include <stdarg.h> #include "dialog.h" +/* Needed in signal handler in mconf.c */ +int saved_x, saved_y; + struct dialog_info dlg; static void set_mono_theme(void) @@ -250,12 +257,48 @@ void dialog_clear(void) attr_clear(stdscr, LINES, COLS, dlg.screen.atr); /* Display background title if it exists ... - SLH */ if (dlg.backtitle != NULL) { - int i; + int i, len = 0, skip = 0; + struct subtitle_list *pos; wattrset(stdscr, dlg.screen.atr); mvwaddstr(stdscr, 0, 1, (char *)dlg.backtitle); + + for (pos = dlg.subtitles; pos != NULL; pos = pos->next) { + /* 3 is for the arrow and spaces */ + len += strlen(pos->text) + 3; + } + wmove(stdscr, 1, 1); - for (i = 1; i < COLS - 1; i++) + if (len > COLS - 2) { + const char *ellipsis = "[...] "; + waddstr(stdscr, ellipsis); + skip = len - (COLS - 2 - strlen(ellipsis)); + } + + for (pos = dlg.subtitles; pos != NULL; pos = pos->next) { + if (skip == 0) + waddch(stdscr, ACS_RARROW); + else + skip--; + + if (skip == 0) + waddch(stdscr, ' '); + else + skip--; + + if (skip < strlen(pos->text)) { + waddstr(stdscr, pos->text + skip); + skip = 0; + } else + skip -= strlen(pos->text); + + if (skip == 0) + waddch(stdscr, ' '); + else + skip--; + } + + for (i = len + 1; i < COLS - 1; i++) waddch(stdscr, ACS_HLINE); } wnoutrefresh(stdscr); @@ -269,6 +312,10 @@ int init_dialog(const char *backtitle) int height, width; initscr(); /* Init curses */ + + /* Get current cursor position for signal handler in mconf.c */ + getyx(stdscr, saved_y, saved_x); + getmaxyx(stdscr, height, width); if (height < 19 || width < 80) { endwin(); @@ -291,6 +338,11 @@ void set_dialog_backtitle(const char *backtitle) dlg.backtitle = backtitle; } +void set_dialog_subtitles(struct subtitle_list *subtitles) +{ + dlg.subtitles = subtitles; +} + /* * End using dialog functions. */ diff --git a/scripts/kconfig/lxdialog/yesno.c b/scripts/kconfig/lxdialog/yesno.c index adbfcd9271..4e6e8090c2 100644 --- a/scripts/kconfig/lxdialog/yesno.c +++ b/scripts/kconfig/lxdialog/yesno.c @@ -13,6 +13,10 @@ * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ #include "dialog.h" diff --git a/scripts/kconfig/mconf.c b/scripts/kconfig/mconf.c index 19e200d911..a69cbd78fb 100644 --- a/scripts/kconfig/mconf.c +++ b/scripts/kconfig/mconf.c @@ -105,10 +105,10 @@ static const char mconf_readme[] = N_( "Text Box (Help Window)\n" "--------\n" "o Use the cursor keys to scroll up/down/left/right. The VI editor\n" -" keys h,j,k,l function here as do <SPACE BAR> and <B> for those\n" -" who are familiar with less and lynx.\n" +" keys h,j,k,l function here as do <u>, <d>, <SPACE BAR> and <B> for \n" +" those who are familiar with less and lynx.\n" "\n" -"o Press <E>, <X>, <Enter> or <Esc><Esc> to exit.\n" +"o Press <E>, <X>, <q>, <Enter> or <Esc><Esc> to exit.\n" "\n" "\n" "Alternate Configuration Files\n" @@ -236,16 +236,19 @@ search_help[] = N_( "Result:\n" "-----------------------------------------------------------------\n" "Symbol: FOO [=m]\n" + "Type : tristate\n" "Prompt: Foo bus is used to drive the bar HW\n" - "Defined at drivers/pci/Kconfig:47\n" - "Depends on: X86_LOCAL_APIC && X86_IO_APIC || IA64\n" - "Location:\n" - " -> Bus options (PCI, PCMCIA, EISA, MCA, ISA)\n" - " -> PCI support (PCI [=y])\n" - " -> PCI access mode (<choice> [=y])\n" - "Selects: LIBCRC32\n" - "Selected by: BAR\n" + " Defined at drivers/pci/Kconfig:47\n" + " Depends on: X86_LOCAL_APIC && X86_IO_APIC || IA64\n" + " Location:\n" + " -> Bus options (PCI, PCMCIA, EISA, ISA)\n" + " -> PCI support (PCI [=y])\n" + "(1) -> PCI access mode (<choice> [=y])\n" + " Selects: LIBCRC32\n" + " Selected by: BAR\n" "-----------------------------------------------------------------\n" + "o The line 'Type:' shows the type of the configuration option for\n" + " this symbol (boolean, tristate, string, ...)\n" "o The line 'Prompt:' shows the text used in the menu structure for\n" " this symbol\n" "o The 'Defined at' line tell at what file / line number the symbol\n" @@ -254,8 +257,12 @@ search_help[] = N_( " this symbol to be visible in the menu (selectable)\n" "o The 'Location:' lines tell where in the menu structure this symbol\n" " is located\n" - " A location followed by a [=y] indicate that this is a selectable\n" - " menu item - and current value is displayed inside brackets.\n" + " A location followed by a [=y] indicates that this is a\n" + " selectable menu item - and the current value is displayed inside\n" + " brackets.\n" + " Press the key in the (#) prefix to jump directly to that\n" + " location. You will be returned to the current search results\n" + " after exiting this new menu.\n" "o The 'Selects:' line tell what symbol will be automatically\n" " selected if this symbol is selected (y or m)\n" "o The 'Selected by' line tell what symbol has selected this symbol\n" @@ -273,13 +280,16 @@ static struct menu *current_menu; static int child_count; static int single_menu_mode; static int show_all_options; -static int saved_x, saved_y; +static int save_and_exit; -static void conf(struct menu *menu); +static void conf(struct menu *menu, struct menu *active_menu); static void conf_choice(struct menu *menu); static void conf_string(struct menu *menu); static void conf_load(void); static void conf_save(void); +static int show_textbox_ext(const char *title, char *text, int r, int c, + int *keys, int *vscroll, int *hscroll, + update_text_fn update_text, void *data); static void show_textbox(const char *title, const char *text, int r, int c); static void show_helptext(const char *title, const char *text); static void show_help(struct menu *menu); @@ -301,18 +311,103 @@ static void set_config_filename(const char *config_filename) filename[sizeof(filename)-1] = '\0'; } +struct subtitle_part { + struct list_head entries; + const char *text; +}; +static LIST_HEAD(trail); + +static struct subtitle_list *subtitles; +static void set_subtitle(void) +{ + struct subtitle_part *sp; + struct subtitle_list *pos, *tmp; + + for (pos = subtitles; pos != NULL; pos = tmp) { + tmp = pos->next; + free(pos); + } + + subtitles = NULL; + list_for_each_entry(sp, &trail, entries) { + if (sp->text) { + if (pos) { + pos->next = xcalloc(sizeof(*pos), 1); + pos = pos->next; + } else { + subtitles = pos = xcalloc(sizeof(*pos), 1); + } + pos->text = sp->text; + } + } + + set_dialog_subtitles(subtitles); +} + +static void reset_subtitle(void) +{ + struct subtitle_list *pos, *tmp; + + for (pos = subtitles; pos != NULL; pos = tmp) { + tmp = pos->next; + free(pos); + } + subtitles = NULL; + set_dialog_subtitles(subtitles); +} + +struct search_data { + struct list_head *head; + struct menu **targets; + int *keys; +}; + +static void update_text(char *buf, size_t start, size_t end, void *_data) +{ + struct search_data *data = _data; + struct jump_key *pos; + int k = 0; + + list_for_each_entry(pos, data->head, entries) { + if (pos->offset >= start && pos->offset < end) { + char header[4]; + + if (k < JUMP_NB) { + int key = '0' + (pos->index % JUMP_NB) + 1; + + sprintf(header, "(%c)", key); + data->keys[k] = key; + data->targets[k] = pos->target; + k++; + } else { + sprintf(header, " "); + } + + memcpy(buf + pos->offset, header, sizeof(header) - 1); + } + } + data->keys[k] = 0; +} static void search_conf(void) { struct symbol **sym_arr; struct gstr res; + struct gstr title; char *dialog_input; - int dres; + int dres, vscroll = 0, hscroll = 0; + bool again; + struct gstr sttext; + struct subtitle_part stpart; + + title = str_new(); + str_printf( &title, _("Enter %s (sub)string to search for " + "(with or without \"%s\")"), CONFIG_, CONFIG_); + again: dialog_clear(); dres = dialog_inputbox(_("Search Configuration Parameter"), - _("Enter " CONFIG_ " (sub)string to search for " - "(with or without \"" CONFIG_ "\")"), + str_get(&title), 10, 75, ""); switch (dres) { case 0: @@ -321,6 +416,7 @@ again: show_helptext(_("Search Configuration"), search_help); goto again; default: + str_free(&title); return; } @@ -329,11 +425,43 @@ again: if (strncasecmp(dialog_input_result, CONFIG_, strlen(CONFIG_)) == 0) dialog_input += strlen(CONFIG_); + sttext = str_new(); + str_printf(&sttext, "Search (%s)", dialog_input_result); + stpart.text = str_get(&sttext); + list_add_tail(&stpart.entries, &trail); + sym_arr = sym_re_search(dialog_input); - res = get_relations_str(sym_arr); + do { + LIST_HEAD(head); + struct menu *targets[JUMP_NB]; + int keys[JUMP_NB + 1], i; + struct search_data data = { + .head = &head, + .targets = targets, + .keys = keys, + }; + struct jump_key *pos, *tmp; + + res = get_relations_str(sym_arr, &head); + set_subtitle(); + dres = show_textbox_ext(_("Search Results"), (char *) + str_get(&res), 0, 0, keys, &vscroll, + &hscroll, &update_text, (void *) + &data); + again = false; + for (i = 0; i < JUMP_NB && keys[i]; i++) + if (dres == keys[i]) { + conf(targets[i]->parent, targets[i]); + again = true; + } + str_free(&res); + list_for_each_entry_safe(pos, tmp, &head, entries) + free(pos); + } while (again); free(sym_arr); - show_textbox(_("Search Results"), str_get(&res), 0, 0); - str_free(&res); + str_free(&title); + list_del(trail.prev); + str_free(&sttext); } static void build_conf(struct menu *menu) @@ -514,40 +642,40 @@ conf_childs: indent -= doint; } -static void conf(struct menu *menu) +static void conf(struct menu *menu, struct menu *active_menu) { struct menu *submenu; const char *prompt = menu_get_prompt(menu); + struct subtitle_part stpart; struct symbol *sym; - struct menu *active_menu = NULL; int res; int s_scroll = 0; + if (menu != &rootmenu) + stpart.text = menu_get_prompt(menu); + else + stpart.text = NULL; + list_add_tail(&stpart.entries, &trail); + while (1) { item_reset(); current_menu = menu; build_conf(menu); if (!child_count) break; - if (menu == &rootmenu) { - item_make("--- "); - item_set_tag(':'); - item_make(_(" Load an Alternate Configuration File")); - item_set_tag('L'); - item_make(_(" Save an Alternate Configuration File")); - item_set_tag('S'); - } + set_subtitle(); dialog_clear(); res = dialog_menu(prompt ? _(prompt) : _("Main Menu"), _(menu_instructions), active_menu, &s_scroll); if (res == 1 || res == KEY_ESC || res == -ERRDISPLAYTOOSMALL) break; - if (!item_activate_selected()) - continue; - if (!item_tag()) - continue; - + if (item_count() != 0) { + if (!item_activate_selected()) + continue; + if (!item_tag()) + continue; + } submenu = item_data(); active_menu = item_data(); if (submenu) @@ -562,32 +690,36 @@ static void conf(struct menu *menu) if (single_menu_mode) submenu->data = (void *) (long) !submenu->data; else - conf(submenu); + conf(submenu, NULL); break; case 't': if (sym_is_choice(sym) && sym_get_tristate_value(sym) == yes) conf_choice(submenu); else if (submenu->prompt->type == P_MENU) - conf(submenu); + conf(submenu, NULL); break; case 's': conf_string(submenu); break; - case 'L': - conf_load(); - break; - case 'S': - conf_save(); - break; } break; case 2: if (sym) show_help(submenu); - else + else { + reset_subtitle(); show_helptext(_("README"), _(mconf_readme)); + } break; case 3: + reset_subtitle(); + conf_save(); + break; + case 4: + reset_subtitle(); + conf_load(); + break; + case 5: if (item_is_tag('t')) { if (sym_set_tristate_value(sym, yes)) break; @@ -595,34 +727,45 @@ static void conf(struct menu *menu) show_textbox(NULL, setmod_text, 6, 74); } break; - case 4: + case 6: if (item_is_tag('t')) sym_set_tristate_value(sym, no); break; - case 5: + case 7: if (item_is_tag('t')) sym_set_tristate_value(sym, mod); break; - case 6: + case 8: if (item_is_tag('t')) sym_toggle_tristate_value(sym); else if (item_is_tag('m')) - conf(submenu); + conf(submenu, NULL); break; - case 7: + case 9: search_conf(); break; - case 8: + case 10: show_all_options = !show_all_options; break; } } + + list_del(trail.prev); } -static void show_textbox(const char *title, const char *text, int r, int c) +static int show_textbox_ext(const char *title, char *text, int r, int c, int + *keys, int *vscroll, int *hscroll, update_text_fn + update_text, void *data) { dialog_clear(); - dialog_textbox(title, text, r, c); + return dialog_textbox(title, text, r, c, keys, vscroll, hscroll, + update_text, data); +} + +static void show_textbox(const char *title, const char *text, int r, int c) +{ + show_textbox_ext(title, (char *) text, r, c, (int []) {0}, NULL, NULL, + NULL, NULL); } static void show_helptext(const char *title, const char *text) @@ -630,6 +773,17 @@ static void show_helptext(const char *title, const char *text) show_textbox(title, text, 0, 0); } +static void conf_message_callback(const char *fmt, va_list ap) +{ + char buf[PATH_MAX+1]; + + vsnprintf(buf, sizeof(buf), fmt, ap); + if (save_and_exit) + printf("%s", buf); + else + show_textbox(NULL, buf, 6, 60); +} + static void show_help(struct menu *menu) { struct gstr help = str_new(); @@ -798,6 +952,8 @@ static int handle_exit(void) { int res; + save_and_exit = 1; + reset_subtitle(); dialog_clear(); if (conf_get_changed()) res = dialog_yesno(NULL, @@ -830,6 +986,8 @@ static int handle_exit(void) fprintf(stderr, _("\n\n" "Your configuration changes were NOT saved." "\n\n")); + if (res != KEY_ESC) + res = 0; } return res; @@ -860,9 +1018,6 @@ int main(int ac, char **av) single_menu_mode = 1; } - initscr(); - - getyx(stdscr, saved_y, saved_x); if (init_dialog(NULL)) { fprintf(stderr, N_("Your display is too small to run Menuconfig!\n")); fprintf(stderr, N_("It must be at least 19 lines by 80 columns.\n")); @@ -870,8 +1025,9 @@ int main(int ac, char **av) } set_config_filename(conf_get_configname()); + conf_set_message_callback(conf_message_callback); do { - conf(&rootmenu); + conf(&rootmenu, NULL); res = handle_exit(); } while (res == KEY_ESC); diff --git a/scripts/kconfig/menu.c b/scripts/kconfig/menu.c index 8c2a97e60f..fd3f0180e0 100644 --- a/scripts/kconfig/menu.c +++ b/scripts/kconfig/menu.c @@ -48,7 +48,7 @@ void menu_add_entry(struct symbol *sym) { struct menu *menu; - menu = malloc(sizeof(*menu)); + menu = xmalloc(sizeof(*menu)); memset(menu, 0, sizeof(*menu)); menu->sym = sym; menu->parent = current_menu; @@ -146,11 +146,24 @@ struct property *menu_add_prop(enum prop_type type, char *prompt, struct expr *e struct menu *menu = current_entry; while ((menu = menu->parent) != NULL) { + struct expr *dup_expr; + if (!menu->visibility) continue; + /* + * Do not add a reference to the + * menu's visibility expression but + * use a copy of it. Otherwise the + * expression reduction functions + * will modify expressions that have + * multiple references which can + * cause unwanted side effects. + */ + dup_expr = expr_copy(menu->visibility); + prop->visible.expr = expr_alloc_and(prop->visible.expr, - menu->visibility); + dup_expr); } } @@ -507,27 +520,53 @@ const char *menu_get_help(struct menu *menu) return ""; } -static void get_prompt_str(struct gstr *r, struct property *prop) +static void get_prompt_str(struct gstr *r, struct property *prop, + struct list_head *head) { int i, j; - struct menu *submenu[8], *menu; + struct menu *submenu[8], *menu, *location = NULL; + struct jump_key *jump; str_printf(r, _("Prompt: %s\n"), _(prop->text)); - str_printf(r, _(" Defined at %s:%d\n"), prop->menu->file->name, - prop->menu->lineno); - if (!expr_is_yes(prop->visible.expr)) { - str_append(r, _(" Depends on: ")); - expr_gstr_print(prop->visible.expr, r); - str_append(r, "\n"); - } menu = prop->menu->parent; - for (i = 0; menu != &rootmenu && i < 8; menu = menu->parent) + for (i = 0; menu != &rootmenu && i < 8; menu = menu->parent) { + bool accessible = menu_is_visible(menu); + submenu[i++] = menu; + if (location == NULL && accessible) + location = menu; + } + if (head && location) { + jump = xmalloc(sizeof(struct jump_key)); + + if (menu_is_visible(prop->menu)) { + /* + * There is not enough room to put the hint at the + * beginning of the "Prompt" line. Put the hint on the + * last "Location" line even when it would belong on + * the former. + */ + jump->target = prop->menu; + } else + jump->target = location; + + if (list_empty(head)) + jump->index = 0; + else + jump->index = list_entry(head->prev, struct jump_key, + entries)->index + 1; + + list_add_tail(&jump->entries, head); + } + if (i > 0) { str_printf(r, _(" Location:\n")); for (j = 4; --i >= 0; j += 2) { menu = submenu[i]; - str_printf(r, "%*c-> %s", j, ' ', _(menu_get_prompt(menu))); + if (head && location && menu == location) + jump->offset = r->len - 1; + str_printf(r, "%*c-> %s", j, ' ', + _(menu_get_prompt(menu))); if (menu->sym) { str_printf(r, " (%s [=%s])", menu->sym->name ? menu->sym->name : _("<choice>"), @@ -538,7 +577,23 @@ static void get_prompt_str(struct gstr *r, struct property *prop) } } -void get_symbol_str(struct gstr *r, struct symbol *sym) +/* + * get peoperty of type P_SYMBOL + */ +static struct property *get_symbol_prop(struct symbol *sym) +{ + struct property *prop = NULL; + + for_all_properties(sym, prop, P_SYMBOL) + break; + return prop; +} + +/* + * head is optional and may be NULL + */ +void get_symbol_str(struct gstr *r, struct symbol *sym, + struct list_head *head) { bool hit; struct property *prop; @@ -557,7 +612,19 @@ void get_symbol_str(struct gstr *r, struct symbol *sym) } } for_all_prompts(sym, prop) - get_prompt_str(r, prop); + get_prompt_str(r, prop, head); + + prop = get_symbol_prop(sym); + if (prop) { + str_printf(r, _(" Defined at %s:%d\n"), prop->menu->file->name, + prop->menu->lineno); + if (!expr_is_yes(prop->visible.expr)) { + str_append(r, _(" Depends on: ")); + expr_gstr_print(prop->visible.expr, r); + str_append(r, "\n"); + } + } + hit = false; for_all_properties(sym, prop, P_SELECT) { if (!hit) { @@ -577,14 +644,14 @@ void get_symbol_str(struct gstr *r, struct symbol *sym) str_append(r, "\n\n"); } -struct gstr get_relations_str(struct symbol **sym_arr) +struct gstr get_relations_str(struct symbol **sym_arr, struct list_head *head) { struct symbol *sym; struct gstr res = str_new(); int i; for (i = 0; sym_arr && (sym = sym_arr[i]); i++) - get_symbol_str(&res, sym); + get_symbol_str(&res, sym, head); if (!i) str_append(&res, _("No matches found.\n")); return res; @@ -603,5 +670,5 @@ void menu_get_ext_help(struct menu *menu, struct gstr *help) } str_printf(help, "%s\n", _(help_text)); if (sym) - get_symbol_str(help, sym); + get_symbol_str(help, sym, NULL); } diff --git a/scripts/kconfig/merge_config.sh b/scripts/kconfig/merge_config.sh new file mode 100755 index 0000000000..81b0c61bb9 --- /dev/null +++ b/scripts/kconfig/merge_config.sh @@ -0,0 +1,150 @@ +#!/bin/sh +# merge_config.sh - Takes a list of config fragment values, and merges +# them one by one. Provides warnings on overridden values, and specified +# values that did not make it to the resulting .config file (due to missed +# dependencies or config symbol removal). +# +# Portions reused from kconf_check and generate_cfg: +# http://git.yoctoproject.org/cgit/cgit.cgi/yocto-kernel-tools/tree/tools/kconf_check +# http://git.yoctoproject.org/cgit/cgit.cgi/yocto-kernel-tools/tree/tools/generate_cfg +# +# Copyright (c) 2009-2010 Wind River Systems, Inc. +# Copyright 2011 Linaro +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. +# See the GNU General Public License for more details. + +clean_up() { + rm -f $TMP_FILE + exit +} +trap clean_up HUP INT TERM + +usage() { + echo "Usage: $0 [OPTIONS] [CONFIG [...]]" + echo " -h display this help text" + echo " -m only merge the fragments, do not execute the make command" + echo " -n use allnoconfig instead of alldefconfig" + echo " -r list redundant entries when merging fragments" + echo " -O dir to put generated output files" +} + +MAKE=true +ALLTARGET=alldefconfig +WARNREDUN=false +OUTPUT=. + +while true; do + case $1 in + "-n") + ALLTARGET=allnoconfig + shift + continue + ;; + "-m") + MAKE=false + shift + continue + ;; + "-h") + usage + exit + ;; + "-r") + WARNREDUN=true + shift + continue + ;; + "-O") + if [ -d $2 ];then + OUTPUT=$(echo $2 | sed 's/\/*$//') + else + echo "output directory $2 does not exist" 1>&2 + exit 1 + fi + shift 2 + continue + ;; + *) + break + ;; + esac +done + +INITFILE=$1 +shift; + +MERGE_LIST=$* +SED_CONFIG_EXP="s/^\(# \)\{0,1\}\(CONFIG_[a-zA-Z0-9_]*\)[= ].*/\2/p" +TMP_FILE=$(mktemp ./.tmp.config.XXXXXXXXXX) + +echo "Using $INITFILE as base" +cat $INITFILE > $TMP_FILE + +# Merge files, printing warnings on overrided values +for MERGE_FILE in $MERGE_LIST ; do + echo "Merging $MERGE_FILE" + CFG_LIST=$(sed -n "$SED_CONFIG_EXP" $MERGE_FILE) + + for CFG in $CFG_LIST ; do + grep -q -w $CFG $TMP_FILE + if [ $? -eq 0 ] ; then + PREV_VAL=$(grep -w $CFG $TMP_FILE) + NEW_VAL=$(grep -w $CFG $MERGE_FILE) + if [ "x$PREV_VAL" != "x$NEW_VAL" ] ; then + echo Value of $CFG is redefined by fragment $MERGE_FILE: + echo Previous value: $PREV_VAL + echo New value: $NEW_VAL + echo + elif [ "$WARNREDUN" = "true" ]; then + echo Value of $CFG is redundant by fragment $MERGE_FILE: + fi + sed -i "/$CFG[ =]/d" $TMP_FILE + fi + done + cat $MERGE_FILE >> $TMP_FILE +done + +if [ "$MAKE" = "false" ]; then + cp $TMP_FILE $OUTPUT/.config + echo "#" + echo "# merged configuration written to $OUTPUT/.config (needs make)" + echo "#" + clean_up + exit +fi + +# If we have an output dir, setup the O= argument, otherwise leave +# it blank, since O=. will create an unnecessary ./source softlink +OUTPUT_ARG="" +if [ "$OUTPUT" != "." ] ; then + OUTPUT_ARG="O=$OUTPUT" +fi + + +# Use the merged file as the starting point for: +# alldefconfig: Fills in any missing symbols with Kconfig default +# allnoconfig: Fills in any missing symbols with # CONFIG_* is not set +make KCONFIG_ALLCONFIG=$TMP_FILE $OUTPUT_ARG $ALLTARGET + + +# Check all specified config values took (might have missed-dependency issues) +for CFG in $(sed -n "$SED_CONFIG_EXP" $TMP_FILE); do + + REQUESTED_VAL=$(grep -w -e "$CFG" $TMP_FILE) + ACTUAL_VAL=$(grep -w -e "$CFG" $OUTPUT/.config) + if [ "x$REQUESTED_VAL" != "x$ACTUAL_VAL" ] ; then + echo "Value requested for $CFG not in final .config" + echo "Requested value: $REQUESTED_VAL" + echo "Actual value: $ACTUAL_VAL" + echo "" + fi +done + +clean_up diff --git a/scripts/kconfig/nconf.c b/scripts/kconfig/nconf.c index 73070cb0b6..dbf31edd22 100644 --- a/scripts/kconfig/nconf.c +++ b/scripts/kconfig/nconf.c @@ -7,215 +7,208 @@ */ #define _GNU_SOURCE #include <string.h> +#include <stdlib.h> #include "lkc.h" #include "nconf.h" #include <ctype.h> -static const char nconf_readme[] = N_( -"Overview\n" -"--------\n" -"This interface let you select features and parameters for the build.\n" -"Features can either be built-in, modularized, or ignored. Parameters\n" -"must be entered in as decimal or hexadecimal numbers or text.\n" +static const char nconf_global_help[] = N_( +"Help windows\n" +"------------\n" +"o Global help: Unless in a data entry window, pressing <F1> will give \n" +" you the global help window, which you are just reading.\n" "\n" -"Menu items beginning with following braces represent features that\n" -" [ ] can be built in or removed\n" -" < > can be built in, modularized or removed\n" -" { } can be built in or modularized (selected by other feature)\n" -" - - are selected by other feature,\n" -" XXX cannot be selected. Use Symbol Info to find out why,\n" -"while *, M or whitespace inside braces means to build in, build as\n" -"a module or to exclude the feature respectively.\n" +"o A short version of the global help is available by pressing <F3>.\n" "\n" -"To change any of these features, highlight it with the cursor\n" -"keys and press <Y> to build it in, <M> to make it a module or\n" -"<N> to removed it. You may also press the <Space Bar> to cycle\n" -"through the available options (ie. Y->N->M->Y).\n" +"o Local help: To get help related to the current menu entry, use any\n" +" of <?> <h>, or if in a data entry window then press <F1>.\n" "\n" -"Some additional keyboard hints:\n" "\n" -"Menus\n" -"----------\n" -"o Use the Up/Down arrow keys (cursor keys) to highlight the item\n" -" you wish to change use <Enter> or <Space>. Goto submenu by \n" -" pressing <Enter> of <right-arrow>. Use <Esc> or <left-arrow> to go back.\n" -" Submenus are designated by \"--->\".\n" -"\n" -" Searching: pressing '/' triggers interactive search mode.\n" -" nconfig performs a case insensitive search for the string\n" -" in the menu prompts (no regex support).\n" -" Pressing the up/down keys highlights the previous/next\n" -" matching item. Backspace removes one character from the\n" -" match string. Pressing either '/' again or ESC exits\n" -" search mode. All other keys behave normally.\n" +"Menu entries\n" +"------------\n" +"This interface lets you select features and parameters for the kernel\n" +"build. Kernel features can either be built-in, modularized, or removed.\n" +"Parameters must be entered as text or decimal or hexadecimal numbers.\n" "\n" -" You may also use the <PAGE UP> and <PAGE DOWN> keys to scroll\n" -" unseen options into view.\n" +"Menu entries beginning with following braces represent features that\n" +" [ ] can be built in or removed\n" +" < > can be built in, modularized or removed\n" +" { } can be built in or modularized, are selected by another feature\n" +" - - are selected by another feature\n" +" XXX cannot be selected. Symbol Info <F2> tells you why.\n" +"*, M or whitespace inside braces means to build in, build as a module\n" +"or to exclude the feature respectively.\n" "\n" -"o To exit a menu use the just press <ESC> <F5> <F8> or <left-arrow>.\n" +"To change any of these features, highlight it with the movement keys\n" +"listed below and press <y> to build it in, <m> to make it a module or\n" +"<n> to remove it. You may press the <Space> key to cycle through the\n" +"available options.\n" "\n" -"o To get help with an item, press <F1>\n" -" Shortcut: Press <h> or <?>.\n" +"A trailing \"--->\" designates a submenu.\n" "\n" "\n" -"Radiolists (Choice lists)\n" -"-----------\n" -"o Use the cursor keys to select the option you wish to set and press\n" -" <S> or the <SPACE BAR>.\n" +"Menu navigation keys\n" +"----------------------------------------------------------------------\n" +"Linewise up <Up>\n" +"Linewise down <Down>\n" +"Pagewise up <Page Up>\n" +"Pagewise down <Page Down>\n" +"First entry <Home>\n" +"Last entry <End>\n" +"Enter a submenu <Right> <Enter>\n" +"Go back to parent menu <Left> <Esc> <F5>\n" +"Close a help window <Enter> <Esc> <F5>\n" +"Close entry window, apply <Enter>\n" +"Close entry window, forget <Esc> <F5>\n" +"Start incremental, case-insensitive search for STRING in menu entries,\n" +" no regex support, STRING is displayed in upper left corner\n" +" </>STRING\n" +" Remove last character <Backspace>\n" +" Jump to next hit <Down>\n" +" Jump to previous hit <Up>\n" +"Exit menu search mode </> <Esc>\n" +"Search for configuration variables with or without leading CONFIG_\n" +" <F8>RegExpr<Enter>\n" +"Verbose search help <F8><F1>\n" +"----------------------------------------------------------------------\n" "\n" -" Shortcut: Press the first letter of the option you wish to set then\n" -" press <S> or <SPACE BAR>.\n" +"Unless in a data entry window, key <1> may be used instead of <F1>,\n" +"<2> instead of <F2>, etc.\n" "\n" -"o To see available help for the item, press <F1>\n" -" Shortcut: Press <H> or <?>.\n" "\n" +"Radiolist (Choice list)\n" +"-----------------------\n" +"Use the movement keys listed above to select the option you wish to set\n" +"and press <Space>.\n" "\n" -"Data Entry\n" -"-----------\n" -"o Enter the requested information and press <ENTER>\n" -" If you are entering hexadecimal values, it is not necessary to\n" -" add the '0x' prefix to the entry.\n" "\n" -"o For help, press <F1>.\n" +"Data entry\n" +"----------\n" +"Enter the requested information and press <Enter>. Hexadecimal values\n" +"may be entered without the \"0x\" prefix.\n" "\n" "\n" -"Text Box (Help Window)\n" -"--------\n" -"o Use the cursor keys to scroll up/down/left/right. The VI editor\n" -" keys h,j,k,l function here as do <SPACE BAR> for those\n" -" who are familiar with less and lynx.\n" +"Text Box (Help Window)\n" +"----------------------\n" +"Use movement keys as listed in table above.\n" "\n" -"o Press <Enter>, <F1>, <F5>, <F7> or <Esc> to exit.\n" +"Press any of <Enter> <Esc> <q> <F5> <F9> to exit.\n" "\n" "\n" -"Alternate Configuration Files\n" +"Alternate configuration files\n" "-----------------------------\n" -"nconfig supports the use of alternate configuration files for\n" -"those who, for various reasons, find it necessary to switch\n" -"between different configurations.\n" +"nconfig supports switching between different configurations.\n" +"Press <F6> to save your current configuration. Press <F7> and enter\n" +"a file name to load a previously saved configuration.\n" "\n" -"At the end of the main menu you will find two options. One is\n" -"for saving the current configuration to a file of your choosing.\n" -"The other option is for loading a previously saved alternate\n" -"configuration.\n" "\n" -"Even if you don't use alternate configuration files, but you\n" -"find during a nconfig session that you have completely messed\n" -"up your settings, you may use the \"Load Alternate...\" option to\n" -"restore your previously saved settings from \".config\" without\n" -"restarting nconfig.\n" +"Terminal configuration\n" +"----------------------\n" +"If you use nconfig in a xterm window, make sure your TERM environment\n" +"variable specifies a terminal configuration which supports at least\n" +"16 colors. Otherwise nconfig will look rather bad.\n" "\n" -"Other information\n" -"-----------------\n" -"If you use nconfig in an XTERM window make sure you have your\n" -"$TERM variable set to point to a xterm definition which supports color.\n" -"Otherwise, nconfig will look rather bad. nconfig will not\n" -"display correctly in a RXVT window because rxvt displays only one\n" -"intensity of color, bright.\n" +"If the \"stty size\" command reports the current terminalsize correctly,\n" +"nconfig will adapt to sizes larger than the traditional 80x25 \"standard\"\n" +"and display longer menus properly.\n" "\n" -"nconfig will display larger menus on screens or xterms which are\n" -"set to display more than the standard 25 row by 80 column geometry.\n" -"In order for this to work, the \"stty size\" command must be able to\n" -"display the screen's current row and column geometry. I STRONGLY\n" -"RECOMMEND that you make sure you do NOT have the shell variables\n" -"LINES and COLUMNS exported into your environment. Some distributions\n" -"export those variables via /etc/profile. Some ncurses programs can\n" -"become confused when those variables (LINES & COLUMNS) don't reflect\n" -"the true screen size.\n" "\n" -"Optional personality available\n" -"------------------------------\n" -"If you prefer to have all of the options listed in a single menu, rather\n" -"than the default multimenu hierarchy, run the nconfig with NCONFIG_MODE\n" -"environment variable set to single_menu. Example:\n" +"Single menu mode\n" +"----------------\n" +"If you prefer to have all of the menu entries listed in a single menu,\n" +"rather than the default multimenu hierarchy, run nconfig with\n" +"NCONFIG_MODE environment variable set to single_menu. Example:\n" "\n" "make NCONFIG_MODE=single_menu nconfig\n" "\n" -"<Enter> will then unroll the appropriate category, or enfold it if it\n" -"is already unrolled.\n" +"<Enter> will then unfold the appropriate category, or fold it if it\n" +"is already unfolded. Folded menu entries will be designated by a\n" +"leading \"++>\" and unfolded entries by a leading \"-->\".\n" "\n" -"Note that this mode can eventually be a little more CPU expensive\n" -"(especially with a larger number of unrolled categories) than the\n" -"default mode.\n" +"Note that this mode can eventually be a little more CPU expensive than\n" +"the default mode, especially with a larger number of unfolded submenus.\n" "\n"), menu_no_f_instructions[] = N_( -" You do not have function keys support. Please follow the\n" -" following instructions:\n" -" Arrow keys navigate the menu.\n" -" <Enter> or <right-arrow> selects submenus --->.\n" -" Capital Letters are hotkeys.\n" -" Pressing <Y> includes, <N> excludes, <M> modularizes features.\n" -" Pressing SpaceBar toggles between the above options.\n" -" Press <Esc> or <left-arrow> to go back one menu,\n" -" <?> or <h> for Help, </> for Search.\n" -" <1> is interchangeable with <F1>, <2> with <F2>, etc.\n" -" Legend: [*] built-in [ ] excluded <M> module < > module capable.\n" -" <Esc> always leaves the current window.\n"), +"Legend: [*] built-in [ ] excluded <M> module < > module capable.\n" +"Submenus are designated by a trailing \"--->\".\n" +"\n" +"Use the following keys to navigate the menus:\n" +"Move up or down with <Up> and <Down>.\n" +"Enter a submenu with <Enter> or <Right>.\n" +"Exit a submenu to its parent menu with <Esc> or <Left>.\n" +"Pressing <y> includes, <n> excludes, <m> modularizes features.\n" +"Pressing <Space> cycles through the available options.\n" +"To search for menu entries press </>.\n" +"<Esc> always leaves the current window.\n" +"\n" +"You do not have function keys support.\n" +"Press <1> instead of <F1>, <2> instead of <F2>, etc.\n" +"For verbose global help use key <1>.\n" +"For help related to the current menu entry press <?> or <h>.\n"), menu_instructions[] = N_( -" Arrow keys navigate the menu.\n" -" <Enter> or <right-arrow> selects submenus --->.\n" -" Capital Letters are hotkeys.\n" -" Pressing <Y> includes, <N> excludes, <M> modularizes features.\n" -" Pressing SpaceBar toggles between the above options\n" -" Press <Esc>, <F5> or <left-arrow> to go back one menu,\n" -" <?>, <F1> or <h> for Help, </> for Search.\n" -" <1> is interchangeable with <F1>, <2> with <F2>, etc.\n" -" Legend: [*] built-in [ ] excluded <M> module < > module capable.\n" -" <Esc> always leaves the current window\n"), +"Legend: [*] built-in [ ] excluded <M> module < > module capable.\n" +"Submenus are designated by a trailing \"--->\".\n" +"\n" +"Use the following keys to navigate the menus:\n" +"Move up or down with <Up> or <Down>.\n" +"Enter a submenu with <Enter> or <Right>.\n" +"Exit a submenu to its parent menu with <Esc> or <Left>.\n" +"Pressing <y> includes, <n> excludes, <m> modularizes features.\n" +"Pressing <Space> cycles through the available options.\n" +"To search for menu entries press </>.\n" +"<Esc> always leaves the current window.\n" +"\n" +"Pressing <1> may be used instead of <F1>, <2> instead of <F2>, etc.\n" +"For verbose global help press <F1>.\n" +"For help related to the current menu entry press <?> or <h>.\n"), radiolist_instructions[] = N_( -" Use the arrow keys to navigate this window or\n" -" press the hotkey of the item you wish to select\n" -" followed by the <SPACE BAR>.\n" -" Press <?>, <F1> or <h> for additional information about this option.\n"), +"Press <Up>, <Down>, <Home> or <End> to navigate a radiolist, select\n" +"with <Space>.\n" +"For help related to the current entry press <?> or <h>.\n" +"For global help press <F1>.\n"), inputbox_instructions_int[] = N_( "Please enter a decimal value.\n" "Fractions will not be accepted.\n" -"Press <RETURN> to accept, <ESC> to cancel."), +"Press <Enter> to apply, <Esc> to cancel."), inputbox_instructions_hex[] = N_( "Please enter a hexadecimal value.\n" -"Press <RETURN> to accept, <ESC> to cancel."), +"Press <Enter> to apply, <Esc> to cancel."), inputbox_instructions_string[] = N_( "Please enter a string value.\n" -"Press <RETURN> to accept, <ESC> to cancel."), +"Press <Enter> to apply, <Esc> to cancel."), setmod_text[] = N_( -"This feature depends on another which\n" -"has been configured as a module.\n" -"As a result, this feature will be built as a module."), +"This feature depends on another feature which has been configured as a\n" +"module. As a result, the current feature will be built as a module too."), load_config_text[] = N_( "Enter the name of the configuration file you wish to load.\n" -"Accept the name shown to restore the configuration you\n" -"last retrieved. Leave blank to abort."), +"Accept the name shown to restore the configuration you last\n" +"retrieved. Leave empty to abort."), load_config_help[] = N_( -"\n" "For various reasons, one may wish to keep several different\n" "configurations available on a single machine.\n" "\n" "If you have saved a previous configuration in a file other than the\n" -"default one, entering its name here will allow you to modify that\n" -"configuration.\n" +"default one, entering its name here will allow you to load and modify\n" +"that configuration.\n" "\n" -"If you are uncertain, then you have probably never used alternate\n" -"configuration files. You should therefor leave this blank to abort.\n"), +"Leave empty to abort.\n"), save_config_text[] = N_( "Enter a filename to which this configuration should be saved\n" -"as an alternate. Leave blank to abort."), +"as an alternate. Leave empty to abort."), save_config_help[] = N_( -"\n" -"For various reasons, one may wish to keep different configurations\n" -"available on a single machine.\n" +"For various reasons, one may wish to keep several different\n" +"configurations available on a single machine.\n" "\n" "Entering a file name here will allow you to later retrieve, modify\n" "and use the current configuration as an alternate to whatever\n" "configuration options you have selected at that time.\n" "\n" -"If you are uncertain what all this means then you should probably\n" -"leave this blank.\n"), +"Leave empty to abort.\n"), search_help[] = N_( -"\n" -"Search for symbols and display their relations. Regular expressions\n" -"are allowed.\n" -"Example: search for \"^FOO\"\n" +"Search for symbols (configuration variable names CONFIG_*) and display\n" +"their relations. Regular expressions are supported.\n" +"Example: Search for \"^FOO\".\n" "Result:\n" "-----------------------------------------------------------------\n" "Symbol: FOO [ = m]\n" @@ -223,32 +216,32 @@ search_help[] = N_( "Defined at drivers/pci/Kconfig:47\n" "Depends on: X86_LOCAL_APIC && X86_IO_APIC || IA64\n" "Location:\n" -" -> Bus options (PCI, PCMCIA, EISA, MCA, ISA)\n" +" -> Bus options (PCI, PCMCIA, EISA, ISA)\n" " -> PCI support (PCI [ = y])\n" " -> PCI access mode (<choice> [ = y])\n" "Selects: LIBCRC32\n" "Selected by: BAR\n" "-----------------------------------------------------------------\n" -"o The line 'Prompt:' shows the text used in the menu structure for\n" -" this symbol\n" -"o The 'Defined at' line tell at what file / line number the symbol\n" -" is defined\n" -"o The 'Depends on:' line tell what symbols needs to be defined for\n" -" this symbol to be visible in the menu (selectable)\n" -"o The 'Location:' lines tell where in the menu structure this symbol\n" -" is located\n" -" A location followed by a [ = y] indicate that this is a selectable\n" -" menu item - and current value is displayed inside brackets.\n" -"o The 'Selects:' line tell what symbol will be automatically\n" -" selected if this symbol is selected (y or m)\n" -"o The 'Selected by' line tell what symbol has selected this symbol\n" +"o The line 'Prompt:' shows the text displayed for this symbol in\n" +" the menu hierarchy.\n" +"o The 'Defined at' line tells at what file / line number the symbol is\n" +" defined.\n" +"o The 'Depends on:' line lists symbols that need to be defined for\n" +" this symbol to be visible and selectable in the menu.\n" +"o The 'Location:' lines tell, where in the menu structure this symbol\n" +" is located. A location followed by a [ = y] indicates that this is\n" +" a selectable menu item, and the current value is displayed inside\n" +" brackets.\n" +"o The 'Selects:' line tells, what symbol will be automatically selected\n" +" if this symbol is selected (y or m).\n" +"o The 'Selected by' line tells what symbol has selected this symbol.\n" "\n" "Only relevant lines are shown.\n" "\n\n" "Search examples:\n" -"Examples: USB => find all symbols containing USB\n" -" ^USB => find all symbols starting with USB\n" -" USB$ => find all symbols ending with USB\n" +"USB => find all symbols containing USB\n" +"^USB => find all symbols starting with USB\n" +"USB$ => find all symbols ending with USB\n" "\n"); struct mitem { @@ -319,19 +312,19 @@ struct function_keys function_keys[] = { }, { .key_str = "F2", - .func = "Sym Info", + .func = "SymInfo", .key = F_SYMBOL, .handler = handle_f2, }, { .key_str = "F3", - .func = "Insts", + .func = "Help 2", .key = F_INSTS, .handler = handle_f3, }, { .key_str = "F4", - .func = "Config", + .func = "ShowAll", .key = F_CONF, .handler = handle_f4, }, @@ -355,7 +348,7 @@ struct function_keys function_keys[] = { }, { .key_str = "F8", - .func = "Sym Search", + .func = "SymSearch", .key = F_SEARCH, .handler = handle_f8, }, @@ -392,7 +385,7 @@ static void print_function_line(void) static void handle_f1(int *key, struct menu *current_item) { show_scroll_win(main_window, - _("README"), _(nconf_readme)); + _("Global help"), _(nconf_global_help)); return; } @@ -407,7 +400,7 @@ static void handle_f2(int *key, struct menu *current_item) static void handle_f3(int *key, struct menu *current_item) { show_scroll_win(main_window, - _("Instructions"), + _("Short help"), _(current_instructions)); return; } @@ -696,13 +689,18 @@ static void search_conf(void) { struct symbol **sym_arr; struct gstr res; + struct gstr title; char *dialog_input; int dres; + + title = str_new(); + str_printf( &title, _("Enter %s (sub)string to search for " + "(with or without \"%s\")"), CONFIG_, CONFIG_); + again: dres = dialog_inputbox(main_window, _("Search Configuration Parameter"), - _("Enter " CONFIG_ " (sub)string to search for " - "(with or without \"" CONFIG_ "\")"), + str_get(&title), "", &dialog_input_result, &dialog_input_result_len); switch (dres) { case 0: @@ -712,6 +710,7 @@ again: _("Search Configuration"), search_help); goto again; default: + str_free(&title); return; } @@ -721,11 +720,12 @@ again: dialog_input += strlen(CONFIG_); sym_arr = sym_re_search(dialog_input); - res = get_relations_str(sym_arr); + res = get_relations_str(sym_arr, NULL); free(sym_arr); show_scroll_win(main_window, _("Search Results"), str_get(&res)); str_free(&res); + str_free(&title); } @@ -1503,7 +1503,11 @@ int main(int ac, char **av) } notimeout(stdscr, FALSE); +#if NCURSES_REENTRANT + set_escdelay(1); +#else ESCDELAY = 1; +#endif /* set btns menu */ curses_menu = new_menu(curses_menu_items); diff --git a/scripts/kconfig/nconf.gui.c b/scripts/kconfig/nconf.gui.c index 3b18dd8396..9f8c44ecc7 100644 --- a/scripts/kconfig/nconf.gui.c +++ b/scripts/kconfig/nconf.gui.c @@ -48,7 +48,7 @@ static void set_normal_colors(void) init_pair(INPUT_FIELD, -1, -1); init_pair(FUNCTION_HIGHLIGHT, -1, -1); - init_pair(FUNCTION_TEXT, COLOR_BLUE, -1); + init_pair(FUNCTION_TEXT, COLOR_YELLOW, -1); } /* available attributes: @@ -604,9 +604,11 @@ void show_scroll_win(WINDOW *main_window, switch (res) { case KEY_NPAGE: case ' ': + case 'd': start_y += text_lines-2; break; case KEY_PPAGE: + case 'u': start_y -= text_lines+2; break; case KEY_HOME: @@ -632,10 +634,10 @@ void show_scroll_win(WINDOW *main_window, start_x++; break; } - if (res == 10 || res == 27 || res == 'q' - || res == KEY_F(F_BACK) || res == KEY_F(F_EXIT)) { + if (res == 10 || res == 27 || res == 'q' || + res == KEY_F(F_HELP) || res == KEY_F(F_BACK) || + res == KEY_F(F_EXIT)) break; - } if (start_y < 0) start_y = 0; if (start_y >= total_lines-text_lines) diff --git a/scripts/kconfig/qconf.cc b/scripts/kconfig/qconf.cc index df274febb3..1500c38f0c 100644 --- a/scripts/kconfig/qconf.cc +++ b/scripts/kconfig/qconf.cc @@ -6,6 +6,7 @@ #include <qglobal.h> #if QT_VERSION < 0x040000 +#include <stddef.h> #include <qmainwindow.h> #include <qvbox.h> #include <qvaluelist.h> diff --git a/scripts/kconfig/streamline_config.pl b/scripts/kconfig/streamline_config.pl index ec7afce4c8..060694f5e9 100644 --- a/scripts/kconfig/streamline_config.pl +++ b/scripts/kconfig/streamline_config.pl @@ -45,6 +45,16 @@ use strict; use Getopt::Long; +# set the environment variable LOCALMODCONFIG_DEBUG to get +# debug output. +my $debugprint = 0; +$debugprint = 1 if (defined($ENV{LOCALMODCONFIG_DEBUG})); + +sub dprint { + return if (!$debugprint); + print STDERR @_; +} + my $config = ".config"; my $uname = `uname -r`; @@ -90,7 +100,7 @@ my @searchconfigs = ( }, ); -sub find_config { +sub read_config { foreach my $conf (@searchconfigs) { my $file = $conf->{"file"}; @@ -105,13 +115,15 @@ sub find_config { print STDERR "using config: '$file'\n"; - open(CIN, "$exec $file |") || die "Failed to run $exec $file"; - return; + open(my $infile, '-|', "$exec $file") || die "Failed to run $exec $file"; + my @x = <$infile>; + close $infile; + return @x; } die "No config file found"; } -find_config; +my @config_file = read_config; # Parse options my $localmodconfig = 0; @@ -121,7 +133,7 @@ GetOptions("localmodconfig" => \$localmodconfig, "localyesconfig" => \$localyesconfig); # Get the build source and top level Kconfig file (passed in) -my $ksource = $ARGV[0]; +my $ksource = ($ARGV[0] ? $ARGV[0] : '.'); my $kconfig = $ARGV[1]; my $lsmod_file = $ENV{'LSMOD'}; @@ -144,7 +156,6 @@ sub read_kconfig { my $state = "NONE"; my $config; - my @kconfigs; my $cont = 0; my $line; @@ -159,8 +170,8 @@ sub read_kconfig { $source =~ s/\$$env/$ENV{$env}/; } - open(KIN, "$source") || die "Can't open $kconfig"; - while (<KIN>) { + open(my $kinfile, '<', $source) || die "Can't open $kconfig"; + while (<$kinfile>) { chomp; # Make sure that lines ending with \ continue @@ -178,7 +189,13 @@ sub read_kconfig { # collect any Kconfig sources if (/^source\s*"(.*)"/) { - $kconfigs[$#kconfigs+1] = $1; + my $kconfig = $1; + # prevent reading twice. + if (!defined($read_kconfigs{$kconfig})) { + $read_kconfigs{$kconfig} = 1; + read_kconfig($kconfig); + } + next; } # configs found @@ -186,6 +203,7 @@ sub read_kconfig { $state = "NEW"; $config = $2; + # Add depends for 'if' nesting for (my $i = 0; $i < $iflevel; $i++) { if ($i) { $depends{$config} .= " " . $ifdeps[$i]; @@ -204,10 +222,11 @@ sub read_kconfig { # Get the configs that select this config } elsif ($state ne "NONE" && /^\s*select\s+(\S+)/) { - if (defined($selects{$1})) { - $selects{$1} .= " " . $config; + my $conf = $1; + if (defined($selects{$conf})) { + $selects{$conf} .= " " . $config; } else { - $selects{$1} = $config; + $selects{$conf} = $config; } # configs without prompts must be selected @@ -235,48 +254,70 @@ sub read_kconfig { $state = "NONE"; } } - close(KIN); - - # read in any configs that were found. - foreach $kconfig (@kconfigs) { - if (!defined($read_kconfigs{$kconfig})) { - $read_kconfigs{$kconfig} = 1; - read_kconfig($kconfig); - } - } + close($kinfile); } if ($kconfig) { read_kconfig($kconfig); } +# Makefiles can use variables to define their dependencies +sub convert_vars { + my ($line, %vars) = @_; + + my $process = ""; + + while ($line =~ s/^(.*?)(\$\((.*?)\))//) { + my $start = $1; + my $variable = $2; + my $var = $3; + + if (defined($vars{$var})) { + $process .= $start . $vars{$var}; + } else { + $process .= $start . $variable; + } + } + + $process .= $line; + + return $process; +} + # Read all Makefiles to map the configs to the objects foreach my $makefile (@makefiles) { - my $cont = 0; + my $line = ""; + my %make_vars; + + open(my $infile, '<', $makefile) || die "Can't open $makefile"; + while (<$infile>) { + # if this line ends with a backslash, continue + chomp; + if (/^(.*)\\$/) { + $line .= $1; + next; + } + + $line .= $_; + $_ = $line; + $line = ""; - open(MIN,$makefile) || die "Can't open $makefile"; - while (<MIN>) { my $objs; - # is this a line after a line with a backslash? - if ($cont && /(\S.*)$/) { - $objs = $1; - } - $cont = 0; + # Convert variables in a line (could define configs) + $_ = convert_vars($_, %make_vars); # collect objects after obj-$(CONFIG_FOO_BAR) if (/obj-\$\((CONFIG_[^\)]*)\)\s*[+:]?=\s*(.*)/) { $var = $1; $objs = $2; + + # check if variables are set + } elsif (/^\s*(\S+)\s*[:]?=\s*(.*\S)/) { + $make_vars{$1} = $2; } if (defined($objs)) { - # test if the line ends with a backslash - if ($objs =~ m,(.*)\\$,) { - $objs = $1; - $cont = 1; - } - foreach my $obj (split /\s+/,$objs) { $obj =~ s/-/_/g; if ($obj =~ /(.*)\.o$/) { @@ -297,10 +338,11 @@ foreach my $makefile (@makefiles) { } } } - close(MIN); + close($infile); } my %modules; +my $linfile; if (defined($lsmod_file)) { if ( ! -f $lsmod_file) { @@ -310,13 +352,10 @@ if (defined($lsmod_file)) { die "$lsmod_file not found"; } } - if ( -x $lsmod_file) { - # the file is executable, run it - open(LIN, "$lsmod_file|"); - } else { - # Just read the contents - open(LIN, "$lsmod_file"); - } + + my $otype = ( -x $lsmod_file) ? '-|' : '<'; + open($linfile, $otype, $lsmod_file); + } else { # see what modules are loaded on this system @@ -333,25 +372,36 @@ if (defined($lsmod_file)) { $lsmod = "lsmod"; } - open(LIN,"$lsmod|") || die "Can not call lsmod with $lsmod"; + open($linfile, '-|', $lsmod) || die "Can not call lsmod with $lsmod"; } -while (<LIN>) { +while (<$linfile>) { next if (/^Module/); # Skip the first line. if (/^(\S+)/) { $modules{$1} = 1; } } -close (LIN); +close ($linfile); # add to the configs hash all configs that are needed to enable -# a loaded module. +# a loaded module. This is a direct obj-${CONFIG_FOO} += bar.o +# where we know we need bar.o so we add FOO to the list. my %configs; foreach my $module (keys(%modules)) { if (defined($objects{$module})) { my @arr = @{$objects{$module}}; foreach my $conf (@arr) { $configs{$conf} = $module; + dprint "$conf added by direct ($module)\n"; + if ($debugprint) { + my $c=$conf; + $c =~ s/^CONFIG_//; + if (defined($depends{$c})) { + dprint " deps = $depends{$c}\n"; + } else { + dprint " no deps\n"; + } + } } } else { # Most likely, someone has a custom (binary?) module loaded. @@ -359,9 +409,24 @@ foreach my $module (keys(%modules)) { } } +# Read the current config, and see what is enabled. We want to +# ignore configs that we would not enable anyway. + +my %orig_configs; my $valid = "A-Za-z_0-9"; + +foreach my $line (@config_file) { + $_ = $line; + + if (/(CONFIG_[$valid]*)=(m|y)/) { + $orig_configs{$1} = $2; + } +} + my $repeat = 1; +my $depconfig; + # # Note, we do not care about operands (like: &&, ||, !) we want to add any # config that is in the depend list of another config. This script does @@ -370,7 +435,7 @@ my $repeat = 1; # to keep on. If A was on in the original config, B would not have been # and B would not be turned on by this script. # -sub parse_config_dep_select +sub parse_config_depends { my ($p) = @_; @@ -381,10 +446,16 @@ sub parse_config_dep_select $p =~ s/^[^$valid]*[$valid]+//; + # We only need to process if the depend config is a module + if (!defined($orig_configs{$conf}) || !$orig_configs{conf} eq "m") { + next; + } + if (!defined($configs{$conf})) { # We must make sure that this config has its # dependencies met. $repeat = 1; # do again + dprint "$conf selected by depend $depconfig\n"; $configs{$conf} = 1; } } else { @@ -393,31 +464,132 @@ sub parse_config_dep_select } } -while ($repeat) { - $repeat = 0; +# Select is treated a bit differently than depends. We call this +# when a config has no prompt and requires another config to be +# selected. We use to just select all configs that selected this +# config, but found that that can balloon into enabling hundreds +# of configs that we do not care about. +# +# The idea is we look at all the configs that select it. If one +# is already in our list of configs to enable, then there's nothing +# else to do. If there isn't, we pick the first config that was +# enabled in the orignal config and use that. +sub parse_config_selects +{ + my ($config, $p) = @_; - foreach my $config (keys %configs) { - $config =~ s/^CONFIG_//; + my $next_config; + + while ($p =~ /[$valid]/) { + + if ($p =~ /^[^$valid]*([$valid]+)/) { + my $conf = "CONFIG_" . $1; + + $p =~ s/^[^$valid]*[$valid]+//; + + # Make sure that this config exists in the current .config file + if (!defined($orig_configs{$conf})) { + dprint "$conf not set for $config select\n"; + next; + } - if (defined($depends{$config})) { - # This config has dependencies. Make sure they are also included - parse_config_dep_select $depends{$config}; + # Check if something other than a module selects this config + if (defined($orig_configs{$conf}) && $orig_configs{$conf} ne "m") { + dprint "$conf (non module) selects config, we are good\n"; + # we are good with this + return; + } + if (defined($configs{$conf})) { + dprint "$conf selects $config so we are good\n"; + # A set config selects this config, we are good + return; + } + # Set this config to be selected + if (!defined($next_config)) { + $next_config = $conf; + } + } else { + die "this should never happen"; } + } - if (defined($prompts{$config}) || !defined($selects{$config})) { - next; + # If no possible config selected this, then something happened. + if (!defined($next_config)) { + print STDERR "WARNING: $config is required, but nothing in the\n"; + print STDERR " current config selects it.\n"; + return; + } + + # If we are here, then we found no config that is set and + # selects this config. Repeat. + $repeat = 1; + # Make this config need to be selected + $configs{$next_config} = 1; + dprint "$next_config selected by select $config\n"; +} + +my %process_selects; + +# loop through all configs, select their dependencies. +sub loop_depend { + $repeat = 1; + + while ($repeat) { + $repeat = 0; + + forloop: + foreach my $config (keys %configs) { + + # If this config is not a module, we do not need to process it + if (defined($orig_configs{$config}) && $orig_configs{$config} ne "m") { + next forloop; + } + + $config =~ s/^CONFIG_//; + $depconfig = $config; + + if (defined($depends{$config})) { + # This config has dependencies. Make sure they are also included + parse_config_depends $depends{$config}; + } + + # If the config has no prompt, then we need to check if a config + # that is enabled selected it. Or if we need to enable one. + if (!defined($prompts{$config}) && defined($selects{$config})) { + $process_selects{$config} = 1; + } } + } +} + +sub loop_select { + + foreach my $config (keys %process_selects) { + $config =~ s/^CONFIG_//; + + dprint "Process select $config\n"; # config has no prompt and must be selected. - parse_config_dep_select $selects{$config}; + parse_config_selects $config, $selects{$config}; } } +while ($repeat) { + # Get the first set of configs and their dependencies. + loop_depend; + + $repeat = 0; + + # Now we need to see if we have to check selects; + loop_select; +} + my %setconfigs; # Finally, read the .config file and turn off any module enabled that # we could not find a reason to keep enabled. -while(<CIN>) { +foreach my $line (@config_file) { + $_ = $line; if (/CONFIG_IKCONFIG/) { if (/# CONFIG_IKCONFIG is not set/) { @@ -435,6 +607,8 @@ while(<CIN>) { if (defined($configs{$1})) { if ($localyesconfig) { $setconfigs{$1} = 'y'; + print "$1=y\n"; + next; } else { $setconfigs{$1} = $2; } @@ -445,7 +619,6 @@ while(<CIN>) { } print; } -close(CIN); # Integrity check, make sure all modules that we want enabled do # indeed have their configs set. diff --git a/scripts/kconfig/symbol.c b/scripts/kconfig/symbol.c index 071f00c304..ecc5aa5f86 100644 --- a/scripts/kconfig/symbol.c +++ b/scripts/kconfig/symbol.c @@ -262,11 +262,18 @@ static struct symbol *sym_calc_choice(struct symbol *sym) struct symbol *def_sym; struct property *prop; struct expr *e; + int flags; /* first calculate all choice values' visibilities */ + flags = sym->flags; prop = sym_get_choice_prop(sym); - expr_list_for_each_sym(prop->expr, e, def_sym) + expr_list_for_each_sym(prop->expr, e, def_sym) { sym_calc_visibility(def_sym); + if (def_sym->visible != no) + flags &= def_sym->flags; + } + + sym->flags &= flags | ~SYMBOL_DEF_USER; /* is the user choice visible? */ def_sym = sym->def[S_DEF_USER].val; @@ -649,11 +656,11 @@ bool sym_set_string_value(struct symbol *sym, const char *newval) size = strlen(newval) + 1; if (sym->type == S_HEX && (newval[0] != '0' || (newval[1] != 'x' && newval[1] != 'X'))) { size += 2; - sym->def[S_DEF_USER].val = val = malloc(size); + sym->def[S_DEF_USER].val = val = xmalloc(size); *val++ = '0'; *val++ = 'x'; } else if (!oldval || strcmp(oldval, newval)) - sym->def[S_DEF_USER].val = val = malloc(size); + sym->def[S_DEF_USER].val = val = xmalloc(size); else return true; @@ -805,7 +812,7 @@ struct symbol *sym_lookup(const char *name, int flags) hash = 0; } - symbol = malloc(sizeof(*symbol)); + symbol = xmalloc(sizeof(*symbol)); memset(symbol, 0, sizeof(*symbol)); symbol->name = new_name; symbol->type = S_UNKNOWN; @@ -856,7 +863,7 @@ const char *sym_expand_string_value(const char *in) size_t reslen; reslen = strlen(in) + 1; - res = malloc(reslen); + res = xmalloc(reslen); res[0] = '\0'; while ((src = strchr(in, '$'))) { @@ -914,7 +921,7 @@ const char *sym_escape_string_value(const char *in) p++; } - res = malloc(reslen); + res = xmalloc(reslen); res[0] = '\0'; strcat(res, "\""); @@ -1221,7 +1228,7 @@ struct property *prop_alloc(enum prop_type type, struct symbol *sym) struct property *prop; struct property **propp; - prop = malloc(sizeof(*prop)); + prop = xmalloc(sizeof(*prop)); memset(prop, 0, sizeof(*prop)); prop->type = type; prop->sym = sym; diff --git a/scripts/kconfig/util.c b/scripts/kconfig/util.c index d0b8b2318e..6e7fbf1968 100644 --- a/scripts/kconfig/util.c +++ b/scripts/kconfig/util.c @@ -23,7 +23,7 @@ struct file *file_lookup(const char *name) } } - file = malloc(sizeof(*file)); + file = xmalloc(sizeof(*file)); memset(file, 0, sizeof(*file)); file->name = file_name; file->next = file_list; @@ -81,7 +81,7 @@ int file_write_dep(const char *name) struct gstr str_new(void) { struct gstr gs; - gs.s = malloc(sizeof(char) * 64); + gs.s = xmalloc(sizeof(char) * 64); gs.len = 64; gs.max_width = 0; strcpy(gs.s, "\0"); @@ -138,3 +138,22 @@ const char *str_get(struct gstr *gs) return gs->s; } +void *xmalloc(size_t size) +{ + void *p = malloc(size); + if (p) + return p; + fprintf(stderr, "Out of memory.\n"); + exit(1); +} + +void *xcalloc(size_t nmemb, size_t size) +{ + void *p = calloc(nmemb, size); + if (p) + return p; + fprintf(stderr, "Out of memory.\n"); + exit(1); +} + + diff --git a/scripts/kconfig/zconf.l b/scripts/kconfig/zconf.l index 00f9d3a9cf..6555a47545 100644 --- a/scripts/kconfig/zconf.l +++ b/scripts/kconfig/zconf.l @@ -40,7 +40,7 @@ static void zconf_endfile(void); static void new_string(void) { - text = malloc(START_STRSIZE); + text = xmalloc(START_STRSIZE); text_asize = START_STRSIZE; text_size = 0; *text = 0; @@ -62,7 +62,7 @@ static void append_string(const char *str, int size) static void alloc_string(const char *str, int size) { - text = malloc(size + 1); + text = xmalloc(size + 1); memcpy(text, str, size); text[size] = 0; } @@ -288,7 +288,7 @@ void zconf_initscan(const char *name) exit(1); } - current_buf = malloc(sizeof(*current_buf)); + current_buf = xmalloc(sizeof(*current_buf)); memset(current_buf, 0, sizeof(*current_buf)); current_file = file_lookup(name); @@ -299,7 +299,7 @@ void zconf_nextfile(const char *name) { struct file *iter; struct file *file = file_lookup(name); - struct buffer *buf = malloc(sizeof(*buf)); + struct buffer *buf = xmalloc(sizeof(*buf)); memset(buf, 0, sizeof(*buf)); current_buf->state = YY_CURRENT_BUFFER; diff --git a/scripts/kconfig/zconf.lex.c_shipped b/scripts/kconfig/zconf.lex.c_shipped index c32b1a49f5..a0521aa597 100644 --- a/scripts/kconfig/zconf.lex.c_shipped +++ b/scripts/kconfig/zconf.lex.c_shipped @@ -802,7 +802,7 @@ static void zconf_endfile(void); static void new_string(void) { - text = malloc(START_STRSIZE); + text = xmalloc(START_STRSIZE); text_asize = START_STRSIZE; text_size = 0; *text = 0; @@ -824,7 +824,7 @@ static void append_string(const char *str, int size) static void alloc_string(const char *str, int size) { - text = malloc(size + 1); + text = xmalloc(size + 1); memcpy(text, str, size); text[size] = 0; } @@ -2343,7 +2343,7 @@ void zconf_initscan(const char *name) exit(1); } - current_buf = malloc(sizeof(*current_buf)); + current_buf = xmalloc(sizeof(*current_buf)); memset(current_buf, 0, sizeof(*current_buf)); current_file = file_lookup(name); @@ -2354,7 +2354,7 @@ void zconf_nextfile(const char *name) { struct file *iter; struct file *file = file_lookup(name); - struct buffer *buf = malloc(sizeof(*buf)); + struct buffer *buf = xmalloc(sizeof(*buf)); memset(buf, 0, sizeof(*buf)); current_buf->state = YY_CURRENT_BUFFER; diff --git a/scripts/kconfig/zconf.tab.c_shipped b/scripts/kconfig/zconf.tab.c_shipped index 877acafde0..aacc1993bb 100644 --- a/scripts/kconfig/zconf.tab.c_shipped +++ b/scripts/kconfig/zconf.tab.c_shipped @@ -1,19 +1,22 @@ /* A Bison parser, made by GNU Bison 2.4.3. */ /* Skeleton implementation for Bison's Yacc-like parsers in C - + Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2009, 2010 Free Software Foundation, Inc. - + This program is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. - + This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. */ + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ /* As a special exception, you may create a larger work that contains part or all of the Bison parser skeleton and distribute that work @@ -24,7 +27,7 @@ special exception, which will cause the skeleton and the resulting Bison output files to be licensed under the GNU General Public License without this special exception. - + This special exception was added by the Free Software Foundation in version 2.2 of Bison. */ |