diff options
143 files changed, 2368 insertions, 940 deletions
diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst index c64446aff6..2a51681906 100644 --- a/Documentation/boards/imx.rst +++ b/Documentation/boards/imx.rst @@ -21,7 +21,7 @@ The Internal Boot Mode is supported on: * i.MX53 * i.MX6 * i.MX7 -* i.MX8MQ +* i.MX8M With the Internal Boot Mode, the images contain a header which describes where the binary shall be loaded and started. These headers also contain @@ -64,8 +64,8 @@ of the image to the card, use: dd if=images/barebox-freescale-imx51-babbage.img of=/dev/sdd bs=1024 skip=1 seek=1 -Note that MaskROM on i.MX8 expects the image to start at the +33KiB mark, so the -following command has to be used instead: +Note that MaskROM on i.MX8M expects the image to start at the +33KiB mark, so +the following command has to be used instead: .. code-block:: sh @@ -394,6 +394,86 @@ with only the image name as argument: scripts/imx/imx-usb-loader images/barebox-freescale-imx51-babbage.img +FlexSPI Boot +^^^^^^^^^^^^ + +FlexSPI boot is currently supported on: i.MX8MM, i.MX8MN and i.MX8MP. + +To generate FlexSPI/QSPI image(s) the board flash header file must specify: +``flexspi_ivtofs`` and ``flexspi_fcfbofs``. + +It is recommended to do this via the ``include/mach/imx/flexspi-imx8m*-cfg.h`` +header files. + +.. code-block:: none + + #include <mach/imx/flexspi-imx8mp-cfg.h> + +There are two different headers, one for the i.MX8MM and one for the i.MX8MP/N. +It's important to use the correct one because the BootROM expects the IVT and +flash configuration block (FCB) on different offsets. + +Barebox doesn't generate a separate FlexSPI image instead the same image used +for SD/MMC/USB is extended to support FlexSPI boot. This is done by adding a 2nd +IVT header and the required FCB at the required boot offsets. + +Barebox also support `High Assurance Boot`_ images for QSPI boot mediums. This +feature must be enabled via the ``CONFIG_HABV4_QSPI`` option. The below figures +show a fully featured MMC/SD/USB/FlexSPI image with enabled HAB support for the +i.MX8M family. + +i.MX8MM layout:: + + 0x0 +------------------------------------------+ + | Barebox Header | + header_gap +------------------------------------------+ + | FlexSPI Flash Configuration Block (FCFB) | + header_gap + 0x400 +------------------------------------------+ --- + | i.MX MMC/SD/USB IVT Header | | + | Boot Data +--. | + | CSF Pointer +--|--. | + header_gap + 0x1000 +------------------------------------------+ | | --- | + | i.MX FlexSPI IVT Header | | | | | Signed Area + | Boot Data +--+ | | | MMC/SD/ + | CSF Pointer +--|--|--. | Signed Area | USB + header_gap + 0x2000 +------------------------------------------+ | | | | FlexSPI | + | Barebox Prebootloader (PBL) |<-´ | | | | + | Piggydata Hash (SHA256) | | | | | + +------------------------------------------+ | | --- --- + | Command Sequence File (CSF) Slot-0 |<----´ | + +------------------------------------------+ | + | Command Sequence File (CSF) Slot-1 |<-------´ + +------------------------------------------+ --- + | Piggydata (Main Barebox Binary) | | Hashed Area + +------------------------------------------+ --- + +i.MX8MP/N layout:: + + 0x0 +------------------------------------------+ + | Barebox Header | + header_gap +------------------------------------------+ --- + | i.MX MMC/SD/USB IVT Header | | + | Boot Data +--. | + | CSF Pointer +--|--. | + header_gap + 0x400 +------------------------------------------+ | | | + | FlexSPI Flash Configuration Block (FCFB) | | | | Signed Area + header_gap + 0x1000 +------------------------------------------+ | | --- | MMC/SD/ + | i.MX FlexSPI IVT Header | | | | | USB + | Boot Data +--+ | | | + | CSF Pointer +--|--|--. | Signed Area | + header_gap + 0x2000 +------------------------------------------+ | | | | FlexSPI | + | Barebox Prebootloader (PBL) |<-´ | | | | + | Piggydata Hash (SHA256) | | | | | + +------------------------------------------+ | | --- --- + | Command Sequence File (CSF) Slot-0 |<----´ | + +------------------------------------------+ | + | Command Sequence File (CSF) Slot-1 |<-------´ + +------------------------------------------+ --- + | Piggydata (Main Barebox Binary) | | Hashed Area + +------------------------------------------+ --- + +At the moment ``header_gap`` is always 32K for all supported devices. + External Boot Mode ------------------ @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 VERSION = 2023 -PATCHLEVEL = 09 +PATCHLEVEL = 10 SUBLEVEL = 0 EXTRAVERSION = NAME = None diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index c285ed7aee..bdac1e69ee 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_MACH_AT91SAM9N12EK) += at91sam9n12ek/ obj-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek/ obj-$(CONFIG_MACH_BEAGLE) += beagle/ obj-$(CONFIG_MACH_BEAGLEBONE) += beaglebone/ +obj-$(CONFIG_MACH_CALAO) += calao/ obj-$(CONFIG_MACH_CANON_A1100) += canon-a1100/ obj-$(CONFIG_MACH_CM_FX6) += cm-fx6/ obj-$(CONFIG_MACH_NITROGEN6) += boundarydevices-nitrogen6/ diff --git a/arch/arm/boards/calao/Makefile b/arch/arm/boards/calao/Makefile new file mode 100644 index 0000000000..da63d2625f --- /dev/null +++ b/arch/arm/boards/calao/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/calao/board.c b/arch/arm/boards/calao/board.c new file mode 100644 index 0000000000..cc369c4cf1 --- /dev/null +++ b/arch/arm/boards/calao/board.c @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include <deep-probe.h> +#include <of.h> + +static const struct of_device_id calao_of_match[] = { + { .compatible = "calao,tny-a9260" }, + { .compatible = "calao,tny-a9g20" }, + { .compatible = "calao,usb-a9260" }, + { .compatible = "calao,usb-a9g20" }, + { /* sentinel */ }, +}; +BAREBOX_DEEP_PROBE_ENABLE(calao_of_match); diff --git a/arch/arm/boards/calao/lowlevel.c b/arch/arm/boards/calao/lowlevel.c new file mode 100644 index 0000000000..2a081a97a4 --- /dev/null +++ b/arch/arm/boards/calao/lowlevel.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <common.h> +#include <init.h> +#include <debug_ll.h> +#include <asm/reloc.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <mach/at91/at91sam9260.h> +#include <mach/at91/hardware.h> + +static void dbgu_init(void) +{ + /* pinmux/clocks/uart already configured by first stage */ + putc_ll('>'); +} + +#define CALAO_ENTRY_2ND(entrypoint, dtbname) \ +AT91_ENTRY_FUNCTION(entrypoint, r0, r1, r2) { \ + extern char __dtb_z_##dtbname##_start[]; \ + arm_cpu_lowlevel_init(); \ + arm_setup_stack(AT91SAM9260_SRAM_END); \ + dbgu_init(); \ + at91sam9260_barebox_entry(runtime_address(__dtb_z_##dtbname##_start)); \ +} + +CALAO_ENTRY_2ND(start_tny_a9260, tny_a9260); +CALAO_ENTRY_2ND(start_tny_a9g20, tny_a9g20); +CALAO_ENTRY_2ND(start_usb_a9260, usb_a9260); +CALAO_ENTRY_2ND(start_usb_a9g20, usb_a9g20); diff --git a/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg b/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg index d6a536053e..d1d223a8ee 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg +++ b/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg @@ -6,5 +6,5 @@ loadaddr 0x007e1000 max_load_size 0x3f000 ivtofs 0x400 -flexspi_ivtofs 0x1000 -flexspi_fcfbofs 0x0 +#include <mach/imx/flexspi-imx8mm-cfg.h> +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg b/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg index a9b592e624..f47ea08266 100644 --- a/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg +++ b/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg @@ -6,5 +6,5 @@ loadaddr 0x912000 max_load_size 0x3f000 ivtofs 0x0 -flexspi_ivtofs 0x0 -flexspi_fcfbofs 0x400 +#include <mach/imx/flexspi-imx8mp-cfg.h> +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg b/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg index 3bb44d199c..c896c9f248 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg +++ b/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg @@ -6,5 +6,5 @@ loadaddr 0x920000 max_load_size 0x3f000 ivtofs 0x0 -flexspi_ivtofs 0x0 -flexspi_fcfbofs 0x400 +#include <mach/imx/flexspi-imx8mp-cfg.h> +#include <mach/imx/habv4-imx8-gencsf.h> diff --git a/arch/arm/boards/skov-imx6/lowlevel.c b/arch/arm/boards/skov-imx6/lowlevel.c index c9a695ced4..16809dd4a6 100644 --- a/arch/arm/boards/skov-imx6/lowlevel.c +++ b/arch/arm/boards/skov-imx6/lowlevel.c @@ -29,122 +29,6 @@ static void __udelay(int us) /* ------------------------------------------------------------------------ */ /* - * Micron MT41K512M16HA-125 IT:E -> 8 GBit = 64 Meg x 16 x 8 banks - * - * Speed Grade Data Rate (MT/s) tRCD-tRP-CL tRCD(ns) tRP(ns) CL(ns) - * -125 1600 11-11-11 13.75 13.75 13.75 - * (=800 MHz) - * - * Memory configuration used by variant: - * - "Max Performance", 64 bit data bus, 1066 MHz, 4 GiB memory - */ -static const struct mx6_ddr3_cfg skov_imx6_cfg_4x512Mb_1066MHz = { - .mem_speed = 1066, - .density = 8, /* GiBit */ - .width = 16, /* 16 bit data per device */ - .banks = 8, - .rowaddr = 16, /* 64 k */ - .coladdr = 10, /* 1 k */ - .pagesz = 2, /* [kiB] */ - .trcd = 1375, /* 13.75 ns = 11 clocks @ 1.6 GHz */ - .trcmin = 4875, /* 48.75 ns = 39 clocks @ 1.6 GHz */ - .trasmin = 3500, /* 35 ns = 28 clocks @ 1.6 GHz */ - .SRT = 0, -}; - -static const struct mx6_ddr_sysinfo skov_imx6_sysinfo_4x512Mb_1066MHz = { - .dsize = 2, /* 64 bit wide = 4 devices, 16 bit each */ - .cs_density = 32, /* four 8 GBit devices connected */ - .ncs = 1, /* one CS line for all devices */ - .cs1_mirror = 1, /* TODO */ - .bi_on = 1, /* TODO */ - .rtt_nom = 1, /* MX6_MMDC_P0_MPODTCTRL -> 0x00022227 */ - .rtt_wr = 0, /* is LW_EN is 0 in their code */ - .ralat = 5, /* TODO */ - .walat = 1, /* TODO */ - .mif3_mode = 3, /* TODO */ - .rst_to_cke = 0x23, /* used in their code as well */ - .sde_to_rst = 0x10, /* used in their code as well */ - .pd_fast_exit = 0, /* TODO */ -}; - -static const struct mx6_mmdc_calibration skov_imx6_calib_4x512Mb_1066MHz = { - .p0_mpwldectrl0 = 0x001a0017, - .p0_mpwldectrl1 = 0x001F001F, - .p0_mpdgctrl0 = 0x43040319, - .p0_mpdgctrl1 = 0x03040279, - .p0_mprddlctl = 0x4d434248, - .p0_mpwrdlctl = 0x34424543, - - .p1_mpwldectrl0 = 0x00170027, - .p1_mpwldectrl1 = 0x000a001f, - .p1_mpdgctrl0 = 0x43040321, - .p1_mpdgctrl1 = 0x03030251, - .p1_mprddlctl = 0x42413c4d, - .p1_mpwrdlctl = 0x49324933, -}; - -/* ------------------------------------------------------------------------ */ - -/* - * Micron MT41K256M16HA-125 IT:E -> 4 GBit = 32 Meg x 16 x 8 banks - * - * Speed Grade Data Rate (MT/s) tRCD-tRP-CL tRCD(ns) tRP(ns) CL(ns) - * -125 1600 11-11-11 13.75 13.75 13.75 - * (=800 MHz) - * - * Memory configuration used by variant: - * - "Max Performance", 64 bit data bus, 1066 MHz, 2 GiB memory - */ -static const struct mx6_ddr3_cfg skov_imx6_cfg_4x256Mb_1066MHz = { - .mem_speed = 1066, - .density = 4, /* GiBit */ - .width = 16, /* 16 bit data per device */ - .banks = 8, - .rowaddr = 15, /* 32 k */ - .coladdr = 10, /* 1 k */ - .pagesz = 2, /* [kiB] */ - .trcd = 1375, /* 13.75 ns = 11 clocks @ 1.6 GHz */ - .trcmin = 4875, /* 48.75 ns = 39 clocks @ 1.6 GHz */ - .trasmin = 3500, /* 35 ns = 28 clocks @ 1.6 GHz */ - .SRT = 0, -}; - -static const struct mx6_ddr_sysinfo skov_imx6_sysinfo_4x256Mb_1066MHz = { - .dsize = 2, /* 64 bit wide = 4 devices, 16 bit each */ - .cs_density = 16, /* four 4 GBit devices connected */ - .ncs = 1, /* one CS line for all devices */ - .cs1_mirror = 1, /* TODO */ - .bi_on = 1, /* TODO */ - .rtt_nom = 1, /* MX6_MMDC_P0_MPODTCTRL -> 0x00022227 */ - .rtt_wr = 0, /* is LW_EN is 0 in their code */ - .ralat = 5, /* TODO */ - .walat = 1, /* TODO */ - .mif3_mode = 3, /* TODO */ - .rst_to_cke = 0x23, /* used in their code as well */ - .sde_to_rst = 0x10, /* used in their code as well */ - .pd_fast_exit = 0, /* TODO */ -}; - -static const struct mx6_mmdc_calibration skov_imx6_calib_4x256Mb_1066MHz = { - .p0_mpwldectrl0 = 0x001a0017, - .p0_mpwldectrl1 = 0x001F001F, - .p0_mpdgctrl0 = 0x43040319, - .p0_mpdgctrl1 = 0x03040279, - .p0_mprddlctl = 0x4d434248, - .p0_mpwrdlctl = 0x34424543, - - .p1_mpwldectrl0 = 0x00170027, - .p1_mpwldectrl1 = 0x000a001f, - .p1_mpdgctrl0 = 0x43040321, - .p1_mpdgctrl1 = 0x03030251, - .p1_mprddlctl = 0x42413c4d, - .p1_mpwrdlctl = 0x49324933, -}; - -/* ------------------------------------------------------------------------ */ - -/* * Micron MT41K128M16JT-125 IT:K -> 2 GBit = 16 Meg x 16 x 8 banks * * Speed Grade Data Rate (MT/s) tRCD-tRP-CL tRCD(ns) tRP(ns) CL(ns) @@ -530,26 +414,6 @@ static void skov_imx6_init(int cpu_type, unsigned board_variant) int instance; switch (board_variant) { - case 12: /* P2 i.MX6Q, max performance */ - if (cpu_type != IMX6_CPUTYPE_IMX6Q) { - pr_err("Invalid SoC! i.MX6Q expected\n"); - return; - } - pr_debug("Initializing a P2 max performance system...\n"); - spl_imx6q_dram_init(&skov_imx6_sysinfo_4x256Mb_1066MHz, - &skov_imx6_calib_4x256Mb_1066MHz, - &skov_imx6_cfg_4x256Mb_1066MHz); - break; - case 18: /* i.MX6Q+ */ - if (cpu_type != IMX6_CPUTYPE_IMX6Q) { - pr_err("Invalid SoC! i.MX6Q expected\n"); - return; - } - pr_debug("Initializing board variant 18\n"); - spl_imx6q_dram_init(&skov_imx6_sysinfo_4x512Mb_1066MHz, - &skov_imx6_calib_4x512Mb_1066MHz, - &skov_imx6_cfg_4x512Mb_1066MHz); - break; case 19: /* i.MX6S "Solo_R512M_F2G" */ if (cpu_type != IMX6_CPUTYPE_IMX6S) { pr_err("Invalid SoC! i.MX6S expected\n"); diff --git a/arch/arm/configs/am35xx_pfc200_xload_defconfig b/arch/arm/configs/am35xx_pfc200_xload_defconfig index 73888fd7b4..a69d4c9fbc 100644 --- a/arch/arm/configs/am35xx_pfc200_xload_defconfig +++ b/arch/arm/configs/am35xx_pfc200_xload_defconfig @@ -6,7 +6,6 @@ CONFIG_THUMB2_BAREBOX=y # CONFIG_ARM_EXCEPTIONS is not set # CONFIG_MEMINFO is not set CONFIG_MMU=y -# CONFIG_MMU_EARLY is not set CONFIG_STACK_SIZE=0xc00 CONFIG_MALLOC_SIZE=0x0 CONFIG_MALLOC_DUMMY=y diff --git a/arch/arm/configs/at91_multi_defconfig b/arch/arm/configs/at91_multi_defconfig index de47af3bd0..e24bb36c28 100644 --- a/arch/arm/configs/at91_multi_defconfig +++ b/arch/arm/configs/at91_multi_defconfig @@ -1,5 +1,6 @@ CONFIG_ARCH_AT91=y CONFIG_AT91_MULTI_BOARDS=y +CONFIG_MACH_CALAO=y CONFIG_MACH_SKOV_ARM9CPU=y CONFIG_MACH_AT91SAM9263EK=y CONFIG_MACH_AT91SAM9X5EK=y @@ -98,6 +99,7 @@ CONFIG_I2C=y CONFIG_I2C_AT91=y CONFIG_MTD=y CONFIG_NAND=y +CONFIG_MTD_NAND_ECC_SOFT=y CONFIG_NAND_ATMEL=y CONFIG_MTD_UBI=y CONFIG_MTD_UBI_FASTMAP=y @@ -117,7 +119,6 @@ CONFIG_MCI_MMC_BOOT_PARTITIONS=y CONFIG_MCI_MMC_GPP_PARTITIONS=y CONFIG_MCI_ATMEL_SDHCI=y CONFIG_MFD_ATMEL_FLEXCOM=y -CONFIG_STATE_DRV=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_LED_GPIO_OF=y @@ -141,6 +142,5 @@ CONFIG_FS_EXT4=y CONFIG_FS_TFTP=y CONFIG_FS_NFS=y CONFIG_FS_FAT=y -CONFIG_FS_FAT_LFN=y CONFIG_FS_UBIFS=y CONFIG_FS_UBIFS_COMPRESSION_LZO=y diff --git a/arch/arm/configs/multi_v8_defconfig b/arch/arm/configs/multi_v8_defconfig index b18498c0a1..9c538e698d 100644 --- a/arch/arm/configs/multi_v8_defconfig +++ b/arch/arm/configs/multi_v8_defconfig @@ -159,7 +159,8 @@ CONFIG_NET_USB_ASIX=y CONFIG_USB_NET_AX88179_178A=y CONFIG_NET_USB_SMSC95XX=y CONFIG_NET_USB_RTL8152=y -# CONFIG_SPI is not set +CONFIG_DRIVER_SPI_IMX=y +CONFIG_SPI_NXP_FLEXSPI=y CONFIG_I2C=y CONFIG_I2C_GPIO=y CONFIG_I2C_IMX=y @@ -175,11 +176,11 @@ CONFIG_USB_DWC3=y CONFIG_USB_DWC3_DUAL_ROLE=y CONFIG_USB_EHCI=y CONFIG_USB_STORAGE=y +CONFIG_USB_ONBOARD_HUB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_SERIAL=y CONFIG_USB_GADGET_FASTBOOT=y CONFIG_USB_GADGET_MASS_STORAGE=y -CONFIG_USB_ONBOARD_HUB=y CONFIG_VIDEO=y CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_DRIVER_VIDEO_BOCHS_PCI=y @@ -211,7 +212,6 @@ CONFIG_HW_RANDOM_VIRTIO=y CONFIG_GPIO_PCA953X=y CONFIG_GPIO_ZYNQ=y CONFIG_NVMEM_RMEM=y -CONFIG_IMX_OCOTP=y CONFIG_RAVE_SP_EEPROM=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED=y @@ -237,7 +237,6 @@ CONFIG_FS_TFTP=y CONFIG_FS_NFS=y CONFIG_FS_FAT=y CONFIG_FS_FAT_WRITE=y -CONFIG_FS_FAT_LFN=y CONFIG_FS_BPKFS=y CONFIG_FS_UIMAGEFS=y CONFIG_FS_PSTORE=y diff --git a/arch/arm/configs/rpi_v8a_defconfig b/arch/arm/configs/rpi_v8a_defconfig index 75f62ddb65..39754f025e 100644 --- a/arch/arm/configs/rpi_v8a_defconfig +++ b/arch/arm/configs/rpi_v8a_defconfig @@ -5,7 +5,6 @@ CONFIG_MACH_RPI4=y CONFIG_64BIT=y CONFIG_IMAGE_COMPRESSION_NONE=y CONFIG_MMU=y -# CONFIG_MMU_EARLY is not set CONFIG_MALLOC_SIZE=0x0 CONFIG_MALLOC_TLSF=y CONFIG_KALLSYMS=y diff --git a/arch/arm/cpu/mmu_32.c b/arch/arm/cpu/mmu_32.c index 07b2250677..d0ada5866f 100644 --- a/arch/arm/cpu/mmu_32.c +++ b/arch/arm/cpu/mmu_32.c @@ -558,8 +558,8 @@ void __mmu_init(bool mmu_on) pos = bank->start; + /* Skip reserved regions */ for_each_reserved_region(bank, rsv) { - remap_range((void *)rsv->start, resource_size(rsv), MAP_UNCACHED); remap_range((void *)pos, rsv->start - pos, MAP_CACHED); pos = rsv->end + 1; } diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c index fb57260c90..b718cb1efa 100644 --- a/arch/arm/cpu/mmu_64.c +++ b/arch/arm/cpu/mmu_64.c @@ -243,9 +243,8 @@ void __mmu_init(bool mmu_on) pos = bank->start; + /* Skip reserved regions */ for_each_reserved_region(bank, rsv) { - remap_range((void *)resource_first_page(rsv), - resource_count_pages(rsv), MAP_UNCACHED); remap_range((void *)pos, rsv->start - pos, MAP_CACHED); pos = rsv->end + 1; } diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 97fbb81153..e9512a30c8 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -194,6 +194,9 @@ lwl-$(CONFIG_MACH_ZII_VF610_DEV) += \ vf610-zii-spb4.dtb.o \ vf610-zii-ssmb-dtu.dtb.o lwl-$(CONFIG_MACH_AC_SXB) += ac-sxb.dtb.o +lwl-$(CONFIG_MACH_CALAO) += \ + tny_a9260.dtb.o tny_a9g20.dtb.o \ + usb_a9260.dtb.o usb_a9g20.dtb.o lwl-$(CONFIG_MACH_AT91SAM9263EK_DT) += at91sam9263ek.dtb.o lwl-$(CONFIG_MACH_SAMA5D3_XPLAINED) += at91-sama5d3_xplained.dtb.o lwl-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += at91-microchip-ksz9477-evb.dtb.o diff --git a/arch/arm/dts/at91sam9260.dtsi b/arch/arm/dts/at91sam9260.dtsi new file mode 100644 index 0000000000..828ab6646e --- /dev/null +++ b/arch/arm/dts/at91sam9260.dtsi @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +&ebi { + status = "disabled"; +}; + +&nand_controller { + status = "disabled"; +}; + +&{/ahb/apb} { + nand0: nand@40000000 { + compatible = "atmel,at91rm9200-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x40000000 0x10000000 + 0xffffe800 0x200 + >; + atmel,nand-addr-offset = <21>; + atmel,nand-cmd-offset = <22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>; + gpios = <&pioC 13 GPIO_ACTIVE_HIGH + &pioC 14 GPIO_ACTIVE_HIGH + 0 + >; + status = "disabled"; + }; +}; + +&usb0 { /* currently hangs with DT-enabled driver */ + status = "disabled"; +}; diff --git a/arch/arm/dts/at91sam9g20.dtsi b/arch/arm/dts/at91sam9g20.dtsi new file mode 100644 index 0000000000..b8301a8ce7 --- /dev/null +++ b/arch/arm/dts/at91sam9g20.dtsi @@ -0,0 +1,2 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include "at91sam9260.dtsi" diff --git a/arch/arm/dts/calao_nand.dtsi b/arch/arm/dts/calao_nand.dtsi new file mode 100644 index 0000000000..e42d6cdc8c --- /dev/null +++ b/arch/arm/dts/calao_nand.dtsi @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +&nand0 { + nand-bus-width = <8>; + nand-ecc-mode = "soft"; + nand-on-flash-bbt; + status = "okay"; + + at91bootstrap@0 { + label = "at91bootstrap"; + reg = <0x0 0x20000>; + }; + + barebox@20000 { + label = "barebox"; + reg = <0x20000 0x40000>; + }; + + bareboxenv@60000 { + label = "bareboxenv"; + reg = <0x60000 0x20000>; + }; + + bareboxenv2@80000 { + label = "bareboxenv2"; + reg = <0x80000 0x20000>; + }; + + oftree@80000 { + label = "oftree"; + reg = <0xa0000 0x20000>; + }; + + kernel@a0000 { + label = "kernel"; + reg = <0xc0000 0x400000>; + }; + + rootfs@4a0000 { + label = "rootfs"; + reg = <0x4c0000 0x7800000>; + }; + + data@7ca0000 { + label = "data"; + reg = <0x7cc0000 0x8340000>; + }; +}; diff --git a/arch/arm/dts/rk356x.dtsi b/arch/arm/dts/rk356x.dtsi index 4de2404b50..195b42a8b0 100644 --- a/arch/arm/dts/rk356x.dtsi +++ b/arch/arm/dts/rk356x.dtsi @@ -11,4 +11,15 @@ compatible = "rockchip,rk3568-dmc"; rockchip,pmu = <&pmugrf>; }; + + otp: nvmem@fe38c000 { + compatible = "rockchip,rk3568-otp"; + reg = <0x0 0xfe38c000 0x0 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + + cpu_id: id@a { + reg = <0x0a 0x10>; + }; + }; }; diff --git a/arch/arm/dts/tny_a9260.dts b/arch/arm/dts/tny_a9260.dts new file mode 100644 index 0000000000..2c4df66f7a --- /dev/null +++ b/arch/arm/dts/tny_a9260.dts @@ -0,0 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include <arm/microchip/tny_a9260.dts> +#include "at91sam9260.dtsi" +#include "calao_nand.dtsi" diff --git a/arch/arm/dts/tny_a9g20.dts b/arch/arm/dts/tny_a9g20.dts new file mode 100644 index 0000000000..654a988c44 --- /dev/null +++ b/arch/arm/dts/tny_a9g20.dts @@ -0,0 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include <arm/microchip/tny_a9g20.dts> +#include "at91sam9g20.dtsi" +#include "calao_nand.dtsi" diff --git a/arch/arm/dts/usb_a9260.dts b/arch/arm/dts/usb_a9260.dts new file mode 100644 index 0000000000..9eb2db3ff8 --- /dev/null +++ b/arch/arm/dts/usb_a9260.dts @@ -0,0 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include <arm/microchip/usb_a9260.dts> +#include "at91sam9260.dtsi" +#include "calao_nand.dtsi" diff --git a/arch/arm/dts/usb_a9g20.dts b/arch/arm/dts/usb_a9g20.dts new file mode 100644 index 0000000000..a8ed22b7c4 --- /dev/null +++ b/arch/arm/dts/usb_a9g20.dts @@ -0,0 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include <arm/microchip/usb_a9g20.dts> +#include "at91sam9g20.dtsi" +#include "calao_nand.dtsi" diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S index 2b4b1d6a95..cafb27b2d5 100644 --- a/arch/arm/lib/pbl.lds.S +++ b/arch/arm/lib/pbl.lds.S @@ -12,6 +12,12 @@ #define BASE (TEXT_BASE - SZ_2M) #endif +#ifdef CONFIG_HABV4_QSPI +#define HAB_CSF_LEN 0x4000 +#else +#define HAB_CSF_LEN 0x2000 +#endif + OUTPUT_FORMAT(BAREBOX_OUTPUT_FORMAT) OUTPUT_ARCH(BAREBOX_OUTPUT_ARCH) @@ -85,7 +91,7 @@ SECTIONS __csf_start = .; .hab_csf : { BYTE(0x5a); - . += + 0x1fff; + . += + HAB_CSF_LEN - 1; } = 0x5a __csf_end = .; #endif /* CONFIG_CPU_64 && CONFIG_HABV4 */ diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index d249974725..94e8e525a2 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -42,6 +42,9 @@ config HAVE_AT91_I2S_MUX_CLK config HAVE_AT91_SAM9X60_PLL bool +config HAVE_AT91_SDRAMC + bool + config HAVE_AT91_DDRAMC bool @@ -568,6 +571,16 @@ config AT91_MULTI_BOARDS if AT91_MULTI_BOARDS +config MACH_CALAO + bool "CALAO DT-enabled boards (TNY/USB-A9260/A9G20)" + select SOC_AT91SAM9260 + select OFDEVICE + select COMMON_CLK_OF_PROVIDER + select HAVE_AT91_SDRAMC + help + Select this if you are using a device tree enabled board + from Calao Systems: TNY-A9260, TNY-A9G20, USB-A9260 or USB-A9G20. + config MACH_SKOV_ARM9CPU bool "SKOV ARM9 CPU" select SOC_AT91SAM9263 diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 301e0b761b..c453295955 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_BOOTM) += bootm-barebox.o obj-y += at91sam9_reset.o obj-y += at91sam9g45_reset.o obj-pbl-$(CONFIG_HAVE_AT91_DDRAMC) += ddramc.o +obj-pbl-$(CONFIG_HAVE_AT91_SDRAMC) += sdramc.o pbl-$(CONFIG_AT91_MCI_PBL) += xload-mmc.o pbl-$(CONFIG_AT91_MCI_PBL) += at91sam9_xload_mmc.o @@ -24,10 +25,10 @@ obj-$(CONFIG_HAVE_AT91SAM9_RST) += at91sam9_rst.o # CPU-specific support obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o -obj-$(CONFIG_SOC_AT91SAM9260) += at91sam9260.o at91sam9260_devices.o obj-$(CONFIG_SOC_AT91SAM9261) += at91sam9261.o at91sam9261_devices.o obj-$(CONFIG_SOC_AT91SAM9G10) += at91sam9261.o at91sam9261_devices.o ifeq ($(CONFIG_AT91_MULTI_BOARDS),) +obj-$(CONFIG_SOC_AT91SAM9260) += at91sam9260.o at91sam9260_devices.o obj-$(CONFIG_SOC_AT91SAM9263) += at91sam9263.o at91sam9263_devices.o obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o sama5d3_devices.o obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o sama5d4_devices.o diff --git a/arch/arm/mach-at91/at91sam9_rst.c b/arch/arm/mach-at91/at91sam9_rst.c index db7411a053..d2c008e343 100644 --- a/arch/arm/mach-at91/at91sam9_rst.c +++ b/arch/arm/mach-at91/at91sam9_rst.c @@ -10,6 +10,7 @@ #include <linux/bitfield.h> #include <linux/clk.h> #include <mach/at91/at91_rstc.h> +#include <mach/at91/at91sam9260.h> #include <reset_source.h> struct at91sam9x_rst { @@ -56,6 +57,16 @@ static void __noreturn at91sam9x_restart_soc(struct restart_handler *rst) hang(); } +void __noreturn at91sam9_reset(void __iomem *sdram, void __iomem *rstc_cr); + +static void __noreturn at91sam9260_restart_soc(struct restart_handler *rst) +{ + struct at91sam9x_rst *priv = container_of(rst, struct at91sam9x_rst, restart); + + at91sam9_reset(IOMEM(AT91SAM9260_BASE_SDRAMC), + IOMEM(priv->base + AT91_RSTC_CR)); +} + static int at91sam9x_rst_probe(struct device *dev) { struct at91sam9x_rst *priv; @@ -83,14 +94,15 @@ static int at91sam9x_rst_probe(struct device *dev) at91sam9x_set_reset_reason(dev, priv->base); priv->restart.name = "at91sam9x-rst"; - priv->restart.restart = at91sam9x_restart_soc; + priv->restart.restart = device_get_match_data(dev); return restart_handler_register(&priv->restart); } static const __maybe_unused struct of_device_id at91sam9x_rst_dt_ids[] = { - { .compatible = "atmel,at91sam9g45-rstc", }, - { .compatible = "atmel,sama5d3-rstc", }, + { .compatible = "atmel,at91sam9260-rstc", at91sam9260_restart_soc }, + { .compatible = "atmel,at91sam9g45-rstc", at91sam9x_restart_soc }, + { .compatible = "atmel,sama5d3-rstc", at91sam9x_restart_soc }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, at91sam9x_rst_dt_ids); diff --git a/arch/arm/mach-at91/sdramc.c b/arch/arm/mach-at91/sdramc.c new file mode 100644 index 0000000000..655f24ecd9 --- /dev/null +++ b/arch/arm/mach-at91/sdramc.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2020 Ahmad Fatoum <a.fatoum@pengutronix.de> + */ + +#include <common.h> +#include <init.h> +#include <mach/at91/hardware.h> +#include <asm/barebox-arm.h> +#include <mach/at91/at91sam9_sdramc.h> +#include <asm/memory.h> +#include <pbl.h> +#include <io.h> + +void __noreturn at91sam9260_barebox_entry(void *boarddata) +{ + barebox_arm_entry(AT91_CHIPSELECT_1, + at91_get_sdram_size(IOMEM(AT91SAM9260_BASE_SDRAMC)), + boarddata); +} + +static int at91_sdramc_probe(struct device *dev) +{ + struct resource *iores; + void __iomem *base; + + iores = dev_request_mem_resource(dev, 0); + if (IS_ERR(iores)) + return PTR_ERR(iores); + base = IOMEM(iores->start); + + return arm_add_mem_device("ram0", AT91_CHIPSELECT_1, + at91_get_sdram_size(base)); +} + +static struct of_device_id at91_sdramc_dt_ids[] = { + { .compatible = "atmel,at91sam9260-sdramc" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, at91_sdramc_dt_ids); + +static struct driver at91_sdramc_driver = { + .name = "at91sam9260-sdramc", + .probe = at91_sdramc_probe, + .of_compatible = at91_sdramc_dt_ids, +}; +mem_platform_driver(at91_sdramc_driver); diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig index 48209fb5c6..f7434d2f5c 100644 --- a/arch/arm/mach-bcm283x/Kconfig +++ b/arch/arm/mach-bcm283x/Kconfig @@ -41,13 +41,11 @@ config MACH_RPI3 bool "RaspberryPi 3 (BCM2837/CORTEX-A53)" select MACH_RPI_AARCH_32_64 select MACH_RPI_COMMON - depends on 32BIT || (64BIT && !MMU_EARLY) config MACH_RPI_CM3 bool "RaspberryPi Compute Module 3 (BCM2837/CORTEX-A53)" select MACH_RPI_AARCH_32_64 select MACH_RPI_COMMON - depends on 32BIT || (64BIT && !MMU_EARLY) config MACH_RPI4 bool "RaspberryPi 4 (BCM2711/CORTEX-A72)" diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 8da49a54b4..6a7d90e2c8 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -745,10 +745,16 @@ config HABV4 select HAB select NVMEM select IMX_OCOTP - depends on ARCH_IMX6 || ARCH_IMX8MQ + depends on ARCH_IMX6 || ARCH_IMX8M depends on OFDEVICE help - High Assurance Boot, as found on i.MX28/i.MX6/i.MX8MQ. + High Assurance Boot, as found on i.MX28/i.MX6/i.MX8M. + +config HABV4_QSPI + depends on HABV4 + bool "HABv4 QPSI support" + help + Enable this option to build signed QSPI/FlexSPI images. config HAB_CERTS_ENV depends on HAB diff --git a/arch/arm/mach-imx/imx8m.c b/arch/arm/mach-imx/imx8m.c index af44b089e0..c7c799c64b 100644 --- a/arch/arm/mach-imx/imx8m.c +++ b/arch/arm/mach-imx/imx8m.c @@ -56,7 +56,6 @@ u64 imx8m_uid(void) static int imx8m_init(const char *cputypestr) { void __iomem *src = IOMEM(MX8M_SRC_BASE_ADDR); - struct arm_smccc_res res; genpd_activate(); @@ -66,16 +65,6 @@ static int imx8m_init(const char *cputypestr) imx_set_reset_reason(src + IMX7_SRC_SRSR, imx7_reset_reasons); pr_info("%s unique ID: %llx\n", cputypestr, imx8m_uid()); - if (IS_ENABLED(CONFIG_ARM_SMCCC) && - IS_ENABLED(CONFIG_FIRMWARE_IMX8MQ_ATF)) { - arm_smccc_smc(IMX_SIP_BUILDINFO, - IMX_SIP_BUILDINFO_GET_COMMITHASH, - 0, 0, 0, 0, 0, 0, &res); - - if (res.a0 > 0) - pr_info("i.MX ARM Trusted Firmware: %s\n", (char *)&res.a0); - } - if (IS_ENABLED(CONFIG_PBL_OPTEE) && tzc380_is_enabled() && !of_find_node_by_path_from(NULL, "/firmware/optee")) { static struct of_optee_fixup_data optee_fixup_data = { diff --git a/arch/arm/mach-layerscape/ppa.c b/arch/arm/mach-layerscape/ppa.c index 3fa73d555f..521e6b89da 100644 --- a/arch/arm/mach-layerscape/ppa.c +++ b/arch/arm/mach-layerscape/ppa.c @@ -117,7 +117,7 @@ int ls1046a_ppa_init(resource_size_t ppa_start, resource_size_t ppa_size) size_t ppa_fw_size; int ret; - res = request_sdram_region("ppa", ppa_start, ppa_size); + res = reserve_sdram_region("ppa", ppa_start, ppa_size); if (!res) { pr_err("Cannot request SDRAM region %pa - %pa\n", &ppa_start, &ppa_end); @@ -130,7 +130,7 @@ int ls1046a_ppa_init(resource_size_t ppa_start, resource_size_t ppa_size) if (ret) return ret; - of_add_reserve_entry(ppa_start, ppa_end); + of_register_fixup(of_fixup_reserved_memory, res); return 0; } diff --git a/arch/arm/mach-rockchip/rk3568.c b/arch/arm/mach-rockchip/rk3568.c index c0453ea0c4..75b0824479 100644 --- a/arch/arm/mach-rockchip/rk3568.c +++ b/arch/arm/mach-rockchip/rk3568.c @@ -93,6 +93,8 @@ static void qos_priority_init(void) void rk3568_lowlevel_init(void) { + arm_cpu_lowlevel_init(); + /* * When perform idle operation, corresponding clock can * be opened or gated automatically. diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index 31c4484cf1..88da35a955 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -23,12 +23,7 @@ config ARCH_TEXT_BASE hex default 0x00000000 -config SANDBOX_REEXEC - prompt "exec(2) reset handler" - def_bool y - help - The normal reset handler hangs barebox. On Linux, barebox - instead can exec itself to simulate a reset. +menu "Sandbox specific settings" config PHYS_ADDR_T_64BIT bool @@ -52,5 +47,14 @@ config 32BIT config SANDBOX_LINUX_I386 bool "32-bit x86 barebox" if CC_HAS_LINUX_I386_SUPPORT +config SANDBOX_REEXEC + prompt "exec(2) reset handler" + def_bool y + help + The normal reset handler hangs barebox. On Linux, barebox + instead can exec itself to simulate a reset. + config SDL bool + +endmenu diff --git a/arch/sandbox/include/asm/linkage.h b/arch/sandbox/include/asm/linkage.h new file mode 100644 index 0000000000..1d78d9169b --- /dev/null +++ b/arch/sandbox/include/asm/linkage.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __ASM_LINKAGE_H +#define __ASM_LINKAGE_H + +/* referenced by <linux/linkage.h> */ + +#endif diff --git a/arch/x86/lib/setjmp_32.S b/arch/x86/lib/setjmp_32.S index 38dcb68c1b..5814623f94 100644 --- a/arch/x86/lib/setjmp_32.S +++ b/arch/x86/lib/setjmp_32.S @@ -8,6 +8,7 @@ #define _REGPARM #include <linux/linkage.h> +#include <asm-generic/pointer.h> .text .align 8 @@ -53,7 +54,9 @@ ENDPROC(longjmp) ENTRY(initjmp) movl %edx, 20(%eax) /* Return address */ - movl %ecx, 4(%eax) /* Post-return %esp! */ + movl $0, 8(%edx) /* Base pointer */ + sub $ASM_SZPTR, %ecx /* ESP - 4 has to be 16-byte aligned on entry */ + movl %ecx, 4(%eax) /* Stack top */ xorl %eax, %eax /* Return value */ ret diff --git a/arch/x86/lib/setjmp_64.S b/arch/x86/lib/setjmp_64.S index 28ea576cd2..bfa1521499 100644 --- a/arch/x86/lib/setjmp_64.S +++ b/arch/x86/lib/setjmp_64.S @@ -6,6 +6,7 @@ */ #include <linux/linkage.h> +#include <asm-generic/pointer.h> .text .align 8 @@ -53,6 +54,8 @@ ENDPROC(longjmp) ENTRY(initjmp) movq %rsi, (%rdi) /* Return address */ + movq $0, 16(%rdi) /* Base pointer */ + sub $ASM_SZPTR, %rdx /* RSP - 8 has to be 16-byte aligned on entry */ movq %rdx, 8(%rdi) /* Stack top */ xorq %rax, %rax ret diff --git a/commands/Kconfig b/commands/Kconfig index c1bba22443..a6806f198e 100644 --- a/commands/Kconfig +++ b/commands/Kconfig @@ -2403,6 +2403,7 @@ config CMD_UBSAN config CMD_STACKSMASH tristate "stacksmash" + depends on STACKPROTECTOR || STACK_GUARD_PAGE || COMPILE_TEST help This commands trashes the stack to test stackprotector and guard page. This command does not return. diff --git a/commands/keystore.c b/commands/keystore.c index 4922cf1beb..40bcb7105d 100644 --- a/commands/keystore.c +++ b/commands/keystore.c @@ -17,7 +17,7 @@ static int do_keystore(int argc, char *argv[]) const char *file = NULL; char *secret_str = NULL; void *secret; - size_t s_len; + size_t s_len = 0; while ((opt = getopt(argc, argv, "rs:f:")) > 0) { switch (opt) { diff --git a/commands/version.c b/commands/version.c index 764c208767..0ad8e587de 100644 --- a/commands/version.c +++ b/commands/version.c @@ -7,7 +7,7 @@ static int do_version(int argc, char *argv[]) { - printf ("\n%s\n", version_string); + printf ("\n%s\n\n", version_string); return 0; } diff --git a/common/bootm.c b/common/bootm.c index 2469d43441..29ea13e28c 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -468,8 +468,10 @@ int bootm_load_devicetree(struct image_data *data, void *fdt, memcpy((void *)data->oftree_res->start, fdt, fdt_size); of_print_cmdline(data->of_root_node); - if (bootm_verbose(data) > 1) + if (bootm_verbose(data) > 1) { of_print_nodes(data->of_root_node, 0, ~0); + fdt_print_reserve_map(fdt); + } return 0; } diff --git a/common/machine_id.c b/common/machine_id.c index 8c273b9349..f0b148fb9b 100644 --- a/common/machine_id.c +++ b/common/machine_id.c @@ -16,6 +16,11 @@ static void *__machine_id_hashable; static size_t __machine_id_hashable_length; +const void *machine_id_get_hashable(size_t *len) +{ + *len = __machine_id_hashable_length; + return __machine_id_hashable; +} void machine_id_set_hashable(const void *hashable, size_t len) { diff --git a/common/memory.c b/common/memory.c index 0ae9e7383c..d560d444b0 100644 --- a/common/memory.c +++ b/common/memory.c @@ -15,6 +15,7 @@ #include <asm/sections.h> #include <malloc.h> #include <of.h> +#include <mmu.h> /* * Begin and End of memory area for malloc(), and current "brk" @@ -211,6 +212,31 @@ struct resource *__request_sdram_region(const char *name, unsigned flags, return NULL; } +/* use for secure firmware to inhibit speculation */ +struct resource *reserve_sdram_region(const char *name, resource_size_t start, + resource_size_t size) +{ + struct resource *res; + + res = __request_sdram_region(name, IORESOURCE_BUSY, start, size); + if (IS_ERR(res)) + return ERR_CAST(res); + + if (!IS_ALIGNED(start, PAGE_SIZE)) { + pr_err("%s: %s start is not page aligned\n", __func__, name); + start = ALIGN_DOWN(start, PAGE_SIZE); + } + + if (!IS_ALIGNED(size, PAGE_SIZE)) { + pr_err("%s: %s size is not page aligned\n", __func__, name); + size = ALIGN(size, PAGE_SIZE); + } + + remap_range((void *)start, size, MAP_UNCACHED); + + return res; +} + int release_sdram_region(struct resource *res) { return release_region(res); diff --git a/common/version.c b/common/version.c index 15f03c2a00..465e22c7f5 100644 --- a/common/version.c +++ b/common/version.c @@ -5,7 +5,7 @@ #include <generated/utsrelease.h> const char version_string[] = - "barebox " UTS_RELEASE " " UTS_VERSION "\n"; + "barebox " UTS_RELEASE " " UTS_VERSION; EXPORT_SYMBOL(version_string); const char release_string[] = @@ -20,7 +20,7 @@ EXPORT_SYMBOL(buildsystem_version_string); void barebox_banner (void) { printf("\n\n"); - pr_info("%s", version_string); + pr_info("%s\n", version_string); if (strlen(buildsystem_version_string) > 0) pr_info("Buildsystem version: %s", buildsystem_version_string); printf("\n\n"); diff --git a/drivers/hab/hab.c b/drivers/hab/hab.c index b5d3090805..75a8cca71e 100644 --- a/drivers/hab/hab.c +++ b/drivers/hab/hab.c @@ -150,7 +150,7 @@ static int imx_hab_permanent_write_enable_ocotp(int enable) return imx_ocotp_permanent_write(enable); } -static int imx_hab_lockdown_device_ocotp(void) +static int imx6_hab_lockdown_device_ocotp(void) { int ret; @@ -161,7 +161,22 @@ static int imx_hab_lockdown_device_ocotp(void) return imx_ocotp_write_field(OCOTP_SEC_CONFIG_1, 1); } -static int imx_hab_device_locked_down_ocotp(void) +static int imx8m_hab_lockdown_device_ocotp(void) +{ + int ret; + + ret = imx_ocotp_write_field(MX8M_OCOTP_SEC_CONFIG_1, 1); + if (ret < 0) + return ret; + + /* Only i.MX8MQ requires fusing of DIR_BT_DIS */ + if (!cpu_is_mx8mq()) + return ret; + + return imx_ocotp_write_field(MX8MQ_OCOTP_DIR_BT_DIS, 1); +} + +static int imx6_hab_device_locked_down_ocotp(void) { int ret; unsigned int v; @@ -173,8 +188,19 @@ static int imx_hab_device_locked_down_ocotp(void) return v; } +static int imx8m_hab_device_locked_down_ocotp(void) +{ + int ret; + unsigned int v; + + ret = imx_ocotp_read_field(MX8M_OCOTP_SEC_CONFIG_1, &v); + if (ret < 0) + return ret; + + return v; +} + struct imx_hab_ops { - int (*init)(void); int (*write_srk_hash)(const u8 *srk, unsigned flags); int (*read_srk_hash)(u8 *srk); int (*permanent_write_enable)(int enable); @@ -190,37 +216,38 @@ static struct imx_hab_ops imx_hab_ops_iim = { .permanent_write_enable = imx_hab_permanent_write_enable_iim, }; -static struct imx_hab_ops imx_hab_ops_ocotp = { +static struct imx_hab_ops imx6_hab_ops_ocotp = { .write_srk_hash = imx_hab_write_srk_hash_ocotp, .read_srk_hash = imx_hab_read_srk_hash_ocotp, - .lockdown_device = imx_hab_lockdown_device_ocotp, - .device_locked_down = imx_hab_device_locked_down_ocotp, + .lockdown_device = imx6_hab_lockdown_device_ocotp, + .device_locked_down = imx6_hab_device_locked_down_ocotp, + .permanent_write_enable = imx_hab_permanent_write_enable_ocotp, +}; + +static struct imx_hab_ops imx8m_hab_ops_ocotp = { + .write_srk_hash = imx_hab_write_srk_hash_ocotp, + .read_srk_hash = imx_hab_read_srk_hash_ocotp, + .lockdown_device = imx8m_hab_lockdown_device_ocotp, + .device_locked_down = imx8m_hab_device_locked_down_ocotp, .permanent_write_enable = imx_hab_permanent_write_enable_ocotp, }; static struct imx_hab_ops *imx_get_hab_ops(void) { - static struct imx_hab_ops *ops, *tmp; - int ret; + static struct imx_hab_ops *ops; if (ops) return ops; if (IS_ENABLED(CONFIG_HABV3) && (cpu_is_mx25() || cpu_is_mx35())) - tmp = &imx_hab_ops_iim; - else if (IS_ENABLED(CONFIG_HABV4) && (cpu_is_mx6() || cpu_is_mx8mq())) - tmp = &imx_hab_ops_ocotp; + ops = &imx_hab_ops_iim; + else if (IS_ENABLED(CONFIG_HABV4) && cpu_is_mx6()) + ops = &imx6_hab_ops_ocotp; + else if (IS_ENABLED(CONFIG_HABV4) && cpu_is_mx8m()) + ops = &imx8m_hab_ops_ocotp; else return NULL; - if (tmp->init) { - ret = tmp->init(); - if (ret) - return NULL; - } - - ops = tmp; - return ops; } diff --git a/drivers/hab/habv4.c b/drivers/hab/habv4.c index 9f54aed5f5..f74de009fc 100644 --- a/drivers/hab/habv4.c +++ b/drivers/hab/habv4.c @@ -168,6 +168,7 @@ struct habv4_rvt { #define FSL_SIP_HAB_REPORT_STATUS 0x04 #define FSL_SIP_HAB_FAILSAFE 0x05 #define FSL_SIP_HAB_CHECK_TARGET 0x06 +#define FSL_SIP_HAB_GET_VERSION 0x07 static enum hab_status hab_sip_report_status(enum hab_config *config, enum habv4_state *state) @@ -193,18 +194,43 @@ static enum hab_status hab_sip_report_status(enum hab_config *config, return (enum hab_status)res.a0; } +static uint32_t hab_sip_get_version(void) +{ + struct arm_smccc_res res; + + arm_smccc_smc(FSL_SIP_HAB, FSL_SIP_HAB_GET_VERSION, 0, 0, 0, 0, 0, 0, &res); + + return (uint32_t)res.a0; +} + +#define IMX8MQ_ROM_OCRAM_ADDRESS 0x9061C0 +#define IMX8MM_ROM_OCRAM_ADDRESS 0x908040 +#define IMX8MN_ROM_OCRAM_ADDRESS 0x908040 +#define IMX8MP_ROM_OCRAM_ADDRESS 0x90D040 + static enum hab_status imx8m_read_sram_events(enum hab_status status, uint32_t index, void *event, uint32_t *bytes) { struct hab_event_record *events[10]; int num_events = 0; - char *sram = (char *)0x9061c0; + char *sram; int i = 0; int internal_index = 0; char *end = 0; struct hab_event_record *search; + if (cpu_is_mx8mq()) + sram = (char *)IMX8MQ_ROM_OCRAM_ADDRESS; + else if (cpu_is_mx8mm()) + sram = (char *)IMX8MM_ROM_OCRAM_ADDRESS; + else if (cpu_is_mx8mn()) + sram = (char *)IMX8MN_ROM_OCRAM_ADDRESS; + else if (cpu_is_mx8mp()) + sram = (char *)IMX8MP_ROM_OCRAM_ADDRESS; + else + return HAB_STATUS_FAILURE; + /* * AN12263 HABv4 Guidelines and Recommendations * recommends the address and size, however errors are usually contained @@ -224,7 +250,7 @@ static enum hab_status imx8m_read_sram_events(enum hab_status status, } } while (i < num_events) { - if (events[i]->status == status) { + if (events[i]->status >= status) { if (internal_index == index) { *bytes = sizeof(struct hab_event_record) + be16_to_cpu(events[i]->hdr.len); @@ -590,10 +616,12 @@ static int imx8m_hab_get_status(void) static int init_imx8m_hab_get_status(void) { - if (!cpu_is_mx8mq()) + if (!cpu_is_mx8m()) /* can happen in multi-image builds and is not an error */ return 0; + pr_info("ROM version: 0x%x\n", hab_sip_get_version()); + /* * Nobody will check the return value if there were HAB errors, but the * initcall will fail spectaculously with a strange error message. @@ -602,12 +630,6 @@ static int init_imx8m_hab_get_status(void) return 0; } - -/* - * - * - * - */ postmmu_initcall(init_imx8m_hab_get_status); static int init_imx6_hab_get_status(void) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 39a40c2a3f..5189364c2c 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -69,6 +69,13 @@ config MFD_STPMIC1 help Select this to support communication with the STPMIC1. +config MFD_PCA9450 + depends on I2C + select REGMAP_I2C + bool "PCA9450 MFD driver" + help + Select this to support communication with the PCA9450 PMIC. + config MFD_RN568PMIC depends on I2C select REGMAP_I2C diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index f19bf53655..00f3eacf3c 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -25,3 +25,4 @@ obj-$(CONFIG_MFD_RK808) += rk808.o obj-$(CONFIG_MFD_AXP20X_I2C) += axp20x-i2c.o axp20x.o obj-$(CONFIG_MFD_ATMEL_SMC) += atmel-smc.o obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o +obj-$(CONFIG_MFD_PCA9450) += pca9450.o diff --git a/drivers/mfd/pca9450.c b/drivers/mfd/pca9450.c new file mode 100644 index 0000000000..cf0efab16f --- /dev/null +++ b/drivers/mfd/pca9450.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023 Holger Assmann, Pengutronix + */ + +#include <common.h> +#include <driver.h> +#include <errno.h> +#include <i2c/i2c.h> +#include <init.h> +#include <mfd/pca9450.h> +#include <of.h> +#include <regmap.h> +#include <reset_source.h> + +#define REASON_PMIC_RST 0x10 +#define REASON_SW_RST 0x20 +#define REASON_WDOG 0x40 +#define REASON_PWON 0x80 + +static const struct regmap_config pca9450_regmap_i2c_config = { + .reg_bits = 8, + .val_bits = 8, + .max_register = 0x2E, +}; + +static int pca9450_get_reset_source(struct device *dev, struct regmap *map) +{ + enum reset_src_type type; + int reg; + int ret; + + ret = regmap_read(map, PCA9450_PWRON_STAT, ®); + if (ret) + return ret; + + switch (reg) { + case REASON_PWON: + dev_dbg(dev, "Power ON triggered by PMIC_ON_REQ.\n"); + type = RESET_POR; + break; + case REASON_WDOG: + dev_dbg(dev, "Detected cold reset by WDOGB pin\n"); + type = RESET_WDG; + break; + case REASON_SW_RST: + dev_dbg(dev, "Detected cold reset by SW_RST\n"); + type = RESET_RST; + break; + case REASON_PMIC_RST: + dev_dbg(dev, "Detected cold reset by PMIC_RST_B\n"); + type = RESET_EXT; + break; + default: + dev_warn(dev, "Could not determine reset reason.\n"); + type = RESET_UKWN; + } + + reset_source_set_device(dev, type); + + return 0; +}; + +static int __init pca9450_probe(struct device *dev) +{ + struct regmap *regmap; + int reg; + int ret; + + regmap = regmap_init_i2c(to_i2c_client(dev), &pca9450_regmap_i2c_config); + if (IS_ERR(regmap)) + return PTR_ERR(regmap); + + ret = regmap_register_cdev(regmap, NULL); + if (ret) + return ret; + + ret = regmap_read(regmap, PCA9450_REG_DEV_ID, ®); + if (ret) { + dev_err(dev, "Unable to read PMIC Chip ID\n"); + return ret; + } + + /* Chip ID defined in bits [7:4] */ + dev_info(dev, "PMIC Chip ID: 0x%x\n", (reg >> 4)); + + pca9450_get_reset_source(dev,regmap); + + return of_platform_populate(dev->of_node, NULL, dev); +} + +static __maybe_unused struct of_device_id pca9450_dt_ids[] = { + { .compatible = "nxp,pca9450a" }, + { .compatible = "nxp,pca9450c" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, pca9450_dt_ids); + +static struct driver pca9450_i2c_driver = { + .name = "pca9450-i2c", + .probe = pca9450_probe, + .of_compatible = DRV_OF_COMPAT(pca9450_dt_ids), +}; + +coredevice_i2c_driver(pca9450_i2c_driver); diff --git a/drivers/mtd/core.c b/drivers/mtd/core.c index ae6b0f9cd4..97a7996cf6 100644 --- a/drivers/mtd/core.c +++ b/drivers/mtd/core.c @@ -688,6 +688,7 @@ int add_mtd_device(struct mtd_info *mtd, const char *devname, int device_id) mtd->dev.id); INIT_LIST_HEAD(&mtd->partitions); + INIT_LIST_HEAD(&mtd->partitions_entry); mtd->cdev.priv = mtd; mtd->cdev.dev = &mtd->dev; @@ -763,8 +764,7 @@ int del_mtd_device(struct mtd_info *mtd) unregister_device(&mtd->dev); free(mtd->param_size.value); free(mtd->cdev.name); - if (mtd->parent) - list_del(&mtd->partitions_entry); + list_del(&mtd->partitions_entry); return 0; } diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 87926d88d2..19f4322f65 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -114,10 +114,14 @@ config NAND_ATMEL depends on ARCH_AT91 || (OFDEVICE && COMPILE_TEST) config NAND_ATMEL_LEGACY - def_bool !AT91_MULTI_BOARDS + def_bool !AT91_MULTI_BOARDS || SOC_AT91SAM9 depends on NAND_ATMEL help - Select legacy non-device tree enabled driver. + Select legacy driver for non-DT-enabled platforms + and for the deprecated non-EBI binding. + + The deprecated binding is currently the only one + support for AT91SAM9. config NAND_ATMEL_PMECC bool diff --git a/drivers/mtd/nand/atmel/legacy.c b/drivers/mtd/nand/atmel/legacy.c index cf402549b8..cee9e49be0 100644 --- a/drivers/mtd/nand/atmel/legacy.c +++ b/drivers/mtd/nand/atmel/legacy.c @@ -23,6 +23,10 @@ #include <init.h> #include <gpio.h> +#include <of.h> +#include <of_gpio.h> +#include <of_mtd.h> + #include <linux/mtd/mtd.h> #include <linux/mtd/rawnand.h> #include <linux/mtd/nand.h> @@ -1105,6 +1109,92 @@ static void atmel_nand_hwctl(struct nand_chip *nand_chip, int mode) { } +static int atmel_nand_of_init(struct atmel_nand_host *host, struct device_node *np) +{ + u32 val; + u32 offset[2]; + int ecc_mode; + struct atmel_nand_data *board = host->board; + enum of_gpio_flags flags = 0; + + if (!IS_ENABLED(CONFIG_OFDEVICE)) + return -ENOSYS; + + if (of_property_read_u32(np, "atmel,nand-addr-offset", &val) == 0) { + if (val >= 32) { + dev_err(host->dev, "invalid addr-offset %u\n", val); + return -EINVAL; + } + board->ale = val; + } + + if (of_property_read_u32(np, "atmel,nand-cmd-offset", &val) == 0) { + if (val >= 32) { + dev_err(host->dev, "invalid cmd-offset %u\n", val); + return -EINVAL; + } + board->cle = val; + } + + ecc_mode = of_get_nand_ecc_mode(np); + + board->ecc_mode = ecc_mode < 0 ? NAND_ECC_SOFT : ecc_mode; + + board->on_flash_bbt = of_get_nand_on_flash_bbt(np); + + if (of_get_nand_bus_width(np) == 16) + board->bus_width_16 = 1; + + board->rdy_pin = of_get_gpio_flags(np, 0, &flags); + board->enable_pin = of_get_gpio(np, 1); + board->det_pin = of_get_gpio(np, 2); + + board->has_pmecc = of_property_read_bool(np, "atmel,has-pmecc"); + + if (!(board->ecc_mode == NAND_ECC_HW) || !board->has_pmecc) + return 0; /* Not using PMECC */ + + /* use PMECC, get correction capability, sector size and lookup + * table offset. + * If correction bits and sector size are not specified, then + * find + * them from NAND ONFI parameters. + */ + if (of_property_read_u32(np, "atmel,pmecc-cap", &val) == 0) { + if ((val != 2) && (val != 4) && (val != 8) && (val != 12) && (val != 24)) { + dev_err(host->dev, "Unsupported PMECC correction capability: %d" + " should be 2, 4, 8, 12 or 24\n", val); + return -EINVAL; + } + + board->pmecc_corr_cap = (u8)val; + } + + if (of_property_read_u32(np, "atmel,pmecc-sector-size", &val) == 0) { + if ((val != 512) && (val != 1024)) { + dev_err(host->dev, "Unsupported PMECC sector size: %d" + " should be 512 or 1024 bytes\n", val); + return -EINVAL; + } + + board->pmecc_sector_size = (u16)val; + } + + if (of_property_read_u32_array(np, "atmel,pmecc-lookup-table-offset", offset, 2) != 0) { + dev_err(host->dev, "Cannot get PMECC lookup table offset\n"); + return -EINVAL; + } + + if (!offset[0] && !offset[1]) { + dev_err(host->dev, "Invalid PMECC lookup table offset\n"); + return -EINVAL; + } + + board->pmecc_lookup_table_offset = (board->pmecc_sector_size == 512) ? offset[0] : offset[1]; + + return 0; +} + static int atmel_hw_nand_init_params(struct device *dev, struct atmel_nand_host *host) { @@ -1191,7 +1281,13 @@ static int __init atmel_nand_probe(struct device *dev) host->board = pdata; host->dev = dev; - memcpy(host->board, dev->platform_data, sizeof(struct atmel_nand_data)); + if (dev->of_node) { + res = atmel_nand_of_init(host, dev->of_node); + if (res) + goto err_no_card; + } else { + memcpy(host->board, dev->platform_data, sizeof(struct atmel_nand_data)); + } nand_chip->priv = host; /* link the private data structures */ mtd->dev.parent = dev; @@ -1327,9 +1423,15 @@ err_no_card: return res; } +static struct of_device_id atmel_nand_dt_ids[] = { + { .compatible = "atmel,at91rm9200-nand" }, + { /* sentinel */ } +}; + static struct driver atmel_nand_driver = { .name = "atmel_nand", .probe = atmel_nand_probe, + .of_compatible = DRV_OF_COMPAT(atmel_nand_dt_ids), }; device_platform_driver(atmel_nand_driver); diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig index 2e60734156..3877ed737e 100644 --- a/drivers/nvmem/Kconfig +++ b/drivers/nvmem/Kconfig @@ -58,6 +58,13 @@ config EEPROM_93XX46 supports both read and write commands and also the command to erase the whole EEPROM. +config NVMEM_ROCKCHIP_OTP + tristate "Rockchip OTP controller support" + depends on ARCH_ROCKCHIP || COMPILE_TEST + help + This is a simple driver to dump specified values of Rockchip SoC + from otp, such as cpu-leakage, id etc. + config STM32_BSEC tristate "STM32 Boot and security and OTP control" depends on ARCH_STM32MP diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index 62a1f925dd..a3f3c31602 100644 --- a/drivers/nvmem/Makefile +++ b/drivers/nvmem/Makefile @@ -27,4 +27,5 @@ nvmem_bsec-y := bsec.o obj-$(CONFIG_KVX_OTP_NV) += nvmem-kvx-otp-nv.o nvmem-kvx-otp-nv-y := kvx-otp-nv.o +obj-$(CONFIG_NVMEM_ROCKCHIP_OTP)+= rockchip-otp.o obj-$(CONFIG_STARFIVE_OTP) += starfive-otp.o diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c new file mode 100644 index 0000000000..b8da4c5380 --- /dev/null +++ b/drivers/nvmem/rockchip-otp.c @@ -0,0 +1,448 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Rockchip OTP Driver + * + * Copyright (c) 2018 Rockchip Electronics Co. Ltd. + * Author: Finley Xiao <finley.xiao@rock-chips.com> + */ + +#include <common.h> +#include <driver.h> +#include <init.h> +#include <of.h> +#include <of_device.h> +#include <linux/clk.h> +#include <linux/iopoll.h> +#include <linux/nvmem-provider.h> +#include <linux/reset.h> + +/* OTP Register Offsets */ +#define OTPC_SBPI_CTRL 0x0020 +#define OTPC_SBPI_CMD_VALID_PRE 0x0024 +#define OTPC_SBPI_CS_VALID_PRE 0x0028 +#define OTPC_SBPI_STATUS 0x002C +#define OTPC_USER_CTRL 0x0100 +#define OTPC_USER_ADDR 0x0104 +#define OTPC_USER_ENABLE 0x0108 +#define OTPC_USER_Q 0x0124 +#define OTPC_INT_STATUS 0x0304 +#define OTPC_SBPI_CMD0_OFFSET 0x1000 +#define OTPC_SBPI_CMD1_OFFSET 0x1004 + +/* OTP Register bits and masks */ +#define OTPC_USER_ADDR_MASK GENMASK(31, 16) +#define OTPC_USE_USER BIT(0) +#define OTPC_USE_USER_MASK GENMASK(16, 16) +#define OTPC_USER_FSM_ENABLE BIT(0) +#define OTPC_USER_FSM_ENABLE_MASK GENMASK(16, 16) +#define OTPC_SBPI_DONE BIT(1) +#define OTPC_USER_DONE BIT(2) + +#define SBPI_DAP_ADDR 0x02 +#define SBPI_DAP_ADDR_SHIFT 8 +#define SBPI_DAP_ADDR_MASK GENMASK(31, 24) +#define SBPI_CMD_VALID_MASK GENMASK(31, 16) +#define SBPI_DAP_CMD_WRF 0xC0 +#define SBPI_DAP_REG_ECC 0x3A +#define SBPI_ECC_ENABLE 0x00 +#define SBPI_ECC_DISABLE 0x09 +#define SBPI_ENABLE BIT(0) +#define SBPI_ENABLE_MASK GENMASK(16, 16) + +#define OTPC_TIMEOUT 10000 + +#define RK3568_NBYTES 2 + +/* RK3588 Register */ +#define RK3588_OTPC_AUTO_CTRL 0x04 +#define RK3588_OTPC_AUTO_EN 0x08 +#define RK3588_OTPC_INT_ST 0x84 +#define RK3588_OTPC_DOUT0 0x20 +#define RK3588_NO_SECURE_OFFSET 0x300 +#define RK3588_NBYTES 4 +#define RK3588_BURST_NUM 1 +#define RK3588_BURST_SHIFT 8 +#define RK3588_ADDR_SHIFT 16 +#define RK3588_AUTO_EN BIT(0) +#define RK3588_RD_DONE BIT(1) + +struct rockchip_data { + int size; + const char * const *clks; + int num_clks; + int (*reg_read)(void *ctx, unsigned int reg, void *val, size_t val_size); +}; + +struct rockchip_otp { + struct device *dev; + void __iomem *base; + struct clk_bulk_data *clks; + struct reset_control *rst; + const struct rockchip_data *data; +}; + +static int rockchip_otp_reset(struct rockchip_otp *otp) +{ + int ret; + + ret = reset_control_assert(otp->rst); + if (ret) { + dev_err(otp->dev, "failed to assert otp phy %d\n", ret); + return ret; + } + + udelay(2); + + ret = reset_control_deassert(otp->rst); + if (ret) { + dev_err(otp->dev, "failed to deassert otp phy %d\n", ret); + return ret; + } + + return 0; +} + +static int rockchip_otp_wait_status(struct rockchip_otp *otp, + unsigned int reg, u32 flag) +{ + u32 status = 0; + int ret; + + ret = readl_poll_timeout(otp->base + reg, status, + (status & flag), OTPC_TIMEOUT); + if (ret) + return ret; + + /* clean int status */ + writel(flag, otp->base + reg); + + return 0; +} + +static int rockchip_otp_ecc_enable(struct rockchip_otp *otp, bool enable) +{ + int ret = 0; + + writel(SBPI_DAP_ADDR_MASK | (SBPI_DAP_ADDR << SBPI_DAP_ADDR_SHIFT), + otp->base + OTPC_SBPI_CTRL); + + writel(SBPI_CMD_VALID_MASK | 0x1, otp->base + OTPC_SBPI_CMD_VALID_PRE); + writel(SBPI_DAP_CMD_WRF | SBPI_DAP_REG_ECC, + otp->base + OTPC_SBPI_CMD0_OFFSET); + if (enable) + writel(SBPI_ECC_ENABLE, otp->base + OTPC_SBPI_CMD1_OFFSET); + else + writel(SBPI_ECC_DISABLE, otp->base + OTPC_SBPI_CMD1_OFFSET); + + writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL); + + ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_SBPI_DONE); + if (ret < 0) + dev_err(otp->dev, "timeout during ecc_enable\n"); + + return ret; +} + +static int px30_otp_read(void *context, unsigned int offset, + void *val, size_t bytes) +{ + struct rockchip_otp *otp = context; + u8 *buf = val; + int ret; + + ret = rockchip_otp_reset(otp); + if (ret) { + dev_err(otp->dev, "failed to reset otp phy\n"); + return ret; + } + + ret = rockchip_otp_ecc_enable(otp, false); + if (ret < 0) { + dev_err(otp->dev, "rockchip_otp_ecc_enable err\n"); + return ret; + } + + writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); + udelay(5); + while (bytes--) { + writel(offset++ | OTPC_USER_ADDR_MASK, + otp->base + OTPC_USER_ADDR); + writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK, + otp->base + OTPC_USER_ENABLE); + ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_USER_DONE); + if (ret < 0) { + dev_err(otp->dev, "timeout during read setup\n"); + goto read_end; + } + *buf++ = readb(otp->base + OTPC_USER_Q); + } + +read_end: + writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); + + return ret; +} + +static int rk3568_otp_read(void *context, unsigned int offset, void *val, + size_t bytes) +{ + struct rockchip_otp *otp = context; + unsigned int addr_start, addr_end, addr_offset, addr_len; + u32 out_value; + u8 *buf; + int ret = 0, i = 0; + + addr_start = rounddown(offset, RK3568_NBYTES) / RK3568_NBYTES; + addr_end = roundup(offset + bytes, RK3568_NBYTES) / RK3568_NBYTES; + addr_offset = offset % RK3568_NBYTES; + addr_len = addr_end - addr_start; + + buf = kzalloc(array3_size(addr_len, RK3568_NBYTES, sizeof(*buf)), + GFP_KERNEL); + if (!buf) + return -ENOMEM; + + ret = rockchip_otp_reset(otp); + if (ret) { + dev_err(otp->dev, "failed to reset otp phy\n"); + goto out; + } + + ret = rockchip_otp_ecc_enable(otp, false); + if (ret < 0) { + dev_err(otp->dev, "rockchip_otp_ecc_enable err\n"); + goto out; + } + + writel(OTPC_USE_USER | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); + udelay(5); + while (addr_len--) { + writel(addr_start++ | OTPC_USER_ADDR_MASK, + otp->base + OTPC_USER_ADDR); + writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK, + otp->base + OTPC_USER_ENABLE); + ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_USER_DONE); + if (ret < 0) { + dev_err(otp->dev, "timeout during read setup\n"); + goto read_end; + } + out_value = readl(otp->base + OTPC_USER_Q); + memcpy(&buf[i], &out_value, RK3568_NBYTES); + i += RK3568_NBYTES; + } + + memcpy(val, buf + addr_offset, bytes); + +read_end: + writel(0x0 | OTPC_USE_USER_MASK, otp->base + OTPC_USER_CTRL); +out: + kfree(buf); + + return ret; +} + +static int rk3588_otp_read(void *context, unsigned int offset, + void *val, size_t bytes) +{ + struct rockchip_otp *otp = context; + unsigned int addr_start, addr_end, addr_len; + int ret = 0, i = 0; + u32 data; + u8 *buf; + + addr_start = round_down(offset, RK3588_NBYTES) / RK3588_NBYTES; + addr_end = round_up(offset + bytes, RK3588_NBYTES) / RK3588_NBYTES; + addr_len = addr_end - addr_start; + addr_start += RK3588_NO_SECURE_OFFSET; + + buf = kzalloc(array_size(addr_len, RK3588_NBYTES), GFP_KERNEL); + if (!buf) + return -ENOMEM; + + while (addr_len--) { + writel((addr_start << RK3588_ADDR_SHIFT) | + (RK3588_BURST_NUM << RK3588_BURST_SHIFT), + otp->base + RK3588_OTPC_AUTO_CTRL); + writel(RK3588_AUTO_EN, otp->base + RK3588_OTPC_AUTO_EN); + + ret = rockchip_otp_wait_status(otp, RK3588_OTPC_INT_ST, + RK3588_RD_DONE); + if (ret < 0) { + dev_err(otp->dev, "timeout during read setup\n"); + goto read_end; + } + + data = readl(otp->base + RK3588_OTPC_DOUT0); + memcpy(&buf[i], &data, RK3588_NBYTES); + + i += RK3588_NBYTES; + addr_start++; + } + + memcpy(val, buf + offset % RK3588_NBYTES, bytes); + +read_end: + kfree(buf); + + return ret; +} + +static int rockchip_otp_read(void *context, unsigned int offset, + void *val, size_t bytes) +{ + struct rockchip_otp *otp = context; + int ret; + + if (!otp->data || !otp->data->reg_read) + return -EINVAL; + + ret = clk_bulk_enable(otp->data->num_clks, otp->clks); + if (ret < 0) { + dev_err(otp->dev, "failed to prepare/enable clks\n"); + return ret; + } + + ret = otp->data->reg_read(context, offset, val, bytes); + + clk_bulk_disable(otp->data->num_clks, otp->clks); + + return ret; +} + +static struct nvmem_config otp_config = { + .name = "rockchip-otp", + .read_only = true, + .stride = 1, + .word_size = 1, + .reg_read = rockchip_otp_read, +}; + +static const char * const px30_otp_clocks[] = { + "otp", "apb_pclk", "phy", +}; + +static const struct rockchip_data px30_data = { + .size = 0x40, + .clks = px30_otp_clocks, + .num_clks = ARRAY_SIZE(px30_otp_clocks), + .reg_read = px30_otp_read, +}; + +static const char * const rk3568_otp_clocks[] = { + "usr", "sbpi", "apb", "phy", +}; + +static const struct rockchip_data rk3568_data = { + .size = 0x80, + .clks = rk3568_otp_clocks, + .num_clks = ARRAY_SIZE(rk3568_otp_clocks), + .reg_read = rk3568_otp_read, +}; + +static const char * const rk3588_otp_clocks[] = { + "otp", "apb_pclk", "phy", "arb", +}; + +static const struct rockchip_data rk3588_data = { + .size = 0x400, + .clks = rk3588_otp_clocks, + .num_clks = ARRAY_SIZE(rk3588_otp_clocks), + .reg_read = rk3588_otp_read, +}; + +static __maybe_unused const struct of_device_id rockchip_otp_match[] = { + { + .compatible = "rockchip,px30-otp", + .data = &px30_data, + }, + { + .compatible = "rockchip,rk3308-otp", + .data = &px30_data, + }, + { + .compatible = "rockchip,rk3568-otp", + .data = &rk3568_data, + }, + { + .compatible = "rockchip,rk3588-otp", + .data = &rk3588_data, + }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, rockchip_otp_match); + +static int rockchip_otp_probe(struct device *dev) +{ + struct rockchip_otp *otp; + const struct rockchip_data *data; + struct nvmem_device *nvmem; + struct resource *res; + int ret, i; + + data = of_device_get_match_data(dev); + if (!data) + return dev_err_probe(dev, -EINVAL, "failed to get match data\n"); + + otp = kzalloc(sizeof(*otp), GFP_KERNEL); + if (!otp) + return -ENOMEM; + + res = dev_request_mem_resource(dev, 0); + if (IS_ERR(res)) { + ret = PTR_ERR(res); + goto err_free; + } + + otp->data = data; + otp->dev = dev; + otp->base = IOMEM(res->start); + + otp->clks = kcalloc(data->num_clks, sizeof(*otp->clks), GFP_KERNEL); + if (!otp->clks) { + ret = -ENOMEM; + goto err_free; + } + + for (i = 0; i < data->num_clks; ++i) + otp->clks[i].id = data->clks[i]; + + ret = clk_bulk_get_optional(dev, data->num_clks, otp->clks); + if (ret) + goto err_clk; + + otp->rst = reset_control_get(dev, NULL); + if (IS_ERR(otp->rst)) { + ret = PTR_ERR(otp->rst); + goto err_rst; + } + + otp_config.size = data->size; + otp_config.priv = otp; + otp_config.dev = dev; + + nvmem = nvmem_register(&otp_config); + if (!IS_ERR(nvmem)) + return 0; + + ret = PTR_ERR(nvmem); + + reset_control_put(otp->rst); + +err_rst: + clk_bulk_put_all(data->num_clks, otp->clks); + +err_clk: + kfree(otp->clks); + +err_free: + kfree(otp); + + return ret; +} + +static struct driver rockchip_otp_driver = { + .name = "rockchip-otp", + .probe = rockchip_otp_probe, + .of_compatible = DRV_OF_COMPAT(rockchip_otp_match), +}; +device_platform_driver(rockchip_otp_driver); diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index 9d72fafd36..5c21bab5de 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -14,8 +14,23 @@ #include <memory.h> #include <linux/sizes.h> #include <linux/ctype.h> +#include <linux/overflow.h> +#include <linux/string_helpers.h> #include <linux/err.h> +static inline bool __dt_ptr_ok(const struct fdt_header *fdt, const void *p, + unsigned elem_size, unsigned elem_align) +{ + if (!p || (const void *)fdt > p || !PTR_IS_ALIGNED(p, elem_align) || + p + elem_size > (const void *)fdt + be32_to_cpu(fdt->totalsize)) { + pr_err("unflatten: offset overflows or misaligns FDT\n"); + return false; + } + + return true; +} +#define dt_ptr_ok(fdt, p) __dt_ptr_ok(fdt, p, sizeof(*(p)), __alignof__(*(p))) + static inline uint32_t dt_struct_advance(struct fdt_header *f, uint32_t dt, int size) { dt += size; @@ -29,27 +44,38 @@ static inline uint32_t dt_struct_advance(struct fdt_header *f, uint32_t dt, int static inline char *dt_string(struct fdt_header *f, char *strstart, uint32_t ofs) { + char *str; + if (ofs > f->size_dt_strings) return NULL; - else - return strstart + ofs; + + str = strstart + ofs; + + return string_is_terminated(str, f->size_dt_strings - ofs) ? str : NULL; } static int of_reservemap_num_entries(const struct fdt_header *fdt) { - const struct fdt_reserve_entry *r; + /* + * FDT may violate spec mandated 8-byte alignment if unflattening it out of + * a FIT image property, so play it safe here. + */ + const struct fdt_reserve_entry_unaligned { + fdt64_t address; + fdt64_t size; + } __packed *r; int n = 0; r = (void *)fdt + be32_to_cpu(fdt->off_mem_rsvmap); - while (r->size) { + while (dt_ptr_ok(fdt, r) && r->size) { n++; r++; if (n == OF_MAX_RESERVE_MAP) return -EINVAL; } - return n; + return r->size == 0 ? n : -ESPIPE; } /** @@ -135,12 +161,12 @@ static struct device_node *__of_unflatten_dtb(const void *infdt, int size, if (f.totalsize > size) return ERR_PTR(-EINVAL); - if (f.off_dt_struct + f.size_dt_struct > f.totalsize) { + if (size_add(f.off_dt_struct, f.size_dt_struct) > f.totalsize) { pr_err("unflatten: dt size exceeds total size\n"); return ERR_PTR(-ESPIPE); } - if (f.off_dt_strings + f.size_dt_strings > f.totalsize) { + if (size_add(f.off_dt_strings, f.size_dt_strings) > f.totalsize) { pr_err("unflatten: string size exceeds total size\n"); return ERR_PTR(-ESPIPE); } @@ -157,7 +183,13 @@ static struct device_node *__of_unflatten_dtb(const void *infdt, int size, goto err; while (1) { - tag = be32_to_cpu(*(uint32_t *)(infdt + dt_struct)); + __be32 *tagp = (uint32_t *)(infdt + dt_struct); + if (!dt_ptr_ok(infdt, tagp)) { + ret = -ESPIPE; + goto err; + } + + tag = be32_to_cpu(*tagp); switch (tag) { case FDT_BEGIN_NODE: @@ -554,9 +586,7 @@ void of_clean_reserve_map(void) * @__fdt: The devicetree blob * * This adds the reservemap entries previously collected in - * of_add_reserve_entry() to a devicetree binary blob. This also - * adds the devicetree itself to the reserved list, so after calling - * this function the tree should not be relocated anymore. + * of_add_reserve_entry() to a devicetree binary blob. */ void fdt_add_reserve_map(void *__fdt) { @@ -584,10 +614,29 @@ void fdt_add_reserve_map(void *__fdt) fdt_res++; } - of_write_number(&fdt_res->address, (unsigned long)__fdt, 2); - of_write_number(&fdt_res->size, be32_to_cpu(fdt->totalsize), 2); - fdt_res++; - of_write_number(&fdt_res->address, 0, 2); of_write_number(&fdt_res->size, 0, 2); } + +void fdt_print_reserve_map(const void *__fdt) +{ + const struct fdt_header *fdt = __fdt; + const struct fdt_reserve_entry *fdt_res = + __fdt + be32_to_cpu(fdt->off_mem_rsvmap); + int n = 0; + + while (1) { + uint64_t size = fdt64_to_cpu(fdt_res->size); + uint64_t address = fdt64_to_cpu(fdt_res->address); + + if (!size) + break; + + printf("/memreserve/ #%d: 0x%08llx - 0x%08llx\n", n, address, address + size - 1); + + n++; + fdt_res++; + if (n == OF_MAX_RESERVE_MAP) + return; + } +} diff --git a/drivers/of/platform.c b/drivers/of/platform.c index bd5f2ad82c..1f79a539f5 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -23,11 +23,9 @@ struct device *of_find_device_by_node(struct device_node *np) { struct device *dev; - int ret; - ret = of_device_ensure_probed(np); - if (ret) - return NULL; + /* Not having a driver is not an error here */ + (void)of_device_ensure_probed(np); if (deep_probe_is_supported()) return np->dev; diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c index 31df7fb495..4dd1634a47 100644 --- a/drivers/remoteproc/stm32_rproc.c +++ b/drivers/remoteproc/stm32_rproc.c @@ -30,8 +30,9 @@ struct stm32_syscon { struct stm32_rproc { struct reset_control *rst; + struct reset_control *hold_boot_rst; struct stm32_syscon hold_boot; - bool secured_soc; + bool hold_boot_smc; }; static void *stm32_rproc_da_to_va(struct rproc *rproc, u64 da, int len) @@ -54,13 +55,28 @@ static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold) struct arm_smccc_res smc_res; int val, err; + /* + * Three ways to manage the hold boot + * - using SCMI: the hold boot is managed as a reset, + * - using Linux(no SCMI): the hold boot is managed as a syscon register + * - using SMC call (deprecated): use SMC reset interface + */ + val = hold ? HOLD_BOOT : RELEASE_BOOT; - if (IS_ENABLED(CONFIG_ARM_SMCC) && ddata->secured_soc) { + if (ddata->hold_boot_rst) { + /* Use the SCMI reset controller */ + if (!hold) + err = reset_control_deassert(ddata->hold_boot_rst); + else + err = reset_control_assert(ddata->hold_boot_rst); + } else if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->hold_boot_smc) { + /* Use the SMC call */ arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE, hold_boot->reg, val, 0, 0, 0, 0, &smc_res); err = smc_res.a0; } else { + /* Use syscon */ err = regmap_update_bits(hold_boot->map, hold_boot->reg, hold_boot->mask, val); } @@ -142,28 +158,42 @@ static int stm32_rproc_parse_dt(struct device *dev, struct stm32_rproc *ddata) } /* - * if platform is secured the hold boot bit must be written by - * smc call and read normally. - * if not secure the hold boot bit could be read/write normally + * Three ways to manage the hold boot + * - using SCMI: the hold boot is managed as a reset + * The DT "reset-mames" property should be defined with 2 items: + * reset-names = "mcu_rst", "hold_boot"; + * - using SMC call (deprecated): use SMC reset interface + * The DT "reset-mames" property is optional, "st,syscfg-tz" is required + * - default(no SCMI, no SMC): the hold boot is managed as a syscon register + * The DT "reset-mames" property is optional, "st,syscfg-holdboot" is required */ - err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz); - if (err) { - dev_err(dev, "failed to get tz syscfg\n"); - return err; - } - err = regmap_read(tz.map, tz.reg, &tzen); - if (err) { - dev_err(dev, "failed to read tzen\n"); - return err; + ddata->hold_boot_rst = reset_control_get_optional(dev, "hold_boot"); + if (IS_ERR(ddata->hold_boot_rst)) + return dev_err_probe(dev, PTR_ERR(ddata->hold_boot_rst), + "failed to get hold_boot reset\n"); + + if (!ddata->hold_boot_rst && IS_ENABLED(CONFIG_HAVE_ARM_SMCCC)) { + /* Manage the MCU_BOOT using SMC call */ + err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz); + if (!err) { + err = regmap_read(tz.map, tz.reg, &tzen); + if (err) { + dev_err(dev, "failed to read tzen\n"); + return err; + } + ddata->hold_boot_smc = tzen & tz.mask; + } } - ddata->secured_soc = tzen & tz.mask; - err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", - &ddata->hold_boot); - if (err) { - dev_err(dev, "failed to get hold boot\n"); - return err; + if (!ddata->hold_boot_rst && !ddata->hold_boot_smc) { + /* Default: hold boot manage it through the syscon controller */ + err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot", + &ddata->hold_boot); + if (err) { + dev_err(dev, "failed to get hold boot\n"); + return err; + } } return 0; diff --git a/drivers/usb/gadget/udc/fsl_udc_pbl.c b/drivers/usb/gadget/udc/fsl_udc_pbl.c index 6a4e0557fc..a5364decb1 100644 --- a/drivers/usb/gadget/udc/fsl_udc_pbl.c +++ b/drivers/usb/gadget/udc/fsl_udc_pbl.c @@ -136,7 +136,7 @@ static void dtd_complete_irq(struct usb_dr_device *dr) actual += len - 1; to_transfer -= len - 1; - if (to_transfer == 0) + if (to_transfer <= 0) state = state_complete; } diff --git a/drivers/video/edid.c b/drivers/video/edid.c index 96489f2a37..7e6747ccd5 100644 --- a/drivers/video/edid.c +++ b/drivers/video/edid.c @@ -847,20 +847,27 @@ edid_do_read_i2c(struct i2c_adapter *adapter, unsigned char *buf, ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); } while (ret != xfers && --retries); - return ret == xfers ? 0 : -1; + if (ret == 0) + ret = -EPROTO; + + return ret == xfers ? 0 : ret; } void *edid_read_i2c(struct i2c_adapter *adapter) { u8 *block; + int ret; if (!IS_ENABLED(CONFIG_I2C)) return NULL; block = xmalloc(EDID_LENGTH); - if (edid_do_read_i2c(adapter, block, 0, EDID_LENGTH)) + ret = edid_do_read_i2c(adapter, block, 0, EDID_LENGTH); + if (ret) { + dev_dbg(&adapter->dev, "EDID readout failed: %pe\n", ERR_PTR(ret)); goto out; + } return block; out: diff --git a/dts/Bindings/ata/pata-common.yaml b/dts/Bindings/ata/pata-common.yaml index 337ddf1113..4e867dd4d4 100644 --- a/dts/Bindings/ata/pata-common.yaml +++ b/dts/Bindings/ata/pata-common.yaml @@ -38,6 +38,7 @@ patternProperties: ID number 0 and the slave drive will have ID number 1. The PATA port nodes will be named "ide-port". type: object + additionalProperties: false properties: reg: diff --git a/dts/Bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml b/dts/Bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml index b568d0ce43..7e1ffc5510 100644 --- a/dts/Bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml +++ b/dts/Bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml @@ -73,9 +73,6 @@ patternProperties: "^.*@[0-9a-f]+$": description: Devices attached to the bus type: object - properties: - reg: - maxItems: 1 required: - reg diff --git a/dts/Bindings/cache/andestech,ax45mp-cache.yaml b/dts/Bindings/cache/andestech,ax45mp-cache.yaml index 9ab5f0c435..d2cbe49f4e 100644 --- a/dts/Bindings/cache/andestech,ax45mp-cache.yaml +++ b/dts/Bindings/cache/andestech,ax45mp-cache.yaml @@ -69,7 +69,7 @@ examples: - | #include <dt-bindings/interrupt-controller/irq.h> - cache-controller@2010000 { + cache-controller@13400000 { compatible = "andestech,ax45mp-cache", "cache"; reg = <0x13400000 0x100000>; interrupts = <508 IRQ_TYPE_LEVEL_HIGH>; diff --git a/dts/Bindings/clock/renesas,5p35023.yaml b/dts/Bindings/clock/renesas,5p35023.yaml index 839648e753..42b6f80613 100644 --- a/dts/Bindings/clock/renesas,5p35023.yaml +++ b/dts/Bindings/clock/renesas,5p35023.yaml @@ -37,6 +37,9 @@ properties: maxItems: 1 '#clock-cells': + description: + The index in the assigned-clocks is mapped to the output clock as below + 0 - REF, 1 - SE1, 2 - SE2, 3 - SE3, 4 - DIFF1, 5 - DIFF2. const: 1 clocks: @@ -68,7 +71,7 @@ examples: reg = <0x68>; #clock-cells = <1>; - clocks = <&x1_x2>; + clocks = <&x1>; renesas,settings = [ 80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf @@ -79,8 +82,8 @@ examples: assigned-clocks = <&versa3 0>, <&versa3 1>, <&versa3 2>, <&versa3 3>, <&versa3 4>, <&versa3 5>; - assigned-clock-rates = <12288000>, <25000000>, - <12000000>, <11289600>, - <11289600>, <24000000>; + assigned-clock-rates = <24000000>, <11289600>, + <11289600>, <12000000>, + <25000000>, <12288000>; }; }; diff --git a/dts/Bindings/display/imx/fsl,imx6-hdmi.yaml b/dts/Bindings/display/imx/fsl,imx6-hdmi.yaml index af7fe9c4d1..7979cf07f1 100644 --- a/dts/Bindings/display/imx/fsl,imx6-hdmi.yaml +++ b/dts/Bindings/display/imx/fsl,imx6-hdmi.yaml @@ -87,7 +87,7 @@ required: - interrupts - ports -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/dts/Bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml b/dts/Bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml index 23ada8f875..769ce23aaa 100644 --- a/dts/Bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml +++ b/dts/Bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml @@ -13,6 +13,8 @@ description: | maintainers: - Michael Tretter <m.tretter@pengutronix.de> + - Harini Katakam <harini.katakam@amd.com> + - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> allOf: - $ref: ../dma-controller.yaml# @@ -65,6 +67,7 @@ required: - interrupts - clocks - clock-names + - xlnx,bus-width additionalProperties: false diff --git a/dts/Bindings/i2c/i2c-mxs.yaml b/dts/Bindings/i2c/i2c-mxs.yaml index 21ae7bce03..171a414072 100644 --- a/dts/Bindings/i2c/i2c-mxs.yaml +++ b/dts/Bindings/i2c/i2c-mxs.yaml @@ -9,6 +9,9 @@ title: Freescale MXS Inter IC (I2C) Controller maintainers: - Shawn Guo <shawnguo@kernel.org> +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + properties: compatible: enum: @@ -37,7 +40,7 @@ required: - dmas - dma-names -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/dts/Bindings/iio/adc/adi,ad7292.yaml b/dts/Bindings/iio/adc/adi,ad7292.yaml index 7cc4ddc4e9..2aa1f4b063 100644 --- a/dts/Bindings/iio/adc/adi,ad7292.yaml +++ b/dts/Bindings/iio/adc/adi,ad7292.yaml @@ -61,7 +61,7 @@ patternProperties: required: - reg - additionalProperties: true + additionalProperties: false allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# diff --git a/dts/Bindings/iio/light/rohm,bu27010.yaml b/dts/Bindings/iio/light/rohm,bu27010.yaml index 8376d64a64..bed42d5d0d 100644 --- a/dts/Bindings/iio/light/rohm,bu27010.yaml +++ b/dts/Bindings/iio/light/rohm,bu27010.yaml @@ -45,5 +45,6 @@ examples: light-sensor@38 { compatible = "rohm,bu27010"; reg = <0x38>; + vdd-supply = <&vdd>; }; }; diff --git a/dts/Bindings/interrupt-controller/arm,gic-v3.yaml b/dts/Bindings/interrupt-controller/arm,gic-v3.yaml index 2bc38479a4..0f4a062c9d 100644 --- a/dts/Bindings/interrupt-controller/arm,gic-v3.yaml +++ b/dts/Bindings/interrupt-controller/arm,gic-v3.yaml @@ -106,6 +106,12 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 maximum: 4096 + dma-noncoherent: + description: + Present if the GIC redistributors permit programming shareability + and cacheability attributes but are connected to a non-coherent + downstream interconnect. + msi-controller: description: Only present if the Message Based Interrupt functionality is @@ -193,6 +199,12 @@ patternProperties: compatible: const: arm,gic-v3-its + dma-noncoherent: + description: + Present if the GIC ITS permits programming shareability and + cacheability attributes but is connected to a non-coherent + downstream interconnect. + msi-controller: true "#msi-cells": diff --git a/dts/Bindings/interrupt-controller/renesas,irqc.yaml b/dts/Bindings/interrupt-controller/renesas,irqc.yaml index 95033cb514..b417341fc8 100644 --- a/dts/Bindings/interrupt-controller/renesas,irqc.yaml +++ b/dts/Bindings/interrupt-controller/renesas,irqc.yaml @@ -37,6 +37,7 @@ properties: - renesas,intc-ex-r8a77990 # R-Car E3 - renesas,intc-ex-r8a77995 # R-Car D3 - renesas,intc-ex-r8a779a0 # R-Car V3U + - renesas,intc-ex-r8a779f0 # R-Car S4-8 - renesas,intc-ex-r8a779g0 # R-Car V4H - const: renesas,irqc diff --git a/dts/Bindings/interrupt-controller/renesas,rzg2l-irqc.yaml b/dts/Bindings/interrupt-controller/renesas,rzg2l-irqc.yaml index 33b90e975e..2ef3081eaa 100644 --- a/dts/Bindings/interrupt-controller/renesas,rzg2l-irqc.yaml +++ b/dts/Bindings/interrupt-controller/renesas,rzg2l-irqc.yaml @@ -19,20 +19,19 @@ description: | - NMI edge select (NMI is not treated as NMI exception and supports fall edge and stand-up edge detection interrupts) -allOf: - - $ref: /schemas/interrupt-controller.yaml# - properties: compatible: items: - enum: + - renesas,r9a07g043u-irqc # RZ/G2UL - renesas,r9a07g044-irqc # RZ/G2{L,LC} - renesas,r9a07g054-irqc # RZ/V2L - const: renesas,rzg2l-irqc '#interrupt-cells': - description: The first cell should contain external interrupt number (IRQ0-7) and the - second cell is used to specify the flag. + description: The first cell should contain a macro RZG2L_{NMI,IRQX} included in the + include/dt-bindings/interrupt-controller/irqc-rzg2l.h and the second + cell is used to specify the flag. const: 2 '#address-cells': @@ -44,7 +43,96 @@ properties: maxItems: 1 interrupts: - maxItems: 41 + minItems: 41 + items: + - description: NMI interrupt + - description: IRQ0 interrupt + - description: IRQ1 interrupt + - description: IRQ2 interrupt + - description: IRQ3 interrupt + - description: IRQ4 interrupt + - description: IRQ5 interrupt + - description: IRQ6 interrupt + - description: IRQ7 interrupt + - description: GPIO interrupt, TINT0 + - description: GPIO interrupt, TINT1 + - description: GPIO interrupt, TINT2 + - description: GPIO interrupt, TINT3 + - description: GPIO interrupt, TINT4 + - description: GPIO interrupt, TINT5 + - description: GPIO interrupt, TINT6 + - description: GPIO interrupt, TINT7 + - description: GPIO interrupt, TINT8 + - description: GPIO interrupt, TINT9 + - description: GPIO interrupt, TINT10 + - description: GPIO interrupt, TINT11 + - description: GPIO interrupt, TINT12 + - description: GPIO interrupt, TINT13 + - description: GPIO interrupt, TINT14 + - description: GPIO interrupt, TINT15 + - description: GPIO interrupt, TINT16 + - description: GPIO interrupt, TINT17 + - description: GPIO interrupt, TINT18 + - description: GPIO interrupt, TINT19 + - description: GPIO interrupt, TINT20 + - description: GPIO interrupt, TINT21 + - description: GPIO interrupt, TINT22 + - description: GPIO interrupt, TINT23 + - description: GPIO interrupt, TINT24 + - description: GPIO interrupt, TINT25 + - description: GPIO interrupt, TINT26 + - description: GPIO interrupt, TINT27 + - description: GPIO interrupt, TINT28 + - description: GPIO interrupt, TINT29 + - description: GPIO interrupt, TINT30 + - description: GPIO interrupt, TINT31 + - description: Bus error interrupt + + interrupt-names: + minItems: 41 + items: + - const: nmi + - const: irq0 + - const: irq1 + - const: irq2 + - const: irq3 + - const: irq4 + - const: irq5 + - const: irq6 + - const: irq7 + - const: tint0 + - const: tint1 + - const: tint2 + - const: tint3 + - const: tint4 + - const: tint5 + - const: tint6 + - const: tint7 + - const: tint8 + - const: tint9 + - const: tint10 + - const: tint11 + - const: tint12 + - const: tint13 + - const: tint14 + - const: tint15 + - const: tint16 + - const: tint17 + - const: tint18 + - const: tint19 + - const: tint20 + - const: tint21 + - const: tint22 + - const: tint23 + - const: tint24 + - const: tint25 + - const: tint26 + - const: tint27 + - const: tint28 + - const: tint29 + - const: tint30 + - const: tint31 + - const: bus-err clocks: maxItems: 2 @@ -72,6 +160,23 @@ required: - power-domains - resets +allOf: + - $ref: /schemas/interrupt-controller.yaml# + + - if: + properties: + compatible: + contains: + const: renesas,r9a07g043u-irqc + then: + properties: + interrupts: + minItems: 42 + interrupt-names: + minItems: 42 + required: + - interrupt-names + unevaluatedProperties: false examples: @@ -80,55 +185,66 @@ examples: #include <dt-bindings/clock/r9a07g044-cpg.h> irqc: interrupt-controller@110a0000 { - compatible = "renesas,r9a07g044-irqc", "renesas,rzg2l-irqc"; - reg = <0x110a0000 0x10000>; - #interrupt-cells = <2>; - #address-cells = <0>; - interrupt-controller; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>, - <&cpg CPG_MOD R9A07G044_IA55_PCLK>; - clock-names = "clk", "pclk"; - power-domains = <&cpg>; - resets = <&cpg R9A07G044_IA55_RESETN>; + compatible = "renesas,r9a07g044-irqc", "renesas,rzg2l-irqc"; + reg = <0x110a0000 0x10000>; + #interrupt-cells = <2>; + #address-cells = <0>; + interrupt-controller; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "nmi", + "irq0", "irq1", "irq2", "irq3", + "irq4", "irq5", "irq6", "irq7", + "tint0", "tint1", "tint2", "tint3", + "tint4", "tint5", "tint6", "tint7", + "tint8", "tint9", "tint10", "tint11", + "tint12", "tint13", "tint14", "tint15", + "tint16", "tint17", "tint18", "tint19", + "tint20", "tint21", "tint22", "tint23", + "tint24", "tint25", "tint26", "tint27", + "tint28", "tint29", "tint30", "tint31"; + clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>, + <&cpg CPG_MOD R9A07G044_IA55_PCLK>; + clock-names = "clk", "pclk"; + power-domains = <&cpg>; + resets = <&cpg R9A07G044_IA55_RESETN>; }; diff --git a/dts/Bindings/iommu/arm,smmu.yaml b/dts/Bindings/iommu/arm,smmu.yaml index cf29ab1050..b1b2cf81b4 100644 --- a/dts/Bindings/iommu/arm,smmu.yaml +++ b/dts/Bindings/iommu/arm,smmu.yaml @@ -270,6 +270,7 @@ allOf: contains: enum: - qcom,msm8998-smmu-v2 + - qcom,sdm630-smmu-v2 then: anyOf: - properties: @@ -311,7 +312,6 @@ allOf: compatible: contains: enum: - - qcom,sdm630-smmu-v2 - qcom,sm6375-smmu-v2 then: anyOf: diff --git a/dts/Bindings/media/i2c/sony,imx415.yaml b/dts/Bindings/media/i2c/sony,imx415.yaml index ffccf5f3c9..642f9b15d3 100644 --- a/dts/Bindings/media/i2c/sony,imx415.yaml +++ b/dts/Bindings/media/i2c/sony,imx415.yaml @@ -54,6 +54,7 @@ properties: port: $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false properties: endpoint: diff --git a/dts/Bindings/media/i2c/toshiba,tc358746.yaml b/dts/Bindings/media/i2c/toshiba,tc358746.yaml index c5cab549ee..1c476b635b 100644 --- a/dts/Bindings/media/i2c/toshiba,tc358746.yaml +++ b/dts/Bindings/media/i2c/toshiba,tc358746.yaml @@ -69,6 +69,7 @@ properties: properties: port@0: $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false description: Input port properties: @@ -89,6 +90,7 @@ properties: port@1: $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false description: Output port properties: diff --git a/dts/Bindings/media/nxp,imx7-csi.yaml b/dts/Bindings/media/nxp,imx7-csi.yaml index 358019e85d..326284e151 100644 --- a/dts/Bindings/media/nxp,imx7-csi.yaml +++ b/dts/Bindings/media/nxp,imx7-csi.yaml @@ -59,7 +59,6 @@ allOf: compatible: contains: enum: - - fsl,imx8mq-csi - fsl,imx8mm-csi then: required: diff --git a/dts/Bindings/media/renesas,vin.yaml b/dts/Bindings/media/renesas,vin.yaml index 324703bfb1..5539d0f8e7 100644 --- a/dts/Bindings/media/renesas,vin.yaml +++ b/dts/Bindings/media/renesas,vin.yaml @@ -95,7 +95,7 @@ properties: synchronization is selected. default: 1 - field-active-even: true + field-even-active: true bus-width: true @@ -144,7 +144,7 @@ properties: synchronization is selected. default: 1 - field-active-even: true + field-even-active: true bus-width: true diff --git a/dts/Bindings/media/samsung,fimc.yaml b/dts/Bindings/media/samsung,fimc.yaml index 79ff6d83a9..b3486c38a0 100644 --- a/dts/Bindings/media/samsung,fimc.yaml +++ b/dts/Bindings/media/samsung,fimc.yaml @@ -57,6 +57,7 @@ properties: patternProperties: "^port@[01]$": $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false description: Camera A and camera B inputs. diff --git a/dts/Bindings/mfd/maxim,max77693.yaml b/dts/Bindings/mfd/maxim,max77693.yaml index 9804d13de6..6a6f222b86 100644 --- a/dts/Bindings/mfd/maxim,max77693.yaml +++ b/dts/Bindings/mfd/maxim,max77693.yaml @@ -31,10 +31,6 @@ properties: charger: $ref: /schemas/power/supply/maxim,max77693.yaml - connector: - $ref: /schemas/connector/usb-connector.yaml# - unevaluatedProperties: false - led: $ref: /schemas/leds/maxim,max77693.yaml diff --git a/dts/Bindings/mmc/sdhci-msm.yaml b/dts/Bindings/mmc/sdhci-msm.yaml index 80141eb7fc..10f34aa8ba 100644 --- a/dts/Bindings/mmc/sdhci-msm.yaml +++ b/dts/Bindings/mmc/sdhci-msm.yaml @@ -69,7 +69,7 @@ properties: maxItems: 4 clocks: - minItems: 3 + minItems: 2 items: - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock - description: SDC MMC clock, MCLK diff --git a/dts/Bindings/pci/brcm,iproc-pcie.yaml b/dts/Bindings/pci/brcm,iproc-pcie.yaml index 0972868735..0e07ab61a4 100644 --- a/dts/Bindings/pci/brcm,iproc-pcie.yaml +++ b/dts/Bindings/pci/brcm,iproc-pcie.yaml @@ -12,7 +12,6 @@ maintainers: allOf: - $ref: /schemas/pci/pci-bus.yaml# - - $ref: /schemas/interrupt-controller/msi-controller.yaml# properties: compatible: @@ -34,13 +33,6 @@ properties: description: > Base address and length of the PCIe controller I/O register space - interrupt-map: true - - interrupt-map-mask: true - - "#interrupt-cells": - const: 1 - ranges: minItems: 1 maxItems: 2 @@ -54,16 +46,8 @@ properties: items: - const: pcie-phy - bus-range: true - dma-coherent: true - "#address-cells": true - - "#size-cells": true - - device_type: true - brcm,pcie-ob: type: boolean description: > @@ -78,20 +62,24 @@ properties: msi: type: object + $ref: /schemas/interrupt-controller/msi-controller.yaml# + unevaluatedProperties: false + properties: compatible: items: - const: brcm,iproc-msi - msi-parent: true + interrupts: + maxItems: 4 - msi-controller: true + brcm,pcie-msi-inten: + type: boolean + description: + Needs to be present for some older iProc platforms that require the + interrupt enable registers to be set explicitly to enable MSI - brcm,pcie-msi-inten: - type: boolean - description: > - Needs to be present for some older iProc platforms that require the - interrupt enable registers to be set explicitly to enable MSI + msi-parent: true dependencies: brcm,pcie-ob-axi-offset: ["brcm,pcie-ob"] @@ -117,68 +105,69 @@ unevaluatedProperties: false examples: - | - #include <dt-bindings/interrupt-controller/arm-gic.h> - - bus { - #address-cells = <1>; - #size-cells = <1>; - pcie0: pcie@18012000 { - compatible = "brcm,iproc-pcie"; - reg = <0x18012000 0x1000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>; - - linux,pci-domain = <0>; - - bus-range = <0x00 0xff>; - - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - ranges = <0x81000000 0 0 0x28000000 0 0x00010000>, - <0x82000000 0 0x20000000 0x20000000 0 0x04000000>; - - phys = <&phy 0 5>; - phy-names = "pcie-phy"; - - brcm,pcie-ob; - brcm,pcie-ob-axi-offset = <0x00000000>; - - msi-parent = <&msi0>; - - /* iProc event queue based MSI */ - msi0: msi { - compatible = "brcm,iproc-msi"; - msi-controller; - interrupt-parent = <&gic>; - interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>, - <GIC_SPI 97 IRQ_TYPE_NONE>, - <GIC_SPI 98 IRQ_TYPE_NONE>, - <GIC_SPI 99 IRQ_TYPE_NONE>; - }; - }; - - pcie1: pcie@18013000 { - compatible = "brcm,iproc-pcie"; - reg = <0x18013000 0x1000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>; - - linux,pci-domain = <1>; - - bus-range = <0x00 0xff>; - - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - ranges = <0x81000000 0 0 0x48000000 0 0x00010000>, - <0x82000000 0 0x40000000 0x40000000 0 0x04000000>; - - phys = <&phy 1 6>; - phy-names = "pcie-phy"; - }; + #include <dt-bindings/interrupt-controller/arm-gic.h> + + gic: interrupt-controller { + interrupt-controller; + #interrupt-cells = <3>; + }; + + pcie@18012000 { + compatible = "brcm,iproc-pcie"; + reg = <0x18012000 0x1000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>; + + linux,pci-domain = <0>; + + bus-range = <0x00 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x81000000 0 0 0x28000000 0 0x00010000>, + <0x82000000 0 0x20000000 0x20000000 0 0x04000000>; + + phys = <&phy 0 5>; + phy-names = "pcie-phy"; + + brcm,pcie-ob; + brcm,pcie-ob-axi-offset = <0x00000000>; + + msi-parent = <&msi0>; + + /* iProc event queue based MSI */ + msi0: msi { + compatible = "brcm,iproc-msi"; + msi-controller; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>, + <GIC_SPI 97 IRQ_TYPE_NONE>, + <GIC_SPI 98 IRQ_TYPE_NONE>, + <GIC_SPI 99 IRQ_TYPE_NONE>; + }; + }; + - | + pcie@18013000 { + compatible = "brcm,iproc-pcie"; + reg = <0x18013000 0x1000>; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>; + + linux,pci-domain = <1>; + + bus-range = <0x00 0xff>; + + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + ranges = <0x81000000 0 0 0x48000000 0 0x00010000>, + <0x82000000 0 0x40000000 0x40000000 0 0x04000000>; + + phys = <&phy 1 6>; + phy-names = "pcie-phy"; }; diff --git a/dts/Bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml b/dts/Bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml index 5073007267..634cec5d57 100644 --- a/dts/Bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml +++ b/dts/Bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml @@ -70,7 +70,7 @@ examples: phy@84000 { compatible = "qcom,ipq6018-qmp-pcie-phy"; - reg = <0x0 0x00084000 0x0 0x1000>; + reg = <0x00084000 0x1000>; clocks = <&gcc GCC_PCIE0_AUX_CLK>, <&gcc GCC_PCIE0_AHB_CLK>, diff --git a/dts/Bindings/riscv/cpus.yaml b/dts/Bindings/riscv/cpus.yaml index 38c0b52137..97e8441eda 100644 --- a/dts/Bindings/riscv/cpus.yaml +++ b/dts/Bindings/riscv/cpus.yaml @@ -91,6 +91,7 @@ properties: interrupt-controller: type: object + additionalProperties: false description: Describes the CPU's local interrupt controller properties: diff --git a/dts/Bindings/soc/loongson/loongson,ls2k-pmc.yaml b/dts/Bindings/soc/loongson/loongson,ls2k-pmc.yaml index da2dcfeebf..510f6cb0f0 100644 --- a/dts/Bindings/soc/loongson/loongson,ls2k-pmc.yaml +++ b/dts/Bindings/soc/loongson/loongson,ls2k-pmc.yaml @@ -11,11 +11,16 @@ maintainers: properties: compatible: - items: - - enum: - - loongson,ls2k0500-pmc - - loongson,ls2k1000-pmc - - const: syscon + oneOf: + - items: + - const: loongson,ls2k0500-pmc + - const: syscon + - items: + - enum: + - loongson,ls2k1000-pmc + - loongson,ls2k2000-pmc + - const: loongson,ls2k0500-pmc + - const: syscon reg: maxItems: 1 @@ -32,6 +37,18 @@ properties: addition, the PM need according to it to indicate that current SoC whether support Suspend To RAM. + syscon-poweroff: + $ref: /schemas/power/reset/syscon-poweroff.yaml# + type: object + description: + Node for power off method + + syscon-reboot: + $ref: /schemas/power/reset/syscon-reboot.yaml# + type: object + description: + Node for reboot method + required: - compatible - reg @@ -44,9 +61,23 @@ examples: #include <dt-bindings/interrupt-controller/irq.h> power-management@1fe27000 { - compatible = "loongson,ls2k1000-pmc", "syscon"; + compatible = "loongson,ls2k1000-pmc", "loongson,ls2k0500-pmc", "syscon"; reg = <0x1fe27000 0x58>; interrupt-parent = <&liointc1>; interrupts = <11 IRQ_TYPE_LEVEL_LOW>; loongson,suspend-address = <0x0 0x1c000500>; + + syscon-reboot { + compatible = "syscon-reboot"; + offset = <0x30>; + mask = <0x1>; + }; + + syscon-poweroff { + compatible = "syscon-poweroff"; + regmap = <&pmc>; + offset = <0x14>; + mask = <0x3c00>; + value = <0x3c00>; + }; }; diff --git a/dts/Bindings/sound/cirrus,cs42l43.yaml b/dts/Bindings/sound/cirrus,cs42l43.yaml index 7a6de938b1..4118aa54bb 100644 --- a/dts/Bindings/sound/cirrus,cs42l43.yaml +++ b/dts/Bindings/sound/cirrus,cs42l43.yaml @@ -82,7 +82,7 @@ properties: description: Current at which the headset micbias sense clamp will engage, 0 to disable. - enum: [ 0, 14, 23, 41, 50, 60, 68, 86, 95 ] + enum: [ 0, 14, 24, 43, 52, 61, 71, 90, 99 ] default: 0 cirrus,bias-ramp-ms: diff --git a/dts/Bindings/sound/fsl,micfil.yaml b/dts/Bindings/sound/fsl,micfil.yaml index 4b99a18c79..b7e6058356 100644 --- a/dts/Bindings/sound/fsl,micfil.yaml +++ b/dts/Bindings/sound/fsl,micfil.yaml @@ -56,6 +56,9 @@ properties: - const: clkext3 minItems: 2 + "#sound-dai-cells": + const: 0 + required: - compatible - reg diff --git a/dts/Bindings/sound/rockchip-spdif.yaml b/dts/Bindings/sound/rockchip-spdif.yaml index 4f51b2fa82..c3c989ef2a 100644 --- a/dts/Bindings/sound/rockchip-spdif.yaml +++ b/dts/Bindings/sound/rockchip-spdif.yaml @@ -26,6 +26,7 @@ properties: - const: rockchip,rk3568-spdif - items: - enum: + - rockchip,rk3128-spdif - rockchip,rk3188-spdif - rockchip,rk3288-spdif - rockchip,rk3308-spdif diff --git a/dts/Bindings/spi/fsl-imx-cspi.yaml b/dts/Bindings/spi/fsl-imx-cspi.yaml index 2f593c7225..14cac0e6e0 100644 --- a/dts/Bindings/spi/fsl-imx-cspi.yaml +++ b/dts/Bindings/spi/fsl-imx-cspi.yaml @@ -23,6 +23,13 @@ properties: - const: fsl,imx51-ecspi - const: fsl,imx53-ecspi - items: + - enum: + - fsl,imx25-cspi + - fsl,imx50-cspi + - fsl,imx51-cspi + - fsl,imx53-cspi + - const: fsl,imx35-cspi + - items: - const: fsl,imx8mp-ecspi - const: fsl,imx6ul-ecspi - items: diff --git a/dts/Bindings/trivial-devices.yaml b/dts/Bindings/trivial-devices.yaml index cd58179ae3..430a814f64 100644 --- a/dts/Bindings/trivial-devices.yaml +++ b/dts/Bindings/trivial-devices.yaml @@ -232,7 +232,7 @@ properties: # MEMSIC magnetometer - memsic,mmc35240 # MEMSIC 3-axis accelerometer - - memsic,mx4005 + - memsic,mxc4005 # MEMSIC 2-axis 8-bit digital accelerometer - memsic,mxc6225 # MEMSIC 2-axis 8-bit digital accelerometer diff --git a/dts/src/arm/ti/omap/motorola-mapphone-common.dtsi b/dts/src/arm/ti/omap/motorola-mapphone-common.dtsi index 091ba31005..d2d516d113 100644 --- a/dts/src/arm/ti/omap/motorola-mapphone-common.dtsi +++ b/dts/src/arm/ti/omap/motorola-mapphone-common.dtsi @@ -614,12 +614,12 @@ /* Configure pwm clock source for timers 8 & 9 */ &timer8 { assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>; - assigned-clock-parents = <&sys_clkin_ck>; + assigned-clock-parents = <&sys_32k_ck>; }; &timer9 { assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>; - assigned-clock-parents = <&sys_clkin_ck>; + assigned-clock-parents = <&sys_32k_ck>; }; /* @@ -640,6 +640,7 @@ &uart3 { interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH &omap4_pmx_core 0x17c>; + overrun-throttle-ms = <500>; }; &uart4 { diff --git a/dts/src/arm/ti/omap/omap3-cpu-thermal.dtsi b/dts/src/arm/ti/omap/omap3-cpu-thermal.dtsi index 0da759f8e2..7dd2340bc5 100644 --- a/dts/src/arm/ti/omap/omap3-cpu-thermal.dtsi +++ b/dts/src/arm/ti/omap/omap3-cpu-thermal.dtsi @@ -12,8 +12,7 @@ cpu_thermal: cpu-thermal { polling-delay = <1000>; /* milliseconds */ coefficients = <0 20000>; - /* sensor ID */ - thermal-sensors = <&bandgap 0>; + thermal-sensors = <&bandgap>; cpu_trips: trips { cpu_alert0: cpu_alert { diff --git a/dts/src/arm/ti/omap/omap4-cpu-thermal.dtsi b/dts/src/arm/ti/omap/omap4-cpu-thermal.dtsi index 801b4f1035..d484ec1e4f 100644 --- a/dts/src/arm/ti/omap/omap4-cpu-thermal.dtsi +++ b/dts/src/arm/ti/omap/omap4-cpu-thermal.dtsi @@ -12,7 +12,10 @@ cpu_thermal: cpu_thermal { polling-delay-passive = <250>; /* milliseconds */ polling-delay = <1000>; /* milliseconds */ - /* sensor ID */ + /* + * See 44xx files for single sensor addressing, omap5 and dra7 need + * also sensor ID for addressing. + */ thermal-sensors = <&bandgap 0>; cpu_trips: trips { diff --git a/dts/src/arm/ti/omap/omap443x.dtsi b/dts/src/arm/ti/omap/omap443x.dtsi index 238aceb799..2104170fe2 100644 --- a/dts/src/arm/ti/omap/omap443x.dtsi +++ b/dts/src/arm/ti/omap/omap443x.dtsi @@ -69,6 +69,7 @@ }; &cpu_thermal { + thermal-sensors = <&bandgap>; coefficients = <0 20000>; }; diff --git a/dts/src/arm/ti/omap/omap4460.dtsi b/dts/src/arm/ti/omap/omap4460.dtsi index 1b27a862ae..a6764750d4 100644 --- a/dts/src/arm/ti/omap/omap4460.dtsi +++ b/dts/src/arm/ti/omap/omap4460.dtsi @@ -79,6 +79,7 @@ }; &cpu_thermal { + thermal-sensors = <&bandgap>; coefficients = <348 (-9301)>; }; diff --git a/dts/src/arm64/freescale/imx8mm-evk.dtsi b/dts/src/arm64/freescale/imx8mm-evk.dtsi index e31ab8b4f5..a882c86ec3 100644 --- a/dts/src/arm64/freescale/imx8mm-evk.dtsi +++ b/dts/src/arm64/freescale/imx8mm-evk.dtsi @@ -26,7 +26,7 @@ port { hdmi_connector_in: endpoint { - remote-endpoint = <&adv7533_out>; + remote-endpoint = <&adv7535_out>; }; }; }; @@ -72,6 +72,13 @@ enable-active-high; }; + reg_vddext_3v3: regulator-vddext-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDEXT_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + backlight: backlight { compatible = "pwm-backlight"; pwms = <&pwm1 0 5000000 0>; @@ -317,15 +324,16 @@ hdmi@3d { compatible = "adi,adv7535"; - reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>; - reg-names = "main", "cec", "edid", "packet"; + reg = <0x3d>; + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; adi,dsi-lanes = <4>; - - adi,input-depth = <8>; - adi,input-colorspace = "rgb"; - adi,input-clock = "1x"; - adi,input-style = <1>; - adi,input-justification = "evenly"; + avdd-supply = <&buck5_reg>; + dvdd-supply = <&buck5_reg>; + pvdd-supply = <&buck5_reg>; + a2vdd-supply = <&buck5_reg>; + v3p3-supply = <®_vddext_3v3>; + v1p2-supply = <&buck5_reg>; ports { #address-cells = <1>; @@ -334,7 +342,7 @@ port@0 { reg = <0>; - adv7533_in: endpoint { + adv7535_in: endpoint { remote-endpoint = <&dsi_out>; }; }; @@ -342,7 +350,7 @@ port@1 { reg = <1>; - adv7533_out: endpoint { + adv7535_out: endpoint { remote-endpoint = <&hdmi_connector_in>; }; }; @@ -448,7 +456,7 @@ reg = <1>; dsi_out: endpoint { - remote-endpoint = <&adv7533_in>; + remote-endpoint = <&adv7535_in>; data-lanes = <1 2 3 4>; }; }; diff --git a/dts/src/arm64/freescale/imx8mp-beacon-kit.dts b/dts/src/arm64/freescale/imx8mp-beacon-kit.dts index 06e91297fb..acd265d8b5 100644 --- a/dts/src/arm64/freescale/imx8mp-beacon-kit.dts +++ b/dts/src/arm64/freescale/imx8mp-beacon-kit.dts @@ -381,9 +381,10 @@ &sai3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai3>; - assigned-clocks = <&clk IMX8MP_CLK_SAI3>; + assigned-clocks = <&clk IMX8MP_CLK_SAI3>, + <&clk IMX8MP_AUDIO_PLL2> ; assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>; - assigned-clock-rates = <12288000>; + assigned-clock-rates = <12288000>, <361267200>; fsl,sai-mclk-direction-output; status = "okay"; }; diff --git a/dts/src/arm64/freescale/imx8mp.dtsi b/dts/src/arm64/freescale/imx8mp.dtsi index 6f2f50e163..83d907294f 100644 --- a/dts/src/arm64/freescale/imx8mp.dtsi +++ b/dts/src/arm64/freescale/imx8mp.dtsi @@ -790,6 +790,12 @@ reg = <IMX8MP_POWER_DOMAIN_AUDIOMIX>; clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>, <&clk IMX8MP_CLK_AUDIO_AXI>; + assigned-clocks = <&clk IMX8MP_CLK_AUDIO_AHB>, + <&clk IMX8MP_CLK_AUDIO_AXI_SRC>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, + <&clk IMX8MP_SYS_PLL1_800M>; + assigned-clock-rates = <400000000>, + <600000000>; }; pgc_gpu2d: power-domain@6 { diff --git a/dts/src/arm64/freescale/imx93-tqma9352.dtsi b/dts/src/arm64/freescale/imx93-tqma9352.dtsi index 1c71c08bec..f6e422dc26 100644 --- a/dts/src/arm64/freescale/imx93-tqma9352.dtsi +++ b/dts/src/arm64/freescale/imx93-tqma9352.dtsi @@ -81,7 +81,7 @@ &gpio1 { pmic-irq-hog { gpio-hog; - gpios = <2 GPIO_ACTIVE_LOW>; + gpios = <3 GPIO_ACTIVE_LOW>; input; line-name = "PMIC_IRQ#"; }; diff --git a/dts/src/arm64/freescale/imx93.dtsi b/dts/src/arm64/freescale/imx93.dtsi index 6f85a05ee7..dcf6e4846a 100644 --- a/dts/src/arm64/freescale/imx93.dtsi +++ b/dts/src/arm64/freescale/imx93.dtsi @@ -185,7 +185,7 @@ #size-cells = <1>; ranges; - anomix_ns_gpr: syscon@44210000 { + aonmix_ns_gpr: syscon@44210000 { compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon"; reg = <0x44210000 0x1000>; }; @@ -319,6 +319,7 @@ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; assigned-clock-rates = <40000000>; fsl,clk-source = /bits/ 8 <0>; + fsl,stop-mode = <&aonmix_ns_gpr 0x14 0>; status = "disabled"; }; @@ -591,6 +592,7 @@ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>; assigned-clock-rates = <40000000>; fsl,clk-source = /bits/ 8 <0>; + fsl,stop-mode = <&wakeupmix_gpr 0x0c 2>; status = "disabled"; }; diff --git a/dts/src/arm64/mediatek/mt7622.dtsi b/dts/src/arm64/mediatek/mt7622.dtsi index 36ef2dbe8a..3ee9266fa8 100644 --- a/dts/src/arm64/mediatek/mt7622.dtsi +++ b/dts/src/arm64/mediatek/mt7622.dtsi @@ -905,7 +905,7 @@ status = "disabled"; }; - sata_phy: t-phy@1a243000 { + sata_phy: t-phy { compatible = "mediatek,mt7622-tphy", "mediatek,generic-tphy-v1"; #address-cells = <2>; diff --git a/dts/src/arm64/mediatek/mt7986a.dtsi b/dts/src/arm64/mediatek/mt7986a.dtsi index 68539ea788..24eda00e32 100644 --- a/dts/src/arm64/mediatek/mt7986a.dtsi +++ b/dts/src/arm64/mediatek/mt7986a.dtsi @@ -434,7 +434,7 @@ }; }; - pcie_phy: t-phy@11c00000 { + pcie_phy: t-phy { compatible = "mediatek,mt7986-tphy", "mediatek,generic-tphy-v2"; #address-cells = <2>; diff --git a/dts/src/arm64/mediatek/mt8195-demo.dts b/dts/src/arm64/mediatek/mt8195-demo.dts index b2485ddfd3..5d635085fe 100644 --- a/dts/src/arm64/mediatek/mt8195-demo.dts +++ b/dts/src/arm64/mediatek/mt8195-demo.dts @@ -48,7 +48,7 @@ memory@40000000 { device_type = "memory"; - reg = <0 0x40000000 0 0x80000000>; + reg = <0 0x40000000 0x2 0x00000000>; }; reserved-memory { @@ -56,13 +56,8 @@ #size-cells = <2>; ranges; - /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ - bl31_secmon_reserved: secmon@54600000 { - no-map; - reg = <0 0x54600000 0x0 0x200000>; - }; - - /* 12 MiB reserved for OP-TEE (BL32) + /* + * 12 MiB reserved for OP-TEE (BL32) * +-----------------------+ 0x43e0_0000 * | SHMEM 2MiB | * +-----------------------+ 0x43c0_0000 @@ -75,6 +70,34 @@ no-map; reg = <0 0x43200000 0 0x00c00000>; }; + + scp_mem: memory@50000000 { + compatible = "shared-dma-pool"; + reg = <0 0x50000000 0 0x2900000>; + no-map; + }; + + vpu_mem: memory@53000000 { + compatible = "shared-dma-pool"; + reg = <0 0x53000000 0 0x1400000>; /* 20 MB */ + }; + + /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ + bl31_secmon_mem: memory@54600000 { + no-map; + reg = <0 0x54600000 0x0 0x200000>; + }; + + snd_dma_mem: memory@60000000 { + compatible = "shared-dma-pool"; + reg = <0 0x60000000 0 0x1100000>; + no-map; + }; + + apu_mem: memory@62000000 { + compatible = "shared-dma-pool"; + reg = <0 0x62000000 0 0x1400000>; /* 20 MB */ + }; }; }; diff --git a/dts/src/arm64/mediatek/mt8195.dtsi b/dts/src/arm64/mediatek/mt8195.dtsi index 4dbbf8fdab..54c674c45b 100644 --- a/dts/src/arm64/mediatek/mt8195.dtsi +++ b/dts/src/arm64/mediatek/mt8195.dtsi @@ -313,6 +313,7 @@ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 0>; cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; + status = "fail"; }; dmic_codec: dmic-codec { @@ -2957,7 +2958,7 @@ clock-names = "merge","merge_async"; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>; - mediatek,merge-mute = <1>; + mediatek,merge-mute; resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE0_DL_ASYNC>; }; @@ -2970,7 +2971,7 @@ clock-names = "merge","merge_async"; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>; - mediatek,merge-mute = <1>; + mediatek,merge-mute; resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE1_DL_ASYNC>; }; @@ -2983,7 +2984,7 @@ clock-names = "merge","merge_async"; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>; - mediatek,merge-mute = <1>; + mediatek,merge-mute; resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE2_DL_ASYNC>; }; @@ -2996,7 +2997,7 @@ clock-names = "merge","merge_async"; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>; - mediatek,merge-mute = <1>; + mediatek,merge-mute; resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE3_DL_ASYNC>; }; @@ -3009,7 +3010,7 @@ clock-names = "merge","merge_async"; power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>; - mediatek,merge-fifo-en = <1>; + mediatek,merge-fifo-en; resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC>; }; diff --git a/dts/src/arm64/qcom/sm8150.dtsi b/dts/src/arm64/qcom/sm8150.dtsi index a7c3020a5d..06c53000bb 100644 --- a/dts/src/arm64/qcom/sm8150.dtsi +++ b/dts/src/arm64/qcom/sm8150.dtsi @@ -3958,7 +3958,7 @@ pdc: interrupt-controller@b220000 { compatible = "qcom,sm8150-pdc", "qcom,pdc"; - reg = <0 0x0b220000 0 0x400>; + reg = <0 0x0b220000 0 0x30000>; qcom,pdc-ranges = <0 480 94>, <94 609 31>, <125 63 1>; #interrupt-cells = <2>; diff --git a/dts/src/riscv/starfive/jh7110-starfive-visionfive-2.dtsi b/dts/src/riscv/starfive/jh7110-starfive-visionfive-2.dtsi index d79f94432b..12ebe97923 100644 --- a/dts/src/riscv/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/dts/src/riscv/starfive/jh7110-starfive-visionfive-2.dtsi @@ -262,7 +262,7 @@ reg = <0x100000 0x400000>; }; reserved-data@600000 { - reg = <0x600000 0x1000000>; + reg = <0x600000 0xa00000>; }; }; }; @@ -440,30 +440,6 @@ }; }; - uart0_pins: uart0-0 { - tx-pins { - pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, - GPOEN_ENABLE, - GPI_NONE)>; - bias-disable; - drive-strength = <12>; - input-disable; - input-schmitt-disable; - slew-rate = <0>; - }; - - rx-pins { - pinmux = <GPIOMUX(6, GPOUT_LOW, - GPOEN_DISABLE, - GPI_SYS_UART0_RX)>; - bias-disable; /* external pull-up */ - drive-strength = <2>; - input-enable; - input-schmitt-enable; - slew-rate = <0>; - }; - }; - tdm_pins: tdm-0 { tx-pins { pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD, @@ -497,6 +473,30 @@ input-enable; }; }; + + uart0_pins: uart0-0 { + tx-pins { + pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, + GPOEN_ENABLE, + GPI_NONE)>; + bias-disable; + drive-strength = <12>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + + rx-pins { + pinmux = <GPIOMUX(6, GPOUT_LOW, + GPOEN_DISABLE, + GPI_SYS_UART0_RX)>; + bias-disable; /* external pull-up */ + drive-strength = <2>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; }; &tdm { @@ -513,6 +513,7 @@ &usb0 { dr_mode = "peripheral"; + status = "okay"; }; &U74_1 { diff --git a/fs/devfs-core.c b/fs/devfs-core.c index c9f7fcfb07..4e16d55e36 100644 --- a/fs/devfs-core.c +++ b/fs/devfs-core.c @@ -582,16 +582,16 @@ int devfs_del_partition(const char *name) if (!cdev) return -ENOENT; - if (IS_ENABLED(CONFIG_MTD) && cdev->mtd) { - ret = mtd_del_partition(cdev->mtd); - return ret; - } - if (!cdev_is_partition(cdev)) return -EINVAL; if (cdev->flags & DEVFS_PARTITION_FIXED) return -EPERM; + if (IS_ENABLED(CONFIG_MTD) && cdev->mtd) { + ret = mtd_del_partition(cdev->mtd); + return ret; + } + ret = devfs_remove(cdev); if (ret) return ret; diff --git a/images/Makefile b/images/Makefile index 9739a15c06..90d596deab 100644 --- a/images/Makefile +++ b/images/Makefile @@ -225,5 +225,6 @@ $(flash-list): $(image-y-path) clean-files := *.pbl *.pblb *.elf *.map start_*.imximg *.img barebox.z start_*.kwbimg \ start_*.kwbuartimg *.socfpgaimg *.mlo *.t20img *.t20img.cfg *.t30img \ *.t30img.cfg *.t124img *.t124img.cfg *.mlospi *.mlo *.mxsbs *.mxssd *.rkimg \ - start_*.simximg start_*.usimximg *.zynqimg *.image *.swapped *.missing-firmware + start_*.simximg start_*.usimximg start_*.pimximg start_*.psimximg *.zynqimg \ + *.image *.swapped *.missing-firmware clean-files += pbl.lds diff --git a/images/Makefile.at91 b/images/Makefile.at91 index 36f7259406..523dc5f499 100644 --- a/images/Makefile.at91 +++ b/images/Makefile.at91 @@ -160,3 +160,12 @@ image-$(CONFIG_MACH_USB_A9263) += barebox-usb-a9263-128m.img pblb-$(CONFIG_MACH_USB_A9G20) += start_usb_a9g20 FILE_barebox-usb-a9g20.img = start_usb_a9g20.pblb image-$(CONFIG_MACH_USB_A9G20) += barebox-usb-a9g20.img + +pblb-$(CONFIG_MACH_CALAO) += start_tny_a9260 start_tny_a9g20 \ + start_usb_a9260 start_usb_a9g20 +FILE_barebox-tny-a9260.img = start_tny_a9260.pblb +FILE_barebox-tny-a9g20.img = start_tny_a9g20.pblb +FILE_barebox-usb-a9260.img = start_usb_a9260.pblb +FILE_barebox-usb-a9g20.img = start_usb_a9g20.pblb +image-$(CONFIG_MACH_CALAO) += barebox-tny-a9260.img barebox-tny-a9g20.img \ + barebox-usb-a9260.img barebox-usb-a9g20.img diff --git a/images/Makefile.imx b/images/Makefile.imx index 8f6e8740d1..8b6958872a 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -21,6 +21,20 @@ endif ) endef +define build_imx8m_habv4img = +$(eval +ifeq ($($(strip $(1))), y) + pblb-y += $(strip $(2)) + CFG_$(strip $(2)).pblb.imximg = $(board)/$(strip $(3)).imxcfg + MAX_PBL_MEMORY_SIZE_$(strip $(2)) = 0x3f000 + FILE_barebox-$(strip $(4)).img = $(strip $(2)).pblb.pimximg + FILE_barebox-$(strip $(4))-s.img = $(strip $(2)).pblb.psimximg + image-y += barebox-$(strip $(4)).img + image-$(CONFIG_HABV4_IMAGE_SIGNED) += barebox-$(strip $(4))-s.img +endif +) +endef + # %.imximg - convert into i.MX image # ---------------------------------------------------------------- @@ -431,83 +445,38 @@ FILE_barebox-kamstrup-mx7-concentrator.img = start_kamstrup_mx7_concentrator.pbl image-$(CONFIG_MACH_KAMSTRUP_MX7_CONCENTRATOR) += barebox-kamstrup-mx7-concentrator.img # ----------------------- i.MX8mm based boards -------------------------- -pblb-$(CONFIG_MACH_NXP_IMX8MM_EVK) += start_nxp_imx8mm_evk -CFG_start_nxp_imx8mm_evk.pblb.imximg = $(board)/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg -FILE_barebox-nxp-imx8mm-evk.img = start_nxp_imx8mm_evk.pblb.pimximg -image-$(CONFIG_MACH_NXP_IMX8MM_EVK) += barebox-nxp-imx8mm-evk.img - -pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX8MM) += start_phyboard_polis_rdk_ddr_autodetect -CFG_start_phyboard_polis_rdk_ddr_autodetect.pblb.imximg = $(board)/phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk.imxcfg -FILE_barebox-phyboard-polis-rdk-ddr-autodetect.img = start_phyboard_polis_rdk_ddr_autodetect.pblb.pimximg -image-$(CONFIG_MACH_PHYTEC_SOM_IMX8MM) += barebox-phyboard-polis-rdk-ddr-autodetect.img - -pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX8MM) += start_phyboard_polis_rdk_ddr_1g -CFG_start_phyboard_polis_rdk_ddr_1g.pblb.imximg = $(board)/phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk.imxcfg -FILE_barebox-phyboard-polis-rdk-ddr-1g.img = start_phyboard_polis_rdk_ddr_1g.pblb.pimximg -image-$(CONFIG_MACH_PHYTEC_SOM_IMX8MM) += barebox-phyboard-polis-rdk-ddr-1g.img - -pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX8MM) += start_phyboard_polis_rdk_ddr_2g -CFG_start_phyboard_polis_rdk_ddr_2g.pblb.imximg = $(board)/phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk.imxcfg -FILE_barebox-phyboard-polis-rdk-ddr-2g.img = start_phyboard_polis_rdk_ddr_2g.pblb.pimximg -image-$(CONFIG_MACH_PHYTEC_SOM_IMX8MM) += barebox-phyboard-polis-rdk-ddr-2g.img - -pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX8MM) += start_phyboard_polis_rdk_ddr_4g -CFG_start_phyboard_polis_rdk_ddr_4g.pblb.imximg = $(board)/phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk.imxcfg -FILE_barebox-phyboard-polis-rdk-ddr-4g.img = start_phyboard_polis_rdk_ddr_4g.pblb.pimximg -image-$(CONFIG_MACH_PHYTEC_SOM_IMX8MM) += barebox-phyboard-polis-rdk-ddr-4g.img - -pblb-$(CONFIG_MACH_PROTONIC_IMX8M) += start_prt_prt8mm -CFG_start_prt_prt8mm.pblb.imximg = $(board)/protonic-imx8m/flash-header-prt8mm.imxcfg -FILE_barebox-prt-prt8mm.img = start_prt_prt8mm.pblb.pimximg -image-$(CONFIG_MACH_PROTONIC_IMX8M) += barebox-prt-prt8mm.img - -pblb-$(CONFIG_MACH_INNOCOMM_WB15) += start_innocomm_wb15_evk -CFG_start_innocomm_wb15_evk.pblb.imximg = $(board)/innocomm-imx8mm-wb15/flash-header-imx8mm-wb15.imxcfg -FILE_barebox-innocomm-imx8mm-wb15-evk.img = start_innocomm_wb15_evk.pblb.pimximg -image-$(CONFIG_MACH_INNOCOMM_WB15) += barebox-innocomm-imx8mm-wb15-evk.img +$(call build_imx8m_habv4img, CONFIG_MACH_NXP_IMX8MM_EVK, start_nxp_imx8mm_evk, nxp-imx8mm-evk/flash-header-imx8mm-evk, nxp-imx8mm-evk) + +$(call build_imx8m_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX8MM, start_phyboard_polis_rdk_ddr_autodetect, phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk, phyboard-polis-rdk-ddr-autodetect) + +$(call build_imx8m_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX8MM, start_phyboard_polis_rdk_ddr_1g, phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk, phyboard-polis-rdk-ddr-1g) + +$(call build_imx8m_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX8MM, start_phyboard_polis_rdk_ddr_2g, phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk, phyboard-polis-rdk-ddr-2g) + +$(call build_imx8m_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX8MM, start_phyboard_polis_rdk_ddr_4g, phytec-som-imx8mm/flash-header-imx8mm-phyboard-polis-rdk, phyboard-polis-rdk-ddr-4g) + +$(call build_imx8m_habv4img, CONFIG_MACH_PROTONIC_IMX8M, start_prt_prt8mm, protonic-imx8m/flash-header-prt8mm, prt-prt8mm) + +$(call build_imx8m_habv4img, CONFIG_MACH_INNOCOMM_WB15, start_innocomm_wb15_evk, innocomm-imx8mm-wb15/flash-header-imx8mm-wb15, innocomm-imx8mm-wb15-evk) # ----------------------- i.MX8mn based boards -------------------------- -pblb-$(CONFIG_MACH_NXP_IMX8MN_EVK) += start_nxp_imx8mn_evk -CFG_start_nxp_imx8mn_evk.pblb.imximg = $(board)/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg -FILE_barebox-nxp-imx8mn-evk.img = start_nxp_imx8mn_evk.pblb.pimximg -image-$(CONFIG_MACH_NXP_IMX8MN_EVK) += barebox-nxp-imx8mn-evk.img +$(call build_imx8m_habv4img, CONFIG_MACH_NXP_IMX8MN_EVK, start_nxp_imx8mn_evk, nxp-imx8mn-evk/flash-header-imx8mn-evk, nxp-imx8mn-evk) # ----------------------- i.MX8mp based boards -------------------------- -pblb-$(CONFIG_MACH_NXP_IMX8MP_EVK) += start_nxp_imx8mp_evk -CFG_start_nxp_imx8mp_evk.pblb.imximg = $(board)/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg -FILE_barebox-nxp-imx8mp-evk.img = start_nxp_imx8mp_evk.pblb.pimximg -image-$(CONFIG_MACH_NXP_IMX8MP_EVK) += barebox-nxp-imx8mp-evk.img - -pblb-$(CONFIG_MACH_SKOV_IMX8MP) += start_skov_imx8mp -CFG_start_skov_imx8mp.pblb.imximg = $(board)/skov-imx8mp/flash-header-skov-imx8mp.imxcfg -FILE_barebox-skov-imx8mp.img = start_skov_imx8mp.pblb.pimximg -image-$(CONFIG_MACH_SKOV_IMX8MP) += barebox-skov-imx8mp.img - -pblb-$(CONFIG_MACH_TQ_MBA8MPXL) += start_tqma8mpxl -CFG_start_tqma8mpxl.pblb.imximg = $(board)/tqma8mpxl/flash-header-tqma8mpxl.imxcfg -FILE_barebox-tqma8mpxl.img = start_tqma8mpxl.pblb.pimximg -image-$(CONFIG_MACH_TQ_MBA8MPXL) += barebox-tqma8mpxl.img - -pblb-$(CONFIG_MACH_POLYHEX_DEBIX) += start_polyhex_debix -CFG_start_polyhex_debix.pblb.imximg = $(board)/polyhex-debix/flash-header-polyhex-debix.imxcfg -FILE_barebox-polyhex-debix.img = start_polyhex_debix.pblb.pimximg -image-$(CONFIG_MACH_POLYHEX_DEBIX) += barebox-polyhex-debix.img - -pblb-$(CONFIG_MACH_POLYHEX_DEBIX) += start_polyhex_debix_som_a_8g -CFG_start_polyhex_debix_som_a_8g.pblb.imximg = $(board)/polyhex-debix/flash-header-polyhex-debix.imxcfg -FILE_barebox-polyhex-debix-som-a-8g.img = start_polyhex_debix_som_a_8g.pblb.pimximg -image-$(CONFIG_MACH_POLYHEX_DEBIX) += barebox-polyhex-debix-som-a-8g.img - -pblb-$(CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP) += start_variscite_imx8mp_dart -CFG_start_variscite_imx8mp_dart.pblb.imximg = $(board)/variscite-dt8mcustomboard-imx8mp/flash-header-imx8mp-dart.imxcfg -FILE_barebox-variscite-imx8mp-dart-cb.img = start_variscite_imx8mp_dart.pblb.pimximg -image-$(CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP) += barebox-variscite-imx8mp-dart-cb.img +$(call build_imx8m_habv4img, CONFIG_MACH_NXP_IMX8MP_EVK, start_nxp_imx8mp_evk, nxp-imx8mp-evk/flash-header-imx8mp-evk, nxp-imx8mp-evk) + +$(call build_imx8m_habv4img, CONFIG_MACH_SKOV_IMX8MP, start_skov_imx8mp, skov-imx8mp/flash-header-skov-imx8mp, skov-imx8mp) + +$(call build_imx8m_habv4img, CONFIG_MACH_TQ_MBA8MPXL, start_tqma8mpxl, tqma8mpxl/flash-header-tqma8mpxl, tqma8mpxl) + +$(call build_imx8m_habv4img, CONFIG_MACH_POLYHEX_DEBIX, start_polyhex_debix, polyhex-debix/flash-header-polyhex-debix, polyhex-debix) + +$(call build_imx8m_habv4img, CONFIG_MACH_POLYHEX_DEBIX, start_polyhex_debix_som_a_8g, polyhex-debix/flash-header-polyhex-debix, polyhex-debix-som-a-8g) + +$(call build_imx8m_habv4img, CONFIG_MACH_VARISCITE_DT8MCUSTOMBOARD_IMX8MP, start_variscite_imx8mp_dart, variscite-dt8mcustomboard-imx8mp/flash-header-imx8mp-dart, variscite-imx8mp-dart-cb) # ----------------------- i.MX8mq based boards -------------------------- -pblb-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += start_nxp_imx8mq_evk -CFG_start_nxp_imx8mq_evk.pblb.imximg = $(board)/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg -FILE_barebox-nxp-imx8mq-evk.img = start_nxp_imx8mq_evk.pblb.pimximg -image-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += barebox-nxp-imx8mq-evk.img +$(call build_imx8m_habv4img, CONFIG_MACH_NXP_IMX8MQ_EVK, start_nxp_imx8mq_evk, nxp-imx8mq-evk/flash-header-imx8mq-evk, nxp-imx8mq-evk) pblb-$(CONFIG_MACH_ZII_IMX8MQ_DEV) += start_zii_imx8mq_dev CFG_start_zii_imx8mq_dev.pblb.imximg = $(board)/zii-imx8mq-dev/flash-header-zii-imx8mq-dev.imxcfg diff --git a/include/globalvar.h b/include/globalvar.h index 36a7c7006c..5fdb70fca9 100644 --- a/include/globalvar.h +++ b/include/globalvar.h @@ -10,6 +10,12 @@ extern struct device global_device; #ifdef CONFIG_GLOBALVAR + +static inline const char *globalvar_get(const char *name) +{ + return dev_get_param(&global_device, name); +} + int globalvar_add_simple(const char *name, const char *value); void globalvar_remove(const char *name); @@ -41,6 +47,11 @@ void dev_param_init_from_nv(struct device *dev, const char *name); void globalvar_alias_deprecated(const char *newname, const char *oldname); #else +static inline const char *globalvar_get(const char *name) +{ + return NULL; +} + static inline int globalvar_add_simple(const char *name, const char *value) { return 0; diff --git a/include/linux/overflow.h b/include/linux/overflow.h index 50c93ca0c3..f9b60313ea 100644 --- a/include/linux/overflow.h +++ b/include/linux/overflow.h @@ -4,14 +4,12 @@ #include <linux/compiler.h> #include <linux/limits.h> +#include <linux/const.h> /* - * In the fallback code below, we need to compute the minimum and - * maximum values representable in a given type. These macros may also - * be useful elsewhere, so we provide them outside the - * COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW block. - * - * It would seem more obvious to do something like + * We need to compute the minimum and maximum values representable in a given + * type. These macros may also be useful elsewhere. It would seem more obvious + * to do something like: * * #define type_min(T) (T)(is_signed_type(T) ? (T)1 << (8*sizeof(T)-1) : 0) * #define type_max(T) (T)(is_signed_type(T) ? ((T)1 << (8*sizeof(T)-1)) - 1 : ~(T)0) @@ -32,7 +30,6 @@ * https://mail-index.netbsd.org/tech-misc/2007/02/05/0000.html - * credit to Christian Biere. */ -#define is_signed_type(type) (((type)(-1)) < (type)1) #define __type_half_max(type) ((type)1 << (8*sizeof(type) - 1 - is_signed_type(type))) #define type_max(T) ((T)((__type_half_max(T) - 1) + __type_half_max(T))) #define type_min(T) ((T)((T)-type_max(T)-(T)1)) @@ -44,191 +41,82 @@ #define is_non_negative(a) ((a) > 0 || (a) == 0) #define is_negative(a) (!(is_non_negative(a))) -#ifdef COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW -/* - * For simplicity and code hygiene, the fallback code below insists on - * a, b and *d having the same type (similar to the min() and max() - * macros), whereas gcc's type-generic overflow checkers accept - * different types. Hence we don't just make check_add_overflow an - * alias for __builtin_add_overflow, but add type checks similar to - * below. - */ -#define check_add_overflow(a, b, d) ({ \ - typeof(a) __a = (a); \ - typeof(b) __b = (b); \ - typeof(d) __d = (d); \ - (void) (&__a == &__b); \ - (void) (&__a == __d); \ - __builtin_add_overflow(__a, __b, __d); \ -}) - -#define check_sub_overflow(a, b, d) ({ \ - typeof(a) __a = (a); \ - typeof(b) __b = (b); \ - typeof(d) __d = (d); \ - (void) (&__a == &__b); \ - (void) (&__a == __d); \ - __builtin_sub_overflow(__a, __b, __d); \ -}) - -#define check_mul_overflow(a, b, d) ({ \ - typeof(a) __a = (a); \ - typeof(b) __b = (b); \ - typeof(d) __d = (d); \ - (void) (&__a == &__b); \ - (void) (&__a == __d); \ - __builtin_mul_overflow(__a, __b, __d); \ -}) - -#else - - -/* Checking for unsigned overflow is relatively easy without causing UB. */ -#define __unsigned_add_overflow(a, b, d) ({ \ - typeof(a) __a = (a); \ - typeof(b) __b = (b); \ - typeof(d) __d = (d); \ - (void) (&__a == &__b); \ - (void) (&__a == __d); \ - *__d = __a + __b; \ - *__d < __a; \ -}) -#define __unsigned_sub_overflow(a, b, d) ({ \ - typeof(a) __a = (a); \ - typeof(b) __b = (b); \ - typeof(d) __d = (d); \ - (void) (&__a == &__b); \ - (void) (&__a == __d); \ - *__d = __a - __b; \ - __a < __b; \ -}) -/* - * If one of a or b is a compile-time constant, this avoids a division. - */ -#define __unsigned_mul_overflow(a, b, d) ({ \ - typeof(a) __a = (a); \ - typeof(b) __b = (b); \ - typeof(d) __d = (d); \ - (void) (&__a == &__b); \ - (void) (&__a == __d); \ - *__d = __a * __b; \ - __builtin_constant_p(__b) ? \ - __b > 0 && __a > type_max(typeof(__a)) / __b : \ - __a > 0 && __b > type_max(typeof(__b)) / __a; \ -}) - /* - * For signed types, detecting overflow is much harder, especially if - * we want to avoid UB. But the interface of these macros is such that - * we must provide a result in *d, and in fact we must produce the - * result promised by gcc's builtins, which is simply the possibly - * wrapped-around value. Fortunately, we can just formally do the - * operations in the widest relevant unsigned type (u64) and then - * truncate the result - gcc is smart enough to generate the same code - * with and without the (u64) casts. + * Allows for effectively applying __must_check to a macro so we can have + * both the type-agnostic benefits of the macros while also being able to + * enforce that the return value is, in fact, checked. */ +static inline bool __must_check __must_check_overflow(bool overflow) +{ + return unlikely(overflow); +} -/* - * Adding two signed integers can overflow only if they have the same - * sign, and overflow has happened iff the result has the opposite - * sign. +/** + * check_add_overflow() - Calculate addition with overflow checking + * @a: first addend + * @b: second addend + * @d: pointer to store sum + * + * Returns 0 on success. + * + * *@d holds the results of the attempted addition, but is not considered + * "safe for use" on a non-zero return value, which indicates that the + * sum has overflowed or been truncated. */ -#define __signed_add_overflow(a, b, d) ({ \ - typeof(a) __a = (a); \ - typeof(b) __b = (b); \ - typeof(d) __d = (d); \ - (void) (&__a == &__b); \ - (void) (&__a == __d); \ - *__d = (u64)__a + (u64)__b; \ - (((~(__a ^ __b)) & (*__d ^ __a)) \ - & type_min(typeof(__a))) != 0; \ -}) +#define check_add_overflow(a, b, d) \ + __must_check_overflow(__builtin_add_overflow(a, b, d)) -/* - * Subtraction is similar, except that overflow can now happen only - * when the signs are opposite. In this case, overflow has happened if - * the result has the opposite sign of a. +/** + * check_sub_overflow() - Calculate subtraction with overflow checking + * @a: minuend; value to subtract from + * @b: subtrahend; value to subtract from @a + * @d: pointer to store difference + * + * Returns 0 on success. + * + * *@d holds the results of the attempted subtraction, but is not considered + * "safe for use" on a non-zero return value, which indicates that the + * difference has underflowed or been truncated. */ -#define __signed_sub_overflow(a, b, d) ({ \ - typeof(a) __a = (a); \ - typeof(b) __b = (b); \ - typeof(d) __d = (d); \ - (void) (&__a == &__b); \ - (void) (&__a == __d); \ - *__d = (u64)__a - (u64)__b; \ - ((((__a ^ __b)) & (*__d ^ __a)) \ - & type_min(typeof(__a))) != 0; \ -}) +#define check_sub_overflow(a, b, d) \ + __must_check_overflow(__builtin_sub_overflow(a, b, d)) -/* - * Signed multiplication is rather hard. gcc always follows C99, so - * division is truncated towards 0. This means that we can write the - * overflow check like this: - * - * (a > 0 && (b > MAX/a || b < MIN/a)) || - * (a < -1 && (b > MIN/a || b < MAX/a) || - * (a == -1 && b == MIN) - * - * The redundant casts of -1 are to silence an annoying -Wtype-limits - * (included in -Wextra) warning: When the type is u8 or u16, the - * __b_c_e in check_mul_overflow obviously selects - * __unsigned_mul_overflow, but unfortunately gcc still parses this - * code and warns about the limited range of __b. +/** + * check_mul_overflow() - Calculate multiplication with overflow checking + * @a: first factor + * @b: second factor + * @d: pointer to store product + * + * Returns 0 on success. + * + * *@d holds the results of the attempted multiplication, but is not + * considered "safe for use" on a non-zero return value, which indicates + * that the product has overflowed or been truncated. */ +#define check_mul_overflow(a, b, d) \ + __must_check_overflow(__builtin_mul_overflow(a, b, d)) -#define __signed_mul_overflow(a, b, d) ({ \ - typeof(a) __a = (a); \ - typeof(b) __b = (b); \ - typeof(d) __d = (d); \ - typeof(a) __tmax = type_max(typeof(a)); \ - typeof(a) __tmin = type_min(typeof(a)); \ - (void) (&__a == &__b); \ - (void) (&__a == __d); \ - *__d = (u64)__a * (u64)__b; \ - (__b > 0 && (__a > __tmax/__b || __a < __tmin/__b)) || \ - (__b < (typeof(__b))-1 && (__a > __tmin/__b || __a < __tmax/__b)) || \ - (__b == (typeof(__b))-1 && __a == __tmin); \ -}) - - -#define check_add_overflow(a, b, d) \ - __builtin_choose_expr(is_signed_type(typeof(a)), \ - __signed_add_overflow(a, b, d), \ - __unsigned_add_overflow(a, b, d)) - -#define check_sub_overflow(a, b, d) \ - __builtin_choose_expr(is_signed_type(typeof(a)), \ - __signed_sub_overflow(a, b, d), \ - __unsigned_sub_overflow(a, b, d)) - -#define check_mul_overflow(a, b, d) \ - __builtin_choose_expr(is_signed_type(typeof(a)), \ - __signed_mul_overflow(a, b, d), \ - __unsigned_mul_overflow(a, b, d)) - - -#endif /* COMPILER_HAS_GENERIC_BUILTIN_OVERFLOW */ - -/** check_shl_overflow() - Calculate a left-shifted value and check overflow - * +/** + * check_shl_overflow() - Calculate a left-shifted value and check overflow * @a: Value to be shifted * @s: How many bits left to shift * @d: Pointer to where to store the result * * Computes *@d = (@a << @s) * - * Returns true if '*d' cannot hold the result or when 'a << s' doesn't + * Returns true if '*@d' cannot hold the result or when '@a << @s' doesn't * make sense. Example conditions: - * - 'a << s' causes bits to be lost when stored in *d. - * - 's' is garbage (e.g. negative) or so large that the result of - * 'a << s' is guaranteed to be 0. - * - 'a' is negative. - * - 'a << s' sets the sign bit, if any, in '*d'. - * - * '*d' will hold the results of the attempted shift, but is not - * considered "safe for use" if false is returned. + * + * - '@a << @s' causes bits to be lost when stored in *@d. + * - '@s' is garbage (e.g. negative) or so large that the result of + * '@a << @s' is guaranteed to be 0. + * - '@a' is negative. + * - '@a << @s' sets the sign bit, if any, in '*@d'. + * + * '*@d' will hold the results of the attempted shift, but is not + * considered "safe for use" if true is returned. */ -#define check_shl_overflow(a, s, d) ({ \ +#define check_shl_overflow(a, s, d) __must_check_overflow(({ \ typeof(a) _a = a; \ typeof(s) _s = s; \ typeof(d) _d = d; \ @@ -238,83 +126,187 @@ *_d = (_a_full << _to_shift); \ (_to_shift != _s || is_negative(*_d) || is_negative(_a) || \ (*_d >> _to_shift) != _a); \ +})) + +#define __overflows_type_constexpr(x, T) ( \ + is_unsigned_type(typeof(x)) ? \ + (x) > type_max(typeof(T)) : \ + is_unsigned_type(typeof(T)) ? \ + (x) < 0 || (x) > type_max(typeof(T)) : \ + (x) < type_min(typeof(T)) || (x) > type_max(typeof(T))) + +#define __overflows_type(x, T) ({ \ + typeof(T) v = 0; \ + check_add_overflow((x), v, &v); \ }) /** - * array_size() - Calculate size of 2-dimensional array. + * overflows_type - helper for checking the overflows between value, variables, + * or data type * - * @a: dimension one - * @b: dimension two + * @n: source constant value or variable to be checked + * @T: destination variable or data type proposed to store @x * - * Calculates size of 2-dimensional array: @a * @b. + * Compares the @x expression for whether or not it can safely fit in + * the storage of the type in @T. @x and @T can have different types. + * If @x is a constant expression, this will also resolve to a constant + * expression. * - * Returns: number of bytes needed to represent the array or SIZE_MAX on - * overflow. + * Returns: true if overflow can occur, false otherwise. + */ +#define overflows_type(n, T) \ + __builtin_choose_expr(__is_constexpr(n), \ + __overflows_type_constexpr(n, T), \ + __overflows_type(n, T)) + +/** + * castable_to_type - like __same_type(), but also allows for casted literals + * + * @n: variable or constant value + * @T: variable or data type + * + * Unlike the __same_type() macro, this allows a constant value as the + * first argument. If this value would not overflow into an assignment + * of the second argument's type, it returns true. Otherwise, this falls + * back to __same_type(). */ -static inline __must_check size_t array_size(size_t a, size_t b) +#define castable_to_type(n, T) \ + __builtin_choose_expr(__is_constexpr(n), \ + !__overflows_type_constexpr(n, T), \ + __same_type(n, T)) + +/** + * size_mul() - Calculate size_t multiplication with saturation at SIZE_MAX + * @factor1: first factor + * @factor2: second factor + * + * Returns: calculate @factor1 * @factor2, both promoted to size_t, + * with any overflow causing the return value to be SIZE_MAX. The + * lvalue must be size_t to avoid implicit type conversion. + */ +static inline size_t __must_check size_mul(size_t factor1, size_t factor2) { size_t bytes; - if (check_mul_overflow(a, b, &bytes)) + if (check_mul_overflow(factor1, factor2, &bytes)) return SIZE_MAX; return bytes; } /** - * array3_size() - Calculate size of 3-dimensional array. - * - * @a: dimension one - * @b: dimension two - * @c: dimension three - * - * Calculates size of 3-dimensional array: @a * @b * @c. + * size_add() - Calculate size_t addition with saturation at SIZE_MAX + * @addend1: first addend + * @addend2: second addend * - * Returns: number of bytes needed to represent the array or SIZE_MAX on - * overflow. + * Returns: calculate @addend1 + @addend2, both promoted to size_t, + * with any overflow causing the return value to be SIZE_MAX. The + * lvalue must be size_t to avoid implicit type conversion. */ -static inline __must_check size_t array3_size(size_t a, size_t b, size_t c) +static inline size_t __must_check size_add(size_t addend1, size_t addend2) { size_t bytes; - if (check_mul_overflow(a, b, &bytes)) - return SIZE_MAX; - if (check_mul_overflow(bytes, c, &bytes)) + if (check_add_overflow(addend1, addend2, &bytes)) return SIZE_MAX; return bytes; } -/* - * Compute a*b+c, returning SIZE_MAX on overflow. Internal helper for - * struct_size() below. +/** + * size_sub() - Calculate size_t subtraction with saturation at SIZE_MAX + * @minuend: value to subtract from + * @subtrahend: value to subtract from @minuend + * + * Returns: calculate @minuend - @subtrahend, both promoted to size_t, + * with any overflow causing the return value to be SIZE_MAX. For + * composition with the size_add() and size_mul() helpers, neither + * argument may be SIZE_MAX (or the result with be forced to SIZE_MAX). + * The lvalue must be size_t to avoid implicit type conversion. */ -static inline __must_check size_t __ab_c_size(size_t a, size_t b, size_t c) +static inline size_t __must_check size_sub(size_t minuend, size_t subtrahend) { size_t bytes; - if (check_mul_overflow(a, b, &bytes)) - return SIZE_MAX; - if (check_add_overflow(bytes, c, &bytes)) + if (minuend == SIZE_MAX || subtrahend == SIZE_MAX || + check_sub_overflow(minuend, subtrahend, &bytes)) return SIZE_MAX; return bytes; } /** - * struct_size() - Calculate size of structure with trailing array. + * array_size() - Calculate size of 2-dimensional array. + * @a: dimension one + * @b: dimension two + * + * Calculates size of 2-dimensional array: @a * @b. + * + * Returns: number of bytes needed to represent the array or SIZE_MAX on + * overflow. + */ +#define array_size(a, b) size_mul(a, b) + +/** + * array3_size() - Calculate size of 3-dimensional array. + * @a: dimension one + * @b: dimension two + * @c: dimension three + * + * Calculates size of 3-dimensional array: @a * @b * @c. + * + * Returns: number of bytes needed to represent the array or SIZE_MAX on + * overflow. + */ +#define array3_size(a, b, c) size_mul(size_mul(a, b), c) + +/** + * flex_array_size() - Calculate size of a flexible array member + * within an enclosing structure. * @p: Pointer to the structure. + * @member: Name of the flexible array member. + * @count: Number of elements in the array. + * + * Calculates size of a flexible array of @count number of @member + * elements, at the end of structure @p. + * + * Return: number of bytes needed or SIZE_MAX on overflow. + */ +#define flex_array_size(p, member, count) \ + __builtin_choose_expr(__is_constexpr(count), \ + (count) * sizeof(*(p)->member) + __must_be_array((p)->member), \ + size_mul(count, sizeof(*(p)->member) + __must_be_array((p)->member))) + +/** + * struct_size() - Calculate size of structure with trailing flexible array. + * @p: Pointer to the structure. + * @member: Name of the array member. + * @count: Number of elements in the array. + * + * Calculates size of memory needed for structure of @p followed by an + * array of @count number of @member elements. + * + * Return: number of bytes needed or SIZE_MAX on overflow. + */ +#define struct_size(p, member, count) \ + __builtin_choose_expr(__is_constexpr(count), \ + sizeof(*(p)) + flex_array_size(p, member, count), \ + size_add(sizeof(*(p)), flex_array_size(p, member, count))) + +/** + * struct_size_t() - Calculate size of structure with trailing flexible array + * @type: structure type name. * @member: Name of the array member. - * @n: Number of elements in the array. + * @count: Number of elements in the array. * - * Calculates size of memory needed for structure @p followed by an - * array of @n @member elements. + * Calculates size of memory needed for structure @type followed by an + * array of @count number of @member elements. Prefer using struct_size() + * when possible instead, to keep calculations associated with a specific + * instance variable of type @type. * * Return: number of bytes needed or SIZE_MAX on overflow. */ -#define struct_size(p, member, n) \ - __ab_c_size(n, \ - sizeof(*(p)->member) + __must_be_array((p)->member),\ - sizeof(*(p))) +#define struct_size_t(type, member, count) \ + struct_size((type *)NULL, member, count) #endif /* __LINUX_OVERFLOW_H */ diff --git a/include/linux/string_helpers.h b/include/linux/string_helpers.h new file mode 100644 index 0000000000..5a8a469be7 --- /dev/null +++ b/include/linux/string_helpers.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _LINUX_STRING_HELPERS_H_ +#define _LINUX_STRING_HELPERS_H_ + +#include <linux/string.h> +#include <linux/types.h> + +static inline bool string_is_terminated(const char *s, int len) +{ + return memchr(s, '\0', len) ? true : false; +} + +#endif diff --git a/include/mach/at91/at91sam9260.h b/include/mach/at91/at91sam9260.h index 1375872ce2..764af3a203 100644 --- a/include/mach/at91/at91sam9260.h +++ b/include/mach/at91/at91sam9260.h @@ -100,6 +100,7 @@ #define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */ #define AT91SAM9260_SRAM_BASE 0x002FF000 /* Internal SRAM base address */ #define AT91SAM9260_SRAM_SIZE SZ_8K /* Internal SRAM size (8Kb) */ +#define AT91SAM9260_SRAM_END (AT91SAM9260_SRAM_BASE + AT91SAM9260_SRAM_SIZE) #define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ diff --git a/include/mach/at91/at91sam9_sdramc.h b/include/mach/at91/at91sam9_sdramc.h index a4c88b24d4..2ba73cd2f2 100644 --- a/include/mach/at91/at91sam9_sdramc.h +++ b/include/mach/at91/at91sam9_sdramc.h @@ -13,6 +13,8 @@ #ifndef AT91SAM9_SDRAMC_H #define AT91SAM9_SDRAMC_H +#include <linux/compiler.h> + /* SDRAM Controller (SDRAMC) registers */ #define AT91_SDRAMC_MR 0x00 /* SDRAM Controller Mode Register */ #define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ @@ -268,5 +270,7 @@ static inline bool at91sam9263_is_low_power_sdram(int bank) } } +void __noreturn at91sam9260_barebox_entry(void *boarddata); + #endif #endif diff --git a/include/mach/at91/at91sam9g45.h b/include/mach/at91/at91sam9g45.h index d7596930d2..630cee2b87 100644 --- a/include/mach/at91/at91sam9g45.h +++ b/include/mach/at91/at91sam9g45.h @@ -107,6 +107,7 @@ */ #define AT91SAM9G45_SRAM_BASE 0x00300000 /* Internal SRAM base address */ #define AT91SAM9G45_SRAM_SIZE SZ_64K /* Internal SRAM size (64Kb) */ +#define AT91SAM9G45_SRAM_END (AT91SAM9G45_SRAM_BASE + AT91SAM9G45_SRAM_SIZE) #define AT91SAM9G45_ROM_BASE 0x00400000 /* Internal ROM base address */ #define AT91SAM9G45_ROM_SIZE SZ_64K /* Internal ROM size (64Kb) */ diff --git a/include/mach/imx/flexspi-imx8mm-cfg.h b/include/mach/imx/flexspi-imx8mm-cfg.h new file mode 100644 index 0000000000..81de224fa7 --- /dev/null +++ b/include/mach/imx/flexspi-imx8mm-cfg.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * This snippet can be included from a i.MX flash header configuration + * file for generating FlexSPI compatible images. + */ +flexspi_ivtofs 0x1000 +flexspi_fcfbofs 0x0 diff --git a/include/mach/imx/flexspi-imx8mp-cfg.h b/include/mach/imx/flexspi-imx8mp-cfg.h new file mode 100644 index 0000000000..d01adaf62c --- /dev/null +++ b/include/mach/imx/flexspi-imx8mp-cfg.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * This snippet can be included from a i.MX flash header configuration + * file for generating FlexSPI compatible images. + */ +flexspi_ivtofs 0x0 +flexspi_fcfbofs 0x400 diff --git a/include/mach/imx/habv4-imx8-gencsf.h b/include/mach/imx/habv4-imx8-gencsf.h index b50788127e..5f92ceceab 100644 --- a/include/mach/imx/habv4-imx8-gencsf.h +++ b/include/mach/imx/habv4-imx8-gencsf.h @@ -10,6 +10,9 @@ * CONFIG_HABV4_IMG_CRT_PEM */ #if defined(CONFIG_HABV4) && defined(CONFIG_CPU_64) +#if defined(CONFIG_HABV4_QSPI) +hab_qspi +#endif hab [Header] hab Version = 4.3 hab Hash Algorithm = sha256 diff --git a/include/mach/imx/imx-header.h b/include/mach/imx/imx-header.h index b11b57c372..08329e3d05 100644 --- a/include/mach/imx/imx-header.h +++ b/include/mach/imx/imx-header.h @@ -7,6 +7,7 @@ #define HEADER_LEN 0x1000 /* length of the blank area + IVT + DCD */ #define CSF_LEN 0x2000 /* length of the CSF (needed for HAB) */ +#define FLEXSPI_HEADER_LEN HEADER_LEN #define DEK_BLOB_HEADER 8 /* length of DEK blob header */ #define DEK_BLOB_KEY 32 /* length of DEK blob AES-256 key */ @@ -114,12 +115,13 @@ struct config_data { int (*write_mem)(const struct config_data *data, uint32_t addr, uint32_t val, int width, int set_bits, int clear_bits); int (*nop)(const struct config_data *data); - int csf_space; char *csf; + char *flexspi_csf; int sign_image; char *signed_hdmi_firmware_file; int encrypt_image; size_t dek_size; + bool hab_qspi_support; }; #define MAX_RECORDS_DCD_V2 1024 diff --git a/include/mach/imx/imx6-mmdc.h b/include/mach/imx/imx6-mmdc.h index bf8d41fe58..1df87bf6bd 100644 --- a/include/mach/imx/imx6-mmdc.h +++ b/include/mach/imx/imx6-mmdc.h @@ -145,60 +145,60 @@ struct mx6sx_iomux_grp_regs { */ #define MX6DQ_IOM_DDR_BASE 0x020e0500 struct mx6dq_iomux_ddr_regs { - u32 res1[3]; - u32 dram_sdqs5; - u32 dram_dqm5; - u32 dram_dqm4; - u32 dram_sdqs4; - u32 dram_sdqs3; - u32 dram_dqm3; - u32 dram_sdqs2; - u32 dram_dqm2; - u32 res2[16]; - u32 dram_cas; - u32 res3[2]; - u32 dram_ras; - u32 dram_reset; - u32 res4[2]; - u32 dram_sdclk_0; - u32 dram_sdba2; - u32 dram_sdcke0; - u32 dram_sdclk_1; - u32 dram_sdcke1; - u32 dram_sdodt0; - u32 dram_sdodt1; - u32 res5; - u32 dram_sdqs0; - u32 dram_dqm0; - u32 dram_sdqs1; - u32 dram_dqm1; - u32 dram_sdqs6; - u32 dram_dqm6; - u32 dram_sdqs7; - u32 dram_dqm7; + u32 res1[3]; /* 0x020e0500 */ + u32 dram_sdqs5; /* 0x020e050c */ + u32 dram_dqm5; /* 0x020e0510 */ + u32 dram_dqm4; /* 0x020e0514 */ + u32 dram_sdqs4; /* 0x020e0518 */ + u32 dram_sdqs3; /* 0x020e051c */ + u32 dram_dqm3; /* 0x020e0520 */ + u32 dram_sdqs2; /* 0x020e0524 */ + u32 dram_dqm2; /* 0x020e0528 */ + u32 res2[16]; /* 0x020e052c */ + u32 dram_cas; /* 0x020e056c */ + u32 res3[2]; /* 0x020e0570 */ + u32 dram_ras; /* 0x020e0578 */ + u32 dram_reset; /* 0x020e057c */ + u32 res4[2]; /* 0x020e0580 */ + u32 dram_sdclk_0; /* 0x020e0588 */ + u32 dram_sdba2; /* 0x020e058c */ + u32 dram_sdcke0; /* 0x020e0590 */ + u32 dram_sdclk_1; /* 0x020e0594 */ + u32 dram_sdcke1; /* 0x020e0598 */ + u32 dram_sdodt0; /* 0x020e059c */ + u32 dram_sdodt1; /* 0x020e05a0 */ + u32 res5; /* 0x020e05a4 */ + u32 dram_sdqs0; /* 0x020e05a8 */ + u32 dram_dqm0; /* 0x020e05ac */ + u32 dram_sdqs1; /* 0x020e05b0 */ + u32 dram_dqm1; /* 0x020e05b4 */ + u32 dram_sdqs6; /* 0x020e05b8 */ + u32 dram_dqm6; /* 0x020e05bc */ + u32 dram_sdqs7; /* 0x020e05c0 */ + u32 dram_dqm7; /* 0x020e05c4 */ }; #define MX6DQ_IOM_GRP_BASE 0x020e0700 struct mx6dq_iomux_grp_regs { - u32 res1[18]; - u32 grp_b7ds; - u32 grp_addds; - u32 grp_ddrmode_ctl; - u32 res2; - u32 grp_ddrpke; - u32 res3[6]; - u32 grp_ddrmode; - u32 res4[3]; - u32 grp_b0ds; - u32 grp_b1ds; - u32 grp_ctlds; - u32 res5; - u32 grp_b2ds; - u32 grp_ddr_type; - u32 grp_b3ds; - u32 grp_b4ds; - u32 grp_b5ds; - u32 grp_b6ds; + u32 res1[18]; /* 0x020e0700 */ + u32 grp_b7ds; /* 0x020e0748 */ + u32 grp_addds; /* 0x020e074c */ + u32 grp_ddrmode_ctl; /* 0x020e0750 */ + u32 res2; /* 0x020e0754 */ + u32 grp_ddrpke; /* 0x020e0758 */ + u32 res3[6]; /* 0x020e075c */ + u32 grp_ddrmode; /* 0x020e0774 */ + u32 res4[3]; /* 0x020e0778 */ + u32 grp_b0ds; /* 0x020e0784 */ + u32 grp_b1ds; /* 0x020e0788 */ + u32 grp_ctlds; /* 0x020e078c */ + u32 res5; /* 0x020e0790 */ + u32 grp_b2ds; /* 0x020e0794 */ + u32 grp_ddr_type; /* 0x020e0798 */ + u32 grp_b3ds; /* 0x020e079c */ + u32 grp_b4ds; /* 0x020e07a0 */ + u32 grp_b5ds; /* 0x020e07a4 */ + u32 grp_b6ds; /* 0x020e07a8 */ }; #define MX6SDL_IOM_DDR_BASE 0x020e0400 diff --git a/include/mach/imx/ocotp-fusemap.h b/include/mach/imx/ocotp-fusemap.h index 6ba794c166..8232738955 100644 --- a/include/mach/imx/ocotp-fusemap.h +++ b/include/mach/imx/ocotp-fusemap.h @@ -53,5 +53,8 @@ #define OCOTP_GP1 (OCOTP_WORD(0x660) | OCOTP_BIT(0) | OCOTP_WIDTH(32)) #define OCOTP_GP2 (OCOTP_WORD(0x670) | OCOTP_BIT(0) | OCOTP_WIDTH(32)) #define OCOTP_PAD_SETTINGS (OCOTP_WORD(0x6d0) | OCOTP_BIT(0) | OCOTP_WIDTH(6)) +/* i.MX8M moved the security related fuses */ +#define MX8M_OCOTP_SEC_CONFIG_1 (OCOTP_WORD(0x470) | OCOTP_BIT(25) | OCOTP_WIDTH(1)) +#define MX8MQ_OCOTP_DIR_BT_DIS (OCOTP_WORD(0x470) | OCOTP_BIT(27) | OCOTP_WIDTH(1)) #endif /* __MACH_IMX_OCOTP_FUSEMAP_H */ diff --git a/include/machine_id.h b/include/machine_id.h index e30bbada1a..9699e7f207 100644 --- a/include/machine_id.h +++ b/include/machine_id.h @@ -5,10 +5,17 @@ #if IS_ENABLED(CONFIG_MACHINE_ID) +const void *machine_id_get_hashable(size_t *len); + void machine_id_set_hashable(const void *hashable, size_t len); #else +static inline const void *machine_id_get_hashable(size_t *len) +{ + return NULL; +} + static inline void machine_id_set_hashable(const void *hashable, size_t len) { } diff --git a/include/memory.h b/include/memory.h index 9c2a037610..d8691972ec 100644 --- a/include/memory.h +++ b/include/memory.h @@ -43,13 +43,8 @@ static inline struct resource *request_sdram_region(const char *name, return __request_sdram_region(name, 0, start, size); } -/* use for secure firmware to inhibit speculation */ -static inline struct resource *reserve_sdram_region(const char *name, - resource_size_t start, - resource_size_t size) -{ - return __request_sdram_region(name, IORESOURCE_BUSY, start, size); -} +struct resource *reserve_sdram_region(const char *name, resource_size_t start, + resource_size_t size); int release_sdram_region(struct resource *res); diff --git a/include/of.h b/include/of.h index a7a1ce125f..5686709fcf 100644 --- a/include/of.h +++ b/include/of.h @@ -61,6 +61,7 @@ struct of_reserve_map { int of_add_reserve_entry(resource_size_t start, resource_size_t end); void of_clean_reserve_map(void); void fdt_add_reserve_map(void *fdt); +void fdt_print_reserve_map(const void *fdt); struct device; struct driver; diff --git a/lib/Kconfig.hardening b/lib/Kconfig.hardening index a9d3af1109..f14b256a7d 100644 --- a/lib/Kconfig.hardening +++ b/lib/Kconfig.hardening @@ -61,7 +61,7 @@ config STACKPROTECTOR_ALL endchoice choice - prompt "Stack Protector buffer overflow detection for PBL" + prompt "Stack Protector buffer overflow detection for PBL" if PBL_IMAGE config PBL_STACKPROTECTOR_NONE bool "None" @@ -69,6 +69,7 @@ config PBL_STACKPROTECTOR_NONE config PBL_STACKPROTECTOR_STRONG bool "Strong" depends on $(cc-option,-fstack-protector-strong) + depends on PBL_IMAGE select STACKPROTECTOR help For PBL, This option turns on the "stack-protector" GCC feature. This @@ -93,7 +94,7 @@ config PBL_STACKPROTECTOR_STRONG config PBL_STACKPROTECTOR_ALL bool "PBL" depends on $(cc-option,-fstack-protector-strong) - depends on COMPILE_TEST + depends on PBL_IMAGE && COMPILE_TEST select STACKPROTECTOR help This pushes and verifies stack protector canaries on all functions, diff --git a/lib/Makefile b/lib/Makefile index 2b577becc4..791080b2d1 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -89,6 +89,8 @@ obj-$(CONFIG_GENERIC_LIB_MULDI3) += muldi3.o pbl-$(CONFIG_GENERIC_LIB_ASHLDI3) += ashldi3.o UBSAN_SANITIZE_ubsan.o := n +KASAN_SANITIZE_ubsan.o := n +CFLAGS_ubsan.o := -fno-stack-protector libfdt_files = fdt.o fdt_ro.o fdt_wip.o fdt_rw.o fdt_sw.o fdt_strerror.o \ fdt_empty_tree.o diff --git a/lib/bootstrap/devfs.c b/lib/bootstrap/devfs.c index 603e6744f2..b127b27c1d 100644 --- a/lib/bootstrap/devfs.c +++ b/lib/bootstrap/devfs.c @@ -88,8 +88,7 @@ void* bootstrap_read_devfs(char *devname, bool use_bb, int offset, struct cdev *cdev, *partition; char *partname = "x"; - partition = devfs_add_partition(devname, offset, max_size, - DEVFS_PARTITION_FIXED, partname); + partition = devfs_add_partition(devname, offset, max_size, 0, partname); if (IS_ERR(partition)) { bootstrap_err("%s: failed to add partition (%ld)\n", devname, PTR_ERR(partition)); diff --git a/lib/decompress_unxz.c b/lib/decompress_unxz.c index 132ab4a239..ad6a5f20ba 100644 --- a/lib/decompress_unxz.c +++ b/lib/decompress_unxz.c @@ -133,6 +133,8 @@ #ifdef CONFIG_ARM # ifdef CONFIG_CPU_64 # define XZ_DEC_ARM64 +# elif defined CONFIG_THUMB2_BAREBOX +# define XZ_DEC_ARMTHUMB # else # define XZ_DEC_ARM # endif diff --git a/lib/random.c b/lib/random.c index c6532df552..e83935d0e1 100644 --- a/lib/random.c +++ b/lib/random.c @@ -68,11 +68,11 @@ int get_crypto_bytes(void *buf, int len) } if (!IS_ENABLED(CONFIG_ALLOW_PRNG_FALLBACK)) { - pr_err("error: no HWRNG available!\n"); + pr_err("no HWRNG available!\n"); return err; } - pr_warn("warning: falling back to Pseudo RNG source!\n"); + pr_warn("falling back to Pseudo RNG source!\n"); get_random_bytes(buf, len); diff --git a/lib/stackprot.c b/lib/stackprot.c index aa0e88603a..7a8d0a4c10 100644 --- a/lib/stackprot.c +++ b/lib/stackprot.c @@ -1,5 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <printk.h> + +#define pr_fmt(fmt) "stackprot: " fmt + +#include <linux/printk.h> #include <linux/kernel.h> #include <linux/export.h> #include <init.h> @@ -13,7 +16,7 @@ void __stack_chk_fail(void); -unsigned long __stack_chk_guard = (unsigned long)(0xfeedf00ddeadbeef & ~0UL); +volatile ulong __stack_chk_guard = (ulong)(0xfeedf00ddeadbeef & ~0UL); /* * Called when gcc's -fstack-protector feature is used, and @@ -27,6 +30,15 @@ EXPORT_SYMBOL(__stack_chk_fail); static __no_stack_protector int stackprot_randomize_guard(void) { - return get_crypto_bytes(&__stack_chk_guard, sizeof(__stack_chk_guard)); + ulong chk_guard; + int ret; + + ret = get_crypto_bytes(&chk_guard, sizeof(chk_guard)); + if (ret) + pr_warn("proceeding without randomized stack protector\n"); + else + __stack_chk_guard = chk_guard; + + return 0; } late_initcall(stackprot_randomize_guard); diff --git a/lib/uncompress.c b/lib/uncompress.c index 0608e9f9d3..71ac882b87 100644 --- a/lib/uncompress.c +++ b/lib/uncompress.c @@ -199,7 +199,7 @@ ssize_t uncompress_buf_to_buf(const void *input, size_t input_len, goto free_temp; } - ret = uncompress_buf_to_fd(input, input_len, outfd, uncompress_err_stdout); + ret = uncompress_buf_to_fd(input, input_len, outfd, error_fn); if (ret) goto close_outfd; diff --git a/scripts/common.c b/scripts/common.c index 88173bc977..49c468a1ea 100644 --- a/scripts/common.c +++ b/scripts/common.c @@ -11,6 +11,7 @@ #include <stdarg.h> #include "common.h" +#include "compiler.h" int read_file_2(const char *filename, size_t *size, void **outbuf, size_t max_size) { @@ -22,7 +23,7 @@ int read_file_2(const char *filename, size_t *size, void **outbuf, size_t max_si *size = 0; *outbuf = NULL; - fd = open(filename, O_RDONLY); + fd = open(filename, O_RDONLY | O_BINARY); if (fd < 0) { fprintf(stderr, "Cannot open %s: %s\n", filename, strerror(errno)); return -errno; @@ -75,8 +76,8 @@ int read_file_2(const char *filename, size_t *size, void **outbuf, size_t max_si ret = 0; goto close; free: + free(*outbuf); *outbuf = NULL; - free(buf); close: close(fd); return ret; diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c index 1f96b38390..8a5768ca8b 100644 --- a/scripts/imx/imx-image.c +++ b/scripts/imx/imx-image.c @@ -290,18 +290,6 @@ static int write_mem_v1(uint32_t addr, uint32_t val, int width, int set_bits, in return 0; } -static bool flexspi_image(const struct config_data *data) -{ - /* - * | FlexSPI-FCFB | FlexSPI-IVT - * ----------------------------------------- - * i.MX8MM | 0x0 | 0x1000 - * i.MX8MN/P | 0x400 | 0x0 - */ - - return data->image_flexspi_ivt_offset || data->image_flexspi_fcfb_offset; -} - /* * ============================================================================ * i.MX flash header v2 handling. Found on i.MX50, i.MX53 and i.MX6 @@ -310,7 +298,7 @@ static bool flexspi_image(const struct config_data *data) static size_t add_header_v2(const struct config_data *data, void *buf, uint32_t offset, - size_t header_len) + size_t header_len, unsigned int csf_slot) { struct imx_flash_header_v2 *hdr; int dcdsize = curdcd * sizeof(uint32_t); @@ -353,8 +341,10 @@ add_header_v2(const struct config_data *data, void *buf, uint32_t offset, hdr->boot_data.size = imagesize; if (data->sign_image) { - hdr->csf = loadaddr + imagesize; + hdr->csf = loadaddr + imagesize + (csf_slot * CSF_LEN); hdr->boot_data.size += CSF_LEN; + if (data->flexspi_csf) + hdr->boot_data.size += CSF_LEN; } else if (data->pbl_code_size && data->csf) { /* * For i.MX8 the CSF space is added via the linker script, so @@ -362,6 +352,8 @@ add_header_v2(const struct config_data *data, void *buf, uint32_t offset, * signing is not. */ hdr->boot_data.size += CSF_LEN; + if (data->flexspi_csf) + hdr->boot_data.size += CSF_LEN; } buf += sizeof(*hdr); @@ -420,8 +412,6 @@ static size_t add_flexspi_fcfb_header(const struct config_data *data, void *buf) return sizeof(nor_conf); } -#define FLEXSPI_HEADER_LEN HEADER_LEN - static size_t add_flexspi_header(const struct config_data *data, void **_buf, size_t *header_len) { @@ -477,7 +467,7 @@ add_flexspi_header(const struct config_data *data, void **_buf, size_t *header_l data->cpu_type == IMX_CPU_IMX8MN) buf += SZ_4K; - size += add_header_v2(data, buf, ivt_offset, len); + size += add_header_v2(data, buf, ivt_offset, len, 1); *header_len += FLEXSPI_HEADER_LEN; @@ -674,12 +664,13 @@ static int nop(const struct config_data *data) * The cst is expected to be executable as 'cst' or if exists, the content * of the environment variable 'CST' is used. */ -static int hab_sign(struct config_data *data) +static int hab_sign(struct config_data *data, const char *csfcmds, + unsigned int csf_slot) { int fd, outfd, ret, lockfd; char *csffile, *command; struct stat s; - char *cst; + char *cst, *cstopts; void *buf; size_t csf_space = CSF_LEN; unsigned int offset = 0; @@ -688,7 +679,11 @@ static int hab_sign(struct config_data *data) if (!cst) cst = "cst"; - ret = asprintf(&csffile, "%s.csfbin", data->outfile); + cstopts = getenv("CST_EXTRA_CMDLINE_OPTIONS"); + if (!cstopts) + cstopts = ""; + + ret = asprintf(&csffile, "%s.slot%u.csfbin", data->outfile, csf_slot); if (ret < 0) exit(1); @@ -725,11 +720,11 @@ static int hab_sign(struct config_data *data) if (ret == -1) return -EINVAL; else if (ret == 0) - ret = asprintf(&command, "%s -o %s -i /dev/stdin", - cst, csffile); + ret = asprintf(&command, "%s -o %s -i /dev/stdin %s", + cst, csffile, cstopts); else - ret = asprintf(&command, "%s -o %s;", - cst, csffile); + ret = asprintf(&command, "%s -o %s %s;", + cst, csffile, cstopts); if (ret < 0) return -ENOMEM; @@ -757,7 +752,7 @@ static int hab_sign(struct config_data *data) return -errno; } - fwrite(data->csf, 1, strlen(data->csf) + 1, f); + fwrite(csfcmds, 1, strlen(csfcmds) + 1, f); pclose(f); @@ -805,6 +800,8 @@ static int hab_sign(struct config_data *data) xread(fd, buf, s.st_size); + close(fd); + /* * For i.MX8M, write into the reserved CSF section */ @@ -824,8 +821,13 @@ static int hab_sign(struct config_data *data) * For i.MX8 insert the CSF data into the reserved CSF area * right behind the PBL */ - offset = roundup(data->header_gap + data->pbl_code_size + - HEADER_LEN, 0x1000); + offset = data->header_gap + data->pbl_code_size + HEADER_LEN; + if (flexspi_image(data)) + offset += FLEXSPI_HEADER_LEN; + + offset += csf_slot * CSF_LEN; + + offset = roundup(offset, 0x1000); if (data->signed_hdmi_firmware_file) offset += PLUGIN_HDMI_SIZE; @@ -1029,7 +1031,7 @@ int main(int argc, char *argv[]) barebox_image_size += add_flexspi_header(&data, &buf, &header_len); barebox_image_size += add_header_v2(&data, buf + signed_hdmi_firmware_size, - data.image_ivt_offset, header_len); + data.image_ivt_offset, header_len, 0); break; default: fprintf(stderr, "Congratulations! You're welcome to implement header version %d\n", @@ -1115,9 +1117,14 @@ int main(int argc, char *argv[]) } if (data.csf && data.sign_image) { - ret = hab_sign(&data); + ret = hab_sign(&data, data.csf, 0); if (ret) exit(1); + if (data.flexspi_csf) { + ret = hab_sign(&data, data.flexspi_csf, 1); + if (ret) + exit(1); + } } if (create_usb_image) { diff --git a/scripts/imx/imx-usb-loader.c b/scripts/imx/imx-usb-loader.c index 676f077c25..ece4603b2b 100644 --- a/scripts/imx/imx-usb-loader.c +++ b/scripts/imx/imx-usb-loader.c @@ -484,12 +484,16 @@ static int transfer(int report, void *p, unsigned cnt, int *last_trans) err = libusb_bulk_transfer(usb_dev_handle, (report < 3) ? 1 : 2 + EP_IN, p, cnt, last_trans, 1000); } else { - unsigned char tmp[1028]; + unsigned char tmp[1028] = { 0 }; tmp[0] = (unsigned char)report; if (report < 3) { memcpy(&tmp[1], p, cnt); + + if (report == 2) + cnt = mach_id->max_transfer; + if (mach_id->hid_endpoint) { int trans; err = libusb_interrupt_transfer(usb_dev_handle, @@ -739,7 +743,7 @@ static int send_buf(void *buf, unsigned len) while (1) { int now = get_min(cnt, mach_id->max_transfer); - if (!now) + if (now <= 0) break; err = transfer(2, p, now, &now); diff --git a/scripts/imx/imx.c b/scripts/imx/imx.c index e3169bace6..5ccc116cfe 100644 --- a/scripts/imx/imx.c +++ b/scripts/imx/imx.c @@ -20,6 +20,23 @@ */ #define ENCRYPT_OFFSET (HEADER_LEN + 0x10) +static char *strcata(char *str, const char *add) +{ + size_t size = (str ? strlen(str) : 0) + strlen(add) + 1; + bool need_init = str ? false : true; + + str = realloc(str, size); + if (!str) + return NULL; + + if (need_init) + memset(str, 0, size); + + strcat(str, add); + + return str; +} + static int parse_line(char *line, char *argv[]) { int nargs = 0; @@ -282,16 +299,53 @@ static int do_max_load_size(struct config_data *data, int argc, char *argv[]) return 0; } +static int do_hab_qspi(struct config_data *data, int argc, char *argv[]) +{ + /* + * Force 'hab_qspi' to specified before any 'hab' to ensure correct CSF + * generation. + */ + if (data->csf) { + fprintf(stderr, + "'hab_qspi' must be specified before any 'hab' command\n"); + return -EINVAL; + } + + data->hab_qspi_support = true; + + return 0; +} + static int hab_add_str(struct config_data *data, const char *str) { - int len = strlen(str); + data->csf = strcata(data->csf, str); + if (!data->csf) + return -ENOMEM; + + if (!data->hab_qspi_support) + return 0; - if (data->csf_space < len) + data->flexspi_csf = strcata(data->flexspi_csf, str); + if (!data->flexspi_csf) return -ENOMEM; - strcat(data->csf, str); + return 0; +} - data->csf_space -= len; +static int hab_add_barebox_blocks(struct config_data *data, + const char *csf_str, + const char *flexspi_csf_str) +{ + data->csf = strcata(data->csf, csf_str); + if (!data->csf) + return -ENOMEM; + + if (!flexspi_csf_str) + return 0; + + data->flexspi_csf = strcata(data->flexspi_csf, flexspi_csf_str); + if (!data->flexspi_csf) + return -ENOMEM; return 0; } @@ -300,14 +354,6 @@ static int do_hab(struct config_data *data, int argc, char *argv[]) { int i, ret; - if (!data->csf) { - data->csf_space = 0x10000; - - data->csf = calloc(data->csf_space + 1, 1); - if (!data->csf) - return -ENOMEM; - } - for (i = 1; i < argc; i++) { ret = hab_add_str(data, argv[i]); if (ret) @@ -325,13 +371,44 @@ static int do_hab(struct config_data *data, int argc, char *argv[]) return 0; } +static void +imx8m_get_offset_size(struct config_data *data, + uint32_t *offset, uint32_t *signed_size, + uint32_t *flexspi_offset, uint32_t *flexspi_signed_size) +{ + unsigned int hdrlen = HEADER_LEN; + + if (flexspi_image(data)) + hdrlen += FLEXSPI_HEADER_LEN; + + *signed_size = roundup(data->pbl_code_size + hdrlen, 0x1000); + *flexspi_signed_size = roundup(data->pbl_code_size + FLEXSPI_HEADER_LEN, + 0x1000); + + *offset += data->header_gap; + *flexspi_offset += data->header_gap; + /* + * Starting with i.MX8MP/N the FlexSPI IVT offset is 0x0 but the primary + * image offset is at 0x1000. + */ + if (data->cpu_type != IMX_CPU_IMX8MM) + *flexspi_offset += HEADER_LEN; + + if (data->signed_hdmi_firmware_file) { + *offset += PLUGIN_HDMI_SIZE; + *flexspi_offset += PLUGIN_HDMI_SIZE; + } +} + static int do_hab_blocks(struct config_data *data, int argc, char *argv[]) { - char *str; + char *str, *flexspi_str = NULL; int ret; int i; uint32_t signed_size = data->load_size; + uint32_t flexspi_signed_size = signed_size; uint32_t offset = data->image_ivt_offset; + uint32_t flexspi_offset = data->image_flexspi_ivt_offset; if (!data->csf) return -EINVAL; @@ -346,17 +423,21 @@ static int do_hab_blocks(struct config_data *data, int argc, char *argv[]) /* * Ensure we only sign the PBL for i.MX8MQ */ - if (data->pbl_code_size && cpu_is_mx8m(data)) { - offset += data->header_gap; - signed_size = roundup(data->pbl_code_size + HEADER_LEN, 0x1000); - if (data->signed_hdmi_firmware_file) - offset += PLUGIN_HDMI_SIZE; - } + if (data->pbl_code_size && cpu_is_mx8m(data)) + imx8m_get_offset_size(data, &offset, &signed_size, + &flexspi_offset, &flexspi_signed_size); if (signed_size > 0) { ret = asprintf(&str, "Blocks = 0x%08x 0x%08x 0x%08x \"%s\"", data->image_load_addr + data->image_ivt_offset, offset, signed_size - data->image_ivt_offset, data->outfile); + if (data->flexspi_csf) + ret |= asprintf(&flexspi_str, + "Blocks = 0x%08x 0x%08x 0x%08x \"%s\"", + data->image_load_addr + + data->image_flexspi_ivt_offset, + flexspi_offset, flexspi_signed_size, + data->outfile); } else { fprintf(stderr, "Invalid signed size area 0x%08x\n", signed_size); @@ -366,8 +447,9 @@ static int do_hab_blocks(struct config_data *data, int argc, char *argv[]) if (ret < 0) return -ENOMEM; - ret = hab_add_str(data, str); + ret = hab_add_barebox_blocks(data, str, flexspi_str); free(str); + free(flexspi_str); if (ret) return ret; @@ -614,6 +696,12 @@ static int do_flexspi_ivtofs(struct config_data *data, int argc, char *argv[]) if (argc < 2) return -EINVAL; + if (data->csf) { + fprintf(stderr, "#include <mach/imx/flexspi-imx8m*-cfg.h> must be placed in front " + "of #include <mach/imx/habv4-imx8-gencsf.h>\n"); + return -EINVAL; + } + data->image_flexspi_ivt_offset = strtoul(argv[1], NULL, 0); return 0; @@ -624,6 +712,12 @@ static int do_flexspi_fcfbofs(struct config_data *data, int argc, char *argv[]) if (argc < 2) return -EINVAL; + if (data->csf) { + fprintf(stderr, "#include <mach/imx/flexspi-imx8m*-cfg.h> must be placed in front " + "of #include <mach/imx/habv4-imx8-gencsf.h>\n"); + return -EINVAL; + } + data->image_flexspi_fcfb_offset = strtoul(argv[1], NULL, 0); return 0; @@ -682,6 +776,9 @@ struct command cmds[] = { .name = "hab_encrypt_blocks", .parse = do_hab_encrypt_blocks, }, { + .name = "hab_qspi", + .parse = do_hab_qspi, + }, { .name = "super_root_key", .parse = do_super_root_key, }, { diff --git a/scripts/imx/imx.h b/scripts/imx/imx.h index 08cdf8321a..65697a9b0d 100644 --- a/scripts/imx/imx.h +++ b/scripts/imx/imx.h @@ -15,4 +15,17 @@ static inline int cpu_is_mx8m(const struct config_data *data) } } +static inline bool flexspi_image(const struct config_data *data) +{ + /* + * | FlexSPI-FCFB | FlexSPI-IVT + * ----------------------------------------- + * i.MX8MM | 0x0 | 0x1000 + * i.MX8MN/P | 0x400 | 0x0 + */ + + return data->image_flexspi_ivt_offset || + data->image_flexspi_fcfb_offset; +} + int parse_config(struct config_data *data, const char *filename); diff --git a/scripts/xz_wrap.sh b/scripts/xz_wrap.sh index 5b5f3adcff..a6373a7481 100755 --- a/scripts/xz_wrap.sh +++ b/scripts/xz_wrap.sh @@ -20,6 +20,10 @@ case $SRCARCH in sparc) BCJ=--sparc ;; esac +if grep -q '^CONFIG_THUMB2_BAREBOX=y$' include/config/auto.conf; then + BCJ=--armthumb +fi + # clear BCJ filter if unsupported xz -H | grep -q -- $BCJ || BCJ= diff --git a/test/self/Kconfig b/test/self/Kconfig index 15e00f0244..e7da07491a 100644 --- a/test/self/Kconfig +++ b/test/self/Kconfig @@ -33,16 +33,15 @@ config SELFTEST_ENABLE_ALL select SELFTEST_PROGRESS_NOTIFIER select SELFTEST_OF_MANIPULATION select SELFTEST_ENVIRONMENT_VARIABLES if ENVIRONMENT_VARIABLES - imply SELFTEST_FS_RAMFS - imply SELFTEST_TFTP - imply SELFTEST_JSON - imply SELFTEST_DIGEST - imply SELFTEST_MMU - imply SELFTEST_STRING - imply SELFTEST_SETJMP - imply SELFTEST_REGULATOR - help - Selects all self-tests compatible with current configuration + select SELFTEST_FS_RAMFS if FS_RAMFS + select SELFTEST_TFTP if FS_TFTP + select SELFTEST_JSON if JSMN + select SELFTEST_DIGEST if DIGEST + select SELFTEST_MMU if MMU + select SELFTEST_STRING + select SELFTEST_SETJMP if ARCH_HAS_SJLJ + select SELFTEST_REGULATOR if REGULATOR && OFDEVICE + select SELFTEST_TEST_COMMAND if CMD_TEST config SELFTEST_MALLOC bool "malloc() selftest" diff --git a/test/self/mmu.c b/test/self/mmu.c index 4ca10affdd..ca58d718ff 100644 --- a/test/self/mmu.c +++ b/test/self/mmu.c @@ -10,6 +10,9 @@ #include <zero_page.h> #include <linux/sizes.h> +#define TEST_BUFFER_SIZE SZ_1M +#define TEST_BUFFER_ALIGN SZ_4K + BSELFTEST_GLOBALS(); #define __expect(ret, cond, fmt, ...) do { \ @@ -64,33 +67,33 @@ static void test_remap(void) phys_addr_t buffer_phys; int i, ret; - buffer = memalign(SZ_2M, SZ_8M); + buffer = memalign(TEST_BUFFER_ALIGN, TEST_BUFFER_SIZE); if (WARN_ON(!buffer)) goto out; buffer_phys = virt_to_phys(buffer); - mirror = memalign(SZ_2M, SZ_8M); + mirror = memalign(TEST_BUFFER_ALIGN, TEST_BUFFER_SIZE); if (WARN_ON(!mirror)) goto out; pr_debug("allocated buffer = 0x%p, mirror = 0x%p\n", buffer, mirror); - memtest(buffer, SZ_8M, "cached buffer"); - memtest(mirror, SZ_8M, "cached mirror"); + memtest(buffer, TEST_BUFFER_SIZE, "cached buffer"); + memtest(mirror, TEST_BUFFER_SIZE, "cached mirror"); if (!arch_can_remap()) { skipped_tests += 18; goto out; } - ret = remap_range(buffer, SZ_8M, MAP_UNCACHED); - memtest(buffer, SZ_8M, "uncached buffer"); + ret = remap_range(buffer, TEST_BUFFER_SIZE, MAP_UNCACHED); + memtest(buffer, TEST_BUFFER_SIZE, "uncached buffer"); - ret = remap_range(mirror, SZ_8M, MAP_UNCACHED); - memtest(mirror, SZ_8M, "uncached mirror"); + ret = remap_range(mirror, TEST_BUFFER_SIZE, MAP_UNCACHED); + memtest(mirror, TEST_BUFFER_SIZE, "uncached mirror"); - for (i = 0; i < SZ_8M; i += sizeof(u32)) { + for (i = 0; i < TEST_BUFFER_SIZE; i += sizeof(u32)) { int m = i, b = i; writel(0xDEADBEEF, &mirror[m]); writel(i, &buffer[b]); @@ -101,10 +104,10 @@ static void test_remap(void) expect_success(ret, "asserting no mirror before remap"); - ret = arch_remap_range(mirror, buffer_phys, SZ_8M, MAP_UNCACHED); + ret = arch_remap_range(mirror, buffer_phys, TEST_BUFFER_SIZE, MAP_UNCACHED); expect_success(ret, "remapping with mirroring"); - for (i = 0; i < SZ_8M; i += sizeof(u32)) { + for (i = 0; i < TEST_BUFFER_SIZE; i += sizeof(u32)) { int m = i, b = i; writel(0xDEADBEEF, &mirror[m]); writel(i, &buffer[b]); @@ -115,10 +118,11 @@ static void test_remap(void) expect_success(ret, "asserting mirroring after remap"); - ret = arch_remap_range(mirror, buffer_phys + SZ_4K, SZ_4M, MAP_UNCACHED); + ret = arch_remap_range(mirror, buffer_phys + SZ_4K, + TEST_BUFFER_SIZE / 2, MAP_UNCACHED); expect_success(ret, "remapping with mirroring (phys += 4K)"); - for (i = 0; i < SZ_4M; i += sizeof(u32)) { + for (i = 0; i < TEST_BUFFER_SIZE / 2; i += sizeof(u32)) { int m = i, b = i + SZ_4K; writel(0xDEADBEEF, &mirror[m]); writel(i, &buffer[b]); @@ -129,10 +133,11 @@ static void test_remap(void) expect_success(ret, "asserting mirroring after remap (phys += 4K)"); - ret = arch_remap_range(mirror + SZ_4K, buffer_phys, SZ_4M, MAP_UNCACHED); + ret = arch_remap_range(mirror + SZ_4K, buffer_phys, + TEST_BUFFER_SIZE / 2, MAP_UNCACHED); expect_success(ret, "remapping with mirroring (virt += 4K)"); - for (i = 0; i < SZ_4M; i += sizeof(u32)) { + for (i = 0; i < TEST_BUFFER_SIZE / 2; i += sizeof(u32)) { int m = i + SZ_4K, b = i; writel(0xDEADBEEF, &mirror[m]); writel(i, &buffer[b]); @@ -143,15 +148,15 @@ static void test_remap(void) expect_success(ret, "asserting mirroring after remap (virt += 4K)"); - ret = remap_range(buffer, SZ_8M, MAP_DEFAULT); + ret = remap_range(buffer, TEST_BUFFER_SIZE, MAP_DEFAULT); expect_success(ret, "remapping buffer with default attrs"); - memtest(buffer, SZ_8M, "newly cached buffer"); + memtest(buffer, TEST_BUFFER_SIZE, "newly cached buffer"); - ret = remap_range(mirror, SZ_8M, MAP_DEFAULT); + ret = remap_range(mirror, TEST_BUFFER_SIZE, MAP_DEFAULT); expect_success(ret, "remapping mirror with default attrs"); - memtest(mirror, SZ_8M, "newly cached mirror"); + memtest(mirror, TEST_BUFFER_SIZE, "newly cached mirror"); - for (i = 0; i < SZ_8M; i += sizeof(u32)) { + for (i = 0; i < TEST_BUFFER_SIZE; i += sizeof(u32)) { int m = i, b = i; writel(0xDEADBEEF, &mirror[m]); writel(i, &buffer[b]); diff --git a/test/self/of_manipulation.c b/test/self/of_manipulation.c index 64913ac1ea..8d645b1137 100644 --- a/test/self/of_manipulation.c +++ b/test/self/of_manipulation.c @@ -121,6 +121,8 @@ static void __init test_of_manipulation(void) expected = of_unflatten_dtb(__dtb_of_manipulation_start, __dtb_of_manipulation_end - __dtb_of_manipulation_start); + if (WARN_ON(IS_ERR(expected))) + return; assert_equal(root, expected); diff --git a/test/self/regulator.c b/test/self/regulator.c index 08073cfc91..bcbcbe33e1 100644 --- a/test/self/regulator.c +++ b/test/self/regulator.c @@ -175,6 +175,8 @@ static void test_regulator(void) return; overlay = of_unflatten_dtb(__dtbo_test_regulator_start, INT_MAX); + if (WARN_ON(IS_ERR(overlay))) + return; of_overlay_apply_tree(of_get_root_node(), overlay); of_probe(); |