diff options
Diffstat (limited to 'Documentation/boards/imx')
| -rw-r--r-- | Documentation/boards/imx/karo-tx25.rst | 2 | ||||
| -rw-r--r-- | Documentation/boards/imx/meerkat96.rst | 43 | ||||
| -rw-r--r-- | Documentation/boards/imx/nxp-imx8mm-evk.rst | 100 | ||||
| -rw-r--r-- | Documentation/boards/imx/nxp-imx8mn-evk.rst | 96 | ||||
| -rw-r--r-- | Documentation/boards/imx/nxp-imx8mp-evk.rst | 104 | ||||
| -rw-r--r-- | Documentation/boards/imx/phytec-phycard-i.mx27.rst | 2 | ||||
| -rw-r--r-- | Documentation/boards/imx/phytec-phycore-i.mx27.rst | 2 | ||||
| -rw-r--r-- | Documentation/boards/imx/protonic-prt8mm.rst | 10 | ||||
| -rw-r--r-- | Documentation/boards/imx/variscite-dt8mcustomboard-imx8mp.rst | 149 | ||||
| -rw-r--r-- | Documentation/boards/imx/zii-imx8mq-dev/openocd.cfg | 10 |
10 files changed, 510 insertions, 8 deletions
diff --git a/Documentation/boards/imx/karo-tx25.rst b/Documentation/boards/imx/karo-tx25.rst index 756c99d816..d8dcd16890 100644 --- a/Documentation/boards/imx/karo-tx25.rst +++ b/Documentation/boards/imx/karo-tx25.rst @@ -1,7 +1,7 @@ Ka-Ro TX25 ========== -Building the bootloader image for this target is covered by the ``imx_defconfig`` +Building the bootloader image for this target is covered by the ``multi_v5_v6_defconfig`` multiimage configuration if the ``System Type`` menu entry ``Ka-Ro TX25`` is enabled. diff --git a/Documentation/boards/imx/meerkat96.rst b/Documentation/boards/imx/meerkat96.rst new file mode 100644 index 0000000000..7456aa857b --- /dev/null +++ b/Documentation/boards/imx/meerkat96.rst @@ -0,0 +1,43 @@ +Meerkat 96 +========== + +The Meerkat96 is a single board computer based on an i.MX7D SoC by NXP, +featuring a dual core ARM Cortex-A7 at 1 GHz and a Cortex-M4 at 266MHz +and 512 MB DRAM. For further details on the board's features check the +manufacturers page at https://www.96boards.org/product/imx7-96 + +Serial console +-------------- + +UART6 of the i.MX7D is broken out to Pinheader J3, on the Silkscreen +the Pins are labeled with B (Ground), W (UART 6 TX) and G (UART 6 RX). +If you use the UART-To-USB-Converter provided with the board, you can +just connect the Black jumper to B, the White to W and the Green to G. + +The UART uses 3.3V levels. + +Building Barebox +---------------- + +To build Barebox for the meerkat96 board do the following: + +.. code-block:: sh + + make ARCH=arm CROSS_COMPILE=<ARM toolchain prefix> mrproper + make ARCH=arm CROSS_COMPILE=<ARM toolchain prefix> imx_v7_defconfig + make ARCH=arm CROSS_COMPILE=<ARM toolchain prefix> + +Bringup +------- + +flash the resulting barebox-meerkat96.img to an sdcard at address 0. + +Make sure the pmic is set to power-on state by setting the dipswitch +SW3 on the boards bottom side to 1-1 (i.e. all switches on, which is +the factory default). + +Schematics +---------- + +Schematics are available at https://github.com/96boards/documentation/blob/master/consumer/imx7-96/hardware-docs/files/iMX7-96-schematics.pdf + diff --git a/Documentation/boards/imx/nxp-imx8mm-evk.rst b/Documentation/boards/imx/nxp-imx8mm-evk.rst new file mode 100644 index 0000000000..aa70419139 --- /dev/null +++ b/Documentation/boards/imx/nxp-imx8mm-evk.rst @@ -0,0 +1,100 @@ +NXP i.MX8MM EVK Evaluation Board +================================ + +Board comes with: + +* 2GiB of LPDDR4 RAM +* 16GiB eMMC + +Not including booting via serial, the device can boot from either SD or eMMC. + +Downloading DDR PHY Firmware +---------------------------- + +As a part of DDR intialization routine NXP i.MX8MM EVK requires and +uses several binary firmware blobs that are distributed under a +separate EULA and cannot be included in Barebox. In order to obtain +them do the following:: + + wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin + chmod +x firmware-imx-8.0.bin + ./firmware-imx-8.0.bin + +Executing that file should produce a EULA acceptance dialog as well as +result in the following files: + +- lpddr4_pmu_train_1d_dmem.bin +- lpddr4_pmu_train_1d_imem.bin +- lpddr4_pmu_train_2d_dmem.bin +- lpddr4_pmu_train_2d_imem.bin + +As a last step of this process those files need to be placed in +"firmware/":: + + for f in lpddr4_pmu_train_1d_dmem.bin \ + lpddr4_pmu_train_1d_imem.bin \ + lpddr4_pmu_train_2d_dmem.bin \ + lpddr4_pmu_train_2d_imem.bin; \ + do \ + cp firmware-imx-8.0/firmware/ddr/synopsys/${f} \ + firmware/${f}; \ + done + +DDR Configuration Code +====================== + +The following two files: + + - arch/arm/boards/nxp-imx8mq-evk/ddr_init.c + - arch/arm/boards/nxp-imx8mq-evk/ddrphy_train.c + +were obtained by running i.MX 8M DDR Tool that can be found here: + +https://community.nxp.com/docs/DOC-340179 + +Only minimal amount of necessary changes were made to those files. +All of the "impedance matching" code is located in "ddr.h". + +Build barebox +============= + + make imx_v8_defconfig + make + +Start barebox +============= + +The resulting image file is images/barebox-nxp-imx8mm-evk.img. Configure the +board for serial download mode as printed on the PCB. You can start barebox with +the imx-usb-loader tool that comes with barebox like this: + +./scripts/imx/imx-usb-loader images/barebox-nxp-imx8mm-evk.img + +Installing barebox +================== + +When the EVK is strapped to boot from eMMC, the i.MX8M bootrom will +consult the eMMC ext_csd register to determine whether to boot +from the active eMMC boot partition or from the user area. + +The same barebox image written to the start of the SD-Card can +be written to the start of the eMMC user area. Power-fail-safe +installation to the eMMC boot partition requires special handling: + + - The barebox image must be written to the inactive boot partition, + then afterwards, the newly written boot partition is activated + (This is controlled by the barebox ``mmcX.boot`` variable). + +The following steps are required to write the image to the QSPI NOR flash: + + - The 32KiB preamble MMC preamble must be stripped. + + - The QSPI NOR partition ``barebox`` must be erased before the stripped + image is written. The erase size depends on the stripped image size but + always start at offset 0. + + - Write the stripped barebox image to the QSPI NOR partition ``barebox`` + at offset 0. + +The ``barebox_update`` command takes care of this and need just be +supplied a barebox image as argument. diff --git a/Documentation/boards/imx/nxp-imx8mn-evk.rst b/Documentation/boards/imx/nxp-imx8mn-evk.rst new file mode 100644 index 0000000000..597db57eaf --- /dev/null +++ b/Documentation/boards/imx/nxp-imx8mn-evk.rst @@ -0,0 +1,96 @@ +NXP i.MX8MN EVK Evaluation Board +================================ + +Board comes with either: + +* 2GiB of LPDDR4 RAM +* 2GiB of DDR4 RAM + +barebox supports both variants with the same image. + +Downloading DDR PHY Firmware +---------------------------- + +As a part of DDR intialization routine NXP i.MX8MN EVK requires and +uses several binary firmware blobs that are distributed under a +separate EULA and cannot be included in Barebox. In order to obtain +them do the following:: + + wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.12.bin + chmod +x firmware-imx-8.12.bin + ./firmware-imx-8.12.bin + +Executing that file should produce a EULA acceptance dialog as well as +result in the following files: + +- lpddr4_pmu_train_1d_dmem.bin +- lpddr4_pmu_train_1d_imem.bin +- lpddr4_pmu_train_2d_dmem.bin +- lpddr4_pmu_train_2d_imem.bin +- ddr4_dmem_1d_201810.bin +- ddr4_imem_1d_201810.bin +- ddr4_dmem_2d_201810.bin +- ddr4_imem_2d_201810.bin + +As a last step of this process those files need to be placed in +"firmware/":: + + for f in lpddr4_pmu_train_1d_dmem.bin \ + lpddr4_pmu_train_1d_imem.bin \ + lpddr4_pmu_train_2d_dmem.bin \ + lpddr4_pmu_train_2d_imem.bin; \ + do \ + cp firmware-imx-8.12/firmware/ddr/synopsys/${f} \ + firmware/${f}; \ + done + + for f in ddr4_dmem_1d_201810.bin \ + ddr4_imem_1d_201810.bin \ + ddr4_dmem_2d_201810.bin \ + ddr4_imem_2d_201810.bin; \ + do \ + cp firmware-imx-8.12/firmware/ddr/synopsys/${f} \ + firmware/${f%_201810.bin}.bin; \ + done + +Build barebox +============= + + make imx_v8_defconfig + make + +Installing barebox +================== + +When the EVK is strapped to boot from eMMC, the i.MX8M bootrom will +consult the eMMC ext_csd register to determine whether to boot +from the active eMMC boot partition or from the user area. + +The same barebox image written to the start of the SD-Card can +be written to the start of the eMMC user area. Power-fail-safe +installation to the eMMC boot partition requires special handling: + + - The barebox image must be written to the inactive boot partition, + then afterwards, the newly written boot partition is activated + (This is controlled by the barebox ``mmcX.boot`` variable). + + - The barebox image includes a 32KiB preamble that allows the image + to be directly writable to the start of the SD-Card or eMMC user area. + Unlike older i.MX8M, the i.MX8MN BootROM expects the bootloader to not + start at an offset when booting from eMMC boot partitions, thus the first + 32KiB must be stripped. + +The following steps are required to write the image to the QSPI NOR flash: + + - Strip the 32KiB preamble, like it is done for the eMMC boot partition case + (see above). + + - The QSPI NOR partition ``barebox`` must be erased before the stripped + image is written. The erase size depends on the stripped image size but + always start at offset 0. + + - Write the stripped barebox image to the QSPI NOR partition ``barebox`` + at offset 0. + +The ``barebox_update`` command takes care of this and need just be +supplied a barebox image as argument. diff --git a/Documentation/boards/imx/nxp-imx8mp-evk.rst b/Documentation/boards/imx/nxp-imx8mp-evk.rst new file mode 100644 index 0000000000..da26339864 --- /dev/null +++ b/Documentation/boards/imx/nxp-imx8mp-evk.rst @@ -0,0 +1,104 @@ +NXP i.MX8MP-EVK board +===================== + +The board comes with: + +* 6GiB of LPDDR4 RAM +* 32GiB eMMC + +Not including booting via serial, the device can boot from either SD or eMMC. + +Downloading DDR PHY firmware +---------------------------- + +As a part of DDR intialization routine NXP i.MX8MP EVK requires and +uses several binary firmware blobs that are distributed under a +separate EULA and cannot be included in Barebox. In order to obtain +them do the following:: + + wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.7.bin + chmod +x firmware-imx-8.7.bin + ./firmware-imx-8.7.bin + +Executing that file should produce a EULA acceptance dialog as well as +result in the following files: + +- lpddr4_pmu_train_1d_dmem.bin +- lpddr4_pmu_train_1d_imem.bin +- lpddr4_pmu_train_2d_dmem.bin +- lpddr4_pmu_train_2d_imem.bin + +As a last step of this process those files need to be placed in +"firmware/":: + + for f in lpddr4_pmu_train_1d_dmem.bin \ + lpddr4_pmu_train_1d_imem.bin \ + lpddr4_pmu_train_2d_dmem.bin \ + lpddr4_pmu_train_2d_imem.bin; \ + do \ + cp firmware-imx-8.7/firmware/ddr/synopsys/${f} \ + firmware/${f}; \ + done + +Get and Build the Trusted Firmware A +------------------------------------ + +Get TF-A from https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/ and +checkout version v2.7:: + + make PLAT=imx8mp bl31 + cp build/imx8mp/release/bl31.bin ${barebox_srctree}/firmware/imx8mp-bl31.bin + +.. warning:: It is important to use a version >= v2.7 else your system + might not boot. + +Build Barebox +------------- + +i.MX8MP-EVK support is contained in the imx_v8_defconfig to build it use:: + + make imx_v8_defconfig + make + +Boot Configuration +------------------ + +The NXP i.MX8MP-EVK board has four switches responsible for configuring +bootsource/boot mode. The settings for the different boot sources are +printed on the board. + +Installing barebox +================== + +When the EVK is strapped to boot from eMMC, the i.MX8M bootrom will +consult the eMMC ext_csd register to determine whether to boot +from the active eMMC boot partition or from the user area. + +The same barebox image written to the start of the SD-Card can +be written to the start of the eMMC user area. Power-fail-safe +installation to the eMMC boot partition requires special handling: + + - The barebox image must be written to the inactive boot partition, + then afterwards, the newly written boot partition is activated + (This is controlled by the barebox ``mmcX.boot`` variable). + + - The barebox image includes a 32KiB preamble that allows the image + to be directly writable to the start of the SD-Card or eMMC user area. + Unlike older i.MX8M, the i.MX8MP BootROM expects the bootloader to not + start at an offset when booting from eMMC boot partitions, thus the first + 32KiB must be stripped. + +The following steps are required to write the image to the QSPI NOR flash: + + - Strip the 32KiB preamble, like it is done for the eMMC boot partition case + (see above). + + - The QSPI NOR partition ``barebox`` must be erased before the stripped + image is written. The erase size depends on the stripped image size but + always start at offset 0. + + - Write the stripped barebox image to the QSPI NOR partition ``barebox`` + at offset 0. + +The ``barebox_update`` command takes care of this and need just be +supplied a barebox image as argument. diff --git a/Documentation/boards/imx/phytec-phycard-i.mx27.rst b/Documentation/boards/imx/phytec-phycard-i.mx27.rst index d5d3837132..af89b353a8 100644 --- a/Documentation/boards/imx/phytec-phycard-i.mx27.rst +++ b/Documentation/boards/imx/phytec-phycard-i.mx27.rst @@ -1,7 +1,7 @@ Phytec phyCARD-i.MX27 ===================== -Building the bootloader image for this target is covered by the ``imx_defconfig`` +Building the bootloader image for this target is covered by the ``multi_v5_v6_defconfig`` multiimage configuration if the ``System Type`` menu entry ``phyCard-i.MX27`` is enabled. diff --git a/Documentation/boards/imx/phytec-phycore-i.mx27.rst b/Documentation/boards/imx/phytec-phycore-i.mx27.rst index 4b40be781d..6132e7298a 100644 --- a/Documentation/boards/imx/phytec-phycore-i.mx27.rst +++ b/Documentation/boards/imx/phytec-phycore-i.mx27.rst @@ -1,7 +1,7 @@ Phytec phyCORE-i.MX27 ===================== -Building the bootloader image for this target is covered by the ``imx_defconfig`` +Building the bootloader image for this target is covered by the ``multi_v5_v6_defconfig`` multiimage configuration if the ``System Type`` menu entry ``phyCORE-i.MX27`` is enabled. diff --git a/Documentation/boards/imx/protonic-prt8mm.rst b/Documentation/boards/imx/protonic-prt8mm.rst new file mode 100644 index 0000000000..f8c8b2c88d --- /dev/null +++ b/Documentation/boards/imx/protonic-prt8mm.rst @@ -0,0 +1,10 @@ +Protonic Holland PRT8MM board +============================= + +This board is a low-cost 7inch touchscreen virtual terminal for agricultural applications. +HW specs: + +* SoC: i.MX8M mini +* RAM: 1GiB LPDDR4 +* eMMC: 16GiB +* Display: 7inch 800x480 with capacitive touchscreen. diff --git a/Documentation/boards/imx/variscite-dt8mcustomboard-imx8mp.rst b/Documentation/boards/imx/variscite-dt8mcustomboard-imx8mp.rst new file mode 100644 index 0000000000..0e986a1086 --- /dev/null +++ b/Documentation/boards/imx/variscite-dt8mcustomboard-imx8mp.rst @@ -0,0 +1,149 @@ +Variscite DT8MCustomBoard with DART-MX8M-PLUS SOM +================================================= + +This board is an eval-kit for the Variscite DART-MX8M-PLUS SOM. The latter is a +SOM based on the i.MX8M Plus processor. As seen in official Variscite documents there exist +several hardware revisions for this board. Currently only revision 3.0 could was tested +with Barebox. + +The Variscite DART-MX8M-PLUS SOM is available in different configurations. For a rough overview, +these are some of the possible options: + +* Processor: NXP i.MX8M Plus, either @1.6GHz or @1.8GHz +* 1 to 8 GiB LPDDR4 RAM +* 8 to 128 GiB eMMC +* (optional) GigE PHY on module +* (optional) Wifi + Bluetooth Chip on module + +Besides that the SOM offers a lot of interfaces. Among some of the interfaces that are +made available by the eval-board are: + +* USB3 +* GigE Ethernet +* PCIe +* SD-card slot +* HDMI + +More Information about the eval-board can be found at +https://www.variscite.com/product/single-board-computers/var-dt8mcustomboard/ + +More Information about the targeted SOM can be found at +https://www.variscite.com/product/system-on-module-som/cortex-a53-krait/dart-mx8m-plus-nxp-i-mx-8m-plus + +Providing necessary binary files +-------------------------------- + +Barebox requires some blobs to successfully bringup the system. These blobs +serve different use cases. Barebox's build system will look for these files +in the configured firmware directory (``firmware`` by default). The build +systems expects these files to have certain names. + +Hence the very first thing before building Barebox is to obtain these files and +placing them in the firmware folder. + +The DDR4 training files are part of a set of files that is provided by NXP. +They are provided under the terms of a proprietary EULA one has to agree to, +before getting access to the blobs. They are provided as self-extracting +archive. To get a hand on them, perform the following:: + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.10.bin + $ chmod u+x firmware-imx-8.10.bin + $ ./firmware-imx-8.10.bin + +Assuming that the downloaded executable was run from inside the toplevel directory of the Barebox repo, +the necessary DDR4 training files can simply be hardlinked (or copied):: + + $ ln firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_202006.bin firmware/lpddr4_pmu_train_1d_dmem.bin + $ ln firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_202006.bin firmware/lpddr4_pmu_train_1d_imem.bin + $ ln firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_202006.bin firmware/lpddr4_pmu_train_2d_dmem.bin + $ ln firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_202006.bin firmware/lpddr4_pmu_train_2d_imem.bin + +Another required binary is the Secure Monitor Firmware (BL31). This is build by some ARM Trusted Firmware project (ATF). +One fork is provided by NXP and can be downloaded from https://github.com/nxp-imx/imx-atf. Variscite does maintain it's +own fork of NXP's ATF project. This can be found at https://github.com/varigit/imx-atf/. + +Once the ATF has been built successfully, the resulting BL31 binary needs to be placed in the ``firmware`` directory +under the filename ``imx8mp-bl31.bin``. + +After those files are in place, one can proceed with the usual Barebox build routine. + +Compiling Barebox +----------------- + +A quick way to configure and compile Barebox for this board is by starting from +the `imx_v8_defconfig`:: + + export ARCH=arm + export CROSS_COMPILE=/path/to/your/toolchain/bin/aarch64-v8a-linux-gnu- + make imx_v8_defconfig + make + +With this procedure one might need some additional firmware files in place to +successfully build the Barebox images for all selected boards. A solution to this is +either to copy the necessary files to the `firmware` directory or simply run +`make menuconfig` and deselect the unwanted boards under "System Type". + +When the build succeeds, the Barebox image `barebox-variscite-imx8mp-dart-cb.img` +can be found in the `images` subdirectory. + +Boot Configuration +------------------ + +The DT8MCustomBoard allows the user to choose whether to proceed with the *internal* +or *external boot mode*. With this board, *internal boot mode* refers to booting +from the eMMC memory, while *external boot mode* refers to booting from an SD-card. + +The mode is selected with switch SW7, located below the buttons on the board. + +Set the switch to **ON** for the BootROM to perform an *internal boot*. Otherwise +set the switch to **OFF** to follow the *external boot* procedure. + +If in doubt, refer to the silk screen on the board, to select the correct switch +position. + +If the BootROM cannot find a valid bootloader image in the selected source, +it'll try several fallbacks until it finally ends in USB download mode or finds +a valid bootloader image to load. + +To load an image when the board is in USB download mode the imx-usb-loader tool +is required. To build this tool alongside the Barebox image, select it in the +config menu under "Host Tools". + +Starting Barebox +---------------- + +An easy solution to start Barebox bare metal is to use the *external boot* mode and +copy Barebox onto a SD-card. + +To copy the Barebox binary onto a SD-card, use the `dd` tool on linux:: + + dd if=images/barebox-variscite-imx8mp-dart-cb.img of=/dev/mmcblk0 bs=512 seek=1 skip=1 + +Next, you insert the SD-card into the eval board and select *external boot mode* on +switch SW7. + +When you power up the board, you should now see Barebox's output appearing on your +serial console. + +Currently Supported Features +---------------------------- + +The Barebox binary configured by the `variscite_imx8mp_dart_cb_defconfig` does currently +not support all possible features of the DT8MCustomBoard. Yet the binary does contain +everything necessary to boot an operating system on the i.MX8MP. + +Some of the currently supported features: + +* general i.MX8MP bringup, including DRAM initialisation +* working eMMC and SD-card support +* serial console on UART 1 - available through the micro-USB connector on the board +* working gigabit ethernet on the first port (labeled ETH, named `eth0` in Barebox and linux) +* working LED and GPIO support + +Some functionality that is currently missing or untested: + +* secondary ethernet interface (labeled ETH2) will currently not work +* secure boot (not tested) +* framebuffer support (missing driver) +* OP-TEE integration (not tested - early loading currently not supported by the startup code) +* running on other hardware revisions of the DT8MCustomBoard than v3.0 (not tested)
\ No newline at end of file diff --git a/Documentation/boards/imx/zii-imx8mq-dev/openocd.cfg b/Documentation/boards/imx/zii-imx8mq-dev/openocd.cfg index cc0bec6b74..fa25348757 100644 --- a/Documentation/boards/imx/zii-imx8mq-dev/openocd.cfg +++ b/Documentation/boards/imx/zii-imx8mq-dev/openocd.cfg @@ -71,15 +71,15 @@ proc ddr_init { } { proc start_barebox {} { # - # We have to place our image at MX8MQ_ATF_BL33_BASE_ADDR in order + # We have to place our image at MX8M_ATF_BL33_BASE_ADDR in order # to be able to initialize ATF firmware since that's where it # expects entry point to BL33 would be # - set MX8MQ_ATF_BL33_BASE_ADDR 0x40200000 + set MX8M_ATF_BL33_BASE_ADDR 0x40200000 echo "Bootstrap: Loading Barebox" - load_image images/start_zii_imx8mq_dev.pblb $MX8MQ_ATF_BL33_BASE_ADDR bin - echo [format "Bootstrap: Jumping to 0x%08x" $MX8MQ_ATF_BL33_BASE_ADDR] - resume $MX8MQ_ATF_BL33_BASE_ADDR + load_image images/start_zii_imx8mq_dev.pblb $MX8M_ATF_BL33_BASE_ADDR bin + echo [format "Bootstrap: Jumping to 0x%08x" $MX8M_ATF_BL33_BASE_ADDR] + resume $MX8M_ATF_BL33_BASE_ADDR } proc board_init { } { |