diff options
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/boards/am335x.rst | 42 | ||||
| -rw-r--r-- | Documentation/boards/imx/Karo-TX6 | 13 | ||||
| -rw-r--r-- | Documentation/boards/omap.rst | 4 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/firmware/altr,passive-serial.txt | 24 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/firmware/altr,socfpga-fpga-mgr.txt | 19 | ||||
| -rw-r--r-- | Documentation/user/barebox.rst | 2 |
6 files changed, 102 insertions, 2 deletions
diff --git a/Documentation/boards/am335x.rst b/Documentation/boards/am335x.rst new file mode 100644 index 0000000000..7959b84c8d --- /dev/null +++ b/Documentation/boards/am335x.rst @@ -0,0 +1,42 @@ +Texas Instruments AM335x +======================== + +The Texas Instruments AM335x SoCs have a two-stage boot process. The first stage +loader, also known as MLO is loaded by the ROM code. The MLO loads the second stage +loader from the same medium. + +Building barebox +---------------- + +The TI AM335x boards in barebox are covered by the ``am335x_mlo_defconfig`` +for the MLO and ``am335x_defconfig`` for the regular barebox image. The +resulting images will be placed under ``images/``: + +:: + barebox-am33xx-afi-gf.img + barebox-am33xx-afi-gf-mlo.img + barebox-am33xx-beaglebone.img + barebox-am33xx-beaglebone-mlo.img + barebox-am33xx-phytec-phycore.img + barebox-am33xx-phytec-phycore-mlo-1x128m16.img + barebox-am33xx-phytec-phycore-mlo-1x256m16.img + barebox-am33xx-phytec-phycore-mlo-1x512m16.img + +Some boards come in different variants, make sure to pick the correct one. + +Starting and updating barebox +----------------------------- + +SPI NOR and NAND +^^^^^^^^^^^^^^^^ + +The regular board images can be started from another bootloader, see +:ref:`second_stage`. The board should provide update handlers +to update (or initially install) barebox on SPI NOR or NAND, see :ref:`update`. + +SD/MMC +^^^^^^ + +To start barebox from SD/MMC prepare a card with a FAT filesystem. Copy the MLO +file for your board to the card and name it ``MLO``. Copy the regular image +for your board to the card and name it ``barebox.bin``. diff --git a/Documentation/boards/imx/Karo-TX6 b/Documentation/boards/imx/Karo-TX6 new file mode 100644 index 0000000000..8dd26b5964 --- /dev/null +++ b/Documentation/boards/imx/Karo-TX6 @@ -0,0 +1,13 @@ +KaRo TX6x +========= + +This CPU cards are based on a Freescale i.MX6 SoC. +There are currently six variants of this module, that are distinguished +by the suffix: 'Q' use an i.MX6Q and 'U' an i.MX6DL. + +The TX6U-801x modules are shipped with: + + * 128MiB NAND flash + * 1024MiB DDR3 SDRAM + +see http://www.karo-electronics.de/tx6.html for more information diff --git a/Documentation/boards/omap.rst b/Documentation/boards/omap.rst index 5038613335..c2697510c5 100644 --- a/Documentation/boards/omap.rst +++ b/Documentation/boards/omap.rst @@ -1,5 +1,5 @@ -Texas Instruments OMAP/AM335x -============================= +Texas Instruments OMAP +====================== Texas Instruments OMAP SoCs have a two-stage boot process. The first stage is known as Xload which only loads the second stage bootloader. barebox can act as diff --git a/Documentation/devicetree/bindings/firmware/altr,passive-serial.txt b/Documentation/devicetree/bindings/firmware/altr,passive-serial.txt new file mode 100644 index 0000000000..d357dd39cf --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/altr,passive-serial.txt @@ -0,0 +1,24 @@ +Altera FPGAs in passive serial mode +----------------------------------- + +This binding defines the control interface to Altera FPGAs in +passive serial mode. This is used to upload the firmware and +to start the FPGA. + +Required properties: +- compatible: shall be "altr,fpga-passive-serial" +- reg: SPI chip select +- nstat-gpios: Specify GPIO for controlling the nstat pin +- confd-gpios: Specify GPIO for controlling the confd pin +- nconfig-gpios: Specify GPIO for controlling the nconfig pin + +Example: + + fpga@0 { + compatible = "altr,fpga-passive-serial"; + nstat-gpios = <&gpio4 18 0>; + confd-gpios = <&gpio4 19 0>; + nconfig-gpios = <&gpio4 20 0>; + spi-max-frequency = <10000000>; + reg = <0>; + }; diff --git a/Documentation/devicetree/bindings/firmware/altr,socfpga-fpga-mgr.txt b/Documentation/devicetree/bindings/firmware/altr,socfpga-fpga-mgr.txt new file mode 100644 index 0000000000..70ec4abf25 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/altr,socfpga-fpga-mgr.txt @@ -0,0 +1,19 @@ +Altera SOCFPGA FPGA Manager +--------------------------- + +This binding defines the FPGA Manager on Altera SOCFPGAs. This is used to upload +the firmware to the FPGA part of the SoC. + +Required properties: +- compatible: shall be "altr,socfpga-fpga-mgr" +- reg: Must contain 2 register ranges: + 1. The control address space of the FPGA manager. + 2. The configuration data address space where the firmware data is written to. + +Example: + + fpgamgr@ff706000 { + compatible = "altr,socfpga-fpga-mgr"; + reg = <0xff706000 0x1000>, + <0xffb90000 0x1000>; + }; diff --git a/Documentation/user/barebox.rst b/Documentation/user/barebox.rst index caf544de9f..00ceabb925 100644 --- a/Documentation/user/barebox.rst +++ b/Documentation/user/barebox.rst @@ -171,6 +171,8 @@ the compilation process will finish with a list of images built under ``images/` barebox-guf-santaro.img barebox-gk802.img +.. _second_stage: + Starting barebox ----------------- |