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-rw-r--r--arch/arm/boards/a9m2440/lowlevel_init.S15
1 files changed, 7 insertions, 8 deletions
diff --git a/arch/arm/boards/a9m2440/lowlevel_init.S b/arch/arm/boards/a9m2440/lowlevel_init.S
index 305014cd51..da29efdc21 100644
--- a/arch/arm/boards/a9m2440/lowlevel_init.S
+++ b/arch/arm/boards/a9m2440/lowlevel_init.S
@@ -5,8 +5,9 @@
#include <config.h>
#include <mach/s3c-iomap.h>
#include <mach/s3c24xx-gpio.h>
+#include <asm/barebox-arm-head.h>
- .section ".text_bare_init.board_init_lowlevel","ax"
+ .section ".text_bare_init.reset","ax"
/*
* To be able to setup the SDRAM interface correctly, we need some
@@ -211,10 +212,10 @@ SDRAMDATA:
/* ------------------------------------------------------------------------ */
-.globl board_init_lowlevel
-board_init_lowlevel:
+.globl reset
+reset:
- mov r10, lr /* save the link register */
+ common_reset r0
bl s3c24x0_disable_wd
@@ -233,9 +234,7 @@ board_init_lowlevel:
bl sdram_init
#ifdef CONFIG_S3C_NAND_BOOT
- mov lr, r10 /* restore the link register */
/* up to here we are running from the internal SRAM area */
- b s3c24x0_nand_boot /* does return directly to our caller into SDRAM */
-#else
- mov pc, r10
+ bl s3c24x0_nand_boot
#endif
+ b board_init_lowlevel_return