diff options
Diffstat (limited to 'arch/arm/boards/beaglebone/lowlevel.c')
| -rw-r--r-- | arch/arm/boards/beaglebone/lowlevel.c | 32 |
1 files changed, 14 insertions, 18 deletions
diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c index 31211448f5..5dc49dfaaf 100644 --- a/arch/arm/boards/beaglebone/lowlevel.c +++ b/arch/arm/boards/beaglebone/lowlevel.c @@ -1,19 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-only + #include <init.h> #include <linux/sizes.h> #include <io.h> #include <linux/string.h> #include <debug_ll.h> +#include <mach/omap/debug_ll.h> #include <asm/barebox-arm-head.h> #include <asm/barebox-arm.h> -#include <mach/am33xx-silicon.h> -#include <mach/am33xx-clock.h> -#include <mach/generic.h> -#include <mach/sdrc.h> -#include <mach/sys_info.h> -#include <mach/syslib.h> -#include <mach/am33xx-mux.h> -#include <mach/am33xx-generic.h> -#include <mach/wdt.h> +#include <mach/omap/am33xx-silicon.h> +#include <mach/omap/am33xx-clock.h> +#include <mach/omap/generic.h> +#include <mach/omap/sdrc.h> +#include <mach/omap/sys_info.h> +#include <mach/omap/syslib.h> +#include <mach/omap/am33xx-mux.h> +#include <mach/omap/am33xx-generic.h> #include "beaglebone.h" @@ -116,17 +118,11 @@ static noinline int beaglebone_sram_init(void) else sdram_size = SZ_256M; - /* WDT1 is already running when the bootloader gets control - * Disable it to avoid "random" resets - */ - __raw_writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR)); - while(__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0); - __raw_writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR)); - while(__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0); + omap_watchdog_disable(IOMEM(AM33XX_WDT_BASE)); /* Setup the PLLs and the clocks for the peripherals */ if (is_beaglebone_black()) { - am33xx_pll_init(MPUPLL_M_800, DDRPLL_M_400); + am33xx_pll_init(MPUPLL_M_500, DDRPLL_M_400); am335x_sdram_init(0x18B, &ddr3_cmd_ctrl, &ddr3_regs, &ddr3_data); } else { @@ -137,7 +133,7 @@ static noinline int beaglebone_sram_init(void) am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE); am33xx_enable_uart0_pin_mux(); - omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE); + omap_debug_ll_init(); putc_ll('>'); barebox_arm_entry(0x80000000, sdram_size, fdt); |