diff options
Diffstat (limited to 'arch/arm/boards/eukrea_cpuimx35/lowlevel.c')
| -rw-r--r-- | arch/arm/boards/eukrea_cpuimx35/lowlevel.c | 43 |
1 files changed, 21 insertions, 22 deletions
diff --git a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c index ea932f773e..052333503d 100644 --- a/arch/arm/boards/eukrea_cpuimx35/lowlevel.c +++ b/arch/arm/boards/eukrea_cpuimx35/lowlevel.c @@ -18,7 +18,7 @@ */ #include <common.h> #include <init.h> -#include <mach/imx-regs.h> +#include <mach/imx35-regs.h> #include <mach/imx-pll.h> #include <mach/esdctl.h> #include <asm/cache-l2x0.h> @@ -41,14 +41,13 @@ static void __bare_init __naked insdram(void) uint32_t r; /* Speed up NAND controller by adjusting the NFC divider */ - r = readl(MX35_CCM_BASE_ADDR + CCM_PDR4); + r = readl(MX35_CCM_BASE_ADDR + MX35_CCM_PDR4); r &= ~(0xf << 28); r |= 0x1 << 28; - writel(r, MX35_CCM_BASE_ADDR + CCM_PDR4); + writel(r, MX35_CCM_BASE_ADDR + MX35_CCM_PDR4); /* setup a stack to be able to call imx_nand_load_image() */ - r = STACK_BASE + STACK_SIZE - 12; - __asm__ __volatile__("mov sp, %0" : : "r"(r)); + arm_setup_stack(STACK_BASE + STACK_SIZE - 12); imx_nand_load_image(_text, barebox_image_size); @@ -106,27 +105,27 @@ void __bare_init __naked reset(void) * End of ARM1136 init */ - writel(0x003F4208, ccm_base + CCM_CCMR); + writel(0x003F4208, ccm_base + MX35_CCM_CCMR); /* Set MPLL , arm clock and ahb clock*/ - writel(MPCTL_PARAM_532, ccm_base + CCM_MPCTL); + writel(MPCTL_PARAM_532, ccm_base + MX35_CCM_MPCTL); - writel(PPCTL_PARAM_300, ccm_base + CCM_PPCTL); - writel(0x00001000, ccm_base + CCM_PDR0); + writel(PPCTL_PARAM_300, ccm_base + MX35_CCM_PPCTL); + writel(0x00001000, ccm_base + MX35_CCM_PDR0); - r = readl(ccm_base + CCM_CGR0); + r = readl(ccm_base + MX35_CCM_CGR0); r |= 0x00300000; - writel(r, ccm_base + CCM_CGR0); + writel(r, ccm_base + MX35_CCM_CGR0); - r = readl(ccm_base + CCM_CGR1); + r = readl(ccm_base + MX35_CCM_CGR1); r |= 0x00030C00; r |= 0x00000003; - writel(r, ccm_base + CCM_CGR1); + writel(r, ccm_base + MX35_CCM_CGR1); /* enable watchdog asap */ - r = readl(ccm_base + CCM_CGR2); + r = readl(ccm_base + MX35_CCM_CGR2); r |= 0x03000000; - writel(r, ccm_base + CCM_CGR2); + writel(r, ccm_base + MX35_CCM_CGR2); r = readl(MX35_L2CC_BASE_ADDR + L2X0_AUX_CTRL); r |= 0x1000; @@ -138,22 +137,22 @@ void __bare_init __naked reset(void) board_init_lowlevel_return(); /* Init Mobile DDR */ - writel(0x0000000E, ESDMISC); - writel(0x00000004, ESDMISC); + writel(0x0000000E, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); + writel(0x00000004, MX35_ESDCTL_BASE_ADDR + IMX_ESDMISC); __asm__ volatile ("1:\n" "subs %0, %1, #1\n" "bne 1b":"=r" (loops):"0" (loops)); - writel(0x0009572B, ESDCFG0); - writel(0x92220000, ESDCTL0); + writel(0x0009572B, MX35_ESDCTL_BASE_ADDR + IMX_ESDCFG0); + writel(0x92220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); writeb(0xda, MX35_CSD0_BASE_ADDR + 0x400); - writel(0xA2220000, ESDCTL0); + writel(0xA2220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); writeb(0xda, MX35_CSD0_BASE_ADDR); writeb(0xda, MX35_CSD0_BASE_ADDR); - writel(0xB2220000, ESDCTL0); + writel(0xB2220000, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); writeb(0xda, MX35_CSD0_BASE_ADDR + 0x33); writeb(0xda, MX35_CSD0_BASE_ADDR + 0x2000000); - writel(0x82228080, ESDCTL0); + writel(0x82228080, MX35_ESDCTL_BASE_ADDR + IMX_ESDCTL0); #ifdef CONFIG_NAND_IMX_BOOT /* skip NAND boot if not running from NFC space */ |