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-rw-r--r--arch/arm/boards/freescale-mx6-sabresd/board.c22
-rw-r--r--arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6dl-sabresd.imxcfg104
-rw-r--r--arch/arm/boards/freescale-mx6-sabresd/lowlevel.c21
3 files changed, 134 insertions, 13 deletions
diff --git a/arch/arm/boards/freescale-mx6-sabresd/board.c b/arch/arm/boards/freescale-mx6-sabresd/board.c
index 82da8bb1dd..1db52736f9 100644
--- a/arch/arm/boards/freescale-mx6-sabresd/board.c
+++ b/arch/arm/boards/freescale-mx6-sabresd/board.c
@@ -10,22 +10,20 @@
#include <common.h>
#include <init.h>
#include <environment.h>
-#include <mach/imx6-regs.h>
+#include <mach/imx/imx6-regs.h>
#include <asm/armlinux.h>
-#include <generated/mach-types.h>
-#include <partition.h>
+#include <asm/mach-types.h>
#include <linux/phy.h>
#include <asm/io.h>
#include <asm/mmu.h>
-#include <mach/generic.h>
+#include <mach/imx/generic.h>
#include <linux/sizes.h>
#include <net.h>
-#include <mach/imx6.h>
-#include <mach/devices-imx6.h>
-#include <mach/iomux-mx6.h>
+#include <mach/imx/imx6.h>
+#include <mach/imx/iomux-mx6.h>
#include <spi/spi.h>
-#include <mach/spi.h>
-#include <mach/usb.h>
+#include <mach/imx/spi.h>
+#include <mach/imx/usb.h>
#define PHY_ID_AR8031 0x004dd074
#define AR_PHY_ID_MASK 0xffffffff
@@ -56,7 +54,8 @@ static int ar8031_phy_fixup(struct phy_device *dev)
static int sabresd_devices_init(void)
{
if (!of_machine_is_compatible("fsl,imx6q-sabresd") &&
- !of_machine_is_compatible("fsl,imx6qp-sabresd"))
+ !of_machine_is_compatible("fsl,imx6qp-sabresd") &&
+ !of_machine_is_compatible("fsl,imx6dl-sabresd"))
return 0;
armlinux_set_architecture(3980);
@@ -69,7 +68,8 @@ device_initcall(sabresd_devices_init);
static int sabresd_coredevices_init(void)
{
if (!of_machine_is_compatible("fsl,imx6q-sabresd") &&
- !of_machine_is_compatible("fsl,imx6qp-sabresd"))
+ !of_machine_is_compatible("fsl,imx6qp-sabresd") &&
+ !of_machine_is_compatible("fsl,imx6dl-sabresd"))
return 0;
phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK,
diff --git a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6dl-sabresd.imxcfg b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6dl-sabresd.imxcfg
new file mode 100644
index 0000000000..303b62ce4f
--- /dev/null
+++ b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6dl-sabresd.imxcfg
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+loadaddr 0x10000000
+soc imx6
+ivtofs 0x400
+wm 32 0x020e0774 0x000C0000
+wm 32 0x020e0754 0x00000000
+wm 32 0x020e04ac 0x00000030
+wm 32 0x020e04b0 0x00000030
+wm 32 0x020e0464 0x00000030
+wm 32 0x020e0490 0x00000030
+wm 32 0x020e074c 0x00000030
+wm 32 0x020e0494 0x00000030
+wm 32 0x020e04a0 0x00000000
+wm 32 0x020e04b4 0x00000030
+wm 32 0x020e04b8 0x00000030
+wm 32 0x020e076c 0x00000030
+wm 32 0x020e0750 0x00020000
+wm 32 0x020e04bc 0x00000030
+wm 32 0x020e04c0 0x00000030
+wm 32 0x020e04c4 0x00000030
+wm 32 0x020e04c8 0x00000030
+wm 32 0x020e04cc 0x00000030
+wm 32 0x020e04d0 0x00000030
+wm 32 0x020e04d4 0x00000030
+wm 32 0x020e04d8 0x00000030
+wm 32 0x020e0760 0x00020000
+wm 32 0x020e0764 0x00000030
+wm 32 0x020e0770 0x00000030
+wm 32 0x020e0778 0x00000030
+wm 32 0x020e077c 0x00000030
+wm 32 0x020e0780 0x00000030
+wm 32 0x020e0784 0x00000030
+wm 32 0x020e078c 0x00000030
+wm 32 0x020e0748 0x00000030
+wm 32 0x020e0470 0x00000030
+wm 32 0x020e0474 0x00000030
+wm 32 0x020e0478 0x00000030
+wm 32 0x020e047c 0x00000030
+wm 32 0x020e0480 0x00000030
+wm 32 0x020e0484 0x00000030
+wm 32 0x020e0488 0x00000030
+wm 32 0x020e048c 0x00000030
+wm 32 0x021b0800 0xa1390003
+wm 32 0x021b080c 0x001F001F
+wm 32 0x021b0810 0x001F001F
+wm 32 0x021b480c 0x001F001F
+wm 32 0x021b4810 0x001F001F
+wm 32 0x021b083c 0x4220021F
+wm 32 0x021b0840 0x0207017E
+wm 32 0x021b483c 0x4201020C
+wm 32 0x021b4840 0x01660172
+wm 32 0x021b0848 0x4A4D4E4D
+wm 32 0x021b4848 0x4A4F5049
+wm 32 0x021b0850 0x3F3C3D31
+wm 32 0x021b4850 0x3238372B
+wm 32 0x021b081c 0x33333333
+wm 32 0x021b0820 0x33333333
+wm 32 0x021b0824 0x33333333
+wm 32 0x021b0828 0x33333333
+wm 32 0x021b481c 0x33333333
+wm 32 0x021b4820 0x33333333
+wm 32 0x021b4824 0x33333333
+wm 32 0x021b4828 0x33333333
+wm 32 0x021b08b8 0x00000800
+wm 32 0x021b48b8 0x00000800
+wm 32 0x021b0004 0x0002002D
+wm 32 0x021b0008 0x00333030
+wm 32 0x021b000c 0x3F435313
+wm 32 0x021b0010 0xB66E8B63
+wm 32 0x021b0014 0x01FF00DB
+wm 32 0x021b0018 0x00001740
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b002c 0x000026d2
+wm 32 0x021b0030 0x00431023
+wm 32 0x021b0040 0x00000027
+wm 32 0x021b0000 0x831A0000
+wm 32 0x021b001c 0x04008032
+wm 32 0x021b001c 0x00008033
+wm 32 0x021b001c 0x00048031
+wm 32 0x021b001c 0x05208030
+wm 32 0x021b001c 0x04008040
+wm 32 0x021b0020 0x00005800
+wm 32 0x021b0818 0x00011117
+wm 32 0x021b4818 0x00011117
+wm 32 0x021b0004 0x0002556D
+wm 32 0x021b0404 0x00011006
+wm 32 0x021b001c 0x00000000
+
+/* set the default clock gate to save power */
+wm 32 0x020c4068 0x00C03F3F
+wm 32 0x020c406c 0x0030FC03
+wm 32 0x020c4070 0x0FFFF000
+wm 32 0x020c4074 0x3FF00000
+wm 32 0x020c4078 0x00FFF300
+wm 32 0x020c407c 0x0F0000C3
+wm 32 0x020c4080 0x000003FF
+
+/* enable AXI cache for VDOA/VPU/IPU */
+wm 32 0x020e0010 0xF00000CF
+
+/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+wm 32 0x020e0018 0x007F007F
+wm 32 0x020e001c 0x007F007F
diff --git a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c
index d902dbeafb..7cc08b47d5 100644
--- a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c
+++ b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c
@@ -1,10 +1,11 @@
// SPDX-License-Identifier: GPL-2.0-only
#include <debug_ll.h>
+#include <mach/imx/debug_ll.h>
#include <common.h>
#include <linux/sizes.h>
-#include <mach/generic.h>
-#include <mach/iomux-mx6.h>
+#include <mach/imx/generic.h>
+#include <mach/imx/iomux-mx6.h>
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
@@ -53,3 +54,19 @@ ENTRY_FUNCTION(start_imx6qp_sabresd, r0, r1, r2)
barebox_arm_entry(0x10000000, SZ_1G, fdt);
}
+
+extern char __dtb_imx6dl_sabresd_start[];
+
+ENTRY_FUNCTION(start_imx6dl_sabresd, r0, r1, r2)
+{
+ void *fdt;
+
+ imx6_cpu_lowlevel_init();
+
+ if (IS_ENABLED(CONFIG_DEBUG_LL))
+ setup_uart();
+
+ fdt = __dtb_imx6dl_sabresd_start + get_runtime_offset();
+
+ barebox_arm_entry(0x10000000, SZ_1G, fdt);
+}