diff options
Diffstat (limited to 'arch/arm/boards/guf-cupid/board.c')
| -rw-r--r-- | arch/arm/boards/guf-cupid/board.c | 355 |
1 files changed, 0 insertions, 355 deletions
diff --git a/arch/arm/boards/guf-cupid/board.c b/arch/arm/boards/guf-cupid/board.c deleted file mode 100644 index a02cecf6c5..0000000000 --- a/arch/arm/boards/guf-cupid/board.c +++ /dev/null @@ -1,355 +0,0 @@ -/* - * (C) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> - * (C) 2009 Pengutronix, Juergen Beisert <kernel@pengutronix.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * Board support for the Garz+Fricke Cupid board - */ - -#include <common.h> -#include <command.h> -#include <init.h> -#include <driver.h> -#include <environment.h> -#include <fs.h> -#include <envfs.h> -#include <mach/imx35-regs.h> -#include <asm/armlinux.h> -#include <io.h> -#include <gpio.h> -#include <partition.h> -#include <nand.h> -#include <generated/mach-types.h> -#include <mach/imx-nand.h> -#include <platform_data/eth-fec.h> -#include <fb.h> -#include <asm/mmu.h> -#include <mach/weim.h> -#include <mach/imx-ipu-fb.h> -#include <mach/imx-pll.h> -#include <mach/iomux-mx35.h> -#include <mach/devices-imx35.h> - -static struct fec_platform_data fec_info = { - .xcv_type = PHY_INTERFACE_MODE_MII, -}; - -struct imx_nand_platform_data nand_info = { - .width = 1, - .hw_ecc = 1, - .flash_bbt = 1, -}; - -static struct fb_videomode guf_cupid_fb_mode = { - /* 800x480 @ 70 Hz */ - .name = "CPT CLAA070LC0JCT", - .refresh = 70, - .xres = 800, - .yres = 480, - .pixclock = 30761, - .left_margin = 24, - .right_margin = 47, - .upper_margin = 5, - .lower_margin = 3, - .hsync_len = 24, - .vsync_len = 3, - .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_CLK_INVERT | - FB_SYNC_OE_ACT_HIGH, - .vmode = FB_VMODE_NONINTERLACED, -}; - -#define GPIO_LCD_ENABLE (2 * 32 + 24) -#define GPIO_LCD_BACKLIGHT (0 * 32 + 19) - -static void cupid_fb_enable(int enable) -{ - if (enable) { - gpio_direction_output(GPIO_LCD_ENABLE, 1); - mdelay(100); - gpio_direction_output(GPIO_LCD_BACKLIGHT, 1); - } else { - gpio_direction_output(GPIO_LCD_BACKLIGHT, 0); - mdelay(100); - gpio_direction_output(GPIO_LCD_ENABLE, 0); - } -} - -static struct imx_ipu_fb_platform_data ipu_fb_data = { - .mode = &guf_cupid_fb_mode, - .num_modes = 1, - .bpp = 16, - .enable = cupid_fb_enable, -}; - -static int cupid_mmu_init(void) -{ - l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000); - - return 0; -} -postmmu_initcall(cupid_mmu_init); - -static int cupid_devices_init(void) -{ - uint32_t reg; - - gpio_direction_output(GPIO_LCD_ENABLE, 0); - gpio_direction_output(GPIO_LCD_BACKLIGHT, 0); - - reg = readl(MX35_CCM_BASE_ADDR + MX35_CCM_RCSR); - /* some fuses provide us vital information about connected hardware */ - if (reg & 0x20000000) - nand_info.width = 2; /* 16 bit */ - else - nand_info.width = 1; /* 8 bit */ - - imx35_add_fec(&fec_info); - imx35_add_nand(&nand_info); - - devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw"); - dev_add_bb_dev("self_raw", "self0"); - devfs_add_partition("nand0", 0x40000, 0x80000, DEVFS_PARTITION_FIXED, "env_raw"); - dev_add_bb_dev("env_raw", "env0"); - - imx35_add_fb(&ipu_fb_data); - imx35_add_mmc0(NULL); - - armlinux_set_architecture(MACH_TYPE_GUF_CUPID); - - if (IS_ENABLED(CONFIG_DEFAULT_ENVIRONMENT_GENERIC)) - defaultenv_append_directory(defaultenv_guf_cupid); - - return 0; -} - -device_initcall(cupid_devices_init); - -static iomux_v3_cfg_t cupid_pads[] = { - /* UART1 */ - MX35_PAD_CTS1__UART1_CTS, - MX35_PAD_RTS1__UART1_RTS, - MX35_PAD_TXD1__UART1_TXD_MUX, - MX35_PAD_RXD1__UART1_RXD_MUX, - /* UART2 */ - MX35_PAD_CTS2__UART2_CTS, - MX35_PAD_RTS2__UART2_RTS, - MX35_PAD_TXD2__UART2_TXD_MUX, - MX35_PAD_RXD2__UART2_RXD_MUX, - /* FEC */ - MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, - MX35_PAD_FEC_RX_CLK__FEC_RX_CLK, - MX35_PAD_FEC_RX_DV__FEC_RX_DV, - MX35_PAD_FEC_COL__FEC_COL, - MX35_PAD_FEC_RDATA0__FEC_RDATA_0, - MX35_PAD_FEC_TDATA0__FEC_TDATA_0, - MX35_PAD_FEC_TX_EN__FEC_TX_EN, - MX35_PAD_FEC_MDC__FEC_MDC, - MX35_PAD_FEC_MDIO__FEC_MDIO, - MX35_PAD_FEC_TX_ERR__FEC_TX_ERR, - MX35_PAD_FEC_RX_ERR__FEC_RX_ERR, - MX35_PAD_FEC_CRS__FEC_CRS, - MX35_PAD_FEC_RDATA1__FEC_RDATA_1, - MX35_PAD_FEC_TDATA1__FEC_TDATA_1, - MX35_PAD_FEC_RDATA2__FEC_RDATA_2, - MX35_PAD_FEC_TDATA2__FEC_TDATA_2, - MX35_PAD_FEC_RDATA3__FEC_RDATA_3, - MX35_PAD_FEC_TDATA3__FEC_TDATA_3, - /* I2C1 */ - MX35_PAD_I2C1_CLK__I2C1_SCL, - MX35_PAD_I2C1_DAT__I2C1_SDA, - /* Display */ - MX35_PAD_LD0__IPU_DISPB_DAT_0, - MX35_PAD_LD1__IPU_DISPB_DAT_1, - MX35_PAD_LD2__IPU_DISPB_DAT_2, - MX35_PAD_LD3__IPU_DISPB_DAT_3, - MX35_PAD_LD4__IPU_DISPB_DAT_4, - MX35_PAD_LD5__IPU_DISPB_DAT_5, - MX35_PAD_LD6__IPU_DISPB_DAT_6, - MX35_PAD_LD7__IPU_DISPB_DAT_7, - MX35_PAD_LD8__IPU_DISPB_DAT_8, - MX35_PAD_LD9__IPU_DISPB_DAT_9, - MX35_PAD_LD10__IPU_DISPB_DAT_10, - MX35_PAD_LD11__IPU_DISPB_DAT_11, - MX35_PAD_LD12__IPU_DISPB_DAT_12, - MX35_PAD_LD13__IPU_DISPB_DAT_13, - MX35_PAD_LD14__IPU_DISPB_DAT_14, - MX35_PAD_LD15__IPU_DISPB_DAT_15, - MX35_PAD_LD16__IPU_DISPB_DAT_16, - MX35_PAD_LD17__IPU_DISPB_DAT_17, - MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC, - MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK, - MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY, - MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC, - MX35_PAD_LD18__GPIO3_24, /* LCD enable */ - MX35_PAD_CSPI1_SS1__GPIO1_19, /* LCD backligtht PWM */ - /* USB Host*/ - MX35_PAD_MLB_CLK__GPIO3_3, /* USB Host PWR */ - MX35_PAD_MLB_DAT__GPIO3_4, /* USB Host Overcurrent */ - /* USB OTG */ - MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR, - MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC, - /* SSI */ - MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS, - MX35_PAD_STXD4__AUDMUX_AUD4_TXD, - MX35_PAD_SRXD4__AUDMUX_AUD4_RXD, - MX35_PAD_SCK4__AUDMUX_AUD4_TXC, - /* UCB1400 IRQ */ - MX35_PAD_ATA_INTRQ__GPIO2_29, - /* Speaker On */ - MX35_PAD_LD20__GPIO3_26, - /* LEDs */ - MX35_PAD_TX1__GPIO1_14, - /* ESDHC1 */ - MX35_PAD_SD1_CMD__ESDHC1_CMD, - MX35_PAD_SD1_CLK__ESDHC1_CLK, - MX35_PAD_SD1_DATA0__ESDHC1_DAT0, - MX35_PAD_SD1_DATA1__ESDHC1_DAT1, - MX35_PAD_SD1_DATA2__ESDHC1_DAT2, - MX35_PAD_SD1_DATA3__ESDHC1_DAT3, - /* ESDHC1 CD */ - MX35_PAD_ATA_DATA5__GPIO2_18, - /* ESDHC1 WP */ - MX35_PAD_ATA_DATA6__GPIO2_19, -}; - -static int cupid_console_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(cupid_pads, ARRAY_SIZE(cupid_pads)); - - barebox_set_model("Garz & Fricke CUPID"); - barebox_set_hostname("cupid"); - - imx35_add_uart0(); - - return 0; -} - -console_initcall(cupid_console_init); - -static int cupid_core_setup(void) -{ - u32 tmp; - - /* AIPS setup - Only setup MPROTx registers. The PACR default values are good.*/ - /* - * Set all MPROTx to be non-bufferable, trusted for R/W, - * not forced to user-mode. - */ - writel(0x77777777, MX35_AIPS1_BASE_ADDR); - writel(0x77777777, MX35_AIPS1_BASE_ADDR + 0x4); - writel(0x77777777, MX35_AIPS2_BASE_ADDR); - writel(0x77777777, MX35_AIPS2_BASE_ADDR + 0x4); - - /* - * Clear the on and off peripheral modules Supervisor Protect bit - * for SDMA to access them. Did not change the AIPS control registers - * (offset 0x20) access type - */ - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS1_BASE_ADDR + 0x4C); - tmp = readl(MX35_AIPS1_BASE_ADDR + 0x50); - tmp &= 0x00FFFFFF; - writel(tmp, MX35_AIPS1_BASE_ADDR + 0x50); - - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x40); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x44); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x48); - writel(0x0, MX35_AIPS2_BASE_ADDR + 0x4C); - tmp = readl(MX35_AIPS2_BASE_ADDR + 0x50); - tmp &= 0x00FFFFFF; - writel(tmp, MX35_AIPS2_BASE_ADDR + 0x50); - - /* MAX (Multi-Layer AHB Crossbar Switch) setup */ - - /* MPR - priority is M4 > M2 > M3 > M5 > M0 > M1 */ -#define MAX_PARAM1 0x00302154 - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x0); /* for S0 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x100); /* for S1 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x200); /* for S2 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x300); /* for S3 */ - writel(MAX_PARAM1, MX35_MAX_BASE_ADDR + 0x400); /* for S4 */ - - /* SGPCR - always park on last master */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x10); /* for S0 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x110); /* for S1 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x210); /* for S2 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x310); /* for S3 */ - writel(0x10, MX35_MAX_BASE_ADDR + 0x410); /* for S4 */ - - /* MGPCR - restore default values */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x800); /* for M0 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0x900); /* for M1 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xa00); /* for M2 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xb00); /* for M3 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xc00); /* for M4 */ - writel(0x0, MX35_MAX_BASE_ADDR + 0xd00); /* for M5 */ - - /* CS0: NOR Flash */ - imx35_setup_weimcs(0, 0x0000DCF6, 0x444A4541, 0x44443302); - - /* - * M3IF Control Register (M3IFCTL) - * MRRP[0] = L2CC0 not on priority list (0 << 0) = 0x00000000 - * MRRP[1] = MAX1 not on priority list (0 << 0) = 0x00000000 - * MRRP[2] = L2CC1 not on priority list (0 << 0) = 0x00000000 - * MRRP[3] = USB not on priority list (0 << 0) = 0x00000000 - * MRRP[4] = SDMA not on priority list (0 << 0) = 0x00000000 - * MRRP[5] = GPU not on priority list (0 << 0) = 0x00000000 - * MRRP[6] = IPU1 on priority list (1 << 6) = 0x00000040 - * MRRP[7] = IPU2 not on priority list (0 << 0) = 0x00000000 - * ------------ - * 0x00000040 - */ - writel(0x40, MX35_M3IF_BASE_ADDR); - - return 0; -} - -core_initcall(cupid_core_setup); - -static int do_cpufreq(int argc, char *argv[]) -{ - unsigned long freq; - - if (argc != 2) - return COMMAND_ERROR_USAGE; - - freq = simple_strtoul(argv[1], NULL, 0); - - switch (freq) { - case 399: - writel(MPCTL_PARAM_399, MX35_CCM_BASE_ADDR + MX35_CCM_MPCTL); - break; - case 532: - writel(MPCTL_PARAM_532, MX35_CCM_BASE_ADDR + MX35_CCM_MPCTL); - break; - default: - return COMMAND_ERROR_USAGE; - } - - printf("Switched CPU frequency to %luMHz\n", freq); - - return 0; -} - -BAREBOX_CMD_START(cpufreq) - .cmd = do_cpufreq, - BAREBOX_CMD_DESC("adjust CPU frequency") - BAREBOX_CMD_OPTS("399|532") - BAREBOX_CMD_GROUP(CMD_GRP_HWMANIP) -BAREBOX_CMD_END |