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-rw-r--r--arch/arm/boards/imx21ads/Makefile2
-rw-r--r--arch/arm/boards/imx21ads/config.h26
-rw-r--r--arch/arm/boards/imx21ads/env/bin/init1
-rw-r--r--arch/arm/boards/imx21ads/imx21ads.c243
-rw-r--r--arch/arm/boards/imx21ads/imx21ads.dox5
-rw-r--r--arch/arm/boards/imx21ads/lowlevel_init.S164
6 files changed, 441 insertions, 0 deletions
diff --git a/arch/arm/boards/imx21ads/Makefile b/arch/arm/boards/imx21ads/Makefile
new file mode 100644
index 0000000000..7993fdef8a
--- /dev/null
+++ b/arch/arm/boards/imx21ads/Makefile
@@ -0,0 +1,2 @@
+obj-y += lowlevel_init.o
+obj-y += imx21ads.o
diff --git a/arch/arm/boards/imx21ads/config.h b/arch/arm/boards/imx21ads/config.h
new file mode 100644
index 0000000000..edfb29ffb0
--- /dev/null
+++ b/arch/arm/boards/imx21ads/config.h
@@ -0,0 +1,26 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/**
+ * @file
+ * @brief Global defintions for the ARM i.MX21 based imx21ads
+ **/
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#endif /* __CONFIG_H */
diff --git a/arch/arm/boards/imx21ads/env/bin/init b/arch/arm/boards/imx21ads/env/bin/init
new file mode 100644
index 0000000000..224a6b40be
--- /dev/null
+++ b/arch/arm/boards/imx21ads/env/bin/init
@@ -0,0 +1 @@
+# Dummy Init environment script
diff --git a/arch/arm/boards/imx21ads/imx21ads.c b/arch/arm/boards/imx21ads/imx21ads.c
new file mode 100644
index 0000000000..5e88af4fd8
--- /dev/null
+++ b/arch/arm/boards/imx21ads/imx21ads.c
@@ -0,0 +1,243 @@
+/*
+ * Copyright (C) 2009 Ivo Clarysse
+ *
+ * Based on imx27ads.c,
+ * Copyright (C) 2007 Sascha Hauer, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <net.h>
+#include <init.h>
+#include <environment.h>
+#include <mach/imx-regs.h>
+#include <asm/armlinux.h>
+#include <asm/io.h>
+#include <mach/gpio.h>
+#include <partition.h>
+#include <fs.h>
+#include <fcntl.h>
+#include <asm/mach-types.h>
+#include <mach/imx-nand.h>
+#include <mach/imxfb.h>
+#include <mach/iomux-mx21.h>
+
+#define MX21ADS_IO_REG 0xCC800000
+#define MX21ADS_IO_LCDON (1 << 9)
+
+static struct device_d cfi_dev = {
+ .name = "cfi_flash",
+ .map_base = 0xC8000000,
+ .size = 32 * 1024 * 1024,
+};
+
+static struct memory_platform_data ram_pdata = {
+ .name = "ram0",
+ .flags = DEVFS_RDWR,
+};
+
+static struct device_d sdram_dev = {
+ .name = "mem",
+ .map_base = 0xc0000000,
+ .size = 64 * 1024 * 1024,
+ .platform_data = &ram_pdata,
+};
+
+struct imx_nand_platform_data nand_info = {
+ .width = 1,
+ .hw_ecc = 1,
+};
+
+static struct device_d nand_dev = {
+ .name = "imx_nand",
+ .map_base = 0xDF003000,
+ .platform_data = &nand_info,
+};
+
+static struct device_d cs8900_dev = {
+ .name = "cs8900",
+ .map_base = IMX_CS1_BASE,
+ // IRQ is connected to UART3_RTS
+};
+
+/* Sharp LQ035Q7DB02 QVGA display */
+static struct imx_fb_videomode imx_fb_modedata = {
+ .mode = {
+ .name = "Sharp-LQ035Q7",
+ .refresh = 60,
+ .xres = 240,
+ .yres = 320,
+ .pixclock = 188679,
+ .left_margin = 6,
+ .right_margin = 16,
+ .upper_margin = 8,
+ .lower_margin = 10,
+ .hsync_len = 2,
+ .vsync_len = 1,
+ .sync = 0,
+ .vmode = FB_VMODE_NONINTERLACED,
+ .flag = 0,
+ },
+ .pcr = 0xfb108bc7,
+ .bpp = 16,
+};
+
+static struct imx_fb_platform_data imx_fb_data = {
+ .mode = &imx_fb_modedata,
+ .cmap_greyscale = 0,
+ .cmap_inverse = 0,
+ .cmap_static = 0,
+ .pwmr = 0x00a903ff,
+ .lscr1 = 0x00120300,
+ .dmacr = 0x00020008,
+};
+
+static struct device_d imxfb_dev = {
+ .name = "imxfb",
+ .map_base = 0x10021000,
+ .size = 0x1000,
+ .platform_data = &imx_fb_data,
+};
+
+static int imx21ads_timing_init(void)
+{
+ u32 temp;
+
+ /* Configure External Interface Module */
+ /* CS0: burst flash */
+ CS0U = 0x00003E00;
+ CS0L = 0x00000E01;
+
+ /* CS1: Ethernet controller, external UART, memory-mapped I/O (16-bit) */
+ CS1U = 0x00002000;
+ CS1L = 0x11118501;
+
+ /* CS2: disable (not available, since CSD0 in use) */
+ CS2U = 0x0;
+ CS2L = 0x0;
+
+ /* CS3: disable */
+ CS3U = 0x0;
+ CS3L = 0x0;
+ /* CS4: disable */
+ CS4U = 0x0;
+ CS4L = 0x0;
+ /* CS5: disable */
+ CS5U = 0x0;
+ CS5L = 0x0;
+
+ temp = PCDR0;
+ temp &= ~0xF000;
+ temp |= 0xA000; /* Set NFC divider; 0xA yields 24.18MHz */
+ PCDR0 = temp;
+
+ return 0;
+}
+
+core_initcall(imx21ads_timing_init);
+
+static int mx21ads_devices_init(void)
+{
+ int i;
+ unsigned int mode[] = {
+ PA5_PF_LSCLK,
+ PA6_PF_LD0,
+ PA7_PF_LD1,
+ PA8_PF_LD2,
+ PA9_PF_LD3,
+ PA10_PF_LD4,
+ PA11_PF_LD5,
+ PA12_PF_LD6,
+ PA13_PF_LD7,
+ PA14_PF_LD8,
+ PA15_PF_LD9,
+ PA16_PF_LD10,
+ PA17_PF_LD11,
+ PA18_PF_LD12,
+ PA19_PF_LD13,
+ PA20_PF_LD14,
+ PA21_PF_LD15,
+ PA22_PF_LD16,
+ PA23_PF_LD17,
+ PA24_PF_REV,
+ PA25_PF_CLS,
+ PA26_PF_PS,
+ PA27_PF_SPL_SPR,
+ PA28_PF_HSYNC,
+ PA29_PF_VSYNC,
+ PA30_PF_CONTRAST,
+ PA31_PF_OE_ACD,
+ PE12_PF_UART1_TXD,
+ PE13_PF_UART1_RXD,
+ PE14_PF_UART1_CTS,
+ PE15_PF_UART1_RTS,
+ };
+
+ /* initizalize gpios */
+ for (i = 0; i < ARRAY_SIZE(mode); i++)
+ imx_gpio_mode(mode[i]);
+
+ register_device(&cfi_dev);
+ register_device(&sdram_dev);
+ register_device(&nand_dev);
+ register_device(&cs8900_dev);
+ register_device(&imxfb_dev);
+
+ armlinux_add_dram(&sdram_dev);
+ armlinux_set_bootparams((void *)0xc0000100);
+ armlinux_set_architecture(MACH_TYPE_MX21ADS);
+
+ return 0;
+}
+
+device_initcall(mx21ads_devices_init);
+
+static int mx21ads_enable_display(void)
+{
+ u16 tmp;
+
+ tmp = readw(MX21ADS_IO_REG);
+ tmp |= MX21ADS_IO_LCDON;
+ writew(tmp, MX21ADS_IO_REG);
+ return 0;
+}
+
+late_initcall(mx21ads_enable_display);
+
+static struct device_d mx21ads_serial_device = {
+ .name = "imx_serial",
+ .map_base = IMX_UART1_BASE,
+ .size = 4096,
+};
+
+static int mx21ads_console_init(void)
+{
+ register_device(&mx21ads_serial_device);
+ return 0;
+}
+
+console_initcall(mx21ads_console_init);
+
+#ifdef CONFIG_NAND_IMX_BOOT
+void __bare_init nand_boot(void)
+{
+ PCCR0 |= PCCR0_NFC_EN;
+ imx_nand_load_image((void *)TEXT_BASE, 256 * 1024);
+}
+#endif
+
diff --git a/arch/arm/boards/imx21ads/imx21ads.dox b/arch/arm/boards/imx21ads/imx21ads.dox
new file mode 100644
index 0000000000..9f11ffaa6e
--- /dev/null
+++ b/arch/arm/boards/imx21ads/imx21ads.dox
@@ -0,0 +1,5 @@
+/** @page imx21ads Freescale i.MX21ads
+
+This is the Freescale evaluation board for the i.MX21 Processor
+
+*/
diff --git a/arch/arm/boards/imx21ads/lowlevel_init.S b/arch/arm/boards/imx21ads/lowlevel_init.S
new file mode 100644
index 0000000000..607da27476
--- /dev/null
+++ b/arch/arm/boards/imx21ads/lowlevel_init.S
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2010 Jaccon Bastiaansen <jaccon.bastiaansen@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <mach/imx-regs.h>
+
+ .section ".text_bare_init","ax"
+
+.globl board_init_lowlevel
+board_init_lowlevel:
+
+/* Save lr, because it is overwritten by the calls to mem_delay. */
+ mov r10, lr
+
+/*
+ * Initialize the AHB-Lite IP Interface (AIPI) module (to enable access to
+ * on chip peripherals) as described in section 7.2 of rev3 of the i.MX21
+ * reference manual.
+ */
+ ldr r0, =AIPI1_PSR0
+ ldr r1, =0x00040304
+ str r1, [r0]
+ ldr r0, =AIPI1_PSR1
+ ldr r1, =0xfffbfcfb
+ str r1, [r0]
+
+ ldr r0, =AIPI2_PSR0
+ ldr r1, =0x3ffc0000
+ str r1, [r0]
+ ldr r0, =AIPI2_PSR1
+ ldr r1, =0xffffffff
+ str r1, [r0]
+
+/*
+ * Configure CPU core clock (266MHz), peripheral clock (133MHz) and enable
+ * the clock to peripherals.
+ */
+ ldr r0, =CSCR
+ ldr r1, =0x17180607
+ str r1, [r0]
+
+ ldr r0, =PCCR1
+ ldr r1, =0x0e000000
+ str r1, [r0]
+
+
+/*
+ * SDRAM and SDRAM controller configuration
+ */
+
+ /*
+ * CSD1 not required, because the MX21ADS board only contains 64Mbyte.
+ * CS3 can therefore be made available.
+ */
+ ldr r0, =FMCR
+ ldr r1, =0xffffffc9
+ str r1, [r0]
+
+ /* Skip SDRAM initialization if we run from RAM */
+ cmp pc, #0xc0000000
+ bls 1f
+ cmp pc, #0xc8000000
+ bhi 1f
+
+ mov pc, r10
+1:
+
+ /* Precharge */
+ ldr r0, =SDCTL0
+ ldr r1, =0x92120300
+ str r1, [r0]
+ ldr r2, =0xc0200000
+ ldr r1, [r2]
+
+ bl mem_delay
+
+ /* Auto refresh */
+ ldr r1, =0xa2120300
+ str r1, [r0]
+ ldr r2, =0xc0000000
+ ldr r1, [r2]
+ ldr r1, [r2]
+ ldr r1, [r2]
+ ldr r1, [r2]
+ ldr r1, [r2]
+ ldr r1, [r2]
+ ldr r1, [r2]
+ ldr r1, [r2]
+
+ /* Set mode register */
+ ldr r1, =0xB2120300
+ str r1, [r0]
+ ldr r1, =0xC0119800
+ ldr r2, [r1]
+
+ bl mem_delay
+
+ /* Back to Normal Mode */
+ ldr r1, =0x8212F339
+ str r1, [r0]
+
+ /* Set NFC_CLK to 24MHz */
+ ldr r0, =PCDR0
+ ldr r1, =0x6419a007
+ str r1, [r0]
+
+#ifdef CONFIG_NAND_IMX_BOOT
+ ldr sp, =TEXT_BASE - 4 /* Setup a temporary stack in SDRAM */
+
+ ldr r0, =IMX_NFC_BASE /* start of NFC SRAM */
+ ldr r2, =IMX_NFC_BASE + 0x800 /* end of NFC SRAM */
+
+ /* skip NAND boot if not running from NFC space */
+ cmp pc, r0
+ bls ret
+ cmp pc, r2
+ bhi ret
+
+ /* Move ourselves out of NFC SRAM */
+ ldr r1, =TEXT_BASE
+
+copy_loop:
+ ldmia r0!, {r3-r9} /* copy from source address [r0] */
+ stmia r1!, {r3-r9} /* copy to target address [r1] */
+ cmp r0, r2 /* until source end addreee [r2] */
+ ble copy_loop
+
+ ldr pc, =1f /* Jump to SDRAM */
+1:
+ bl nand_boot /* Load barebox from NAND Flash */
+
+ ldr r1, =IMX_NFC_BASE - TEXT_BASE
+ sub r10, r10, r1 /* adjust return address from NFC */
+ /* SRAM to SDRAM */
+#endif /* CONFIG_NAND_IMX_BOOT */
+
+ret:
+ mov pc, r10
+
+/*
+ * spin for a while. we need to wait at least 200 usecs.
+ */
+mem_delay:
+ mov r4, #0x4000
+spin: subs r4, r4, #1
+ bne spin
+ mov pc, lr
+
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-30 17:57:20 +0000