diff options
Diffstat (limited to 'arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr1.imxcfg')
| -rw-r--r-- | arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr1.imxcfg | 166 |
1 files changed, 166 insertions, 0 deletions
diff --git a/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr1.imxcfg b/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr1.imxcfg new file mode 100644 index 0000000000..e6b6098973 --- /dev/null +++ b/arch/arm/boards/kindle-mx50/flash-header-kindle-lpddr1.imxcfg @@ -0,0 +1,166 @@ +# DCD i.MX50 SoC setup using 256MiB LPDDR1 +# Copyright (C) 2017 Alexander Kurz <akurz@blala.de> +# +# Initial DCD setup according to Freescale ENGR00124359 +# with adaption for LPDDR1 ENGR00025557 +# Copyright (C) 2010 Freescale Semiconductor, Inc. + +soc imx50 +loadaddr 0x70020000 +dcdofs 0x400 + +# Switch pll1_sw_clk to step_clk +wm 32 0x53fd400c 0x00000004 +# Setup PLL1 to 800MHz +wm 32 0x63f80000 0x00001232 +wm 32 0x63f80004 0x00000002 +wm 32 0x63f80008 0x00000080 +wm 32 0x63f8000c 0x00000002 +wm 32 0x63f80010 0x00000001 +wm 32 0x63f8001c 0x00000080 +wm 32 0x63f80020 0x00000002 +wm 32 0x63f80024 0x00000001 +wm 32 0x63f80000 0x00001232 +check 8 while_any_bit_clear 0x63f80000 0x01 +# Switch pll1_sw_clk to pll1 +wm 32 0x53fd400c 0x00000000 + +# CGR +wm 32 0x53fd4068 0xffffffff +wm 32 0x53fd406c 0xffffffff +wm 32 0x53fd4070 0xffffffff +wm 32 0x53fd4074 0xffffffff +wm 32 0x53fd4078 0xffffffff +wm 32 0x53fd407c 0xffffffff +wm 32 0x53fd4080 0xffffffff +wm 32 0x53fd4084 0xffffffff +wm 32 0x53FD4098 0x80000004 + +# CCM DDR div 4 / 200MHz +wm 32 0x53fd4098 0x80000004 +check 32 while_all_bits_set 0x53fd408c 0x00000004 + +# IOMUX +wm 32 0x53fa8490 0x00180000 +wm 32 0x53fa8494 0x00180000 +wm 32 0x53fa86ac 0x00000000 +wm 32 0x53fa8668 0x00180000 +wm 32 0x53fa866c 0x00000000 +wm 32 0x53fa8670 0x00000000 +wm 32 0x53fa868c 0x00000000 +wm 32 0x53fa8698 0x00180000 +wm 32 0x53fa86a0 0x00180000 +wm 32 0x53fa86a4 0x00180000 +wm 32 0x53fa86a8 0x00180000 +wm 32 0x53fa86b4 0x00180000 + +# set SW_PAD_CTL_GRP_NANDF to Low output voltage +wm 32 0x53fa86c0 0x2000 + +wm 32 0x53fa8498 0x00180200 +wm 32 0x53fa849c 0x00180200 +wm 32 0x53fa84c8 0x00180000 +wm 32 0x53fa84cc 0x00180080 +wm 32 0x53fa84f0 0x00180000 +wm 32 0x53fa84f4 0x00180080 +wm 32 0x53fa84fc 0x00180080 +wm 32 0x53fa8500 0x00180000 +wm 32 0x53fa8524 0x00180080 +wm 32 0x53fa8528 0x00180000 + +# ZQ Load +wm 32 0x1400012C 0x00000817 +wm 32 0x14000128 0x09180000 +wm 32 0x14000124 0x00310000 +wm 32 0x14000124 0x00200000 +wm 32 0x14000128 0x09180010 +wm 32 0x14000124 0x00310000 +wm 32 0x14000124 0x00200000 + +# DRAM_CTL +wm 32 0x14000000 0x00000100 +wm 32 0x14000008 0x00009c40 +wm 32 0x14000014 0x02000000 +wm 32 0x14000018 0x01010006 +wm 32 0x1400001c 0x080b0201 +wm 32 0x14000020 0x02000303 +wm 32 0x14000024 0x0036b002 +wm 32 0x14000028 0x00000606 +wm 32 0x1400002c 0x06030400 +wm 32 0x14000030 0x01000000 +wm 32 0x14000034 0x00000a02 +wm 32 0x14000038 0x00000003 +wm 32 0x1400003c 0x00001801 +wm 32 0x14000040 0x00050612 +wm 32 0x14000044 0x00000200 +wm 32 0x14000048 0x001c001c +wm 32 0x1400004c 0x00010000 +wm 32 0x1400005c 0x01000000 +wm 32 0x14000060 0x00000001 +wm 32 0x14000064 0x00000000 +wm 32 0x14000068 0x00320000 +wm 32 0x1400006c 0x00000000 +wm 32 0x14000070 0x00000000 +wm 32 0x14000074 0x00320000 +wm 32 0x14000080 0x02000000 +wm 32 0x14000084 0x00000100 +wm 32 0x14000088 0x02400040 +wm 32 0x1400008c 0x01000000 +wm 32 0x14000090 0x0a000100 +wm 32 0x14000094 0x01011f1f +wm 32 0x14000098 0x01010101 +wm 32 0x1400009c 0x00030101 +wm 32 0x140000a4 0x00010000 +wm 32 0x140000a8 0x00000000 +wm 32 0x140000ac 0x0000ffff +wm 32 0x140000c8 0x02020101 +wm 32 0x140000cc 0x00000000 +wm 32 0x140000d0 0x01000202 +wm 32 0x140000d4 0x00000200 +wm 32 0x140000d8 0x00000001 +wm 32 0x140000dc 0x0000ffff +wm 32 0x140000e0 0x00000000 +wm 32 0x140000e4 0x02020000 +wm 32 0x140000e8 0x02020202 +wm 32 0x140000ec 0x00000202 +wm 32 0x140000f0 0x01010064 +wm 32 0x140000f4 0x01010101 +wm 32 0x140000f8 0x00010101 +wm 32 0x140000fc 0x00000064 +wm 32 0x14000104 0x02000602 +wm 32 0x14000108 0x06120000 +wm 32 0x1400010c 0x06120612 +wm 32 0x14000110 0x06120612 +wm 32 0x14000114 0x01030612 +wm 32 0x14000118 0x00010002 +wm 32 0x1400011c 0x00001000 + +# DDR PHY +wm 32 0x14000200 0x00000000 +wm 32 0x14000204 0x00000000 +wm 32 0x14000208 0x35002725 +wm 32 0x14000210 0x35002725 +wm 32 0x14000218 0x35002725 +wm 32 0x14000220 0x35002725 +wm 32 0x14000228 0x35002725 +wm 32 0x1400020c 0x380002d0 +wm 32 0x14000214 0x380002d0 +wm 32 0x1400021c 0x380002d0 +wm 32 0x14000224 0x380002d0 +wm 32 0x1400022c 0x380002d0 +wm 32 0x14000230 0x00000000 +wm 32 0x14000234 0x00800006 +wm 32 0x14000238 0x60101414 +wm 32 0x14000240 0x60101414 +wm 32 0x14000248 0x60101414 +wm 32 0x14000250 0x60101414 +wm 32 0x14000258 0x60101414 +wm 32 0x1400023c 0x00101001 +wm 32 0x14000244 0x00101001 +wm 32 0x1400024c 0x00101001 +wm 32 0x14000254 0x00101001 +wm 32 0x1400025c 0x00102201 + +# start DDR +wm 32 0x14000000 0x00000101 +check 32 while_any_bit_clear 0x140000a8 0x00000010 |