diff options
Diffstat (limited to 'arch/arm/boards/mmccpu/config.h')
| -rw-r--r-- | arch/arm/boards/mmccpu/config.h | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/arch/arm/boards/mmccpu/config.h b/arch/arm/boards/mmccpu/config.h index 765b6105d9..e6215dc460 100644 --- a/arch/arm/boards/mmccpu/config.h +++ b/arch/arm/boards/mmccpu/config.h @@ -62,44 +62,45 @@ #define CONFIG_SYS_SDRC_TR_VAL2 780 /* SDRAM_TR */ /* setup CS0 (NOR Flash) - 16-bit */ +#define CONFIG_SYS_SMC_CS 0 #if 1 -#define CONFIG_SYS_SMC0_SETUP0_VAL \ +#define CONFIG_SYS_SMC_SETUP_VAL \ (AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(2) | \ AT91_SMC_NRDSETUP_(8) | AT91_SMC_NCS_RDSETUP_(0)) -#define CONFIG_SYS_SMC0_PULSE0_VAL \ +#define CONFIG_SYS_SMC_PULSE_VAL \ (AT91_SMC_NWEPULSE_(5) | AT91_SMC_NCS_WRPULSE_(7) | \ AT91_SMC_NRDPULSE_(5) | AT91_SMC_NCS_RDPULSE_(13)) -#define CONFIG_SYS_SMC0_CYCLE0_VAL \ +#define CONFIG_SYS_SMC_CYCLE_VAL \ (AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)) -#define CONFIG_SYS_SMC0_MODE0_VAL \ +#define CONFIG_SYS_SMC_MODE_VAL \ (AT91_SMC_READMODE | AT91_SMC_WRITEMODE | \ AT91_SMC_DBW_16 | \ AT91_SMC_TDFMODE | \ AT91_SMC_TDF_(6)) #elif 0 /* slow setup */ -#define CONFIG_SYS_SMC0_SETUP0_VAL \ +#define CONFIG_SYS_SMC_SETUP_VAL \ (AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(2) | \ AT91_SMC_NRDSETUP_(8) | AT91_SMC_NCS_RDSETUP_(0)) -#define CONFIG_SYS_SMC0_PULSE0_VAL \ +#define CONFIG_SYS_SMC_PULSE_VAL \ (AT91_SMC_NWEPULSE_(5) | AT91_SMC_NCS_WRPULSE_(7) | \ AT91_SMC_NRDPULSE_(5) | AT91_SMC_NCS_RDPULSE_(13)) -#define CONFIG_SYS_SMC0_CYCLE0_VAL \ +#define CONFIG_SYS_SMC_CYCLE_VAL \ (AT91_SMC_NWECYCLE_(0xd00) | AT91_SMC_NRDCYCLE_(0xd00)) -#define CONFIG_SYS_SMC0_MODE0_VAL \ +#define CONFIG_SYS_SMC_MODE_VAL \ (AT91_SMC_READMODE | AT91_SMC_WRITEMODE | \ AT91_SMC_DBW_16 | \ AT91_SMC_TDFMODE | \ AT91_SMC_TDF_(1)) #else /* RONETIX' original values */ -#define CONFIG_SYS_SMC0_SETUP0_VAL \ +#define CONFIG_SYS_SMC_SETUP_VAL \ (AT91_SMC_NWESETUP_(10) | AT91_SMC_NCS_WRSETUP_(10) | \ AT91_SMC_NRDSETUP_(10) | AT91_SMC_NCS_RDSETUP_(10)) -#define CONFIG_SYS_SMC0_PULSE0_VAL \ +#define CONFIG_SYS_SMC_PULSE_VAL \ (AT91_SMC_NWEPULSE_(11) | AT91_SMC_NCS_WRPULSE_(11) | \ AT91_SMC_NRDPULSE_(11) | AT91_SMC_NCS_RDPULSE_(11)) -#define CONFIG_SYS_SMC0_CYCLE0_VAL \ +#define CONFIG_SYS_SMC_CYCLE_VAL \ (AT91_SMC_NWECYCLE_(22) | AT91_SMC_NRDCYCLE_(22)) -#define CONFIG_SYS_SMC0_MODE0_VAL \ +#define CONFIG_SYS_SMC_MODE_VAL \ (AT91_SMC_READMODE | AT91_SMC_WRITEMODE | \ AT91_SMC_DBW_16 | \ AT91_SMC_TDFMODE | \ |