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-rw-r--r--arch/arm/boards/phytec-som-am335x/lowlevel.c46
1 files changed, 13 insertions, 33 deletions
diff --git a/arch/arm/boards/phytec-som-am335x/lowlevel.c b/arch/arm/boards/phytec-som-am335x/lowlevel.c
index a028449fc0..267f30b638 100644
--- a/arch/arm/boards/phytec-som-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-som-am335x/lowlevel.c
@@ -1,17 +1,5 @@
-/*
- * Copyright (C) 2015 Wadim Egorov, PHYTEC Messtechnik GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
+// SPDX-License-Identifier: GPL-2.0-or-later
+// SPDX-FileCopyrightText: 2015 Wadim Egorov, PHYTEC Messtechnik GmbH
#include <common.h>
#include <linux/sizes.h>
@@ -19,16 +7,16 @@
#include <init.h>
#include <asm/barebox-arm-head.h>
#include <asm/barebox-arm.h>
-#include <mach/am33xx-silicon.h>
-#include <mach/am33xx-clock.h>
-#include <mach/generic.h>
-#include <mach/sdrc.h>
-#include <mach/sys_info.h>
-#include <mach/syslib.h>
-#include <mach/am33xx-mux.h>
-#include <mach/am33xx-generic.h>
-#include <mach/wdt.h>
+#include <mach/omap/am33xx-silicon.h>
+#include <mach/omap/am33xx-clock.h>
+#include <mach/omap/generic.h>
+#include <mach/omap/sdrc.h>
+#include <mach/omap/sys_info.h>
+#include <mach/omap/syslib.h>
+#include <mach/omap/am33xx-mux.h>
+#include <mach/omap/am33xx-generic.h>
#include <debug_ll.h>
+#include <mach/omap/debug_ll.h>
#include "ram-timings.h"
@@ -148,15 +136,7 @@ static noinline void physom_board_init(void *fdt, int sdram, int module_family)
struct am335x_sdram_timings *timing = NULL;
u32 ramsize;
- /*
- * WDT1 is already running when the bootloader gets control
- * Disable it to avoid "random" resets
- */
- writel(WDT_DISABLE_CODE1, AM33XX_WDT_REG(WSPR));
- while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
-
- writel(WDT_DISABLE_CODE2, AM33XX_WDT_REG(WSPR));
- while (readl(AM33XX_WDT_REG(WWPS)) != 0x0);
+ omap_watchdog_disable(IOMEM(AM33XX_WDT_BASE));
am33xx_pll_init(MPUPLL_M_600, DDRPLL_M_400);
@@ -184,7 +164,7 @@ static noinline void physom_board_init(void *fdt, int sdram, int module_family)
am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE);
am33xx_enable_uart0_pin_mux();
- omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
+ omap_debug_ll_init();
putc_ll('>');
am335x_barebox_entry(fdt);